Pseudo diff outputs

Signed-off-by: David Shah <dave@ds0.me>
diff --git a/ECP5/tiledata/PICT0/bits.db b/ECP5/tiledata/PICT0/bits.db
index 8f45cc3..ee22cc5 100644
--- a/ECP5/tiledata/PICT0/bits.db
+++ b/ECP5/tiledata/PICT0/bits.db
@@ -111,10 +111,15 @@
 INPUT_LVTTL33 -
 NONE -
 OUTPUT_LVCMOS12 F54B0 F55B0
+OUTPUT_LVCMOS12D F11B0 F54B0 F55B0
 OUTPUT_LVCMOS15 F54B0 F55B0
+OUTPUT_LVCMOS15D F11B0 F54B0 F55B0
 OUTPUT_LVCMOS18 F54B0 F55B0
+OUTPUT_LVCMOS18D F11B0 F54B0 F55B0
 OUTPUT_LVCMOS25 F54B0 F55B0
+OUTPUT_LVCMOS25D F11B0 F54B0 F55B0
 OUTPUT_LVCMOS33 F54B0 F55B0
+OUTPUT_LVCMOS33D F11B0 F54B0 F55B0
 OUTPUT_LVTTL33 F54B0 F55B0
 
 .config_enum PIOA.DATAMUX_ODDR PADDO
diff --git a/ECP5/tiledata/PICT1/bits.db b/ECP5/tiledata/PICT1/bits.db
index 4a5b151..fdbe061 100644
--- a/ECP5/tiledata/PICT1/bits.db
+++ b/ECP5/tiledata/PICT1/bits.db
@@ -96,6 +96,32 @@
 RESET -
 SET F56B0
 
+.config_enum PIOA.BASE_TYPE BIDIR_LVCMOS12
+BIDIR_LVCMOS12 -
+BIDIR_LVCMOS15 -
+BIDIR_LVCMOS18 -
+BIDIR_LVCMOS25 -
+BIDIR_LVCMOS33 -
+BIDIR_LVTTL33 -
+INPUT_LVCMOS12 -
+INPUT_LVCMOS15 -
+INPUT_LVCMOS18 -
+INPUT_LVCMOS25 -
+INPUT_LVCMOS33 -
+INPUT_LVTTL33 -
+NONE -
+OUTPUT_LVCMOS12 -
+OUTPUT_LVCMOS12D F11B0 F54B0 F55B0
+OUTPUT_LVCMOS15 -
+OUTPUT_LVCMOS15D F11B0 F54B0 F55B0
+OUTPUT_LVCMOS18 -
+OUTPUT_LVCMOS18D F11B0 F54B0 F55B0
+OUTPUT_LVCMOS25 -
+OUTPUT_LVCMOS25D F11B0 F54B0 F55B0
+OUTPUT_LVCMOS33 -
+OUTPUT_LVCMOS33D F11B0 F54B0 F55B0
+OUTPUT_LVTTL33 -
+
 .config_enum PIOB.BASE_TYPE INPUT_LVCMOS12
 BIDIR_LVCMOS12 F54B0 F55B0
 BIDIR_LVCMOS15 F54B0 F55B0
diff --git a/ECP5/tiledata/PIOT0/bits.db b/ECP5/tiledata/PIOT0/bits.db
index 28f3213..22420c7 100644
--- a/ECP5/tiledata/PIOT0/bits.db
+++ b/ECP5/tiledata/PIOT0/bits.db
@@ -16,10 +16,15 @@
 INPUT_LVTTL33 F2B0 F3B0 F4B0 F9B0 F14B0
 NONE F2B0
 OUTPUT_LVCMOS12 F2B0 F7B0 F9B0
+OUTPUT_LVCMOS12D F2B0 F7B0 F9B0
 OUTPUT_LVCMOS15 F2B0 F7B0 F9B0
+OUTPUT_LVCMOS15D F2B0 F7B0 F9B0
 OUTPUT_LVCMOS18 F2B0 F7B0 F9B0
+OUTPUT_LVCMOS18D F2B0 F7B0 F9B0
 OUTPUT_LVCMOS25 F2B0 F7B0 F9B0
+OUTPUT_LVCMOS25D F2B0 F7B0 F9B0
 OUTPUT_LVCMOS33 F2B0 F7B0 F9B0 F15B0 F16B0 F17B0
+OUTPUT_LVCMOS33D F2B0 F7B0 F9B0 F15B0 F16B0 F17B0
 OUTPUT_LVTTL33 F2B0 F7B0 F9B0 F15B0 F16B0 F17B0
 
 .config_enum PIOA.DRIVE
diff --git a/ECP5/tiledata/PIOT1/bits.db b/ECP5/tiledata/PIOT1/bits.db
index c923a67..4758d63 100644
--- a/ECP5/tiledata/PIOT1/bits.db
+++ b/ECP5/tiledata/PIOT1/bits.db
@@ -1,6 +1,32 @@
 # Routing Mux Bits
 
 # Non-Routing Configuration
+.config_enum PIOA.BASE_TYPE BIDIR_LVCMOS12
+BIDIR_LVCMOS12 -
+BIDIR_LVCMOS15 -
+BIDIR_LVCMOS18 -
+BIDIR_LVCMOS25 -
+BIDIR_LVCMOS33 -
+BIDIR_LVTTL33 -
+INPUT_LVCMOS12 -
+INPUT_LVCMOS15 -
+INPUT_LVCMOS18 -
+INPUT_LVCMOS25 -
+INPUT_LVCMOS33 -
+INPUT_LVTTL33 -
+NONE -
+OUTPUT_LVCMOS12 -
+OUTPUT_LVCMOS12D F7B0
+OUTPUT_LVCMOS15 -
+OUTPUT_LVCMOS15D F7B0
+OUTPUT_LVCMOS18 -
+OUTPUT_LVCMOS18D F7B0
+OUTPUT_LVCMOS25 -
+OUTPUT_LVCMOS25D F7B0
+OUTPUT_LVCMOS33 -
+OUTPUT_LVCMOS33D F7B0 F15B0 F16B0 F17B0
+OUTPUT_LVTTL33 -
+
 .config_enum PIOB.BASE_TYPE NONE
 BIDIR_LVCMOS12 F2B0 F4B0 F9B0
 BIDIR_LVCMOS15 !F2B0 F9B0