# Routing Mux Bits
.mux N2_ECLKC
BNK_ECLK1 F5B1

.mux N2_ECLKD
BNK_ECLK1 F3B6

.mux N2_JDIC
N2_INDDC_IOLOGIC F1B1

.mux N2_JDID
N2_INDDD_IOLOGIC F9B7


# Non-Routing Configuration
.config_enum PIOC.BASE_TYPE INPUT_LVCMOS18D
BIDIR_BLVDS25E F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
BIDIR_HSUL12 F7B4 F8B4
BIDIR_HSUL12D F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
BIDIR_LVCMOS12 F7B4 F8B4
BIDIR_LVCMOS15 F7B4 F8B4
BIDIR_LVCMOS18 F7B4 F8B4
BIDIR_LVCMOS25 F7B4 F8B4
BIDIR_LVCMOS25D F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
BIDIR_LVCMOS33 F7B4 F8B4
BIDIR_LVCMOS33D F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
BIDIR_LVTTL33 F7B4 F8B4
BIDIR_MLVDS25E F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
BIDIR_SSTL135D_I F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
BIDIR_SSTL135D_II F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
BIDIR_SSTL135_I F7B4 F8B4
BIDIR_SSTL135_II F7B4 F8B4
BIDIR_SSTL15D_I F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
BIDIR_SSTL15D_II F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
BIDIR_SSTL15_I F7B4 F8B4
BIDIR_SSTL15_II F7B4 F8B4
BIDIR_SSTL18D_I F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
BIDIR_SSTL18D_II F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
BIDIR_SSTL18_I F7B4 F8B4
BIDIR_SSTL18_II F7B4 F8B4
INPUT_BLVDS25 
INPUT_HSUL12 
INPUT_HSUL12D 
INPUT_LVCMOS12 
INPUT_LVCMOS15 
INPUT_LVCMOS18 
INPUT_LVCMOS18D 
INPUT_LVCMOS25 
INPUT_LVCMOS25D 
INPUT_LVCMOS33 
INPUT_LVCMOS33D 
INPUT_LVDS 
INPUT_LVPECL33 
INPUT_LVTTL33 
INPUT_MLVDS25 
INPUT_SLVS 
INPUT_SSTL135D_I 
INPUT_SSTL135D_II 
INPUT_SSTL135_I 
INPUT_SSTL135_II 
INPUT_SSTL15D_I 
INPUT_SSTL15D_II 
INPUT_SSTL15_I 
INPUT_SSTL15_II 
INPUT_SSTL18D_I 
INPUT_SSTL18D_II 
INPUT_SSTL18_I 
INPUT_SSTL18_II 
INPUT_SUBLVDS 
NONE 
OUTPUT_BLVDS25E F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
OUTPUT_HSUL12 F7B4 F8B4
OUTPUT_HSUL12D F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
OUTPUT_LVCMOS12 F7B4 F8B4
OUTPUT_LVCMOS15 F7B4 F8B4
OUTPUT_LVCMOS18 F7B4 F8B4
OUTPUT_LVCMOS25 F7B4 F8B4
OUTPUT_LVCMOS25D F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
OUTPUT_LVCMOS33 F7B4 F8B4
OUTPUT_LVCMOS33D F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
OUTPUT_LVDS25E F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
OUTPUT_LVPECL33E F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
OUTPUT_LVTTL33 F7B4 F8B4
OUTPUT_MLVDS25E F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
OUTPUT_SSTL135D_I F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
OUTPUT_SSTL135D_II F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
OUTPUT_SSTL135_I F7B4 F8B4
OUTPUT_SSTL135_II F7B4 F8B4
OUTPUT_SSTL15D_I F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
OUTPUT_SSTL15D_II F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
OUTPUT_SSTL15_I F7B4 F8B4
OUTPUT_SSTL15_II F7B4 F8B4
OUTPUT_SSTL18D_I F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
OUTPUT_SSTL18D_II F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
OUTPUT_SSTL18_I F7B4 F8B4
OUTPUT_SSTL18_II F7B4 F8B4

.config_enum PIOD.BASE_TYPE INPUT_HSUL12
BIDIR_HSUL12 F4B9 F5B9
BIDIR_LVCMOS12 F4B9 F5B9
BIDIR_LVCMOS15 F4B9 F5B9
BIDIR_LVCMOS18 F4B9 F5B9
BIDIR_LVCMOS25 F4B9 F5B9
BIDIR_LVCMOS33 F4B9 F5B9
BIDIR_LVTTL33 F4B9 F5B9
BIDIR_SSTL135_I F4B9 F5B9
BIDIR_SSTL135_II F4B9 F5B9
BIDIR_SSTL15_I F4B9 F5B9
BIDIR_SSTL15_II F4B9 F5B9
BIDIR_SSTL18_I F4B9 F5B9
BIDIR_SSTL18_II F4B9 F5B9
INPUT_HSUL12 
INPUT_LVCMOS12 
INPUT_LVCMOS15 
INPUT_LVCMOS18 
INPUT_LVCMOS25 
INPUT_LVCMOS33 
INPUT_LVTTL33 
INPUT_SSTL135_I 
INPUT_SSTL135_II 
INPUT_SSTL15_I 
INPUT_SSTL15_II 
INPUT_SSTL18_I 
INPUT_SSTL18_II 
NONE 
OUTPUT_HSUL12 F4B9 F5B9
OUTPUT_LVCMOS12 F4B9 F5B9
OUTPUT_LVCMOS15 F4B9 F5B9
OUTPUT_LVCMOS18 F4B9 F5B9
OUTPUT_LVCMOS25 F4B9 F5B9
OUTPUT_LVCMOS33 F4B9 F5B9
OUTPUT_LVTTL33 F4B9 F5B9
OUTPUT_SSTL135_I F4B9 F5B9
OUTPUT_SSTL135_II F4B9 F5B9
OUTPUT_SSTL15_I F4B9 F5B9
OUTPUT_SSTL15_II F4B9 F5B9
OUTPUT_SSTL18_I F4B9 F5B9
OUTPUT_SSTL18_II F4B9 F5B9


# Fixed Connections