diff --git a/ECP5/tiledata/MIB_CIB_LR/bits.db b/ECP5/tiledata/MIB_CIB_LR/bits.db
index 485f88d..968bee7 100644
--- a/ECP5/tiledata/MIB_CIB_LR/bits.db
+++ b/ECP5/tiledata/MIB_CIB_LR/bits.db
@@ -13,6 +13,166 @@
 
 
 # Non-Routing Configuration
+.config IOLOGICC.DELAY.DEL_VALUE 0000000
+F0B1
+F9B0
+F8B0
+F7B0
+F6B0
+F5B0
+F4B0
+
+.config IOLOGICD.DELAY.DEL_VALUE 0000000
+F2B6
+F1B6
+F0B6
+F9B5
+F8B5
+F7B5
+F6B5
+
+.config_enum IOLOGICC.CLKIMUX CLK
+CLK -
+INV F7B1
+
+.config_enum IOLOGICC.CLKOMUX CLK
+CLK -
+INV F0B3
+
+.config_enum IOLOGICC.DELAY.OUTDEL DISABLED
+DISABLED -
+ENABLED F1B3
+
+.config_enum IOLOGICC.DELAY.WAIT_FOR_EDGE DISABLED
+DISABLED -
+ENABLED F6B2
+
+.config_enum IOLOGICC.GSR ENABLED
+DISABLED F2B1
+ENABLED -
+
+.config_enum IOLOGICC.IDDRXN.MODE NONE
+IDDR71 F1B2 F2B2 F3B7 F4B7
+IDDRX2 F1B2
+NONE -
+
+.config_enum IOLOGICC.LSRIMUX 0
+0 -
+LSRMUX F9B1
+
+.config_enum IOLOGICC.LSRMUX INV
+INV -
+LSR F4B2
+
+.config_enum IOLOGICC.LSROMUX 0
+0 -
+LSRMUX F2B3
+
+.config_enum IOLOGICC.MIDDRX.MODE NONE
+MIDDRX2 F1B2 F6B10
+NONE -
+
+.config_enum IOLOGICC.MIDDRX_MODDRX.WRCLKMUX DQSW
+DQSW -
+DQSW270 F8B4
+
+.config_enum IOLOGICC.MODDRX.MODE NONE
+MODDRX2 F8B3
+MOSHX2 F8B4 F9B3
+NONE -
+
+.config_enum IOLOGICC.MODE NONE
+IDDRX1_ODDRX1 F0B5 F2B2 F6B1 F8B2 F9B2 F9B4
+IDDRXN F0B5 F6B1 F8B2 F9B2 F9B4
+IREG_OREG F6B1 F9B2 F9B4
+MIDDRX_MODDRX F0B5 F3B3 F6B1 F8B2 F9B2 F9B4
+NONE -
+ODDRXN F0B5 F6B1 F6B3 F7B3 F8B2 F9B2 F9B4
+
+.config_enum IOLOGICC.MTDDRX.DQSW_INVERT DISABLED
+DISABLED -
+ENABLED F0B4
+
+.config_enum IOLOGICC.MTDDRX.MODE NONE
+MTSHX2 F0B4 F3B4 F8B3
+NONE -
+
+.config_enum IOLOGICC.ODDRXN.MODE NONE
+NONE -
+ODDR71 F0B9 F1B9 F2B9 F8B3 F8B4 F9B3 F9B8
+ODDRX2 F8B3 F8B4
+
+.config_enum IOLOGICD.CLKIMUX CLK
+CLK -
+INV F9B6
+
+.config_enum IOLOGICD.CLKOMUX CLK
+CLK -
+INV F2B8
+
+.config_enum IOLOGICD.DELAY.OUTDEL DISABLED
+DISABLED -
+ENABLED F3B8
+
+.config_enum IOLOGICD.DELAY.WAIT_FOR_EDGE DISABLED
+DISABLED -
+ENABLED F8B7
+
+.config_enum IOLOGICD.GSR ENABLED
+DISABLED F4B6
+ENABLED -
+
+.config_enum IOLOGICD.IDDRXN.MODE NONE
+IDDR71 F3B7 F4B7
+IDDRX2 F3B7
+NONE -
+
+.config_enum IOLOGICD.LSRIMUX 0
+0 -
+LSRMUX F1B7
+
+.config_enum IOLOGICD.LSRMUX INV
+INV -
+LSR F6B7
+
+.config_enum IOLOGICD.LSROMUX 0
+0 -
+LSRMUX F4B8
+
+.config_enum IOLOGICD.MIDDRX.MODE NONE
+MIDDRX2 F3B7 F7B10
+NONE -
+
+.config_enum IOLOGICD.MIDDRX_MODDRX.WRCLKMUX DQSW
+DQSW -
+DQSW270 F1B10
+
+.config_enum IOLOGICD.MODDRX.MODE NONE
+MODDRX2 F1B9
+MOSHX2 F1B10 F2B9
+NONE -
+
+.config_enum IOLOGICD.MODE NONE
+IDDRX1_ODDRX1 F0B8 F1B8 F2B10 F3B10 F4B7 F8B6
+IDDRXN F0B8 F1B8 F2B10 F3B10 F8B6
+IREG_OREG F1B8 F2B10 F8B6
+MIDDRX_MODDRX F0B8 F1B8 F2B10 F3B10 F5B6 F8B6
+NONE -
+ODDRXN F0B8 F0B9 F1B8 F2B10 F3B10 F8B6 F9B8
+
+.config_enum IOLOGICD.MTDDRX.DQSW_INVERT DISABLED
+DISABLED -
+ENABLED F3B9
+
+.config_enum IOLOGICD.MTDDRX.MODE NONE
+MTSHX2 F1B9 F3B9 F6B9
+NONE -
+
+.config_enum IOLOGICD.ODDRXN.MODE NONE
+NONE -
+ODDR71 F1B9 F1B10 F2B9
+ODDRX2 F1B9 F1B10
+
 .config_enum PIOC.BASE_TYPE INPUT_LVCMOS18D
 BIDIR_BLVDS25E F1B1 F1B4 F2B4 F3B6 F4B9 F5B9
 BIDIR_HSUL12 F1B4 F2B4
@@ -95,6 +255,14 @@
 OUTPUT_SSTL18_I F1B4 F2B4
 OUTPUT_SSTL18_II F1B4 F2B4
 
+.config_enum PIOC.DATAMUX_MDDR PADDO
+IOLDO F6B3 F7B3
+PADDO -
+
+.config_enum PIOC.DATAMUX_ODDR PADDO
+IOLDO F6B3
+PADDO -
+
 .config_enum PIOD.BASE_TYPE INPUT_HSUL12
 BIDIR_HSUL12 F4B9 F5B9
 BIDIR_LVCMOS12 F4B9 F5B9
@@ -137,5 +305,13 @@
 OUTPUT_SSTL18_I F4B9 F5B9
 OUTPUT_SSTL18_II F4B9 F5B9
 
+.config_enum PIOD.DATAMUX_MDDR PADDO
+IOLDO F0B9 F9B8
+PADDO -
+
+.config_enum PIOD.DATAMUX_ODDR PADDO
+IOLDO F9B8
+PADDO -
+
 
 # Fixed Connections
diff --git a/ECP5/tiledata/MIB_CIB_LR_A/bits.db b/ECP5/tiledata/MIB_CIB_LR_A/bits.db
index 4a7fbaf..1cbe8b2 100644
--- a/ECP5/tiledata/MIB_CIB_LR_A/bits.db
+++ b/ECP5/tiledata/MIB_CIB_LR_A/bits.db
@@ -13,6 +13,166 @@
 
 
 # Non-Routing Configuration
+.config IOLOGICC.DELAY.DEL_VALUE 0000000
+F9B1
+F0B0
+F1B0
+F2B0
+F3B0
+F4B0
+F5B0
+
+.config IOLOGICD.DELAY.DEL_VALUE 0000000
+F7B6
+F8B6
+F9B6
+F0B5
+F1B5
+F2B5
+F3B5
+
+.config_enum IOLOGICC.CLKIMUX CLK
+CLK -
+INV F2B1
+
+.config_enum IOLOGICC.CLKOMUX CLK
+CLK -
+INV F9B3
+
+.config_enum IOLOGICC.DELAY.OUTDEL DISABLED
+DISABLED -
+ENABLED F8B3
+
+.config_enum IOLOGICC.DELAY.WAIT_FOR_EDGE DISABLED
+DISABLED -
+ENABLED F3B2
+
+.config_enum IOLOGICC.GSR ENABLED
+DISABLED F7B1
+ENABLED -
+
+.config_enum IOLOGICC.IDDRXN.MODE NONE
+IDDR71 F5B7 F6B7 F7B2 F8B2
+IDDRX2 F8B2
+NONE -
+
+.config_enum IOLOGICC.LSRIMUX 0
+0 -
+LSRMUX F0B1
+
+.config_enum IOLOGICC.LSRMUX INV
+INV -
+LSR F5B2
+
+.config_enum IOLOGICC.LSROMUX 0
+0 -
+LSRMUX F7B3
+
+.config_enum IOLOGICC.MIDDRX.MODE NONE
+MIDDRX2 F3B10 F8B2
+NONE -
+
+.config_enum IOLOGICC.MIDDRX_MODDRX.WRCLKMUX DQSW
+DQSW -
+DQSW270 F1B4
+
+.config_enum IOLOGICC.MODDRX.MODE NONE
+MODDRX2 F1B3
+MOSHX2 F0B3 F1B4
+NONE -
+
+.config_enum IOLOGICC.MODE NONE
+IDDRX1_ODDRX1 F0B2 F0B4 F1B2 F3B1 F7B2 F9B5
+IDDRXN F0B2 F0B4 F1B2 F3B1 F9B5
+IREG_OREG F0B2 F0B4 F3B1
+MIDDRX_MODDRX F0B2 F0B4 F1B2 F3B1 F6B3 F9B5
+NONE -
+ODDRXN F0B2 F0B4 F1B2 F2B3 F3B1 F3B3 F9B5
+
+.config_enum IOLOGICC.MTDDRX.DQSW_INVERT DISABLED
+DISABLED -
+ENABLED F9B4
+
+.config_enum IOLOGICC.MTDDRX.MODE NONE
+MTSHX2 F1B3 F6B4 F9B4
+NONE -
+
+.config_enum IOLOGICC.ODDRXN.MODE NONE
+NONE -
+ODDR71 F0B3 F0B8 F1B3 F1B4 F7B9 F8B9 F9B9
+ODDRX2 F1B3 F1B4
+
+.config_enum IOLOGICD.CLKIMUX CLK
+CLK -
+INV F0B6
+
+.config_enum IOLOGICD.CLKOMUX CLK
+CLK -
+INV F7B8
+
+.config_enum IOLOGICD.DELAY.OUTDEL DISABLED
+DISABLED -
+ENABLED F6B8
+
+.config_enum IOLOGICD.DELAY.WAIT_FOR_EDGE DISABLED
+DISABLED -
+ENABLED F1B7
+
+.config_enum IOLOGICD.GSR ENABLED
+DISABLED F5B6
+ENABLED -
+
+.config_enum IOLOGICD.IDDRXN.MODE NONE
+IDDR71 F5B7 F6B7
+IDDRX2 F6B7
+NONE -
+
+.config_enum IOLOGICD.LSRIMUX 0
+0 -
+LSRMUX F8B7
+
+.config_enum IOLOGICD.LSRMUX INV
+INV -
+LSR F3B7
+
+.config_enum IOLOGICD.LSROMUX 0
+0 -
+LSRMUX F5B8
+
+.config_enum IOLOGICD.MIDDRX.MODE NONE
+MIDDRX2 F2B10 F6B7
+NONE -
+
+.config_enum IOLOGICD.MIDDRX_MODDRX.WRCLKMUX DQSW
+DQSW -
+DQSW270 F8B10
+
+.config_enum IOLOGICD.MODDRX.MODE NONE
+MODDRX2 F8B9
+MOSHX2 F7B9 F8B10
+NONE -
+
+.config_enum IOLOGICD.MODE NONE
+IDDRX1_ODDRX1 F1B6 F5B7 F6B10 F7B10 F8B8 F9B8
+IDDRXN F1B6 F6B10 F7B10 F8B8 F9B8
+IREG_OREG F1B6 F7B10 F8B8
+MIDDRX_MODDRX F1B6 F4B6 F6B10 F7B10 F8B8 F9B8
+NONE -
+ODDRXN F0B8 F1B6 F6B10 F7B10 F8B8 F9B8 F9B9
+
+.config_enum IOLOGICD.MTDDRX.DQSW_INVERT DISABLED
+DISABLED -
+ENABLED F6B9
+
+.config_enum IOLOGICD.MTDDRX.MODE NONE
+MTSHX2 F3B9 F6B9 F8B9
+NONE -
+
+.config_enum IOLOGICD.ODDRXN.MODE NONE
+NONE -
+ODDR71 F7B9 F8B9 F8B10
+ODDRX2 F8B9 F8B10
+
 .config_enum PIOC.BASE_TYPE INPUT_LVCMOS18D
 BIDIR_BLVDS25E F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
 BIDIR_HSUL12 F7B4 F8B4
@@ -95,6 +255,14 @@
 OUTPUT_SSTL18_I F7B4 F8B4
 OUTPUT_SSTL18_II F7B4 F8B4
 
+.config_enum PIOC.DATAMUX_MDDR PADDO
+IOLDO F2B3 F3B3
+PADDO -
+
+.config_enum PIOC.DATAMUX_ODDR PADDO
+IOLDO F3B3
+PADDO -
+
 .config_enum PIOD.BASE_TYPE INPUT_HSUL12
 BIDIR_HSUL12 F4B9 F5B9
 BIDIR_LVCMOS12 F4B9 F5B9
@@ -137,5 +305,13 @@
 OUTPUT_SSTL18_I F4B9 F5B9
 OUTPUT_SSTL18_II F4B9 F5B9
 
+.config_enum PIOD.DATAMUX_MDDR PADDO
+IOLDO F0B8 F9B9
+PADDO -
+
+.config_enum PIOD.DATAMUX_ODDR PADDO
+IOLDO F0B8
+PADDO -
+
 
 # Fixed Connections
diff --git a/ECP5/tiledata/PICL0/bits.db b/ECP5/tiledata/PICL0/bits.db
index 5b007a6..25b98b7 100644
--- a/ECP5/tiledata/PICL0/bits.db
+++ b/ECP5/tiledata/PICL0/bits.db
@@ -263,6 +263,14 @@
 OUTPUT_SSTL18_I F1B4 F2B4
 OUTPUT_SSTL18_II F1B4 F2B4
 
+.config_enum PIOA.DATAMUX_MDDR PADDO
+IOLDO F6B3 F7B3
+PADDO -
+
+.config_enum PIOA.DATAMUX_ODDR PADDO
+IOLDO F6B3
+PADDO -
+
 .config_enum PIOB.BASE_TYPE INPUT_HSUL12
 BIDIR_HSUL12 F3B9 F4B9
 BIDIR_LVCMOS12 F3B9 F4B9
@@ -305,6 +313,14 @@
 OUTPUT_SSTL18_I F3B9 F4B9
 OUTPUT_SSTL18_II F3B9 F4B9
 
+.config_enum PIOB.DATAMUX_MDDR PADDO
+IOLDO F8B8 F9B8
+PADDO -
+
+.config_enum PIOB.DATAMUX_ODDR PADDO
+IOLDO F8B8
+PADDO -
+
 
 # Fixed Connections
 .fixed_conn DIA_IOLOGIC JDIA
diff --git a/ECP5/tiledata/PICL0_DQS2/bits.db b/ECP5/tiledata/PICL0_DQS2/bits.db
index 767616f..2f1a558 100644
--- a/ECP5/tiledata/PICL0_DQS2/bits.db
+++ b/ECP5/tiledata/PICL0_DQS2/bits.db
@@ -27,6 +27,24 @@
 F6B11
 F7B11
 
+.config IOLOGICA.DELAY.DEL_VALUE 0000000
+F0B1
+F9B0
+F8B0
+F7B0
+F6B0
+F5B0
+F4B0
+
+.config IOLOGICB.DELAY.DEL_VALUE 0000000
+F2B6
+F1B6
+F0B6
+F9B5
+F8B5
+F7B5
+F6B5
+
 .config_enum DQS.DDRDEL DDRDEL
 0 F9B10
 DDRDEL -
@@ -43,6 +61,148 @@
 NO -
 YES F8B10
 
+.config_enum IOLOGICA.CLKIMUX CLK
+CLK -
+INV F7B1
+
+.config_enum IOLOGICA.CLKOMUX CLK
+CLK -
+INV F0B3
+
+.config_enum IOLOGICA.DELAY.OUTDEL DISABLED
+DISABLED -
+ENABLED F1B3
+
+.config_enum IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED
+DISABLED -
+ENABLED F6B2
+
+.config_enum IOLOGICA.GSR ENABLED
+DISABLED F2B1
+ENABLED -
+
+.config_enum IOLOGICA.IDDRXN.MODE NONE
+IDDR71 F1B2 F2B2 F3B7 F4B7
+IDDRX2 F1B2
+NONE -
+
+.config_enum IOLOGICA.LSRIMUX 0
+0 -
+LSRMUX F9B1
+
+.config_enum IOLOGICA.LSRMUX INV
+INV -
+LSR F4B2
+
+.config_enum IOLOGICA.LSROMUX 0
+0 -
+LSRMUX F2B3
+
+.config_enum IOLOGICA.MIDDRX.MODE NONE
+MIDDRX2 F1B2 F6B10
+NONE -
+
+.config_enum IOLOGICA.MIDDRX_MODDRX.WRCLKMUX DQSW
+DQSW -
+DQSW270 F8B4
+
+.config_enum IOLOGICA.MODDRX.MODE NONE
+MODDRX2 F8B3
+MOSHX2 F8B4 F9B3
+NONE -
+
+.config_enum IOLOGICA.MODE NONE
+IDDRX1_ODDRX1 F0B5 F2B2 F6B1 F8B2 F9B2 F9B4
+IDDRXN F0B5 F6B1 F8B2 F9B2 F9B4
+IREG_OREG F6B1 F9B2 F9B4
+MIDDRX_MODDRX F0B5 F3B1 F6B1 F8B2 F9B2 F9B4
+NONE -
+ODDRXN F0B5 F6B1 F6B3 F7B3 F8B2 F9B2 F9B4
+
+.config_enum IOLOGICA.MTDDRX.DQSW_INVERT DISABLED
+DISABLED -
+ENABLED F0B4
+
+.config_enum IOLOGICA.MTDDRX.MODE NONE
+MTSHX2 F0B4 F3B4 F8B3
+NONE -
+
+.config_enum IOLOGICA.ODDRXN.MODE NONE
+NONE -
+ODDR71 F0B9 F1B9 F8B3 F8B4 F8B8 F9B3 F9B8
+ODDRX2 F8B3 F8B4
+
+.config_enum IOLOGICB.CLKIMUX CLK
+CLK -
+INV F9B6
+
+.config_enum IOLOGICB.CLKOMUX CLK
+CLK -
+INV F2B8
+
+.config_enum IOLOGICB.DELAY.OUTDEL DISABLED
+DISABLED -
+ENABLED F3B8
+
+.config_enum IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED
+DISABLED -
+ENABLED F8B7
+
+.config_enum IOLOGICB.GSR ENABLED
+DISABLED F4B6
+ENABLED -
+
+.config_enum IOLOGICB.IDDRXN.MODE NONE
+IDDR71 F3B7 F4B7
+IDDRX2 F3B7
+NONE -
+
+.config_enum IOLOGICB.LSRIMUX 0
+0 -
+LSRMUX F1B7
+
+.config_enum IOLOGICB.LSRMUX INV
+INV -
+LSR F6B7
+
+.config_enum IOLOGICB.LSROMUX 0
+0 -
+LSRMUX F4B8
+
+.config_enum IOLOGICB.MIDDRX.MODE NONE
+MIDDRX2 F3B7 F7B10
+NONE -
+
+.config_enum IOLOGICB.MIDDRX_MODDRX.WRCLKMUX DQSW
+DQSW -
+DQSW270 F0B10
+
+.config_enum IOLOGICB.MODDRX.MODE NONE
+MODDRX2 F0B9
+MOSHX2 F0B10 F1B9
+NONE -
+
+.config_enum IOLOGICB.MODE NONE
+IDDRX1_ODDRX1 F0B8 F1B8 F1B10 F2B10 F4B7 F8B6
+IDDRXN F0B8 F1B8 F1B10 F2B10 F8B6
+IREG_OREG F1B8 F1B10 F8B6
+MIDDRX_MODDRX F0B8 F1B8 F1B10 F2B10 F5B6 F8B6
+NONE -
+ODDRXN F0B8 F1B8 F1B10 F2B10 F8B6 F8B8 F9B8
+
+.config_enum IOLOGICB.MTDDRX.DQSW_INVERT DISABLED
+DISABLED -
+ENABLED F2B9
+
+.config_enum IOLOGICB.MTDDRX.MODE NONE
+MTSHX2 F0B9 F2B9 F5B9
+NONE -
+
+.config_enum IOLOGICB.ODDRXN.MODE NONE
+NONE -
+ODDR71 F0B9 F0B10 F1B9
+ODDRX2 F0B9 F0B10
+
 .config_enum PIOA.BASE_TYPE INPUT_LVCMOS18D
 BIDIR_BLVDS25E F1B1 F1B4 F2B4 F3B6 F3B9 F4B9
 BIDIR_HSUL12 F1B4 F2B4
@@ -129,6 +289,14 @@
 OUTPUT_SSTL18_I F1B4 F2B4
 OUTPUT_SSTL18_II F1B4 F2B4
 
+.config_enum PIOA.DATAMUX_MDDR PADDO
+IOLDO F6B3 F7B3
+PADDO -
+
+.config_enum PIOA.DATAMUX_ODDR PADDO
+IOLDO F6B3
+PADDO -
+
 .config_enum PIOB.BASE_TYPE INPUT_HSUL12
 BIDIR_HSUL12 F3B9 F4B9
 BIDIR_LVCMOS12 F3B9 F4B9
@@ -171,6 +339,14 @@
 OUTPUT_SSTL18_I F3B9 F4B9
 OUTPUT_SSTL18_II F3B9 F4B9
 
+.config_enum PIOB.DATAMUX_MDDR PADDO
+IOLDO F8B8 F9B8
+PADDO -
+
+.config_enum PIOB.DATAMUX_ODDR PADDO
+IOLDO F8B8
+PADDO -
+
 
 # Fixed Connections
 .fixed_conn DDRDEL_DQS DDRDEL
diff --git a/ECP5/tiledata/PICL2/bits.db b/ECP5/tiledata/PICL2/bits.db
index 4409a50..968bee7 100644
--- a/ECP5/tiledata/PICL2/bits.db
+++ b/ECP5/tiledata/PICL2/bits.db
@@ -255,6 +255,14 @@
 OUTPUT_SSTL18_I F1B4 F2B4
 OUTPUT_SSTL18_II F1B4 F2B4
 
+.config_enum PIOC.DATAMUX_MDDR PADDO
+IOLDO F6B3 F7B3
+PADDO -
+
+.config_enum PIOC.DATAMUX_ODDR PADDO
+IOLDO F6B3
+PADDO -
+
 .config_enum PIOD.BASE_TYPE INPUT_HSUL12
 BIDIR_HSUL12 F4B9 F5B9
 BIDIR_LVCMOS12 F4B9 F5B9
@@ -297,5 +305,13 @@
 OUTPUT_SSTL18_I F4B9 F5B9
 OUTPUT_SSTL18_II F4B9 F5B9
 
+.config_enum PIOD.DATAMUX_MDDR PADDO
+IOLDO F0B9 F9B8
+PADDO -
+
+.config_enum PIOD.DATAMUX_ODDR PADDO
+IOLDO F9B8
+PADDO -
+
 
 # Fixed Connections
diff --git a/ECP5/tiledata/PICL2_DQS1/bits.db b/ECP5/tiledata/PICL2_DQS1/bits.db
index dbbb3ee..69b40a3 100644
--- a/ECP5/tiledata/PICL2_DQS1/bits.db
+++ b/ECP5/tiledata/PICL2_DQS1/bits.db
@@ -23,6 +23,24 @@
 F4B11
 F5B11
 
+.config IOLOGICC.DELAY.DEL_VALUE 0000000
+F0B1
+F9B0
+F8B0
+F7B0
+F6B0
+F5B0
+F4B0
+
+.config IOLOGICD.DELAY.DEL_VALUE 0000000
+F2B6
+F1B6
+F0B6
+F9B5
+F8B5
+F7B5
+F6B5
+
 .config_enum DQS.DQS_LO_DEL_ADJ PLUS
 MINUS F7B11
 PLUS !F7B11
@@ -35,6 +53,148 @@
 NO -
 YES F9B11
 
+.config_enum IOLOGICC.CLKIMUX CLK
+CLK -
+INV F7B1
+
+.config_enum IOLOGICC.CLKOMUX CLK
+CLK -
+INV F0B3
+
+.config_enum IOLOGICC.DELAY.OUTDEL DISABLED
+DISABLED -
+ENABLED F1B3
+
+.config_enum IOLOGICC.DELAY.WAIT_FOR_EDGE DISABLED
+DISABLED -
+ENABLED F6B2
+
+.config_enum IOLOGICC.GSR ENABLED
+DISABLED F2B1
+ENABLED -
+
+.config_enum IOLOGICC.IDDRXN.MODE NONE
+IDDR71 F1B2 F2B2 F3B7 F4B7
+IDDRX2 F1B2
+NONE -
+
+.config_enum IOLOGICC.LSRIMUX 0
+0 -
+LSRMUX F9B1
+
+.config_enum IOLOGICC.LSRMUX INV
+INV -
+LSR F4B2
+
+.config_enum IOLOGICC.LSROMUX 0
+0 -
+LSRMUX F2B3
+
+.config_enum IOLOGICC.MIDDRX.MODE NONE
+MIDDRX2 F1B2 F6B10
+NONE -
+
+.config_enum IOLOGICC.MIDDRX_MODDRX.WRCLKMUX DQSW
+DQSW -
+DQSW270 F8B4
+
+.config_enum IOLOGICC.MODDRX.MODE NONE
+MODDRX2 F8B3
+MOSHX2 F8B4 F9B3
+NONE -
+
+.config_enum IOLOGICC.MODE NONE
+IDDRX1_ODDRX1 F0B5 F2B2 F6B1 F8B2 F9B2 F9B4
+IDDRXN F0B5 F6B1 F8B2 F9B2 F9B4
+IREG_OREG F6B1 F9B2 F9B4
+MIDDRX_MODDRX F0B5 F3B3 F6B1 F8B2 F9B2 F9B4
+NONE -
+ODDRXN F0B5 F6B1 F6B3 F7B3 F8B2 F9B2 F9B4
+
+.config_enum IOLOGICC.MTDDRX.DQSW_INVERT DISABLED
+DISABLED -
+ENABLED F0B4
+
+.config_enum IOLOGICC.MTDDRX.MODE NONE
+MTSHX2 F0B4 F3B4 F8B3
+NONE -
+
+.config_enum IOLOGICC.ODDRXN.MODE NONE
+NONE -
+ODDR71 F0B9 F1B9 F2B9 F8B3 F8B4 F9B3 F9B8
+ODDRX2 F8B3 F8B4
+
+.config_enum IOLOGICD.CLKIMUX CLK
+CLK -
+INV F9B6
+
+.config_enum IOLOGICD.CLKOMUX CLK
+CLK -
+INV F2B8
+
+.config_enum IOLOGICD.DELAY.OUTDEL DISABLED
+DISABLED -
+ENABLED F3B8
+
+.config_enum IOLOGICD.DELAY.WAIT_FOR_EDGE DISABLED
+DISABLED -
+ENABLED F8B7
+
+.config_enum IOLOGICD.GSR ENABLED
+DISABLED F4B6
+ENABLED -
+
+.config_enum IOLOGICD.IDDRXN.MODE NONE
+IDDR71 F3B7 F4B7
+IDDRX2 F3B7
+NONE -
+
+.config_enum IOLOGICD.LSRIMUX 0
+0 -
+LSRMUX F1B7
+
+.config_enum IOLOGICD.LSRMUX INV
+INV -
+LSR F6B7
+
+.config_enum IOLOGICD.LSROMUX 0
+0 -
+LSRMUX F4B8
+
+.config_enum IOLOGICD.MIDDRX.MODE NONE
+MIDDRX2 F3B7 F7B10
+NONE -
+
+.config_enum IOLOGICD.MIDDRX_MODDRX.WRCLKMUX DQSW
+DQSW -
+DQSW270 F1B10
+
+.config_enum IOLOGICD.MODDRX.MODE NONE
+MODDRX2 F1B9
+MOSHX2 F1B10 F2B9
+NONE -
+
+.config_enum IOLOGICD.MODE NONE
+IDDRX1_ODDRX1 F0B8 F1B8 F2B10 F3B10 F4B7 F8B6
+IDDRXN F0B8 F1B8 F2B10 F3B10 F8B6
+IREG_OREG F1B8 F2B10 F8B6
+MIDDRX_MODDRX F0B8 F1B8 F2B10 F3B10 F5B6 F8B6
+NONE -
+ODDRXN F0B8 F0B9 F1B8 F2B10 F3B10 F8B6 F9B8
+
+.config_enum IOLOGICD.MTDDRX.DQSW_INVERT DISABLED
+DISABLED -
+ENABLED F3B9
+
+.config_enum IOLOGICD.MTDDRX.MODE NONE
+MTSHX2 F1B9 F3B9 F6B9
+NONE -
+
+.config_enum IOLOGICD.ODDRXN.MODE NONE
+NONE -
+ODDR71 F1B9 F1B10 F2B9
+ODDRX2 F1B9 F1B10
+
 .config_enum PIOC.BASE_TYPE INPUT_LVCMOS18D
 BIDIR_BLVDS25E F1B1 F1B4 F2B4 F3B6 F4B9 F5B9
 BIDIR_HSUL12 F1B4 F2B4
@@ -117,6 +277,14 @@
 OUTPUT_SSTL18_I F1B4 F2B4
 OUTPUT_SSTL18_II F1B4 F2B4
 
+.config_enum PIOC.DATAMUX_MDDR PADDO
+IOLDO F6B3 F7B3
+PADDO -
+
+.config_enum PIOC.DATAMUX_ODDR PADDO
+IOLDO F6B3
+PADDO -
+
 .config_enum PIOD.BASE_TYPE INPUT_HSUL12
 BIDIR_HSUL12 F4B9 F5B9
 BIDIR_LVCMOS12 F4B9 F5B9
@@ -159,5 +327,13 @@
 OUTPUT_SSTL18_I F4B9 F5B9
 OUTPUT_SSTL18_II F4B9 F5B9
 
+.config_enum PIOD.DATAMUX_MDDR PADDO
+IOLDO F0B9 F9B8
+PADDO -
+
+.config_enum PIOD.DATAMUX_ODDR PADDO
+IOLDO F9B8
+PADDO -
+
 
 # Fixed Connections
diff --git a/ECP5/tiledata/PICR0/bits.db b/ECP5/tiledata/PICR0/bits.db
index 841f772..fc1f76f 100644
--- a/ECP5/tiledata/PICR0/bits.db
+++ b/ECP5/tiledata/PICR0/bits.db
@@ -263,6 +263,14 @@
 OUTPUT_SSTL18_I F7B4 F8B4
 OUTPUT_SSTL18_II F7B4 F8B4
 
+.config_enum PIOA.DATAMUX_MDDR PADDO
+IOLDO F2B3 F3B3
+PADDO -
+
+.config_enum PIOA.DATAMUX_ODDR PADDO
+IOLDO F3B3
+PADDO -
+
 .config_enum PIOB.BASE_TYPE INPUT_HSUL12
 BIDIR_HSUL12 F5B9 F6B9
 BIDIR_LVCMOS12 F5B9 F6B9
@@ -305,6 +313,14 @@
 OUTPUT_SSTL18_I F5B9 F6B9
 OUTPUT_SSTL18_II F5B9 F6B9
 
+.config_enum PIOB.DATAMUX_MDDR PADDO
+IOLDO F0B8 F1B8
+PADDO -
+
+.config_enum PIOB.DATAMUX_ODDR PADDO
+IOLDO F1B8
+PADDO -
+
 
 # Fixed Connections
 .fixed_conn DIA_IOLOGIC JDIA
diff --git a/ECP5/tiledata/PICR0_DQS2/bits.db b/ECP5/tiledata/PICR0_DQS2/bits.db
index b25177d..bc1cb0f 100644
--- a/ECP5/tiledata/PICR0_DQS2/bits.db
+++ b/ECP5/tiledata/PICR0_DQS2/bits.db
@@ -289,6 +289,14 @@
 OUTPUT_SSTL18_I F7B4 F8B4
 OUTPUT_SSTL18_II F7B4 F8B4
 
+.config_enum PIOA.DATAMUX_MDDR PADDO
+IOLDO F2B3 F3B3
+PADDO -
+
+.config_enum PIOA.DATAMUX_ODDR PADDO
+IOLDO F3B3
+PADDO -
+
 .config_enum PIOB.BASE_TYPE INPUT_HSUL12
 BIDIR_HSUL12 F5B9 F6B9
 BIDIR_LVCMOS12 F5B9 F6B9
@@ -331,6 +339,14 @@
 OUTPUT_SSTL18_I F5B9 F6B9
 OUTPUT_SSTL18_II F5B9 F6B9
 
+.config_enum PIOB.DATAMUX_MDDR PADDO
+IOLDO F0B8 F1B8
+PADDO -
+
+.config_enum PIOB.DATAMUX_ODDR PADDO
+IOLDO F1B8
+PADDO -
+
 
 # Fixed Connections
 .fixed_conn DDRDEL_DQS DDRDEL
diff --git a/ECP5/tiledata/PICR2/bits.db b/ECP5/tiledata/PICR2/bits.db
index 0527f3c..1cbe8b2 100644
--- a/ECP5/tiledata/PICR2/bits.db
+++ b/ECP5/tiledata/PICR2/bits.db
@@ -255,6 +255,14 @@
 OUTPUT_SSTL18_I F7B4 F8B4
 OUTPUT_SSTL18_II F7B4 F8B4
 
+.config_enum PIOC.DATAMUX_MDDR PADDO
+IOLDO F2B3 F3B3
+PADDO -
+
+.config_enum PIOC.DATAMUX_ODDR PADDO
+IOLDO F3B3
+PADDO -
+
 .config_enum PIOD.BASE_TYPE INPUT_HSUL12
 BIDIR_HSUL12 F4B9 F5B9
 BIDIR_LVCMOS12 F4B9 F5B9
@@ -297,5 +305,13 @@
 OUTPUT_SSTL18_I F4B9 F5B9
 OUTPUT_SSTL18_II F4B9 F5B9
 
+.config_enum PIOD.DATAMUX_MDDR PADDO
+IOLDO F0B8 F9B9
+PADDO -
+
+.config_enum PIOD.DATAMUX_ODDR PADDO
+IOLDO F0B8
+PADDO -
+
 
 # Fixed Connections
diff --git a/ECP5/tiledata/PICR2_DQS1/bits.db b/ECP5/tiledata/PICR2_DQS1/bits.db
index fea2870..7c80eee 100644
--- a/ECP5/tiledata/PICR2_DQS1/bits.db
+++ b/ECP5/tiledata/PICR2_DQS1/bits.db
@@ -277,6 +277,14 @@
 OUTPUT_SSTL18_I F7B4 F8B4
 OUTPUT_SSTL18_II F7B4 F8B4
 
+.config_enum PIOC.DATAMUX_MDDR PADDO
+IOLDO F2B3 F3B3
+PADDO -
+
+.config_enum PIOC.DATAMUX_ODDR PADDO
+IOLDO F3B3
+PADDO -
+
 .config_enum PIOD.BASE_TYPE INPUT_HSUL12
 BIDIR_HSUL12 F4B9 F5B9
 BIDIR_LVCMOS12 F4B9 F5B9
@@ -319,5 +327,13 @@
 OUTPUT_SSTL18_I F4B9 F5B9
 OUTPUT_SSTL18_II F4B9 F5B9
 
+.config_enum PIOD.DATAMUX_MDDR PADDO
+IOLDO F0B8 F9B9
+PADDO -
+
+.config_enum PIOD.DATAMUX_ODDR PADDO
+IOLDO F0B8
+PADDO -
+
 
 # Fixed Connections
diff --git a/ECP5/tiledata/PICT0/bits.db b/ECP5/tiledata/PICT0/bits.db
index 0bf2c3e..e12453e 100644
--- a/ECP5/tiledata/PICT0/bits.db
+++ b/ECP5/tiledata/PICT0/bits.db
@@ -71,5 +71,9 @@
 OUTPUT_LVCMOS33 F54B0 F55B0
 OUTPUT_LVTTL33 F54B0 F55B0
 
+.config_enum PIOA.DATAMUX_ODDR PADDO
+IOLDO F50B0
+PADDO -
+
 
 # Fixed Connections
diff --git a/ECP5/tiledata/PICT1/bits.db b/ECP5/tiledata/PICT1/bits.db
index 8547efe..ccdf36d 100644
--- a/ECP5/tiledata/PICT1/bits.db
+++ b/ECP5/tiledata/PICT1/bits.db
@@ -71,6 +71,10 @@
 OUTPUT_LVCMOS33 F54B0 F55B0
 OUTPUT_LVTTL33 F54B0 F55B0
 
+.config_enum PIOB.DATAMUX_ODDR PADDO
+IOLDO F50B0
+PADDO -
+
 
 # Fixed Connections
 .fixed_conn E1_HL7W0001 E1_JF3