Update to prjtrellis 3e9e42f7b84ae8447e954259b5208802e3314205

Signed-off-by: David Shah <dave@ds0.me>

ECP5/tiledata/EFB0_PICB0/bits.db

diff --git a/ECP5/tiledata/EFB0_PICB0/bits.db b/ECP5/tiledata/EFB0_PICB0/bits.db
index eff9b2e..102ffbc 100644
--- a/ECP5/tiledata/EFB0_PICB0/bits.db
+++ b/ECP5/tiledata/EFB0_PICB0/bits.db
@@ -177,6 +177,22 @@
 FAST F22B1
 SLOW !F22B1
 
+.config_enum SYSCONFIG.BACKGROUND_RECONFIG OFF
+OFF -
+ON F76B1 F86B1 F92B1
+
+.config_enum SYSCONFIG.SLAVE_PARALLEL_PORT DISABLE
+DISABLE -
+ENABLE F42B1
+
+.config_enum SYSCONFIG.TRANSFR OFF
+OFF -
+ON F76B1
+
+.config_enum SYSCONFIG.WAKE_UP 21
+21 F54B1 F56B1
+4 !F54B1 !F56B1
+
 
 # Fixed Connections
 .fixed_conn DIA_SIOLOGIC JDIA

ECP5/tiledata/EFB1_PICB1/bits.db

diff --git a/ECP5/tiledata/EFB1_PICB1/bits.db b/ECP5/tiledata/EFB1_PICB1/bits.db
index 66984b1..41dc4cc 100644
--- a/ECP5/tiledata/EFB1_PICB1/bits.db
+++ b/ECP5/tiledata/EFB1_PICB1/bits.db
@@ -180,6 +180,14 @@
 FAST F22B1
 SLOW !F22B1
 
+.config_enum SYSCONFIG.MASTER_SPI_PORT DISABLE
+DISABLE -
+ENABLE F64B1
+
+.config_enum SYSCONFIG.TRANSFR OFF
+OFF -
+ON F44B1
+
 
 # Fixed Connections
 .fixed_conn N1_JF5 W5_JPADDI_CCLK

ECP5/tiledata/EFB2_PICB0/bits.db

diff --git a/ECP5/tiledata/EFB2_PICB0/bits.db b/ECP5/tiledata/EFB2_PICB0/bits.db
index 7c4718b..347310a 100644
--- a/ECP5/tiledata/EFB2_PICB0/bits.db
+++ b/ECP5/tiledata/EFB2_PICB0/bits.db
@@ -49,6 +49,14 @@
 FAST F22B1
 SLOW !F22B1
 
+.config_enum SYSCONFIG.DONE_EX OFF
+OFF -
+ON F98B1
+
+.config_enum SYSCONFIG.SLAVE_SPI_PORT DISABLE
+DISABLE -
+ENABLE F94B1 F96B1
+
 
 # Fixed Connections
 .fixed_conn DIA_SIOLOGIC JDIA