Update to prjtrellis 36eccdb773feba12f6e6d73d9fb56c8f41a80dde

Signed-off-by: David Shah <davey1576@gmail.com>

ECP5/tiledata/PICL0/bits.db

diff --git a/ECP5/tiledata/PICL0/bits.db b/ECP5/tiledata/PICL0/bits.db
index 78412f9..27ad8d3 100644
--- a/ECP5/tiledata/PICL0/bits.db
+++ b/ECP5/tiledata/PICL0/bits.db
@@ -17,6 +17,24 @@
 
 
 # Non-Routing Configuration
+.config IOLOGICA.DELAY.DEL_VALUE 0000000
+F0B1
+F9B0
+F8B0
+F7B0
+F6B0
+F5B0
+F4B0
+
+.config IOLOGICB.DELAY.DEL_VALUE 0000000
+F2B6
+F1B6
+F0B6
+F9B5
+F8B5
+F7B5
+F6B5
+
 .config_enum IOLOGICA.CLKIMUX CLK
 CLK -
 INV F7B1
@@ -25,6 +43,14 @@
 CLK -
 INV F0B3
 
+.config_enum IOLOGICA.DELAY.OUTDEL DISABLED
+DISABLED -
+ENABLED F1B3
+
+.config_enum IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED
+DISABLED -
+ENABLED F6B2
+
 .config_enum IOLOGICA.GSR ENABLED
 DISABLED F2B1
 ENABLED -
@@ -86,6 +112,14 @@
 CLK -
 INV F2B8
 
+.config_enum IOLOGICB.DELAY.OUTDEL DISABLED
+DISABLED -
+ENABLED F3B8
+
+.config_enum IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED
+DISABLED -
+ENABLED F8B7
+
 .config_enum IOLOGICB.GSR ENABLED
 DISABLED F4B6
 ENABLED -

ECP5/tiledata/PICL2/bits.db

diff --git a/ECP5/tiledata/PICL2/bits.db b/ECP5/tiledata/PICL2/bits.db
index 7465ef2..c684984 100644
--- a/ECP5/tiledata/PICL2/bits.db
+++ b/ECP5/tiledata/PICL2/bits.db
@@ -13,6 +13,24 @@
 
 
 # Non-Routing Configuration
+.config IOLOGICC.DELAY.DEL_VALUE 0000000
+F0B1
+F9B0
+F8B0
+F7B0
+F6B0
+F5B0
+F4B0
+
+.config IOLOGICD.DELAY.DEL_VALUE 0000000
+F2B6
+F1B6
+F0B6
+F9B5
+F8B5
+F7B5
+F6B5
+
 .config_enum IOLOGICC.CLKIMUX CLK
 CLK -
 INV F7B1
@@ -21,6 +39,14 @@
 CLK -
 INV F0B3
 
+.config_enum IOLOGICC.DELAY.OUTDEL DISABLED
+DISABLED -
+ENABLED F1B3
+
+.config_enum IOLOGICC.DELAY.WAIT_FOR_EDGE DISABLED
+DISABLED -
+ENABLED F6B2
+
 .config_enum IOLOGICC.GSR ENABLED
 DISABLED F2B1
 ENABLED -
@@ -82,6 +108,14 @@
 CLK -
 INV F2B8
 
+.config_enum IOLOGICD.DELAY.OUTDEL DISABLED
+DISABLED -
+ENABLED F3B8
+
+.config_enum IOLOGICD.DELAY.WAIT_FOR_EDGE DISABLED
+DISABLED -
+ENABLED F8B7
+
 .config_enum IOLOGICD.GSR ENABLED
 DISABLED F4B6
 ENABLED -

ECP5/tiledata/PICR0/bits.db

diff --git a/ECP5/tiledata/PICR0/bits.db b/ECP5/tiledata/PICR0/bits.db
index 918697b..a61ed80 100644
--- a/ECP5/tiledata/PICR0/bits.db
+++ b/ECP5/tiledata/PICR0/bits.db
@@ -17,6 +17,24 @@
 
 
 # Non-Routing Configuration
+.config IOLOGICA.DELAY.DEL_VALUE 0000000
+F9B1
+F0B0
+F1B0
+F2B0
+F3B0
+F4B0
+F5B0
+
+.config IOLOGICB.DELAY.DEL_VALUE 0000000
+F7B6
+F8B6
+F9B6
+F0B5
+F1B5
+F2B5
+F3B5
+
 .config_enum IOLOGICA.CLKIMUX CLK
 CLK -
 INV F2B1
@@ -25,6 +43,14 @@
 CLK -
 INV F9B3
 
+.config_enum IOLOGICA.DELAY.OUTDEL DISABLED
+DISABLED -
+ENABLED F8B3
+
+.config_enum IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED
+DISABLED -
+ENABLED F3B2
+
 .config_enum IOLOGICA.GSR ENABLED
 DISABLED F7B1
 ENABLED -
@@ -86,6 +112,14 @@
 CLK -
 INV F7B8
 
+.config_enum IOLOGICB.DELAY.OUTDEL DISABLED
+DISABLED -
+ENABLED F6B8
+
+.config_enum IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED
+DISABLED -
+ENABLED F1B7
+
 .config_enum IOLOGICB.GSR ENABLED
 DISABLED F5B6
 ENABLED -

ECP5/tiledata/PICR2/bits.db

diff --git a/ECP5/tiledata/PICR2/bits.db b/ECP5/tiledata/PICR2/bits.db
index c222fdf..5b5c180 100644
--- a/ECP5/tiledata/PICR2/bits.db
+++ b/ECP5/tiledata/PICR2/bits.db
@@ -13,6 +13,24 @@
 
 
 # Non-Routing Configuration
+.config IOLOGICC.DELAY.DEL_VALUE 0000000
+F9B1
+F0B0
+F1B0
+F2B0
+F3B0
+F4B0
+F5B0
+
+.config IOLOGICD.DELAY.DEL_VALUE 0000000
+F7B6
+F8B6
+F9B6
+F0B5
+F1B5
+F2B5
+F3B5
+
 .config_enum IOLOGICC.CLKIMUX CLK
 CLK -
 INV F2B1
@@ -21,6 +39,14 @@
 CLK -
 INV F9B3
 
+.config_enum IOLOGICC.DELAY.OUTDEL DISABLED
+DISABLED -
+ENABLED F8B3
+
+.config_enum IOLOGICC.DELAY.WAIT_FOR_EDGE DISABLED
+DISABLED -
+ENABLED F3B2
+
 .config_enum IOLOGICC.GSR ENABLED
 DISABLED F7B1
 ENABLED -
@@ -82,6 +108,14 @@
 CLK -
 INV F7B8
 
+.config_enum IOLOGICD.DELAY.OUTDEL DISABLED
+DISABLED -
+ENABLED F6B8
+
+.config_enum IOLOGICD.DELAY.WAIT_FOR_EDGE DISABLED
+DISABLED -
+ENABLED F1B7
+
 .config_enum IOLOGICD.GSR ENABLED
 DISABLED F5B6
 ENABLED -

ECP5/tiledata/PICT0/bits.db

diff --git a/ECP5/tiledata/PICT0/bits.db b/ECP5/tiledata/PICT0/bits.db
index ec716b5..0bf2c3e 100644
--- a/ECP5/tiledata/PICT0/bits.db
+++ b/ECP5/tiledata/PICT0/bits.db
@@ -4,6 +4,15 @@
 
 
 # Non-Routing Configuration
+.config IOLOGICA.DELAY.DEL_VALUE 0000000
+F10B0
+F9B0
+F8B0
+F7B0
+F6B0
+F5B0
+F4B0
+
 .config_enum IOLOGICA.CLKIMUX CLK
 CLK -
 INV F20B0
@@ -12,6 +21,14 @@
 CLK -
 INV F43B0
 
+.config_enum IOLOGICA.DELAY.OUTDEL DISABLED
+DISABLED -
+ENABLED F44B0
+
+.config_enum IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED
+DISABLED -
+ENABLED F39B0
+
 .config_enum IOLOGICA.GSR ENABLED
 DISABLED F12B0
 ENABLED -

ECP5/tiledata/PICT1/bits.db

diff --git a/ECP5/tiledata/PICT1/bits.db b/ECP5/tiledata/PICT1/bits.db
index 409037f..8547efe 100644
--- a/ECP5/tiledata/PICT1/bits.db
+++ b/ECP5/tiledata/PICT1/bits.db
@@ -4,6 +4,15 @@
 
 
 # Non-Routing Configuration
+.config IOLOGICB.DELAY.DEL_VALUE 0000000
+F10B0
+F9B0
+F8B0
+F7B0
+F6B0
+F5B0
+F4B0
+
 .config_enum IOLOGICB.CLKIMUX CLK
 CLK -
 INV F20B0
@@ -12,6 +21,14 @@
 CLK -
 INV F43B0
 
+.config_enum IOLOGICB.DELAY.OUTDEL DISABLED
+DISABLED -
+ENABLED F44B0
+
+.config_enum IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED
+DISABLED -
+ENABLED F39B0
+
 .config_enum IOLOGICB.GSR ENABLED
 DISABLED F12B0
 ENABLED -