Update to prjtrellis f0b32e6dd0f4afb402f8eaeb83f39632f6ab6f3b
Signed-off-by: David Shah <davey1576@gmail.com>
diff --git a/ECP5/tiledata/BANKREF8/bits.db b/ECP5/tiledata/BANKREF8/bits.db
index bcfc3b7..e1c6da9 100644
--- a/ECP5/tiledata/BANKREF8/bits.db
+++ b/ECP5/tiledata/BANKREF8/bits.db
@@ -13,5 +13,129 @@
# Non-Routing Configuration
+.config CLKOP_DIV 0000000
+F43B0
+F44B0
+F45B0
+F46B0
+F47B0
+F48B0
+F49B0
+
+.config CLKOS2_CPHASE 0000001
+-
+F30B0
+F31B0
+F32B0
+F33B0
+F34B0
+F35B0
+
+.config CLKOS2_DIV 0000000
+F59B0
+F60B0
+F61B0
+F62B0
+F63B0
+F64B0
+F65B0
+
+.config CLKOS3_CPHASE 0000000
+F36B0
+F37B0
+F38B0
+F39B0
+F40B0
+F41B0
+F42B0
+
+.config CLKOS3_DIV 0000000
+F66B0
+F67B0
+F68B0
+F69B0
+F70B0
+F71B0
+F72B0
+
+.config CLKOS_DIV 0000000
+F50B0
+F51B0
+F54B0
+F55B0
+F56B0
+F57B0
+F58B0
+
+.config MFG1_TEST 000
+F86B0
+F87B0
+F88B0
+
+.config MFG2_TEST 000
+F83B0
+F84B0
+F85B0
+
+.config_enum CLKOP_ENABLE DISABLED
+DISABLED !F77B0
+ENABLED F77B0
+
+.config_enum CLKOP_TRIM_DELAY 0
+0 !F90B0 !F91B0 !F92B0 !F93B0 !F94B0
+1 F90B0 F91B0 F92B0 !F93B0 !F94B0
+2 F90B0 F91B0 !F92B0 F93B0 !F94B0
+4 F90B0 F91B0 !F92B0 !F93B0 F94B0
+
+.config_enum CLKOP_TRIM_POL FALLING
+FALLING !F95B0
+RISING F95B0
+
+.config_enum CLKOS2_ENABLE DISABLED
+DISABLED !F79B0
+ENABLED F79B0
+
+.config_enum CLKOS3_ENABLE DISABLED
+DISABLED !F80B0
+ENABLED F80B0
+
+.config_enum CLKOS_ENABLE DISABLED
+DISABLED !F78B0
+ENABLED F78B0
+
+.config_enum CLKOS_TRIM_DELAY 0
+0 !F91B0 !F96B0 !F97B0 !F98B0
+1 F91B0 F96B0 !F97B0 !F98B0
+2 F91B0 !F96B0 F97B0 !F98B0
+4 F91B0 !F96B0 !F97B0 F98B0
+
+.config_enum CLKOS_TRIM_POL FALLING
+FALLING !F99B0
+RISING F99B0
+
+.config_enum DPHASE_SOURCE DISABLED
+DISABLED !F82B0
+ENABLED F82B0
+
+.config_enum OUTDIVIDER_MUXA DIVA
+DIVA !F73B0
+REFCLK F73B0
+
+.config_enum OUTDIVIDER_MUXB DIVB
+DIVB !F74B0
+REFCLK F74B0
+
+.config_enum OUTDIVIDER_MUXC DIVC
+DIVC !F75B0
+REFCLK F75B0
+
+.config_enum OUTDIVIDER_MUXD DIVD
+DIVD !F76B0
+REFCLK F76B0
+
+.config_enum SYNC_ENABLE DISABLED
+DISABLED !F81B0
+ENABLED F81B0
+
# Fixed Connections
diff --git a/ECP5/tiledata/PLL0_LL/bits.db b/ECP5/tiledata/PLL0_LL/bits.db
index 54184fb..a26fc62 100644
--- a/ECP5/tiledata/PLL0_LL/bits.db
+++ b/ECP5/tiledata/PLL0_LL/bits.db
@@ -31,6 +31,184 @@
# Non-Routing Configuration
+.config CLKFB_DIV 0000000
+F24B0
+F25B0
+F26B0
+F27B0
+F28B0
+F29B0
+F30B0
+
+.config CLKI_DIV 0000000
+F17B0
+F18B0
+F19B0
+F20B0
+F21B0
+F22B0
+F23B0
+
+.config CLKOP_CPHASE 0000000
+F87B0
+F88B0
+F89B0
+F90B0
+F91B0
+F92B0
+F93B0
+
+.config CLKOP_FPHASE 000
+F75B0
+F76B0
+F77B0
+
+.config CLKOS2_CPHASE 1111110
+F101B0
+-
+-
+-
+-
+-
+-
+
+.config CLKOS2_FPHASE 000
+F81B0
+F82B0
+F83B0
+
+.config CLKOS3_FPHASE 000
+F84B0
+F85B0
+F86B0
+
+.config CLKOS_CPHASE 0000000
+F94B0
+F95B0
+F96B0
+F97B0
+F98B0
+F99B0
+F100B0
+
+.config CLKOS_FPHASE 000
+F78B0
+F79B0
+F80B0
+
+.config FREQ_LOCK_ACCURACY 00
+F35B0
+F36B0
+
+.config ICP_CURRENT 00000
+F46B0
+F47B0
+F48B0
+F49B0
+F50B0
+
+.config KVCO 000
+F51B0
+F54B0
+F55B0
+
+.config LPF_CAPACITOR 00
+F44B0
+F45B0
+
+.config LPF_RESISTOR 0000000
+F37B0
+F38B0
+F39B0
+F40B0
+F41B0
+F42B0
+F43B0
+
+.config MFG_ENABLE_FILTEROPAMP 0
+F74B0
+
+.config MFG_EN_UP 0
+F70B0
+
+.config MFG_FLOAT_ICP 0
+F68B0
+
+.config MFG_FORCE_VFILTER 0
+F69B0
+
+.config MFG_GMCREF_SEL 00
+F72B0
+F73B0
+
+.config MFG_GMC_GAIN 000
+F56B0
+F57B0
+F58B0
+
+.config MFG_GMC_PRESET 0
+F63B0
+
+.config MFG_GMC_RESET 0
+F64B0
+
+.config MFG_GMC_TEST 0000
+F59B0
+F60B0
+F61B0
+F62B0
+
+.config MFG_ICP_TEST 0
+F71B0
+
+.config MFG_LF_PRESET 0
+F65B0
+
+.config MFG_LF_RESET 0
+F66B0
+
+.config MFG_LF_RESGRND 0
+F67B0
+
+.config PLL_LOCK_MODE 00
+F32B0
+F33B0
+
+.config_enum FEEDBK_PATH USERCLOCK
+CLKOP -
+CLKOS -
+CLKOS2 -
+CLKOS3 -
+INT_OP F12B0 F13B0 F14B0
+INT_OS F11B0 F13B0 F14B0 F15B0
+INT_OS2 F13B0 F14B0 F16B0
+INT_OS3 F11B0 F12B0 F14B0 F15B0 F16B0
+USERCLOCK -
+
+.config_enum INTFB_WAKE DISABLED
+DISABLED !F4B0
+ENABLED F4B0
+
+.config_enum INT_LOCK_STICKY DISABLED
+DISABLED !F31B0
+ENABLED F31B0
+
+.config_enum MODE NONE
+EHXPLLL F0B0
+NONE !F0B0
+
+.config_enum PLLRST_ENA DISABLED
+DISABLED !F2B0
+ENABLED F2B0
+
+.config_enum REFIN_RESET DISABLED
+DISABLED !F1B0
+ENABLED F1B0
+
+.config_enum STDBY_ENABLE DISABLED
+DISABLED !F3B0
+ENABLED F3B0
+
# Fixed Connections
.fixed_conn G_JLLCPLL0CLKOP N1_JCLKOP_PLL
diff --git a/ECP5/tiledata/PLL0_LR/bits.db b/ECP5/tiledata/PLL0_LR/bits.db
index 6788299..eaa4a82 100644
--- a/ECP5/tiledata/PLL0_LR/bits.db
+++ b/ECP5/tiledata/PLL0_LR/bits.db
@@ -31,6 +31,184 @@
# Non-Routing Configuration
+.config CLKFB_DIV 0000000
+F24B0
+F25B0
+F26B0
+F27B0
+F28B0
+F29B0
+F30B0
+
+.config CLKI_DIV 0000000
+F17B0
+F18B0
+F19B0
+F20B0
+F21B0
+F22B0
+F23B0
+
+.config CLKOP_CPHASE 0000000
+F87B0
+F88B0
+F89B0
+F90B0
+F91B0
+F92B0
+F93B0
+
+.config CLKOP_FPHASE 000
+F75B0
+F76B0
+F77B0
+
+.config CLKOS2_CPHASE 1111110
+F101B0
+-
+-
+-
+-
+-
+-
+
+.config CLKOS2_FPHASE 000
+F81B0
+F82B0
+F83B0
+
+.config CLKOS3_FPHASE 000
+F84B0
+F85B0
+F86B0
+
+.config CLKOS_CPHASE 0000000
+F94B0
+F95B0
+F96B0
+F97B0
+F98B0
+F99B0
+F100B0
+
+.config CLKOS_FPHASE 000
+F78B0
+F79B0
+F80B0
+
+.config FREQ_LOCK_ACCURACY 00
+F35B0
+F36B0
+
+.config ICP_CURRENT 00000
+F46B0
+F47B0
+F48B0
+F49B0
+F50B0
+
+.config KVCO 000
+F51B0
+F54B0
+F55B0
+
+.config LPF_CAPACITOR 00
+F44B0
+F45B0
+
+.config LPF_RESISTOR 0000000
+F37B0
+F38B0
+F39B0
+F40B0
+F41B0
+F42B0
+F43B0
+
+.config MFG_ENABLE_FILTEROPAMP 0
+F74B0
+
+.config MFG_EN_UP 0
+F70B0
+
+.config MFG_FLOAT_ICP 0
+F68B0
+
+.config MFG_FORCE_VFILTER 0
+F69B0
+
+.config MFG_GMCREF_SEL 00
+F72B0
+F73B0
+
+.config MFG_GMC_GAIN 000
+F56B0
+F57B0
+F58B0
+
+.config MFG_GMC_PRESET 0
+F63B0
+
+.config MFG_GMC_RESET 0
+F64B0
+
+.config MFG_GMC_TEST 0000
+F59B0
+F60B0
+F61B0
+F62B0
+
+.config MFG_ICP_TEST 0
+F71B0
+
+.config MFG_LF_PRESET 0
+F65B0
+
+.config MFG_LF_RESET 0
+F66B0
+
+.config MFG_LF_RESGRND 0
+F67B0
+
+.config PLL_LOCK_MODE 00
+F32B0
+F33B0
+
+.config_enum FEEDBK_PATH USERCLOCK
+CLKOP -
+CLKOS -
+CLKOS2 -
+CLKOS3 -
+INT_OP F12B0 F13B0 F14B0
+INT_OS F11B0 F13B0 F14B0 F15B0
+INT_OS2 F13B0 F14B0 F16B0
+INT_OS3 F11B0 F12B0 F14B0 F15B0 F16B0
+USERCLOCK -
+
+.config_enum INTFB_WAKE DISABLED
+DISABLED !F4B0
+ENABLED F4B0
+
+.config_enum INT_LOCK_STICKY DISABLED
+DISABLED !F31B0
+ENABLED F31B0
+
+.config_enum MODE NONE
+EHXPLLL F0B0
+NONE !F0B0
+
+.config_enum PLLRST_ENA DISABLED
+DISABLED !F2B0
+ENABLED F2B0
+
+.config_enum REFIN_RESET DISABLED
+DISABLED !F1B0
+ENABLED F1B0
+
+.config_enum STDBY_ENABLE DISABLED
+DISABLED !F3B0
+ENABLED F3B0
+
# Fixed Connections
.fixed_conn G_JLRCPLL0CLKOP N1_JCLKOP_PLL
diff --git a/ECP5/tiledata/PLL0_UL/bits.db b/ECP5/tiledata/PLL0_UL/bits.db
index 5c5ecf3..0b6333d 100644
--- a/ECP5/tiledata/PLL0_UL/bits.db
+++ b/ECP5/tiledata/PLL0_UL/bits.db
@@ -25,6 +25,184 @@
# Non-Routing Configuration
+.config CLKFB_DIV 0000000
+F4B2
+F5B2
+F6B2
+F7B2
+F8B2
+F9B2
+F0B3
+
+.config CLKI_DIV 0000000
+F7B1
+F8B1
+F9B1
+F0B2
+F1B2
+F2B2
+F3B2
+
+.config CLKOP_CPHASE 0000000
+F7B8
+F8B8
+F9B8
+F0B9
+F1B9
+F2B9
+F3B9
+
+.config CLKOP_FPHASE 000
+F5B7
+F6B7
+F7B7
+
+.config CLKOS2_CPHASE 1111110
+F1B10
+-
+-
+-
+-
+-
+-
+
+.config CLKOS2_FPHASE 000
+F1B8
+F2B8
+F3B8
+
+.config CLKOS3_FPHASE 000
+F4B8
+F5B8
+F6B8
+
+.config CLKOS_CPHASE 0000000
+F4B9
+F5B9
+F6B9
+F7B9
+F8B9
+F9B9
+F0B10
+
+.config CLKOS_FPHASE 000
+F8B7
+F9B7
+F0B8
+
+.config FREQ_LOCK_ACCURACY 00
+F5B3
+F6B3
+
+.config ICP_CURRENT 00000
+F6B4
+F7B4
+F8B4
+F9B4
+F0B5
+
+.config KVCO 000
+F1B5
+F4B5
+F5B5
+
+.config LPF_CAPACITOR 00
+F4B4
+F5B4
+
+.config LPF_RESISTOR 0000000
+F7B3
+F8B3
+F9B3
+F0B4
+F1B4
+F2B4
+F3B4
+
+.config MFG_ENABLE_FILTEROPAMP 0
+F4B7
+
+.config MFG_EN_UP 0
+F0B7
+
+.config MFG_FLOAT_ICP 0
+F8B6
+
+.config MFG_FORCE_VFILTER 0
+F9B6
+
+.config MFG_GMCREF_SEL 00
+F2B7
+F3B7
+
+.config MFG_GMC_GAIN 000
+F6B5
+F7B5
+F8B5
+
+.config MFG_GMC_PRESET 0
+F3B6
+
+.config MFG_GMC_RESET 0
+F4B6
+
+.config MFG_GMC_TEST 0000
+F9B5
+F0B6
+F1B6
+F2B6
+
+.config MFG_ICP_TEST 0
+F1B7
+
+.config MFG_LF_PRESET 0
+F5B6
+
+.config MFG_LF_RESET 0
+F6B6
+
+.config MFG_LF_RESGRND 0
+F7B6
+
+.config PLL_LOCK_MODE 00
+F2B3
+F3B3
+
+.config_enum FEEDBK_PATH USERCLOCK
+CLKOP -
+CLKOS -
+CLKOS2 -
+CLKOS3 -
+INT_OP F2B1 F3B1 F4B1
+INT_OS F1B1 F3B1 F4B1 F5B1
+INT_OS2 F3B1 F4B1 F6B1
+INT_OS3 F1B1 F2B1 F4B1 F5B1 F6B1
+USERCLOCK -
+
+.config_enum INTFB_WAKE DISABLED
+DISABLED !F4B0
+ENABLED F4B0
+
+.config_enum INT_LOCK_STICKY DISABLED
+DISABLED !F1B3
+ENABLED F1B3
+
+.config_enum MODE NONE
+EHXPLLL F0B0
+NONE !F0B0
+
+.config_enum PLLRST_ENA DISABLED
+DISABLED !F2B0
+ENABLED F2B0
+
+.config_enum REFIN_RESET DISABLED
+DISABLED !F1B0
+ENABLED F1B0
+
+.config_enum STDBY_ENABLE DISABLED
+DISABLED !F3B0
+ENABLED F3B0
+
# Fixed Connections
.fixed_conn E1_CLK0_PLLREFCS E1_REFCLK0
diff --git a/ECP5/tiledata/PLL0_UR/bits.db b/ECP5/tiledata/PLL0_UR/bits.db
index 5e2d083..1829cd1 100644
--- a/ECP5/tiledata/PLL0_UR/bits.db
+++ b/ECP5/tiledata/PLL0_UR/bits.db
@@ -37,6 +37,184 @@
# Non-Routing Configuration
+.config CLKFB_DIV 0000000
+F5B2
+F4B2
+F3B2
+F2B2
+F1B2
+F0B2
+F9B3
+
+.config CLKI_DIV 0000000
+F2B1
+F1B1
+F0B1
+F9B2
+F8B2
+F7B2
+F6B2
+
+.config CLKOP_CPHASE 0000000
+F2B8
+F1B8
+F0B8
+F9B9
+F8B9
+F7B9
+F6B9
+
+.config CLKOP_FPHASE 000
+F4B7
+F3B7
+F2B7
+
+.config CLKOS2_CPHASE 1111110
+F8B10
+-
+-
+-
+-
+-
+-
+
+.config CLKOS2_FPHASE 000
+F8B8
+F7B8
+F6B8
+
+.config CLKOS3_FPHASE 000
+F5B8
+F4B8
+F3B8
+
+.config CLKOS_CPHASE 0000000
+F5B9
+F4B9
+F3B9
+F2B9
+F1B9
+F0B9
+F9B10
+
+.config CLKOS_FPHASE 000
+F1B7
+F0B7
+F9B8
+
+.config FREQ_LOCK_ACCURACY 00
+F4B3
+F3B3
+
+.config ICP_CURRENT 00000
+F3B4
+F2B4
+F1B4
+F0B4
+F9B5
+
+.config KVCO 000
+F8B5
+F5B5
+F4B5
+
+.config LPF_CAPACITOR 00
+F5B4
+F4B4
+
+.config LPF_RESISTOR 0000000
+F2B3
+F1B3
+F0B3
+F9B4
+F8B4
+F7B4
+F6B4
+
+.config MFG_ENABLE_FILTEROPAMP 0
+F5B7
+
+.config MFG_EN_UP 0
+F9B7
+
+.config MFG_FLOAT_ICP 0
+F1B6
+
+.config MFG_FORCE_VFILTER 0
+F0B6
+
+.config MFG_GMCREF_SEL 00
+F7B7
+F6B7
+
+.config MFG_GMC_GAIN 000
+F3B5
+F2B5
+F1B5
+
+.config MFG_GMC_PRESET 0
+F6B6
+
+.config MFG_GMC_RESET 0
+F5B6
+
+.config MFG_GMC_TEST 0000
+F0B5
+F9B6
+F8B6
+F7B6
+
+.config MFG_ICP_TEST 0
+F8B7
+
+.config MFG_LF_PRESET 0
+F4B6
+
+.config MFG_LF_RESET 0
+F3B6
+
+.config MFG_LF_RESGRND 0
+F2B6
+
+.config PLL_LOCK_MODE 00
+F7B3
+F6B3
+
+.config_enum FEEDBK_PATH USERCLOCK
+CLKOP -
+CLKOS -
+CLKOS2 -
+CLKOS3 -
+INT_OP F5B1 F6B1 F7B1
+INT_OS F4B1 F5B1 F6B1 F8B1
+INT_OS2 F3B1 F5B1 F6B1
+INT_OS3 F3B1 F4B1 F5B1 F7B1 F8B1
+USERCLOCK -
+
+.config_enum INTFB_WAKE DISABLED
+DISABLED !F5B0
+ENABLED F5B0
+
+.config_enum INT_LOCK_STICKY DISABLED
+DISABLED !F8B3
+ENABLED F8B3
+
+.config_enum MODE NONE
+EHXPLLL F9B0
+NONE !F9B0
+
+.config_enum PLLRST_ENA DISABLED
+DISABLED !F7B0
+ENABLED F7B0
+
+.config_enum REFIN_RESET DISABLED
+DISABLED !F8B0
+ENABLED F8B0
+
+.config_enum STDBY_ENABLE DISABLED
+DISABLED !F6B0
+ENABLED F6B0
+
# Fixed Connections
.fixed_conn G_JURCPLL0CLKOP W1_JCLKOP_PLL
diff --git a/ECP5/tiledata/PLL1_LR/bits.db b/ECP5/tiledata/PLL1_LR/bits.db
index 129d6ff..6f9bdb9 100644
--- a/ECP5/tiledata/PLL1_LR/bits.db
+++ b/ECP5/tiledata/PLL1_LR/bits.db
@@ -13,5 +13,129 @@
# Non-Routing Configuration
+.config CLKOP_DIV 0000000
+F43B0
+F44B0
+F45B0
+F46B0
+F47B0
+F48B0
+F49B0
+
+.config CLKOS2_CPHASE 0000001
+-
+F30B0
+F31B0
+F32B0
+F33B0
+F34B0
+F35B0
+
+.config CLKOS2_DIV 0000000
+F59B0
+F60B0
+F61B0
+F62B0
+F63B0
+F64B0
+F65B0
+
+.config CLKOS3_CPHASE 0000000
+F36B0
+F37B0
+F38B0
+F39B0
+F40B0
+F41B0
+F42B0
+
+.config CLKOS3_DIV 0000000
+F66B0
+F67B0
+F68B0
+F69B0
+F70B0
+F71B0
+F72B0
+
+.config CLKOS_DIV 0000000
+F50B0
+F51B0
+F54B0
+F55B0
+F56B0
+F57B0
+F58B0
+
+.config MFG1_TEST 000
+F86B0
+F87B0
+F88B0
+
+.config MFG2_TEST 000
+F83B0
+F84B0
+F85B0
+
+.config_enum CLKOP_ENABLE DISABLED
+DISABLED !F77B0
+ENABLED F77B0
+
+.config_enum CLKOP_TRIM_DELAY 0
+0 !F90B0 !F91B0 !F92B0 !F93B0 !F94B0
+1 F90B0 F91B0 F92B0 !F93B0 !F94B0
+2 F90B0 F91B0 !F92B0 F93B0 !F94B0
+4 F90B0 F91B0 !F92B0 !F93B0 F94B0
+
+.config_enum CLKOP_TRIM_POL FALLING
+FALLING !F95B0
+RISING F95B0
+
+.config_enum CLKOS2_ENABLE DISABLED
+DISABLED !F79B0
+ENABLED F79B0
+
+.config_enum CLKOS3_ENABLE DISABLED
+DISABLED !F80B0
+ENABLED F80B0
+
+.config_enum CLKOS_ENABLE DISABLED
+DISABLED !F78B0
+ENABLED F78B0
+
+.config_enum CLKOS_TRIM_DELAY 0
+0 !F91B0 !F96B0 !F97B0 !F98B0
+1 F91B0 F96B0 !F97B0 !F98B0
+2 F91B0 !F96B0 F97B0 !F98B0
+4 F91B0 !F96B0 !F97B0 F98B0
+
+.config_enum CLKOS_TRIM_POL FALLING
+FALLING !F99B0
+RISING F99B0
+
+.config_enum DPHASE_SOURCE DISABLED
+DISABLED !F82B0
+ENABLED F82B0
+
+.config_enum OUTDIVIDER_MUXA DIVA
+DIVA !F73B0
+REFCLK F73B0
+
+.config_enum OUTDIVIDER_MUXB DIVB
+DIVB !F74B0
+REFCLK F74B0
+
+.config_enum OUTDIVIDER_MUXC DIVC
+DIVC !F75B0
+REFCLK F75B0
+
+.config_enum OUTDIVIDER_MUXD DIVD
+DIVD !F76B0
+REFCLK F76B0
+
+.config_enum SYNC_ENABLE DISABLED
+DISABLED !F81B0
+ENABLED F81B0
+
# Fixed Connections
diff --git a/ECP5/tiledata/PLL1_UL/bits.db b/ECP5/tiledata/PLL1_UL/bits.db
index 8bd325b..8bd4d22 100644
--- a/ECP5/tiledata/PLL1_UL/bits.db
+++ b/ECP5/tiledata/PLL1_UL/bits.db
@@ -13,5 +13,129 @@
# Non-Routing Configuration
+.config CLKOP_DIV 0000000
+F3B4
+F4B4
+F5B4
+F6B4
+F7B4
+F8B4
+F9B4
+
+.config CLKOS2_CPHASE 0000001
+-
+F0B3
+F1B3
+F2B3
+F3B3
+F4B3
+F5B3
+
+.config CLKOS2_DIV 0000000
+F9B5
+F0B6
+F1B6
+F2B6
+F3B6
+F4B6
+F5B6
+
+.config CLKOS3_CPHASE 0000000
+F6B3
+F7B3
+F8B3
+F9B3
+F0B4
+F1B4
+F2B4
+
+.config CLKOS3_DIV 0000000
+F6B6
+F7B6
+F8B6
+F9B6
+F0B7
+F1B7
+F2B7
+
+.config CLKOS_DIV 0000000
+F0B5
+F1B5
+F4B5
+F5B5
+F6B5
+F7B5
+F8B5
+
+.config MFG1_TEST 000
+F6B8
+F7B8
+F8B8
+
+.config MFG2_TEST 000
+F3B8
+F4B8
+F5B8
+
+.config_enum CLKOP_ENABLE DISABLED
+DISABLED !F7B7
+ENABLED F7B7
+
+.config_enum CLKOP_TRIM_DELAY 0
+0 !F0B9 !F1B9 !F2B9 !F3B9 !F4B9
+1 F0B9 F1B9 F2B9 !F3B9 !F4B9
+2 F0B9 F1B9 !F2B9 F3B9 !F4B9
+4 F0B9 F1B9 !F2B9 !F3B9 F4B9
+
+.config_enum CLKOP_TRIM_POL FALLING
+FALLING !F5B9
+RISING F5B9
+
+.config_enum CLKOS2_ENABLE DISABLED
+DISABLED !F9B7
+ENABLED F9B7
+
+.config_enum CLKOS3_ENABLE DISABLED
+DISABLED !F0B8
+ENABLED F0B8
+
+.config_enum CLKOS_ENABLE DISABLED
+DISABLED !F8B7
+ENABLED F8B7
+
+.config_enum CLKOS_TRIM_DELAY 0
+0 !F1B9 !F6B9 !F7B9 !F8B9
+1 F1B9 F6B9 !F7B9 !F8B9
+2 F1B9 !F6B9 F7B9 !F8B9
+4 F1B9 !F6B9 !F7B9 F8B9
+
+.config_enum CLKOS_TRIM_POL FALLING
+FALLING !F9B9
+RISING F9B9
+
+.config_enum DPHASE_SOURCE DISABLED
+DISABLED !F2B8
+ENABLED F2B8
+
+.config_enum OUTDIVIDER_MUXA DIVA
+DIVA !F3B7
+REFCLK F3B7
+
+.config_enum OUTDIVIDER_MUXB DIVB
+DIVB !F4B7
+REFCLK F4B7
+
+.config_enum OUTDIVIDER_MUXC DIVC
+DIVC !F5B7
+REFCLK F5B7
+
+.config_enum OUTDIVIDER_MUXD DIVD
+DIVD !F6B7
+REFCLK F6B7
+
+.config_enum SYNC_ENABLE DISABLED
+DISABLED !F1B8
+ENABLED F1B8
+
# Fixed Connections
diff --git a/ECP5/tiledata/PLL1_UR/bits.db b/ECP5/tiledata/PLL1_UR/bits.db
index 1f9a51c..58ace5e 100644
--- a/ECP5/tiledata/PLL1_UR/bits.db
+++ b/ECP5/tiledata/PLL1_UR/bits.db
@@ -13,5 +13,129 @@
# Non-Routing Configuration
+.config CLKOP_DIV 0000000
+F6B4
+F5B4
+F4B4
+F3B4
+F2B4
+F1B4
+F0B4
+
+.config CLKOS2_CPHASE 0000001
+-
+F9B3
+F8B3
+F7B3
+F6B3
+F5B3
+F4B3
+
+.config CLKOS2_DIV 0000000
+F0B5
+F9B6
+F8B6
+F7B6
+F6B6
+F5B6
+F4B6
+
+.config CLKOS3_CPHASE 0000000
+F3B3
+F2B3
+F1B3
+F0B3
+F9B4
+F8B4
+F7B4
+
+.config CLKOS3_DIV 0000000
+F3B6
+F2B6
+F1B6
+F0B6
+F9B7
+F8B7
+F7B7
+
+.config CLKOS_DIV 0000000
+F9B5
+F8B5
+F5B5
+F4B5
+F3B5
+F2B5
+F1B5
+
+.config MFG1_TEST 000
+F3B8
+F2B8
+F1B8
+
+.config MFG2_TEST 000
+F6B8
+F5B8
+F4B8
+
+.config_enum CLKOP_ENABLE DISABLED
+DISABLED !F2B7
+ENABLED F2B7
+
+.config_enum CLKOP_TRIM_DELAY 0
+0 !F5B9 !F6B9 !F7B9 !F8B9 !F9B9
+1 !F5B9 !F6B9 F7B9 F8B9 F9B9
+2 !F5B9 F6B9 !F7B9 F8B9 F9B9
+4 F5B9 !F6B9 !F7B9 F8B9 F9B9
+
+.config_enum CLKOP_TRIM_POL FALLING
+FALLING !F4B9
+RISING F4B9
+
+.config_enum CLKOS2_ENABLE DISABLED
+DISABLED !F0B7
+ENABLED F0B7
+
+.config_enum CLKOS3_ENABLE DISABLED
+DISABLED !F9B8
+ENABLED F9B8
+
+.config_enum CLKOS_ENABLE DISABLED
+DISABLED !F1B7
+ENABLED F1B7
+
+.config_enum CLKOS_TRIM_DELAY 0
+0 !F1B9 !F2B9 !F3B9 !F8B9
+1 !F1B9 !F2B9 F3B9 F8B9
+2 !F1B9 F2B9 !F3B9 F8B9
+4 F1B9 !F2B9 !F3B9 F8B9
+
+.config_enum CLKOS_TRIM_POL FALLING
+FALLING !F0B9
+RISING F0B9
+
+.config_enum DPHASE_SOURCE DISABLED
+DISABLED !F7B8
+ENABLED F7B8
+
+.config_enum OUTDIVIDER_MUXA DIVA
+DIVA !F6B7
+REFCLK F6B7
+
+.config_enum OUTDIVIDER_MUXB DIVB
+DIVB !F5B7
+REFCLK F5B7
+
+.config_enum OUTDIVIDER_MUXC DIVC
+DIVC !F4B7
+REFCLK F4B7
+
+.config_enum OUTDIVIDER_MUXD DIVD
+DIVD !F3B7
+REFCLK F3B7
+
+.config_enum SYNC_ENABLE DISABLED
+DISABLED !F8B8
+ENABLED F8B8
+
# Fixed Connections
