diff --git a/ECP5/tiledata/MIB_CIB_LR/bits.db b/ECP5/tiledata/MIB_CIB_LR/bits.db
index 968bee7..2ef14dd 100644
--- a/ECP5/tiledata/MIB_CIB_LR/bits.db
+++ b/ECP5/tiledata/MIB_CIB_LR/bits.db
@@ -31,13 +31,15 @@
 F7B5
 F6B5
 
-.config_enum IOLOGICC.CLKIMUX CLK
-CLK -
-INV F7B1
+.config_enum IOLOGICC.CLKIMUX 0
+0 -
+CLK F6B1
+INV F6B1 F7B1
 
-.config_enum IOLOGICC.CLKOMUX CLK
-CLK -
-INV F0B3
+.config_enum IOLOGICC.CLKOMUX 0
+0 -
+CLK F9B2
+INV F0B3 F9B2
 
 .config_enum IOLOGICC.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -56,6 +58,11 @@
 IDDRX2 F1B2
 NONE -
 
+.config_enum IOLOGICC.IOLTOMUX TS
+NONE -
+TDDR F5B4
+TS -
+
 .config_enum IOLOGICC.LSRIMUX 0
 0 -
 LSRMUX F9B1
@@ -72,9 +79,10 @@
 MIDDRX2 F1B2 F6B10
 NONE -
 
-.config_enum IOLOGICC.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F8B4
+.config_enum IOLOGICC.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F7B4
+DQSW270 F7B4 F8B4
+NONE -
 
 .config_enum IOLOGICC.MODDRX.MODE NONE
 MODDRX2 F8B3
@@ -82,33 +90,39 @@
 NONE -
 
 .config_enum IOLOGICC.MODE NONE
-IDDRX1_ODDRX1 F0B5 F2B2 F6B1 F8B2 F9B2 F9B4
-IDDRXN F0B5 F6B1 F8B2 F9B2 F9B4
-IREG_OREG F6B1 F9B2 F9B4
-MIDDRX_MODDRX F0B5 F3B3 F6B1 F8B2 F9B2 F9B4
-NONE -
-ODDRXN F0B5 F6B1 F6B3 F7B3 F8B2 F9B2 F9B4
+IDDRX1_ODDRX1 F0B5 F2B2 !F3B3 F8B2 F9B4
+IDDRXN F0B5 !F3B3 F8B2 F9B4
+IREG_OREG !F3B3 F9B4
+MIDDRX_MODDRX F0B5 F3B3 F8B2 F9B4
+NONE !F3B3
+ODDRXN F0B5 !F3B3 F6B3 F7B3 F8B2 F9B4
 
 .config_enum IOLOGICC.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F0B4
 
 .config_enum IOLOGICC.MTDDRX.MODE NONE
-MTSHX2 F0B4 F3B4 F8B3
+MTSHX2 F8B3
 NONE -
 
+.config_enum IOLOGICC.MTDDRX.REGSET RESET
+RESET -
+SET F3B4
+
 .config_enum IOLOGICC.ODDRXN.MODE NONE
 NONE -
 ODDR71 F0B9 F1B9 F2B9 F8B3 F8B4 F9B3 F9B8
 ODDRX2 F8B3 F8B4
 
-.config_enum IOLOGICD.CLKIMUX CLK
-CLK -
-INV F9B6
+.config_enum IOLOGICD.CLKIMUX 0
+0 -
+CLK F8B6
+INV F8B6 F9B6
 
-.config_enum IOLOGICD.CLKOMUX CLK
-CLK -
-INV F2B8
+.config_enum IOLOGICD.CLKOMUX 0
+0 -
+CLK F1B8
+INV F1B8 F2B8
 
 .config_enum IOLOGICD.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -127,6 +141,11 @@
 IDDRX2 F3B7
 NONE -
 
+.config_enum IOLOGICD.IOLTOMUX TS
+NONE -
+TDDR F8B9
+TS -
+
 .config_enum IOLOGICD.LSRIMUX 0
 0 -
 LSRMUX F1B7
@@ -143,9 +162,10 @@
 MIDDRX2 F3B7 F7B10
 NONE -
 
-.config_enum IOLOGICD.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F1B10
+.config_enum IOLOGICD.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F0B10
+DQSW270 F0B10 F1B10
+NONE -
 
 .config_enum IOLOGICD.MODDRX.MODE NONE
 MODDRX2 F1B9
@@ -153,21 +173,25 @@
 NONE -
 
 .config_enum IOLOGICD.MODE NONE
-IDDRX1_ODDRX1 F0B8 F1B8 F2B10 F3B10 F4B7 F8B6
-IDDRXN F0B8 F1B8 F2B10 F3B10 F8B6
-IREG_OREG F1B8 F2B10 F8B6
-MIDDRX_MODDRX F0B8 F1B8 F2B10 F3B10 F5B6 F8B6
-NONE -
-ODDRXN F0B8 F0B9 F1B8 F2B10 F3B10 F8B6 F9B8
+IDDRX1_ODDRX1 F0B8 F2B10 F3B10 F4B7 !F5B6
+IDDRXN F0B8 F2B10 F3B10 !F5B6
+IREG_OREG F2B10 !F5B6
+MIDDRX_MODDRX F0B8 F2B10 F3B10 F5B6
+NONE !F5B6
+ODDRXN F0B8 F0B9 F2B10 F3B10 !F5B6 F9B8
 
 .config_enum IOLOGICD.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F3B9
 
 .config_enum IOLOGICD.MTDDRX.MODE NONE
-MTSHX2 F1B9 F3B9 F6B9
+MTSHX2 F1B9
 NONE -
 
+.config_enum IOLOGICD.MTDDRX.REGSET RESET
+RESET -
+SET F6B9
+
 .config_enum IOLOGICD.ODDRXN.MODE NONE
 NONE -
 ODDR71 F1B9 F1B10 F2B9
diff --git a/ECP5/tiledata/MIB_CIB_LR_A/bits.db b/ECP5/tiledata/MIB_CIB_LR_A/bits.db
index 1cbe8b2..5f0798e 100644
--- a/ECP5/tiledata/MIB_CIB_LR_A/bits.db
+++ b/ECP5/tiledata/MIB_CIB_LR_A/bits.db
@@ -31,13 +31,15 @@
 F2B5
 F3B5
 
-.config_enum IOLOGICC.CLKIMUX CLK
-CLK -
-INV F2B1
+.config_enum IOLOGICC.CLKIMUX 0
+0 -
+CLK F3B1
+INV F2B1 F3B1
 
-.config_enum IOLOGICC.CLKOMUX CLK
-CLK -
-INV F9B3
+.config_enum IOLOGICC.CLKOMUX 0
+0 -
+CLK F0B2
+INV F0B2 F9B3
 
 .config_enum IOLOGICC.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -56,6 +58,11 @@
 IDDRX2 F8B2
 NONE -
 
+.config_enum IOLOGICC.IOLTOMUX TS
+NONE -
+TDDR F4B4
+TS -
+
 .config_enum IOLOGICC.LSRIMUX 0
 0 -
 LSRMUX F0B1
@@ -72,9 +79,10 @@
 MIDDRX2 F3B10 F8B2
 NONE -
 
-.config_enum IOLOGICC.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F1B4
+.config_enum IOLOGICC.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F2B4
+DQSW270 F1B4 F2B4
+NONE -
 
 .config_enum IOLOGICC.MODDRX.MODE NONE
 MODDRX2 F1B3
@@ -82,33 +90,39 @@
 NONE -
 
 .config_enum IOLOGICC.MODE NONE
-IDDRX1_ODDRX1 F0B2 F0B4 F1B2 F3B1 F7B2 F9B5
-IDDRXN F0B2 F0B4 F1B2 F3B1 F9B5
-IREG_OREG F0B2 F0B4 F3B1
-MIDDRX_MODDRX F0B2 F0B4 F1B2 F3B1 F6B3 F9B5
-NONE -
-ODDRXN F0B2 F0B4 F1B2 F2B3 F3B1 F3B3 F9B5
+IDDRX1_ODDRX1 F0B4 F1B2 !F6B3 F7B2 F9B5
+IDDRXN F0B4 F1B2 !F6B3 F9B5
+IREG_OREG F0B4 !F6B3
+MIDDRX_MODDRX F0B4 F1B2 F6B3 F9B5
+NONE !F6B3
+ODDRXN F0B4 F1B2 F2B3 F3B3 !F6B3 F9B5
 
 .config_enum IOLOGICC.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F9B4
 
 .config_enum IOLOGICC.MTDDRX.MODE NONE
-MTSHX2 F1B3 F6B4 F9B4
+MTSHX2 F1B3
 NONE -
 
+.config_enum IOLOGICC.MTDDRX.REGSET RESET
+RESET -
+SET F6B4
+
 .config_enum IOLOGICC.ODDRXN.MODE NONE
 NONE -
 ODDR71 F0B3 F0B8 F1B3 F1B4 F7B9 F8B9 F9B9
 ODDRX2 F1B3 F1B4
 
-.config_enum IOLOGICD.CLKIMUX CLK
-CLK -
-INV F0B6
+.config_enum IOLOGICD.CLKIMUX 0
+0 -
+CLK F1B6
+INV F0B6 F1B6
 
-.config_enum IOLOGICD.CLKOMUX CLK
-CLK -
-INV F7B8
+.config_enum IOLOGICD.CLKOMUX 0
+0 -
+CLK F8B8
+INV F7B8 F8B8
 
 .config_enum IOLOGICD.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -127,6 +141,11 @@
 IDDRX2 F6B7
 NONE -
 
+.config_enum IOLOGICD.IOLTOMUX TS
+NONE -
+TDDR F1B9
+TS -
+
 .config_enum IOLOGICD.LSRIMUX 0
 0 -
 LSRMUX F8B7
@@ -143,9 +162,10 @@
 MIDDRX2 F2B10 F6B7
 NONE -
 
-.config_enum IOLOGICD.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F8B10
+.config_enum IOLOGICD.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F9B10
+DQSW270 F8B10 F9B10
+NONE -
 
 .config_enum IOLOGICD.MODDRX.MODE NONE
 MODDRX2 F8B9
@@ -153,21 +173,25 @@
 NONE -
 
 .config_enum IOLOGICD.MODE NONE
-IDDRX1_ODDRX1 F1B6 F5B7 F6B10 F7B10 F8B8 F9B8
-IDDRXN F1B6 F6B10 F7B10 F8B8 F9B8
-IREG_OREG F1B6 F7B10 F8B8
-MIDDRX_MODDRX F1B6 F4B6 F6B10 F7B10 F8B8 F9B8
-NONE -
-ODDRXN F0B8 F1B6 F6B10 F7B10 F8B8 F9B8 F9B9
+IDDRX1_ODDRX1 !F4B6 F5B7 F6B10 F7B10 F9B8
+IDDRXN !F4B6 F6B10 F7B10 F9B8
+IREG_OREG !F4B6 F7B10
+MIDDRX_MODDRX F4B6 F6B10 F7B10 F9B8
+NONE !F4B6
+ODDRXN F0B8 !F4B6 F6B10 F7B10 F9B8 F9B9
 
 .config_enum IOLOGICD.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F6B9
 
 .config_enum IOLOGICD.MTDDRX.MODE NONE
-MTSHX2 F3B9 F6B9 F8B9
+MTSHX2 F8B9
 NONE -
 
+.config_enum IOLOGICD.MTDDRX.REGSET RESET
+RESET -
+SET F3B9
+
 .config_enum IOLOGICD.ODDRXN.MODE NONE
 NONE -
 ODDR71 F7B9 F8B9 F8B10
diff --git a/ECP5/tiledata/PICL0/bits.db b/ECP5/tiledata/PICL0/bits.db
index 25b98b7..04b7700 100644
--- a/ECP5/tiledata/PICL0/bits.db
+++ b/ECP5/tiledata/PICL0/bits.db
@@ -35,13 +35,15 @@
 F7B5
 F6B5
 
-.config_enum IOLOGICA.CLKIMUX CLK
-CLK -
-INV F7B1
+.config_enum IOLOGICA.CLKIMUX 0
+0 -
+CLK F6B1
+INV F6B1 F7B1
 
-.config_enum IOLOGICA.CLKOMUX CLK
-CLK -
-INV F0B3
+.config_enum IOLOGICA.CLKOMUX 0
+0 -
+CLK F9B2
+INV F0B3 F9B2
 
 .config_enum IOLOGICA.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -60,6 +62,11 @@
 IDDRX2 F1B2
 NONE -
 
+.config_enum IOLOGICA.IOLTOMUX TS
+NONE -
+TDDR F5B4
+TS -
+
 .config_enum IOLOGICA.LSRIMUX 0
 0 -
 LSRMUX F9B1
@@ -76,9 +83,10 @@
 MIDDRX2 F1B2 F6B10
 NONE -
 
-.config_enum IOLOGICA.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F8B4
+.config_enum IOLOGICA.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F7B4
+DQSW270 F7B4 F8B4
+NONE -
 
 .config_enum IOLOGICA.MODDRX.MODE NONE
 MODDRX2 F8B3
@@ -86,33 +94,39 @@
 NONE -
 
 .config_enum IOLOGICA.MODE NONE
-IDDRX1_ODDRX1 F0B5 F2B2 F6B1 F8B2 F9B2 F9B4
-IDDRXN F0B5 F6B1 F8B2 F9B2 F9B4
-IREG_OREG F6B1 F9B2 F9B4
-MIDDRX_MODDRX F0B5 F3B1 F6B1 F8B2 F9B2 F9B4
-NONE -
-ODDRXN F0B5 F6B1 F6B3 F7B3 F8B2 F9B2 F9B4
+IDDRX1_ODDRX1 F0B5 F2B2 !F3B1 F8B2 F9B4
+IDDRXN F0B5 !F3B1 F8B2 F9B4
+IREG_OREG !F3B1 F9B4
+MIDDRX_MODDRX F0B5 F3B1 F8B2 F9B4
+NONE !F3B1
+ODDRXN F0B5 !F3B1 F6B3 F7B3 F8B2 F9B4
 
 .config_enum IOLOGICA.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F0B4
 
 .config_enum IOLOGICA.MTDDRX.MODE NONE
-MTSHX2 F0B4 F3B4 F8B3
+MTSHX2 F8B3
 NONE -
 
+.config_enum IOLOGICA.MTDDRX.REGSET RESET
+RESET -
+SET F3B4
+
 .config_enum IOLOGICA.ODDRXN.MODE NONE
 NONE -
 ODDR71 F0B9 F1B9 F8B3 F8B4 F8B8 F9B3 F9B8
 ODDRX2 F8B3 F8B4
 
-.config_enum IOLOGICB.CLKIMUX CLK
-CLK -
-INV F9B6
+.config_enum IOLOGICB.CLKIMUX 0
+0 -
+CLK F8B6
+INV F8B6 F9B6
 
-.config_enum IOLOGICB.CLKOMUX CLK
-CLK -
-INV F2B8
+.config_enum IOLOGICB.CLKOMUX 0
+0 -
+CLK F1B8
+INV F1B8 F2B8
 
 .config_enum IOLOGICB.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -131,6 +145,11 @@
 IDDRX2 F3B7
 NONE -
 
+.config_enum IOLOGICB.IOLTOMUX TS
+NONE -
+TDDR F7B9
+TS -
+
 .config_enum IOLOGICB.LSRIMUX 0
 0 -
 LSRMUX F1B7
@@ -147,9 +166,10 @@
 MIDDRX2 F3B7 F7B10
 NONE -
 
-.config_enum IOLOGICB.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F0B10
+.config_enum IOLOGICB.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F9B9
+DQSW270 F0B10 F9B9
+NONE -
 
 .config_enum IOLOGICB.MODDRX.MODE NONE
 MODDRX2 F0B9
@@ -157,21 +177,25 @@
 NONE -
 
 .config_enum IOLOGICB.MODE NONE
-IDDRX1_ODDRX1 F0B8 F1B8 F1B10 F2B10 F4B7 F8B6
-IDDRXN F0B8 F1B8 F1B10 F2B10 F8B6
-IREG_OREG F1B8 F1B10 F8B6
-MIDDRX_MODDRX F0B8 F1B8 F1B10 F2B10 F5B6 F8B6
-NONE -
-ODDRXN F0B8 F1B8 F1B10 F2B10 F8B6 F8B8 F9B8
+IDDRX1_ODDRX1 F0B8 F1B10 F2B10 F4B7 !F5B6
+IDDRXN F0B8 F1B10 F2B10 !F5B6
+IREG_OREG F1B10 !F5B6
+MIDDRX_MODDRX F0B8 F1B10 F2B10 F5B6
+NONE !F5B6
+ODDRXN F0B8 F1B10 F2B10 !F5B6 F8B8 F9B8
 
 .config_enum IOLOGICB.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F2B9
 
 .config_enum IOLOGICB.MTDDRX.MODE NONE
-MTSHX2 F0B9 F2B9 F5B9
+MTSHX2 F0B9
 NONE -
 
+.config_enum IOLOGICB.MTDDRX.REGSET RESET
+RESET -
+SET F5B9
+
 .config_enum IOLOGICB.ODDRXN.MODE NONE
 NONE -
 ODDR71 F0B9 F0B10 F1B9
diff --git a/ECP5/tiledata/PICL0_DQS2/bits.db b/ECP5/tiledata/PICL0_DQS2/bits.db
index 2f1a558..916afa2 100644
--- a/ECP5/tiledata/PICL0_DQS2/bits.db
+++ b/ECP5/tiledata/PICL0_DQS2/bits.db
@@ -61,13 +61,15 @@
 NO -
 YES F8B10
 
-.config_enum IOLOGICA.CLKIMUX CLK
-CLK -
-INV F7B1
+.config_enum IOLOGICA.CLKIMUX 0
+0 -
+CLK F6B1
+INV F6B1 F7B1
 
-.config_enum IOLOGICA.CLKOMUX CLK
-CLK -
-INV F0B3
+.config_enum IOLOGICA.CLKOMUX 0
+0 -
+CLK F9B2
+INV F0B3 F9B2
 
 .config_enum IOLOGICA.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -86,6 +88,11 @@
 IDDRX2 F1B2
 NONE -
 
+.config_enum IOLOGICA.IOLTOMUX TS
+NONE -
+TDDR F5B4
+TS -
+
 .config_enum IOLOGICA.LSRIMUX 0
 0 -
 LSRMUX F9B1
@@ -102,9 +109,10 @@
 MIDDRX2 F1B2 F6B10
 NONE -
 
-.config_enum IOLOGICA.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F8B4
+.config_enum IOLOGICA.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F7B4
+DQSW270 F7B4 F8B4
+NONE -
 
 .config_enum IOLOGICA.MODDRX.MODE NONE
 MODDRX2 F8B3
@@ -112,33 +120,39 @@
 NONE -
 
 .config_enum IOLOGICA.MODE NONE
-IDDRX1_ODDRX1 F0B5 F2B2 F6B1 F8B2 F9B2 F9B4
-IDDRXN F0B5 F6B1 F8B2 F9B2 F9B4
-IREG_OREG F6B1 F9B2 F9B4
-MIDDRX_MODDRX F0B5 F3B1 F6B1 F8B2 F9B2 F9B4
-NONE -
-ODDRXN F0B5 F6B1 F6B3 F7B3 F8B2 F9B2 F9B4
+IDDRX1_ODDRX1 F0B5 F2B2 !F3B1 F8B2 F9B4
+IDDRXN F0B5 !F3B1 F8B2 F9B4
+IREG_OREG !F3B1 F9B4
+MIDDRX_MODDRX F0B5 F3B1 F8B2 F9B4
+NONE !F3B1
+ODDRXN F0B5 !F3B1 F6B3 F7B3 F8B2 F9B4
 
 .config_enum IOLOGICA.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F0B4
 
 .config_enum IOLOGICA.MTDDRX.MODE NONE
-MTSHX2 F0B4 F3B4 F8B3
+MTSHX2 F8B3
 NONE -
 
+.config_enum IOLOGICA.MTDDRX.REGSET RESET
+RESET -
+SET F3B4
+
 .config_enum IOLOGICA.ODDRXN.MODE NONE
 NONE -
 ODDR71 F0B9 F1B9 F8B3 F8B4 F8B8 F9B3 F9B8
 ODDRX2 F8B3 F8B4
 
-.config_enum IOLOGICB.CLKIMUX CLK
-CLK -
-INV F9B6
+.config_enum IOLOGICB.CLKIMUX 0
+0 -
+CLK F8B6
+INV F8B6 F9B6
 
-.config_enum IOLOGICB.CLKOMUX CLK
-CLK -
-INV F2B8
+.config_enum IOLOGICB.CLKOMUX 0
+0 -
+CLK F1B8
+INV F1B8 F2B8
 
 .config_enum IOLOGICB.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -157,6 +171,11 @@
 IDDRX2 F3B7
 NONE -
 
+.config_enum IOLOGICB.IOLTOMUX TS
+NONE -
+TDDR F7B9
+TS -
+
 .config_enum IOLOGICB.LSRIMUX 0
 0 -
 LSRMUX F1B7
@@ -173,9 +192,10 @@
 MIDDRX2 F3B7 F7B10
 NONE -
 
-.config_enum IOLOGICB.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F0B10
+.config_enum IOLOGICB.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F9B9
+DQSW270 F0B10 F9B9
+NONE -
 
 .config_enum IOLOGICB.MODDRX.MODE NONE
 MODDRX2 F0B9
@@ -183,21 +203,25 @@
 NONE -
 
 .config_enum IOLOGICB.MODE NONE
-IDDRX1_ODDRX1 F0B8 F1B8 F1B10 F2B10 F4B7 F8B6
-IDDRXN F0B8 F1B8 F1B10 F2B10 F8B6
-IREG_OREG F1B8 F1B10 F8B6
-MIDDRX_MODDRX F0B8 F1B8 F1B10 F2B10 F5B6 F8B6
-NONE -
-ODDRXN F0B8 F1B8 F1B10 F2B10 F8B6 F8B8 F9B8
+IDDRX1_ODDRX1 F0B8 F1B10 F2B10 F4B7 !F5B6
+IDDRXN F0B8 F1B10 F2B10 !F5B6
+IREG_OREG F1B10 !F5B6
+MIDDRX_MODDRX F0B8 F1B10 F2B10 F5B6
+NONE !F5B6
+ODDRXN F0B8 F1B10 F2B10 !F5B6 F8B8 F9B8
 
 .config_enum IOLOGICB.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F2B9
 
 .config_enum IOLOGICB.MTDDRX.MODE NONE
-MTSHX2 F0B9 F2B9 F5B9
+MTSHX2 F0B9
 NONE -
 
+.config_enum IOLOGICB.MTDDRX.REGSET RESET
+RESET -
+SET F5B9
+
 .config_enum IOLOGICB.ODDRXN.MODE NONE
 NONE -
 ODDR71 F0B9 F0B10 F1B9
diff --git a/ECP5/tiledata/PICL2/bits.db b/ECP5/tiledata/PICL2/bits.db
index 968bee7..2ef14dd 100644
--- a/ECP5/tiledata/PICL2/bits.db
+++ b/ECP5/tiledata/PICL2/bits.db
@@ -31,13 +31,15 @@
 F7B5
 F6B5
 
-.config_enum IOLOGICC.CLKIMUX CLK
-CLK -
-INV F7B1
+.config_enum IOLOGICC.CLKIMUX 0
+0 -
+CLK F6B1
+INV F6B1 F7B1
 
-.config_enum IOLOGICC.CLKOMUX CLK
-CLK -
-INV F0B3
+.config_enum IOLOGICC.CLKOMUX 0
+0 -
+CLK F9B2
+INV F0B3 F9B2
 
 .config_enum IOLOGICC.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -56,6 +58,11 @@
 IDDRX2 F1B2
 NONE -
 
+.config_enum IOLOGICC.IOLTOMUX TS
+NONE -
+TDDR F5B4
+TS -
+
 .config_enum IOLOGICC.LSRIMUX 0
 0 -
 LSRMUX F9B1
@@ -72,9 +79,10 @@
 MIDDRX2 F1B2 F6B10
 NONE -
 
-.config_enum IOLOGICC.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F8B4
+.config_enum IOLOGICC.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F7B4
+DQSW270 F7B4 F8B4
+NONE -
 
 .config_enum IOLOGICC.MODDRX.MODE NONE
 MODDRX2 F8B3
@@ -82,33 +90,39 @@
 NONE -
 
 .config_enum IOLOGICC.MODE NONE
-IDDRX1_ODDRX1 F0B5 F2B2 F6B1 F8B2 F9B2 F9B4
-IDDRXN F0B5 F6B1 F8B2 F9B2 F9B4
-IREG_OREG F6B1 F9B2 F9B4
-MIDDRX_MODDRX F0B5 F3B3 F6B1 F8B2 F9B2 F9B4
-NONE -
-ODDRXN F0B5 F6B1 F6B3 F7B3 F8B2 F9B2 F9B4
+IDDRX1_ODDRX1 F0B5 F2B2 !F3B3 F8B2 F9B4
+IDDRXN F0B5 !F3B3 F8B2 F9B4
+IREG_OREG !F3B3 F9B4
+MIDDRX_MODDRX F0B5 F3B3 F8B2 F9B4
+NONE !F3B3
+ODDRXN F0B5 !F3B3 F6B3 F7B3 F8B2 F9B4
 
 .config_enum IOLOGICC.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F0B4
 
 .config_enum IOLOGICC.MTDDRX.MODE NONE
-MTSHX2 F0B4 F3B4 F8B3
+MTSHX2 F8B3
 NONE -
 
+.config_enum IOLOGICC.MTDDRX.REGSET RESET
+RESET -
+SET F3B4
+
 .config_enum IOLOGICC.ODDRXN.MODE NONE
 NONE -
 ODDR71 F0B9 F1B9 F2B9 F8B3 F8B4 F9B3 F9B8
 ODDRX2 F8B3 F8B4
 
-.config_enum IOLOGICD.CLKIMUX CLK
-CLK -
-INV F9B6
+.config_enum IOLOGICD.CLKIMUX 0
+0 -
+CLK F8B6
+INV F8B6 F9B6
 
-.config_enum IOLOGICD.CLKOMUX CLK
-CLK -
-INV F2B8
+.config_enum IOLOGICD.CLKOMUX 0
+0 -
+CLK F1B8
+INV F1B8 F2B8
 
 .config_enum IOLOGICD.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -127,6 +141,11 @@
 IDDRX2 F3B7
 NONE -
 
+.config_enum IOLOGICD.IOLTOMUX TS
+NONE -
+TDDR F8B9
+TS -
+
 .config_enum IOLOGICD.LSRIMUX 0
 0 -
 LSRMUX F1B7
@@ -143,9 +162,10 @@
 MIDDRX2 F3B7 F7B10
 NONE -
 
-.config_enum IOLOGICD.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F1B10
+.config_enum IOLOGICD.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F0B10
+DQSW270 F0B10 F1B10
+NONE -
 
 .config_enum IOLOGICD.MODDRX.MODE NONE
 MODDRX2 F1B9
@@ -153,21 +173,25 @@
 NONE -
 
 .config_enum IOLOGICD.MODE NONE
-IDDRX1_ODDRX1 F0B8 F1B8 F2B10 F3B10 F4B7 F8B6
-IDDRXN F0B8 F1B8 F2B10 F3B10 F8B6
-IREG_OREG F1B8 F2B10 F8B6
-MIDDRX_MODDRX F0B8 F1B8 F2B10 F3B10 F5B6 F8B6
-NONE -
-ODDRXN F0B8 F0B9 F1B8 F2B10 F3B10 F8B6 F9B8
+IDDRX1_ODDRX1 F0B8 F2B10 F3B10 F4B7 !F5B6
+IDDRXN F0B8 F2B10 F3B10 !F5B6
+IREG_OREG F2B10 !F5B6
+MIDDRX_MODDRX F0B8 F2B10 F3B10 F5B6
+NONE !F5B6
+ODDRXN F0B8 F0B9 F2B10 F3B10 !F5B6 F9B8
 
 .config_enum IOLOGICD.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F3B9
 
 .config_enum IOLOGICD.MTDDRX.MODE NONE
-MTSHX2 F1B9 F3B9 F6B9
+MTSHX2 F1B9
 NONE -
 
+.config_enum IOLOGICD.MTDDRX.REGSET RESET
+RESET -
+SET F6B9
+
 .config_enum IOLOGICD.ODDRXN.MODE NONE
 NONE -
 ODDR71 F1B9 F1B10 F2B9
diff --git a/ECP5/tiledata/PICL2_DQS1/bits.db b/ECP5/tiledata/PICL2_DQS1/bits.db
index 69b40a3..5dc2c34 100644
--- a/ECP5/tiledata/PICL2_DQS1/bits.db
+++ b/ECP5/tiledata/PICL2_DQS1/bits.db
@@ -53,13 +53,15 @@
 NO -
 YES F9B11
 
-.config_enum IOLOGICC.CLKIMUX CLK
-CLK -
-INV F7B1
+.config_enum IOLOGICC.CLKIMUX 0
+0 -
+CLK F6B1
+INV F6B1 F7B1
 
-.config_enum IOLOGICC.CLKOMUX CLK
-CLK -
-INV F0B3
+.config_enum IOLOGICC.CLKOMUX 0
+0 -
+CLK F9B2
+INV F0B3 F9B2
 
 .config_enum IOLOGICC.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -78,6 +80,11 @@
 IDDRX2 F1B2
 NONE -
 
+.config_enum IOLOGICC.IOLTOMUX TS
+NONE -
+TDDR F5B4
+TS -
+
 .config_enum IOLOGICC.LSRIMUX 0
 0 -
 LSRMUX F9B1
@@ -94,9 +101,10 @@
 MIDDRX2 F1B2 F6B10
 NONE -
 
-.config_enum IOLOGICC.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F8B4
+.config_enum IOLOGICC.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F7B4
+DQSW270 F7B4 F8B4
+NONE -
 
 .config_enum IOLOGICC.MODDRX.MODE NONE
 MODDRX2 F8B3
@@ -104,33 +112,39 @@
 NONE -
 
 .config_enum IOLOGICC.MODE NONE
-IDDRX1_ODDRX1 F0B5 F2B2 F6B1 F8B2 F9B2 F9B4
-IDDRXN F0B5 F6B1 F8B2 F9B2 F9B4
-IREG_OREG F6B1 F9B2 F9B4
-MIDDRX_MODDRX F0B5 F3B3 F6B1 F8B2 F9B2 F9B4
-NONE -
-ODDRXN F0B5 F6B1 F6B3 F7B3 F8B2 F9B2 F9B4
+IDDRX1_ODDRX1 F0B5 F2B2 !F3B3 F8B2 F9B4
+IDDRXN F0B5 !F3B3 F8B2 F9B4
+IREG_OREG !F3B3 F9B4
+MIDDRX_MODDRX F0B5 F3B3 F8B2 F9B4
+NONE !F3B3
+ODDRXN F0B5 !F3B3 F6B3 F7B3 F8B2 F9B4
 
 .config_enum IOLOGICC.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F0B4
 
 .config_enum IOLOGICC.MTDDRX.MODE NONE
-MTSHX2 F0B4 F3B4 F8B3
+MTSHX2 F8B3
 NONE -
 
+.config_enum IOLOGICC.MTDDRX.REGSET RESET
+RESET -
+SET F3B4
+
 .config_enum IOLOGICC.ODDRXN.MODE NONE
 NONE -
 ODDR71 F0B9 F1B9 F2B9 F8B3 F8B4 F9B3 F9B8
 ODDRX2 F8B3 F8B4
 
-.config_enum IOLOGICD.CLKIMUX CLK
-CLK -
-INV F9B6
+.config_enum IOLOGICD.CLKIMUX 0
+0 -
+CLK F8B6
+INV F8B6 F9B6
 
-.config_enum IOLOGICD.CLKOMUX CLK
-CLK -
-INV F2B8
+.config_enum IOLOGICD.CLKOMUX 0
+0 -
+CLK F1B8
+INV F1B8 F2B8
 
 .config_enum IOLOGICD.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -149,6 +163,11 @@
 IDDRX2 F3B7
 NONE -
 
+.config_enum IOLOGICD.IOLTOMUX TS
+NONE -
+TDDR F8B9
+TS -
+
 .config_enum IOLOGICD.LSRIMUX 0
 0 -
 LSRMUX F1B7
@@ -165,9 +184,10 @@
 MIDDRX2 F3B7 F7B10
 NONE -
 
-.config_enum IOLOGICD.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F1B10
+.config_enum IOLOGICD.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F0B10
+DQSW270 F0B10 F1B10
+NONE -
 
 .config_enum IOLOGICD.MODDRX.MODE NONE
 MODDRX2 F1B9
@@ -175,21 +195,25 @@
 NONE -
 
 .config_enum IOLOGICD.MODE NONE
-IDDRX1_ODDRX1 F0B8 F1B8 F2B10 F3B10 F4B7 F8B6
-IDDRXN F0B8 F1B8 F2B10 F3B10 F8B6
-IREG_OREG F1B8 F2B10 F8B6
-MIDDRX_MODDRX F0B8 F1B8 F2B10 F3B10 F5B6 F8B6
-NONE -
-ODDRXN F0B8 F0B9 F1B8 F2B10 F3B10 F8B6 F9B8
+IDDRX1_ODDRX1 F0B8 F2B10 F3B10 F4B7 !F5B6
+IDDRXN F0B8 F2B10 F3B10 !F5B6
+IREG_OREG F2B10 !F5B6
+MIDDRX_MODDRX F0B8 F2B10 F3B10 F5B6
+NONE !F5B6
+ODDRXN F0B8 F0B9 F2B10 F3B10 !F5B6 F9B8
 
 .config_enum IOLOGICD.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F3B9
 
 .config_enum IOLOGICD.MTDDRX.MODE NONE
-MTSHX2 F1B9 F3B9 F6B9
+MTSHX2 F1B9
 NONE -
 
+.config_enum IOLOGICD.MTDDRX.REGSET RESET
+RESET -
+SET F6B9
+
 .config_enum IOLOGICD.ODDRXN.MODE NONE
 NONE -
 ODDR71 F1B9 F1B10 F2B9
diff --git a/ECP5/tiledata/PICR0/bits.db b/ECP5/tiledata/PICR0/bits.db
index fc1f76f..24f4605 100644
--- a/ECP5/tiledata/PICR0/bits.db
+++ b/ECP5/tiledata/PICR0/bits.db
@@ -35,13 +35,15 @@
 F2B5
 F3B5
 
-.config_enum IOLOGICA.CLKIMUX CLK
-CLK -
-INV F2B1
+.config_enum IOLOGICA.CLKIMUX 0
+0 -
+CLK F3B1
+INV F2B1 F3B1
 
-.config_enum IOLOGICA.CLKOMUX CLK
-CLK -
-INV F9B3
+.config_enum IOLOGICA.CLKOMUX 0
+0 -
+CLK F0B2
+INV F0B2 F9B3
 
 .config_enum IOLOGICA.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -60,6 +62,11 @@
 IDDRX2 F8B2
 NONE -
 
+.config_enum IOLOGICA.IOLTOMUX TS
+NONE -
+TDDR F4B4
+TS -
+
 .config_enum IOLOGICA.LSRIMUX 0
 0 -
 LSRMUX F0B1
@@ -76,9 +83,10 @@
 MIDDRX2 F3B10 F8B2
 NONE -
 
-.config_enum IOLOGICA.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F1B4
+.config_enum IOLOGICA.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F2B4
+DQSW270 F1B4 F2B4
+NONE -
 
 .config_enum IOLOGICA.MODDRX.MODE NONE
 MODDRX2 F1B3
@@ -86,33 +94,39 @@
 NONE -
 
 .config_enum IOLOGICA.MODE NONE
-IDDRX1_ODDRX1 F0B2 F0B4 F1B2 F3B1 F7B2 F9B5
-IDDRXN F0B2 F0B4 F1B2 F3B1 F9B5
-IREG_OREG F0B2 F0B4 F3B1
-MIDDRX_MODDRX F0B2 F0B4 F1B2 F3B1 F6B1 F9B5
-NONE -
-ODDRXN F0B2 F0B4 F1B2 F2B3 F3B1 F3B3 F9B5
+IDDRX1_ODDRX1 F0B4 F1B2 !F6B1 F7B2 F9B5
+IDDRXN F0B4 F1B2 !F6B1 F9B5
+IREG_OREG F0B4 !F6B1
+MIDDRX_MODDRX F0B4 F1B2 F6B1 F9B5
+NONE !F6B1
+ODDRXN F0B4 F1B2 F2B3 F3B3 !F6B1 F9B5
 
 .config_enum IOLOGICA.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F9B4
 
 .config_enum IOLOGICA.MTDDRX.MODE NONE
-MTSHX2 F1B3 F6B4 F9B4
+MTSHX2 F1B3
 NONE -
 
+.config_enum IOLOGICA.MTDDRX.REGSET RESET
+RESET -
+SET F6B4
+
 .config_enum IOLOGICA.ODDRXN.MODE NONE
 NONE -
 ODDR71 F0B3 F0B8 F1B3 F1B4 F1B8 F8B9 F9B9
 ODDRX2 F1B3 F1B4
 
-.config_enum IOLOGICB.CLKIMUX CLK
-CLK -
-INV F0B6
+.config_enum IOLOGICB.CLKIMUX 0
+0 -
+CLK F1B6
+INV F0B6 F1B6
 
-.config_enum IOLOGICB.CLKOMUX CLK
-CLK -
-INV F7B8
+.config_enum IOLOGICB.CLKOMUX 0
+0 -
+CLK F8B8
+INV F7B8 F8B8
 
 .config_enum IOLOGICB.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -131,6 +145,11 @@
 IDDRX2 F6B7
 NONE -
 
+.config_enum IOLOGICB.IOLTOMUX TS
+NONE -
+TDDR F2B9
+TS -
+
 .config_enum IOLOGICB.LSRIMUX 0
 0 -
 LSRMUX F8B7
@@ -147,9 +166,10 @@
 MIDDRX2 F2B10 F6B7
 NONE -
 
-.config_enum IOLOGICB.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F9B10
+.config_enum IOLOGICB.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F0B9
+DQSW270 F0B9 F9B10
+NONE -
 
 .config_enum IOLOGICB.MODDRX.MODE NONE
 MODDRX2 F9B9
@@ -157,21 +177,25 @@
 NONE -
 
 .config_enum IOLOGICB.MODE NONE
-IDDRX1_ODDRX1 F1B6 F5B7 F7B10 F8B8 F8B10 F9B8
-IDDRXN F1B6 F7B10 F8B8 F8B10 F9B8
-IREG_OREG F1B6 F8B8 F8B10
-MIDDRX_MODDRX F1B6 F4B6 F7B10 F8B8 F8B10 F9B8
-NONE -
-ODDRXN F0B8 F1B6 F1B8 F7B10 F8B8 F8B10 F9B8
+IDDRX1_ODDRX1 !F4B6 F5B7 F7B10 F8B10 F9B8
+IDDRXN !F4B6 F7B10 F8B10 F9B8
+IREG_OREG !F4B6 F8B10
+MIDDRX_MODDRX F4B6 F7B10 F8B10 F9B8
+NONE !F4B6
+ODDRXN F0B8 F1B8 !F4B6 F7B10 F8B10 F9B8
 
 .config_enum IOLOGICB.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F7B9
 
 .config_enum IOLOGICB.MTDDRX.MODE NONE
-MTSHX2 F4B9 F7B9 F9B9
+MTSHX2 F9B9
 NONE -
 
+.config_enum IOLOGICB.MTDDRX.REGSET RESET
+RESET -
+SET F4B9
+
 .config_enum IOLOGICB.ODDRXN.MODE NONE
 NONE -
 ODDR71 F8B9 F9B9 F9B10
diff --git a/ECP5/tiledata/PICR0_DQS2/bits.db b/ECP5/tiledata/PICR0_DQS2/bits.db
index bc1cb0f..28d5ada 100644
--- a/ECP5/tiledata/PICR0_DQS2/bits.db
+++ b/ECP5/tiledata/PICR0_DQS2/bits.db
@@ -61,13 +61,15 @@
 NO -
 YES F1B10
 
-.config_enum IOLOGICA.CLKIMUX CLK
-CLK -
-INV F2B1
+.config_enum IOLOGICA.CLKIMUX 0
+0 -
+CLK F3B1
+INV F2B1 F3B1
 
-.config_enum IOLOGICA.CLKOMUX CLK
-CLK -
-INV F9B3
+.config_enum IOLOGICA.CLKOMUX 0
+0 -
+CLK F0B2
+INV F0B2 F9B3
 
 .config_enum IOLOGICA.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -86,6 +88,11 @@
 IDDRX2 F8B2
 NONE -
 
+.config_enum IOLOGICA.IOLTOMUX TS
+NONE -
+TDDR F4B4
+TS -
+
 .config_enum IOLOGICA.LSRIMUX 0
 0 -
 LSRMUX F0B1
@@ -102,9 +109,10 @@
 MIDDRX2 F3B10 F8B2
 NONE -
 
-.config_enum IOLOGICA.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F1B4
+.config_enum IOLOGICA.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F2B4
+DQSW270 F1B4 F2B4
+NONE -
 
 .config_enum IOLOGICA.MODDRX.MODE NONE
 MODDRX2 F1B3
@@ -112,33 +120,39 @@
 NONE -
 
 .config_enum IOLOGICA.MODE NONE
-IDDRX1_ODDRX1 F0B2 F0B4 F1B2 F3B1 F7B2 F9B5
-IDDRXN F0B2 F0B4 F1B2 F3B1 F9B5
-IREG_OREG F0B2 F0B4 F3B1
-MIDDRX_MODDRX F0B2 F0B4 F1B2 F3B1 F6B1 F9B5
-NONE -
-ODDRXN F0B2 F0B4 F1B2 F2B3 F3B1 F3B3 F9B5
+IDDRX1_ODDRX1 F0B4 F1B2 !F6B1 F7B2 F9B5
+IDDRXN F0B4 F1B2 !F6B1 F9B5
+IREG_OREG F0B4 !F6B1
+MIDDRX_MODDRX F0B4 F1B2 F6B1 F9B5
+NONE !F6B1
+ODDRXN F0B4 F1B2 F2B3 F3B3 !F6B1 F9B5
 
 .config_enum IOLOGICA.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F9B4
 
 .config_enum IOLOGICA.MTDDRX.MODE NONE
-MTSHX2 F1B3 F6B4 F9B4
+MTSHX2 F1B3
 NONE -
 
+.config_enum IOLOGICA.MTDDRX.REGSET RESET
+RESET -
+SET F6B4
+
 .config_enum IOLOGICA.ODDRXN.MODE NONE
 NONE -
 ODDR71 F0B3 F0B8 F1B3 F1B4 F1B8 F8B9 F9B9
 ODDRX2 F1B3 F1B4
 
-.config_enum IOLOGICB.CLKIMUX CLK
-CLK -
-INV F0B6
+.config_enum IOLOGICB.CLKIMUX 0
+0 -
+CLK F1B6
+INV F0B6 F1B6
 
-.config_enum IOLOGICB.CLKOMUX CLK
-CLK -
-INV F7B8
+.config_enum IOLOGICB.CLKOMUX 0
+0 -
+CLK F8B8
+INV F7B8 F8B8
 
 .config_enum IOLOGICB.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -157,6 +171,11 @@
 IDDRX2 F6B7
 NONE -
 
+.config_enum IOLOGICB.IOLTOMUX TS
+NONE -
+TDDR F2B9
+TS -
+
 .config_enum IOLOGICB.LSRIMUX 0
 0 -
 LSRMUX F8B7
@@ -173,9 +192,10 @@
 MIDDRX2 F2B10 F6B7
 NONE -
 
-.config_enum IOLOGICB.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F9B10
+.config_enum IOLOGICB.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F0B9
+DQSW270 F0B9 F9B10
+NONE -
 
 .config_enum IOLOGICB.MODDRX.MODE NONE
 MODDRX2 F9B9
@@ -183,21 +203,25 @@
 NONE -
 
 .config_enum IOLOGICB.MODE NONE
-IDDRX1_ODDRX1 F1B6 F5B7 F7B10 F8B8 F8B10 F9B8
-IDDRXN F1B6 F7B10 F8B8 F8B10 F9B8
-IREG_OREG F1B6 F8B8 F8B10
-MIDDRX_MODDRX F1B6 F4B6 F7B10 F8B8 F8B10 F9B8
-NONE -
-ODDRXN F0B8 F1B6 F1B8 F7B10 F8B8 F8B10 F9B8
+IDDRX1_ODDRX1 !F4B6 F5B7 F7B10 F8B10 F9B8
+IDDRXN !F4B6 F7B10 F8B10 F9B8
+IREG_OREG !F4B6 F8B10
+MIDDRX_MODDRX F4B6 F7B10 F8B10 F9B8
+NONE !F4B6
+ODDRXN F0B8 F1B8 !F4B6 F7B10 F8B10 F9B8
 
 .config_enum IOLOGICB.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F7B9
 
 .config_enum IOLOGICB.MTDDRX.MODE NONE
-MTSHX2 F4B9 F7B9 F9B9
+MTSHX2 F9B9
 NONE -
 
+.config_enum IOLOGICB.MTDDRX.REGSET RESET
+RESET -
+SET F4B9
+
 .config_enum IOLOGICB.ODDRXN.MODE NONE
 NONE -
 ODDR71 F8B9 F9B9 F9B10
diff --git a/ECP5/tiledata/PICR2/bits.db b/ECP5/tiledata/PICR2/bits.db
index 1cbe8b2..5f0798e 100644
--- a/ECP5/tiledata/PICR2/bits.db
+++ b/ECP5/tiledata/PICR2/bits.db
@@ -31,13 +31,15 @@
 F2B5
 F3B5
 
-.config_enum IOLOGICC.CLKIMUX CLK
-CLK -
-INV F2B1
+.config_enum IOLOGICC.CLKIMUX 0
+0 -
+CLK F3B1
+INV F2B1 F3B1
 
-.config_enum IOLOGICC.CLKOMUX CLK
-CLK -
-INV F9B3
+.config_enum IOLOGICC.CLKOMUX 0
+0 -
+CLK F0B2
+INV F0B2 F9B3
 
 .config_enum IOLOGICC.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -56,6 +58,11 @@
 IDDRX2 F8B2
 NONE -
 
+.config_enum IOLOGICC.IOLTOMUX TS
+NONE -
+TDDR F4B4
+TS -
+
 .config_enum IOLOGICC.LSRIMUX 0
 0 -
 LSRMUX F0B1
@@ -72,9 +79,10 @@
 MIDDRX2 F3B10 F8B2
 NONE -
 
-.config_enum IOLOGICC.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F1B4
+.config_enum IOLOGICC.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F2B4
+DQSW270 F1B4 F2B4
+NONE -
 
 .config_enum IOLOGICC.MODDRX.MODE NONE
 MODDRX2 F1B3
@@ -82,33 +90,39 @@
 NONE -
 
 .config_enum IOLOGICC.MODE NONE
-IDDRX1_ODDRX1 F0B2 F0B4 F1B2 F3B1 F7B2 F9B5
-IDDRXN F0B2 F0B4 F1B2 F3B1 F9B5
-IREG_OREG F0B2 F0B4 F3B1
-MIDDRX_MODDRX F0B2 F0B4 F1B2 F3B1 F6B3 F9B5
-NONE -
-ODDRXN F0B2 F0B4 F1B2 F2B3 F3B1 F3B3 F9B5
+IDDRX1_ODDRX1 F0B4 F1B2 !F6B3 F7B2 F9B5
+IDDRXN F0B4 F1B2 !F6B3 F9B5
+IREG_OREG F0B4 !F6B3
+MIDDRX_MODDRX F0B4 F1B2 F6B3 F9B5
+NONE !F6B3
+ODDRXN F0B4 F1B2 F2B3 F3B3 !F6B3 F9B5
 
 .config_enum IOLOGICC.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F9B4
 
 .config_enum IOLOGICC.MTDDRX.MODE NONE
-MTSHX2 F1B3 F6B4 F9B4
+MTSHX2 F1B3
 NONE -
 
+.config_enum IOLOGICC.MTDDRX.REGSET RESET
+RESET -
+SET F6B4
+
 .config_enum IOLOGICC.ODDRXN.MODE NONE
 NONE -
 ODDR71 F0B3 F0B8 F1B3 F1B4 F7B9 F8B9 F9B9
 ODDRX2 F1B3 F1B4
 
-.config_enum IOLOGICD.CLKIMUX CLK
-CLK -
-INV F0B6
+.config_enum IOLOGICD.CLKIMUX 0
+0 -
+CLK F1B6
+INV F0B6 F1B6
 
-.config_enum IOLOGICD.CLKOMUX CLK
-CLK -
-INV F7B8
+.config_enum IOLOGICD.CLKOMUX 0
+0 -
+CLK F8B8
+INV F7B8 F8B8
 
 .config_enum IOLOGICD.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -127,6 +141,11 @@
 IDDRX2 F6B7
 NONE -
 
+.config_enum IOLOGICD.IOLTOMUX TS
+NONE -
+TDDR F1B9
+TS -
+
 .config_enum IOLOGICD.LSRIMUX 0
 0 -
 LSRMUX F8B7
@@ -143,9 +162,10 @@
 MIDDRX2 F2B10 F6B7
 NONE -
 
-.config_enum IOLOGICD.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F8B10
+.config_enum IOLOGICD.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F9B10
+DQSW270 F8B10 F9B10
+NONE -
 
 .config_enum IOLOGICD.MODDRX.MODE NONE
 MODDRX2 F8B9
@@ -153,21 +173,25 @@
 NONE -
 
 .config_enum IOLOGICD.MODE NONE
-IDDRX1_ODDRX1 F1B6 F5B7 F6B10 F7B10 F8B8 F9B8
-IDDRXN F1B6 F6B10 F7B10 F8B8 F9B8
-IREG_OREG F1B6 F7B10 F8B8
-MIDDRX_MODDRX F1B6 F4B6 F6B10 F7B10 F8B8 F9B8
-NONE -
-ODDRXN F0B8 F1B6 F6B10 F7B10 F8B8 F9B8 F9B9
+IDDRX1_ODDRX1 !F4B6 F5B7 F6B10 F7B10 F9B8
+IDDRXN !F4B6 F6B10 F7B10 F9B8
+IREG_OREG !F4B6 F7B10
+MIDDRX_MODDRX F4B6 F6B10 F7B10 F9B8
+NONE !F4B6
+ODDRXN F0B8 !F4B6 F6B10 F7B10 F9B8 F9B9
 
 .config_enum IOLOGICD.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F6B9
 
 .config_enum IOLOGICD.MTDDRX.MODE NONE
-MTSHX2 F3B9 F6B9 F8B9
+MTSHX2 F8B9
 NONE -
 
+.config_enum IOLOGICD.MTDDRX.REGSET RESET
+RESET -
+SET F3B9
+
 .config_enum IOLOGICD.ODDRXN.MODE NONE
 NONE -
 ODDR71 F7B9 F8B9 F8B10
diff --git a/ECP5/tiledata/PICR2_DQS1/bits.db b/ECP5/tiledata/PICR2_DQS1/bits.db
index 7c80eee..9bc38ec 100644
--- a/ECP5/tiledata/PICR2_DQS1/bits.db
+++ b/ECP5/tiledata/PICR2_DQS1/bits.db
@@ -53,13 +53,15 @@
 NO -
 YES F0B11
 
-.config_enum IOLOGICC.CLKIMUX CLK
-CLK -
-INV F2B1
+.config_enum IOLOGICC.CLKIMUX 0
+0 -
+CLK F3B1
+INV F2B1 F3B1
 
-.config_enum IOLOGICC.CLKOMUX CLK
-CLK -
-INV F9B3
+.config_enum IOLOGICC.CLKOMUX 0
+0 -
+CLK F0B2
+INV F0B2 F9B3
 
 .config_enum IOLOGICC.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -78,6 +80,11 @@
 IDDRX2 F8B2
 NONE -
 
+.config_enum IOLOGICC.IOLTOMUX TS
+NONE -
+TDDR F4B4
+TS -
+
 .config_enum IOLOGICC.LSRIMUX 0
 0 -
 LSRMUX F0B1
@@ -94,9 +101,10 @@
 MIDDRX2 F3B10 F8B2
 NONE -
 
-.config_enum IOLOGICC.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F1B4
+.config_enum IOLOGICC.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F2B4
+DQSW270 F1B4 F2B4
+NONE -
 
 .config_enum IOLOGICC.MODDRX.MODE NONE
 MODDRX2 F1B3
@@ -104,33 +112,39 @@
 NONE -
 
 .config_enum IOLOGICC.MODE NONE
-IDDRX1_ODDRX1 F0B2 F0B4 F1B2 F3B1 F7B2 F9B5
-IDDRXN F0B2 F0B4 F1B2 F3B1 F9B5
-IREG_OREG F0B2 F0B4 F3B1
-MIDDRX_MODDRX F0B2 F0B4 F1B2 F3B1 F6B3 F9B5
-NONE -
-ODDRXN F0B2 F0B4 F1B2 F2B3 F3B1 F3B3 F9B5
+IDDRX1_ODDRX1 F0B4 F1B2 !F6B3 F7B2 F9B5
+IDDRXN F0B4 F1B2 !F6B3 F9B5
+IREG_OREG F0B4 !F6B3
+MIDDRX_MODDRX F0B4 F1B2 F6B3 F9B5
+NONE !F6B3
+ODDRXN F0B4 F1B2 F2B3 F3B3 !F6B3 F9B5
 
 .config_enum IOLOGICC.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F9B4
 
 .config_enum IOLOGICC.MTDDRX.MODE NONE
-MTSHX2 F1B3 F6B4 F9B4
+MTSHX2 F1B3
 NONE -
 
+.config_enum IOLOGICC.MTDDRX.REGSET RESET
+RESET -
+SET F6B4
+
 .config_enum IOLOGICC.ODDRXN.MODE NONE
 NONE -
 ODDR71 F0B3 F0B8 F1B3 F1B4 F7B9 F8B9 F9B9
 ODDRX2 F1B3 F1B4
 
-.config_enum IOLOGICD.CLKIMUX CLK
-CLK -
-INV F0B6
+.config_enum IOLOGICD.CLKIMUX 0
+0 -
+CLK F1B6
+INV F0B6 F1B6
 
-.config_enum IOLOGICD.CLKOMUX CLK
-CLK -
-INV F7B8
+.config_enum IOLOGICD.CLKOMUX 0
+0 -
+CLK F8B8
+INV F7B8 F8B8
 
 .config_enum IOLOGICD.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -149,6 +163,11 @@
 IDDRX2 F6B7
 NONE -
 
+.config_enum IOLOGICD.IOLTOMUX TS
+NONE -
+TDDR F1B9
+TS -
+
 .config_enum IOLOGICD.LSRIMUX 0
 0 -
 LSRMUX F8B7
@@ -165,9 +184,10 @@
 MIDDRX2 F2B10 F6B7
 NONE -
 
-.config_enum IOLOGICD.MIDDRX_MODDRX.WRCLKMUX DQSW
-DQSW -
-DQSW270 F8B10
+.config_enum IOLOGICD.MIDDRX_MODDRX.WRCLKMUX NONE
+DQSW F9B10
+DQSW270 F8B10 F9B10
+NONE -
 
 .config_enum IOLOGICD.MODDRX.MODE NONE
 MODDRX2 F8B9
@@ -175,21 +195,25 @@
 NONE -
 
 .config_enum IOLOGICD.MODE NONE
-IDDRX1_ODDRX1 F1B6 F5B7 F6B10 F7B10 F8B8 F9B8
-IDDRXN F1B6 F6B10 F7B10 F8B8 F9B8
-IREG_OREG F1B6 F7B10 F8B8
-MIDDRX_MODDRX F1B6 F4B6 F6B10 F7B10 F8B8 F9B8
-NONE -
-ODDRXN F0B8 F1B6 F6B10 F7B10 F8B8 F9B8 F9B9
+IDDRX1_ODDRX1 !F4B6 F5B7 F6B10 F7B10 F9B8
+IDDRXN !F4B6 F6B10 F7B10 F9B8
+IREG_OREG !F4B6 F7B10
+MIDDRX_MODDRX F4B6 F6B10 F7B10 F9B8
+NONE !F4B6
+ODDRXN F0B8 !F4B6 F6B10 F7B10 F9B8 F9B9
 
 .config_enum IOLOGICD.MTDDRX.DQSW_INVERT DISABLED
 DISABLED -
 ENABLED F6B9
 
 .config_enum IOLOGICD.MTDDRX.MODE NONE
-MTSHX2 F3B9 F6B9 F8B9
+MTSHX2 F8B9
 NONE -
 
+.config_enum IOLOGICD.MTDDRX.REGSET RESET
+RESET -
+SET F3B9
+
 .config_enum IOLOGICD.ODDRXN.MODE NONE
 NONE -
 ODDR71 F7B9 F8B9 F8B10
diff --git a/ECP5/tiledata/PICT0/bits.db b/ECP5/tiledata/PICT0/bits.db
index e12453e..cd3e15c 100644
--- a/ECP5/tiledata/PICT0/bits.db
+++ b/ECP5/tiledata/PICT0/bits.db
@@ -13,13 +13,15 @@
 F5B0
 F4B0
 
-.config_enum IOLOGICA.CLKIMUX CLK
-CLK -
-INV F20B0
+.config_enum IOLOGICA.CLKIMUX 0
+0 -
+CLK F19B0
+INV F19B0 F20B0
 
-.config_enum IOLOGICA.CLKOMUX CLK
-CLK -
-INV F43B0
+.config_enum IOLOGICA.CLKOMUX 0
+0 -
+CLK F42B0
+INV F42B0 F43B0
 
 .config_enum IOLOGICA.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -45,9 +47,9 @@
 0 -
 LSRMUX F45B0
 
-.config_enum IOLOGICA.MODE NONE
-IDDRX1_ODDRX1 F19B0 F26B0 F41B0 F42B0 F64B0
-IREG_OREG F19B0 F42B0
+.config_enum IOLOGICA.MODE IREG_OREG
+IDDRX1_ODDRX1 F26B0 F41B0 F64B0
+IREG_OREG -
 NONE -
 
 .config_enum PIOA.BASE_TYPE INPUT_LVCMOS12
diff --git a/ECP5/tiledata/PICT1/bits.db b/ECP5/tiledata/PICT1/bits.db
index ccdf36d..6c32957 100644
--- a/ECP5/tiledata/PICT1/bits.db
+++ b/ECP5/tiledata/PICT1/bits.db
@@ -13,13 +13,15 @@
 F5B0
 F4B0
 
-.config_enum IOLOGICB.CLKIMUX CLK
-CLK -
-INV F20B0
+.config_enum IOLOGICB.CLKIMUX 0
+0 -
+CLK F19B0
+INV F19B0 F20B0
 
-.config_enum IOLOGICB.CLKOMUX CLK
-CLK -
-INV F43B0
+.config_enum IOLOGICB.CLKOMUX 0
+0 -
+CLK F42B0
+INV F42B0 F43B0
 
 .config_enum IOLOGICB.DELAY.OUTDEL DISABLED
 DISABLED -
@@ -45,9 +47,9 @@
 0 -
 LSRMUX F45B0
 
-.config_enum IOLOGICB.MODE NONE
-IDDRX1_ODDRX1 F19B0 F26B0 F41B0 F42B0 F64B0
-IREG_OREG F19B0 F42B0
+.config_enum IOLOGICB.MODE IREG_OREG
+IDDRX1_ODDRX1 F26B0 F41B0 F64B0
+IREG_OREG -
 NONE -
 
 .config_enum PIOB.BASE_TYPE INPUT_LVCMOS12