Add CCLK data

Signed-off-by: David Shah <davey1576@gmail.com>

ECP5/tiledata/EFB1_PICB1/bits.db

diff --git a/ECP5/tiledata/EFB1_PICB1/bits.db b/ECP5/tiledata/EFB1_PICB1/bits.db
index d5e3425..f191618 100644
--- a/ECP5/tiledata/EFB1_PICB1/bits.db
+++ b/ECP5/tiledata/EFB1_PICB1/bits.db
@@ -50,3 +50,9 @@
 
 
 # Fixed Connections
+.fixed_conn N1_JF5 W5_JPADDI_CCLK
+
+.fixed_conn W5_JPADDO_CCLK N1_JA4
+
+.fixed_conn W5_JPADDT_CCLK N1_JB4
+

ECP5/tiledata/EFB3_PICB1/bits.db

diff --git a/ECP5/tiledata/EFB3_PICB1/bits.db b/ECP5/tiledata/EFB3_PICB1/bits.db
index d5e3425..9e560bd 100644
--- a/ECP5/tiledata/EFB3_PICB1/bits.db
+++ b/ECP5/tiledata/EFB3_PICB1/bits.db
@@ -4,6 +4,10 @@
 
 
 # Non-Routing Configuration
+.config_enum CCLK.MODE NONE
+NONE !F40B1
+USRMCLK F40B1
+
 .config_enum PIOB.BASE_TYPE NONE
 BIDIR_LVCMOS12 F0B1 F2B1 F7B1 F54B0 F55B0
 BIDIR_LVCMOS15 F5B1 F23B1 F54B0 F55B0