diff --git a/ECP5/tiledata/PICL0/bits.db b/ECP5/tiledata/PICL0/bits.db
index 22b2812..c51a3a1 100644
--- a/ECP5/tiledata/PICL0/bits.db
+++ b/ECP5/tiledata/PICL0/bits.db
@@ -17,6 +17,30 @@
 
 
 # Non-Routing Configuration
+.config_enum IOLOGICA.CLKIMUX CLK
+CLK -
+INV F7B1
+
+.config_enum IOLOGICA.CLKOMUX CLK
+CLK -
+INV F0B3
+
+.config_enum IOLOGICA.GSR ENABLED
+DISABLED F2B1
+ENABLED -
+
+.config_enum IOLOGICA.LSRIMUX 0
+0 -
+LSRMUX F9B1
+
+.config_enum IOLOGICA.LSRMUX INV
+INV -
+LSR F4B2
+
+.config_enum IOLOGICA.LSROMUX 0
+0 -
+LSRMUX F2B3
+
 .config_enum IOLOGICA.MODE NONE
 IDDRX1_ODDRX1 F0B5 F2B2 F6B1 F8B2 F9B2 F9B4
 IDDRXN F0B5 F6B1 F8B2 F9B2 F9B4
@@ -25,6 +49,38 @@
 NONE -
 ODDRXN F0B5 F6B1 F6B3 F7B3 F8B2 F9B2 F9B4
 
+.config_enum IOLOGICB.CLKIMUX CLK
+CLK -
+INV F9B6
+
+.config_enum IOLOGICB.CLKOMUX CLK
+CLK -
+INV F2B8
+
+.config_enum IOLOGICB.GSR ENABLED
+DISABLED F4B6
+ENABLED -
+
+.config_enum IOLOGICB.LSRIMUX 0
+0 -
+LSRMUX F1B7
+
+.config_enum IOLOGICB.LSRMUX INV
+INV -
+LSR F6B7
+
+.config_enum IOLOGICB.LSROMUX 0
+0 -
+LSRMUX F4B8
+
+.config_enum IOLOGICB.MODE NONE
+IDDRX1_ODDRX1 F0B8 F1B8 F1B10 F2B10 F4B7 F8B6
+IDDRXN F0B8 F1B8 F1B10 F2B10 F8B6
+IREG_OREG F1B8 F1B10 F8B6
+MIDDRX_MODDRX F0B8 F1B8 F1B10 F2B10 F5B6 F8B6
+NONE -
+ODDRXN F0B8 F1B8 F1B10 F2B10 F8B6 F8B8 F9B8
+
 .config_enum PIOA.BASE_TYPE INPUT_LVCMOS18D
 BIDIR_BLVDS25E F1B1 F1B4 F2B4 F3B6 F3B9 F4B9
 BIDIR_HSUL12 F1B4 F2B4
diff --git a/ECP5/tiledata/PICL2/bits.db b/ECP5/tiledata/PICL2/bits.db
index 485f88d..578bc4f 100644
--- a/ECP5/tiledata/PICL2/bits.db
+++ b/ECP5/tiledata/PICL2/bits.db
@@ -13,6 +13,70 @@
 
 
 # Non-Routing Configuration
+.config_enum IOLOGICC.CLKIMUX CLK
+CLK -
+INV F7B1
+
+.config_enum IOLOGICC.CLKOMUX CLK
+CLK -
+INV F0B3
+
+.config_enum IOLOGICC.GSR ENABLED
+DISABLED F2B1
+ENABLED -
+
+.config_enum IOLOGICC.LSRIMUX 0
+0 -
+LSRMUX F9B1
+
+.config_enum IOLOGICC.LSRMUX INV
+INV -
+LSR F4B2
+
+.config_enum IOLOGICC.LSROMUX 0
+0 -
+LSRMUX F2B3
+
+.config_enum IOLOGICC.MODE NONE
+IDDRX1_ODDRX1 F0B5 F2B2 F6B1 F8B2 F9B2 F9B4
+IDDRXN F0B5 F6B1 F8B2 F9B2 F9B4
+IREG_OREG F6B1 F9B2 F9B4
+MIDDRX_MODDRX F0B5 F3B3 F6B1 F8B2 F9B2 F9B4
+NONE -
+ODDRXN F0B5 F6B1 F6B3 F7B3 F8B2 F9B2 F9B4
+
+.config_enum IOLOGICD.CLKIMUX CLK
+CLK -
+INV F9B6
+
+.config_enum IOLOGICD.CLKOMUX CLK
+CLK -
+INV F2B8
+
+.config_enum IOLOGICD.GSR ENABLED
+DISABLED F4B6
+ENABLED -
+
+.config_enum IOLOGICD.LSRIMUX 0
+0 -
+LSRMUX F1B7
+
+.config_enum IOLOGICD.LSRMUX INV
+INV -
+LSR F6B7
+
+.config_enum IOLOGICD.LSROMUX 0
+0 -
+LSRMUX F4B8
+
+.config_enum IOLOGICD.MODE NONE
+IDDRX1_ODDRX1 F0B8 F1B8 F2B10 F3B10 F4B7 F8B6
+IDDRXN F0B8 F1B8 F2B10 F3B10 F8B6
+IREG_OREG F1B8 F2B10 F8B6
+MIDDRX_MODDRX F0B8 F1B8 F2B10 F3B10 F5B6 F8B6
+NONE -
+ODDRXN F0B8 F0B9 F1B8 F2B10 F3B10 F8B6 F9B8
+
 .config_enum PIOC.BASE_TYPE INPUT_LVCMOS18D
 BIDIR_BLVDS25E F1B1 F1B4 F2B4 F3B6 F4B9 F5B9
 BIDIR_HSUL12 F1B4 F2B4
diff --git a/ECP5/tiledata/PICR0/bits.db b/ECP5/tiledata/PICR0/bits.db
index c610472..01a18ca 100644
--- a/ECP5/tiledata/PICR0/bits.db
+++ b/ECP5/tiledata/PICR0/bits.db
@@ -17,6 +17,70 @@
 
 
 # Non-Routing Configuration
+.config_enum IOLOGICA.CLKIMUX CLK
+CLK -
+INV F2B1
+
+.config_enum IOLOGICA.CLKOMUX CLK
+CLK -
+INV F9B3
+
+.config_enum IOLOGICA.GSR ENABLED
+DISABLED F7B1
+ENABLED -
+
+.config_enum IOLOGICA.LSRIMUX 0
+0 -
+LSRMUX F0B1
+
+.config_enum IOLOGICA.LSRMUX INV
+INV -
+LSR F5B2
+
+.config_enum IOLOGICA.LSROMUX 0
+0 -
+LSRMUX F7B3
+
+.config_enum IOLOGICA.MODE NONE
+IDDRX1_ODDRX1 F0B2 F0B4 F1B2 F3B1 F7B2 F9B5
+IDDRXN F0B2 F0B4 F1B2 F3B1 F9B5
+IREG_OREG F0B2 F0B4 F3B1
+MIDDRX_MODDRX F0B2 F0B4 F1B2 F3B1 F6B1 F9B5
+NONE -
+ODDRXN F0B2 F0B4 F1B2 F2B3 F3B1 F3B3 F9B5
+
+.config_enum IOLOGICB.CLKIMUX CLK
+CLK -
+INV F0B6
+
+.config_enum IOLOGICB.CLKOMUX CLK
+CLK -
+INV F7B8
+
+.config_enum IOLOGICB.GSR ENABLED
+DISABLED F5B6
+ENABLED -
+
+.config_enum IOLOGICB.LSRIMUX 0
+0 -
+LSRMUX F8B7
+
+.config_enum IOLOGICB.LSRMUX INV
+INV -
+LSR F3B7
+
+.config_enum IOLOGICB.LSROMUX 0
+0 -
+LSRMUX F5B8
+
+.config_enum IOLOGICB.MODE NONE
+IDDRX1_ODDRX1 F1B6 F5B7 F7B10 F8B8 F8B10 F9B8
+IDDRXN F1B6 F7B10 F8B8 F8B10 F9B8
+IREG_OREG F1B6 F8B8 F8B10
+MIDDRX_MODDRX F1B6 F4B6 F7B10 F8B8 F8B10 F9B8
+NONE -
+ODDRXN F0B8 F1B6 F1B8 F7B10 F8B8 F8B10 F9B8
+
 .config_enum PIOA.BASE_TYPE INPUT_LVCMOS18D
 BIDIR_BLVDS25E F5B9 F6B6 F6B9 F7B4 F8B1 F8B4
 BIDIR_HSUL12 F7B4 F8B4
diff --git a/ECP5/tiledata/PICR2/bits.db b/ECP5/tiledata/PICR2/bits.db
index 4a7fbaf..7a58c76 100644
--- a/ECP5/tiledata/PICR2/bits.db
+++ b/ECP5/tiledata/PICR2/bits.db
@@ -13,6 +13,70 @@
 
 
 # Non-Routing Configuration
+.config_enum IOLOGICC.CLKIMUX CLK
+CLK -
+INV F2B1
+
+.config_enum IOLOGICC.CLKOMUX CLK
+CLK -
+INV F9B3
+
+.config_enum IOLOGICC.GSR ENABLED
+DISABLED F7B1
+ENABLED -
+
+.config_enum IOLOGICC.LSRIMUX 0
+0 -
+LSRMUX F0B1
+
+.config_enum IOLOGICC.LSRMUX INV
+INV -
+LSR F5B2
+
+.config_enum IOLOGICC.LSROMUX 0
+0 -
+LSRMUX F7B3
+
+.config_enum IOLOGICC.MODE NONE
+IDDRX1_ODDRX1 F0B2 F0B4 F1B2 F3B1 F7B2 F9B5
+IDDRXN F0B2 F0B4 F1B2 F3B1 F9B5
+IREG_OREG F0B2 F0B4 F3B1
+MIDDRX_MODDRX F0B2 F0B4 F1B2 F3B1 F6B3 F9B5
+NONE -
+ODDRXN F0B2 F0B4 F1B2 F2B3 F3B1 F3B3 F9B5
+
+.config_enum IOLOGICD.CLKIMUX CLK
+CLK -
+INV F0B6
+
+.config_enum IOLOGICD.CLKOMUX CLK
+CLK -
+INV F7B8
+
+.config_enum IOLOGICD.GSR ENABLED
+DISABLED F5B6
+ENABLED -
+
+.config_enum IOLOGICD.LSRIMUX 0
+0 -
+LSRMUX F8B7
+
+.config_enum IOLOGICD.LSRMUX INV
+INV -
+LSR F3B7
+
+.config_enum IOLOGICD.LSROMUX 0
+0 -
+LSRMUX F5B8
+
+.config_enum IOLOGICD.MODE NONE
+IDDRX1_ODDRX1 F1B6 F5B7 F6B10 F7B10 F8B8 F9B8
+IDDRXN F1B6 F6B10 F7B10 F8B8 F9B8
+IREG_OREG F1B6 F7B10 F8B8
+MIDDRX_MODDRX F1B6 F4B6 F6B10 F7B10 F8B8 F9B8
+NONE -
+ODDRXN F0B8 F1B6 F6B10 F7B10 F8B8 F9B8 F9B9
+
 .config_enum PIOC.BASE_TYPE INPUT_LVCMOS18D
 BIDIR_BLVDS25E F4B9 F5B9 F6B6 F7B4 F8B1 F8B4
 BIDIR_HSUL12 F7B4 F8B4
diff --git a/ECP5/tiledata/PICT0/bits.db b/ECP5/tiledata/PICT0/bits.db
index f5ec918..ec716b5 100644
--- a/ECP5/tiledata/PICT0/bits.db
+++ b/ECP5/tiledata/PICT0/bits.db
@@ -4,6 +4,35 @@
 
 
 # Non-Routing Configuration
+.config_enum IOLOGICA.CLKIMUX CLK
+CLK -
+INV F20B0
+
+.config_enum IOLOGICA.CLKOMUX CLK
+CLK -
+INV F43B0
+
+.config_enum IOLOGICA.GSR ENABLED
+DISABLED F12B0
+ENABLED -
+
+.config_enum IOLOGICA.LSRIMUX 0
+0 -
+LSRMUX F22B0
+
+.config_enum IOLOGICA.LSRMUX INV
+INV -
+LSR F32B0
+
+.config_enum IOLOGICA.LSROMUX 0
+0 -
+LSRMUX F45B0
+
+.config_enum IOLOGICA.MODE NONE
+IDDRX1_ODDRX1 F19B0 F26B0 F41B0 F42B0 F64B0
+IREG_OREG F19B0 F42B0
+NONE -
+
 .config_enum PIOA.BASE_TYPE INPUT_LVCMOS12
 BIDIR_LVCMOS12 F54B0 F55B0
 BIDIR_LVCMOS15 F54B0 F55B0
diff --git a/ECP5/tiledata/PICT1/bits.db b/ECP5/tiledata/PICT1/bits.db
index a9d03e4..409037f 100644
--- a/ECP5/tiledata/PICT1/bits.db
+++ b/ECP5/tiledata/PICT1/bits.db
@@ -4,6 +4,35 @@
 
 
 # Non-Routing Configuration
+.config_enum IOLOGICB.CLKIMUX CLK
+CLK -
+INV F20B0
+
+.config_enum IOLOGICB.CLKOMUX CLK
+CLK -
+INV F43B0
+
+.config_enum IOLOGICB.GSR ENABLED
+DISABLED F12B0
+ENABLED -
+
+.config_enum IOLOGICB.LSRIMUX 0
+0 -
+LSRMUX F22B0
+
+.config_enum IOLOGICB.LSRMUX INV
+INV -
+LSR F32B0
+
+.config_enum IOLOGICB.LSROMUX 0
+0 -
+LSRMUX F45B0
+
+.config_enum IOLOGICB.MODE NONE
+IDDRX1_ODDRX1 F19B0 F26B0 F41B0 F42B0 F64B0
+IREG_OREG F19B0 F42B0
+NONE -
+
 .config_enum PIOB.BASE_TYPE INPUT_LVCMOS12
 BIDIR_LVCMOS12 F54B0 F55B0
 BIDIR_LVCMOS15 F54B0 F55B0