Update to prjtrellis 4d4fb79a5a3ce199b9ffea1fe79f4e4619c6c788
Signed-off-by: David Shah <davey1576@gmail.com>
diff --git a/ECP5/tiledata/MIB2_DSP4/bits.db b/ECP5/tiledata/MIB2_DSP4/bits.db
index 1c884bd..d3165ce 100644
--- a/ECP5/tiledata/MIB2_DSP4/bits.db
+++ b/ECP5/tiledata/MIB2_DSP4/bits.db
@@ -1,6 +1,122 @@
# Routing Mux Bits
# Non-Routing Configuration
+.config ALU54_7.MASKPAT 11110011001100110011001100110011000100010001000100010011
+-
+-
+F103B1
+F83B0
+-
+F76B0
+F101B1
+F82B0
+-
+F60B0
+F105B0
+F81B0
+-
+F74B0
+F104B0
+F68B0
+-
+F72B0
+F103B0
+F59B0
+-
+F73B0
+F102B0
+F55B0
+-
+-
+F101B0
+F57B0
+-
+-
+F100B0
+F56B0
+-
+-
+F99B0
+F77B0
+-
+-
+F98B0
+F80B0
+-
+-
+F97B0
+F79B0
+-
+-
+F96B0
+F58B0
+-
+-
+F95B0
+F54B0
+-
+-
+-
+-
+
+.config ALU54_7.MCPAT 11110101011101110111011101010101000100110111010101010001
+-
+F65B0
+F63B0
+F84B0
+-
+F66B0
+-
+F85B0
+-
+F67B0
+-
+F70B0
+-
+-
+-
+F69B0
+-
+-
+F64B0
+F71B0
+-
+F62B0
+F94B0
+F93B0
+-
+F61B0
+-
+F92B0
+-
+F75B0
+-
+F91B0
+-
+-
+-
+F90B0
+-
+-
+-
+F89B0
+-
+-
+-
+F88B0
+-
+-
+-
+F87B0
+-
+F78B0
+-
+F86B0
+-
+-
+-
+-
+
.config_enum ALU54_3.REG_INPUTC0_CLK NONE
CLK0 F12B1 F13B1
CLK1 F12B1 F13B1
@@ -34,6 +150,50 @@
CLK3 F10B1 F11B1
NONE -
+.config_enum ALU54_7.LEGACY DISABLED
+DISABLED -
+ENABLED F98B1
+
+.config_enum ALU54_7.MASKPAT_SOURCE DYNAMIC
+DYNAMIC -
+STATIC F100B1
+
+.config_enum ALU54_7.MCPAT_SOURCE DYNAMIC
+DYNAMIC -
+STATIC F99B1
+
+.config_enum ALU54_7.MODE NONE
+ALU54B F93B1
+NONE -
+
+.config_enum ALU54_7.REG_FLAG_CLK NONE
+CLK0 F95B1 F96B1
+CLK1 F95B1 F96B1
+CLK2 F95B1 F96B1
+CLK3 F95B1 F96B1
+NONE -
+
+.config_enum ALU54_7.REG_INPUTC1_CLK NONE
+CLK0 F60B1 F61B1
+CLK1 F60B1 F61B1
+CLK2 F60B1 F61B1
+CLK3 F60B1 F61B1
+NONE -
+
+.config_enum ALU54_7.REG_OUTPUT0_CLK NONE
+CLK0 F92B1 F94B1
+CLK1 F92B1 F94B1
+CLK2 F92B1 F94B1
+CLK3 F92B1 F94B1
+NONE -
+
+.config_enum ALU54_7.REG_OUTPUT1_CLK NONE
+CLK0 F95B1 F96B1
+CLK1 F95B1 F96B1
+CLK2 F95B1 F96B1
+CLK3 F95B1 F96B1
+NONE -
+
.config_enum MULT18_0.REG_INPUTA_CE CE3
CE0 F2B1 F3B1 F17B1 F18B1 F42B1 F43B1
CE1 F3B1 F17B1 F43B1
diff --git a/ECP5/tiledata/MIB2_DSP5/bits.db b/ECP5/tiledata/MIB2_DSP5/bits.db
index d0bc3e3..bedfcab 100644
--- a/ECP5/tiledata/MIB2_DSP5/bits.db
+++ b/ECP5/tiledata/MIB2_DSP5/bits.db
@@ -1,6 +1,271 @@
# Routing Mux Bits
# Non-Routing Configuration
+.config ALU54_7.MASK01 10000000000000000000000000000000000000000000000000000000
+F54B0
+F55B0
+F56B0
+F60B0
+F50B0
+F51B0
+F57B0
+F58B0
+F61B0
+F62B0
+F59B0
+F63B0
+F64B0
+F65B0
+F66B0
+F67B0
+F68B0
+F0B1
+F1B1
+F2B1
+F3B1
+F4B1
+F5B1
+F6B1
+F7B1
+F8B1
+F9B1
+F10B1
+F11B1
+F12B1
+F13B1
+F14B1
+F15B1
+F17B1
+F18B1
+F19B1
+F20B1
+F23B1
+F24B1
+F25B1
+F26B1
+F29B1
+F33B1
+F34B1
+F35B1
+F36B1
+F37B1
+F38B1
+F46B1
+F45B1
+F44B1
+F43B1
+F42B1
+F41B1
+F40B1
+-
+
+.config ALU54_7.MASKPAT 11001100110011001100110011001100111011101110111011101100
+F31B1
+F22B0
+-
+-
+F35B0
+-
+-
+-
+F34B0
+-
+-
+-
+F25B0
+-
+-
+-
+F33B0
+-
+-
+-
+F32B0
+-
+-
+-
+F31B0
+F12B0
+-
+-
+F30B0
+F14B0
+-
+-
+F29B0
+F13B0
+-
+-
+F24B0
+F11B0
+-
+-
+F28B0
+F10B0
+-
+-
+F23B0
+F9B0
+-
+-
+F27B0
+F8B0
+-
+-
+F26B0
+F7B0
+-
+-
+
+.config ALU54_7.MCPAT 11001010100010001000100010101010111011001000101010101110
+F49B0
+-
+-
+-
+F48B0
+-
+F69B0
+-
+F47B0
+-
+F70B0
+-
+F46B0
+F21B0
+F71B0
+-
+F45B0
+F20B0
+-
+-
+F44B0
+-
+-
+-
+F43B0
+-
+F6B0
+-
+F42B0
+-
+F5B0
+-
+F41B0
+F19B0
+F4B0
+-
+F40B0
+F18B0
+F3B0
+-
+F39B0
+F16B0
+F2B0
+-
+F38B0
+F15B0
+F1B0
+-
+F37B0
+-
+F0B0
+-
+F36B0
+F17B0
+-
+-
+
+.config ALU54_7.RNDPAT 11000000000000000000000011111111111111111111111111111111
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+F86B0
+F90B0
+F85B0
+F91B0
+F84B0
+F89B0
+F83B0
+F92B0
+F87B0
+F88B0
+F82B0
+F93B0
+F73B0
+F77B0
+F76B0
+F78B0
+F74B0
+F79B0
+F75B0
+F80B0
+F72B0
+F81B0
+-
+-
+
+.config_enum ALU54_7.REG_OPCODEIN_1_CLK CLK3
+CLK0 -
+CLK1 -
+CLK2 -
+CLK3 -
+NONE F28B1
+
+.config_enum ALU54_7.REG_OPCODEOP0_0_CE CE3
+CE0 F56B1 F57B1
+CE1 F57B1
+CE2 F56B1
+CE3 -
+
+.config_enum ALU54_7.REG_OPCODEOP0_1_CE CE3
+CE0 F59B1 F63B1
+CE1 F63B1
+CE2 F59B1
+CE3 -
+
+.config_enum ALU54_7.REG_OPCODEOP0_1_CLK CLK3
+CLK0 -
+CLK1 -
+CLK2 -
+CLK3 -
+NONE F16B1
+
+.config_enum ALU54_7.REG_OPCODEOP1_1_CLK CLK3
+CLK0 -
+CLK1 -
+CLK2 -
+CLK3 -
+NONE F21B1
+
.config_enum MULT18_4.REG_INPUTA_RST RST3
RST0 F100B1 F101B1
RST1 F101B1
diff --git a/ECP5/tiledata/MIB2_DSP6/bits.db b/ECP5/tiledata/MIB2_DSP6/bits.db
index 41ad503..4771a89 100644
--- a/ECP5/tiledata/MIB2_DSP6/bits.db
+++ b/ECP5/tiledata/MIB2_DSP6/bits.db
@@ -1,6 +1,130 @@
# Routing Mux Bits
# Non-Routing Configuration
+.config ALU54_7.RNDPAT 11111111111111111111111100111011100101110000000000000000
+F26B0
+F33B0
+F28B0
+F34B0
+F29B0
+F35B0
+F25B0
+F36B0
+F24B0
+F22B0
+F30B0
+F32B0
+F23B0
+F21B0
+F27B0
+F31B0
+-
+-
+-
+F100B0
+-
+F101B0
+F102B0
+-
+-
+-
+F103B0
+-
+-
+-
+F105B0
+F104B0
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+
+.config_enum ALU54_7.FORCE_ZERO_BARREL_SHIFT ENABLED
+DISABLED F19B0
+ENABLED -
+
+.config_enum ALU54_7.MODE NONE
+ALU54B F18B0 F23B1 F33B1 F37B0 F48B0 F55B0 F67B0
+NONE -
+
+.config_enum ALU54_7.REG_INPUTC0_CLK NONE
+CLK0 F40B1 F42B1 F46B1 F47B1
+CLK1 F42B1 F46B1 F47B1
+CLK2 F40B1 F46B1 F47B1
+CLK3 F46B1 F47B1
+NONE -
+
+.config_enum ALU54_7.REG_INPUTC1_CLK NONE
+CLK0 F48B1 F49B1
+CLK1 F48B1 F49B1
+CLK2 F48B1 F49B1
+CLK3 F48B1 F49B1
+NONE -
+
+.config_enum ALU54_7.REG_OPCODEIN_0_CLK CLK3
+CLK0 F94B1 F95B1
+CLK1 F95B1
+CLK2 F94B1
+CLK3 -
+NONE -
+
+.config_enum ALU54_7.REG_OPCODEIN_1_CLK CLK3
+CLK0 F96B1 F97B1
+CLK1 F97B1
+CLK2 F96B1
+CLK3 -
+NONE -
+
+.config_enum ALU54_7.REG_OUTPUT0_CLK NONE
+CLK0 F62B1 F63B1 F102B1 F103B1
+CLK1 F63B1 F102B1 F103B1
+CLK2 F62B1 F102B1 F103B1
+CLK3 F102B1 F103B1
+NONE -
+
+.config_enum ALU54_7.REG_OUTPUT0_RST RST3
+RST0 F78B1 F79B1
+RST1 F79B1
+RST2 F78B1
+RST3 -
+
+.config_enum ALU54_7.REG_OUTPUT1_CLK CLK3
+CLK0 F64B1 F65B1
+CLK1 F65B1
+CLK2 F64B1
+CLK3 -
+NONE -
+
+.config_enum ALU54_7.REG_OUTPUT1_RST RST3
+RST0 F88B1 F89B1
+RST1 F89B1
+RST2 F88B1
+RST3 -
+
+.config_enum ALU54_7.RESETMODE SYNC
+ASYNC F70B1 F82B1 F92B1 F104B1
+SYNC -
+
.config_enum MULT18_4.MODE NONE
MULT18X18D F18B0 F33B1 F37B0 F48B0 F55B0 F67B0
NONE -
diff --git a/ECP5/tiledata/MIB2_DSP7/bits.db b/ECP5/tiledata/MIB2_DSP7/bits.db
index 98e5c91..13bc037 100644
--- a/ECP5/tiledata/MIB2_DSP7/bits.db
+++ b/ECP5/tiledata/MIB2_DSP7/bits.db
@@ -1,6 +1,152 @@
# Routing Mux Bits
# Non-Routing Configuration
+.config ALU54_7.RNDPAT 11111111111111111111111111000100011010001111111111111111
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+F4B0
+F5B0
+F3B0
+-
+F2B0
+-
+-
+F6B0
+F1B0
+F7B0
+-
+F8B0
+F0B0
+F9B0
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+
+.config_enum ALU54_7.MODE NONE
+ALU54B F29B0 F30B0 F32B0 F83B0
+NONE -
+
+.config_enum ALU54_7.REG_FLAG_CLK NONE
+CLK0 F4B1 F5B1 F49B1 F57B1
+CLK1 F4B1 F5B1 F49B1
+CLK2 F4B1 F5B1 F57B1
+CLK3 F4B1 F5B1
+NONE -
+
+.config_enum ALU54_7.REG_INPUTC1_CLK CLK3
+CLK0 F80B1 F81B1
+CLK1 F80B1
+CLK2 F81B1
+CLK3 -
+NONE -
+
+.config_enum ALU54_7.REG_OPCODEIN_0_RST RST3
+RST0 F42B1 F43B1
+RST1 F43B1
+RST2 F42B1
+RST3 -
+
+.config_enum ALU54_7.REG_OPCODEIN_1_RST RST3
+RST0 F50B1 F51B1
+RST1 F51B1
+RST2 F50B1
+RST3 -
+
+.config_enum ALU54_7.REG_OPCODEOP0_0_CLK CLK3
+CLK0 F24B1 F25B1
+CLK1 F24B1
+CLK2 F25B1
+CLK3 -
+NONE -
+
+.config_enum ALU54_7.REG_OPCODEOP0_0_RST RST3
+RST0 F64B1 F65B1
+RST1 F65B1
+RST2 F64B1
+RST3 -
+
+.config_enum ALU54_7.REG_OPCODEOP0_1_CLK CLK3
+CLK0 F16B1 F17B1
+CLK1 F16B1
+CLK2 F17B1
+CLK3 -
+NONE -
+
+.config_enum ALU54_7.REG_OPCODEOP0_1_RST RST3
+RST0 F76B1 F77B1
+RST1 F77B1
+RST2 F76B1
+RST3 -
+
+.config_enum ALU54_7.REG_OPCODEOP1_0_CLK CLK3
+CLK0 F24B1 F25B1
+CLK1 F24B1
+CLK2 F25B1
+CLK3 -
+NONE -
+
+.config_enum ALU54_7.REG_OPCODEOP1_1_CLK CLK3
+CLK0 F16B1 F17B1
+CLK1 F16B1
+CLK2 F17B1
+CLK3 -
+NONE -
+
+.config_enum ALU54_7.REG_OUTPUT0_CLK CLK3
+CLK0 F58B1 F59B1
+CLK1 F58B1
+CLK2 F59B1
+CLK3 -
+NONE -
+
+.config_enum ALU54_7.REG_OUTPUT1_CLK NONE
+CLK0 F4B1 F5B1 F49B1 F57B1
+CLK1 F4B1 F5B1 F49B1
+CLK2 F4B1 F5B1 F57B1
+CLK3 F4B1 F5B1
+NONE -
+
+.config_enum ALU54_7.RESETMODE SYNC
+ASYNC F1B1 F11B1 F34B1 F39B1 F46B1 F66B1
+SYNC -
+
.config_enum MULT18_4.MODE NONE
MULT18X18D F29B0 F30B0 F32B0 F83B0
NONE -
diff --git a/ECP5/tiledata/MIB2_DSP8/bits.db b/ECP5/tiledata/MIB2_DSP8/bits.db
index 9349143..1996872 100644
--- a/ECP5/tiledata/MIB2_DSP8/bits.db
+++ b/ECP5/tiledata/MIB2_DSP8/bits.db
@@ -1,6 +1,43 @@
# Routing Mux Bits
# Non-Routing Configuration
+.config_enum ALU54_7.MODE NONE
+ALU54B F24B1
+NONE -
+
+.config_enum ALU54_7.REG_INPUTC0_CLK NONE
+CLK0 F63B1 F64B1
+CLK1 F63B1 F64B1
+CLK2 F63B1 F64B1
+CLK3 F63B1 F64B1
+NONE -
+
+.config_enum ALU54_7.REG_OPCODEIN_0_CE CE3
+CE0 F71B1 F72B1
+CE1 F71B1
+CE2 F72B1
+CE3 -
+
+.config_enum ALU54_7.REG_OPCODEIN_1_CE CE3
+CE0 F67B1 F70B1
+CE1 F67B1
+CE2 F70B1
+CE3 -
+
+.config_enum ALU54_7.REG_OUTPUT0_CLK NONE
+CLK0 F87B1 F88B1
+CLK1 F87B1 F88B1
+CLK2 F87B1 F88B1
+CLK3 F87B1 F88B1
+NONE -
+
+.config_enum ALU54_7.REG_OUTPUT1_CLK NONE
+CLK0 F49B1 F66B1
+CLK1 F49B1 F66B1
+CLK2 F49B1 F66B1
+CLK3 F49B1 F66B1
+NONE -
+
.config_enum MULT18_4.REG_INPUTA_CE CE3
CE0 F54B1 F55B1 F68B1 F69B1 F91B1 F92B1
CE1 F54B1 F68B1 F92B1
diff --git a/ECP5/tiledata/MIB_DSP5/bits.db b/ECP5/tiledata/MIB_DSP5/bits.db
index 08a31cb..8decf18 100644
--- a/ECP5/tiledata/MIB_DSP5/bits.db
+++ b/ECP5/tiledata/MIB_DSP5/bits.db
@@ -1,6 +1,24 @@
# Routing Mux Bits
# Non-Routing Configuration
+.config_enum ALU54_7.MODE NONE
+ALU54B F7B0 F10B0 F11B0 F63B0
+NONE -
+
+.config_enum ALU54_7.REG_INPUTC0_CLK CLK3
+CLK0 -
+CLK1 -
+CLK2 -
+CLK3 -
+NONE F57B0
+
+.config_enum ALU54_7.REG_INPUTC1_CLK CLK3
+CLK0 -
+CLK1 -
+CLK2 -
+CLK3 -
+NONE F56B0
+
.config_enum MULT18_4.REG_INPUTA_CLK CLK3
CLK0 -
CLK1 -
diff --git a/ECP5/tiledata/MIB_DSP6/bits.db b/ECP5/tiledata/MIB_DSP6/bits.db
index ea6e499..0277d57 100644
--- a/ECP5/tiledata/MIB_DSP6/bits.db
+++ b/ECP5/tiledata/MIB_DSP6/bits.db
@@ -1,6 +1,28 @@
# Routing Mux Bits
# Non-Routing Configuration
+.config_enum ALU54_7.GSR ENABLED
+DISABLED F46B0
+ENABLED -
+
+.config_enum ALU54_7.MODE NONE
+ALU54B F57B0 F60B0 F67B0 F70B0 F77B0 F80B0 F81B0 F85B0 F90B0 F94B0 F95B0 F105B0
+NONE -
+
+.config_enum ALU54_7.REG_OPCODEOP0_0_CLK CLK3
+CLK0 -
+CLK1 -
+CLK2 -
+CLK3 -
+NONE F49B0
+
+.config_enum ALU54_7.REG_OPCODEOP1_0_CLK CLK3
+CLK0 -
+CLK1 -
+CLK2 -
+CLK3 -
+NONE F74B0
+
.config_enum MULT18_4.GSR ENABLED
DISABLED F46B0
ENABLED -
diff --git a/ECP5/tiledata/MIB_DSP7/bits.db b/ECP5/tiledata/MIB_DSP7/bits.db
index 0c86e65..55a0176 100644
--- a/ECP5/tiledata/MIB_DSP7/bits.db
+++ b/ECP5/tiledata/MIB_DSP7/bits.db
@@ -1,6 +1,37 @@
# Routing Mux Bits
# Non-Routing Configuration
+.config_enum ALU54_7.CLK0_DIV ENABLED
+DISABLED F9B0
+ENABLED -
+
+.config_enum ALU54_7.CLK1_DIV ENABLED
+DISABLED F10B0
+ENABLED -
+
+.config_enum ALU54_7.CLK2_DIV ENABLED
+DISABLED F11B0
+ENABLED -
+
+.config_enum ALU54_7.CLK3_DIV ENABLED
+DISABLED F12B0
+ENABLED -
+
+.config_enum ALU54_7.GSR ENABLED
+DISABLED F4B0
+ENABLED -
+
+.config_enum ALU54_7.MODE NONE
+ALU54B F3B0
+NONE -
+
+.config_enum ALU54_7.REG_OPCODEIN_0_CLK CLK3
+CLK0 -
+CLK1 -
+CLK2 -
+CLK3 -
+NONE F2B0
+
.config_enum MULT18_4.CLK0_DIV ENABLED
DISABLED F9B0
ENABLED -
diff --git a/ECP5/tiledata/MIB_DSP8/bits.db b/ECP5/tiledata/MIB_DSP8/bits.db
index c4b7cd6..d446cc1 100644
--- a/ECP5/tiledata/MIB_DSP8/bits.db
+++ b/ECP5/tiledata/MIB_DSP8/bits.db
@@ -1,6 +1,10 @@
# Routing Mux Bits
# Non-Routing Configuration
+.config_enum ALU54_7.MODE NONE
+ALU54B F55B0 F61B0
+NONE -
+
.config_enum MULT18_5.REG_INPUTB_CLK CLK3
CLK0 -
CLK1 -
