commit ea6d1b6d5b9a8be307f86a9bb3a2794d581eb7bb
author David Shah <dave@ds0.me> Wed Oct 31 18:08:43 2018 +0000
committer David Shah <dave@ds0.me> Wed Oct 31 18:08:43 2018 +0000
tree 34e192a823235b4bbc3cb8a1dcf6f61938d97ff4
parent 1acd65203e57d633ce6ee4e6b440d0332221403b

Update to prjtrellis da89681be13812f03271696d8e97758671aa4f90

Signed-off-by: David Shah <dave@ds0.me>

ECP5/tiledata/CIB_PLL0/bits.db

diff --git a/ECP5/tiledata/CIB_PLL0/bits.db b/ECP5/tiledata/CIB_PLL0/bits.db
index 918d75e..5e47dc1 100644
--- a/ECP5/tiledata/CIB_PLL0/bits.db
+++ b/ECP5/tiledata/CIB_PLL0/bits.db
@@ -1809,6 +1809,10 @@
 V01N0101 F68B3 F72B2
 W3_H06E0303 F70B2 F72B3
 
+.mux PLLCSOUT_PLLREFCS
+CLK0_PLLREFCS F27B10
+CLK1_PLLREFCS F21B7 F23B7
+
 .mux S1_V02S0001
 E1_H01W0000 F17B9 F18B8
 E1_H02W0001 F16B8 F17B9

ECP5/tiledata/CIB_PLL2/bits.db

diff --git a/ECP5/tiledata/CIB_PLL2/bits.db b/ECP5/tiledata/CIB_PLL2/bits.db
index 918d75e..5e47dc1 100644
--- a/ECP5/tiledata/CIB_PLL2/bits.db
+++ b/ECP5/tiledata/CIB_PLL2/bits.db
@@ -1809,6 +1809,10 @@
 V01N0101 F68B3 F72B2
 W3_H06E0303 F70B2 F72B3
 
+.mux PLLCSOUT_PLLREFCS
+CLK0_PLLREFCS F27B10
+CLK1_PLLREFCS F21B7 F23B7
+
 .mux S1_V02S0001
 E1_H01W0000 F17B9 F18B8
 E1_H02W0001 F16B8 F17B9