Add missing BELs, fix DCCA/DCMA naming, and start assigning nominal positions to globals connected to missing BELs (checkpoint commit).
diff --git a/libtrellis/include/Bels.hpp b/libtrellis/include/Bels.hpp
index 34d2414..ad3faa8 100644
--- a/libtrellis/include/Bels.hpp
+++ b/libtrellis/include/Bels.hpp
@@ -26,8 +26,8 @@
 
 void add_lc(RoutingGraph &graph, int x, int y, int z);
 void add_pio(RoutingGraph &graph, int x, int y, int z);
-void add_dcc(RoutingGraph &graph, int x, int y, const std::string &name, int z);
-void add_dcm(RoutingGraph &graph, int x, int y, int z);
+void add_dcc(RoutingGraph &graph, int x, int y, /* const std::string &name, */ int z);
+void add_dcm(RoutingGraph &graph, int x, int y, int n, int z);
 void add_osch(RoutingGraph &graph, int x, int y, int z);
 
 }
diff --git a/libtrellis/src/Bels.cpp b/libtrellis/src/Bels.cpp
index 61b9dff..64a9025 100644
--- a/libtrellis/src/Bels.cpp
+++ b/libtrellis/src/Bels.cpp
@@ -739,11 +739,16 @@
         graph.add_bel(bel);
     }
 
-    void add_dcc(RoutingGraph &graph, int x, int y, const std::string &name, int z) {
-        string full_name = string("DCC") + name;
+    void add_dcc(RoutingGraph &graph, int x, int y, /* const std::string &name, */ int z) {
+        // TODO: All DCCs appear to be in center. Phantom DCCs line the columns
+        // for global routing with names of the form DCC_RxCy_{0,1}{T,B}. Hence
+        // commented-out name parameter.
+        // Diamond acknowledges these BELs, but attempting to use them crashes.
+        // See if they indeed do exist.
+        string name = string("DCC") + std::to_string(z);
         RoutingBel bel;
-        bel.name = graph.ident(full_name);
-        bel.type = graph.ident("DCC");
+        bel.name = graph.ident(name);
+        bel.type = graph.ident("DCCA");
         bel.loc.x = x;
         bel.loc.y = y;
         bel.z = z;
@@ -755,19 +760,19 @@
         graph.add_bel(bel);
     }
 
-    void add_dcm(RoutingGraph &graph, int x, int y, int z) {
-        string name = string("DCM") + std::to_string(z);
+    void add_dcm(RoutingGraph &graph, int x, int y, int n, int z) {
+        string name = string("DCM") + std::to_string(n);
         RoutingBel bel;
         bel.name = graph.ident(name);
-        bel.type = graph.ident("DCM");
+        bel.type = graph.ident("DCMA");
         bel.loc.x = x;
         bel.loc.y = y;
         bel.z = z;
 
-        graph.add_bel_input(bel, graph.ident("CLK0"), x, y, graph.ident(fmt("G_CLK0_" << z << "_DCM")));
-        graph.add_bel_input(bel, graph.ident("CLK1"), x, y, graph.ident(fmt("G_CLK1_" << z << "_DCM")));
-        graph.add_bel_input(bel, graph.ident("SEL"), x, y, graph.ident(fmt("G_JSEL" << z << "_DCM")));
-        graph.add_bel_output(bel, graph.ident("DCMOUT"), x, y, graph.ident(fmt("G_DCMOUT" << z << "_DCM")));
+        graph.add_bel_input(bel, graph.ident("CLK0"), x, y, graph.ident(fmt("G_CLK0_" << n << "_DCM")));
+        graph.add_bel_input(bel, graph.ident("CLK1"), x, y, graph.ident(fmt("G_CLK1_" << n << "_DCM")));
+        graph.add_bel_input(bel, graph.ident("SEL"), x, y, graph.ident(fmt("G_JSEL" << n << "_DCM")));
+        graph.add_bel_output(bel, graph.ident("DCMOUT"), x, y, graph.ident(fmt("G_DCMOUT" << n << "_DCM")));
 
         graph.add_bel(bel);
     }
diff --git a/libtrellis/src/Chip.cpp b/libtrellis/src/Chip.cpp
index 7653e32..14808a2 100644
--- a/libtrellis/src/Chip.cpp
+++ b/libtrellis/src/Chip.cpp
@@ -297,6 +297,19 @@
             tile->info.type.find("PIC_B") != string::npos)
             for (int z = 0; z < 4; z++)
                 MachXO2Bels::add_pio(*rg, x, y, z);
+
+        // DCC/DCM MachXO2Bels
+        if (tile->info.type.find("CENTER_EBR_CIB") != string::npos) {
+          for (int z = 0; z < 8; z++)
+              MachXO2Bels::add_dcc(*rg, x, y, z);
+          for (int z = 6; z < 8; z++)
+              // Start at z = 8, but names start at 6.
+              MachXO2Bels::add_dcm(*rg, x, y, z, z + 2);
+        }
+
+        if (tile->info.type.find("CIB_CFG0") != string::npos) {
+            MachXO2Bels::add_osch(*rg, x, y, 0);
+        }
     }
 
     return rg;
diff --git a/libtrellis/src/RoutingGraph.cpp b/libtrellis/src/RoutingGraph.cpp
index 5c50fbc..2280adb 100644
--- a/libtrellis/src/RoutingGraph.cpp
+++ b/libtrellis/src/RoutingGraph.cpp
@@ -285,6 +285,7 @@
     // tiles, by the following rules:
 
     static const std::regex clk_dcc(R"(^G_CLK[IO]\d[TB]_DCC)", std::regex::optimize);
+
     smatch m;
     pair<int, int> center = center_map[make_pair(max_row, max_col)];
     RoutingId curr_global;
@@ -354,7 +355,12 @@
         curr_global.loc.x = -2;
         curr_global.loc.y = -2;
         return curr_global;
-    } else if(regex_match(db_name, m, clk_dcc)) {
+    } else if(regex_match(db_name, m, clk_dcc) ||
+        db_name.find("G_JOSC_OSC") != string::npos ||
+        db_name.find("_DCM") != string::npos) {
+
+        // TODO: _DCM should really be a regex.
+        // Assign nominal position of current requested tile.
         curr_global.id = ident(db_name);
         curr_global.loc.x = col;
         curr_global.loc.y = row;