tree: b8c1ca2b3b58757bda2908ee9336a33683f3359f [path history] [tgz]
  1. blinky.v
  2. ecp5evn.lpf
  3. Makefile
  4. README.md
examples/ecp5_evn/README.md

ECP5 Evaluation Board Example

Run make prog to load the example to the board.

You must ensure JP2 is shorted to connect the 12MHz FTDI clock to the FPGA.