commit 3cc1612ce876def277f2ac250e1a31fd6f5b6a01
author William D. Jones <thor0505@comcast.net> Mon Feb 22 22:47:27 2021 -0500
committer William D. Jones <thor0505@comcast.net> Mon Feb 22 22:47:27 2021 -0500
tree 159fd7f4067e608560402bce5d938b9bd9b110d0
parent 210a0a72757d57b278ac7397ae6b14729f149b10

machxo2: Fix naming of DCCA pins so they connect to the rest of the
routing graph.

libtrellis/src/Bels.cpp

diff --git a/libtrellis/src/Bels.cpp b/libtrellis/src/Bels.cpp
index 64a9025..5111c8a 100644
--- a/libtrellis/src/Bels.cpp
+++ b/libtrellis/src/Bels.cpp
@@ -753,9 +753,9 @@
         bel.loc.y = y;
         bel.z = z;
 
-        graph.add_bel_input(bel, graph.ident("CLKI"), x, y, graph.ident(fmt("G_CLKI" << name << "_DCC")));
-        graph.add_bel_input(bel, graph.ident("CE"), x, y, graph.ident(fmt("G_JCE" << name << "_DCC")));
-        graph.add_bel_output(bel, graph.ident("CLKO"), x, y, graph.ident(fmt("G_CLKO" << name << "_DCC")));
+        graph.add_bel_input(bel, graph.ident("CLKI"), x, y, graph.ident(fmt("G_CLKI" << z << "_DCC")));
+        graph.add_bel_input(bel, graph.ident("CE"), x, y, graph.ident(fmt("G_JCE" << z << "_DCC")));
+        graph.add_bel_output(bel, graph.ident("CLKO"), x, y, graph.ident(fmt("G_CLKO" << z << "_DCC")));
 
         graph.add_bel(bel);
     }