commit 5d7c9679e8e5c445786f6247e97d0b0f33708498
author David Shah <dave@ds0.me> Mon Feb 11 19:11:38 2019 +0000
committer David Shah <dave@ds0.me> Mon Feb 11 19:11:38 2019 +0000
tree 85dc6ab7cb2d399010c7dbc192cb1b3b9947a68b
parent 52a5161bcec7250058c5565f76321f2b2bba5c27

libtrellis: Fix z-index of ECLK-related Bels to avoid PIO/IOLOGIC conflicts

Signed-off-by: David Shah <dave@ds0.me>

libtrellis/src/Bels.cpp

diff --git a/libtrellis/src/Bels.cpp b/libtrellis/src/Bels.cpp
index 34f2bd6..f88339f 100644
--- a/libtrellis/src/Bels.cpp
+++ b/libtrellis/src/Bels.cpp
@@ -542,19 +542,19 @@
     } else if (name == "ECLKSYNCB") {
         postfix = "ECLKSYNC" + std::to_string(i);
         bel.name = graph.ident(postfix);
-        bel.z = 2 + i;
+        bel.z = 8 + i;
         add_input("ECLKI", false);
         add_input("STOP");
         add_output("ECLKO");
     } else if (name == "TRELLIS_ECLKBUF") {
-        bel.z = 6;
+        bel.z = 10 + i;
         bel.name = graph.ident("ECLKBUF" + std::to_string(i));
         graph.add_bel_input(bel, graph.ident("ECLKI"), x, y, graph.ident(fmt("JECLK" << i)));
         graph.add_bel_output(bel, graph.ident("ECLKO"), 0, 0, graph.ident(fmt("G_BANK" << bank << "ECLK" << i)));
     } else if (name == "DLLDELD") {
         postfix = "DLLDEL";
         bel.name = graph.ident(postfix);
-        bel.z = 4;
+        bel.z = 12;
         add_input("A");
         add_input("DDRDEL", false);
         add_input("LOADN");