- 3ae21cf Merge pull request #184 from YosysHQ/gatecat/bump-pybind11 by gatecat · 3 years, 7 months ago master
- 3665725 3rdparty: Bump vendored pybind11 version by gatecat · 3 years, 7 months ago
- 2f06397 Merge pull request #181 from YosysHQ/gatecat/ecp5-lutperm by gatecat · 3 years, 9 months ago
- 7239331 libtrellis: LUT permutation support for ECP5 by gatecat · 3 years, 9 months ago
- 03e0070 Merge pull request #178 from ngi-nix/fixnogit by gatecat · 4 years ago
- 6bac5f0 Fix building without git by Las Safin · 4 years, 1 month ago
- cd9b60f Merge pull request #177 from kittennbfive/patch-1 by gatecat · 4 years ago
- acc4f8c Install to /usr/local instead of /usr by kittennbfive · 4 years ago
- dff1cbc Merge pull request #173 from YosysHQ/gatecat/ecp5-add-dcs by gatecat · 4 years, 2 months ago
- a70c333 Merge pull request #174 from YosysHQ/wasi-boost-1.76 by whitequark · 4 years, 2 months ago
- 737f3c8 libtrellis: update definitions for WASI build with boost 1.76. by whitequark · 4 years, 2 months ago
- 5c62441 libtrellis: Add DCS bels by gatecat · 4 years, 2 months ago
- 2c0f5a7 Merge pull request #172 from cr1901/facade by gatecat · 4 years, 2 months ago
- dcb734c Update database submodule. by William D. Jones · 4 years, 2 months ago
- 80e7cbf Add enum bit fuzzing for missing left-right tiles on 1200HC. by William D. Jones · 4 years, 2 months ago
- c48df86 Merge branch 'master' of https://github.com/YosysHQ/prjtrellis into facade by William D. Jones · 4 years, 2 months ago
- b6180ba Merge pull request #171 from rroohhh/ConfigBitSet_add by gatecat · 4 years, 2 months ago
- e7a9244 add missing pytrellis `add` binding to ConfigBitSet by Robin Ole Heinemann · 4 years, 2 months ago
- 1b5140c Merge pull request #168 from nneonneo/master by gatecat · 4 years, 2 months ago
- d7582c4 Merge pull request #170 from rroohhh/fix_pytrellis by gatecat · 4 years, 3 months ago
- 1a46fc3 add some missing constructors to pytrellis by Robin Ole Heinemann · 4 years, 3 months ago
- 663ec87 ecp_vlog: comment on IOLDO/IOLTO by Robert Xiao · 4 years, 3 months ago
- b8c63ee ecp_vlog: parse LPF files to give better names to ports by Robert Xiao · 4 years, 3 months ago
- 5ece3c9 ecp_vlog: update INDD comment and remove cells_sim include by Robert Xiao · 4 years, 3 months ago
- 29f1dfa Merge pull request #169 from rroohhh/user_LM_LICENSE_FILE by gatecat · 4 years, 3 months ago
- 6dc64ae allow user specified LM_LICENSE_FILE by Robin Ole Heinemann · 4 years, 3 months ago
- 518065e ecp_vlog: it is not necessary to tie all input pins anymore by Robert Xiao · 4 years, 3 months ago
- 82897de ecp_vlog: Fix special edge cases for OFXn and RXDATA{4,5,6}. by Robert Xiao · 4 years, 3 months ago
- 1bac093 ecp_vlog: rename IO-related wires based on the package by Robert Xiao · 4 years, 3 months ago
- 6b333ff Add a tool to convert ECP5 bitstreams to Verilog. by Robert Xiao · 4 years, 3 months ago
- 0e6a320 Update copyrights by gatecat · 4 years, 3 months ago
- fe1c39c Merge pull request #167 from ikle/issue-160 by gatecat · 4 years, 4 months ago
- 8365dd5 ecppll: declare internal feedback wire explicitly in highres mode by Alexei A. Smekalkine · 4 years, 4 months ago
- 45b49e7 Merge pull request #166 from ikle/issue-160 by gatecat · 4 years, 4 months ago
- 211fb79 ecppll: fix broken port names in highres mode, fix regression by Alexei A. Smekalkine · 4 years, 4 months ago
- 9883176 Merge pull request #150 from se-bi/fix/install-file-exec-perm by gatecat · 4 years, 4 months ago
- da82093 Merge pull request #165 from YosysHQ/cross-compile by gatecat · 4 years, 6 months ago
- 51be3d1 Fix windows cross-compile by Miodrag Milanovic · 4 years, 6 months ago
- 7454564 Revert "Change theme to Sphinx Material Design" by gatecat · 4 years, 6 months ago
- 3cc1612 machxo2: Fix naming of DCCA pins so they connect to the rest of the by William D. Jones · 4 years, 7 months ago
- 210a0a7 Add clean target to all example makefiles by gatecat · 4 years, 7 months ago
- 4cb921a Merge pull request #163 from cr1901/facade by gatecat · 4 years, 7 months ago
- 7b20e4b machxo2: Make sure all left and right I/O connections are included in the routing graph. by William D. Jones · 4 years, 7 months ago
- 4ce7e26 Add missing JSTDBY_OSC port connection, fix FixedConnection struct so by William D. Jones · 4 years, 7 months ago
- 7dabd59 Merge pull request #159 from cr1901/facade by David Shah · 4 years, 8 months ago
- e51fad4 Merge branch 'master' into facade by William D. Jones · 4 years, 8 months ago
- 5fe0fff Add async_gsr minitest, to compare to async without GSR. by William D. Jones · 4 years, 8 months ago
- 96af083 Add possibly-redundant async_sr and lsr_over_ce minitests for comparison purposes. by William D. Jones · 4 years, 8 months ago
- bf832ef Add blinky_ext example to tinyfpga_ax to test external clock. by William D. Jones · 4 years, 8 months ago
- e10b1cb Do not place IO BELs at CIB tiles. by William D. Jones · 4 years, 9 months ago
- 910a6b8 Update database submodule with iodb.json fix. by William D. Jones · 4 years, 9 months ago
- 60c05b3 Removed unused variables by Miodrag Milanovic · 4 years, 8 months ago
- a576810 Update pybind11 to version 2.6.1 by Miodrag Milanovic · 4 years, 8 months ago
- 95132cc Fix CMake install; file permissions by Sebastian Birke · 4 years, 11 months ago
- 9b3db7b Merge pull request #157 from umarcor/ecppll/help by David Shah · 4 years, 9 months ago
- e289c6b ecppll: return from '--help' with exit code 0 by umarcor · 4 years, 9 months ago
- 2241b2a Merge pull request #156 from whitequark/patch-1 by David Shah · 4 years, 9 months ago
- 0b178aa Update WASI platform support for boost 1.75. by whitequark · 4 years, 9 months ago
- b59a887 Fix off-by-one error in read_pinout.py. by William D. Jones · 4 years, 9 months ago
- aaeeaa6 Do not place IO BELs at DUMMY tiles. by William D. Jones · 4 years, 9 months ago
- a441cd9 Merge pull request #154 from YosysHQ/pybind11 by David Shah · 4 years, 10 months ago
- 86a022d readme fix by Miodrag Milanovic · 4 years, 10 months ago
- abe8afc Cleanup and fixes by Miodrag Milanovic · 4 years, 10 months ago
- 50fff04 Convert code to use pybind11 by Miodrag Milanovic · 4 years, 10 months ago
- f0f62e1 Add pybind11 by Miodrag Milanovic · 4 years, 10 months ago
- 52d2915 Merge pull request #153 from gsomlo/gls-cmake-py310 by David Shah · 4 years, 10 months ago
- 83d22e7 cmake: add python310 to version list searched for boost components by Gabriel Somlo · 4 years, 10 months ago
- b013a13 Merge pull request #151 from Xiretza/remove-obsolete-tests by David Shah · 4 years, 10 months ago
- f85f200 libtrellis: Remove obsolete tests by Xiretza · 4 years, 10 months ago
- 23d3464 fuzzers: Fix fuzzing of PIO CLAMP by David Shah · 5 years ago
- 9447f22 libtrellis: Add missing map include by David Shah · 5 years ago
- 997ca24 devices.json: Fix accidentally dropped device by David Shah · 5 years ago
- 4357600 tools: Fix HTML index output by David Shah · 5 years ago
- af32b34 Update database to master by David Shah · 5 years ago
- d701ba9 Merge pull request #148 from cr1901/facade by David Shah · 5 years ago
- cefbc0b Bring in database PCI CLAMP changes. by William D. Jones · 5 years ago
- 3890ed8 Fix PCI CLAMP and DIFFDRIVE fuzzers to produce correct data (DIFFDRIVE out of scope until PIC_T_DUMMY_VIQ is fuzzed). by William D. Jones · 5 years ago
- 9f9e607 Bring in database changes. by William D. Jones · 5 years ago
- a9e765a Use hyphen instead of underscore for 'missing-dccs' field in globals.json. by William D. Jones · 5 years ago
- 4af7ea0 Bring commented in RoutingGraph up to date and remove commented-out code. by William D. Jones · 5 years ago
- db94108 Merge branch 'master' of https://github.com/YosysHQ/prjtrellis into facade by William D. Jones · 5 years ago
- 52c31c1 Remove EFB.v- ask user to regenerate if necessary. by William D. Jones · 5 years ago
- a4f30ac Generate globals.json for each MachXO2 device on-the-fly- remove metadata directory. by William D. Jones · 5 years ago
- 23e1cdd Fix overeager find and replace in Chip.cpp. by William D. Jones · 5 years ago
- 8b7845f Document that 021-glb-entry has only been done for CENTER_EBR_CIB tiles by William D. Jones · 5 years ago
- 3f639e5 Remove ccu2_mux and center_mux experiment output diffs- can be regenerated if necessary. by William D. Jones · 5 years ago
- ae0a7d4 Restore devices.json to original state. by William D. Jones · 5 years ago
- 389c251 fuzzers: Add missing JPADDI[AC]->JPADDI arc by David Shah · 5 years ago
- 7428bfc Allow Chip.global_data as backwards-compatible alias for for Chip.global_data_ecp5. by William D. Jones · 5 years ago
- 3babbaf Switch submodule back to upstream repo. by William D. Jones · 5 years ago
- a81ceb1 Clean up find_machxo2_global_position a bit more. by William D. Jones · 5 years ago
- 4ed6c3f Refactor regex handler in find_machxo2_global_position. by William D. Jones · 5 years ago
- c684650 Merge branch 'master' of https://github.com/YosysHQ/prjtrellis into facade by William D. Jones · 5 years ago
- e761744 Connect U_/D_ globals to BRANCHes, completing global routing connections. by William D. Jones · 5 years ago
- f54dd28 Bring in database changes. by William D. Jones · 5 years ago
- b8523e6 Avoid copying nonexistent DCC mux bits in row 11. by William D. Jones · 5 years ago
- e162697 Forgot to route DCC outputs to the rest of global network. by William D. Jones · 5 years ago
- ef67e9f Special-case routing sink whose config bits span across multiple tiles when building the routing graph. by William D. Jones · 5 years ago
- 7bd7301 Covert find_machxo2_global_position to use regexes- find isn't precise enough. by William D. Jones · 5 years ago
- 0401e80 Add missing BELs, fix DCCA/DCMA naming, and start assigning nominal positions to globals connected to missing BELs (checkpoint commit). by William D. Jones · 5 years ago