diff --git a/BRAM.bits b/BRAM.bits
new file mode 100644
index 0000000..058bfd1
--- /dev/null
+++ b/BRAM.bits
@@ -0,0 +1,674 @@
+BRAM.IN_USE 1303 1325
+RAMB18E2_L.CASCADE_ORDER_A.FIRST 1047
+RAMB18E2_L.CASCADE_ORDER_A.LAST
+RAMB18E2_L.CASCADE_ORDER_A.MIDDLE 1047
+RAMB18E2_L.CASCADE_ORDER_A.NONE
+RAMB18E2_L.CASCADE_ORDER_B.FIRST 1046
+RAMB18E2_L.CASCADE_ORDER_B.LAST
+RAMB18E2_L.CASCADE_ORDER_B.MIDDLE 1046
+RAMB18E2_L.CASCADE_ORDER_B.NONE
+RAMB18E2_L.CLKARDCLKINV.0
+RAMB18E2_L.CLKARDCLKINV.1 1291
+RAMB18E2_L.CLKBWRCLKINV.0
+RAMB18E2_L.CLKBWRCLKINV.1 1294
+RAMB18E2_L.CLOCK_DOMAINS.COMMON 1058
+RAMB18E2_L.CLOCK_DOMAINS.INDEPENDENT
+RAMB18E2_L.DOA_REG.0
+RAMB18E2_L.DOA_REG.1 1018
+RAMB18E2_L.DOB_REG.0
+RAMB18E2_L.DOB_REG.1 1021
+RAMB18E2_L.DOUTADOUT[0].USED 261 507 744
+RAMB18E2_L.DOUTADOUT[10].USED 261 507 744
+RAMB18E2_L.DOUTADOUT[11].USED 261 507 744
+RAMB18E2_L.DOUTADOUT[12].USED 309 555 792
+RAMB18E2_L.DOUTADOUT[13].USED 309 555 792
+RAMB18E2_L.DOUTADOUT[14].USED 309 555 792
+RAMB18E2_L.DOUTADOUT[15].USED 357 603 840
+RAMB18E2_L.DOUTADOUT[1].USED 261 507 744
+RAMB18E2_L.DOUTADOUT[2].USED 261 507 744
+RAMB18E2_L.DOUTADOUT[3].USED 261 507 744
+RAMB18E2_L.DOUTADOUT[4].USED 309 555 792
+RAMB18E2_L.DOUTADOUT[5].USED 309 555 792
+RAMB18E2_L.DOUTADOUT[6].USED 309 555 792
+RAMB18E2_L.DOUTADOUT[7].USED 357 603 840
+RAMB18E2_L.DOUTADOUT[8].USED 261 507 744
+RAMB18E2_L.DOUTADOUT[9].USED 261 507 744
+RAMB18E2_L.DOUTBDOUT[0].USED 261 507 744
+RAMB18E2_L.DOUTBDOUT[10].USED 261 507 744
+RAMB18E2_L.DOUTBDOUT[11].USED 261 507 744
+RAMB18E2_L.DOUTBDOUT[12].USED 309 555 792
+RAMB18E2_L.DOUTBDOUT[13].USED 309 555 792
+RAMB18E2_L.DOUTBDOUT[14].USED 309 555 792
+RAMB18E2_L.DOUTBDOUT[15].USED 357 603 840
+RAMB18E2_L.DOUTBDOUT[1].USED 261 507 744
+RAMB18E2_L.DOUTBDOUT[2].USED 261 507 744
+RAMB18E2_L.DOUTBDOUT[3].USED 261 507 744
+RAMB18E2_L.DOUTBDOUT[4].USED 309 555 792
+RAMB18E2_L.DOUTBDOUT[5].USED 309 555 792
+RAMB18E2_L.DOUTBDOUT[6].USED 309 555 792
+RAMB18E2_L.DOUTBDOUT[7].USED 357 603 840
+RAMB18E2_L.DOUTBDOUT[8].USED 261 507 744
+RAMB18E2_L.DOUTBDOUT[9].USED 261 507 744
+RAMB18E2_L.DOUTPADOUTP[0].USED 309 555 792
+RAMB18E2_L.DOUTPADOUTP[1].USED 309 555 792
+RAMB18E2_L.DOUTPBDOUTP[0].USED 309 555 792
+RAMB18E2_L.DOUTPBDOUTP[1].USED 309 555 792
+RAMB18E2_L.ENADDRENA.FALSE
+RAMB18E2_L.ENADDRENA.TRUE 1061
+RAMB18E2_L.ENADDRENB.FALSE
+RAMB18E2_L.ENADDRENB.TRUE 1060
+RAMB18E2_L.ENARDENINV.0
+RAMB18E2_L.ENARDENINV.1 1053
+RAMB18E2_L.ENBWRENINV.0
+RAMB18E2_L.ENBWRENINV.1 1052
+RAMB18E2_L.INIT_A[0] 1202
+RAMB18E2_L.INIT_A[10] 1232
+RAMB18E2_L.INIT_A[11] 1244
+RAMB18E2_L.INIT_A[12] 1268
+RAMB18E2_L.INIT_A[13] 1280
+RAMB18E2_L.INIT_A[14] 1292
+RAMB18E2_L.INIT_A[15] 1304
+RAMB18E2_L.INIT_A[16] 1250
+RAMB18E2_L.INIT_A[17] 1256
+RAMB18E2_L.INIT_A[1] 1214
+RAMB18E2_L.INIT_A[2] 1226
+RAMB18E2_L.INIT_A[3] 1238
+RAMB18E2_L.INIT_A[4] 1262
+RAMB18E2_L.INIT_A[5] 1274
+RAMB18E2_L.INIT_A[6] 1286
+RAMB18E2_L.INIT_A[7] 1298
+RAMB18E2_L.INIT_A[8] 1208
+RAMB18E2_L.INIT_A[9] 1220
+RAMB18E2_L.INIT_B[0] 1205
+RAMB18E2_L.INIT_B[10] 1235
+RAMB18E2_L.INIT_B[11] 1247
+RAMB18E2_L.INIT_B[12] 1271
+RAMB18E2_L.INIT_B[13] 1283
+RAMB18E2_L.INIT_B[14] 1295
+RAMB18E2_L.INIT_B[15] 1307
+RAMB18E2_L.INIT_B[16] 1253
+RAMB18E2_L.INIT_B[17] 1259
+RAMB18E2_L.INIT_B[1] 1217
+RAMB18E2_L.INIT_B[2] 1229
+RAMB18E2_L.INIT_B[3] 1241
+RAMB18E2_L.INIT_B[4] 1265
+RAMB18E2_L.INIT_B[5] 1277
+RAMB18E2_L.INIT_B[6] 1289
+RAMB18E2_L.INIT_B[7] 1301
+RAMB18E2_L.INIT_B[8] 1211
+RAMB18E2_L.INIT_B[9] 1223
+RAMB18E2_L.IN_USE 1282 1285
+RAMB18E2_L.RDADDRCHANGEA.FALSE
+RAMB18E2_L.RDADDRCHANGEA.TRUE 1057
+RAMB18E2_L.RDADDRCHANGEB.FALSE
+RAMB18E2_L.RDADDRCHANGEB.TRUE 1056
+RAMB18E2_L.READ_WIDTH_A.0
+RAMB18E2_L.READ_WIDTH_A.1
+RAMB18E2_L.READ_WIDTH_A.18 1240
+RAMB18E2_L.READ_WIDTH_A.2 1234
+RAMB18E2_L.READ_WIDTH_A.36 1044 1225 1240 1249
+RAMB18E2_L.READ_WIDTH_A.4 1237
+RAMB18E2_L.READ_WIDTH_A.9 1234 1237
+RAMB18E2_L.READ_WIDTH_B.0
+RAMB18E2_L.READ_WIDTH_B.1
+RAMB18E2_L.READ_WIDTH_B.18 1225
+RAMB18E2_L.READ_WIDTH_B.2 1231
+RAMB18E2_L.READ_WIDTH_B.4 1228
+RAMB18E2_L.READ_WIDTH_B.9 1228 1231
+RAMB18E2_L.RSTRAMARSTRAMINV.0
+RAMB18E2_L.RSTRAMARSTRAMINV.1 1051
+RAMB18E2_L.RSTRAMBINV.0
+RAMB18E2_L.RSTRAMBINV.1 1050
+RAMB18E2_L.RSTREGARSTREGINV.0
+RAMB18E2_L.RSTREGARSTREGINV.1 1045
+RAMB18E2_L.RSTREGBINV.0
+RAMB18E2_L.RSTREGBINV.1 1044
+RAMB18E2_L.RSTREG_PRIORITY_A.REGCE 1043
+RAMB18E2_L.RSTREG_PRIORITY_A.RSTREG
+RAMB18E2_L.RSTREG_PRIORITY_B.REGCE 1042
+RAMB18E2_L.RSTREG_PRIORITY_B.RSTREG
+RAMB18E2_L.SLEEP_ASYNC.FALSE
+RAMB18E2_L.SLEEP_ASYNC.TRUE 1288
+RAMB18E2_L.SRVAL_A[0] 1200
+RAMB18E2_L.SRVAL_A[10] 1230
+RAMB18E2_L.SRVAL_A[11] 1242
+RAMB18E2_L.SRVAL_A[12] 1266
+RAMB18E2_L.SRVAL_A[13] 1278
+RAMB18E2_L.SRVAL_A[14] 1290
+RAMB18E2_L.SRVAL_A[15] 1302
+RAMB18E2_L.SRVAL_A[16] 1248
+RAMB18E2_L.SRVAL_A[17] 1254
+RAMB18E2_L.SRVAL_A[1] 1212
+RAMB18E2_L.SRVAL_A[2] 1224
+RAMB18E2_L.SRVAL_A[3] 1236
+RAMB18E2_L.SRVAL_A[4] 1260
+RAMB18E2_L.SRVAL_A[5] 1272
+RAMB18E2_L.SRVAL_A[6] 1284
+RAMB18E2_L.SRVAL_A[7] 1296
+RAMB18E2_L.SRVAL_A[8] 1206
+RAMB18E2_L.SRVAL_A[9] 1218
+RAMB18E2_L.SRVAL_B[0] 1203
+RAMB18E2_L.SRVAL_B[10] 1233
+RAMB18E2_L.SRVAL_B[11] 1245
+RAMB18E2_L.SRVAL_B[12] 1269
+RAMB18E2_L.SRVAL_B[13] 1281
+RAMB18E2_L.SRVAL_B[14] 1293
+RAMB18E2_L.SRVAL_B[15] 1305
+RAMB18E2_L.SRVAL_B[16] 1251
+RAMB18E2_L.SRVAL_B[17] 1257
+RAMB18E2_L.SRVAL_B[1] 1215
+RAMB18E2_L.SRVAL_B[2] 1227
+RAMB18E2_L.SRVAL_B[3] 1239
+RAMB18E2_L.SRVAL_B[4] 1263
+RAMB18E2_L.SRVAL_B[5] 1275
+RAMB18E2_L.SRVAL_B[6] 1287
+RAMB18E2_L.SRVAL_B[7] 1299
+RAMB18E2_L.SRVAL_B[8] 1209
+RAMB18E2_L.SRVAL_B[9] 1221
+RAMB18E2_L.WRITE_MODE_A.NO_CHANGE 1243
+RAMB18E2_L.WRITE_MODE_A.READ_FIRST 1246
+RAMB18E2_L.WRITE_MODE_A.WRITE_FIRST
+RAMB18E2_L.WRITE_MODE_B.NO_CHANGE 1255
+RAMB18E2_L.WRITE_MODE_B.READ_FIRST 1252
+RAMB18E2_L.WRITE_MODE_B.WRITE_FIRST
+RAMB18E2_L.WRITE_WIDTH_A.0
+RAMB18E2_L.WRITE_WIDTH_A.1
+RAMB18E2_L.WRITE_WIDTH_A.18 1004
+RAMB18E2_L.WRITE_WIDTH_A.2 1002
+RAMB18E2_L.WRITE_WIDTH_A.4 1003
+RAMB18E2_L.WRITE_WIDTH_A.9 1002 1003
+RAMB18E2_L.WRITE_WIDTH_B.0
+RAMB18E2_L.WRITE_WIDTH_B.1
+RAMB18E2_L.WRITE_WIDTH_B.18 1007
+RAMB18E2_L.WRITE_WIDTH_B.2 1005
+RAMB18E2_L.WRITE_WIDTH_B.36 1004 1007 1044 1264
+RAMB18E2_L.WRITE_WIDTH_B.4 1006
+RAMB18E2_L.WRITE_WIDTH_B.9 1005 1006
+RAMB18E2_U.CASCADE_ORDER_A.FIRST 1127
+RAMB18E2_U.CASCADE_ORDER_A.LAST
+RAMB18E2_U.CASCADE_ORDER_A.MIDDLE 1127
+RAMB18E2_U.CASCADE_ORDER_A.NONE
+RAMB18E2_U.CASCADE_ORDER_B.FIRST 1126
+RAMB18E2_U.CASCADE_ORDER_B.LAST
+RAMB18E2_U.CASCADE_ORDER_B.MIDDLE 1126
+RAMB18E2_U.CASCADE_ORDER_B.NONE
+RAMB18E2_U.CLKARDCLKINV.0
+RAMB18E2_U.CLKARDCLKINV.1 1125
+RAMB18E2_U.CLKBWRCLKINV.0
+RAMB18E2_U.CLKBWRCLKINV.1 1363
+RAMB18E2_U.CLOCK_DOMAINS.COMMON 1166
+RAMB18E2_U.CLOCK_DOMAINS.INDEPENDENT
+RAMB18E2_U.DOA_REG.0
+RAMB18E2_U.DOA_REG.1 1384
+RAMB18E2_U.DOB_REG.0
+RAMB18E2_U.DOB_REG.1 1381
+RAMB18E2_U.DOUTADOUT[0].USED 357 603 840
+RAMB18E2_U.DOUTADOUT[10].USED 405 651 888
+RAMB18E2_U.DOUTADOUT[11].USED 405 651 888
+RAMB18E2_U.DOUTADOUT[12].USED 453 699 936
+RAMB18E2_U.DOUTADOUT[13].USED 453 699 936
+RAMB18E2_U.DOUTADOUT[14].USED 453 699 936
+RAMB18E2_U.DOUTADOUT[15].USED 453 699 936
+RAMB18E2_U.DOUTADOUT[1].USED 405 651 888
+RAMB18E2_U.DOUTADOUT[2].USED 405 651 888
+RAMB18E2_U.DOUTADOUT[3].USED 405 651 888
+RAMB18E2_U.DOUTADOUT[4].USED 453 699 936
+RAMB18E2_U.DOUTADOUT[5].USED 453 699 936
+RAMB18E2_U.DOUTADOUT[6].USED 453 699 936
+RAMB18E2_U.DOUTADOUT[7].USED 453 699 936
+RAMB18E2_U.DOUTADOUT[8].USED 357 603 840
+RAMB18E2_U.DOUTADOUT[9].USED 405 651 888
+RAMB18E2_U.DOUTBDOUT[0].USED 357 603 840
+RAMB18E2_U.DOUTBDOUT[10].USED 405 651 888
+RAMB18E2_U.DOUTBDOUT[11].USED 405 651 888
+RAMB18E2_U.DOUTBDOUT[12].USED 453 699 936
+RAMB18E2_U.DOUTBDOUT[13].USED 453 699 936
+RAMB18E2_U.DOUTBDOUT[14].USED 453 699 936
+RAMB18E2_U.DOUTBDOUT[15].USED 453 699 936
+RAMB18E2_U.DOUTBDOUT[1].USED 405 651 888
+RAMB18E2_U.DOUTBDOUT[2].USED 405 651 888
+RAMB18E2_U.DOUTBDOUT[3].USED 405 651 888
+RAMB18E2_U.DOUTBDOUT[4].USED 453 699 936
+RAMB18E2_U.DOUTBDOUT[5].USED 453 699 936
+RAMB18E2_U.DOUTBDOUT[6].USED 453 699 936
+RAMB18E2_U.DOUTBDOUT[7].USED 453 699 936
+RAMB18E2_U.DOUTBDOUT[8].USED 357 603 840
+RAMB18E2_U.DOUTBDOUT[9].USED 405 651 888
+RAMB18E2_U.DOUTPADOUTP[0].USED 405 651 888
+RAMB18E2_U.DOUTPADOUTP[1].USED 405 651 888
+RAMB18E2_U.DOUTPBDOUTP[0].USED 405 651 888
+RAMB18E2_U.DOUTPBDOUTP[1].USED 405 651 888
+RAMB18E2_U.ENADDRENA.FALSE
+RAMB18E2_U.ENADDRENA.TRUE 1155
+RAMB18E2_U.ENADDRENB.FALSE
+RAMB18E2_U.ENADDRENB.TRUE 1153
+RAMB18E2_U.ENARDENINV.0
+RAMB18E2_U.ENARDENINV.1 1360
+RAMB18E2_U.ENBWRENINV.0
+RAMB18E2_U.ENBWRENINV.1 1357
+RAMB18E2_U.INIT_A[0] 1334
+RAMB18E2_U.INIT_A[10] 1364
+RAMB18E2_U.INIT_A[11] 1376
+RAMB18E2_U.INIT_A[12] 1400
+RAMB18E2_U.INIT_A[13] 1412
+RAMB18E2_U.INIT_A[14] 1424
+RAMB18E2_U.INIT_A[15] 1436
+RAMB18E2_U.INIT_A[16] 1382
+RAMB18E2_U.INIT_A[17] 1388
+RAMB18E2_U.INIT_A[1] 1346
+RAMB18E2_U.INIT_A[2] 1358
+RAMB18E2_U.INIT_A[3] 1370
+RAMB18E2_U.INIT_A[4] 1394
+RAMB18E2_U.INIT_A[5] 1406
+RAMB18E2_U.INIT_A[6] 1418
+RAMB18E2_U.INIT_A[7] 1430
+RAMB18E2_U.INIT_A[8] 1340
+RAMB18E2_U.INIT_A[9] 1352
+RAMB18E2_U.INIT_B[0] 1337
+RAMB18E2_U.INIT_B[10] 1367
+RAMB18E2_U.INIT_B[11] 1379
+RAMB18E2_U.INIT_B[12] 1403
+RAMB18E2_U.INIT_B[13] 1415
+RAMB18E2_U.INIT_B[14] 1427
+RAMB18E2_U.INIT_B[15] 1439
+RAMB18E2_U.INIT_B[16] 1385
+RAMB18E2_U.INIT_B[17] 1391
+RAMB18E2_U.INIT_B[1] 1349
+RAMB18E2_U.INIT_B[2] 1361
+RAMB18E2_U.INIT_B[3] 1373
+RAMB18E2_U.INIT_B[4] 1397
+RAMB18E2_U.INIT_B[5] 1409
+RAMB18E2_U.INIT_B[6] 1421
+RAMB18E2_U.INIT_B[7] 1433
+RAMB18E2_U.INIT_B[8] 1343
+RAMB18E2_U.INIT_B[9] 1355
+RAMB18E2_U.IN_USE 1369 1372
+RAMB18E2_U.RDADDRCHANGEA.FALSE
+RAMB18E2_U.RDADDRCHANGEA.TRUE 1151
+RAMB18E2_U.RDADDRCHANGEB.FALSE
+RAMB18E2_U.RDADDRCHANGEB.TRUE 1152
+RAMB18E2_U.READ_WIDTH_A.0
+RAMB18E2_U.READ_WIDTH_A.1
+RAMB18E2_U.READ_WIDTH_A.18 1179
+RAMB18E2_U.READ_WIDTH_A.2 1181
+RAMB18E2_U.READ_WIDTH_A.36 1109 1171 1179 1408
+RAMB18E2_U.READ_WIDTH_A.4 1180
+RAMB18E2_U.READ_WIDTH_A.9 1180 1181
+RAMB18E2_U.READ_WIDTH_B.0
+RAMB18E2_U.READ_WIDTH_B.1
+RAMB18E2_U.READ_WIDTH_B.18 1171
+RAMB18E2_U.READ_WIDTH_B.2 1178
+RAMB18E2_U.READ_WIDTH_B.4 1174
+RAMB18E2_U.READ_WIDTH_B.9 1174 1178
+RAMB18E2_U.RSTRAMARSTRAMINV.0
+RAMB18E2_U.RSTRAMARSTRAMINV.1 1354
+RAMB18E2_U.RSTRAMBINV.0
+RAMB18E2_U.RSTRAMBINV.1 1117
+RAMB18E2_U.RSTREGARSTREGINV.0
+RAMB18E2_U.RSTREGARSTREGINV.1 1351
+RAMB18E2_U.RSTREGBINV.0
+RAMB18E2_U.RSTREGBINV.1 1109
+RAMB18E2_U.RSTREG_PRIORITY_A.REGCE 1108
+RAMB18E2_U.RSTREG_PRIORITY_A.RSTREG
+RAMB18E2_U.RSTREG_PRIORITY_B.REGCE 1105
+RAMB18E2_U.RSTREG_PRIORITY_B.RSTREG
+RAMB18E2_U.SLEEP_ASYNC.FALSE
+RAMB18E2_U.SLEEP_ASYNC.TRUE 1366
+RAMB18E2_U.SRVAL_A[0] 1332
+RAMB18E2_U.SRVAL_A[10] 1362
+RAMB18E2_U.SRVAL_A[11] 1374
+RAMB18E2_U.SRVAL_A[12] 1398
+RAMB18E2_U.SRVAL_A[13] 1410
+RAMB18E2_U.SRVAL_A[14] 1422
+RAMB18E2_U.SRVAL_A[15] 1434
+RAMB18E2_U.SRVAL_A[16] 1380
+RAMB18E2_U.SRVAL_A[17] 1386
+RAMB18E2_U.SRVAL_A[1] 1345
+RAMB18E2_U.SRVAL_A[2] 1356
+RAMB18E2_U.SRVAL_A[3] 1368
+RAMB18E2_U.SRVAL_A[4] 1392
+RAMB18E2_U.SRVAL_A[5] 1404
+RAMB18E2_U.SRVAL_A[6] 1416
+RAMB18E2_U.SRVAL_A[7] 1428
+RAMB18E2_U.SRVAL_A[8] 1338
+RAMB18E2_U.SRVAL_A[9] 1350
+RAMB18E2_U.SRVAL_B[0] 1335
+RAMB18E2_U.SRVAL_B[10] 1365
+RAMB18E2_U.SRVAL_B[11] 1377
+RAMB18E2_U.SRVAL_B[12] 1401
+RAMB18E2_U.SRVAL_B[13] 1413
+RAMB18E2_U.SRVAL_B[14] 1425
+RAMB18E2_U.SRVAL_B[15] 1437
+RAMB18E2_U.SRVAL_B[16] 1383
+RAMB18E2_U.SRVAL_B[17] 1389
+RAMB18E2_U.SRVAL_B[1] 1347
+RAMB18E2_U.SRVAL_B[2] 1359
+RAMB18E2_U.SRVAL_B[3] 1371
+RAMB18E2_U.SRVAL_B[4] 1395
+RAMB18E2_U.SRVAL_B[5] 1407
+RAMB18E2_U.SRVAL_B[6] 1419
+RAMB18E2_U.SRVAL_B[7] 1431
+RAMB18E2_U.SRVAL_B[8] 1341
+RAMB18E2_U.SRVAL_B[9] 1353
+RAMB18E2_U.WRITE_MODE_A.NO_CHANGE 1399
+RAMB18E2_U.WRITE_MODE_A.READ_FIRST 1393
+RAMB18E2_U.WRITE_MODE_A.WRITE_FIRST
+RAMB18E2_U.WRITE_MODE_B.NO_CHANGE 1390
+RAMB18E2_U.WRITE_MODE_B.READ_FIRST 1387
+RAMB18E2_U.WRITE_MODE_B.WRITE_FIRST
+RAMB18E2_U.WRITE_WIDTH_A.0
+RAMB18E2_U.WRITE_WIDTH_A.1
+RAMB18E2_U.WRITE_WIDTH_A.18 1162
+RAMB18E2_U.WRITE_WIDTH_A.2 1165
+RAMB18E2_U.WRITE_WIDTH_A.4 1164
+RAMB18E2_U.WRITE_WIDTH_A.9 1164 1165
+RAMB18E2_U.WRITE_WIDTH_B.0
+RAMB18E2_U.WRITE_WIDTH_B.1
+RAMB18E2_U.WRITE_WIDTH_B.18 1154
+RAMB18E2_U.WRITE_WIDTH_B.2 1157
+RAMB18E2_U.WRITE_WIDTH_B.36 1109 1154 1162 1414
+RAMB18E2_U.WRITE_WIDTH_B.4 1156
+RAMB18E2_U.WRITE_WIDTH_B.9 1156 1157
+RAMB36E2.CASCADE_ORDER_A.FIRST 1047 1127
+RAMB36E2.CASCADE_ORDER_A.LAST
+RAMB36E2.CASCADE_ORDER_A.MIDDLE 1047 1127
+RAMB36E2.CASCADE_ORDER_A.NONE
+RAMB36E2.CASCADE_ORDER_B.FIRST 1046 1126
+RAMB36E2.CASCADE_ORDER_B.LAST
+RAMB36E2.CASCADE_ORDER_B.MIDDLE 1046 1126
+RAMB36E2.CASCADE_ORDER_B.NONE
+RAMB36E2.CLKARDCLKINV.0
+RAMB36E2.CLKARDCLKINV.1 1125 1291
+RAMB36E2.CLKBWRCLKINV.0
+RAMB36E2.CLKBWRCLKINV.1 1294 1363
+RAMB36E2.CLOCK_DOMAINS.COMMON 1058 1166
+RAMB36E2.CLOCK_DOMAINS.INDEPENDENT
+RAMB36E2.DOA_REG.0
+RAMB36E2.DOA_REG.1 1018 1384
+RAMB36E2.DOB_REG.0
+RAMB36E2.DOB_REG.1 1021 1381
+RAMB36E2.DOUTADOUT[0].USED 261 507 744
+RAMB36E2.DOUTADOUT[10].USED 309 555 792
+RAMB36E2.DOUTADOUT[11].USED 453 699 936
+RAMB36E2.DOUTADOUT[12].USED 309 555 792
+RAMB36E2.DOUTADOUT[13].USED 453 699 936
+RAMB36E2.DOUTADOUT[14].USED 357 603 840
+RAMB36E2.DOUTADOUT[15].USED 453 699 936
+RAMB36E2.DOUTADOUT[16].USED 261 507 744
+RAMB36E2.DOUTADOUT[17].USED 357 603 840
+RAMB36E2.DOUTADOUT[18].USED 261 507 744
+RAMB36E2.DOUTADOUT[19].USED 405 651 888
+RAMB36E2.DOUTADOUT[1].USED 357 603 840
+RAMB36E2.DOUTADOUT[20].USED 261 507 744
+RAMB36E2.DOUTADOUT[21].USED 405 651 888
+RAMB36E2.DOUTADOUT[22].USED 261 507 744
+RAMB36E2.DOUTADOUT[23].USED 405 651 888
+RAMB36E2.DOUTADOUT[24].USED 309 555 792
+RAMB36E2.DOUTADOUT[25].USED 453 699 936
+RAMB36E2.DOUTADOUT[26].USED 309 555 792
+RAMB36E2.DOUTADOUT[27].USED 453 699 936
+RAMB36E2.DOUTADOUT[28].USED 309 555 792
+RAMB36E2.DOUTADOUT[29].USED 453 699 936
+RAMB36E2.DOUTADOUT[2].USED 261 507 744
+RAMB36E2.DOUTADOUT[30].USED 357 603 840
+RAMB36E2.DOUTADOUT[31].USED 453 699 936
+RAMB36E2.DOUTADOUT[3].USED 405 651 888
+RAMB36E2.DOUTADOUT[4].USED 261 507 744
+RAMB36E2.DOUTADOUT[5].USED 405 651 888
+RAMB36E2.DOUTADOUT[6].USED 261 507 744
+RAMB36E2.DOUTADOUT[7].USED 405 651 888
+RAMB36E2.DOUTADOUT[8].USED 309 555 792
+RAMB36E2.DOUTADOUT[9].USED 453 699 936
+RAMB36E2.DOUTBDOUT[0].USED 261 507 744
+RAMB36E2.DOUTBDOUT[10].USED 309 555 792
+RAMB36E2.DOUTBDOUT[11].USED 453 699 936
+RAMB36E2.DOUTBDOUT[12].USED 309 555 792
+RAMB36E2.DOUTBDOUT[13].USED 453 699 936
+RAMB36E2.DOUTBDOUT[14].USED 357 603 840
+RAMB36E2.DOUTBDOUT[15].USED 453 699 936
+RAMB36E2.DOUTBDOUT[16].USED 261 507 744
+RAMB36E2.DOUTBDOUT[17].USED 357 603 840
+RAMB36E2.DOUTBDOUT[18].USED 261 507 744
+RAMB36E2.DOUTBDOUT[19].USED 405 651 888
+RAMB36E2.DOUTBDOUT[1].USED 357 603 840
+RAMB36E2.DOUTBDOUT[20].USED 261 507 744
+RAMB36E2.DOUTBDOUT[21].USED 405 651 888
+RAMB36E2.DOUTBDOUT[22].USED 261 507 744
+RAMB36E2.DOUTBDOUT[23].USED 405 651 888
+RAMB36E2.DOUTBDOUT[24].USED 309 555 792
+RAMB36E2.DOUTBDOUT[25].USED 453 699 936
+RAMB36E2.DOUTBDOUT[26].USED 309 555 792
+RAMB36E2.DOUTBDOUT[27].USED 453 699 936
+RAMB36E2.DOUTBDOUT[28].USED 309 555 792
+RAMB36E2.DOUTBDOUT[29].USED 453 699 936
+RAMB36E2.DOUTBDOUT[2].USED 261 507 744
+RAMB36E2.DOUTBDOUT[30].USED 357 603 840
+RAMB36E2.DOUTBDOUT[31].USED 453 699 936
+RAMB36E2.DOUTBDOUT[3].USED 405 651 888
+RAMB36E2.DOUTBDOUT[4].USED 261 507 744
+RAMB36E2.DOUTBDOUT[5].USED 405 651 888
+RAMB36E2.DOUTBDOUT[6].USED 261 507 744
+RAMB36E2.DOUTBDOUT[7].USED 405 651 888
+RAMB36E2.DOUTBDOUT[8].USED 309 555 792
+RAMB36E2.DOUTBDOUT[9].USED 453 699 936
+RAMB36E2.DOUTPADOUTP[0].USED 309 555 792
+RAMB36E2.DOUTPADOUTP[1].USED 405 651 888
+RAMB36E2.DOUTPADOUTP[2].USED 309 555 792
+RAMB36E2.DOUTPADOUTP[3].USED 405 651 888
+RAMB36E2.DOUTPBDOUTP[0].USED 309 555 792
+RAMB36E2.DOUTPBDOUTP[1].USED 405 651 888
+RAMB36E2.DOUTPBDOUTP[2].USED 309 555 792
+RAMB36E2.DOUTPBDOUTP[3].USED 405 651 888
+RAMB36E2.ENADDRENA.FALSE
+RAMB36E2.ENADDRENA.TRUE 1061 1155
+RAMB36E2.ENADDRENB.FALSE
+RAMB36E2.ENADDRENB.TRUE 1060 1153
+RAMB36E2.ENARDENINV.0
+RAMB36E2.ENARDENINV.1 1053 1360
+RAMB36E2.ENBWRENINV.0
+RAMB36E2.ENBWRENINV.1 1052 1357
+RAMB36E2.EN_ECC_PIPE.FALSE
+RAMB36E2.EN_ECC_PIPE.TRUE 1339
+RAMB36E2.EN_ECC_READ.FALSE
+RAMB36E2.EN_ECC_READ.TRUE 1100
+RAMB36E2.EN_ECC_WRITE.FALSE
+RAMB36E2.EN_ECC_WRITE.TRUE 1330
+RAMB36E2.INIT_A[0] 1202
+RAMB36E2.INIT_A[10] 1274
+RAMB36E2.INIT_A[11] 1406
+RAMB36E2.INIT_A[12] 1286
+RAMB36E2.INIT_A[13] 1418
+RAMB36E2.INIT_A[14] 1298
+RAMB36E2.INIT_A[15] 1430
+RAMB36E2.INIT_A[16] 1208
+RAMB36E2.INIT_A[17] 1340
+RAMB36E2.INIT_A[18] 1220
+RAMB36E2.INIT_A[19] 1352
+RAMB36E2.INIT_A[1] 1334
+RAMB36E2.INIT_A[20] 1232
+RAMB36E2.INIT_A[21] 1364
+RAMB36E2.INIT_A[22] 1244
+RAMB36E2.INIT_A[23] 1376
+RAMB36E2.INIT_A[24] 1268
+RAMB36E2.INIT_A[25] 1400
+RAMB36E2.INIT_A[26] 1280
+RAMB36E2.INIT_A[27] 1412
+RAMB36E2.INIT_A[28] 1292
+RAMB36E2.INIT_A[29] 1424
+RAMB36E2.INIT_A[2] 1214
+RAMB36E2.INIT_A[30] 1304
+RAMB36E2.INIT_A[31] 1436
+RAMB36E2.INIT_A[32] 1250
+RAMB36E2.INIT_A[33] 1382
+RAMB36E2.INIT_A[34] 1256
+RAMB36E2.INIT_A[35] 1388
+RAMB36E2.INIT_A[3] 1346
+RAMB36E2.INIT_A[4] 1226
+RAMB36E2.INIT_A[5] 1358
+RAMB36E2.INIT_A[6] 1238
+RAMB36E2.INIT_A[7] 1370
+RAMB36E2.INIT_A[8] 1262
+RAMB36E2.INIT_A[9] 1394
+RAMB36E2.INIT_B[0] 1205
+RAMB36E2.INIT_B[10] 1277
+RAMB36E2.INIT_B[11] 1409
+RAMB36E2.INIT_B[12] 1289
+RAMB36E2.INIT_B[13] 1421
+RAMB36E2.INIT_B[14] 1301
+RAMB36E2.INIT_B[15] 1433
+RAMB36E2.INIT_B[16] 1211
+RAMB36E2.INIT_B[17] 1343
+RAMB36E2.INIT_B[18] 1223
+RAMB36E2.INIT_B[19] 1355
+RAMB36E2.INIT_B[1] 1337
+RAMB36E2.INIT_B[20] 1235
+RAMB36E2.INIT_B[21] 1367
+RAMB36E2.INIT_B[22] 1247
+RAMB36E2.INIT_B[23] 1379
+RAMB36E2.INIT_B[24] 1271
+RAMB36E2.INIT_B[25] 1403
+RAMB36E2.INIT_B[26] 1283
+RAMB36E2.INIT_B[27] 1415
+RAMB36E2.INIT_B[28] 1295
+RAMB36E2.INIT_B[29] 1427
+RAMB36E2.INIT_B[2] 1217
+RAMB36E2.INIT_B[30] 1307
+RAMB36E2.INIT_B[31] 1439
+RAMB36E2.INIT_B[32] 1253
+RAMB36E2.INIT_B[33] 1385
+RAMB36E2.INIT_B[34] 1259
+RAMB36E2.INIT_B[35] 1391
+RAMB36E2.INIT_B[3] 1349
+RAMB36E2.INIT_B[4] 1229
+RAMB36E2.INIT_B[5] 1361
+RAMB36E2.INIT_B[6] 1241
+RAMB36E2.INIT_B[7] 1373
+RAMB36E2.INIT_B[8] 1265
+RAMB36E2.INIT_B[9] 1397
+RAMB36E2.IN_USE 1282 1285 1328 1369 1372
+RAMB36E2.RDADDRCHANGEA.FALSE
+RAMB36E2.RDADDRCHANGEA.TRUE 1057 1151
+RAMB36E2.RDADDRCHANGEB.FALSE
+RAMB36E2.RDADDRCHANGEB.TRUE 1056 1152
+RAMB36E2.READ_WIDTH_A.0
+RAMB36E2.READ_WIDTH_A.1 1096
+RAMB36E2.READ_WIDTH_A.18 1180 1181 1234 1237
+RAMB36E2.READ_WIDTH_A.2
+RAMB36E2.READ_WIDTH_A.36 1179 1240
+RAMB36E2.READ_WIDTH_A.4 1181 1234
+RAMB36E2.READ_WIDTH_A.72 1044 1109 1171 1179 1225 1240 1249 1408
+RAMB36E2.READ_WIDTH_A.9 1096 1180 1237
+RAMB36E2.READ_WIDTH_B.0
+RAMB36E2.READ_WIDTH_B.1 1095
+RAMB36E2.READ_WIDTH_B.18 1174 1178 1228 1231
+RAMB36E2.READ_WIDTH_B.2
+RAMB36E2.READ_WIDTH_B.36 1171 1225
+RAMB36E2.READ_WIDTH_B.4 1178 1231
+RAMB36E2.READ_WIDTH_B.9 1095 1174 1228
+RAMB36E2.RSTRAMARSTRAMINV.0
+RAMB36E2.RSTRAMARSTRAMINV.1 1051 1354
+RAMB36E2.RSTRAMBINV.0
+RAMB36E2.RSTRAMBINV.1 1050 1117
+RAMB36E2.RSTREGARSTREGINV.0
+RAMB36E2.RSTREGARSTREGINV.1 1045 1351
+RAMB36E2.RSTREGBINV.0
+RAMB36E2.RSTREGBINV.1 1044 1109
+RAMB36E2.RSTREG_PRIORITY_A.REGCE 1043 1108
+RAMB36E2.RSTREG_PRIORITY_A.RSTREG
+RAMB36E2.RSTREG_PRIORITY_B.REGCE 1042 1105
+RAMB36E2.RSTREG_PRIORITY_B.RSTREG
+RAMB36E2.SLEEP_ASYNC.FALSE
+RAMB36E2.SLEEP_ASYNC.TRUE 1288 1366
+RAMB36E2.SRVAL_A[0] 1200
+RAMB36E2.SRVAL_A[10] 1272
+RAMB36E2.SRVAL_A[11] 1404
+RAMB36E2.SRVAL_A[12] 1284
+RAMB36E2.SRVAL_A[13] 1416
+RAMB36E2.SRVAL_A[14] 1296
+RAMB36E2.SRVAL_A[15] 1428
+RAMB36E2.SRVAL_A[16] 1206
+RAMB36E2.SRVAL_A[17] 1338
+RAMB36E2.SRVAL_A[18] 1218
+RAMB36E2.SRVAL_A[19] 1350
+RAMB36E2.SRVAL_A[1] 1332
+RAMB36E2.SRVAL_A[20] 1230
+RAMB36E2.SRVAL_A[21] 1362
+RAMB36E2.SRVAL_A[22] 1242
+RAMB36E2.SRVAL_A[23] 1374
+RAMB36E2.SRVAL_A[24] 1266
+RAMB36E2.SRVAL_A[25] 1398
+RAMB36E2.SRVAL_A[26] 1278
+RAMB36E2.SRVAL_A[27] 1410
+RAMB36E2.SRVAL_A[28] 1290
+RAMB36E2.SRVAL_A[29] 1422
+RAMB36E2.SRVAL_A[2] 1212
+RAMB36E2.SRVAL_A[30] 1302
+RAMB36E2.SRVAL_A[31] 1434
+RAMB36E2.SRVAL_A[32] 1248
+RAMB36E2.SRVAL_A[33] 1380
+RAMB36E2.SRVAL_A[34] 1254
+RAMB36E2.SRVAL_A[35] 1386
+RAMB36E2.SRVAL_A[3] 1345
+RAMB36E2.SRVAL_A[4] 1224
+RAMB36E2.SRVAL_A[5] 1356
+RAMB36E2.SRVAL_A[6] 1236
+RAMB36E2.SRVAL_A[7] 1368
+RAMB36E2.SRVAL_A[8] 1260
+RAMB36E2.SRVAL_A[9] 1392
+RAMB36E2.SRVAL_B[0] 1203
+RAMB36E2.SRVAL_B[10] 1275
+RAMB36E2.SRVAL_B[11] 1407
+RAMB36E2.SRVAL_B[12] 1287
+RAMB36E2.SRVAL_B[13] 1419
+RAMB36E2.SRVAL_B[14] 1299
+RAMB36E2.SRVAL_B[15] 1431
+RAMB36E2.SRVAL_B[16] 1209
+RAMB36E2.SRVAL_B[17] 1341
+RAMB36E2.SRVAL_B[18] 1221
+RAMB36E2.SRVAL_B[19] 1353
+RAMB36E2.SRVAL_B[1] 1335
+RAMB36E2.SRVAL_B[20] 1233
+RAMB36E2.SRVAL_B[21] 1365
+RAMB36E2.SRVAL_B[22] 1245
+RAMB36E2.SRVAL_B[23] 1377
+RAMB36E2.SRVAL_B[24] 1269
+RAMB36E2.SRVAL_B[25] 1401
+RAMB36E2.SRVAL_B[26] 1281
+RAMB36E2.SRVAL_B[27] 1413
+RAMB36E2.SRVAL_B[28] 1293
+RAMB36E2.SRVAL_B[29] 1425
+RAMB36E2.SRVAL_B[2] 1215
+RAMB36E2.SRVAL_B[30] 1305
+RAMB36E2.SRVAL_B[31] 1437
+RAMB36E2.SRVAL_B[32] 1251
+RAMB36E2.SRVAL_B[33] 1383
+RAMB36E2.SRVAL_B[34] 1257
+RAMB36E2.SRVAL_B[35] 1389
+RAMB36E2.SRVAL_B[3] 1347
+RAMB36E2.SRVAL_B[4] 1227
+RAMB36E2.SRVAL_B[5] 1359
+RAMB36E2.SRVAL_B[6] 1239
+RAMB36E2.SRVAL_B[7] 1371
+RAMB36E2.SRVAL_B[8] 1263
+RAMB36E2.SRVAL_B[9] 1395
+RAMB36E2.WRITE_MODE_A.NO_CHANGE 1243 1399
+RAMB36E2.WRITE_MODE_A.READ_FIRST 1246 1393
+RAMB36E2.WRITE_MODE_A.WRITE_FIRST
+RAMB36E2.WRITE_MODE_B.NO_CHANGE 1255 1390
+RAMB36E2.WRITE_MODE_B.READ_FIRST 1252 1387
+RAMB36E2.WRITE_MODE_B.WRITE_FIRST
+RAMB36E2.WRITE_WIDTH_A.0
+RAMB36E2.WRITE_WIDTH_A.1 1087
+RAMB36E2.WRITE_WIDTH_A.18 1002 1003 1164 1165
+RAMB36E2.WRITE_WIDTH_A.2
+RAMB36E2.WRITE_WIDTH_A.36 1004 1162
+RAMB36E2.WRITE_WIDTH_A.4 1002 1165
+RAMB36E2.WRITE_WIDTH_A.9 1003 1087 1164
+RAMB36E2.WRITE_WIDTH_B.0
+RAMB36E2.WRITE_WIDTH_B.1 1094
+RAMB36E2.WRITE_WIDTH_B.18 1005 1006 1156 1157
+RAMB36E2.WRITE_WIDTH_B.2
+RAMB36E2.WRITE_WIDTH_B.36 1007 1154
+RAMB36E2.WRITE_WIDTH_B.4 1005 1157
+RAMB36E2.WRITE_WIDTH_B.72 1004 1007 1044 1109 1154 1162 1264 1414
+RAMB36E2.WRITE_WIDTH_B.9 1006 1094 1156
diff --git a/CLEL_R.bits b/CLEL_R.bits
new file mode 100644
index 0000000..68bbe27
--- /dev/null
+++ b/CLEL_R.bits
@@ -0,0 +1,830 @@
+ABCDFF.CEUSED 679
+ABCDFF.FF
+ABCDFF.FF.CLKINV.0
+ABCDFF.FF.CLKINV.1 403
+ABCDFF.FF.SRINV.0
+ABCDFF.FF.SRINV.1 450
+ABCDFF.FF.SYNC 731
+ABCDFF.LATCH 685
+ABCDFF.LATCH.CLKINV.0 403
+ABCDFF.LATCH.CLKINV.1
+ABCDFF.LATCH.SRINV.0
+ABCDFF.LATCH.SRINV.1 450
+ABCDFF.SRUSED 725
+ABCDFF2.CEUSED 691
+ABCDFF2.SRUSED 737
+AFF.FF.INIT.0 578
+AFF.FF.INIT.1
+AFF.FF.SRVAL.0 577
+AFF.FF.SRVAL.1
+AFF.LATCH.INIT.0 578
+AFF.LATCH.INIT.1
+AFF.LATCH.SRVAL.0 577
+AFF.LATCH.SRVAL.1
+AFF2.FF.INIT.0 590
+AFF2.FF.INIT.1
+AFF2.FF.SRVAL.0 589
+AFF2.FF.SRVAL.1
+AFF2.LATCH.INIT.0 590
+AFF2.LATCH.INIT.1
+AFF2.LATCH.SRVAL.0 589
+AFF2.LATCH.SRVAL.1
+ALUT.INIT[0] 543
+ALUT.INIT[10] 445
+ALUT.INIT[11] 397
+ALUT.INIT[12] 540
+ALUT.INIT[13] 492
+ALUT.INIT[14] 444
+ALUT.INIT[15] 396
+ALUT.INIT[16] 539
+ALUT.INIT[17] 491
+ALUT.INIT[18] 443
+ALUT.INIT[19] 395
+ALUT.INIT[1] 495
+ALUT.INIT[20] 538
+ALUT.INIT[21] 490
+ALUT.INIT[22] 442
+ALUT.INIT[23] 394
+ALUT.INIT[24] 537
+ALUT.INIT[25] 489
+ALUT.INIT[26] 441
+ALUT.INIT[27] 393
+ALUT.INIT[28] 536
+ALUT.INIT[29] 488
+ALUT.INIT[2] 447
+ALUT.INIT[30] 440
+ALUT.INIT[31] 392
+ALUT.INIT[32] 535
+ALUT.INIT[33] 487
+ALUT.INIT[34] 439
+ALUT.INIT[35] 391
+ALUT.INIT[36] 534
+ALUT.INIT[37] 486
+ALUT.INIT[38] 438
+ALUT.INIT[39] 390
+ALUT.INIT[3] 399
+ALUT.INIT[40] 533
+ALUT.INIT[41] 485
+ALUT.INIT[42] 437
+ALUT.INIT[43] 389
+ALUT.INIT[44] 532
+ALUT.INIT[45] 484
+ALUT.INIT[46] 436
+ALUT.INIT[47] 388
+ALUT.INIT[48] 531
+ALUT.INIT[49] 483
+ALUT.INIT[4] 542
+ALUT.INIT[50] 435
+ALUT.INIT[51] 387
+ALUT.INIT[52] 530
+ALUT.INIT[53] 482
+ALUT.INIT[54] 434
+ALUT.INIT[55] 386
+ALUT.INIT[56] 529
+ALUT.INIT[57] 481
+ALUT.INIT[58] 433
+ALUT.INIT[59] 385
+ALUT.INIT[5] 494
+ALUT.INIT[60] 528
+ALUT.INIT[61] 480
+ALUT.INIT[62] 432
+ALUT.INIT[63] 384
+ALUT.INIT[6] 446
+ALUT.INIT[7] 398
+ALUT.INIT[8] 541
+ALUT.INIT[9] 493
+BFF.FF.INIT.0 580
+BFF.FF.INIT.1
+BFF.FF.SRVAL.0 581
+BFF.FF.SRVAL.1
+BFF.LATCH.INIT.0 580
+BFF.LATCH.INIT.1
+BFF.LATCH.SRVAL.0 581
+BFF.LATCH.SRVAL.1
+BFF2.FF.INIT.0 592
+BFF2.FF.INIT.1
+BFF2.FF.SRVAL.0 593
+BFF2.FF.SRVAL.1
+BFF2.LATCH.INIT.0 592
+BFF2.LATCH.INIT.1
+BFF2.LATCH.SRVAL.0 593
+BFF2.LATCH.SRVAL.1
+BLUT.INIT[0] 351
+BLUT.INIT[10] 253
+BLUT.INIT[11] 205
+BLUT.INIT[12] 348
+BLUT.INIT[13] 300
+BLUT.INIT[14] 252
+BLUT.INIT[15] 204
+BLUT.INIT[16] 347
+BLUT.INIT[17] 299
+BLUT.INIT[18] 251
+BLUT.INIT[19] 203
+BLUT.INIT[1] 303
+BLUT.INIT[20] 346
+BLUT.INIT[21] 298
+BLUT.INIT[22] 250
+BLUT.INIT[23] 202
+BLUT.INIT[24] 345
+BLUT.INIT[25] 297
+BLUT.INIT[26] 249
+BLUT.INIT[27] 201
+BLUT.INIT[28] 344
+BLUT.INIT[29] 296
+BLUT.INIT[2] 255
+BLUT.INIT[30] 248
+BLUT.INIT[31] 200
+BLUT.INIT[32] 343
+BLUT.INIT[33] 295
+BLUT.INIT[34] 247
+BLUT.INIT[35] 199
+BLUT.INIT[36] 342
+BLUT.INIT[37] 294
+BLUT.INIT[38] 246
+BLUT.INIT[39] 198
+BLUT.INIT[3] 207
+BLUT.INIT[40] 341
+BLUT.INIT[41] 293
+BLUT.INIT[42] 245
+BLUT.INIT[43] 197
+BLUT.INIT[44] 340
+BLUT.INIT[45] 292
+BLUT.INIT[46] 244
+BLUT.INIT[47] 196
+BLUT.INIT[48] 339
+BLUT.INIT[49] 291
+BLUT.INIT[4] 350
+BLUT.INIT[50] 243
+BLUT.INIT[51] 195
+BLUT.INIT[52] 338
+BLUT.INIT[53] 290
+BLUT.INIT[54] 242
+BLUT.INIT[55] 194
+BLUT.INIT[56] 337
+BLUT.INIT[57] 289
+BLUT.INIT[58] 241
+BLUT.INIT[59] 193
+BLUT.INIT[5] 302
+BLUT.INIT[60] 336
+BLUT.INIT[61] 288
+BLUT.INIT[62] 240
+BLUT.INIT[63] 192
+BLUT.INIT[6] 254
+BLUT.INIT[7] 206
+BLUT.INIT[8] 349
+BLUT.INIT[9] 301
+CARRY8.CARRY_TYPE.DUAL_CY4 621
+CARRY8.CARRY_TYPE.SINGLE_CY8
+CARRY8.CI.0
+CARRY8.CI.1 498
+CARRY8.CI.AX 673
+CARRY8.CI_TOP.0
+CARRY8.CI_TOP.1 559
+CARRY8.CI_TOP.EX 603 743
+CARRY8.DI0.AX
+CARRY8.DI0.DI0 579
+CARRY8.DI1.BX
+CARRY8.DI1.DI1 585
+CARRY8.DI2.CX
+CARRY8.DI2.DI2 591
+CARRY8.DI3.DI3 597
+CARRY8.DI3.DX
+CARRY8.DI4.DI4 743
+CARRY8.DI4.EX
+CARRY8.DI5.DI5 615
+CARRY8.DI5.FX
+CARRY8.DI6.DI6 609
+CARRY8.DI6.GX
+CARRY8.DI7.DI7 767
+CARRY8.DI7.HX
+CFF.FF.INIT.0 584
+CFF.FF.INIT.1
+CFF.FF.SRVAL.0 583
+CFF.FF.SRVAL.1
+CFF.LATCH.INIT.0 584
+CFF.LATCH.INIT.1
+CFF.LATCH.SRVAL.0 583
+CFF.LATCH.SRVAL.1
+CFF2.FF.INIT.0 596
+CFF2.FF.INIT.1
+CFF2.FF.SRVAL.0 595
+CFF2.FF.SRVAL.1
+CFF2.LATCH.INIT.0 596
+CFF2.LATCH.INIT.1
+CFF2.LATCH.SRVAL.0 595
+CFF2.LATCH.SRVAL.1
+CLUT.INIT[0] 159
+CLUT.INIT[10] 61
+CLUT.INIT[11] 13
+CLUT.INIT[12] 156
+CLUT.INIT[13] 108
+CLUT.INIT[14] 60
+CLUT.INIT[15] 12
+CLUT.INIT[16] 155
+CLUT.INIT[17] 107
+CLUT.INIT[18] 59
+CLUT.INIT[19] 11
+CLUT.INIT[1] 111
+CLUT.INIT[20] 154
+CLUT.INIT[21] 106
+CLUT.INIT[22] 58
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+EFGHFF.CEUSED 703
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+ELUT.INIT[0] 367
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diff --git a/CLEM.bits b/CLEM.bits
new file mode 100644
index 0000000..3c81e04
--- /dev/null
+++ b/CLEM.bits
@@ -0,0 +1,899 @@
+ABCDFF.CEUSED 679
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+HLUT.INIT[0] 575
+HLUT.INIT[10] 477
+HLUT.INIT[11] 429
+HLUT.INIT[12] 572
+HLUT.INIT[13] 524
+HLUT.INIT[14] 476
+HLUT.INIT[15] 428
+HLUT.INIT[16] 571
+HLUT.INIT[17] 523
+HLUT.INIT[18] 475
+HLUT.INIT[19] 427
+HLUT.INIT[1] 527
+HLUT.INIT[20] 570
+HLUT.INIT[21] 522
+HLUT.INIT[22] 474
+HLUT.INIT[23] 426
+HLUT.INIT[24] 569
+HLUT.INIT[25] 521
+HLUT.INIT[26] 473
+HLUT.INIT[27] 425
+HLUT.INIT[28] 568
+HLUT.INIT[29] 520
+HLUT.INIT[2] 479
+HLUT.INIT[30] 472
+HLUT.INIT[31] 424
+HLUT.INIT[32] 567
+HLUT.INIT[33] 519
+HLUT.INIT[34] 471
+HLUT.INIT[35] 423
+HLUT.INIT[36] 566
+HLUT.INIT[37] 518
+HLUT.INIT[38] 470
+HLUT.INIT[39] 422
+HLUT.INIT[3] 431
+HLUT.INIT[40] 565
+HLUT.INIT[41] 517
+HLUT.INIT[42] 469
+HLUT.INIT[43] 421
+HLUT.INIT[44] 564
+HLUT.INIT[45] 516
+HLUT.INIT[46] 468
+HLUT.INIT[47] 420
+HLUT.INIT[48] 563
+HLUT.INIT[49] 515
+HLUT.INIT[4] 574
+HLUT.INIT[50] 467
+HLUT.INIT[51] 419
+HLUT.INIT[52] 562
+HLUT.INIT[53] 514
+HLUT.INIT[54] 466
+HLUT.INIT[55] 418
+HLUT.INIT[56] 561
+HLUT.INIT[57] 513
+HLUT.INIT[58] 465
+HLUT.INIT[59] 417
+HLUT.INIT[5] 526
+HLUT.INIT[60] 560
+HLUT.INIT[61] 512
+HLUT.INIT[62] 464
+HLUT.INIT[63] 416
+HLUT.INIT[6] 478
+HLUT.INIT[7] 430
+HLUT.INIT[8] 573
+HLUT.INIT[9] 525
+HLUT.RAM 414
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diff --git a/CMT_L.bits b/CMT_L.bits
new file mode 100644
index 0000000..2acaec9
--- /dev/null
+++ b/CMT_L.bits
@@ -0,0 +1,1693 @@
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+BUFGCE_DIV_X0Y0.BUFGCE_DIV.BUFGCE_DIVIDE.8 18825 18826 21706
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+BUFGCE_DIV_X0Y1.BUFGCE_DIV.BUFGCE_DIVIDE.6 13065 13066
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+BUFGCTRL_X0Y2.BUFGCTRL.PRESELECT_I0.false 15927
+BUFGCTRL_X0Y2.BUFGCTRL.PRESELECT_I0.true
+BUFGCTRL_X0Y2.BUFGCTRL.PRESELECT_I1.false
+BUFGCTRL_X0Y2.BUFGCTRL.PRESELECT_I1.true 15928
+BUFGCTRL_X0Y2.BUFGCTRL.S0INV.0
+BUFGCTRL_X0Y2.BUFGCTRL.S0INV.1 13056
+BUFGCTRL_X0Y2.BUFGCTRL.S1INV.0
+BUFGCTRL_X0Y2.BUFGCTRL.S1INV.1 13057
+BUFGCTRL_X0Y3.BUFGCTRL.CE0INV.0
+BUFGCTRL_X0Y3.BUFGCTRL.CE0INV.1 13051
+BUFGCTRL_X0Y3.BUFGCTRL.CE1INV.0
+BUFGCTRL_X0Y3.BUFGCTRL.CE1INV.1 13052
+BUFGCTRL_X0Y3.BUFGCTRL.I0INV.0
+BUFGCTRL_X0Y3.BUFGCTRL.I0INV.1
+BUFGCTRL_X0Y3.BUFGCTRL.I1INV.0
+BUFGCTRL_X0Y3.BUFGCTRL.I1INV.1
+BUFGCTRL_X0Y3.BUFGCTRL.IGNORE0INV.0
+BUFGCTRL_X0Y3.BUFGCTRL.IGNORE0INV.1 13054
+BUFGCTRL_X0Y3.BUFGCTRL.IGNORE1INV.0
+BUFGCTRL_X0Y3.BUFGCTRL.IGNORE1INV.1 13055
+BUFGCTRL_X0Y3.BUFGCTRL.INIT_OUT.0
+BUFGCTRL_X0Y3.BUFGCTRL.INIT_OUT.1 13053
+BUFGCTRL_X0Y3.BUFGCTRL.IN_USE 13046
+BUFGCTRL_X0Y3.BUFGCTRL.PRESELECT_I0.false 13047
+BUFGCTRL_X0Y3.BUFGCTRL.PRESELECT_I0.true
+BUFGCTRL_X0Y3.BUFGCTRL.PRESELECT_I1.false
+BUFGCTRL_X0Y3.BUFGCTRL.PRESELECT_I1.true 13048
+BUFGCTRL_X0Y3.BUFGCTRL.S0INV.0
+BUFGCTRL_X0Y3.BUFGCTRL.S0INV.1 15937
+BUFGCTRL_X0Y3.BUFGCTRL.S1INV.0
+BUFGCTRL_X0Y3.BUFGCTRL.S1INV.1 15938
+BUFGCTRL_X0Y4.BUFGCTRL.CE0INV.0
+BUFGCTRL_X0Y4.BUFGCTRL.CE0INV.1 24571
+BUFGCTRL_X0Y4.BUFGCTRL.CE1INV.0
+BUFGCTRL_X0Y4.BUFGCTRL.CE1INV.1 24572
+BUFGCTRL_X0Y4.BUFGCTRL.I0INV.0
+BUFGCTRL_X0Y4.BUFGCTRL.I0INV.1
+BUFGCTRL_X0Y4.BUFGCTRL.I1INV.0
+BUFGCTRL_X0Y4.BUFGCTRL.I1INV.1
+BUFGCTRL_X0Y4.BUFGCTRL.IGNORE0INV.0
+BUFGCTRL_X0Y4.BUFGCTRL.IGNORE0INV.1 24574
+BUFGCTRL_X0Y4.BUFGCTRL.IGNORE1INV.0
+BUFGCTRL_X0Y4.BUFGCTRL.IGNORE1INV.1 24575
+BUFGCTRL_X0Y4.BUFGCTRL.INIT_OUT.0
+BUFGCTRL_X0Y4.BUFGCTRL.INIT_OUT.1 24573
+BUFGCTRL_X0Y4.BUFGCTRL.IN_USE 24566
+BUFGCTRL_X0Y4.BUFGCTRL.PRESELECT_I0.false 24567
+BUFGCTRL_X0Y4.BUFGCTRL.PRESELECT_I0.true
+BUFGCTRL_X0Y4.BUFGCTRL.PRESELECT_I1.false
+BUFGCTRL_X0Y4.BUFGCTRL.PRESELECT_I1.true 24568
+BUFGCTRL_X0Y4.BUFGCTRL.S0INV.0
+BUFGCTRL_X0Y4.BUFGCTRL.S0INV.1 27456
+BUFGCTRL_X0Y4.BUFGCTRL.S1INV.0
+BUFGCTRL_X0Y4.BUFGCTRL.S1INV.1 27457
+BUFGCTRL_X0Y5.BUFGCTRL.CE0INV.0
+BUFGCTRL_X0Y5.BUFGCTRL.CE0INV.1 27451
+BUFGCTRL_X0Y5.BUFGCTRL.CE1INV.0
+BUFGCTRL_X0Y5.BUFGCTRL.CE1INV.1 27452
+BUFGCTRL_X0Y5.BUFGCTRL.I0INV.0
+BUFGCTRL_X0Y5.BUFGCTRL.I0INV.1
+BUFGCTRL_X0Y5.BUFGCTRL.I1INV.0
+BUFGCTRL_X0Y5.BUFGCTRL.I1INV.1
+BUFGCTRL_X0Y5.BUFGCTRL.IGNORE0INV.0
+BUFGCTRL_X0Y5.BUFGCTRL.IGNORE0INV.1 27454
+BUFGCTRL_X0Y5.BUFGCTRL.IGNORE1INV.0
+BUFGCTRL_X0Y5.BUFGCTRL.IGNORE1INV.1 27455
+BUFGCTRL_X0Y5.BUFGCTRL.INIT_OUT.0
+BUFGCTRL_X0Y5.BUFGCTRL.INIT_OUT.1 27453
+BUFGCTRL_X0Y5.BUFGCTRL.IN_USE 27446
+BUFGCTRL_X0Y5.BUFGCTRL.PRESELECT_I0.false 27447
+BUFGCTRL_X0Y5.BUFGCTRL.PRESELECT_I0.true
+BUFGCTRL_X0Y5.BUFGCTRL.PRESELECT_I1.false
+BUFGCTRL_X0Y5.BUFGCTRL.PRESELECT_I1.true 27448
+BUFGCTRL_X0Y5.BUFGCTRL.S0INV.0
+BUFGCTRL_X0Y5.BUFGCTRL.S0INV.1 24577
+BUFGCTRL_X0Y5.BUFGCTRL.S1INV.0
+BUFGCTRL_X0Y5.BUFGCTRL.S1INV.1 24578
+BUFGCTRL_X0Y6.BUFGCTRL.CE0INV.0
+BUFGCTRL_X0Y6.BUFGCTRL.CE0INV.1 30331
+BUFGCTRL_X0Y6.BUFGCTRL.CE1INV.0
+BUFGCTRL_X0Y6.BUFGCTRL.CE1INV.1 30332
+BUFGCTRL_X0Y6.BUFGCTRL.I0INV.0
+BUFGCTRL_X0Y6.BUFGCTRL.I0INV.1
+BUFGCTRL_X0Y6.BUFGCTRL.I1INV.0
+BUFGCTRL_X0Y6.BUFGCTRL.I1INV.1
+BUFGCTRL_X0Y6.BUFGCTRL.IGNORE0INV.0
+BUFGCTRL_X0Y6.BUFGCTRL.IGNORE0INV.1 30334
+BUFGCTRL_X0Y6.BUFGCTRL.IGNORE1INV.0
+BUFGCTRL_X0Y6.BUFGCTRL.IGNORE1INV.1 30335
+BUFGCTRL_X0Y6.BUFGCTRL.INIT_OUT.0
+BUFGCTRL_X0Y6.BUFGCTRL.INIT_OUT.1 30333
+BUFGCTRL_X0Y6.BUFGCTRL.IN_USE 30326
+BUFGCTRL_X0Y6.BUFGCTRL.PRESELECT_I0.false 30327
+BUFGCTRL_X0Y6.BUFGCTRL.PRESELECT_I0.true
+BUFGCTRL_X0Y6.BUFGCTRL.PRESELECT_I1.false
+BUFGCTRL_X0Y6.BUFGCTRL.PRESELECT_I1.true 30328
+BUFGCTRL_X0Y6.BUFGCTRL.S0INV.0
+BUFGCTRL_X0Y6.BUFGCTRL.S0INV.1 33216
+BUFGCTRL_X0Y6.BUFGCTRL.S1INV.0
+BUFGCTRL_X0Y6.BUFGCTRL.S1INV.1 33217
+BUFGCTRL_X0Y7.BUFGCTRL.CE0INV.0
+BUFGCTRL_X0Y7.BUFGCTRL.CE0INV.1 33211
+BUFGCTRL_X0Y7.BUFGCTRL.CE1INV.0
+BUFGCTRL_X0Y7.BUFGCTRL.CE1INV.1 33212
+BUFGCTRL_X0Y7.BUFGCTRL.I0INV.0
+BUFGCTRL_X0Y7.BUFGCTRL.I0INV.1
+BUFGCTRL_X0Y7.BUFGCTRL.I1INV.0
+BUFGCTRL_X0Y7.BUFGCTRL.I1INV.1
+BUFGCTRL_X0Y7.BUFGCTRL.IGNORE0INV.0
+BUFGCTRL_X0Y7.BUFGCTRL.IGNORE0INV.1 33214
+BUFGCTRL_X0Y7.BUFGCTRL.IGNORE1INV.0
+BUFGCTRL_X0Y7.BUFGCTRL.IGNORE1INV.1 33215
+BUFGCTRL_X0Y7.BUFGCTRL.INIT_OUT.0
+BUFGCTRL_X0Y7.BUFGCTRL.INIT_OUT.1 33213
+BUFGCTRL_X0Y7.BUFGCTRL.IN_USE 33206
+BUFGCTRL_X0Y7.BUFGCTRL.PRESELECT_I0.false 33207
+BUFGCTRL_X0Y7.BUFGCTRL.PRESELECT_I0.true
+BUFGCTRL_X0Y7.BUFGCTRL.PRESELECT_I1.false
+BUFGCTRL_X0Y7.BUFGCTRL.PRESELECT_I1.true 33208
+BUFGCTRL_X0Y7.BUFGCTRL.S0INV.0
+BUFGCTRL_X0Y7.BUFGCTRL.S0INV.1 30337
+BUFGCTRL_X0Y7.BUFGCTRL.S1INV.0
+BUFGCTRL_X0Y7.BUFGCTRL.S1INV.1 30338
+PIP.CLK_BUFCE_ROW_10_CLK_IN.CLK_VDISTR_BOT2 21672
+PIP.CLK_BUFCE_ROW_10_CLK_IN.CLK_VDISTR_TOP2 21675 21678
+PIP.CLK_BUFCE_ROW_10_CLK_OUT.CLK_BUFCE_ROW_10_CLK_IN 21526 21541
+PIP.CLK_BUFCE_ROW_14_CLK_IN.CLK_VDISTR_BOT3 18792
+PIP.CLK_BUFCE_ROW_14_CLK_IN.CLK_VDISTR_TOP3 18795 18798
+PIP.CLK_BUFCE_ROW_14_CLK_OUT.CLK_BUFCE_ROW_14_CLK_IN 18646
+PIP.CLK_BUFCE_ROW_17_CLK_IN.CLK_VDISTR_BOT4 21673
+PIP.CLK_BUFCE_ROW_17_CLK_IN.CLK_VDISTR_TOP4 21676 21679
+PIP.CLK_BUFCE_ROW_17_CLK_OUT.CLK_BUFCE_ROW_17_CLK_IN 21527 21542
+PIP.CLK_BUFCE_ROW_20_CLK_IN.CLK_VDISTR_BOT5 18793
+PIP.CLK_BUFCE_ROW_20_CLK_IN.CLK_VDISTR_TOP5 18796 18799
+PIP.CLK_BUFCE_ROW_20_CLK_OUT.CLK_BUFCE_ROW_20_CE_PRE_OPTINV 12947 13112 15827 15828 15999 18638 18872 18877 21706 27325 30228 33272
+PIP.CLK_BUFCE_ROW_20_CLK_OUT.CLK_BUFCE_ROW_20_CLK_IN 18647
+PIP.CLK_BUFCE_ROW_25_CLK_IN.CLK_VDISTR_BOT6 15911
+PIP.CLK_BUFCE_ROW_25_CLK_IN.CLK_VDISTR_TOP6 15914 15917
+PIP.CLK_BUFCE_ROW_25_CLK_OUT.CLK_BUFCE_ROW_25_CE_PRE_OPTINV 12947 15756 15894 18658 18659 18862 18874 18877 21538 21539 21653 21748 21759 24592 24628 24662 27324 27516 27550 30228 30388 33109
+PIP.CLK_BUFCE_ROW_25_CLK_OUT.CLK_BUFCE_ROW_25_CLK_IN 15765
+PIP.CLK_BUFCE_ROW_28_CLK_IN.CLK_VDISTR_BOT7 13031
+PIP.CLK_BUFCE_ROW_28_CLK_IN.CLK_VDISTR_TOP7 13034 13037
+PIP.CLK_BUFCE_ROW_28_CLK_OUT.CLK_BUFCE_ROW_28_CE_PRE_OPTINV 12876 13148 15828 18657 18658 21539 21656
+PIP.CLK_BUFCE_ROW_28_CLK_OUT.CLK_BUFCE_ROW_28_CLK_IN 12885
+PIP.CLK_BUFCE_ROW_31_CLK_IN.CLK_VDISTR_BOT8 15912
+PIP.CLK_BUFCE_ROW_31_CLK_IN.CLK_VDISTR_TOP8 15915 15918
+PIP.CLK_BUFCE_ROW_31_CLK_OUT.CLK_BUFCE_ROW_31_CLK_IN 15766
+PIP.CLK_BUFCE_ROW_35_CLK_IN.CLK_VDISTR_BOT9 13032
+PIP.CLK_BUFCE_ROW_35_CLK_IN.CLK_VDISTR_TOP9 13035 13038
+PIP.CLK_BUFCE_ROW_35_CLK_OUT.CLK_BUFCE_ROW_35_CE_PRE_OPTINV 12877 12947 13102 15827 15975 18659 18873 18880 21537 21538 21539 21755 24538 27418 27517 27519 27537 30396 33280
+PIP.CLK_BUFCE_ROW_35_CLK_OUT.CLK_BUFCE_ROW_35_CLK_IN 12886
+PIP.CLK_BUFCE_ROW_38_CLK_IN.CLK_VDISTR_BOT10 15913
+PIP.CLK_BUFCE_ROW_38_CLK_IN.CLK_VDISTR_TOP10 15916 15919
+PIP.CLK_BUFCE_ROW_38_CLK_OUT.CLK_BUFCE_ROW_38_CLK_IN 15767 15832
+PIP.CLK_BUFCE_ROW_41_CLK_IN.CLK_VDISTR_BOT11 13033
+PIP.CLK_BUFCE_ROW_41_CLK_IN.CLK_VDISTR_TOP11 13036 13039
+PIP.CLK_BUFCE_ROW_41_CLK_OUT.CLK_BUFCE_ROW_41_CLK_IN 12887 12952
+PIP.CLK_BUFCE_ROW_46_CLK_IN.CLK_VDISTR_BOT12 24551
+PIP.CLK_BUFCE_ROW_46_CLK_IN.CLK_VDISTR_TOP12 15827 24554 24557
+PIP.CLK_BUFCE_ROW_46_CLK_OUT.CLK_BUFCE_ROW_46_CLK_IN 24405 27327
+PIP.CLK_BUFCE_ROW_49_CLK_IN.CLK_VDISTR_BOT13 27431
+PIP.CLK_BUFCE_ROW_49_CLK_IN.CLK_VDISTR_TOP13 27434 27437
+PIP.CLK_BUFCE_ROW_49_CLK_OUT.CLK_BUFCE_ROW_49_CLK_IN 24448 27285
+PIP.CLK_BUFCE_ROW_4_CLK_IN.CLK_VDISTR_BOT0 21671
+PIP.CLK_BUFCE_ROW_4_CLK_IN.CLK_VDISTR_TOP0 21674 21677
+PIP.CLK_BUFCE_ROW_4_CLK_OUT.CLK_BUFCE_ROW_4_CLK_IN 21525 21540
+PIP.CLK_BUFCE_ROW_52_CLK_IN.CLK_VDISTR_BOT14 24552
+PIP.CLK_BUFCE_ROW_52_CLK_IN.CLK_VDISTR_TOP14 24555 24558
+PIP.CLK_BUFCE_ROW_52_CLK_OUT.CLK_BUFCE_ROW_52_CLK_IN 24406 27328
+PIP.CLK_BUFCE_ROW_56_CLK_IN.CLK_VDISTR_BOT15 27432
+PIP.CLK_BUFCE_ROW_56_CLK_IN.CLK_VDISTR_TOP15 12948 27435 27438
+PIP.CLK_BUFCE_ROW_56_CLK_OUT.CLK_BUFCE_ROW_56_CLK_IN 24449 27286
+PIP.CLK_BUFCE_ROW_59_CLK_IN.CLK_VDISTR_BOT16 21537 24553
+PIP.CLK_BUFCE_ROW_59_CLK_IN.CLK_VDISTR_TOP16 18658 24556 24559
+PIP.CLK_BUFCE_ROW_59_CLK_OUT.CLK_BUFCE_ROW_59_CLK_IN 24407 27329
+PIP.CLK_BUFCE_ROW_62_CLK_IN.CLK_VDISTR_BOT17 27433
+PIP.CLK_BUFCE_ROW_62_CLK_IN.CLK_VDISTR_TOP17 27436 27439
+PIP.CLK_BUFCE_ROW_62_CLK_OUT.CLK_BUFCE_ROW_62_CLK_IN 24450 27287
+PIP.CLK_BUFCE_ROW_67_CLK_IN.CLK_VDISTR_BOT18 30311
+PIP.CLK_BUFCE_ROW_67_CLK_IN.CLK_VDISTR_TOP18 30314 30317
+PIP.CLK_BUFCE_ROW_67_CLK_OUT.CLK_BUFCE_ROW_67_CLK_IN 30165 30230
+PIP.CLK_BUFCE_ROW_70_CLK_IN.CLK_VDISTR_BOT19 33191
+PIP.CLK_BUFCE_ROW_70_CLK_IN.CLK_VDISTR_TOP19 21537 33194 33197
+PIP.CLK_BUFCE_ROW_70_CLK_OUT.CLK_BUFCE_ROW_70_CLK_IN 33045 33110
+PIP.CLK_BUFCE_ROW_73_CLK_IN.CLK_VDISTR_BOT20 30312
+PIP.CLK_BUFCE_ROW_73_CLK_IN.CLK_VDISTR_TOP20 30315 30318
+PIP.CLK_BUFCE_ROW_73_CLK_OUT.CLK_BUFCE_ROW_73_CLK_IN 30166
+PIP.CLK_BUFCE_ROW_77_CLK_IN.CLK_VDISTR_BOT21 33192
+PIP.CLK_BUFCE_ROW_77_CLK_IN.CLK_VDISTR_TOP21 33195 33198
+PIP.CLK_BUFCE_ROW_77_CLK_OUT.CLK_BUFCE_ROW_77_CLK_IN 33046 33111
+PIP.CLK_BUFCE_ROW_7_CLK_IN.CLK_VDISTR_BOT1 18791
+PIP.CLK_BUFCE_ROW_7_CLK_IN.CLK_VDISTR_TOP1 18794 18797
+PIP.CLK_BUFCE_ROW_7_CLK_OUT.CLK_BUFCE_ROW_7_CLK_IN 18645
+PIP.CLK_BUFCE_ROW_80_CLK_IN.CLK_VDISTR_BOT22 30313
+PIP.CLK_BUFCE_ROW_80_CLK_IN.CLK_VDISTR_TOP22 30316 30319
+PIP.CLK_BUFCE_ROW_80_CLK_OUT.CLK_BUFCE_ROW_80_CLK_IN 30167
+PIP.CLK_BUFCE_ROW_83_CLK_IN.CLK_VDISTR_BOT23 33193
+PIP.CLK_BUFCE_ROW_83_CLK_IN.CLK_VDISTR_TOP23 33196 33199
+PIP.CLK_BUFCE_ROW_83_CLK_OUT.CLK_BUFCE_ROW_83_CE_PRE_OPTINV 12947 18659 18859 18898 21537 21538 21778 24662 24667 27324 27517 27537 27539 27542 27543 30298 30393 33038 33259 33272
+PIP.CLK_BUFCE_ROW_83_CLK_OUT.CLK_BUFCE_ROW_83_CLK_IN 33047
+PIP.CLK_BUFGCE_13_CLK_IN.CLK_CMT_MUX_24_ENC_7_CLK_OUT 18877
+PIP.CLK_BUFGCE_13_CLK_IN.CLK_CMT_MUX_3TO1_5_CLK_OUT 18846 18868 18878 21749 21758
+PIP.CLK_BUFGCE_13_CLK_IN.IOB2CLK_CCIO0 18869 18877
+PIP.CLK_BUFGCE_13_CLK_IN.IOB2CLK_CCIO1 18869 21758
+PIP.CLK_BUFGCE_13_CLK_IN.IOB2CLK_CCIO2 12948 18869 18877 21758
+PIP.CLK_BUFGCE_13_CLK_IN.IOB2CLK_CCIO3 18869 18878
+PIP.CLK_BUFGCE_13_CLK_OUT.CLK_BUFGCE_13_CLK_IN
+PIP.CLK_BUFGCE_16_CLK_IN.CLK_CMT_MUX_24_ENC_9_CLK_OUT 21759
+PIP.CLK_BUFGCE_16_CLK_IN.CLK_CMT_MUX_3TO1_6_CLK_OUT 18847 18870 18879 21750 21760
+PIP.CLK_BUFGCE_16_CLK_IN.IOB2CLK_CCIO0 21751 21759
+PIP.CLK_BUFGCE_16_CLK_IN.IOB2CLK_CCIO1 18879 21751
+PIP.CLK_BUFGCE_16_CLK_IN.IOB2CLK_CCIO2 18879 21751 21759
+PIP.CLK_BUFGCE_16_CLK_IN.IOB2CLK_CCIO3 21751 21760
+PIP.CLK_BUFGCE_16_CLK_IN.VCC_WIRE 18812 18814 21698
+PIP.CLK_BUFGCE_16_CLK_OUT.CLK_BUFGCE_16_CLK_IN
+PIP.CLK_BUFGCE_19_CLK_IN.CLK_CMT_MUX_24_ENC_11_CLK_OUT 18880
+PIP.CLK_BUFGCE_19_CLK_IN.CLK_CMT_MUX_3TO1_7_CLK_OUT 18848 18871 18881 21752 21761
+PIP.CLK_BUFGCE_19_CLK_IN.IOB2CLK_CCIO0 18872 18880
+PIP.CLK_BUFGCE_19_CLK_IN.IOB2CLK_CCIO1 18872 21761
+PIP.CLK_BUFGCE_19_CLK_IN.IOB2CLK_CCIO2 18872 18880 21761
+PIP.CLK_BUFGCE_19_CLK_IN.IOB2CLK_CCIO3 18872 18881
+PIP.CLK_BUFGCE_19_CLK_IN_PIN.CLK_BUFGCE_19_CLK_IN 18862
+PIP.CLK_BUFGCE_19_CLK_OUT.CLK_BUFGCE_19_CLK_IN_PIN
+PIP.CLK_BUFGCE_24_CLK_IN.CLK_CMT_MUX_24_ENC_13_CLK_OUT 15993
+PIP.CLK_BUFGCE_24_CLK_IN.CLK_CMT_MUX_3TO1_10_CLK_OUT 13083 13104 13113 15984 15994
+PIP.CLK_BUFGCE_24_CLK_IN.IOB2CLK_CCIO0 15985 15993
+PIP.CLK_BUFGCE_24_CLK_IN.IOB2CLK_CCIO1 13113 15985
+PIP.CLK_BUFGCE_24_CLK_IN.IOB2CLK_CCIO2 13113 15985 15993
+PIP.CLK_BUFGCE_24_CLK_IN.IOB2CLK_CCIO3 15985 15994
+PIP.CLK_BUFGCE_24_CLK_OUT.CLK_BUFGCE_24_CLK_IN
+PIP.CLK_BUFGCE_27_CLK_IN.CLK_CMT_MUX_24_ENC_15_CLK_OUT 13114
+PIP.CLK_BUFGCE_27_CLK_IN.CLK_CMT_MUX_3TO1_11_CLK_OUT 13084 13105 13115 15986 15995
+PIP.CLK_BUFGCE_27_CLK_IN.IOB2CLK_CCIO0 13106 13114
+PIP.CLK_BUFGCE_27_CLK_IN.IOB2CLK_CCIO1 13106 15995
+PIP.CLK_BUFGCE_27_CLK_IN.IOB2CLK_CCIO2 13106 13114 15995
+PIP.CLK_BUFGCE_27_CLK_IN.IOB2CLK_CCIO3 13106 13115
+PIP.CLK_BUFGCE_27_CLK_IN.VCC_WIRE 13057 15932 15934
+PIP.CLK_BUFGCE_27_CLK_OUT.CLK_BUFGCE_27_CLK_IN
+PIP.CLK_BUFGCE_30_CLK_IN.CLK_CMT_MUX_24_ENC_17_CLK_OUT 15996
+PIP.CLK_BUFGCE_30_CLK_IN.CLK_CMT_MUX_3TO1_12_CLK_OUT 13085 13107 13116 15987 15997
+PIP.CLK_BUFGCE_30_CLK_IN.IOB2CLK_CCIO0 15988 15996
+PIP.CLK_BUFGCE_30_CLK_IN.IOB2CLK_CCIO1 13116 15988
+PIP.CLK_BUFGCE_30_CLK_IN.IOB2CLK_CCIO2 13116 15988 15996
+PIP.CLK_BUFGCE_30_CLK_IN.IOB2CLK_CCIO3 15988 15997
+PIP.CLK_BUFGCE_30_CLK_OUT.CLK_BUFGCE_30_CLK_IN
+PIP.CLK_BUFGCE_34_CLK_IN.CLK_CMT_MUX_24_ENC_19_CLK_OUT 13117
+PIP.CLK_BUFGCE_34_CLK_IN.CLK_CMT_MUX_3TO1_15_CLK_OUT 13086 13108 13118 15989 15998
+PIP.CLK_BUFGCE_34_CLK_IN.IOB2CLK_CCIO0 13109 13117
+PIP.CLK_BUFGCE_34_CLK_IN.IOB2CLK_CCIO1 13109 15998
+PIP.CLK_BUFGCE_34_CLK_IN.IOB2CLK_CCIO2 13109 13117 15998 18659 21538
+PIP.CLK_BUFGCE_34_CLK_IN.IOB2CLK_CCIO3 13109 13118
+PIP.CLK_BUFGCE_34_CLK_OUT.CLK_BUFGCE_34_CLK_IN
+PIP.CLK_BUFGCE_37_CLK_IN.CLK_CMT_MUX_24_ENC_21_CLK_OUT 15999
+PIP.CLK_BUFGCE_37_CLK_IN.CLK_CMT_MUX_3TO1_16_CLK_OUT 13087 13110 13119 15990 16000
+PIP.CLK_BUFGCE_37_CLK_IN.IOB2CLK_CCIO0 15991 15999
+PIP.CLK_BUFGCE_37_CLK_IN.IOB2CLK_CCIO1 13119 15991
+PIP.CLK_BUFGCE_37_CLK_IN.IOB2CLK_CCIO2 13119 15991 15999
+PIP.CLK_BUFGCE_37_CLK_IN.IOB2CLK_CCIO3 15991 16000
+PIP.CLK_BUFGCE_37_CLK_IN.VCC_WIRE 13052 13054 15938
+PIP.CLK_BUFGCE_37_CLK_OUT.CLK_BUFGCE_37_CLK_IN
+PIP.CLK_BUFGCE_3_CLK_IN.CLK_CMT_MUX_24_ENC_1_CLK_OUT 21753
+PIP.CLK_BUFGCE_3_CLK_IN.CLK_CMT_MUX_3TO1_0_CLK_OUT 18843 18864 18873 21744 21754
+PIP.CLK_BUFGCE_3_CLK_IN.IOB2CLK_CCIO0 21745 21753
+PIP.CLK_BUFGCE_3_CLK_IN.IOB2CLK_CCIO1 18873 21745
+PIP.CLK_BUFGCE_3_CLK_IN.IOB2CLK_CCIO2 18873 21745 21753
+PIP.CLK_BUFGCE_3_CLK_IN.IOB2CLK_CCIO3 21745 21754
+PIP.CLK_BUFGCE_3_CLK_OUT.CLK_BUFGCE_3_CLK_IN
+PIP.CLK_BUFGCE_40_CLK_IN.CLK_CMT_MUX_24_ENC_23_CLK_OUT 13120
+PIP.CLK_BUFGCE_40_CLK_IN.CLK_CMT_MUX_3TO1_17_CLK_OUT 13088 13111 13121 15992 16001
+PIP.CLK_BUFGCE_40_CLK_IN.IOB2CLK_CCIO0 13112 13120
+PIP.CLK_BUFGCE_40_CLK_IN.IOB2CLK_CCIO1 13112 16001
+PIP.CLK_BUFGCE_40_CLK_IN.IOB2CLK_CCIO2 13112 13120 16001 21539
+PIP.CLK_BUFGCE_40_CLK_IN.IOB2CLK_CCIO3 13112 13121
+PIP.CLK_BUFGCE_40_CLK_IN_PIN.CLK_BUFGCE_40_CLK_IN 13102
+PIP.CLK_BUFGCE_40_CLK_OUT.CLK_BUFGCE_40_CLK_IN_PIN
+PIP.CLK_BUFGCE_45_CLK_IN.CLK_CMT_MUX_24_ENC_25_CLK_OUT 24633
+PIP.CLK_BUFGCE_45_CLK_IN.CLK_CMT_MUX_3TO1_20_CLK_OUT 24624 24634 27483 27504 27513
+PIP.CLK_BUFGCE_45_CLK_IN.IOB2CLK_CCIO0 24625 24633
+PIP.CLK_BUFGCE_45_CLK_IN.IOB2CLK_CCIO1 24625 27513
+PIP.CLK_BUFGCE_45_CLK_IN.IOB2CLK_CCIO2 12949 24625 24633 27513
+PIP.CLK_BUFGCE_45_CLK_IN.IOB2CLK_CCIO3 15828 18659 24625 24634
+PIP.CLK_BUFGCE_45_CLK_OUT.CLK_BUFGCE_45_CLK_IN
+PIP.CLK_BUFGCE_48_CLK_IN.CLK_CMT_MUX_24_ENC_27_CLK_OUT 27514
+PIP.CLK_BUFGCE_48_CLK_IN.CLK_CMT_MUX_3TO1_21_CLK_OUT 24626 24635 27484 27505 27515
+PIP.CLK_BUFGCE_48_CLK_IN.IOB2CLK_CCIO0 27506 27514
+PIP.CLK_BUFGCE_48_CLK_IN.IOB2CLK_CCIO1 24635 27506
+PIP.CLK_BUFGCE_48_CLK_IN.IOB2CLK_CCIO2 24635 27506 27514
+PIP.CLK_BUFGCE_48_CLK_IN.IOB2CLK_CCIO3 27506 27515
+PIP.CLK_BUFGCE_48_CLK_IN.VCC_WIRE 24572 24574 27457
+PIP.CLK_BUFGCE_48_CLK_OUT.CLK_BUFGCE_48_CLK_IN
+PIP.CLK_BUFGCE_51_CLK_IN.CLK_CMT_MUX_24_ENC_29_CLK_OUT 24636
+PIP.CLK_BUFGCE_51_CLK_IN.CLK_CMT_MUX_3TO1_22_CLK_OUT 24627 24637 27485 27507 27516
+PIP.CLK_BUFGCE_51_CLK_IN.IOB2CLK_CCIO0 24628 24636
+PIP.CLK_BUFGCE_51_CLK_IN.IOB2CLK_CCIO1 24628 27516
+PIP.CLK_BUFGCE_51_CLK_IN.IOB2CLK_CCIO2 24628 24636 27516
+PIP.CLK_BUFGCE_51_CLK_IN.IOB2CLK_CCIO3 15827 24628 24637
+PIP.CLK_BUFGCE_51_CLK_OUT.CLK_BUFGCE_51_CLK_IN
+PIP.CLK_BUFGCE_55_CLK_IN.CLK_CMT_MUX_24_ENC_31_CLK_OUT 27517
+PIP.CLK_BUFGCE_55_CLK_IN.CLK_CMT_MUX_3TO1_25_CLK_OUT 24629 24638 27486 27508 27518
+PIP.CLK_BUFGCE_55_CLK_IN.IOB2CLK_CCIO0 27509 27517
+PIP.CLK_BUFGCE_55_CLK_IN.IOB2CLK_CCIO1 24638 27509
+PIP.CLK_BUFGCE_55_CLK_IN.IOB2CLK_CCIO2 24638 27509 27517
+PIP.CLK_BUFGCE_55_CLK_IN.IOB2CLK_CCIO3 27509 27518
+PIP.CLK_BUFGCE_55_CLK_OUT.CLK_BUFGCE_55_CLK_IN
+PIP.CLK_BUFGCE_58_CLK_IN.CLK_CMT_MUX_24_ENC_33_CLK_OUT 24639
+PIP.CLK_BUFGCE_58_CLK_IN.CLK_CMT_MUX_3TO1_26_CLK_OUT 24630 24640 27487 27510 27519
+PIP.CLK_BUFGCE_58_CLK_IN.IOB2CLK_CCIO0 12948 21538 21539 24631 24639 30228
+PIP.CLK_BUFGCE_58_CLK_IN.IOB2CLK_CCIO1 24631 27519
+PIP.CLK_BUFGCE_58_CLK_IN.IOB2CLK_CCIO2 12947 21537 24631 24639 27519
+PIP.CLK_BUFGCE_58_CLK_IN.IOB2CLK_CCIO3 24631 24640
+PIP.CLK_BUFGCE_58_CLK_IN.VCC_WIRE 24578 27452 27454
+PIP.CLK_BUFGCE_58_CLK_OUT.CLK_BUFGCE_58_CLK_IN
+PIP.CLK_BUFGCE_61_CLK_IN.CLK_CMT_MUX_24_ENC_35_CLK_OUT 27520
+PIP.CLK_BUFGCE_61_CLK_IN.CLK_CMT_MUX_3TO1_27_CLK_OUT 24632 24641 27488 27511 27521
+PIP.CLK_BUFGCE_61_CLK_IN.IOB2CLK_CCIO0 27512 27520
+PIP.CLK_BUFGCE_61_CLK_IN.IOB2CLK_CCIO1 24641 27512
+PIP.CLK_BUFGCE_61_CLK_IN.IOB2CLK_CCIO2 24641 27512 27520
+PIP.CLK_BUFGCE_61_CLK_IN.IOB2CLK_CCIO3 27512 27521
+PIP.CLK_BUFGCE_61_CLK_IN_PIN.CLK_BUFGCE_61_CLK_IN 27502
+PIP.CLK_BUFGCE_61_CLK_OUT.CLK_BUFGCE_61_CLK_IN_PIN
+PIP.CLK_BUFGCE_66_CLK_IN.CLK_CMT_MUX_24_ENC_37_CLK_OUT 30393
+PIP.CLK_BUFGCE_66_CLK_IN.CLK_CMT_MUX_3TO1_30_CLK_OUT 30384 30394 33243 33264 33273
+PIP.CLK_BUFGCE_66_CLK_IN.IOB2CLK_CCIO0 30385 30393
+PIP.CLK_BUFGCE_66_CLK_IN.IOB2CLK_CCIO1 30385 33273
+PIP.CLK_BUFGCE_66_CLK_IN.IOB2CLK_CCIO2 30385 30393 33273
+PIP.CLK_BUFGCE_66_CLK_IN.IOB2CLK_CCIO3 12948 21538 30385 30394
+PIP.CLK_BUFGCE_66_CLK_OUT.CLK_BUFGCE_66_CLK_IN
+PIP.CLK_BUFGCE_69_CLK_IN.CLK_CMT_MUX_24_ENC_39_CLK_OUT 33274
+PIP.CLK_BUFGCE_69_CLK_IN.CLK_CMT_MUX_3TO1_31_CLK_OUT 30386 30395 33244 33265 33275
+PIP.CLK_BUFGCE_69_CLK_IN.IOB2CLK_CCIO0 33266 33274
+PIP.CLK_BUFGCE_69_CLK_IN.IOB2CLK_CCIO1 12947 18659 27325 30395 33266
+PIP.CLK_BUFGCE_69_CLK_IN.IOB2CLK_CCIO2 12947 15828 18658 18659 18877 21538 21751 24633 27416 27499 30227 30388 30395 33108 33266 33269 33274 33277
+PIP.CLK_BUFGCE_69_CLK_IN.IOB2CLK_CCIO3 33266 33275
+PIP.CLK_BUFGCE_69_CLK_IN.VCC_WIRE 30332 30334 33217
+PIP.CLK_BUFGCE_69_CLK_OUT.CLK_BUFGCE_69_CLK_IN
+PIP.CLK_BUFGCE_6_CLK_IN.CLK_CMT_MUX_24_ENC_3_CLK_OUT 18874
+PIP.CLK_BUFGCE_6_CLK_IN.CLK_CMT_MUX_3TO1_1_CLK_OUT 18844 18865 18875 21746 21755
+PIP.CLK_BUFGCE_6_CLK_IN.IOB2CLK_CCIO0 18866 18874
+PIP.CLK_BUFGCE_6_CLK_IN.IOB2CLK_CCIO1 18866 21755
+PIP.CLK_BUFGCE_6_CLK_IN.IOB2CLK_CCIO2 18866 18874 21755
+PIP.CLK_BUFGCE_6_CLK_IN.IOB2CLK_CCIO3 18866 18875
+PIP.CLK_BUFGCE_6_CLK_IN.VCC_WIRE 18817 21692 21694
+PIP.CLK_BUFGCE_6_CLK_OUT.CLK_BUFGCE_6_CLK_IN
+PIP.CLK_BUFGCE_72_CLK_IN.CLK_CMT_MUX_24_ENC_41_CLK_OUT 30396
+PIP.CLK_BUFGCE_72_CLK_IN.CLK_CMT_MUX_3TO1_32_CLK_OUT 30387 30397 33245 33267 33276
+PIP.CLK_BUFGCE_72_CLK_IN.IOB2CLK_CCIO0 30388 30396
+PIP.CLK_BUFGCE_72_CLK_IN.IOB2CLK_CCIO1 30388 33276
+PIP.CLK_BUFGCE_72_CLK_IN.IOB2CLK_CCIO2 30388 30396 33276
+PIP.CLK_BUFGCE_72_CLK_IN.IOB2CLK_CCIO3 30388 30397
+PIP.CLK_BUFGCE_72_CLK_OUT.CLK_BUFGCE_72_CLK_IN
+PIP.CLK_BUFGCE_76_CLK_IN.CLK_CMT_MUX_24_ENC_43_CLK_OUT 33277
+PIP.CLK_BUFGCE_76_CLK_IN.CLK_CMT_MUX_3TO1_35_CLK_OUT 30389 30398 33246 33268 33278
+PIP.CLK_BUFGCE_76_CLK_IN.IOB2CLK_CCIO0 15996 30228 33269 33277
+PIP.CLK_BUFGCE_76_CLK_IN.IOB2CLK_CCIO1 30398 33269
+PIP.CLK_BUFGCE_76_CLK_IN.IOB2CLK_CCIO2 30398 33269 33277
+PIP.CLK_BUFGCE_76_CLK_IN.IOB2CLK_CCIO3 13106 15895 21538 30228 33269 33278
+PIP.CLK_BUFGCE_76_CLK_OUT.CLK_BUFGCE_76_CLK_IN
+PIP.CLK_BUFGCE_79_CLK_IN.CLK_CMT_MUX_24_ENC_45_CLK_OUT 30399
+PIP.CLK_BUFGCE_79_CLK_IN.CLK_CMT_MUX_3TO1_36_CLK_OUT 30390 30400 33247 33270 33279
+PIP.CLK_BUFGCE_79_CLK_IN.IOB2CLK_CCIO0 30391 30399
+PIP.CLK_BUFGCE_79_CLK_IN.IOB2CLK_CCIO1 30391 33279
+PIP.CLK_BUFGCE_79_CLK_IN.IOB2CLK_CCIO2 30391 30399 33279
+PIP.CLK_BUFGCE_79_CLK_IN.IOB2CLK_CCIO3 30391 30400
+PIP.CLK_BUFGCE_79_CLK_IN.VCC_WIRE 30338 33212 33214
+PIP.CLK_BUFGCE_79_CLK_OUT.CLK_BUFGCE_79_CLK_IN
+PIP.CLK_BUFGCE_82_CLK_IN.CLK_CMT_MUX_24_ENC_47_CLK_OUT 33280
+PIP.CLK_BUFGCE_82_CLK_IN.CLK_CMT_MUX_3TO1_37_CLK_OUT 30392 30401 33248 33271 33281
+PIP.CLK_BUFGCE_82_CLK_IN.IOB2CLK_CCIO0 33272 33280
+PIP.CLK_BUFGCE_82_CLK_IN.IOB2CLK_CCIO1 30401 33272
+PIP.CLK_BUFGCE_82_CLK_IN.IOB2CLK_CCIO2 15827 30401 33272 33280
+PIP.CLK_BUFGCE_82_CLK_IN.IOB2CLK_CCIO3 33272 33281
+PIP.CLK_BUFGCE_82_CLK_IN_PIN.CLK_BUFGCE_82_CLK_IN 33262
+PIP.CLK_BUFGCE_82_CLK_OUT.CLK_BUFGCE_82_CLK_IN_PIN
+PIP.CLK_BUFGCE_9_CLK_IN.CLK_CMT_MUX_24_ENC_5_CLK_OUT 21756
+PIP.CLK_BUFGCE_9_CLK_IN.CLK_CMT_MUX_3TO1_2_CLK_OUT 18845 18867 18876 21747 21757
+PIP.CLK_BUFGCE_9_CLK_IN.IOB2CLK_CCIO0 21748 21756
+PIP.CLK_BUFGCE_9_CLK_IN.IOB2CLK_CCIO1 18876 21748
+PIP.CLK_BUFGCE_9_CLK_IN.IOB2CLK_CCIO2 18876 21748 21756
+PIP.CLK_BUFGCE_9_CLK_IN.IOB2CLK_CCIO3 21748 21757
+PIP.CLK_BUFGCE_9_CLK_OUT.CLK_BUFGCE_9_CLK_IN
+PIP.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_IN_PIN.CLK_BUFGCE_19_CLK_IN
+PIP.CLK_BUFGCE_DIV_WITH_OPTINVS_43_CLK_IN_PIN.CLK_BUFGCE_40_CLK_IN
+PIP.CLK_BUFGCE_DIV_WITH_OPTINVS_64_CLK_IN_PIN.CLK_BUFGCE_61_CLK_IN
+PIP.CLK_BUFGCE_DIV_WITH_OPTINVS_85_CLK_IN_PIN.CLK_BUFGCE_82_CLK_IN
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_11_CLK_I0.CLK_BUFGCE_3_CLK_IN
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_11_CLK_I0.CLK_BUFGCTRL_WITH_OPTINVS_21_CLK_OUT 21699 21759
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_11_CLK_I0.CLK_BUFGCTRL_WITH_OPTINVS_84_CLK_OUT 18818 21656 21690
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_11_CLK_I1.CLK_BUFGCE_6_CLK_IN
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_21_CLK_I0.CLK_BUFGCE_13_CLK_IN
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_21_CLK_I0.CLK_BUFGCTRL_WITH_OPTINVS_11_CLK_OUT 18819 21778 21781 21790
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_21_CLK_I0.CLK_BUFGCTRL_WITH_OPTINVS_32_CLK_OUT 16018 21700
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_21_CLK_I1.CLK_BUFGCE_16_CLK_IN
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_21_CLK_I1.CLK_BUFGCTRL_WITH_OPTINVS_11_CLK_OUT 18821 18904 21690 21778 33177
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_32_CLK_I0.CLK_BUFGCE_24_CLK_IN
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_32_CLK_I0.CLK_BUFGCTRL_WITH_OPTINVS_42_CLK_OUT 15939 16020 33304
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_32_CLK_I1.CLK_BUFGCE_27_CLK_IN
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_42_CLK_I0.CLK_BUFGCE_34_CLK_IN
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_42_CLK_I0.CLK_BUFGCTRL_WITH_OPTINVS_32_CLK_OUT 13059 33177
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_42_CLK_I0.CLK_BUFGCTRL_WITH_OPTINVS_53_CLK_OUT 15940
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_42_CLK_I1.CLK_BUFGCE_37_CLK_IN
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_53_CLK_I0.CLK_BUFGCE_45_CLK_IN
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_53_CLK_I0.CLK_BUFGCTRL_WITH_OPTINVS_42_CLK_OUT 16020 24570 27458
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_53_CLK_I0.CLK_BUFGCTRL_WITH_OPTINVS_63_CLK_OUT 24579
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_53_CLK_I1.CLK_BUFGCE_48_CLK_IN
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_53_CLK_I1.CLK_BUFGCTRL_WITH_OPTINVS_42_CLK_OUT 13050 13137 15930 16025 24663 27324 27460
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_63_CLK_I0.CLK_BUFGCE_55_CLK_IN
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_63_CLK_I0.CLK_BUFGCTRL_WITH_OPTINVS_53_CLK_OUT 27459
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_63_CLK_I0.CLK_BUFGCTRL_WITH_OPTINVS_74_CLK_OUT 24580
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_63_CLK_I1.CLK_BUFGCE_58_CLK_IN
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_63_CLK_I1.CLK_BUFGCTRL_WITH_OPTINVS_53_CLK_OUT 13145 15929 16018 18809 18905 21778 27461
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_63_CLK_I1.CLK_BUFGCTRL_WITH_OPTINVS_74_CLK_OUT 13050 16029 24582 27545 30297 30330 30421 33308 33309
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_74_CLK_I0.CLK_BUFGCE_66_CLK_IN
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_74_CLK_I0.CLK_BUFGCTRL_WITH_OPTINVS_63_CLK_OUT 24670 27449 33218
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_74_CLK_I0.CLK_BUFGCTRL_WITH_OPTINVS_84_CLK_OUT 30339
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_74_CLK_I1.CLK_BUFGCE_69_CLK_IN
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_74_CLK_I1.CLK_BUFGCTRL_WITH_OPTINVS_84_CLK_OUT 13050 13141 13148 16020 21781 21789 27545 30341 30417 30421 30424 30430
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_84_CLK_I0.CLK_BUFGCE_76_CLK_IN
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_84_CLK_I0.CLK_BUFGCTRL_WITH_OPTINVS_11_CLK_OUT 30340
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_84_CLK_I0.CLK_BUFGCTRL_WITH_OPTINVS_74_CLK_OUT 30418 33219 33309
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_84_CLK_I1.CLK_BUFGCE_79_CLK_IN
+PIP.CLK_BUFGCTRL_WITH_OPTINVS_84_CLK_I1.CLK_BUFGCTRL_WITH_OPTINVS_74_CLK_OUT 15978 18810 18907 18909 21780 30420 33221
+PIP.CLK_CMT_MUX_16_ENC_0_CLK_OUT.CLK_BUFGCE_3_CLK_OUT 21735
+PIP.CLK_CMT_MUX_16_ENC_0_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 18849 18855
+PIP.CLK_CMT_MUX_16_ENC_0_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_43_CLK_OUT 18849 18855 21735
+PIP.CLK_CMT_MUX_16_ENC_0_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_64_CLK_OUT 18849 21736
+PIP.CLK_CMT_MUX_16_ENC_0_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_85_CLK_OUT 18849 21729 21735
+PIP.CLK_CMT_MUX_16_ENC_0_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_11_CLK_OUT 18855
+PIP.CLK_CMT_MUX_16_ENC_0_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_32_CLK_OUT 15932 18859 21736
+PIP.CLK_CMT_MUX_16_ENC_0_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_42_CLK_OUT 13052 15938 21729 21735 30334
+PIP.CLK_CMT_MUX_16_ENC_0_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_53_CLK_OUT 13017 13018 13052 15897 15981 18855 21729 24613 24621 27452 27457 27502 30338 33214
+PIP.CLK_CMT_MUX_16_ENC_0_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_63_CLK_OUT 13016 15898 18855 21656 21729 21735 21789 24536 27449 27450
+PIP.CLK_CMT_MUX_16_ENC_0_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_74_CLK_OUT 21729 21736 30332 30334
+PIP.CLK_CMT_MUX_16_ENC_10_CLK_OUT.CLK_BUFGCE_37_CLK_OUT 15981
+PIP.CLK_CMT_MUX_16_ENC_10_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 13093 13101
+PIP.CLK_CMT_MUX_16_ENC_10_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_43_CLK_OUT 13093 13101 13120 15981
+PIP.CLK_CMT_MUX_16_ENC_10_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_64_CLK_OUT 13093 15982
+PIP.CLK_CMT_MUX_16_ENC_10_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_85_CLK_OUT 13093 15973 15981
+PIP.CLK_CMT_MUX_16_ENC_10_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_11_CLK_OUT 13101
+PIP.CLK_CMT_MUX_16_ENC_10_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_21_CLK_OUT 13101 15981 18812 18814 21698
+PIP.CLK_CMT_MUX_16_ENC_10_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_32_CLK_OUT 15982 27454
+PIP.CLK_CMT_MUX_16_ENC_10_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_42_CLK_OUT 15973 15981
+PIP.CLK_CMT_MUX_16_ENC_10_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_74_CLK_OUT 15973 15982 30334 33217
+PIP.CLK_CMT_MUX_16_ENC_10_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_84_CLK_OUT 13018 13093 15975 15978 15981 18778 21657 27452 27454 30297 30332 30334 30338 33217
+PIP.CLK_CMT_MUX_16_ENC_11_CLK_OUT.CLK_BUFGCE_40_CLK_OUT
+PIP.CLK_CMT_MUX_16_ENC_11_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 13094 15983
+PIP.CLK_CMT_MUX_16_ENC_11_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_43_CLK_OUT 13094 13102 15983
+PIP.CLK_CMT_MUX_16_ENC_11_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_64_CLK_OUT 13094 13103 27520
+PIP.CLK_CMT_MUX_16_ENC_11_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_85_CLK_OUT 13094 13102 15974
+PIP.CLK_CMT_MUX_16_ENC_11_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_21_CLK_OUT 13102 13140 15894 15983 16025 30329 30330 30417 30429
+PIP.CLK_CMT_MUX_16_ENC_12_CLK_OUT.CLK_BUFGCE_45_CLK_OUT 24615
+PIP.CLK_CMT_MUX_16_ENC_12_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 27489 27495
+PIP.CLK_CMT_MUX_16_ENC_12_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_43_CLK_OUT 18880 24615 27489 27495 27520 33225
+PIP.CLK_CMT_MUX_16_ENC_12_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_64_CLK_OUT 24616 27489
+PIP.CLK_CMT_MUX_16_ENC_12_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_85_CLK_OUT 12948 13014 13102 18880 21653 24587 24609 24615 27489 27520 33226
+PIP.CLK_CMT_MUX_16_ENC_12_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_42_CLK_OUT 24609 24615
+PIP.CLK_CMT_MUX_16_ENC_12_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_53_CLK_OUT 24609 27495
+PIP.CLK_CMT_MUX_16_ENC_12_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_84_CLK_OUT 24446 24615 24621 27489 30293 33212
+PIP.CLK_CMT_MUX_16_ENC_13_CLK_OUT.CLK_BUFGCE_48_CLK_OUT 27496
+PIP.CLK_CMT_MUX_16_ENC_13_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 12948 12949 15828 15894 15999 18659 18872 18876 21538 21539 21748 24617 27490 30399 33108
+PIP.CLK_CMT_MUX_16_ENC_13_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_43_CLK_OUT 13065 18880 24617 27490 27496 27520
+PIP.CLK_CMT_MUX_16_ENC_13_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_85_CLK_OUT 13120 15947 24610 27490 27496 30346 33225
+PIP.CLK_CMT_MUX_16_ENC_13_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_21_CLK_OUT 21698 24617 27496
+PIP.CLK_CMT_MUX_16_ENC_13_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_32_CLK_OUT 27497
+PIP.CLK_CMT_MUX_16_ENC_13_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_42_CLK_OUT 13054 15938 24610 27496 33212 33214
+PIP.CLK_CMT_MUX_16_ENC_13_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_53_CLK_OUT 24610 24617
+PIP.CLK_CMT_MUX_16_ENC_14_CLK_OUT.CLK_BUFGCE_51_CLK_OUT 24618
+PIP.CLK_CMT_MUX_16_ENC_14_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 21735 27491 27498
+PIP.CLK_CMT_MUX_16_ENC_14_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_43_CLK_OUT 15946 21656 24618 27491 27498 27550
+PIP.CLK_CMT_MUX_16_ENC_14_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_64_CLK_OUT 13118 15978 16001 18776 18873 21761 24619 27465 27491 27521 33262
+PIP.CLK_CMT_MUX_16_ENC_15_CLK_OUT.CLK_BUFGCE_55_CLK_OUT 27499
+PIP.CLK_CMT_MUX_16_ENC_15_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 13065 13096 13113 15947 15952 15997 15998 18873 18875 21761 24591 24620 27466 27492 27513 27521 30346 30401 33273
+PIP.CLK_CMT_MUX_16_ENC_15_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_43_CLK_OUT 13065 24620 27492 27499 33280
+PIP.CLK_CMT_MUX_16_ENC_15_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_64_CLK_OUT 13065 13120 27492 27500 27520
+PIP.CLK_CMT_MUX_16_ENC_15_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_42_CLK_OUT 13050 16029 18777 21689 24612 24660 27499 30430 33209 33301
+PIP.CLK_CMT_MUX_16_ENC_15_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_63_CLK_OUT 24612 24620 27499
+PIP.CLK_CMT_MUX_16_ENC_16_CLK_OUT.CLK_BUFGCE_58_CLK_OUT 24621
+PIP.CLK_CMT_MUX_16_ENC_16_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 27493 27501
+PIP.CLK_CMT_MUX_16_ENC_16_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_64_CLK_OUT 24586 24622 27493 27494 27502
+PIP.CLK_CMT_MUX_16_ENC_16_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_85_CLK_OUT 15898 16001 18777 18778 21656 21755 21761 24613 24621 27493 27499 33226 33281
+PIP.CLK_CMT_MUX_16_ENC_16_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_11_CLK_OUT 18817 21692 27452 27454 27501
+PIP.CLK_CMT_MUX_16_ENC_16_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_21_CLK_OUT 24621 27501
+PIP.CLK_CMT_MUX_16_ENC_16_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_42_CLK_OUT 15938 18778 18812 24613 24621 27452 27454 27457 30298
+PIP.CLK_CMT_MUX_16_ENC_16_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_53_CLK_OUT 24569 24613 24658 24665 27418 27501 30428 33209 33309
+PIP.CLK_CMT_MUX_16_ENC_16_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_63_CLK_OUT 24613 24621 27501
+PIP.CLK_CMT_MUX_16_ENC_16_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_74_CLK_OUT 24613 24622
+PIP.CLK_CMT_MUX_16_ENC_17_CLK_OUT.CLK_BUFGCE_61_CLK_OUT
+PIP.CLK_CMT_MUX_16_ENC_17_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 24623 27494
+PIP.CLK_CMT_MUX_16_ENC_17_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_43_CLK_OUT 24623 27494 27502
+PIP.CLK_CMT_MUX_16_ENC_17_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_64_CLK_OUT 27494 27503
+PIP.CLK_CMT_MUX_16_ENC_17_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_85_CLK_OUT 24614 27494 27502
+PIP.CLK_CMT_MUX_16_ENC_17_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_42_CLK_OUT 13054 21692 21694 24614 27502
+PIP.CLK_CMT_MUX_16_ENC_18_CLK_OUT.CLK_BUFGCE_66_CLK_OUT 30375
+PIP.CLK_CMT_MUX_16_ENC_18_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 12949 13112 15828 15829 18659 18775 18859 18872 18874 21538 21539 21655 21761 24445 24447 24633 27325 27326 27496 27520 30396 33249 33255 33274
+PIP.CLK_CMT_MUX_16_ENC_18_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_43_CLK_OUT 13112 15827 15946 16001 18657 18658 18872 21538 21539 21706 21761 24446 24625 27517 30228 30346 30375 30391 33226 33249 33255
+PIP.CLK_CMT_MUX_16_ENC_18_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_11_CLK_OUT 18777 24612 33209 33255 33301 33309
+PIP.CLK_CMT_MUX_16_ENC_18_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_74_CLK_OUT 30369 30376
+PIP.CLK_CMT_MUX_16_ENC_19_CLK_OUT.CLK_BUFGCE_69_CLK_OUT 33256
+PIP.CLK_CMT_MUX_16_ENC_19_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 18826 18878 21761 24587 24641 30377 33226 33250 33281
+PIP.CLK_CMT_MUX_16_ENC_19_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_32_CLK_OUT 15932 27452 27454 27501 33257
+PIP.CLK_CMT_MUX_16_ENC_19_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_63_CLK_OUT 24578 27454 30370 30377 33256
+PIP.CLK_CMT_MUX_16_ENC_19_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_74_CLK_OUT 30370 33257
+PIP.CLK_CMT_MUX_16_ENC_19_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_84_CLK_OUT 13102 18832 30347 30352 33226 33250 33256
+PIP.CLK_CMT_MUX_16_ENC_1_CLK_OUT.CLK_BUFGCE_6_CLK_OUT 18856
+PIP.CLK_CMT_MUX_16_ENC_1_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 18850 21737
+PIP.CLK_CMT_MUX_16_ENC_1_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_43_CLK_OUT 18850 18856 21737
+PIP.CLK_CMT_MUX_16_ENC_1_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_64_CLK_OUT 18850 18857
+PIP.CLK_CMT_MUX_16_ENC_1_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_85_CLK_OUT 18850 18856 21730
+PIP.CLK_CMT_MUX_16_ENC_1_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_11_CLK_OUT 21692 21737
+PIP.CLK_CMT_MUX_16_ENC_1_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_53_CLK_OUT 21730 21737 24574 27457
+PIP.CLK_CMT_MUX_16_ENC_20_CLK_OUT.CLK_BUFGCE_72_CLK_OUT 30378
+PIP.CLK_CMT_MUX_16_ENC_20_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_53_CLK_OUT 24574 27457 30371 33258
+PIP.CLK_CMT_MUX_16_ENC_21_CLK_OUT.CLK_BUFGCE_76_CLK_OUT 33259
+PIP.CLK_CMT_MUX_16_ENC_21_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_43_CLK_OUT 18826 18880 30380 33252 33259
+PIP.CLK_CMT_MUX_16_ENC_21_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_64_CLK_OUT 27520 33252 33260
+PIP.CLK_CMT_MUX_16_ENC_21_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_85_CLK_OUT 30372 33252 33259 33280
+PIP.CLK_CMT_MUX_16_ENC_21_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_21_CLK_OUT 30380 33259
+PIP.CLK_CMT_MUX_16_ENC_21_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_74_CLK_OUT 24620 30372 33217 33260
+PIP.CLK_CMT_MUX_16_ENC_21_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_84_CLK_OUT 33252 33259
+PIP.CLK_CMT_MUX_16_ENC_22_CLK_OUT.CLK_BUFGCE_79_CLK_OUT 30381
+PIP.CLK_CMT_MUX_16_ENC_22_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 13094 13102 15946 15981 18774 18775 21538 21539 21655 24587 30228 30369 33253 33261
+PIP.CLK_CMT_MUX_16_ENC_22_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_64_CLK_OUT 30347 30382 33253
+PIP.CLK_CMT_MUX_16_ENC_22_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_42_CLK_OUT 21698 30373 30381
+PIP.CLK_CMT_MUX_16_ENC_22_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_53_CLK_OUT 24572 24574 30373 33261
+PIP.CLK_CMT_MUX_16_ENC_22_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_84_CLK_OUT 30381 33253
+PIP.CLK_CMT_MUX_16_ENC_23_CLK_OUT.CLK_BUFGCE_82_CLK_OUT
+PIP.CLK_CMT_MUX_16_ENC_23_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 30383 33254
+PIP.CLK_CMT_MUX_16_ENC_23_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_43_CLK_OUT 30383 33254 33262
+PIP.CLK_CMT_MUX_16_ENC_23_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_64_CLK_OUT 33254 33263
+PIP.CLK_CMT_MUX_16_ENC_23_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_85_CLK_OUT 30374 33254 33262
+PIP.CLK_CMT_MUX_16_ENC_23_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_21_CLK_OUT 13016 13144 15929 16024 18900 18901 21790 24569 24661 27417 27418 30383 33262 33297 33303 33305
+PIP.CLK_CMT_MUX_16_ENC_2_CLK_OUT.CLK_BUFGCE_9_CLK_OUT 21738
+PIP.CLK_CMT_MUX_16_ENC_2_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 18851 18858 18911 21707 21782
+PIP.CLK_CMT_MUX_16_ENC_2_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_21_CLK_OUT 15827 18658 18809 18858 18900 21656 21658 21738 24569 24621 24661 24663 24670 27324 27416 27449 27514 33301 33304 33307
+PIP.CLK_CMT_MUX_16_ENC_2_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_74_CLK_OUT 13054 21731 21739 27457 30332 30334 33217
+PIP.CLK_CMT_MUX_16_ENC_3_CLK_OUT.CLK_BUFGCE_13_CLK_OUT 18859
+PIP.CLK_CMT_MUX_16_ENC_3_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 18852 21740
+PIP.CLK_CMT_MUX_16_ENC_3_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_43_CLK_OUT 18852 18859 21740
+PIP.CLK_CMT_MUX_16_ENC_3_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_64_CLK_OUT 18852 18860 27520
+PIP.CLK_CMT_MUX_16_ENC_3_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_85_CLK_OUT 18852 18859 21732
+PIP.CLK_CMT_MUX_16_ENC_3_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_11_CLK_OUT 18817 21692 21740
+PIP.CLK_CMT_MUX_16_ENC_3_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_21_CLK_OUT 18859 21740
+PIP.CLK_CMT_MUX_16_ENC_3_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_84_CLK_OUT 18852 18859
+PIP.CLK_CMT_MUX_16_ENC_4_CLK_OUT.CLK_BUFGCE_16_CLK_OUT 21741
+PIP.CLK_CMT_MUX_16_ENC_4_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 18853 18861
+PIP.CLK_CMT_MUX_16_ENC_4_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_43_CLK_OUT 18853 18861 21741
+PIP.CLK_CMT_MUX_16_ENC_4_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_64_CLK_OUT 18825 18853 21742
+PIP.CLK_CMT_MUX_16_ENC_4_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_85_CLK_OUT 18853 21733 21741
+PIP.CLK_CMT_MUX_16_ENC_4_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_11_CLK_OUT 18861
+PIP.CLK_CMT_MUX_16_ENC_4_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_21_CLK_OUT 18861 21741
+PIP.CLK_CMT_MUX_16_ENC_4_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_53_CLK_OUT 18861 21733 24570 24665 27545
+PIP.CLK_CMT_MUX_16_ENC_4_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_74_CLK_OUT 21733 21742
+PIP.CLK_CMT_MUX_16_ENC_5_CLK_OUT.CLK_BUFGCE_19_CLK_OUT
+PIP.CLK_CMT_MUX_16_ENC_5_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 18854 21743
+PIP.CLK_CMT_MUX_16_ENC_5_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_43_CLK_OUT 18854 18862 21743
+PIP.CLK_CMT_MUX_16_ENC_5_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_64_CLK_OUT 18854 18863
+PIP.CLK_CMT_MUX_16_ENC_5_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_85_CLK_OUT 18854 18862 21734
+PIP.CLK_CMT_MUX_16_ENC_6_CLK_OUT.CLK_BUFGCE_24_CLK_OUT 15975
+PIP.CLK_CMT_MUX_16_ENC_6_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 13089 13095
+PIP.CLK_CMT_MUX_16_ENC_6_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_43_CLK_OUT 13089 13095 15975
+PIP.CLK_CMT_MUX_16_ENC_6_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_64_CLK_OUT 13089 15976 18825 18880 24586 27466
+PIP.CLK_CMT_MUX_16_ENC_6_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_85_CLK_OUT 12949 13089 13094 15969 15975 15983 21696
+PIP.CLK_CMT_MUX_16_ENC_6_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_11_CLK_OUT 13095
+PIP.CLK_CMT_MUX_16_ENC_6_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_21_CLK_OUT 13095 15975 18774 18777 18814
+PIP.CLK_CMT_MUX_16_ENC_6_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_32_CLK_OUT 15976
+PIP.CLK_CMT_MUX_16_ENC_6_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_84_CLK_OUT 13089 15975 30332 30338 33212
+PIP.CLK_CMT_MUX_16_ENC_7_CLK_OUT.CLK_BUFGCE_27_CLK_OUT 13096
+PIP.CLK_CMT_MUX_16_ENC_7_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 13090 15977
+PIP.CLK_CMT_MUX_16_ENC_7_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_43_CLK_OUT 13090 13096 15977
+PIP.CLK_CMT_MUX_16_ENC_7_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_64_CLK_OUT 13090 13097
+PIP.CLK_CMT_MUX_16_ENC_7_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_85_CLK_OUT 13090 13096 15970
+PIP.CLK_CMT_MUX_16_ENC_7_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_11_CLK_OUT 15977
+PIP.CLK_CMT_MUX_16_ENC_7_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_21_CLK_OUT 13096 15977
+PIP.CLK_CMT_MUX_16_ENC_7_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_32_CLK_OUT 13097
+PIP.CLK_CMT_MUX_16_ENC_7_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_53_CLK_OUT 13099 15970 15977 15980 15982 24446 24578 27454 30334 30338 33217 33276
+PIP.CLK_CMT_MUX_16_ENC_7_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_74_CLK_OUT 13097 15970 15975 30334 33217
+PIP.CLK_CMT_MUX_16_ENC_8_CLK_OUT.CLK_BUFGCE_30_CLK_OUT 15978
+PIP.CLK_CMT_MUX_16_ENC_8_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_21_CLK_OUT 13018 13098 15978 18901 21781 30421
+PIP.CLK_CMT_MUX_16_ENC_8_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_32_CLK_OUT 13148 15895 15898 15979 16020 16025 18858 21656 30417 33303
+PIP.CLK_CMT_MUX_16_ENC_8_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_42_CLK_OUT 15971 15978 15981 16020 18777 18909 24660 30329
+PIP.CLK_CMT_MUX_16_ENC_8_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_53_CLK_OUT 13098 15898 15971 24663 27514 30417 30425 33303 33305
+PIP.CLK_CMT_MUX_16_ENC_8_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_63_CLK_OUT 13098 15971 15978
+PIP.CLK_CMT_MUX_16_ENC_8_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_84_CLK_OUT 13091 15978
+PIP.CLK_CMT_MUX_16_ENC_9_CLK_OUT.CLK_BUFGCE_34_CLK_OUT 13099
+PIP.CLK_CMT_MUX_16_ENC_9_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_22_CLK_OUT 13092 15980 18825 18826 30346
+PIP.CLK_CMT_MUX_16_ENC_9_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_43_CLK_OUT 13092 13099 15980
+PIP.CLK_CMT_MUX_16_ENC_9_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_64_CLK_OUT 13092 13100
+PIP.CLK_CMT_MUX_16_ENC_9_CLK_OUT.CLK_BUFGCE_DIV_WITH_OPTINVS_85_CLK_OUT 13092 13099 15972 30346
+PIP.CLK_CMT_MUX_16_ENC_9_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_11_CLK_OUT 15980
+PIP.CLK_CMT_MUX_16_ENC_9_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_21_CLK_OUT 13099 15980
+PIP.CLK_CMT_MUX_16_ENC_9_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_32_CLK_OUT 13100
+PIP.CLK_CMT_MUX_16_ENC_9_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_42_CLK_OUT 13099 15972
+PIP.CLK_CMT_MUX_16_ENC_9_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_63_CLK_OUT 13099 15972 15980 27547 27549
+PIP.CLK_CMT_MUX_16_ENC_9_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_74_CLK_OUT 13100 15972 27514 33108
+PIP.CLK_CMT_MUX_16_ENC_9_CLK_OUT.CLK_BUFGCTRL_WITH_OPTINVS_84_CLK_OUT 13092 13099 24612
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_0 18910
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_1 18776 21791
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_10 15898 18910 18911 21782
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_11 13018 18911 21782 21791
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_12 18825 18902 18910 24536
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_13 18902 21791 27416
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_15 13065 18825 18902 18911 27492 33302
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_16 18902 18910 18911 24538
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_17 18902 18911 21791
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_18 13151 15947 16031 18825 18849 18902 18910 21735 21782 24586 27466 30296 30347 33226 33311
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_19 18902 21782 21791 33176
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_2 13065 13093 13094 15946 15981 18825 18849 18910 21657 21707 21791 27465 27466 27550 30422 33225
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_20 13093 15981 18902 18910 21706 21782 21791 24587 27466 27550 30297 33225 33311
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_21 18902 18911 21782 33177
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_23 18902 18911 21782 21791 33178
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_3 18777 18911
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_4 18910 18911 21658
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_5 15946 15947 18854 18862 18911 21791 24587 24662 27465 30347 30422 33311
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_6 13016 18910 21782
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_7 13016 21782 21791
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_8 15897 18862 18910 21657 21738 21782 21791 30431
+PIP.CLK_CMT_MUX_24_ENC_11_CLK_OUT.CLK_HROUTE_0_9 13120 18911 21782
+PIP.CLK_CMT_MUX_24_ENC_13_CLK_OUT.CLK_HROUTE_0_0 16023 21656
+PIP.CLK_CMT_MUX_24_ENC_13_CLK_OUT.CLK_HROUTE_0_10 15898 16017 16023 16024
+PIP.CLK_CMT_MUX_24_ENC_13_CLK_OUT.CLK_HROUTE_0_11 13018 13143 16017 16024
+PIP.CLK_CMT_MUX_24_ENC_13_CLK_OUT.CLK_HROUTE_0_13 13137 13143 15827 18657
+PIP.CLK_CMT_MUX_24_ENC_13_CLK_OUT.CLK_HROUTE_0_15 13137 16024
+PIP.CLK_CMT_MUX_24_ENC_13_CLK_OUT.CLK_HROUTE_0_16 13017 13018 13137 16023 16024 24613 30296 30425 33305
+PIP.CLK_CMT_MUX_24_ENC_13_CLK_OUT.CLK_HROUTE_0_17 13137 13143 16024 30381
+PIP.CLK_CMT_MUX_24_ENC_13_CLK_OUT.CLK_HROUTE_0_18 13137 16017 16023
+PIP.CLK_CMT_MUX_24_ENC_13_CLK_OUT.CLK_HROUTE_0_19 13137 13143 15827 15896 16017 21538 21656 21738 24663 27324 33304
+PIP.CLK_CMT_MUX_24_ENC_13_CLK_OUT.CLK_HROUTE_0_2 13143 16023
+PIP.CLK_CMT_MUX_24_ENC_13_CLK_OUT.CLK_HROUTE_0_21 13137 16017 16024 33177
+PIP.CLK_CMT_MUX_24_ENC_13_CLK_OUT.CLK_HROUTE_0_22 13137 16017 16023 16024 21655 24660 27547
+PIP.CLK_CMT_MUX_24_ENC_13_CLK_OUT.CLK_HROUTE_0_23 13137 13143 16017 16024 33178
+PIP.CLK_CMT_MUX_24_ENC_13_CLK_OUT.CLK_HROUTE_0_3 16024
+PIP.CLK_CMT_MUX_24_ENC_13_CLK_OUT.CLK_HROUTE_0_4 13138 16023 16024 18897 21690 21783 21784 21785 24658 27418 27449 27545 30298 30330 30421 30428 33177 33262 33298 33309
+PIP.CLK_CMT_MUX_24_ENC_13_CLK_OUT.CLK_HROUTE_0_6 16017 16023
+PIP.CLK_CMT_MUX_24_ENC_13_CLK_OUT.CLK_HROUTE_0_7 13143 16017 16018 30393
+PIP.CLK_CMT_MUX_24_ENC_13_CLK_OUT.CLK_HROUTE_0_8 13143 15978 16017 16023 27548
+PIP.CLK_CMT_MUX_24_ENC_13_CLK_OUT.CLK_HROUTE_0_9 16017 16024
+PIP.CLK_CMT_MUX_24_ENC_15_CLK_OUT.CLK_HROUTE_0_0 13144 21656
+PIP.CLK_CMT_MUX_24_ENC_15_CLK_OUT.CLK_HROUTE_0_1 16025 18776
+PIP.CLK_CMT_MUX_24_ENC_15_CLK_OUT.CLK_HROUTE_0_10 13144 13145 15898 16018 24536 27544
+PIP.CLK_CMT_MUX_24_ENC_15_CLK_OUT.CLK_HROUTE_0_11 13018 13145 16018 16025
+PIP.CLK_CMT_MUX_24_ENC_15_CLK_OUT.CLK_HROUTE_0_13 13138 16025
+PIP.CLK_CMT_MUX_24_ENC_15_CLK_OUT.CLK_HROUTE_0_14 13138 13144 16025 30420 30428
+PIP.CLK_CMT_MUX_24_ENC_15_CLK_OUT.CLK_HROUTE_0_15 13138 13145 16023 18897 24664 27417
+PIP.CLK_CMT_MUX_24_ENC_15_CLK_OUT.CLK_HROUTE_0_17 13137 13138 13143 13145 15896 16017 16025 24670 27416 27418 27449 27496 33209
+PIP.CLK_CMT_MUX_24_ENC_15_CLK_OUT.CLK_HROUTE_0_18 13138 13144 16018 30296
+PIP.CLK_CMT_MUX_24_ENC_15_CLK_OUT.CLK_HROUTE_0_19 13138 15980 16018 16025 18809 18898 21689 21690 24661 27449 27450 30295 33176
+PIP.CLK_CMT_MUX_24_ENC_15_CLK_OUT.CLK_HROUTE_0_2 13144 16025 21657
+PIP.CLK_CMT_MUX_24_ENC_15_CLK_OUT.CLK_HROUTE_0_21 13138 13145 16018 33177
+PIP.CLK_CMT_MUX_24_ENC_15_CLK_OUT.CLK_HROUTE_0_22 13138 13144 13145 16018 30298
+PIP.CLK_CMT_MUX_24_ENC_15_CLK_OUT.CLK_HROUTE_0_4 13144 13145 21658
+PIP.CLK_CMT_MUX_24_ENC_15_CLK_OUT.CLK_HROUTE_0_6 13099 13137 13144 16017 16018 16020 30293
+PIP.CLK_CMT_MUX_24_ENC_15_CLK_OUT.CLK_HROUTE_0_7 13016 13143 16017 16018 16025
+PIP.CLK_CMT_MUX_24_ENC_15_CLK_OUT.CLK_HROUTE_0_8 13144 15897 15981 16018 16025 27514 27517 30381 30399
+PIP.CLK_CMT_MUX_24_ENC_15_CLK_OUT.CLK_HROUTE_0_9 13145 16018
+PIP.CLK_CMT_MUX_24_ENC_17_CLK_OUT.CLK_HROUTE_0_0 16026
+PIP.CLK_CMT_MUX_24_ENC_17_CLK_OUT.CLK_HROUTE_0_10 15898 16019 16026 16027 24663 27416 27514 27543
+PIP.CLK_CMT_MUX_24_ENC_17_CLK_OUT.CLK_HROUTE_0_17 13139 13146 15952 16027 24662
+PIP.CLK_CMT_MUX_24_ENC_17_CLK_OUT.CLK_HROUTE_0_19 13139 13146 16019 18657 27325 30229 33107 33176
+PIP.CLK_CMT_MUX_24_ENC_17_CLK_OUT.CLK_HROUTE_0_21 13139 15898 16019 16027 27547 33177
+PIP.CLK_CMT_MUX_24_ENC_17_CLK_OUT.CLK_HROUTE_0_23 13139 13146 16019 16027
+PIP.CLK_CMT_MUX_24_ENC_17_CLK_OUT.CLK_HROUTE_0_5 13146 16027 18796
+PIP.CLK_CMT_MUX_24_ENC_17_CLK_OUT.CLK_HROUTE_0_6 15952 16019 16026
+PIP.CLK_CMT_MUX_24_ENC_17_CLK_OUT.CLK_HROUTE_0_9 15981 16019 16027 27499 30399
+PIP.CLK_CMT_MUX_24_ENC_19_CLK_OUT.CLK_HROUTE_0_0 13099 13147
+PIP.CLK_CMT_MUX_24_ENC_19_CLK_OUT.CLK_HROUTE_0_1 13099 16028
+PIP.CLK_CMT_MUX_24_ENC_19_CLK_OUT.CLK_HROUTE_0_10 13147 13148 16020
+PIP.CLK_CMT_MUX_24_ENC_19_CLK_OUT.CLK_HROUTE_0_11 13148 16020 16028
+PIP.CLK_CMT_MUX_24_ENC_19_CLK_OUT.CLK_HROUTE_0_12 13140 13147 27324 27541 30227 30393
+PIP.CLK_CMT_MUX_24_ENC_19_CLK_OUT.CLK_HROUTE_0_13 13099 13140 16028 27416
+PIP.CLK_CMT_MUX_24_ENC_19_CLK_OUT.CLK_HROUTE_0_18 13018 13050 13140 13147 16020 18810 18901 21781 21783 30421 30425 33305 33307 33309
+PIP.CLK_CMT_MUX_24_ENC_19_CLK_OUT.CLK_HROUTE_0_19 13015 13140 16020 16028
+PIP.CLK_CMT_MUX_24_ENC_19_CLK_OUT.CLK_HROUTE_0_21 13140 13148 16020 33177
+PIP.CLK_CMT_MUX_24_ENC_19_CLK_OUT.CLK_HROUTE_0_3 13050 13148 18777 18908 24612 27499
+PIP.CLK_CMT_MUX_24_ENC_19_CLK_OUT.CLK_HROUTE_0_4 13018 13099 13137 13147 13148 27496
+PIP.CLK_CMT_MUX_24_ENC_19_CLK_OUT.CLK_HROUTE_0_6 13147 15896 16020
+PIP.CLK_CMT_MUX_24_ENC_19_CLK_OUT.CLK_HROUTE_0_7 16020 16028
+PIP.CLK_CMT_MUX_24_ENC_19_CLK_OUT.CLK_HROUTE_0_8 13147 16020 16028
+PIP.CLK_CMT_MUX_24_ENC_19_CLK_OUT.CLK_HROUTE_0_9 13148 16020
+PIP.CLK_CMT_MUX_24_ENC_1_CLK_OUT.CLK_HROUTE_0_0 21656 21690 21783 21785 27450
+PIP.CLK_CMT_MUX_24_ENC_1_CLK_OUT.CLK_HROUTE_0_1 18776 18903
+PIP.CLK_CMT_MUX_24_ENC_1_CLK_OUT.CLK_HROUTE_0_10 15981 21777 21783 21784
+PIP.CLK_CMT_MUX_24_ENC_1_CLK_OUT.CLK_HROUTE_0_12 18897 21783
+PIP.CLK_CMT_MUX_24_ENC_1_CLK_OUT.CLK_HROUTE_0_13 13099 13144 15975 15978 16018 18874 18897 18901 18903 18909 21789 24533 24536 27544 30294 30297 30393 30420 30429 33298 33308
+PIP.CLK_CMT_MUX_24_ENC_1_CLK_OUT.CLK_HROUTE_0_14 15978 15999 18776 18897 18898 18903 21738 21778 21783 21785 24447 24661 24668 27418 27433 27495 27541 30298 33177
+PIP.CLK_CMT_MUX_24_ENC_1_CLK_OUT.CLK_HROUTE_0_15 18897 21784 27416
+PIP.CLK_CMT_MUX_24_ENC_1_CLK_OUT.CLK_HROUTE_0_16 13144 16024 18897 18898 21690 21783 21784 24669 27417 30298 30421 33300
+PIP.CLK_CMT_MUX_24_ENC_1_CLK_OUT.CLK_HROUTE_0_17 16017 18897 18898 18903 18905 21778 21784 27418
+PIP.CLK_CMT_MUX_24_ENC_1_CLK_OUT.CLK_HROUTE_0_19 18897 18903 21777
+PIP.CLK_CMT_MUX_24_ENC_1_CLK_OUT.CLK_HROUTE_0_2 18903 21657 21783
+PIP.CLK_CMT_MUX_24_ENC_1_CLK_OUT.CLK_HROUTE_0_20 18897 18903 21777 21783 30297
+PIP.CLK_CMT_MUX_24_ENC_1_CLK_OUT.CLK_HROUTE_0_21 18897 21777 21784 33177
+PIP.CLK_CMT_MUX_24_ENC_1_CLK_OUT.CLK_HROUTE_0_22 18897 21777 21783 21784 30298
+PIP.CLK_CMT_MUX_24_ENC_1_CLK_OUT.CLK_HROUTE_0_4 13018 21783 21784 30421 30430
+PIP.CLK_CMT_MUX_24_ENC_1_CLK_OUT.CLK_HROUTE_0_5 18778 18903 21784
+PIP.CLK_CMT_MUX_24_ENC_1_CLK_OUT.CLK_HROUTE_0_7 13018 18903 21777
+PIP.CLK_CMT_MUX_24_ENC_1_CLK_OUT.CLK_HROUTE_0_8 15978 18903 21777 21783
+PIP.CLK_CMT_MUX_24_ENC_1_CLK_OUT.CLK_HROUTE_0_9 15972 16018 21777 21784
+PIP.CLK_CMT_MUX_24_ENC_21_CLK_OUT.CLK_HROUTE_0_0 16029 21656
+PIP.CLK_CMT_MUX_24_ENC_21_CLK_OUT.CLK_HROUTE_0_1 13049 13149 21759 33210 33307
+PIP.CLK_CMT_MUX_24_ENC_21_CLK_OUT.CLK_HROUTE_0_11 13149 16021 16030
+PIP.CLK_CMT_MUX_24_ENC_21_CLK_OUT.CLK_HROUTE_0_12 13141 16029 21538 27416 27514 27537 27543
+PIP.CLK_CMT_MUX_24_ENC_21_CLK_OUT.CLK_HROUTE_0_13 13141 13149 27416
+PIP.CLK_CMT_MUX_24_ENC_21_CLK_OUT.CLK_HROUTE_0_14 13015 13141 13149 16029 24591 24633 27539 27549
+PIP.CLK_CMT_MUX_24_ENC_21_CLK_OUT.CLK_HROUTE_0_15 13141 16020 16030 27413
+PIP.CLK_CMT_MUX_24_ENC_21_CLK_OUT.CLK_HROUTE_0_18 13141 16020 16021 16029 30296
+PIP.CLK_CMT_MUX_24_ENC_21_CLK_OUT.CLK_HROUTE_0_2 13149 16029
+PIP.CLK_CMT_MUX_24_ENC_21_CLK_OUT.CLK_HROUTE_0_21 13141 16021 16030 33259
+PIP.CLK_CMT_MUX_24_ENC_21_CLK_OUT.CLK_HROUTE_0_22 13141 16021 16029 16030 30298
+PIP.CLK_CMT_MUX_24_ENC_21_CLK_OUT.CLK_HROUTE_0_23 13141 13149 16021 16030 33178
+PIP.CLK_CMT_MUX_24_ENC_21_CLK_OUT.CLK_HROUTE_0_3 16030 18777
+PIP.CLK_CMT_MUX_24_ENC_21_CLK_OUT.CLK_HROUTE_0_4 16029 16030 18907 21658 33259 33301
+PIP.CLK_CMT_MUX_24_ENC_21_CLK_OUT.CLK_HROUTE_0_6 16021 16029
+PIP.CLK_CMT_MUX_24_ENC_21_CLK_OUT.CLK_HROUTE_0_7 13032 13099 13148 13149 15898 16020 16021 18794 21653 21656
+PIP.CLK_CMT_MUX_24_ENC_21_CLK_OUT.CLK_HROUTE_0_8 13149 16021 16029
+PIP.CLK_CMT_MUX_24_ENC_21_CLK_OUT.CLK_HROUTE_0_9 16021 16030
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_0 13150 21656
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_1 16031
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_10 13093 13150 13151 16022
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_11 13018 13151 16022 16031
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_12 13142 13150 24536
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_13 13142 16031 33259
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_14 13142 13150 15827 15985 16031 24537 27418 27513 30396
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_15 13142 13151
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_17 13142 13151 16031 27418
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_18 13142 13150 16022
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_19 13142 16022 16031 33298
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_2 13150 16031
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_21 13142 13151 15981 16022
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_22 13102 13142 13150 13151 16022 21658 30298
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_23 13142 13151 16022 16031 33178
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_3 13151
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_4 13150 13151
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_5 13151 16031 18778
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_6 13150 16022
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_7 13016 16022 16031 30347
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_8 13102 13150 16022 16031
+PIP.CLK_CMT_MUX_24_ENC_23_CLK_OUT.CLK_HROUTE_0_9 13017 13151 16022
+PIP.CLK_CMT_MUX_24_ENC_25_CLK_OUT.CLK_HROUTE_0_0 24663
+PIP.CLK_CMT_MUX_24_ENC_25_CLK_OUT.CLK_HROUTE_0_10 24657 24663 24664
+PIP.CLK_CMT_MUX_24_ENC_25_CLK_OUT.CLK_HROUTE_0_13 27537 27543
+PIP.CLK_CMT_MUX_24_ENC_25_CLK_OUT.CLK_HROUTE_0_14 24663 27537 27543
+PIP.CLK_CMT_MUX_24_ENC_25_CLK_OUT.CLK_HROUTE_0_15 24664 27417 27537
+PIP.CLK_CMT_MUX_24_ENC_25_CLK_OUT.CLK_HROUTE_0_16 24538 24663 24664 27537
+PIP.CLK_CMT_MUX_24_ENC_25_CLK_OUT.CLK_HROUTE_0_17 16018 24664 27502 27537 27543 33307
+PIP.CLK_CMT_MUX_24_ENC_25_CLK_OUT.CLK_HROUTE_0_18 24657 24663 27537
+PIP.CLK_CMT_MUX_24_ENC_25_CLK_OUT.CLK_HROUTE_0_2 21738 24663 27324 27543 30424 33304
+PIP.CLK_CMT_MUX_24_ENC_25_CLK_OUT.CLK_HROUTE_0_20 24657 24663 27537 27543
+PIP.CLK_CMT_MUX_24_ENC_25_CLK_OUT.CLK_HROUTE_0_21 24657 24664 27537
+PIP.CLK_CMT_MUX_24_ENC_25_CLK_OUT.CLK_HROUTE_0_22 24657 24663 24664 27537 30298
+PIP.CLK_CMT_MUX_24_ENC_25_CLK_OUT.CLK_HROUTE_0_3 18777 24664
+PIP.CLK_CMT_MUX_24_ENC_25_CLK_OUT.CLK_HROUTE_0_4 21658 24663 24664
+PIP.CLK_CMT_MUX_24_ENC_25_CLK_OUT.CLK_HROUTE_0_6 15896 24657 24663
+PIP.CLK_CMT_MUX_24_ENC_25_CLK_OUT.CLK_HROUTE_0_7 13014 15929 16017 16018 16024 18909 24657 24658 24665 27543
+PIP.CLK_CMT_MUX_24_ENC_25_CLK_OUT.CLK_HROUTE_0_8 15978 24657 24663 27543
+PIP.CLK_CMT_MUX_24_ENC_25_CLK_OUT.CLK_HROUTE_0_9 24657 24664
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_0 21656 27544
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_1 18776 24665 33304
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_10 15898 24658 27544 27545
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_11 13018 24658 24665 27545
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_12 24536 27538 27544
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_14 21741 24665 24667 27517 27538 27539 27544 33259
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_15 27538 27545
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_16 12947 15829 15978 15981 18657 21537 21654 21753 24446 24447 24538 24633 27325 27538 27544 27545 30227 30228 33107
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_17 24665 27418 27538 27545
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_18 13018 24658 24663 27537 27538 27544
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_2 13099 21657 21785 24665 27544
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_20 24658 24665 27538 27544 30297
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_21 24658 27538 27545 33177
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_22 24658 27538 27544 27545 30298
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_23 24570 24657 24658 24663 24665 27449 27538 27545 33178
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_3 27545
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_4 13050 16030 18778 21658 24570 27544 27545 30428 30430
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_5 18773 18898 18904 18905 24665 27545
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_6 15896 24658 27544
+PIP.CLK_CMT_MUX_24_ENC_27_CLK_OUT.CLK_HROUTE_0_8 13014 15897 18774 18810 21780 24657 24658 24665 27544 30296
+PIP.CLK_CMT_MUX_24_ENC_29_CLK_OUT.CLK_HROUTE_0_0 21784 24666
+PIP.CLK_CMT_MUX_24_ENC_29_CLK_OUT.CLK_HROUTE_0_11 12949 21657 24659 24667 27546
+PIP.CLK_CMT_MUX_24_ENC_29_CLK_OUT.CLK_HROUTE_0_15 24667 27539
+PIP.CLK_CMT_MUX_24_ENC_29_CLK_OUT.CLK_HROUTE_0_16 24666 24667 27539
+PIP.CLK_CMT_MUX_24_ENC_29_CLK_OUT.CLK_HROUTE_0_19 13015 24659 27539 27546
+PIP.CLK_CMT_MUX_24_ENC_29_CLK_OUT.CLK_HROUTE_0_22 24659 24666 24667 27539 30295 30298
+PIP.CLK_CMT_MUX_24_ENC_29_CLK_OUT.CLK_HROUTE_0_23 24659 24667 27539 27546 33178
+PIP.CLK_CMT_MUX_24_ENC_29_CLK_OUT.CLK_HROUTE_0_3 24667
+PIP.CLK_CMT_MUX_24_ENC_31_CLK_OUT.CLK_HROUTE_0_0 21656 27547
+PIP.CLK_CMT_MUX_24_ENC_31_CLK_OUT.CLK_HROUTE_0_1 12947 15827 15828 15999 18854 18877 18898 21743 21748 21753 21759 21778 24447 24615 24668 27325 27418 30228 30385 33108 33177 33266
+PIP.CLK_CMT_MUX_24_ENC_31_CLK_OUT.CLK_HROUTE_0_10 15898 24660 27547 27548
+PIP.CLK_CMT_MUX_24_ENC_31_CLK_OUT.CLK_HROUTE_0_16 27540 27547 27548
+PIP.CLK_CMT_MUX_24_ENC_31_CLK_OUT.CLK_HROUTE_0_17 13102 13120 15827 21537 21539 24662 24668 27540 27542 27548 27550 30296 30417 33297
+PIP.CLK_CMT_MUX_24_ENC_31_CLK_OUT.CLK_HROUTE_0_18 24446 24660 27540 27547 30227 30296 33277
+PIP.CLK_CMT_MUX_24_ENC_31_CLK_OUT.CLK_HROUTE_0_19 24660 24668 27540 33176
+PIP.CLK_CMT_MUX_24_ENC_31_CLK_OUT.CLK_HROUTE_0_21 21759 24660 27499 27540 27548 33259
+PIP.CLK_CMT_MUX_24_ENC_31_CLK_OUT.CLK_HROUTE_0_22 13018 24660 24670 27449 27450 27540 27547 27548 30420 30430 33307
+PIP.CLK_CMT_MUX_24_ENC_31_CLK_OUT.CLK_HROUTE_0_3 27548
+PIP.CLK_CMT_MUX_24_ENC_31_CLK_OUT.CLK_HROUTE_0_4 18909 21741 27499 27547 27548
+PIP.CLK_CMT_MUX_24_ENC_31_CLK_OUT.CLK_HROUTE_0_6 15896 24660 27547
+PIP.CLK_CMT_MUX_24_ENC_31_CLK_OUT.CLK_HROUTE_0_7 18855 24660 24668
+PIP.CLK_CMT_MUX_24_ENC_31_CLK_OUT.CLK_HROUTE_0_8 24660 24668 27547
+PIP.CLK_CMT_MUX_24_ENC_31_CLK_OUT.CLK_HROUTE_0_9 24660 24661 27548
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_0 15929 24669 27449
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_10 24661 24669 24670
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_11 13018 24661 24670 27449 27549
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_13 13141 15981 21653 27541 27549
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_15 24670 27417 27541
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_16 13098 13137 15930 15978 16017 16018 16024 21778 21784 24538 24669 24670 27541 27547 30330 30420 30428 33304
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_17 24670 27541 27549
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_18 24621 24661 24669 27541 30296 33176 33274
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_19 24661 27541 27549 33176
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_2 21657 24669 27549
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_20 15971 15975 15978 15980 18810 18901 18903 18907 18909 21690 21788 21789 24661 24669 27541 27549 30297 30329 30420
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_21 24621 24661 24670 27541 33177
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_22 24661 24669 24670 27449 27541
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_23 24660 24661 24670 27541 27549 33177 33178
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_3 13018 15971 15978 18777 24660 27547 27548 30329 30418 33305
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_4 13017 15897 18774 18855 18908 24660 24669 24670 27449
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_5 24670 27549 33259 33300
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_6 15896 15971 15978 24661 24669 27450 30393
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_7 13016 24661 27549
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_8 18856 21658 24661 24669 27549
+PIP.CLK_CMT_MUX_24_ENC_33_CLK_OUT.CLK_HROUTE_0_9 13017 24661 24670
+PIP.CLK_CMT_MUX_24_ENC_35_CLK_OUT.CLK_HROUTE_0_0 27550
+PIP.CLK_CMT_MUX_24_ENC_35_CLK_OUT.CLK_HROUTE_0_1 18776 24671
+PIP.CLK_CMT_MUX_24_ENC_35_CLK_OUT.CLK_HROUTE_0_10 15898 24662 27550 27551
+PIP.CLK_CMT_MUX_24_ENC_35_CLK_OUT.CLK_HROUTE_0_11 24662 24671 27551
+PIP.CLK_CMT_MUX_24_ENC_35_CLK_OUT.CLK_HROUTE_0_12 24536 27542 27550
+PIP.CLK_CMT_MUX_24_ENC_35_CLK_OUT.CLK_HROUTE_0_13 18902 18911 24671 27542 33311
+PIP.CLK_CMT_MUX_24_ENC_35_CLK_OUT.CLK_HROUTE_0_14 24618 24671 27542 27550
+PIP.CLK_CMT_MUX_24_ENC_35_CLK_OUT.CLK_HROUTE_0_17 15895 18910 24671 27542 27551 30346 30347 30422 30431
+PIP.CLK_CMT_MUX_24_ENC_35_CLK_OUT.CLK_HROUTE_0_18 24662 27542 27550 30296
+PIP.CLK_CMT_MUX_24_ENC_35_CLK_OUT.CLK_HROUTE_0_19 13102 24662 24671 27542 30425 33259
+PIP.CLK_CMT_MUX_24_ENC_35_CLK_OUT.CLK_HROUTE_0_20 15827 15828 24662 24671 27325 27542 27550 30296 30417 30419 33177 33297 33299
+PIP.CLK_CMT_MUX_24_ENC_35_CLK_OUT.CLK_HROUTE_0_23 24662 24671 27542 27551 33178
+PIP.CLK_CMT_MUX_24_ENC_35_CLK_OUT.CLK_HROUTE_0_3 18777 27551
+PIP.CLK_CMT_MUX_24_ENC_35_CLK_OUT.CLK_HROUTE_0_4 21658 27550 27551
+PIP.CLK_CMT_MUX_24_ENC_35_CLK_OUT.CLK_HROUTE_0_5 24671 27551
+PIP.CLK_CMT_MUX_24_ENC_35_CLK_OUT.CLK_HROUTE_0_6 24662 27550
+PIP.CLK_CMT_MUX_24_ENC_35_CLK_OUT.CLK_HROUTE_0_7 13016 24662 24671
+PIP.CLK_CMT_MUX_24_ENC_35_CLK_OUT.CLK_HROUTE_0_8 13066 24662 24671 27466 27550
+PIP.CLK_CMT_MUX_24_ENC_35_CLK_OUT.CLK_HROUTE_0_9 24662 27551
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_1 33303
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_10 30417 30423 30424 33177
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_12 30423 33297
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_13 33297 33303
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_15 21781 21790 27417 30296 30424 33297
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_16 18778 18900 18909 21790 27501 30330 30423 30424 30425 33297 33305
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_17 13016 18859 18877 27418 30296 30424 33297 33303
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_18 18859 21789 30296 30417 30423 33297
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_19 30417 33297 33303
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_2 18776 18903 30423 33259 33303
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_20 12947 12949 15828 21538 21539 24447 27325 27326 30228 30297 30417 30423 33109 33297 33303
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_21 15827 30417 30424 33177 33297
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_22 27543 30298 30417 30423 30424 33297
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_23 30417 30424 33178 33297 33303
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_3 18777 30424
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_4 21658 30423 30424
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_5 30424 33303
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_6 18775 30417 30423
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_7 30417 33303
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_8 30417 30423 33303
+PIP.CLK_CMT_MUX_24_ENC_37_CLK_OUT.CLK_HROUTE_0_9 13017 30417 30424
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_0 21656 33304
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_1 18776 30425
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_10 15895 15898 16029 21788 21789 21790 30418 30423 33304 33305
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_11 13018 30418 30425 33305
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_12 33298 33304
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_13 27416 30425 33178 33298
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_15 27417 33298 33305
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_16 33298 33304 33305
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_17 15896 24570 24657 24663 27418 27514 30417 30425 33298 33303 33305
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_18 30296 30418 33298 33304
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_2 16025 30425 33177 33304
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_20 27418 27499 30297 30418 30420 30425 33259 33298 33304 33308
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_21 30418 33177 33298 33305
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_22 12948 12949 13071 13114 13142 15895 18657 18658 24447 24663 27324 30229 30418 33107 33109 33298 33301 33304 33305
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_23 24661 27450 27549 30418 30425 33298 33305
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_3 13096 15897 15975 16028 16029 18900 18907 21753 21780 24615 24663 27514 30227 33303 33305 33309
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_4 15929 16020 16028 18776 21658 33178 33304 33305
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_5 18778 30425 33305
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_6 15896 30418 30424 33304
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_7 13016 30418 30425
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_8 15897 30418 30425 33304
+PIP.CLK_CMT_MUX_24_ENC_39_CLK_OUT.CLK_HROUTE_0_9 13017 30418 33305
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_0 18904 21656
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_10 15898 18904 18905 21778 30399
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_11 13018 18905 21778 21785
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_13 18898 21690 21785 27416
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_14 18898 18903 18904 21785 24537 33176
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_15 18898 18905 27417 30329 30417 30424 33304
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_16 18898 18904 18905
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_18 18898 18904 21778 30296
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_19 18898 21778 21785 33176
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_2 13050 13140 13147 16020 18810 18904 18909 21657 21689 21690 21783 21785 21788 21789 24669 30421 33209 33309
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_20 18898 18904 21778 21785 30427
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_21 18898 18905 21778 33177
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_22 18898 18904 18905 21778 30298
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_23 18897 18898 18903 18905 21778 21785 33178
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_3 18777 18831 18905
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_5 18905 21785
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_6 15896 18904 21778
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_7 13016 21778 21785
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_8 13147 16021 18774 18904 21690 21777 21778 21780 21783 21785
+PIP.CLK_CMT_MUX_24_ENC_3_CLK_OUT.CLK_HROUTE_0_9 13018 18810 18905 21778 21781 21790 30430
+PIP.CLK_CMT_MUX_24_ENC_41_CLK_OUT.CLK_HROUTE_0_0 21656 27416 30426
+PIP.CLK_CMT_MUX_24_ENC_41_CLK_OUT.CLK_HROUTE_0_11 13018 30419 30427 33306
+PIP.CLK_CMT_MUX_24_ENC_41_CLK_OUT.CLK_HROUTE_0_12 24664 27537 30426 33277 33299
+PIP.CLK_CMT_MUX_24_ENC_41_CLK_OUT.CLK_HROUTE_0_13 30352 33299 33306
+PIP.CLK_CMT_MUX_24_ENC_41_CLK_OUT.CLK_HROUTE_0_17 24662 27473 27550 30427 33299 33306
+PIP.CLK_CMT_MUX_24_ENC_41_CLK_OUT.CLK_HROUTE_0_18 30296 30419 30426 33299
+PIP.CLK_CMT_MUX_24_ENC_41_CLK_OUT.CLK_HROUTE_0_21 27517 30419 30427 33299 33308
+PIP.CLK_CMT_MUX_24_ENC_41_CLK_OUT.CLK_HROUTE_0_22 18775 18898 21654 21778 24668 30419 30426 30427 33177 33299
+PIP.CLK_CMT_MUX_24_ENC_41_CLK_OUT.CLK_HROUTE_0_23 15951 18778 18897 21538 21783 30228 30419 30427 33109 33274 33299 33306
+PIP.CLK_CMT_MUX_24_ENC_41_CLK_OUT.CLK_HROUTE_0_4 21658 30426 30427
+PIP.CLK_CMT_MUX_24_ENC_41_CLK_OUT.CLK_HROUTE_0_7 30419 33306
+PIP.CLK_CMT_MUX_24_ENC_43_CLK_OUT.CLK_HROUTE_0_0 21656 33307
+PIP.CLK_CMT_MUX_24_ENC_43_CLK_OUT.CLK_HROUTE_0_12 24536 33300 33307
+PIP.CLK_CMT_MUX_24_ENC_43_CLK_OUT.CLK_HROUTE_0_13 30428 33300
+PIP.CLK_CMT_MUX_24_ENC_43_CLK_OUT.CLK_HROUTE_0_14 24592 24666 30428 33300 33307
+PIP.CLK_CMT_MUX_24_ENC_43_CLK_OUT.CLK_HROUTE_0_15 27499 33300 33308
+PIP.CLK_CMT_MUX_24_ENC_43_CLK_OUT.CLK_HROUTE_0_16 24538 33300 33307 33308
+PIP.CLK_CMT_MUX_24_ENC_43_CLK_OUT.CLK_HROUTE_0_17 27502 30428 33194 33300 33308
+PIP.CLK_CMT_MUX_24_ENC_43_CLK_OUT.CLK_HROUTE_0_2 21738 27540 30428 33177 33307
+PIP.CLK_CMT_MUX_24_ENC_43_CLK_OUT.CLK_HROUTE_0_20 30419 30420 30428 33299 33300 33303 33307
+PIP.CLK_CMT_MUX_24_ENC_43_CLK_OUT.CLK_HROUTE_0_22 30298 30420 33177 33300 33307 33308
+PIP.CLK_CMT_MUX_24_ENC_43_CLK_OUT.CLK_HROUTE_0_23 21657 24639 30420 30428 33178 33300 33308
+PIP.CLK_CMT_MUX_24_ENC_43_CLK_OUT.CLK_HROUTE_0_3 33308
+PIP.CLK_CMT_MUX_24_ENC_43_CLK_OUT.CLK_HROUTE_0_4 33307 33308
+PIP.CLK_CMT_MUX_24_ENC_43_CLK_OUT.CLK_HROUTE_0_5 13013 13014 16021 16030 30428 30430 33308 33309
+PIP.CLK_CMT_MUX_24_ENC_43_CLK_OUT.CLK_HROUTE_0_6 30420 33307
+PIP.CLK_CMT_MUX_24_ENC_43_CLK_OUT.CLK_HROUTE_0_7 13016 30420 30428
+PIP.CLK_CMT_MUX_24_ENC_43_CLK_OUT.CLK_HROUTE_0_8 15897 30420 30428 33307
+PIP.CLK_CMT_MUX_24_ENC_43_CLK_OUT.CLK_HROUTE_0_9 30420 33308
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_0 21656 30429
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_1 18776 33309
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_10 15898 30421 30429 30430
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_11 13018 30421 30430 33309
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_12 24536 30429 33301
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_13 27416 33301 33309
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_15 27417 30430 33301
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_16 15898 24660 24670 27449 27547 30429 30430 33300 33301 33307
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_17 27418 30430 33301 33309
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_18 30296 30421 30429 33301
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_2 21657 30429 33309
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_20 30297 30421 30429 33301 33309
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_21 15895 24536 27514 30421 30430 33174 33177 33300 33301
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_22 30298 30421 30429 30430 33301
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_23 30421 30430 33178 33301 33309
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_3 30381 30430
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_4 13102 21658 30429 30430 33300 33307
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_5 13018 18778 30430 33309
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_6 15896 30381 30421 30429
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_7 13016 30421 33309
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_8 15897 30421 30429 33309
+PIP.CLK_CMT_MUX_24_ENC_45_CLK_OUT.CLK_HROUTE_0_9 30421 30430
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_0 33310
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_1 30431
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_10 15898 30422 33310 33311
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_11 13094 18849 30422 30431 33311
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_12 24536 33302 33310
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_13 13065 15947 16031 27466 30347 30431 33302
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_14 15946 18773 18825 18852 18859 18880 21735 24537 27520 30431 33302 33310
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_15 27417 33302 33311
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_16 13150 33302 33310 33311
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_17 30431 33302 33311
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_2 30431 33310
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_20 30297 30422 30431 33302 33310
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_21 30422 33177 33302 33311
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_23 30347 30422 30431 33178 33302 33311
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_3 18777 33311
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_4 21658 33310 33311
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_5 18778 30431 33311
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_6 15896 30422 33310
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_7 13016 30422 30431
+PIP.CLK_CMT_MUX_24_ENC_47_CLK_OUT.CLK_HROUTE_0_9 30422 33311
+PIP.CLK_CMT_MUX_24_ENC_57_CLK_OUT.VCC_WIRE 16 43 46 48 51 54 56 59 62 64 67 75 80 83 91 102 104 147 148 152 157 160 163 164 165 168 186 190 191 200 201 204 288 427 430 432 434 436 468 474 476 590 609 610 611 612 614 615 616 617 619 621 622 623 627 630 631 634 635 636 639 640 641 642 643 645 647 648 650 651 652 653 655 656 657 659 669 671 2881 2883 2896 2916 2922 2923 2924 2925 2927 2976 2979 3025 3026 3027 3028 3037 3038 3041 3042 3043 3044 3045 3046 3068 3082 3083 3139 3141 3143 3308 3309 3313 3314 3315 3345 3349 3355 3359 3456 3489 3490 3492 3494 3495 3497 3501 3502 3504 3511 3513 3515 3516 3517 3518 3519 3520 3521 3525 3526 3527 3528 3529 3530 3531 3533 3534 3535 3537 3539 3540 3542 3543 3545 3546 12947 21537 21539 21672 24390 24552 27324 30150 30185 30191 30206 30208 30309 30312 30315 33068 33071 33086 33088
+PIP.CLK_CMT_MUX_24_ENC_5_CLK_OUT.CLK_HROUTE_0_12 18899 21538 21786 24536
+PIP.CLK_CMT_MUX_24_ENC_5_CLK_OUT.CLK_HROUTE_0_13 18899 18906 27416
+PIP.CLK_CMT_MUX_24_ENC_5_CLK_OUT.CLK_HROUTE_0_18 18899 21779 21786 30296
+PIP.CLK_CMT_MUX_24_ENC_5_CLK_OUT.CLK_HROUTE_0_21 18899 21779 21787 33177 33304
+PIP.CLK_CMT_MUX_24_ENC_5_CLK_OUT.CLK_HROUTE_0_22 18899 21779 21786 21787 30298
+PIP.CLK_CMT_MUX_24_ENC_5_CLK_OUT.CLK_HROUTE_0_23 18899 18906 21779 21787 33178
+PIP.CLK_CMT_MUX_24_ENC_5_CLK_OUT.CLK_HROUTE_0_3 21787 24662 24667 27517 27537 27539 27542 27543 30298 30399 33109
+PIP.CLK_CMT_MUX_24_ENC_5_CLK_OUT.CLK_HROUTE_0_4 21658 21786 21787
+PIP.CLK_CMT_MUX_24_ENC_5_CLK_OUT.CLK_HROUTE_0_7 13016 18906 21779
+PIP.CLK_CMT_MUX_24_ENC_5_CLK_OUT.CLK_HROUTE_0_8 15897 18906 21753 21779 21786 27544
+PIP.CLK_CMT_MUX_24_ENC_5_CLK_OUT.CLK_HROUTE_0_9 18793 21777 21779 21783 21784 21787 30298
+PIP.CLK_CMT_MUX_24_ENC_60_CLK_OUT.CLK_HDISTR_0_20
+PIP.CLK_CMT_MUX_24_ENC_7_CLK_OUT.CLK_HROUTE_0_0 18907
+PIP.CLK_CMT_MUX_24_ENC_7_CLK_OUT.CLK_HROUTE_0_1 18776 21788
+PIP.CLK_CMT_MUX_24_ENC_7_CLK_OUT.CLK_HROUTE_0_12 18900 18907
+PIP.CLK_CMT_MUX_24_ENC_7_CLK_OUT.CLK_HROUTE_0_14 15828 15952 15996 18657 18898 18900 18904 18907 21778 21788 24537 27325 27517 30229 30430 33107 33173 33301
+PIP.CLK_CMT_MUX_24_ENC_7_CLK_OUT.CLK_HROUTE_0_15 18900 18908 21759
+PIP.CLK_CMT_MUX_24_ENC_7_CLK_OUT.CLK_HROUTE_0_17 18900 18908 21788 27415 27418
+PIP.CLK_CMT_MUX_24_ENC_7_CLK_OUT.CLK_HROUTE_0_18 18900 18907 21780
+PIP.CLK_CMT_MUX_24_ENC_7_CLK_OUT.CLK_HROUTE_0_19 18900 21780 21788
+PIP.CLK_CMT_MUX_24_ENC_7_CLK_OUT.CLK_HROUTE_0_2 13147 15975 15978 15981 18907 21657 21788 27499 27541 27548 27549 30297 30399
+PIP.CLK_CMT_MUX_24_ENC_7_CLK_OUT.CLK_HROUTE_0_20 18900 18907 21780 21788 30297 30378
+PIP.CLK_CMT_MUX_24_ENC_7_CLK_OUT.CLK_HROUTE_0_21 18810 18900 18908 21780 21790 30417 30421 30425 30430 33210 33305
+PIP.CLK_CMT_MUX_24_ENC_7_CLK_OUT.CLK_HROUTE_0_22 18900 18907 18908 21780 30298
+PIP.CLK_CMT_MUX_24_ENC_7_CLK_OUT.CLK_HROUTE_0_4 18859 18907 18908
+PIP.CLK_CMT_MUX_24_ENC_7_CLK_OUT.CLK_HROUTE_0_5 18778 18908 21788
+PIP.CLK_CMT_MUX_24_ENC_7_CLK_OUT.CLK_HROUTE_0_6 13099 18907 21537 21780
+PIP.CLK_CMT_MUX_24_ENC_7_CLK_OUT.CLK_HROUTE_0_7 18909 21780 21788
+PIP.CLK_CMT_MUX_24_ENC_7_CLK_OUT.CLK_HROUTE_0_8 18907 21780 21788
+PIP.CLK_CMT_MUX_24_ENC_7_CLK_OUT.CLK_HROUTE_0_9 15972 18908 21780
+PIP.CLK_CMT_MUX_24_ENC_9_CLK_OUT.CLK_HROUTE_0_0 21653 21656 21789
+PIP.CLK_CMT_MUX_24_ENC_9_CLK_OUT.CLK_HROUTE_0_1 15972 16017 16023 18773 18776 18810 18909 21780 30296
+PIP.CLK_CMT_MUX_24_ENC_9_CLK_OUT.CLK_HROUTE_0_10 15898 21781 21789 21790
+PIP.CLK_CMT_MUX_24_ENC_9_CLK_OUT.CLK_HROUTE_0_11 13018 18909 21781 21790
+PIP.CLK_CMT_MUX_24_ENC_9_CLK_OUT.CLK_HROUTE_0_12 13144 13145 15929 16018 18809 18901 21789 24536 27543 30421 30430
+PIP.CLK_CMT_MUX_24_ENC_9_CLK_OUT.CLK_HROUTE_0_13 15978 18901 18909
+PIP.CLK_CMT_MUX_24_ENC_9_CLK_OUT.CLK_HROUTE_0_14 13099 18901 18909 21789
+PIP.CLK_CMT_MUX_24_ENC_9_CLK_OUT.CLK_HROUTE_0_16 12947 12948 13147 18901 21538 21787 21789 21790 27538 30228 30425
+PIP.CLK_CMT_MUX_24_ENC_9_CLK_OUT.CLK_HROUTE_0_17 18901 18909 21790 27418
+PIP.CLK_CMT_MUX_24_ENC_9_CLK_OUT.CLK_HROUTE_0_18 18901 21781 21789 30296
+PIP.CLK_CMT_MUX_24_ENC_9_CLK_OUT.CLK_HROUTE_0_2 18877 18909 21657 21789
+PIP.CLK_CMT_MUX_24_ENC_9_CLK_OUT.CLK_HROUTE_0_20 13147 15975 15978 15981 15999 18874 18901 18903 18909 21781 21789 24660 27499 30297 30420 30421 33305 33307
+PIP.CLK_CMT_MUX_24_ENC_9_CLK_OUT.CLK_HROUTE_0_21 18901 21781 21790 33177
+PIP.CLK_CMT_MUX_24_ENC_9_CLK_OUT.CLK_HROUTE_0_22 18774 18901 21781 21789 21790 30298
+PIP.CLK_CMT_MUX_24_ENC_9_CLK_OUT.CLK_HROUTE_0_23 18901 18909 21781 21790 24538 27537 27547
+PIP.CLK_CMT_MUX_24_ENC_9_CLK_OUT.CLK_HROUTE_0_4 21789 21790
+PIP.CLK_CMT_MUX_24_ENC_9_CLK_OUT.CLK_HROUTE_0_5 18778 18909 21790
+PIP.CLK_CMT_MUX_24_ENC_9_CLK_OUT.CLK_HROUTE_0_6 12947 15828 15896 21781 21789 24446 33109
+PIP.CLK_CMT_MUX_24_ENC_9_CLK_OUT.CLK_HROUTE_0_8 15897 18909 21781 21789
+PIP.CLK_CMT_MUX_2TO1_100_CLK_OUT.CLK_BUFCE_ROW_46_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_100_CLK_OUT.CLK_CMT_MUX_16_ENC_12_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_102_CLK_OUT.CLK_VDISTR_TOP12 24545 24551 24554
+PIP.CLK_CMT_MUX_2TO1_103_CLK_OUT.CLK_CMT_MUX_16_ENC_12_CLK_OUT 24563
+PIP.CLK_CMT_MUX_2TO1_103_CLK_OUT.CLK_VDISTR_BOT12 15829 15911 21671 21673 24445 27326 27432 30228
+PIP.CLK_CMT_MUX_2TO1_105_CLK_OUT.CLK_CMT_MUX_2TO1_108_CLK_OUT 24439 24445 24454
+PIP.CLK_CMT_MUX_2TO1_106_CLK_OUT.CLK_CMT_MUX_16_ENC_13_CLK_OUT 27419
+PIP.CLK_CMT_MUX_2TO1_106_CLK_OUT.CLK_HROUTE_0_13 27416
+PIP.CLK_CMT_MUX_2TO1_107_CLK_OUT.CLK_CMT_MUX_16_ENC_13_CLK_OUT 27422
+PIP.CLK_CMT_MUX_2TO1_107_CLK_OUT.CLK_HROUTE_1_13 27413
+PIP.CLK_CMT_MUX_2TO1_108_CLK_OUT.CLK_BUFCE_ROW_49_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_108_CLK_OUT.CLK_CMT_MUX_16_ENC_13_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_10_CLK_OUT.CLK_CMT_MUX_16_ENC_1_CLK_OUT 18779
+PIP.CLK_CMT_MUX_2TO1_10_CLK_OUT.CLK_HROUTE_0_1 18776
+PIP.CLK_CMT_MUX_2TO1_110_CLK_OUT.CLK_VDISTR_TOP13 27425 27431 27434
+PIP.CLK_CMT_MUX_2TO1_111_CLK_OUT.CLK_CMT_MUX_16_ENC_13_CLK_OUT 27443
+PIP.CLK_CMT_MUX_2TO1_111_CLK_OUT.CLK_VDISTR_BOT13 15828 18657 18658 21537 21538 24446 27324 27325 27431 30228
+PIP.CLK_CMT_MUX_2TO1_113_CLK_OUT.CLK_CMT_MUX_2TO1_116_CLK_OUT 27319 27325 27334
+PIP.CLK_CMT_MUX_2TO1_114_CLK_OUT.CLK_CMT_MUX_16_ENC_14_CLK_OUT 24540
+PIP.CLK_CMT_MUX_2TO1_114_CLK_OUT.CLK_HROUTE_0_14 12949 15827 18657 21537 21538 24537
+PIP.CLK_CMT_MUX_2TO1_115_CLK_OUT.CLK_CMT_MUX_16_ENC_14_CLK_OUT 24543
+PIP.CLK_CMT_MUX_2TO1_115_CLK_OUT.CLK_HROUTE_1_14 24534
+PIP.CLK_CMT_MUX_2TO1_116_CLK_OUT.CLK_BUFCE_ROW_52_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_116_CLK_OUT.CLK_CMT_MUX_16_ENC_14_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_118_CLK_OUT.CLK_VDISTR_TOP14 24546 24552 24555
+PIP.CLK_CMT_MUX_2TO1_119_CLK_OUT.CLK_CMT_MUX_16_ENC_14_CLK_OUT 24564
+PIP.CLK_CMT_MUX_2TO1_119_CLK_OUT.CLK_VDISTR_BOT14 12948 12949 13034 15827 15829 15912 18658 21537 21539 24445 24552 27324
+PIP.CLK_CMT_MUX_2TO1_11_CLK_OUT.CLK_CMT_MUX_16_ENC_1_CLK_OUT 18782
+PIP.CLK_CMT_MUX_2TO1_11_CLK_OUT.CLK_HROUTE_1_1 18773
+PIP.CLK_CMT_MUX_2TO1_121_CLK_OUT.CLK_CMT_MUX_2TO1_124_CLK_OUT 24440 24446 24455
+PIP.CLK_CMT_MUX_2TO1_122_CLK_OUT.CLK_CMT_MUX_16_ENC_15_CLK_OUT 27420
+PIP.CLK_CMT_MUX_2TO1_122_CLK_OUT.CLK_HROUTE_0_15 27417
+PIP.CLK_CMT_MUX_2TO1_123_CLK_OUT.CLK_CMT_MUX_16_ENC_15_CLK_OUT 27423
+PIP.CLK_CMT_MUX_2TO1_123_CLK_OUT.CLK_HROUTE_1_15 27414
+PIP.CLK_CMT_MUX_2TO1_124_CLK_OUT.CLK_BUFCE_ROW_56_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_124_CLK_OUT.CLK_CMT_MUX_16_ENC_15_CLK_OUT 27499
+PIP.CLK_CMT_MUX_2TO1_126_CLK_OUT.CLK_VDISTR_TOP15 27426 27432 27435
+PIP.CLK_CMT_MUX_2TO1_127_CLK_OUT.CLK_CMT_MUX_16_ENC_15_CLK_OUT 27444
+PIP.CLK_CMT_MUX_2TO1_127_CLK_OUT.CLK_VDISTR_BOT15 13031 13032 15827 15828 15829 18657 18658 21537 21538 21539 24445 27324 27325 27326 30228
+PIP.CLK_CMT_MUX_2TO1_129_CLK_OUT.CLK_CMT_MUX_2TO1_132_CLK_OUT 27320 27326 27335
+PIP.CLK_CMT_MUX_2TO1_12_CLK_OUT.CLK_BUFCE_ROW_7_CLK_OUT 18660
+PIP.CLK_CMT_MUX_2TO1_12_CLK_OUT.CLK_CMT_MUX_16_ENC_1_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_130_CLK_OUT.CLK_CMT_MUX_16_ENC_16_CLK_OUT 24541
+PIP.CLK_CMT_MUX_2TO1_130_CLK_OUT.CLK_HROUTE_0_16 24538
+PIP.CLK_CMT_MUX_2TO1_131_CLK_OUT.CLK_CMT_MUX_16_ENC_16_CLK_OUT 24544
+PIP.CLK_CMT_MUX_2TO1_131_CLK_OUT.CLK_HROUTE_1_16 24535
+PIP.CLK_CMT_MUX_2TO1_132_CLK_OUT.CLK_BUFCE_ROW_59_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_132_CLK_OUT.CLK_CMT_MUX_16_ENC_16_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_134_CLK_OUT.CLK_VDISTR_TOP16 24547 24553 24556
+PIP.CLK_CMT_MUX_2TO1_135_CLK_OUT.CLK_CMT_MUX_16_ENC_16_CLK_OUT 24565
+PIP.CLK_CMT_MUX_2TO1_135_CLK_OUT.CLK_VDISTR_BOT16 12948 15827 15828 15829 18657 21538 21539 24445 24446 27324 27325 30228
+PIP.CLK_CMT_MUX_2TO1_137_CLK_OUT.CLK_CMT_MUX_2TO1_140_CLK_OUT 24441 24447 24456
+PIP.CLK_CMT_MUX_2TO1_138_CLK_OUT.CLK_CMT_MUX_16_ENC_17_CLK_OUT 27421
+PIP.CLK_CMT_MUX_2TO1_138_CLK_OUT.CLK_HROUTE_0_17 27418
+PIP.CLK_CMT_MUX_2TO1_139_CLK_OUT.CLK_CMT_MUX_16_ENC_17_CLK_OUT 27424
+PIP.CLK_CMT_MUX_2TO1_139_CLK_OUT.CLK_HROUTE_1_17 27415
+PIP.CLK_CMT_MUX_2TO1_140_CLK_OUT.CLK_BUFCE_ROW_62_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_140_CLK_OUT.CLK_CMT_MUX_16_ENC_17_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_142_CLK_OUT.CLK_VDISTR_TOP17 27427 27433 27436
+PIP.CLK_CMT_MUX_2TO1_143_CLK_OUT.CLK_CMT_MUX_16_ENC_17_CLK_OUT 27445
+PIP.CLK_CMT_MUX_2TO1_143_CLK_OUT.CLK_VDISTR_BOT17 27433
+PIP.CLK_CMT_MUX_2TO1_145_CLK_OUT.CLK_CMT_MUX_2TO1_148_CLK_OUT 30221 30227 30236
+PIP.CLK_CMT_MUX_2TO1_146_CLK_OUT.CLK_CMT_MUX_16_ENC_18_CLK_OUT 30299
+PIP.CLK_CMT_MUX_2TO1_146_CLK_OUT.CLK_HROUTE_0_18 30296
+PIP.CLK_CMT_MUX_2TO1_147_CLK_OUT.CLK_CMT_MUX_16_ENC_18_CLK_OUT 30302
+PIP.CLK_CMT_MUX_2TO1_147_CLK_OUT.CLK_HROUTE_1_18 30293
+PIP.CLK_CMT_MUX_2TO1_148_CLK_OUT.CLK_BUFCE_ROW_67_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_148_CLK_OUT.CLK_CMT_MUX_16_ENC_18_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_14_CLK_OUT.CLK_VDISTR_TOP1 18785 18791 18794
+PIP.CLK_CMT_MUX_2TO1_150_CLK_OUT.CLK_VDISTR_TOP18 30305 30311 30314 30375
+PIP.CLK_CMT_MUX_2TO1_151_CLK_OUT.CLK_CMT_MUX_16_ENC_18_CLK_OUT 30323
+PIP.CLK_CMT_MUX_2TO1_151_CLK_OUT.CLK_VDISTR_BOT18 13151 18856 27520 30311 33225
+PIP.CLK_CMT_MUX_2TO1_153_CLK_OUT.CLK_CMT_MUX_2TO1_156_CLK_OUT 33101 33107 33116
+PIP.CLK_CMT_MUX_2TO1_154_CLK_OUT.CLK_CMT_MUX_16_ENC_19_CLK_OUT 33179
+PIP.CLK_CMT_MUX_2TO1_154_CLK_OUT.CLK_HROUTE_0_19 27325 33176
+PIP.CLK_CMT_MUX_2TO1_155_CLK_OUT.CLK_CMT_MUX_16_ENC_19_CLK_OUT 33182
+PIP.CLK_CMT_MUX_2TO1_155_CLK_OUT.CLK_HROUTE_1_19 33173
+PIP.CLK_CMT_MUX_2TO1_156_CLK_OUT.CLK_BUFCE_ROW_70_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_156_CLK_OUT.CLK_CMT_MUX_16_ENC_19_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_158_CLK_OUT.CLK_VDISTR_TOP19 33185 33191 33194
+PIP.CLK_CMT_MUX_2TO1_159_CLK_OUT.CLK_CMT_MUX_16_ENC_19_CLK_OUT 33203
+PIP.CLK_CMT_MUX_2TO1_15_CLK_OUT.CLK_CMT_MUX_16_ENC_1_CLK_OUT 18803
+PIP.CLK_CMT_MUX_2TO1_15_CLK_OUT.CLK_VDISTR_BOT1 18791
+PIP.CLK_CMT_MUX_2TO1_161_CLK_OUT.CLK_CMT_MUX_2TO1_164_CLK_OUT 30222 30228 30237
+PIP.CLK_CMT_MUX_2TO1_162_CLK_OUT.CLK_CMT_MUX_16_ENC_20_CLK_OUT 30300 30378
+PIP.CLK_CMT_MUX_2TO1_162_CLK_OUT.CLK_HROUTE_0_20 30297
+PIP.CLK_CMT_MUX_2TO1_163_CLK_OUT.CLK_CMT_MUX_16_ENC_20_CLK_OUT 30303
+PIP.CLK_CMT_MUX_2TO1_163_CLK_OUT.CLK_HROUTE_1_20 30294
+PIP.CLK_CMT_MUX_2TO1_164_CLK_OUT.CLK_BUFCE_ROW_73_CLK_OUT 30231
+PIP.CLK_CMT_MUX_2TO1_164_CLK_OUT.CLK_CMT_MUX_16_ENC_20_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_166_CLK_OUT.CLK_VDISTR_TOP20 30306 30312 30315
+PIP.CLK_CMT_MUX_2TO1_167_CLK_OUT.CLK_CMT_MUX_16_ENC_20_CLK_OUT 30324
+PIP.CLK_CMT_MUX_2TO1_167_CLK_OUT.CLK_VDISTR_BOT20 21537 27324 27325
+PIP.CLK_CMT_MUX_2TO1_169_CLK_OUT.CLK_CMT_MUX_2TO1_172_CLK_OUT 33102 33108 33117
+PIP.CLK_CMT_MUX_2TO1_170_CLK_OUT.CLK_CMT_MUX_16_ENC_21_CLK_OUT 33180
+PIP.CLK_CMT_MUX_2TO1_170_CLK_OUT.CLK_HROUTE_0_21 33177
+PIP.CLK_CMT_MUX_2TO1_171_CLK_OUT.CLK_CMT_MUX_16_ENC_21_CLK_OUT 33183
+PIP.CLK_CMT_MUX_2TO1_171_CLK_OUT.CLK_HROUTE_1_21 33174
+PIP.CLK_CMT_MUX_2TO1_172_CLK_OUT.CLK_BUFCE_ROW_77_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_172_CLK_OUT.CLK_CMT_MUX_16_ENC_21_CLK_OUT 33259
+PIP.CLK_CMT_MUX_2TO1_174_CLK_OUT.CLK_VDISTR_TOP21 33186 33192 33195
+PIP.CLK_CMT_MUX_2TO1_175_CLK_OUT.CLK_CMT_MUX_16_ENC_21_CLK_OUT 33204
+PIP.CLK_CMT_MUX_2TO1_177_CLK_OUT.CLK_CMT_MUX_2TO1_180_CLK_OUT 30223 30229 30238
+PIP.CLK_CMT_MUX_2TO1_178_CLK_OUT.CLK_CMT_MUX_16_ENC_22_CLK_OUT 30301
+PIP.CLK_CMT_MUX_2TO1_178_CLK_OUT.CLK_HROUTE_0_22 21537 30298
+PIP.CLK_CMT_MUX_2TO1_179_CLK_OUT.CLK_CMT_MUX_16_ENC_22_CLK_OUT 30304
+PIP.CLK_CMT_MUX_2TO1_179_CLK_OUT.CLK_HROUTE_1_22 30295
+PIP.CLK_CMT_MUX_2TO1_17_CLK_OUT.CLK_CMT_MUX_2TO1_20_CLK_OUT 21532 21538 21547
+PIP.CLK_CMT_MUX_2TO1_180_CLK_OUT.CLK_BUFCE_ROW_80_CLK_OUT 30232
+PIP.CLK_CMT_MUX_2TO1_180_CLK_OUT.CLK_CMT_MUX_16_ENC_22_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_182_CLK_OUT.CLK_VDISTR_TOP22 30307 30313 30316
+PIP.CLK_CMT_MUX_2TO1_183_CLK_OUT.CLK_CMT_MUX_16_ENC_22_CLK_OUT 30325
+PIP.CLK_CMT_MUX_2TO1_183_CLK_OUT.CLK_VDISTR_BOT22 15895 18659 21538 27509 30228 30313
+PIP.CLK_CMT_MUX_2TO1_185_CLK_OUT.CLK_CMT_MUX_2TO1_188_CLK_OUT 33103 33109 33118
+PIP.CLK_CMT_MUX_2TO1_186_CLK_OUT.CLK_CMT_MUX_16_ENC_23_CLK_OUT 33181
+PIP.CLK_CMT_MUX_2TO1_186_CLK_OUT.CLK_HROUTE_0_23 33109 33178
+PIP.CLK_CMT_MUX_2TO1_187_CLK_OUT.CLK_CMT_MUX_16_ENC_23_CLK_OUT 33184
+PIP.CLK_CMT_MUX_2TO1_187_CLK_OUT.CLK_HROUTE_1_23 33175
+PIP.CLK_CMT_MUX_2TO1_188_CLK_OUT.CLK_BUFCE_ROW_83_CLK_OUT 33112
+PIP.CLK_CMT_MUX_2TO1_188_CLK_OUT.CLK_CMT_MUX_16_ENC_23_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_18_CLK_OUT.CLK_CMT_MUX_16_ENC_2_CLK_OUT 21660
+PIP.CLK_CMT_MUX_2TO1_18_CLK_OUT.CLK_HROUTE_0_2 21657
+PIP.CLK_CMT_MUX_2TO1_190_CLK_OUT.CLK_VDISTR_TOP23 33187 33193 33196
+PIP.CLK_CMT_MUX_2TO1_191_CLK_OUT.CLK_CMT_MUX_16_ENC_23_CLK_OUT 33205
+PIP.CLK_CMT_MUX_2TO1_191_CLK_OUT.CLK_VDISTR_BOT23 33193
+PIP.CLK_CMT_MUX_2TO1_19_CLK_OUT.CLK_CMT_MUX_16_ENC_2_CLK_OUT 21663
+PIP.CLK_CMT_MUX_2TO1_19_CLK_OUT.CLK_HROUTE_1_2 21654
+PIP.CLK_CMT_MUX_2TO1_1_CLK_OUT.CLK_CMT_MUX_2TO1_4_CLK_OUT 21531 21537 21546
+PIP.CLK_CMT_MUX_2TO1_20_CLK_OUT.CLK_BUFCE_ROW_10_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_20_CLK_OUT.CLK_CMT_MUX_16_ENC_2_CLK_OUT 21738
+PIP.CLK_CMT_MUX_2TO1_22_CLK_OUT.CLK_VDISTR_TOP2 21666 21672 21675
+PIP.CLK_CMT_MUX_2TO1_23_CLK_OUT.CLK_CMT_MUX_16_ENC_2_CLK_OUT 21684
+PIP.CLK_CMT_MUX_2TO1_23_CLK_OUT.CLK_VDISTR_BOT2 21672
+PIP.CLK_CMT_MUX_2TO1_25_CLK_OUT.CLK_CMT_MUX_2TO1_28_CLK_OUT 18652 18658 18667
+PIP.CLK_CMT_MUX_2TO1_26_CLK_OUT.CLK_CMT_MUX_16_ENC_3_CLK_OUT 18780
+PIP.CLK_CMT_MUX_2TO1_26_CLK_OUT.CLK_HROUTE_0_3 18777
+PIP.CLK_CMT_MUX_2TO1_27_CLK_OUT.CLK_CMT_MUX_16_ENC_3_CLK_OUT 18783
+PIP.CLK_CMT_MUX_2TO1_27_CLK_OUT.CLK_HROUTE_1_3 18774
+PIP.CLK_CMT_MUX_2TO1_28_CLK_OUT.CLK_BUFCE_ROW_14_CLK_OUT 18661
+PIP.CLK_CMT_MUX_2TO1_28_CLK_OUT.CLK_CMT_MUX_16_ENC_3_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_2_CLK_OUT.CLK_CMT_MUX_16_ENC_0_CLK_OUT 21659
+PIP.CLK_CMT_MUX_2TO1_2_CLK_OUT.CLK_HROUTE_0_0 21656
+PIP.CLK_CMT_MUX_2TO1_30_CLK_OUT.CLK_VDISTR_TOP3 18786 18792 18795
+PIP.CLK_CMT_MUX_2TO1_31_CLK_OUT.CLK_CMT_MUX_16_ENC_3_CLK_OUT 18804
+PIP.CLK_CMT_MUX_2TO1_31_CLK_OUT.CLK_VDISTR_BOT3 18792
+PIP.CLK_CMT_MUX_2TO1_33_CLK_OUT.CLK_CMT_MUX_2TO1_36_CLK_OUT 21533 21539 21548
+PIP.CLK_CMT_MUX_2TO1_34_CLK_OUT.CLK_CMT_MUX_16_ENC_4_CLK_OUT 21661
+PIP.CLK_CMT_MUX_2TO1_34_CLK_OUT.CLK_HROUTE_0_4 21658
+PIP.CLK_CMT_MUX_2TO1_35_CLK_OUT.CLK_CMT_MUX_16_ENC_4_CLK_OUT 21664
+PIP.CLK_CMT_MUX_2TO1_35_CLK_OUT.CLK_HROUTE_1_4 21655
+PIP.CLK_CMT_MUX_2TO1_36_CLK_OUT.CLK_BUFCE_ROW_17_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_36_CLK_OUT.CLK_CMT_MUX_16_ENC_4_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_38_CLK_OUT.CLK_VDISTR_TOP4 21667 21673 21676
+PIP.CLK_CMT_MUX_2TO1_39_CLK_OUT.CLK_CMT_MUX_16_ENC_4_CLK_OUT 21685
+PIP.CLK_CMT_MUX_2TO1_39_CLK_OUT.CLK_VDISTR_BOT4 12948 15827 15828 18658 21537 21538 21673 24445 24446 27325 27326 30228
+PIP.CLK_CMT_MUX_2TO1_3_CLK_OUT.CLK_CMT_MUX_16_ENC_0_CLK_OUT 21662
+PIP.CLK_CMT_MUX_2TO1_3_CLK_OUT.CLK_HROUTE_1_0 21653
+PIP.CLK_CMT_MUX_2TO1_41_CLK_OUT.CLK_CMT_MUX_2TO1_44_CLK_OUT 18653 18659 18668
+PIP.CLK_CMT_MUX_2TO1_42_CLK_OUT.CLK_CMT_MUX_16_ENC_5_CLK_OUT 18781
+PIP.CLK_CMT_MUX_2TO1_42_CLK_OUT.CLK_HROUTE_0_5 18778
+PIP.CLK_CMT_MUX_2TO1_43_CLK_OUT.CLK_CMT_MUX_16_ENC_5_CLK_OUT 18784
+PIP.CLK_CMT_MUX_2TO1_43_CLK_OUT.CLK_HROUTE_1_5 18775
+PIP.CLK_CMT_MUX_2TO1_44_CLK_OUT.CLK_BUFCE_ROW_20_CLK_OUT 18662
+PIP.CLK_CMT_MUX_2TO1_44_CLK_OUT.CLK_CMT_MUX_16_ENC_5_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_46_CLK_OUT.CLK_VDISTR_TOP5 18787 18793 18796
+PIP.CLK_CMT_MUX_2TO1_47_CLK_OUT.CLK_CMT_MUX_16_ENC_5_CLK_OUT 18805
+PIP.CLK_CMT_MUX_2TO1_47_CLK_OUT.CLK_VDISTR_BOT5 18793
+PIP.CLK_CMT_MUX_2TO1_49_CLK_OUT.CLK_CMT_MUX_2TO1_52_CLK_OUT 15821 15827 15836
+PIP.CLK_CMT_MUX_2TO1_4_CLK_OUT.CLK_BUFCE_ROW_4_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_4_CLK_OUT.CLK_CMT_MUX_16_ENC_0_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_50_CLK_OUT.CLK_CMT_MUX_16_ENC_6_CLK_OUT 15899
+PIP.CLK_CMT_MUX_2TO1_50_CLK_OUT.CLK_HROUTE_0_6 15896
+PIP.CLK_CMT_MUX_2TO1_51_CLK_OUT.CLK_CMT_MUX_16_ENC_6_CLK_OUT 15902
+PIP.CLK_CMT_MUX_2TO1_51_CLK_OUT.CLK_HROUTE_1_6 15893
+PIP.CLK_CMT_MUX_2TO1_52_CLK_OUT.CLK_BUFCE_ROW_25_CLK_OUT 15830
+PIP.CLK_CMT_MUX_2TO1_52_CLK_OUT.CLK_CMT_MUX_16_ENC_6_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_54_CLK_OUT.CLK_VDISTR_TOP6 15905 15911 15914
+PIP.CLK_CMT_MUX_2TO1_55_CLK_OUT.CLK_CMT_MUX_16_ENC_6_CLK_OUT 15923
+PIP.CLK_CMT_MUX_2TO1_55_CLK_OUT.CLK_VDISTR_BOT6 15911 18657 21537 21538 30228
+PIP.CLK_CMT_MUX_2TO1_57_CLK_OUT.CLK_CMT_MUX_2TO1_60_CLK_OUT 12941 12947 12956
+PIP.CLK_CMT_MUX_2TO1_58_CLK_OUT.CLK_CMT_MUX_16_ENC_7_CLK_OUT 13019
+PIP.CLK_CMT_MUX_2TO1_58_CLK_OUT.CLK_HROUTE_0_7 13016
+PIP.CLK_CMT_MUX_2TO1_59_CLK_OUT.CLK_CMT_MUX_16_ENC_7_CLK_OUT 13022
+PIP.CLK_CMT_MUX_2TO1_59_CLK_OUT.CLK_HROUTE_1_7 13013
+PIP.CLK_CMT_MUX_2TO1_60_CLK_OUT.CLK_BUFCE_ROW_28_CLK_OUT 12950
+PIP.CLK_CMT_MUX_2TO1_60_CLK_OUT.CLK_CMT_MUX_16_ENC_7_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_62_CLK_OUT.CLK_VDISTR_TOP7 13025 13031 13034
+PIP.CLK_CMT_MUX_2TO1_63_CLK_OUT.CLK_CMT_MUX_16_ENC_7_CLK_OUT 13043
+PIP.CLK_CMT_MUX_2TO1_63_CLK_OUT.CLK_VDISTR_BOT7 13031 15828 18658 21537 27324
+PIP.CLK_CMT_MUX_2TO1_65_CLK_OUT.CLK_CMT_MUX_2TO1_68_CLK_OUT 15822 15828 15837
+PIP.CLK_CMT_MUX_2TO1_66_CLK_OUT.CLK_CMT_MUX_16_ENC_8_CLK_OUT 15900
+PIP.CLK_CMT_MUX_2TO1_66_CLK_OUT.CLK_HROUTE_0_8 15897
+PIP.CLK_CMT_MUX_2TO1_67_CLK_OUT.CLK_CMT_MUX_16_ENC_8_CLK_OUT 15903
+PIP.CLK_CMT_MUX_2TO1_67_CLK_OUT.CLK_HROUTE_1_8 15894
+PIP.CLK_CMT_MUX_2TO1_68_CLK_OUT.CLK_BUFCE_ROW_31_CLK_OUT 15831
+PIP.CLK_CMT_MUX_2TO1_68_CLK_OUT.CLK_CMT_MUX_16_ENC_8_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_6_CLK_OUT.CLK_VDISTR_TOP0 21665 21671 21674
+PIP.CLK_CMT_MUX_2TO1_70_CLK_OUT.CLK_VDISTR_TOP8 15906 15912 15915
+PIP.CLK_CMT_MUX_2TO1_71_CLK_OUT.CLK_CMT_MUX_16_ENC_8_CLK_OUT 15924
+PIP.CLK_CMT_MUX_2TO1_71_CLK_OUT.CLK_VDISTR_BOT8 12948 15912 18657 21538 27324 27326 30228
+PIP.CLK_CMT_MUX_2TO1_73_CLK_OUT.CLK_CMT_MUX_2TO1_76_CLK_OUT 12942 12948 12957
+PIP.CLK_CMT_MUX_2TO1_74_CLK_OUT.CLK_CMT_MUX_16_ENC_9_CLK_OUT 13020
+PIP.CLK_CMT_MUX_2TO1_74_CLK_OUT.CLK_HROUTE_0_9 13017
+PIP.CLK_CMT_MUX_2TO1_75_CLK_OUT.CLK_CMT_MUX_16_ENC_9_CLK_OUT 13023
+PIP.CLK_CMT_MUX_2TO1_75_CLK_OUT.CLK_HROUTE_1_9 13014
+PIP.CLK_CMT_MUX_2TO1_76_CLK_OUT.CLK_BUFCE_ROW_35_CLK_OUT 12951
+PIP.CLK_CMT_MUX_2TO1_76_CLK_OUT.CLK_CMT_MUX_16_ENC_9_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_78_CLK_OUT.CLK_VDISTR_TOP9 13026 13032 13035
+PIP.CLK_CMT_MUX_2TO1_79_CLK_OUT.CLK_CMT_MUX_16_ENC_9_CLK_OUT 13044 13099
+PIP.CLK_CMT_MUX_2TO1_79_CLK_OUT.CLK_VDISTR_BOT9 13032 15828 21537 21538 27325
+PIP.CLK_CMT_MUX_2TO1_7_CLK_OUT.CLK_CMT_MUX_16_ENC_0_CLK_OUT 21683
+PIP.CLK_CMT_MUX_2TO1_7_CLK_OUT.CLK_VDISTR_BOT0 21671
+PIP.CLK_CMT_MUX_2TO1_81_CLK_OUT.CLK_CMT_MUX_2TO1_84_CLK_OUT 15823 15829 15838
+PIP.CLK_CMT_MUX_2TO1_82_CLK_OUT.CLK_CMT_MUX_16_ENC_10_CLK_OUT 15901
+PIP.CLK_CMT_MUX_2TO1_82_CLK_OUT.CLK_HROUTE_0_10 15898
+PIP.CLK_CMT_MUX_2TO1_83_CLK_OUT.CLK_CMT_MUX_16_ENC_10_CLK_OUT 15904
+PIP.CLK_CMT_MUX_2TO1_83_CLK_OUT.CLK_HROUTE_1_10 15895
+PIP.CLK_CMT_MUX_2TO1_84_CLK_OUT.CLK_BUFCE_ROW_38_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_84_CLK_OUT.CLK_CMT_MUX_16_ENC_10_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_86_CLK_OUT.CLK_VDISTR_TOP10 15907 15913 15916
+PIP.CLK_CMT_MUX_2TO1_87_CLK_OUT.CLK_CMT_MUX_16_ENC_10_CLK_OUT 15925
+PIP.CLK_CMT_MUX_2TO1_87_CLK_OUT.CLK_VDISTR_BOT10 15827 15912 18657 18658 21539 24446 27324 27326 27431 30312
+PIP.CLK_CMT_MUX_2TO1_89_CLK_OUT.CLK_CMT_MUX_2TO1_92_CLK_OUT 12943 12949 12958
+PIP.CLK_CMT_MUX_2TO1_90_CLK_OUT.CLK_CMT_MUX_16_ENC_11_CLK_OUT 13021
+PIP.CLK_CMT_MUX_2TO1_90_CLK_OUT.CLK_HROUTE_0_11 12949 13018
+PIP.CLK_CMT_MUX_2TO1_91_CLK_OUT.CLK_CMT_MUX_16_ENC_11_CLK_OUT 13024
+PIP.CLK_CMT_MUX_2TO1_91_CLK_OUT.CLK_HROUTE_1_11 13015
+PIP.CLK_CMT_MUX_2TO1_92_CLK_OUT.CLK_BUFCE_ROW_41_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_92_CLK_OUT.CLK_CMT_MUX_16_ENC_11_CLK_OUT
+PIP.CLK_CMT_MUX_2TO1_94_CLK_OUT.CLK_VDISTR_TOP11 13027 13033 13036
+PIP.CLK_CMT_MUX_2TO1_95_CLK_OUT.CLK_CMT_MUX_16_ENC_11_CLK_OUT 13030 13036 13045
+PIP.CLK_CMT_MUX_2TO1_97_CLK_OUT.CLK_CMT_MUX_2TO1_100_CLK_OUT 27318 27324 27333
+PIP.CLK_CMT_MUX_2TO1_98_CLK_OUT.CLK_CMT_MUX_16_ENC_12_CLK_OUT 24539
+PIP.CLK_CMT_MUX_2TO1_98_CLK_OUT.CLK_HROUTE_0_12 24536 30296
+PIP.CLK_CMT_MUX_2TO1_99_CLK_OUT.CLK_CMT_MUX_16_ENC_12_CLK_OUT 24542
+PIP.CLK_CMT_MUX_2TO1_99_CLK_OUT.CLK_HROUTE_1_12 24533
+PIP.CLK_CMT_MUX_2TO1_9_CLK_OUT.CLK_CMT_MUX_2TO1_12_CLK_OUT 18651 18657 18666
+PIP.CLK_CMT_MUX_3TO1_0_CLK_OUT.CLK_INT0
+PIP.CLK_CMT_MUX_3TO1_10_CLK_OUT.CLK_INT6
+PIP.CLK_CMT_MUX_3TO1_11_CLK_OUT.CLK_INT7
+PIP.CLK_CMT_MUX_3TO1_12_CLK_OUT.CLK_INT8
+PIP.CLK_CMT_MUX_3TO1_15_CLK_OUT.CLK_INT9
+PIP.CLK_CMT_MUX_3TO1_16_CLK_OUT.CLK_INT10
+PIP.CLK_CMT_MUX_3TO1_17_CLK_OUT.CLK_INT11
+PIP.CLK_CMT_MUX_3TO1_1_CLK_OUT.CLK_INT1
+PIP.CLK_CMT_MUX_3TO1_20_CLK_OUT.CLK_INT12
+PIP.CLK_CMT_MUX_3TO1_21_CLK_OUT.CLK_INT13
+PIP.CLK_CMT_MUX_3TO1_22_CLK_OUT.CLK_INT14
+PIP.CLK_CMT_MUX_3TO1_25_CLK_OUT.CLK_INT15
+PIP.CLK_CMT_MUX_3TO1_26_CLK_OUT.CLK_INT16
+PIP.CLK_CMT_MUX_3TO1_27_CLK_OUT.CLK_INT17
+PIP.CLK_CMT_MUX_3TO1_2_CLK_OUT.CLK_INT2
+PIP.CLK_CMT_MUX_3TO1_30_CLK_OUT.CLK_INT18
+PIP.CLK_CMT_MUX_3TO1_31_CLK_OUT.CLK_INT19
+PIP.CLK_CMT_MUX_3TO1_32_CLK_OUT.CLK_INT20
+PIP.CLK_CMT_MUX_3TO1_35_CLK_OUT.CLK_INT21
+PIP.CLK_CMT_MUX_3TO1_36_CLK_OUT.CLK_INT22
+PIP.CLK_CMT_MUX_3TO1_37_CLK_OUT.CLK_INT23
+PIP.CLK_CMT_MUX_3TO1_5_CLK_OUT.CLK_INT3
+PIP.CLK_CMT_MUX_3TO1_6_CLK_OUT.CLK_INT4
+PIP.CLK_CMT_MUX_3TO1_7_CLK_OUT.CLK_INT5
+PIP.CLK_HDISTR_0_0.CLK_CMT_MUX_2TO1_1_CLK_OUT
+PIP.CLK_HDISTR_0_1.CLK_CMT_MUX_2TO1_9_CLK_OUT
+PIP.CLK_HDISTR_0_10.CLK_CMT_MUX_2TO1_81_CLK_OUT
+PIP.CLK_HDISTR_0_11.CLK_CMT_MUX_2TO1_89_CLK_OUT
+PIP.CLK_HDISTR_0_12.CLK_CMT_MUX_2TO1_97_CLK_OUT
+PIP.CLK_HDISTR_0_13.CLK_CMT_MUX_2TO1_105_CLK_OUT
+PIP.CLK_HDISTR_0_14.CLK_CMT_MUX_2TO1_113_CLK_OUT
+PIP.CLK_HDISTR_0_15.CLK_CMT_MUX_2TO1_121_CLK_OUT
+PIP.CLK_HDISTR_0_16.CLK_CMT_MUX_2TO1_129_CLK_OUT
+PIP.CLK_HDISTR_0_17.CLK_CMT_MUX_2TO1_137_CLK_OUT
+PIP.CLK_HDISTR_0_18.CLK_CMT_MUX_2TO1_145_CLK_OUT
+PIP.CLK_HDISTR_0_19.CLK_CMT_MUX_2TO1_153_CLK_OUT
+PIP.CLK_HDISTR_0_2.CLK_CMT_MUX_2TO1_17_CLK_OUT
+PIP.CLK_HDISTR_0_20.CLK_CMT_MUX_2TO1_161_CLK_OUT
+PIP.CLK_HDISTR_0_21.CLK_CMT_MUX_2TO1_169_CLK_OUT
+PIP.CLK_HDISTR_0_22.CLK_CMT_MUX_2TO1_177_CLK_OUT
+PIP.CLK_HDISTR_0_23.CLK_CMT_MUX_2TO1_185_CLK_OUT
+PIP.CLK_HDISTR_0_3.CLK_CMT_MUX_2TO1_25_CLK_OUT
+PIP.CLK_HDISTR_0_4.CLK_CMT_MUX_2TO1_33_CLK_OUT
+PIP.CLK_HDISTR_0_5.CLK_CMT_MUX_2TO1_41_CLK_OUT
+PIP.CLK_HDISTR_0_6.CLK_CMT_MUX_2TO1_49_CLK_OUT
+PIP.CLK_HDISTR_0_7.CLK_CMT_MUX_2TO1_57_CLK_OUT
+PIP.CLK_HDISTR_0_8.CLK_CMT_MUX_2TO1_65_CLK_OUT
+PIP.CLK_HDISTR_0_9.CLK_CMT_MUX_2TO1_73_CLK_OUT
+PIP.CLK_HROUTE_0_0.CLK_CMT_MUX_2TO1_3_CLK_OUT 21650 21656
+PIP.CLK_HROUTE_0_1.CLK_CMT_MUX_2TO1_11_CLK_OUT 18770 18776
+PIP.CLK_HROUTE_0_10.CLK_CMT_MUX_2TO1_83_CLK_OUT 15892 15898
+PIP.CLK_HROUTE_0_11.CLK_CMT_MUX_2TO1_91_CLK_OUT 13012 13018
+PIP.CLK_HROUTE_0_12.CLK_CMT_MUX_2TO1_99_CLK_OUT 24530 24536
+PIP.CLK_HROUTE_0_13.CLK_CMT_MUX_2TO1_107_CLK_OUT 27410 27416
+PIP.CLK_HROUTE_0_14.CLK_CMT_MUX_2TO1_115_CLK_OUT 24531 24537
+PIP.CLK_HROUTE_0_15.CLK_CMT_MUX_2TO1_123_CLK_OUT 27411 27417
+PIP.CLK_HROUTE_0_16.CLK_CMT_MUX_2TO1_131_CLK_OUT 24532 24538
+PIP.CLK_HROUTE_0_17.CLK_CMT_MUX_2TO1_139_CLK_OUT 27412 27418
+PIP.CLK_HROUTE_0_18.CLK_CMT_MUX_2TO1_147_CLK_OUT 30290 30296
+PIP.CLK_HROUTE_0_19.CLK_CMT_MUX_2TO1_155_CLK_OUT 33170 33176
+PIP.CLK_HROUTE_0_2.CLK_CMT_MUX_2TO1_19_CLK_OUT 21651 21657
+PIP.CLK_HROUTE_0_20.CLK_CMT_MUX_2TO1_163_CLK_OUT 30291 30297
+PIP.CLK_HROUTE_0_21.CLK_CMT_MUX_2TO1_171_CLK_OUT 33171 33177
+PIP.CLK_HROUTE_0_22.CLK_CMT_MUX_2TO1_179_CLK_OUT 30292 30298
+PIP.CLK_HROUTE_0_23.CLK_CMT_MUX_2TO1_187_CLK_OUT 33172 33178
+PIP.CLK_HROUTE_0_3.CLK_CMT_MUX_2TO1_27_CLK_OUT 18771 18777
+PIP.CLK_HROUTE_0_4.CLK_CMT_MUX_2TO1_35_CLK_OUT 21652 21658
+PIP.CLK_HROUTE_0_5.CLK_CMT_MUX_2TO1_43_CLK_OUT 18772 18778
+PIP.CLK_HROUTE_0_6.CLK_CMT_MUX_2TO1_51_CLK_OUT 15890 15896
+PIP.CLK_HROUTE_0_7.CLK_CMT_MUX_2TO1_59_CLK_OUT 13010 13016
+PIP.CLK_HROUTE_0_8.CLK_CMT_MUX_2TO1_67_CLK_OUT 15891 15897
+PIP.CLK_HROUTE_0_9.CLK_CMT_MUX_2TO1_75_CLK_OUT 13011 13017
+PIP.CLK_HROUTE_1_0.CLK_CMT_MUX_2TO1_2_CLK_OUT 21599 21653
+PIP.CLK_HROUTE_1_1.CLK_CMT_MUX_2TO1_10_CLK_OUT 18719 18773
+PIP.CLK_HROUTE_1_10.CLK_CMT_MUX_2TO1_82_CLK_OUT 15889 15895
+PIP.CLK_HROUTE_1_11.CLK_CMT_MUX_2TO1_90_CLK_OUT 13009 13015
+PIP.CLK_HROUTE_1_12.CLK_CMT_MUX_2TO1_98_CLK_OUT 24479 24533
+PIP.CLK_HROUTE_1_13.CLK_CMT_MUX_2TO1_106_CLK_OUT 27359 27413
+PIP.CLK_HROUTE_1_14.CLK_CMT_MUX_2TO1_114_CLK_OUT 24528 24534
+PIP.CLK_HROUTE_1_15.CLK_CMT_MUX_2TO1_122_CLK_OUT 27408 27414
+PIP.CLK_HROUTE_1_16.CLK_CMT_MUX_2TO1_130_CLK_OUT 24529 24535
+PIP.CLK_HROUTE_1_17.CLK_CMT_MUX_2TO1_138_CLK_OUT 27409 27415
+PIP.CLK_HROUTE_1_18.CLK_CMT_MUX_2TO1_146_CLK_OUT 30239 30293
+PIP.CLK_HROUTE_1_19.CLK_CMT_MUX_2TO1_154_CLK_OUT 33119 33173
+PIP.CLK_HROUTE_1_2.CLK_CMT_MUX_2TO1_18_CLK_OUT 21648 21654
+PIP.CLK_HROUTE_1_20.CLK_CMT_MUX_2TO1_162_CLK_OUT 30288 30294
+PIP.CLK_HROUTE_1_21.CLK_CMT_MUX_2TO1_170_CLK_OUT 33168 33174
+PIP.CLK_HROUTE_1_22.CLK_CMT_MUX_2TO1_178_CLK_OUT 30289 30295
+PIP.CLK_HROUTE_1_23.CLK_CMT_MUX_2TO1_186_CLK_OUT 33169 33175
+PIP.CLK_HROUTE_1_3.CLK_CMT_MUX_2TO1_26_CLK_OUT 18768 18774
+PIP.CLK_HROUTE_1_4.CLK_CMT_MUX_2TO1_34_CLK_OUT 21649 21655
+PIP.CLK_HROUTE_1_5.CLK_CMT_MUX_2TO1_42_CLK_OUT 18769 18775
+PIP.CLK_HROUTE_1_6.CLK_CMT_MUX_2TO1_50_CLK_OUT 15839 15893
+PIP.CLK_HROUTE_1_7.CLK_CMT_MUX_2TO1_58_CLK_OUT 12959 13013
+PIP.CLK_HROUTE_1_8.CLK_CMT_MUX_2TO1_66_CLK_OUT 15888 15894
+PIP.CLK_HROUTE_1_9.CLK_CMT_MUX_2TO1_74_CLK_OUT 13008 13014
+PIP.CLK_VDISTR_BOT0.CLK_CMT_MUX_2TO1_6_CLK_OUT
+PIP.CLK_VDISTR_BOT1.CLK_CMT_MUX_2TO1_14_CLK_OUT
+PIP.CLK_VDISTR_BOT10.CLK_CMT_MUX_2TO1_86_CLK_OUT
+PIP.CLK_VDISTR_BOT11.CLK_CMT_MUX_2TO1_94_CLK_OUT
+PIP.CLK_VDISTR_BOT12.CLK_CMT_MUX_2TO1_102_CLK_OUT
+PIP.CLK_VDISTR_BOT13.CLK_CMT_MUX_2TO1_110_CLK_OUT
+PIP.CLK_VDISTR_BOT14.CLK_CMT_MUX_2TO1_118_CLK_OUT
+PIP.CLK_VDISTR_BOT15.CLK_CMT_MUX_2TO1_126_CLK_OUT
+PIP.CLK_VDISTR_BOT16.CLK_CMT_MUX_2TO1_134_CLK_OUT
+PIP.CLK_VDISTR_BOT17.CLK_CMT_MUX_2TO1_142_CLK_OUT
+PIP.CLK_VDISTR_BOT18.CLK_CMT_MUX_2TO1_150_CLK_OUT
+PIP.CLK_VDISTR_BOT19.CLK_CMT_MUX_2TO1_158_CLK_OUT
+PIP.CLK_VDISTR_BOT2.CLK_CMT_MUX_2TO1_22_CLK_OUT
+PIP.CLK_VDISTR_BOT20.CLK_CMT_MUX_2TO1_166_CLK_OUT
+PIP.CLK_VDISTR_BOT21.CLK_CMT_MUX_2TO1_174_CLK_OUT
+PIP.CLK_VDISTR_BOT22.CLK_CMT_MUX_2TO1_182_CLK_OUT
+PIP.CLK_VDISTR_BOT23.CLK_CMT_MUX_2TO1_190_CLK_OUT
+PIP.CLK_VDISTR_BOT3.CLK_CMT_MUX_2TO1_30_CLK_OUT
+PIP.CLK_VDISTR_BOT4.CLK_CMT_MUX_2TO1_38_CLK_OUT
+PIP.CLK_VDISTR_BOT5.CLK_CMT_MUX_2TO1_46_CLK_OUT
+PIP.CLK_VDISTR_BOT6.CLK_CMT_MUX_2TO1_54_CLK_OUT
+PIP.CLK_VDISTR_BOT7.CLK_CMT_MUX_2TO1_62_CLK_OUT
+PIP.CLK_VDISTR_BOT8.CLK_CMT_MUX_2TO1_70_CLK_OUT
+PIP.CLK_VDISTR_BOT9.CLK_CMT_MUX_2TO1_78_CLK_OUT
+PIP.CLK_VDISTR_TOP0.CLK_CMT_MUX_2TO1_7_CLK_OUT 21668 21674
+PIP.CLK_VDISTR_TOP1.CLK_CMT_MUX_2TO1_15_CLK_OUT 18788 18794
+PIP.CLK_VDISTR_TOP10.CLK_CMT_MUX_2TO1_87_CLK_OUT 15910 15916
+PIP.CLK_VDISTR_TOP11.CLK_CMT_MUX_2TO1_95_CLK_OUT
+PIP.CLK_VDISTR_TOP12.CLK_CMT_MUX_2TO1_103_CLK_OUT 24548 24554
+PIP.CLK_VDISTR_TOP13.CLK_CMT_MUX_2TO1_111_CLK_OUT 27428 27434
+PIP.CLK_VDISTR_TOP14.CLK_CMT_MUX_2TO1_119_CLK_OUT 24549 24555
+PIP.CLK_VDISTR_TOP15.CLK_CMT_MUX_2TO1_127_CLK_OUT 27429 27435
+PIP.CLK_VDISTR_TOP16.CLK_CMT_MUX_2TO1_135_CLK_OUT 24550 24556
+PIP.CLK_VDISTR_TOP17.CLK_CMT_MUX_2TO1_143_CLK_OUT 27430 27436
+PIP.CLK_VDISTR_TOP18.CLK_CMT_MUX_2TO1_151_CLK_OUT 30308 30314
+PIP.CLK_VDISTR_TOP19.CLK_CMT_MUX_2TO1_159_CLK_OUT 33188 33194
+PIP.CLK_VDISTR_TOP2.CLK_CMT_MUX_2TO1_23_CLK_OUT 21669 21675
+PIP.CLK_VDISTR_TOP20.CLK_CMT_MUX_2TO1_167_CLK_OUT 30309 30315
+PIP.CLK_VDISTR_TOP21.CLK_CMT_MUX_2TO1_175_CLK_OUT 33189 33195 33259
+PIP.CLK_VDISTR_TOP22.CLK_CMT_MUX_2TO1_183_CLK_OUT 30310 30316
+PIP.CLK_VDISTR_TOP23.CLK_CMT_MUX_2TO1_191_CLK_OUT 33190 33196
+PIP.CLK_VDISTR_TOP3.CLK_CMT_MUX_2TO1_31_CLK_OUT 18789 18795
+PIP.CLK_VDISTR_TOP4.CLK_CMT_MUX_2TO1_39_CLK_OUT 21670 21676
+PIP.CLK_VDISTR_TOP5.CLK_CMT_MUX_2TO1_47_CLK_OUT 18790 18796
+PIP.CLK_VDISTR_TOP6.CLK_CMT_MUX_2TO1_55_CLK_OUT 15908 15914
+PIP.CLK_VDISTR_TOP7.CLK_CMT_MUX_2TO1_63_CLK_OUT 13028 13034
+PIP.CLK_VDISTR_TOP8.CLK_CMT_MUX_2TO1_71_CLK_OUT 15909 15915
+PIP.CLK_VDISTR_TOP9.CLK_CMT_MUX_2TO1_79_CLK_OUT 13029 13035
+PIP.CMT_TXPLL_WITH_MEM_86_CLKFBIN.CLK_CMT_MUX_24_ENC_57_CLK_OUT
+PIP.CMT_TXPLL_WITH_MEM_86_CLKIN.CLK_CMT_MUX_24_ENC_60_CLK_OUT
diff --git a/DSP.bits b/DSP.bits
new file mode 100644
index 0000000..26d5cb8
--- /dev/null
+++ b/DSP.bits
@@ -0,0 +1,643 @@
+DSP.IN_USE
+DSP48E2_X0Y0.ADREG.0 1315
+DSP48E2_X0Y0.ADREG.1
+DSP48E2_X0Y0.ALUMODEINV[0].0 1219
+DSP48E2_X0Y0.ALUMODEINV[0].1
+DSP48E2_X0Y0.ALUMODEINV[1].0 1215
+DSP48E2_X0Y0.ALUMODEINV[1].1
+DSP48E2_X0Y0.ALUMODEINV[2].0 1218
+DSP48E2_X0Y0.ALUMODEINV[2].1
+DSP48E2_X0Y0.ALUMODEINV[3].0 1214
+DSP48E2_X0Y0.ALUMODEINV[3].1
+DSP48E2_X0Y0.ALUMODEREG.0 977
+DSP48E2_X0Y0.ALUMODEREG.1
+DSP48E2_X0Y0.AMULTSEL.A
+DSP48E2_X0Y0.AMULTSEL.AD 1289
+DSP48E2_X0Y0.AREG.0 1074 1075 1319
+DSP48E2_X0Y0.AREG.1 1314
+DSP48E2_X0Y0.AREG.2 1317
+DSP48E2_X0Y0.AUTORESET_PATDET.NO_RESET
+DSP48E2_X0Y0.AUTORESET_PATDET.RESET_MATCH 1235
+DSP48E2_X0Y0.AUTORESET_PATDET.RESET_NOT_MATCH 1207 1235
+DSP48E2_X0Y0.AUTORESET_PRIORITY.CEP 1244
+DSP48E2_X0Y0.AUTORESET_PRIORITY.RESET
+DSP48E2_X0Y0.BMULTSEL.AD 1287
+DSP48E2_X0Y0.BMULTSEL.B
+DSP48E2_X0Y0.BREG.0 1077 1310 1316
+DSP48E2_X0Y0.BREG.1 1307
+DSP48E2_X0Y0.BREG.2 1069
+DSP48E2_X0Y0.CARRYININV.0 1047
+DSP48E2_X0Y0.CARRYININV.1
+DSP48E2_X0Y0.CARRYINREG.0 1042
+DSP48E2_X0Y0.CARRYINREG.1
+DSP48E2_X0Y0.CARRYINSELREG.0 1200
+DSP48E2_X0Y0.CARRYINSELREG.1
+DSP48E2_X0Y0.CARRYOUT[0].USED 309 555 792
+DSP48E2_X0Y0.CARRYOUT[1].USED 405 651 888
+DSP48E2_X0Y0.CARRYOUT[2].USED 453 699 936
+DSP48E2_X0Y0.CARRYOUT[3].USED 357 603 840
+DSP48E2_X0Y0.CLKINV.0 1000
+DSP48E2_X0Y0.CLKINV.1
+DSP48E2_X0Y0.CREG.0 1049
+DSP48E2_X0Y0.CREG.1
+DSP48E2_X0Y0.DREG.0 1043
+DSP48E2_X0Y0.DREG.1
+DSP48E2_X0Y0.INMODEINV[0].0 1453
+DSP48E2_X0Y0.INMODEINV[0].1
+DSP48E2_X0Y0.INMODEINV[1].0 1682
+DSP48E2_X0Y0.INMODEINV[1].1
+DSP48E2_X0Y0.INMODEINV[2].0 1696
+DSP48E2_X0Y0.INMODEINV[2].1
+DSP48E2_X0Y0.INMODEINV[3].0 1308
+DSP48E2_X0Y0.INMODEINV[3].1
+DSP48E2_X0Y0.INMODEINV[4].0 1060
+DSP48E2_X0Y0.INMODEINV[4].1
+DSP48E2_X0Y0.INMODEREG.0 1059
+DSP48E2_X0Y0.INMODEREG.1
+DSP48E2_X0Y0.IN_USE 1465 1704 1711
+DSP48E2_X0Y0.MASK[0] 1271
+DSP48E2_X0Y0.MASK[10] 1259
+DSP48E2_X0Y0.MASK[11] 1258
+DSP48E2_X0Y0.MASK[12] 1016
+DSP48E2_X0Y0.MASK[13] 1262
+DSP48E2_X0Y0.MASK[14] 1019
+DSP48E2_X0Y0.MASK[15] 1023
+DSP48E2_X0Y0.MASK[16] 1241
+DSP48E2_X0Y0.MASK[17] 1247
+DSP48E2_X0Y0.MASK[18] 1003
+DSP48E2_X0Y0.MASK[19] 1238
+DSP48E2_X0Y0.MASK[1] 1036
+DSP48E2_X0Y0.MASK[20] 992
+DSP48E2_X0Y0.MASK[21] 989
+DSP48E2_X0Y0.MASK[22] 991
+DSP48E2_X0Y0.MASK[23] 986
+DSP48E2_X0Y0.MASK[24] 999
+DSP48E2_X0Y0.MASK[25] 987
+DSP48E2_X0Y0.MASK[26] 982
+DSP48E2_X0Y0.MASK[27] 961
+DSP48E2_X0Y0.MASK[28] 1213
+DSP48E2_X0Y0.MASK[29] 1208
+DSP48E2_X0Y0.MASK[2] 1277
+DSP48E2_X0Y0.MASK[30] 976
+DSP48E2_X0Y0.MASK[31] 1225
+DSP48E2_X0Y0.MASK[32] 1216
+DSP48E2_X0Y0.MASK[33] 1228
+DSP48E2_X0Y0.MASK[34] 980
+DSP48E2_X0Y0.MASK[35] 1211
+DSP48E2_X0Y0.MASK[36] 1224
+DSP48E2_X0Y0.MASK[37] 1220
+DSP48E2_X0Y0.MASK[38] 1212
+DSP48E2_X0Y0.MASK[39] 966
+DSP48E2_X0Y0.MASK[3] 1281
+DSP48E2_X0Y0.MASK[40] 1714
+DSP48E2_X0Y0.MASK[41] 971
+DSP48E2_X0Y0.MASK[42] 1201
+DSP48E2_X0Y0.MASK[43] 1204
+DSP48E2_X0Y0.MASK[44] 1463
+DSP48E2_X0Y0.MASK[45] 962
+DSP48E2_X0Y0.MASK[46] 1480
+DSP48E2_X0Y0.MASK[47] 1478
+DSP48E2_X0Y0.MASK[4] 1282
+DSP48E2_X0Y0.MASK[5] 1014
+DSP48E2_X0Y0.MASK[6] 1268
+DSP48E2_X0Y0.MASK[7] 1037
+DSP48E2_X0Y0.MASK[8] 1266
+DSP48E2_X0Y0.MASK[9] 1255
+DSP48E2_X0Y0.MREG.0 1286
+DSP48E2_X0Y0.MREG.1
+DSP48E2_X0Y0.OPMODEINV[0].0 1470
+DSP48E2_X0Y0.OPMODEINV[0].1
+DSP48E2_X0Y0.OPMODEINV[1].0 1718
+DSP48E2_X0Y0.OPMODEINV[1].1
+DSP48E2_X0Y0.OPMODEINV[2].0 1474
+DSP48E2_X0Y0.OPMODEINV[2].1
+DSP48E2_X0Y0.OPMODEINV[3].0 970
+DSP48E2_X0Y0.OPMODEINV[3].1
+DSP48E2_X0Y0.OPMODEINV[4].0 972
+DSP48E2_X0Y0.OPMODEINV[4].1
+DSP48E2_X0Y0.OPMODEINV[5].0 984
+DSP48E2_X0Y0.OPMODEINV[5].1
+DSP48E2_X0Y0.OPMODEINV[6].0 1001
+DSP48E2_X0Y0.OPMODEINV[6].1
+DSP48E2_X0Y0.OPMODEINV[7].0 1265
+DSP48E2_X0Y0.OPMODEINV[7].1
+DSP48E2_X0Y0.OPMODEINV[8].0 1038
+DSP48E2_X0Y0.OPMODEINV[8].1
+DSP48E2_X0Y0.OPMODEREG.0 1205
+DSP48E2_X0Y0.OPMODEREG.1
+DSP48E2_X0Y0.OVERFLOW.USED 309 555 792
+DSP48E2_X0Y0.PATTERNBDETECT.USED 357 603 840
+DSP48E2_X0Y0.PATTERNDETECT.USED 357 603 840
+DSP48E2_X0Y0.PATTERN[0] 1275
+DSP48E2_X0Y0.PATTERN[10] 1274
+DSP48E2_X0Y0.PATTERN[11] 1021
+DSP48E2_X0Y0.PATTERN[12] 1261
+DSP48E2_X0Y0.PATTERN[13] 1005
+DSP48E2_X0Y0.PATTERN[14] 1260
+DSP48E2_X0Y0.PATTERN[15] 1257
+DSP48E2_X0Y0.PATTERN[16] 1245
+DSP48E2_X0Y0.PATTERN[17] 1240
+DSP48E2_X0Y0.PATTERN[18] 1004
+DSP48E2_X0Y0.PATTERN[19] 1237
+DSP48E2_X0Y0.PATTERN[1] 1267
+DSP48E2_X0Y0.PATTERN[20] 997
+DSP48E2_X0Y0.PATTERN[21] 995
+DSP48E2_X0Y0.PATTERN[22] 1234
+DSP48E2_X0Y0.PATTERN[23] 1222
+DSP48E2_X0Y0.PATTERN[24] 979
+DSP48E2_X0Y0.PATTERN[25] 1230
+DSP48E2_X0Y0.PATTERN[26] 974
+DSP48E2_X0Y0.PATTERN[27] 1217
+DSP48E2_X0Y0.PATTERN[28] 963
+DSP48E2_X0Y0.PATTERN[29] 965
+DSP48E2_X0Y0.PATTERN[2] 1256
+DSP48E2_X0Y0.PATTERN[30] 990
+DSP48E2_X0Y0.PATTERN[31] 968
+DSP48E2_X0Y0.PATTERN[32] 981
+DSP48E2_X0Y0.PATTERN[33] 1223
+DSP48E2_X0Y0.PATTERN[34] 964
+DSP48E2_X0Y0.PATTERN[35] 1210
+DSP48E2_X0Y0.PATTERN[36] 983
+DSP48E2_X0Y0.PATTERN[37] 994
+DSP48E2_X0Y0.PATTERN[38] 978
+DSP48E2_X0Y0.PATTERN[39] 1209
+DSP48E2_X0Y0.PATTERN[3] 1039
+DSP48E2_X0Y0.PATTERN[40] 1472
+DSP48E2_X0Y0.PATTERN[41] 1206
+DSP48E2_X0Y0.PATTERN[42] 1479
+DSP48E2_X0Y0.PATTERN[43] 1719
+DSP48E2_X0Y0.PATTERN[44] 1708
+DSP48E2_X0Y0.PATTERN[45] 1475
+DSP48E2_X0Y0.PATTERN[46] 1709
+DSP48E2_X0Y0.PATTERN[47] 1703
+DSP48E2_X0Y0.PATTERN[4] 1276
+DSP48E2_X0Y0.PATTERN[5] 1273
+DSP48E2_X0Y0.PATTERN[6] 1252
+DSP48E2_X0Y0.PATTERN[7] 1248
+DSP48E2_X0Y0.PATTERN[8] 1033
+DSP48E2_X0Y0.PATTERN[9] 1031
+DSP48E2_X0Y0.PREADDINSEL.A
+DSP48E2_X0Y0.PREADDINSEL.B 1046
+DSP48E2_X0Y0.PREG.0 1294
+DSP48E2_X0Y0.PREG.1
+DSP48E2_X0Y0.P[0].USED 261 507 744
+DSP48E2_X0Y0.P[10].USED 309 555 792
+DSP48E2_X0Y0.P[11].USED 309 555 792
+DSP48E2_X0Y0.P[12].USED 309 555 792
+DSP48E2_X0Y0.P[13].USED 309 555 792
+DSP48E2_X0Y0.P[14].USED 309 555 792
+DSP48E2_X0Y0.P[15].USED 309 555 792
+DSP48E2_X0Y0.P[16].USED 357 603 840
+DSP48E2_X0Y0.P[17].USED 357 603 840
+DSP48E2_X0Y0.P[18].USED 357 603 840
+DSP48E2_X0Y0.P[19].USED 357 603 840
+DSP48E2_X0Y0.P[1].USED 261 507 744
+DSP48E2_X0Y0.P[20].USED 357 603 840
+DSP48E2_X0Y0.P[21].USED 357 603 840
+DSP48E2_X0Y0.P[22].USED 357 603 840
+DSP48E2_X0Y0.P[23].USED 357 603 840
+DSP48E2_X0Y0.P[24].USED 405 651 888
+DSP48E2_X0Y0.P[25].USED 405 651 888
+DSP48E2_X0Y0.P[26].USED 405 651 888
+DSP48E2_X0Y0.P[27].USED 405 651 888
+DSP48E2_X0Y0.P[28].USED 405 651 888
+DSP48E2_X0Y0.P[29].USED 405 651 888
+DSP48E2_X0Y0.P[2].USED 261 507 744
+DSP48E2_X0Y0.P[30].USED 405 651 888
+DSP48E2_X0Y0.P[31].USED 405 651 888
+DSP48E2_X0Y0.P[32].USED 453 699 936
+DSP48E2_X0Y0.P[33].USED 453 699 936
+DSP48E2_X0Y0.P[34].USED 453 699 936
+DSP48E2_X0Y0.P[35].USED 453 699 936
+DSP48E2_X0Y0.P[36].USED 453 699 936
+DSP48E2_X0Y0.P[37].USED 453 699 936
+DSP48E2_X0Y0.P[38].USED 453 699 936
+DSP48E2_X0Y0.P[39].USED 453 699 936
+DSP48E2_X0Y0.P[3].USED 261 507 744
+DSP48E2_X0Y0.P[40].USED 261 507 744
+DSP48E2_X0Y0.P[41].USED 261 507 744
+DSP48E2_X0Y0.P[42].USED 261 507 744
+DSP48E2_X0Y0.P[43].USED 261 507 744
+DSP48E2_X0Y0.P[44].USED 309 555 792
+DSP48E2_X0Y0.P[45].USED 309 555 792
+DSP48E2_X0Y0.P[46].USED 309 555 792
+DSP48E2_X0Y0.P[47].USED 309 555 792
+DSP48E2_X0Y0.P[4].USED 261 507 744
+DSP48E2_X0Y0.P[5].USED 261 507 744
+DSP48E2_X0Y0.P[6].USED 261 507 744
+DSP48E2_X0Y0.P[7].USED 261 309 507 555 744 792
+DSP48E2_X0Y0.P[8].USED 309 555 792
+DSP48E2_X0Y0.P[9].USED 309 555 792
+DSP48E2_X0Y0.RND[0] 1029
+DSP48E2_X0Y0.RND[10] 1263
+DSP48E2_X0Y0.RND[11] 1246
+DSP48E2_X0Y0.RND[12] 1242
+DSP48E2_X0Y0.RND[13] 1249
+DSP48E2_X0Y0.RND[14] 1243
+DSP48E2_X0Y0.RND[15] 1006
+DSP48E2_X0Y0.RND[16] 1236
+DSP48E2_X0Y0.RND[17] 1231
+DSP48E2_X0Y0.RND[18] 1232
+DSP48E2_X0Y0.RND[19] 993
+DSP48E2_X0Y0.RND[1] 1025
+DSP48E2_X0Y0.RND[20] 1221
+DSP48E2_X0Y0.RND[21] 973
+DSP48E2_X0Y0.RND[22] 975
+DSP48E2_X0Y0.RND[23] 1202
+DSP48E2_X0Y0.RND[24] 967
+DSP48E2_X0Y0.RND[25] 1471
+DSP48E2_X0Y0.RND[26] 1715
+DSP48E2_X0Y0.RND[27] 1717
+DSP48E2_X0Y0.RND[28] 1713
+DSP48E2_X0Y0.RND[29] 1710
+DSP48E2_X0Y0.RND[2] 1270
+DSP48E2_X0Y0.RND[30] 1469
+DSP48E2_X0Y0.RND[31] 1712
+DSP48E2_X0Y0.RND[32] 1467
+DSP48E2_X0Y0.RND[33] 1702
+DSP48E2_X0Y0.RND[34] 1458
+DSP48E2_X0Y0.RND[35] 1460
+DSP48E2_X0Y0.RND[36] 1716
+DSP48E2_X0Y0.RND[37] 1697
+DSP48E2_X0Y0.RND[38] 1701
+DSP48E2_X0Y0.RND[39] 1693
+DSP48E2_X0Y0.RND[3] 1030
+DSP48E2_X0Y0.RND[40] 1691
+DSP48E2_X0Y0.RND[41] 1449
+DSP48E2_X0Y0.RND[42] 1457
+DSP48E2_X0Y0.RND[43] 1443
+DSP48E2_X0Y0.RND[44] 1687
+DSP48E2_X0Y0.RND[45] 1455
+DSP48E2_X0Y0.RND[46] 1706
+DSP48E2_X0Y0.RND[47] 1462
+DSP48E2_X0Y0.RND[4] 1020
+DSP48E2_X0Y0.RND[5] 1264
+DSP48E2_X0Y0.RND[6] 1035
+DSP48E2_X0Y0.RND[7] 1026
+DSP48E2_X0Y0.RND[8] 1027
+DSP48E2_X0Y0.RND[9] 1017
+DSP48E2_X0Y0.RSTAINV.0 1050
+DSP48E2_X0Y0.RSTAINV.1
+DSP48E2_X0Y0.RSTALLCARRYININV.0 1058
+DSP48E2_X0Y0.RSTALLCARRYININV.1
+DSP48E2_X0Y0.RSTALUMODEINV.0 1707
+DSP48E2_X0Y0.RSTALUMODEINV.1
+DSP48E2_X0Y0.RSTBINV.0 1226
+DSP48E2_X0Y0.RSTBINV.1
+DSP48E2_X0Y0.RSTCINV.0 1309
+DSP48E2_X0Y0.RSTCINV.1
+DSP48E2_X0Y0.RSTCTRLINV.0 1253
+DSP48E2_X0Y0.RSTCTRLINV.1
+DSP48E2_X0Y0.RSTDINV.0 1305
+DSP48E2_X0Y0.RSTDINV.1
+DSP48E2_X0Y0.RSTINMODEINV.0 1298
+DSP48E2_X0Y0.RSTINMODEINV.1
+DSP48E2_X0Y0.RSTMINV.0 985
+DSP48E2_X0Y0.RSTMINV.1
+DSP48E2_X0Y0.RSTPINV.0 1040
+DSP48E2_X0Y0.RSTPINV.1
+DSP48E2_X0Y0.SEL_MASK.C 1476
+DSP48E2_X0Y0.SEL_MASK.MASK
+DSP48E2_X0Y0.SEL_MASK.ROUNDING_MODE1 1468
+DSP48E2_X0Y0.SEL_MASK.ROUNDING_MODE2 1468 1477
+DSP48E2_X0Y0.SEL_PATTERN.C 1283
+DSP48E2_X0Y0.SEL_PATTERN.PATTERN
+DSP48E2_X0Y0.UNDERFLOW.USED 261 507 744
+DSP48E2_X0Y0.USE_PATTERN_DETECT.NO_PATDET
+DSP48E2_X0Y0.USE_PATTERN_DETECT.PATDET
+DSP48E2_X0Y0.USE_SIMD.FOUR12 1011 1203 1705
+DSP48E2_X0Y0.USE_SIMD.ONE48
+DSP48E2_X0Y0.USE_SIMD.TWO24 1203
+DSP48E2_X0Y0.USE_WIDEXOR.FALSE
+DSP48E2_X0Y0.USE_WIDEXOR.TRUE 1280
+DSP48E2_X0Y0.XOROUT[0].USED 261 507 744
+DSP48E2_X0Y0.XOROUT[1].USED 261 507 744
+DSP48E2_X0Y0.XOROUT[2].USED 261 507 744
+DSP48E2_X0Y0.XOROUT[3].USED 309 555 792
+DSP48E2_X0Y0.XOROUT[4].USED 309 555 792
+DSP48E2_X0Y0.XOROUT[5].USED 309 555 792
+DSP48E2_X0Y0.XOROUT[6].USED 309 555 792
+DSP48E2_X0Y0.XOROUT[7].USED 357 603 840
+DSP48E2_X0Y0.XORSIMD.XOR12 969
+DSP48E2_X0Y0.XORSIMD.XOR24_48_96
+DSP48E2_X0Y1.ADREG.0 1435
+DSP48E2_X0Y1.ADREG.1
+DSP48E2_X0Y1.ALUMODEINV[0].0 1099
+DSP48E2_X0Y1.ALUMODEINV[0].1
+DSP48E2_X0Y1.ALUMODEINV[1].0 1095
+DSP48E2_X0Y1.ALUMODEINV[1].1
+DSP48E2_X0Y1.ALUMODEINV[2].0 1098
+DSP48E2_X0Y1.ALUMODEINV[2].1
+DSP48E2_X0Y1.ALUMODEINV[3].0 1094
+DSP48E2_X0Y1.ALUMODEINV[3].1
+DSP48E2_X0Y1.ALUMODEREG.0 1336
+DSP48E2_X0Y1.ALUMODEREG.1
+DSP48E2_X0Y1.AMULTSEL.A
+DSP48E2_X0Y1.AMULTSEL.AD 1409
+DSP48E2_X0Y1.AREG.0 1194 1195 1439
+DSP48E2_X0Y1.AREG.1 1434
+DSP48E2_X0Y1.AREG.2 1437
+DSP48E2_X0Y1.AUTORESET_PATDET.NO_RESET
+DSP48E2_X0Y1.AUTORESET_PATDET.RESET_MATCH 1355
+DSP48E2_X0Y1.AUTORESET_PATDET.RESET_NOT_MATCH 1087 1355
+DSP48E2_X0Y1.AUTORESET_PRIORITY.CEP 1364
+DSP48E2_X0Y1.AUTORESET_PRIORITY.RESET
+DSP48E2_X0Y1.BMULTSEL.AD 1407
+DSP48E2_X0Y1.BMULTSEL.B
+DSP48E2_X0Y1.BREG.0 1197 1430 1436
+DSP48E2_X0Y1.BREG.1 1427
+DSP48E2_X0Y1.BREG.2 1189
+DSP48E2_X0Y1.CARRYININV.0 1167
+DSP48E2_X0Y1.CARRYININV.1
+DSP48E2_X0Y1.CARRYINREG.0 1162
+DSP48E2_X0Y1.CARRYINREG.1
+DSP48E2_X0Y1.CARRYINSELREG.0 1080
+DSP48E2_X0Y1.CARRYINSELREG.1
+DSP48E2_X0Y1.CARRYOUT[0].USED 357 603 840
+DSP48E2_X0Y1.CARRYOUT[1].USED 357 603 840
+DSP48E2_X0Y1.CARRYOUT[2].USED 453 699 936
+DSP48E2_X0Y1.CARRYOUT[3].USED 357 603 840
+DSP48E2_X0Y1.CLKINV.0 1120
+DSP48E2_X0Y1.CLKINV.1
+DSP48E2_X0Y1.CREG.0 1169
+DSP48E2_X0Y1.CREG.1
+DSP48E2_X0Y1.DREG.0 1163
+DSP48E2_X0Y1.DREG.1
+DSP48E2_X0Y1.INMODEINV[0].0 1573
+DSP48E2_X0Y1.INMODEINV[0].1
+DSP48E2_X0Y1.INMODEINV[1].0 1802
+DSP48E2_X0Y1.INMODEINV[1].1
+DSP48E2_X0Y1.INMODEINV[2].0 1816
+DSP48E2_X0Y1.INMODEINV[2].1
+DSP48E2_X0Y1.INMODEINV[3].0 1428
+DSP48E2_X0Y1.INMODEINV[3].1
+DSP48E2_X0Y1.INMODEINV[4].0 1180
+DSP48E2_X0Y1.INMODEINV[4].1
+DSP48E2_X0Y1.INMODEREG.0 1179
+DSP48E2_X0Y1.INMODEREG.1
+DSP48E2_X0Y1.IN_USE 1585 1824 1831
+DSP48E2_X0Y1.MASK[0] 1391
+DSP48E2_X0Y1.MASK[10] 1379
+DSP48E2_X0Y1.MASK[11] 1378
+DSP48E2_X0Y1.MASK[12] 1136
+DSP48E2_X0Y1.MASK[13] 1382
+DSP48E2_X0Y1.MASK[14] 1139
+DSP48E2_X0Y1.MASK[15] 1143
+DSP48E2_X0Y1.MASK[16] 1361
+DSP48E2_X0Y1.MASK[17] 1367
+DSP48E2_X0Y1.MASK[18] 1123
+DSP48E2_X0Y1.MASK[19] 1358
+DSP48E2_X0Y1.MASK[1] 1156
+DSP48E2_X0Y1.MASK[20] 1112
+DSP48E2_X0Y1.MASK[21] 1109
+DSP48E2_X0Y1.MASK[22] 1111
+DSP48E2_X0Y1.MASK[23] 1106
+DSP48E2_X0Y1.MASK[24] 1119
+DSP48E2_X0Y1.MASK[25] 1107
+DSP48E2_X0Y1.MASK[26] 1341
+DSP48E2_X0Y1.MASK[27] 1320
+DSP48E2_X0Y1.MASK[28] 1093
+DSP48E2_X0Y1.MASK[29] 1088
+DSP48E2_X0Y1.MASK[2] 1397
+DSP48E2_X0Y1.MASK[30] 1335
+DSP48E2_X0Y1.MASK[31] 1345
+DSP48E2_X0Y1.MASK[32] 1096
+DSP48E2_X0Y1.MASK[33] 1348
+DSP48E2_X0Y1.MASK[34] 1339
+DSP48E2_X0Y1.MASK[35] 1091
+DSP48E2_X0Y1.MASK[36] 1104
+DSP48E2_X0Y1.MASK[37] 1100
+DSP48E2_X0Y1.MASK[38] 1092
+DSP48E2_X0Y1.MASK[39] 1325
+DSP48E2_X0Y1.MASK[3] 1401
+DSP48E2_X0Y1.MASK[40] 1834
+DSP48E2_X0Y1.MASK[41] 1330
+DSP48E2_X0Y1.MASK[42] 1081
+DSP48E2_X0Y1.MASK[43] 1084
+DSP48E2_X0Y1.MASK[44] 1583
+DSP48E2_X0Y1.MASK[45] 1321
+DSP48E2_X0Y1.MASK[46] 1600
+DSP48E2_X0Y1.MASK[47] 1598
+DSP48E2_X0Y1.MASK[4] 1402
+DSP48E2_X0Y1.MASK[5] 1134
+DSP48E2_X0Y1.MASK[6] 1388
+DSP48E2_X0Y1.MASK[7] 1157
+DSP48E2_X0Y1.MASK[8] 1386
+DSP48E2_X0Y1.MASK[9] 1375
+DSP48E2_X0Y1.MREG.0 1406
+DSP48E2_X0Y1.MREG.1
+DSP48E2_X0Y1.OPMODEINV[0].0 1590
+DSP48E2_X0Y1.OPMODEINV[0].1
+DSP48E2_X0Y1.OPMODEINV[1].0 1838
+DSP48E2_X0Y1.OPMODEINV[1].1
+DSP48E2_X0Y1.OPMODEINV[2].0 1594
+DSP48E2_X0Y1.OPMODEINV[2].1
+DSP48E2_X0Y1.OPMODEINV[3].0 1329
+DSP48E2_X0Y1.OPMODEINV[3].1
+DSP48E2_X0Y1.OPMODEINV[4].0 1331
+DSP48E2_X0Y1.OPMODEINV[4].1
+DSP48E2_X0Y1.OPMODEINV[5].0 1343
+DSP48E2_X0Y1.OPMODEINV[5].1
+DSP48E2_X0Y1.OPMODEINV[6].0 1121
+DSP48E2_X0Y1.OPMODEINV[6].1
+DSP48E2_X0Y1.OPMODEINV[7].0 1385
+DSP48E2_X0Y1.OPMODEINV[7].1
+DSP48E2_X0Y1.OPMODEINV[8].0 1158
+DSP48E2_X0Y1.OPMODEINV[8].1
+DSP48E2_X0Y1.OPMODEREG.0 1085
+DSP48E2_X0Y1.OPMODEREG.1
+DSP48E2_X0Y1.OVERFLOW.USED 405 651 888
+DSP48E2_X0Y1.PATTERNBDETECT.USED 453 699 936
+DSP48E2_X0Y1.PATTERNDETECT.USED 453 699 936
+DSP48E2_X0Y1.PATTERN[0] 1395
+DSP48E2_X0Y1.PATTERN[10] 1394
+DSP48E2_X0Y1.PATTERN[11] 1141
+DSP48E2_X0Y1.PATTERN[12] 1381
+DSP48E2_X0Y1.PATTERN[13] 1125
+DSP48E2_X0Y1.PATTERN[14] 1380
+DSP48E2_X0Y1.PATTERN[15] 1377
+DSP48E2_X0Y1.PATTERN[16] 1365
+DSP48E2_X0Y1.PATTERN[17] 1360
+DSP48E2_X0Y1.PATTERN[18] 1124
+DSP48E2_X0Y1.PATTERN[19] 1357
+DSP48E2_X0Y1.PATTERN[1] 1387
+DSP48E2_X0Y1.PATTERN[20] 1117
+DSP48E2_X0Y1.PATTERN[21] 1115
+DSP48E2_X0Y1.PATTERN[22] 1354
+DSP48E2_X0Y1.PATTERN[23] 1102
+DSP48E2_X0Y1.PATTERN[24] 1338
+DSP48E2_X0Y1.PATTERN[25] 1350
+DSP48E2_X0Y1.PATTERN[26] 1333
+DSP48E2_X0Y1.PATTERN[27] 1097
+DSP48E2_X0Y1.PATTERN[28] 1322
+DSP48E2_X0Y1.PATTERN[29] 1324
+DSP48E2_X0Y1.PATTERN[2] 1376
+DSP48E2_X0Y1.PATTERN[30] 1110
+DSP48E2_X0Y1.PATTERN[31] 1327
+DSP48E2_X0Y1.PATTERN[32] 1340
+DSP48E2_X0Y1.PATTERN[33] 1103
+DSP48E2_X0Y1.PATTERN[34] 1323
+DSP48E2_X0Y1.PATTERN[35] 1090
+DSP48E2_X0Y1.PATTERN[36] 1342
+DSP48E2_X0Y1.PATTERN[37] 1114
+DSP48E2_X0Y1.PATTERN[38] 1337
+DSP48E2_X0Y1.PATTERN[39] 1089
+DSP48E2_X0Y1.PATTERN[3] 1159
+DSP48E2_X0Y1.PATTERN[40] 1592
+DSP48E2_X0Y1.PATTERN[41] 1086
+DSP48E2_X0Y1.PATTERN[42] 1599
+DSP48E2_X0Y1.PATTERN[43] 1839
+DSP48E2_X0Y1.PATTERN[44] 1828
+DSP48E2_X0Y1.PATTERN[45] 1595
+DSP48E2_X0Y1.PATTERN[46] 1829
+DSP48E2_X0Y1.PATTERN[47] 1823
+DSP48E2_X0Y1.PATTERN[4] 1396
+DSP48E2_X0Y1.PATTERN[5] 1393
+DSP48E2_X0Y1.PATTERN[6] 1372
+DSP48E2_X0Y1.PATTERN[7] 1368
+DSP48E2_X0Y1.PATTERN[8] 1153
+DSP48E2_X0Y1.PATTERN[9] 1151
+DSP48E2_X0Y1.PREADDINSEL.A
+DSP48E2_X0Y1.PREADDINSEL.B 1166
+DSP48E2_X0Y1.PREG.0 1414
+DSP48E2_X0Y1.PREG.1
+DSP48E2_X0Y1.P[0].USED 261 507 744
+DSP48E2_X0Y1.P[10].USED 309 555 792
+DSP48E2_X0Y1.P[11].USED 309 555 792
+DSP48E2_X0Y1.P[12].USED 309 555 792
+DSP48E2_X0Y1.P[13].USED 309 555 792
+DSP48E2_X0Y1.P[14].USED 309 555 792
+DSP48E2_X0Y1.P[15].USED 309 555 792
+DSP48E2_X0Y1.P[16].USED 357 603 840
+DSP48E2_X0Y1.P[17].USED 357 603 840
+DSP48E2_X0Y1.P[18].USED 357 603 840
+DSP48E2_X0Y1.P[19].USED 357 603 840
+DSP48E2_X0Y1.P[1].USED 261 507 744
+DSP48E2_X0Y1.P[20].USED 357 603 840
+DSP48E2_X0Y1.P[21].USED 357 603 840
+DSP48E2_X0Y1.P[22].USED 357 603 840
+DSP48E2_X0Y1.P[23].USED 357 603 840
+DSP48E2_X0Y1.P[24].USED 405 651 888
+DSP48E2_X0Y1.P[25].USED 405 651 888
+DSP48E2_X0Y1.P[26].USED 405 651 888
+DSP48E2_X0Y1.P[27].USED 405 651 888
+DSP48E2_X0Y1.P[28].USED 405 651 888
+DSP48E2_X0Y1.P[29].USED 405 651 888
+DSP48E2_X0Y1.P[2].USED 261 507 744
+DSP48E2_X0Y1.P[30].USED 405 651 888
+DSP48E2_X0Y1.P[31].USED 405 651 888
+DSP48E2_X0Y1.P[32].USED 453 699 936
+DSP48E2_X0Y1.P[33].USED 453 699 936
+DSP48E2_X0Y1.P[34].USED 453 699 936
+DSP48E2_X0Y1.P[35].USED 453 699 936
+DSP48E2_X0Y1.P[36].USED 453 699 936
+DSP48E2_X0Y1.P[37].USED 453 699 936
+DSP48E2_X0Y1.P[38].USED 453 699 936
+DSP48E2_X0Y1.P[39].USED 453 699 936
+DSP48E2_X0Y1.P[3].USED 261 507 744
+DSP48E2_X0Y1.P[40].USED 261 507 744
+DSP48E2_X0Y1.P[41].USED 261 507 744
+DSP48E2_X0Y1.P[42].USED 261 507 744
+DSP48E2_X0Y1.P[43].USED 261 507 744
+DSP48E2_X0Y1.P[44].USED 309 555 792
+DSP48E2_X0Y1.P[45].USED 309 555 792
+DSP48E2_X0Y1.P[46].USED 309 555 792
+DSP48E2_X0Y1.P[47].USED 309 555 792
+DSP48E2_X0Y1.P[4].USED 261 507 744
+DSP48E2_X0Y1.P[5].USED 261 507 744
+DSP48E2_X0Y1.P[6].USED 261 507 744
+DSP48E2_X0Y1.P[7].USED 261 507 744
+DSP48E2_X0Y1.P[8].USED 309 555 792
+DSP48E2_X0Y1.P[9].USED 309 555 792
+DSP48E2_X0Y1.RND[0] 1149
+DSP48E2_X0Y1.RND[10] 1383
+DSP48E2_X0Y1.RND[11] 1366
+DSP48E2_X0Y1.RND[12] 1362
+DSP48E2_X0Y1.RND[13] 1369
+DSP48E2_X0Y1.RND[14] 1363
+DSP48E2_X0Y1.RND[15] 1126
+DSP48E2_X0Y1.RND[16] 1356
+DSP48E2_X0Y1.RND[17] 1351
+DSP48E2_X0Y1.RND[18] 1352
+DSP48E2_X0Y1.RND[19] 1113
+DSP48E2_X0Y1.RND[1] 1145
+DSP48E2_X0Y1.RND[20] 1101
+DSP48E2_X0Y1.RND[21] 1332
+DSP48E2_X0Y1.RND[22] 1334
+DSP48E2_X0Y1.RND[23] 1082
+DSP48E2_X0Y1.RND[24] 1326
+DSP48E2_X0Y1.RND[25] 1591
+DSP48E2_X0Y1.RND[26] 1835
+DSP48E2_X0Y1.RND[27] 1837
+DSP48E2_X0Y1.RND[28] 1833
+DSP48E2_X0Y1.RND[29] 1830
+DSP48E2_X0Y1.RND[2] 1390
+DSP48E2_X0Y1.RND[30] 1589
+DSP48E2_X0Y1.RND[31] 1832
+DSP48E2_X0Y1.RND[32] 1587
+DSP48E2_X0Y1.RND[33] 1822
+DSP48E2_X0Y1.RND[34] 1578
+DSP48E2_X0Y1.RND[35] 1580
+DSP48E2_X0Y1.RND[36] 1836
+DSP48E2_X0Y1.RND[37] 1817
+DSP48E2_X0Y1.RND[38] 1821
+DSP48E2_X0Y1.RND[39] 1813
+DSP48E2_X0Y1.RND[3] 1150
+DSP48E2_X0Y1.RND[40] 1811
+DSP48E2_X0Y1.RND[41] 1569
+DSP48E2_X0Y1.RND[42] 1577
+DSP48E2_X0Y1.RND[43] 1563
+DSP48E2_X0Y1.RND[44] 1807
+DSP48E2_X0Y1.RND[45] 1575
+DSP48E2_X0Y1.RND[46] 1826
+DSP48E2_X0Y1.RND[47] 1582
+DSP48E2_X0Y1.RND[4] 1140
+DSP48E2_X0Y1.RND[5] 1384
+DSP48E2_X0Y1.RND[6] 1155
+DSP48E2_X0Y1.RND[7] 1146
+DSP48E2_X0Y1.RND[8] 1147
+DSP48E2_X0Y1.RND[9] 1137
+DSP48E2_X0Y1.RSTAINV.0 1170
+DSP48E2_X0Y1.RSTAINV.1
+DSP48E2_X0Y1.RSTALLCARRYININV.0 1178
+DSP48E2_X0Y1.RSTALLCARRYININV.1
+DSP48E2_X0Y1.RSTALUMODEINV.0 1827
+DSP48E2_X0Y1.RSTALUMODEINV.1
+DSP48E2_X0Y1.RSTBINV.0 1346
+DSP48E2_X0Y1.RSTBINV.1
+DSP48E2_X0Y1.RSTCINV.0 1429
+DSP48E2_X0Y1.RSTCINV.1
+DSP48E2_X0Y1.RSTCTRLINV.0 1373
+DSP48E2_X0Y1.RSTCTRLINV.1
+DSP48E2_X0Y1.RSTDINV.0 1425
+DSP48E2_X0Y1.RSTDINV.1
+DSP48E2_X0Y1.RSTINMODEINV.0 1418
+DSP48E2_X0Y1.RSTINMODEINV.1
+DSP48E2_X0Y1.RSTMINV.0 1105
+DSP48E2_X0Y1.RSTMINV.1
+DSP48E2_X0Y1.RSTPINV.0 1160
+DSP48E2_X0Y1.RSTPINV.1
+DSP48E2_X0Y1.SEL_MASK.C 1596
+DSP48E2_X0Y1.SEL_MASK.MASK
+DSP48E2_X0Y1.SEL_MASK.ROUNDING_MODE1 1588
+DSP48E2_X0Y1.SEL_MASK.ROUNDING_MODE2 1588 1597
+DSP48E2_X0Y1.SEL_PATTERN.C 1403
+DSP48E2_X0Y1.SEL_PATTERN.PATTERN
+DSP48E2_X0Y1.UNDERFLOW.USED 357 603 840
+DSP48E2_X0Y1.USE_PATTERN_DETECT.NO_PATDET
+DSP48E2_X0Y1.USE_PATTERN_DETECT.PATDET
+DSP48E2_X0Y1.USE_SIMD.FOUR12 1083 1131 1825
+DSP48E2_X0Y1.USE_SIMD.ONE48
+DSP48E2_X0Y1.USE_SIMD.TWO24 1083
+DSP48E2_X0Y1.USE_WIDEXOR.FALSE
+DSP48E2_X0Y1.USE_WIDEXOR.TRUE 1400
+DSP48E2_X0Y1.XOROUT[0].USED 357 603 840
+DSP48E2_X0Y1.XOROUT[1].USED 405 651 888
+DSP48E2_X0Y1.XOROUT[2].USED 405 651 888
+DSP48E2_X0Y1.XOROUT[3].USED 405 651 888
+DSP48E2_X0Y1.XOROUT[4].USED 405 651 888
+DSP48E2_X0Y1.XOROUT[5].USED 453 699 936
+DSP48E2_X0Y1.XOROUT[6].USED 453 699 936
+DSP48E2_X0Y1.XOROUT[7].USED 453 699 936
+DSP48E2_X0Y1.XORSIMD.XOR12 1328
+DSP48E2_X0Y1.XORSIMD.XOR24_48_96
diff --git a/INT.bits b/INT.bits
new file mode 100644
index 0000000..b452131
--- /dev/null
+++ b/INT.bits
@@ -0,0 +1,3730 @@
+PIP.BOUNCE_E_0_FT1.INODE_E_1_FT1 3072
+PIP.BOUNCE_E_0_FT1.INODE_E_5_FT1 3264
+PIP.BOUNCE_E_0_FT1.INODE_E_9_FT1 3457
+PIP.BOUNCE_E_0_FT1.INODE_E_BLN_54_FT1 3456
+PIP.BOUNCE_E_0_FT1.INODE_E_BLN_58_FT1 3168
+PIP.BOUNCE_E_0_FT1.INODE_E_BLN_62_FT1 3552
+PIP.BOUNCE_E_0_FT1.VCC_WIRE
+PIP.BOUNCE_E_13_FT0.INT_NODE_IMUX_18_INT_OUT0 3495
+PIP.BOUNCE_E_13_FT0.INT_NODE_IMUX_20_INT_OUT0 3398
+PIP.BOUNCE_E_13_FT0.INT_NODE_IMUX_23_INT_OUT0 3591
+PIP.BOUNCE_E_13_FT0.INT_NODE_IMUX_25_INT_OUT1 3302
+PIP.BOUNCE_E_13_FT0.INT_NODE_IMUX_27_INT_OUT1 3112
+PIP.BOUNCE_E_13_FT0.INT_NODE_IMUX_29_INT_OUT1 3496
+PIP.BOUNCE_E_13_FT0.VCC_WIRE
+PIP.BOUNCE_E_15_FT0.INODE_E_BLS_1_FT0 3308
+PIP.BOUNCE_E_15_FT0.INODE_E_BLS_5_FT0 3404
+PIP.BOUNCE_E_15_FT0.INODE_E_BLS_9_FT0 3118
+PIP.BOUNCE_E_15_FT0.INT_NODE_IMUX_21_INT_OUT0 3501
+PIP.BOUNCE_E_15_FT0.INT_NODE_IMUX_24_INT_OUT0 3597
+PIP.BOUNCE_E_15_FT0.INT_NODE_IMUX_26_INT_OUT0 3502
+PIP.BOUNCE_E_15_FT0.VCC_WIRE
+PIP.BOUNCE_E_2_FT1.INODE_E_BLN_60_FT1 3174
+PIP.BOUNCE_E_2_FT1.INT_NODE_IMUX_0_INT_OUT0 3558
+PIP.BOUNCE_E_2_FT1.INT_NODE_IMUX_11_INT_OUT0 3462
+PIP.BOUNCE_E_2_FT1.INT_NODE_IMUX_2_INT_OUT1 3078
+PIP.BOUNCE_E_2_FT1.INT_NODE_IMUX_4_INT_OUT1 3270
+PIP.BOUNCE_E_2_FT1.INT_NODE_IMUX_6_INT_OUT1 3463
+PIP.BOUNCE_W_0_FT1.INODE_W_1_FT1 192
+PIP.BOUNCE_W_0_FT1.INODE_W_5_FT1 1
+PIP.BOUNCE_W_0_FT1.INODE_W_9_FT1 384
+PIP.BOUNCE_W_0_FT1.INODE_W_BLN_54_FT1 96
+PIP.BOUNCE_W_0_FT1.INODE_W_BLN_58_FT1 288
+PIP.BOUNCE_W_0_FT1.INODE_W_BLN_62_FT1 0
+PIP.BOUNCE_W_0_FT1.VCC_WIRE
+PIP.BOUNCE_W_13_FT0.INT_NODE_IMUX_50_INT_OUT0 39
+PIP.BOUNCE_W_13_FT0.INT_NODE_IMUX_52_INT_OUT0 518
+PIP.BOUNCE_W_13_FT0.INT_NODE_IMUX_55_INT_OUT0 135
+PIP.BOUNCE_W_13_FT0.INT_NODE_IMUX_57_INT_OUT1 422
+PIP.BOUNCE_W_13_FT0.INT_NODE_IMUX_59_INT_OUT1 40
+PIP.BOUNCE_W_13_FT0.INT_NODE_IMUX_61_INT_OUT1 232
+PIP.BOUNCE_W_13_FT0.VCC_WIRE
+PIP.BOUNCE_W_15_FT0.INODE_W_BLS_1_FT0 428
+PIP.BOUNCE_W_15_FT0.INODE_W_BLS_5_FT0 238
+PIP.BOUNCE_W_15_FT0.INODE_W_BLS_9_FT0 46
+PIP.BOUNCE_W_15_FT0.INT_NODE_IMUX_53_INT_OUT0 141
+PIP.BOUNCE_W_15_FT0.INT_NODE_IMUX_56_INT_OUT0 524
+PIP.BOUNCE_W_15_FT0.INT_NODE_IMUX_58_INT_OUT0 45
+PIP.BOUNCE_W_15_FT0.VCC_WIRE
+PIP.BOUNCE_W_2_FT1.INODE_W_BLN_60_FT1 294
+PIP.BOUNCE_W_2_FT1.INT_NODE_IMUX_32_INT_OUT0 102
+PIP.BOUNCE_W_2_FT1.INT_NODE_IMUX_34_INT_OUT1 198
+PIP.BOUNCE_W_2_FT1.INT_NODE_IMUX_36_INT_OUT1 390
+PIP.BOUNCE_W_2_FT1.INT_NODE_IMUX_38_INT_OUT1 7
+PIP.BOUNCE_W_2_FT1.INT_NODE_IMUX_43_INT_OUT0 6
+PIP.BOUNCE_W_2_FT1.VCC_WIRE
+PIP.BYPASS_E1.INODE_E_BLN_54_FT1 3362
+PIP.BYPASS_E1.INODE_E_BLN_58_FT1 3459
+PIP.BYPASS_E1.INT_NODE_IMUX_11_INT_OUT0 3555
+PIP.BYPASS_E1.INT_NODE_IMUX_1_INT_OUT1 3076
+PIP.BYPASS_E1.INT_NODE_IMUX_30_INT_OUT1 3266
+PIP.BYPASS_E1.INT_NODE_IMUX_3_INT_OUT1 3460
+PIP.BYPASS_E1.VCC_WIRE
+PIP.BYPASS_E10.INT_NODE_IMUX_12_INT_OUT0 3486
+PIP.BYPASS_E10.INT_NODE_IMUX_14_INT_OUT0 3198
+PIP.BYPASS_E10.INT_NODE_IMUX_16_INT_OUT0 3582
+PIP.BYPASS_E10.INT_NODE_IMUX_18_INT_OUT1 3102
+PIP.BYPASS_E10.INT_NODE_IMUX_20_INT_OUT1 3294
+PIP.BYPASS_E10.INT_NODE_IMUX_23_INT_OUT1 3487
+PIP.BYPASS_E11.INT_NODE_IMUX_12_INT_OUT0 3585
+PIP.BYPASS_E11.INT_NODE_IMUX_14_INT_OUT0 3392
+PIP.BYPASS_E11.INT_NODE_IMUX_16_INT_OUT0 3489
+PIP.BYPASS_E11.INT_NODE_IMUX_21_INT_OUT1 3296
+PIP.BYPASS_E11.INT_NODE_IMUX_24_INT_OUT1 3106
+PIP.BYPASS_E11.INT_NODE_IMUX_26_INT_OUT1 3490
+PIP.BYPASS_E12.INT_NODE_IMUX_15_INT_OUT0 3588
+PIP.BYPASS_E12.INT_NODE_IMUX_17_INT_OUT0 3204
+PIP.BYPASS_E12.INT_NODE_IMUX_19_INT_OUT0 3492
+PIP.BYPASS_E12.INT_NODE_IMUX_21_INT_OUT1 3108
+PIP.BYPASS_E12.INT_NODE_IMUX_24_INT_OUT1 3493
+PIP.BYPASS_E12.INT_NODE_IMUX_26_INT_OUT1 3300
+PIP.BYPASS_E12.VCC_WIRE
+PIP.BYPASS_E14.INODE_E_BLS_3_FT0 3498
+PIP.BYPASS_E14.INT_NODE_IMUX_18_INT_OUT0.FWD 3594
+PIP.BYPASS_E14.INT_NODE_IMUX_18_INT_OUT0.REV 3439
+PIP.BYPASS_E14.INT_NODE_IMUX_20_INT_OUT0 3210
+PIP.BYPASS_E14.INT_NODE_IMUX_23_INT_OUT0 3306
+PIP.BYPASS_E14.INT_NODE_IMUX_27_INT_OUT1 3499
+PIP.BYPASS_E14.INT_NODE_IMUX_28_INT_OUT1 3114
+PIP.BYPASS_E14.VCC_WIRE
+PIP.BYPASS_E3.INT_NODE_IMUX_0_INT_OUT0 3561
+PIP.BYPASS_E3.INT_NODE_IMUX_22_INT_OUT0 3368
+PIP.BYPASS_E3.INT_NODE_IMUX_2_INT_OUT1 3272
+PIP.BYPASS_E3.INT_NODE_IMUX_31_INT_OUT0 3465
+PIP.BYPASS_E3.INT_NODE_IMUX_4_INT_OUT1 3466
+PIP.BYPASS_E3.INT_NODE_IMUX_6_INT_OUT1 3082
+PIP.BYPASS_E4.INT_NODE_IMUX_1_INT_OUT0 3180
+PIP.BYPASS_E4.INT_NODE_IMUX_30_INT_OUT0 3468
+PIP.BYPASS_E4.INT_NODE_IMUX_3_INT_OUT0 3564
+PIP.BYPASS_E4.INT_NODE_IMUX_5_INT_OUT1 3084
+PIP.BYPASS_E4.INT_NODE_IMUX_7_INT_OUT1 3276
+PIP.BYPASS_E4.INT_NODE_IMUX_9_INT_OUT1 3469
+PIP.BYPASS_E4.VCC_WIRE
+PIP.BYPASS_E5.INT_NODE_IMUX_10_INT_OUT1 3088
+PIP.BYPASS_E5.INT_NODE_IMUX_13_INT_OUT1 3472
+PIP.BYPASS_E5.INT_NODE_IMUX_1_INT_OUT0 3374
+PIP.BYPASS_E5.INT_NODE_IMUX_30_INT_OUT0 3567
+PIP.BYPASS_E5.INT_NODE_IMUX_3_INT_OUT0 3471
+PIP.BYPASS_E5.INT_NODE_IMUX_8_INT_OUT1 3278
+PIP.BYPASS_E5.VCC_WIRE
+PIP.BYPASS_E6.INT_NODE_IMUX_10_INT_OUT1 3475
+PIP.BYPASS_E6.INT_NODE_IMUX_13_INT_OUT1 3282
+PIP.BYPASS_E6.INT_NODE_IMUX_2_INT_OUT0 3570
+PIP.BYPASS_E6.INT_NODE_IMUX_4_INT_OUT0 3186
+PIP.BYPASS_E6.INT_NODE_IMUX_6_INT_OUT0 3474
+PIP.BYPASS_E6.INT_NODE_IMUX_8_INT_OUT1 3090
+PIP.BYPASS_E6.VCC_WIRE
+PIP.BYPASS_E7.INT_NODE_IMUX_12_INT_OUT1 3284
+PIP.BYPASS_E7.INT_NODE_IMUX_14_INT_OUT1 3094
+PIP.BYPASS_E7.INT_NODE_IMUX_16_INT_OUT1 3478
+PIP.BYPASS_E7.INT_NODE_IMUX_5_INT_OUT0 3477
+PIP.BYPASS_E7.INT_NODE_IMUX_7_INT_OUT0 3380
+PIP.BYPASS_E7.INT_NODE_IMUX_9_INT_OUT0 3573
+PIP.BYPASS_E7.VCC_WIRE
+PIP.BYPASS_E8.INT_NODE_IMUX_15_INT_OUT1 3096
+PIP.BYPASS_E8.INT_NODE_IMUX_17_INT_OUT1 3288
+PIP.BYPASS_E8.INT_NODE_IMUX_19_INT_OUT1 3481
+PIP.BYPASS_E8.INT_NODE_IMUX_5_INT_OUT0.FWD 3576
+PIP.BYPASS_E8.INT_NODE_IMUX_5_INT_OUT0.REV 3421
+PIP.BYPASS_E8.INT_NODE_IMUX_7_INT_OUT0 3192
+PIP.BYPASS_E8.INT_NODE_IMUX_9_INT_OUT0 3480
+PIP.BYPASS_E8.VCC_WIRE
+PIP.BYPASS_E9.INT_NODE_IMUX_10_INT_OUT0 3386
+PIP.BYPASS_E9.INT_NODE_IMUX_13_INT_OUT0 3483
+PIP.BYPASS_E9.INT_NODE_IMUX_15_INT_OUT1 3290
+PIP.BYPASS_E9.INT_NODE_IMUX_17_INT_OUT1 3484
+PIP.BYPASS_E9.INT_NODE_IMUX_19_INT_OUT1 3100
+PIP.BYPASS_E9.INT_NODE_IMUX_8_INT_OUT0 3579
+PIP.BYPASS_E9.VCC_WIRE
+PIP.BYPASS_W1.INODE_W_BLN_54_FT1 482
+PIP.BYPASS_W1.INODE_W_BLN_58_FT1 3
+PIP.BYPASS_W1.INT_NODE_IMUX_33_INT_OUT1 196
+PIP.BYPASS_W1.INT_NODE_IMUX_35_INT_OUT1 4
+PIP.BYPASS_W1.INT_NODE_IMUX_43_INT_OUT0 99
+PIP.BYPASS_W1.INT_NODE_IMUX_62_INT_OUT1 386
+PIP.BYPASS_W1.VCC_WIRE
+PIP.BYPASS_W10.INT_NODE_IMUX_44_INT_OUT0 30
+PIP.BYPASS_W10.INT_NODE_IMUX_46_INT_OUT0 318
+PIP.BYPASS_W10.INT_NODE_IMUX_48_INT_OUT0 126
+PIP.BYPASS_W10.INT_NODE_IMUX_50_INT_OUT1 222
+PIP.BYPASS_W10.INT_NODE_IMUX_52_INT_OUT1 414
+PIP.BYPASS_W10.INT_NODE_IMUX_55_INT_OUT1 31
+PIP.BYPASS_W10.VCC_WIRE
+PIP.BYPASS_W11.INT_NODE_IMUX_44_INT_OUT0 129
+PIP.BYPASS_W11.INT_NODE_IMUX_46_INT_OUT0 512
+PIP.BYPASS_W11.INT_NODE_IMUX_48_INT_OUT0 33
+PIP.BYPASS_W11.INT_NODE_IMUX_53_INT_OUT1 416
+PIP.BYPASS_W11.INT_NODE_IMUX_56_INT_OUT1 226
+PIP.BYPASS_W11.INT_NODE_IMUX_58_INT_OUT1 34
+PIP.BYPASS_W11.VCC_WIRE
+PIP.BYPASS_W12.INT_NODE_IMUX_47_INT_OUT0 132
+PIP.BYPASS_W12.INT_NODE_IMUX_49_INT_OUT0 324
+PIP.BYPASS_W12.INT_NODE_IMUX_51_INT_OUT0 36
+PIP.BYPASS_W12.INT_NODE_IMUX_53_INT_OUT1 228
+PIP.BYPASS_W12.INT_NODE_IMUX_56_INT_OUT1 37
+PIP.BYPASS_W12.INT_NODE_IMUX_58_INT_OUT1 420
+PIP.BYPASS_W12.VCC_WIRE
+PIP.BYPASS_W14.INODE_W_BLS_3_FT0 42
+PIP.BYPASS_W14.INT_NODE_IMUX_50_INT_OUT0.FWD 138
+PIP.BYPASS_W14.INT_NODE_IMUX_50_INT_OUT0.REV 559
+PIP.BYPASS_W14.INT_NODE_IMUX_52_INT_OUT0 330
+PIP.BYPASS_W14.INT_NODE_IMUX_55_INT_OUT0 426
+PIP.BYPASS_W14.INT_NODE_IMUX_59_INT_OUT1 43
+PIP.BYPASS_W14.INT_NODE_IMUX_60_INT_OUT1 234
+PIP.BYPASS_W14.VCC_WIRE
+PIP.BYPASS_W3.INT_NODE_IMUX_32_INT_OUT0 105
+PIP.BYPASS_W3.INT_NODE_IMUX_34_INT_OUT1 392
+PIP.BYPASS_W3.INT_NODE_IMUX_36_INT_OUT1 10
+PIP.BYPASS_W3.INT_NODE_IMUX_38_INT_OUT1 202
+PIP.BYPASS_W3.INT_NODE_IMUX_54_INT_OUT0 488
+PIP.BYPASS_W3.INT_NODE_IMUX_63_INT_OUT0 9
+PIP.BYPASS_W4.INT_NODE_IMUX_33_INT_OUT0 300
+PIP.BYPASS_W4.INT_NODE_IMUX_35_INT_OUT0 108
+PIP.BYPASS_W4.INT_NODE_IMUX_37_INT_OUT1 204
+PIP.BYPASS_W4.INT_NODE_IMUX_39_INT_OUT1 396
+PIP.BYPASS_W4.INT_NODE_IMUX_41_INT_OUT1 13
+PIP.BYPASS_W4.INT_NODE_IMUX_62_INT_OUT0 12
+PIP.BYPASS_W4.VCC_WIRE
+PIP.BYPASS_W5.INT_NODE_IMUX_33_INT_OUT0 494
+PIP.BYPASS_W5.INT_NODE_IMUX_35_INT_OUT0 15
+PIP.BYPASS_W5.INT_NODE_IMUX_40_INT_OUT1 398
+PIP.BYPASS_W5.INT_NODE_IMUX_42_INT_OUT1 208
+PIP.BYPASS_W5.INT_NODE_IMUX_45_INT_OUT1 16
+PIP.BYPASS_W5.INT_NODE_IMUX_62_INT_OUT0 111
+PIP.BYPASS_W5.VCC_WIRE
+PIP.BYPASS_W6.INT_NODE_IMUX_34_INT_OUT0 114
+PIP.BYPASS_W6.INT_NODE_IMUX_36_INT_OUT0 306
+PIP.BYPASS_W6.INT_NODE_IMUX_38_INT_OUT0 18
+PIP.BYPASS_W6.INT_NODE_IMUX_40_INT_OUT1 210
+PIP.BYPASS_W6.INT_NODE_IMUX_42_INT_OUT1 19
+PIP.BYPASS_W6.INT_NODE_IMUX_45_INT_OUT1 402
+PIP.BYPASS_W6.VCC_WIRE
+PIP.BYPASS_W7.INT_NODE_IMUX_37_INT_OUT0 21
+PIP.BYPASS_W7.INT_NODE_IMUX_39_INT_OUT0 500
+PIP.BYPASS_W7.INT_NODE_IMUX_41_INT_OUT0 117
+PIP.BYPASS_W7.INT_NODE_IMUX_44_INT_OUT1 404
+PIP.BYPASS_W7.INT_NODE_IMUX_46_INT_OUT1 214
+PIP.BYPASS_W7.INT_NODE_IMUX_48_INT_OUT1 22
+PIP.BYPASS_W7.VCC_WIRE
+PIP.BYPASS_W8.INT_NODE_IMUX_37_INT_OUT0.FWD 120
+PIP.BYPASS_W8.INT_NODE_IMUX_37_INT_OUT0.REV 541
+PIP.BYPASS_W8.INT_NODE_IMUX_39_INT_OUT0 312
+PIP.BYPASS_W8.INT_NODE_IMUX_41_INT_OUT0 24
+PIP.BYPASS_W8.INT_NODE_IMUX_47_INT_OUT1 216
+PIP.BYPASS_W8.INT_NODE_IMUX_49_INT_OUT1 408
+PIP.BYPASS_W8.INT_NODE_IMUX_51_INT_OUT1 25
+PIP.BYPASS_W8.VCC_WIRE
+PIP.BYPASS_W9.INT_NODE_IMUX_40_INT_OUT0 123
+PIP.BYPASS_W9.INT_NODE_IMUX_42_INT_OUT0 506
+PIP.BYPASS_W9.INT_NODE_IMUX_45_INT_OUT0 27
+PIP.BYPASS_W9.INT_NODE_IMUX_47_INT_OUT1 410
+PIP.BYPASS_W9.INT_NODE_IMUX_49_INT_OUT1 28
+PIP.BYPASS_W9.INT_NODE_IMUX_51_INT_OUT1 220
+PIP.BYPASS_W9.VCC_WIRE
+PIP.CTRL_E0.INT_NODE_GLOBAL_11_INT_OUT1 2163
+PIP.CTRL_E0.INT_NODE_GLOBAL_12_INT_OUT1 2117
+PIP.CTRL_E0.INT_NODE_GLOBAL_13_INT_OUT0 2211
+PIP.CTRL_E0.INT_NODE_GLOBAL_15_INT_OUT0 2259
+PIP.CTRL_E0.INT_NODE_GLOBAL_2_INT_OUT1 1925
+PIP.CTRL_E0.INT_NODE_GLOBAL_4_INT_OUT1 1973
+PIP.CTRL_E0.INT_NODE_GLOBAL_7_INT_OUT0 2021
+PIP.CTRL_E0.INT_NODE_GLOBAL_9_INT_OUT0 2069
+PIP.CTRL_E0.VCC_WIRE
+PIP.CTRL_E1.INT_NODE_GLOBAL_11_INT_OUT1 2215
+PIP.CTRL_E1.INT_NODE_GLOBAL_12_INT_OUT1 2261
+PIP.CTRL_E1.INT_NODE_GLOBAL_13_INT_OUT0 2167
+PIP.CTRL_E1.INT_NODE_GLOBAL_15_INT_OUT0 2119
+PIP.CTRL_E1.INT_NODE_GLOBAL_2_INT_OUT1 2071
+PIP.CTRL_E1.INT_NODE_GLOBAL_4_INT_OUT1 2023
+PIP.CTRL_E1.INT_NODE_GLOBAL_7_INT_OUT0 1975
+PIP.CTRL_E1.INT_NODE_GLOBAL_9_INT_OUT0 1927
+PIP.CTRL_E1.VCC_WIRE
+PIP.CTRL_E2.INT_NODE_GLOBAL_11_INT_OUT0 1983
+PIP.CTRL_E2.INT_NODE_GLOBAL_12_INT_OUT0 1937
+PIP.CTRL_E2.INT_NODE_GLOBAL_14_INT_OUT1 2031
+PIP.CTRL_E2.INT_NODE_GLOBAL_1_INT_OUT1 2079
+PIP.CTRL_E2.INT_NODE_GLOBAL_2_INT_OUT0 2127
+PIP.CTRL_E2.INT_NODE_GLOBAL_4_INT_OUT0 2175
+PIP.CTRL_E2.INT_NODE_GLOBAL_6_INT_OUT1 2223
+PIP.CTRL_E2.INT_NODE_GLOBAL_8_INT_OUT1 2271
+PIP.CTRL_E2.VCC_WIRE
+PIP.CTRL_E3.INT_NODE_GLOBAL_11_INT_OUT0 2035
+PIP.CTRL_E3.INT_NODE_GLOBAL_12_INT_OUT0 2081
+PIP.CTRL_E3.INT_NODE_GLOBAL_14_INT_OUT1 1987
+PIP.CTRL_E3.INT_NODE_GLOBAL_1_INT_OUT1 1939
+PIP.CTRL_E3.INT_NODE_GLOBAL_2_INT_OUT0 2273
+PIP.CTRL_E3.INT_NODE_GLOBAL_4_INT_OUT0 2225
+PIP.CTRL_E3.INT_NODE_GLOBAL_6_INT_OUT1 2177
+PIP.CTRL_E3.INT_NODE_GLOBAL_8_INT_OUT1 2129
+PIP.CTRL_E3.VCC_WIRE
+PIP.CTRL_E4.INT_NODE_GLOBAL_0_INT_OUT1 2189
+PIP.CTRL_E4.INT_NODE_GLOBAL_10_INT_OUT1 2143
+PIP.CTRL_E4.INT_NODE_GLOBAL_14_INT_OUT0 2237
+PIP.CTRL_E4.INT_NODE_GLOBAL_1_INT_OUT0 2285
+PIP.CTRL_E4.INT_NODE_GLOBAL_3_INT_OUT1 1951
+PIP.CTRL_E4.INT_NODE_GLOBAL_5_INT_OUT1 1999
+PIP.CTRL_E4.INT_NODE_GLOBAL_6_INT_OUT0 2047
+PIP.CTRL_E4.INT_NODE_GLOBAL_8_INT_OUT0 2095
+PIP.CTRL_E4.VCC_WIRE
+PIP.CTRL_E5.INT_NODE_GLOBAL_0_INT_OUT1 2241
+PIP.CTRL_E5.INT_NODE_GLOBAL_10_INT_OUT1 2287
+PIP.CTRL_E5.INT_NODE_GLOBAL_14_INT_OUT0 2193
+PIP.CTRL_E5.INT_NODE_GLOBAL_1_INT_OUT0 2145
+PIP.CTRL_E5.INT_NODE_GLOBAL_3_INT_OUT1 2097
+PIP.CTRL_E5.INT_NODE_GLOBAL_5_INT_OUT1 2049
+PIP.CTRL_E5.INT_NODE_GLOBAL_6_INT_OUT0 2001
+PIP.CTRL_E5.INT_NODE_GLOBAL_8_INT_OUT0 1953
+PIP.CTRL_E6.INT_NODE_GLOBAL_0_INT_OUT0 2009
+PIP.CTRL_E6.INT_NODE_GLOBAL_10_INT_OUT0 1963
+PIP.CTRL_E6.INT_NODE_GLOBAL_13_INT_OUT1 2057
+PIP.CTRL_E6.INT_NODE_GLOBAL_15_INT_OUT1 2105
+PIP.CTRL_E6.INT_NODE_GLOBAL_3_INT_OUT0 2153
+PIP.CTRL_E6.INT_NODE_GLOBAL_5_INT_OUT0 2201
+PIP.CTRL_E6.INT_NODE_GLOBAL_7_INT_OUT1 2249
+PIP.CTRL_E6.INT_NODE_GLOBAL_9_INT_OUT1 2297
+PIP.CTRL_E6.VCC_WIRE
+PIP.CTRL_E7.INT_NODE_GLOBAL_0_INT_OUT0 2061
+PIP.CTRL_E7.INT_NODE_GLOBAL_10_INT_OUT0 2107
+PIP.CTRL_E7.INT_NODE_GLOBAL_13_INT_OUT1 2013
+PIP.CTRL_E7.INT_NODE_GLOBAL_15_INT_OUT1 1965
+PIP.CTRL_E7.INT_NODE_GLOBAL_3_INT_OUT0 2299
+PIP.CTRL_E7.INT_NODE_GLOBAL_5_INT_OUT0 2251
+PIP.CTRL_E7.INT_NODE_GLOBAL_7_INT_OUT1 2203
+PIP.CTRL_E7.INT_NODE_GLOBAL_9_INT_OUT1 2155
+PIP.CTRL_E7.VCC_WIRE
+PIP.CTRL_W0.INT_NODE_GLOBAL_11_INT_OUT1 2115
+PIP.CTRL_W0.INT_NODE_GLOBAL_12_INT_OUT1 2165
+PIP.CTRL_W0.INT_NODE_GLOBAL_13_INT_OUT0 1827
+PIP.CTRL_W0.INT_NODE_GLOBAL_15_INT_OUT0 1875
+PIP.CTRL_W0.INT_NODE_GLOBAL_2_INT_OUT1 1732
+PIP.CTRL_W0.INT_NODE_GLOBAL_4_INT_OUT1 1780
+PIP.CTRL_W0.INT_NODE_GLOBAL_7_INT_OUT0 1828
+PIP.CTRL_W0.INT_NODE_GLOBAL_9_INT_OUT0 1876
+PIP.CTRL_W0.VCC_WIRE
+PIP.CTRL_W1.INT_NODE_GLOBAL_11_INT_OUT1 2263
+PIP.CTRL_W1.INT_NODE_GLOBAL_12_INT_OUT1 2213
+PIP.CTRL_W1.INT_NODE_GLOBAL_13_INT_OUT0 1783
+PIP.CTRL_W1.INT_NODE_GLOBAL_15_INT_OUT0 1735
+PIP.CTRL_W1.INT_NODE_GLOBAL_2_INT_OUT1 1878
+PIP.CTRL_W1.INT_NODE_GLOBAL_4_INT_OUT1 1830
+PIP.CTRL_W1.INT_NODE_GLOBAL_7_INT_OUT0 1782
+PIP.CTRL_W1.INT_NODE_GLOBAL_9_INT_OUT0 1734
+PIP.CTRL_W1.VCC_WIRE
+PIP.CTRL_W2.INT_NODE_GLOBAL_11_INT_OUT0 1935
+PIP.CTRL_W2.INT_NODE_GLOBAL_12_INT_OUT0 1985
+PIP.CTRL_W2.INT_NODE_GLOBAL_14_INT_OUT1 1838
+PIP.CTRL_W2.INT_NODE_GLOBAL_1_INT_OUT1 1886
+PIP.CTRL_W2.INT_NODE_GLOBAL_2_INT_OUT0 1743
+PIP.CTRL_W2.INT_NODE_GLOBAL_4_INT_OUT0 1791
+PIP.CTRL_W2.INT_NODE_GLOBAL_6_INT_OUT1 1839
+PIP.CTRL_W2.INT_NODE_GLOBAL_8_INT_OUT1 1887
+PIP.CTRL_W2.VCC_WIRE
+PIP.CTRL_W3.INT_NODE_GLOBAL_11_INT_OUT0 2083
+PIP.CTRL_W3.INT_NODE_GLOBAL_12_INT_OUT0 2033
+PIP.CTRL_W3.INT_NODE_GLOBAL_14_INT_OUT1 1794
+PIP.CTRL_W3.INT_NODE_GLOBAL_1_INT_OUT1 1746
+PIP.CTRL_W3.INT_NODE_GLOBAL_2_INT_OUT0 1889
+PIP.CTRL_W3.INT_NODE_GLOBAL_4_INT_OUT0 1841
+PIP.CTRL_W3.INT_NODE_GLOBAL_6_INT_OUT1 1793
+PIP.CTRL_W3.INT_NODE_GLOBAL_8_INT_OUT1 1745
+PIP.CTRL_W3.VCC_WIRE
+PIP.CTRL_W4.INT_NODE_GLOBAL_0_INT_OUT1 2141
+PIP.CTRL_W4.INT_NODE_GLOBAL_10_INT_OUT1 2191
+PIP.CTRL_W4.INT_NODE_GLOBAL_14_INT_OUT0 1853
+PIP.CTRL_W4.INT_NODE_GLOBAL_1_INT_OUT0 1901
+PIP.CTRL_W4.INT_NODE_GLOBAL_3_INT_OUT1 1758
+PIP.CTRL_W4.INT_NODE_GLOBAL_5_INT_OUT1 1806
+PIP.CTRL_W4.INT_NODE_GLOBAL_6_INT_OUT0 1854
+PIP.CTRL_W4.INT_NODE_GLOBAL_8_INT_OUT0 1902
+PIP.CTRL_W4.VCC_WIRE
+PIP.CTRL_W5.INT_NODE_GLOBAL_0_INT_OUT1 2289
+PIP.CTRL_W5.INT_NODE_GLOBAL_10_INT_OUT1 2239
+PIP.CTRL_W5.INT_NODE_GLOBAL_14_INT_OUT0 1809
+PIP.CTRL_W5.INT_NODE_GLOBAL_1_INT_OUT0 1761
+PIP.CTRL_W5.INT_NODE_GLOBAL_3_INT_OUT1 1904
+PIP.CTRL_W5.INT_NODE_GLOBAL_5_INT_OUT1 1856
+PIP.CTRL_W5.INT_NODE_GLOBAL_6_INT_OUT0 1808
+PIP.CTRL_W5.INT_NODE_GLOBAL_8_INT_OUT0 1760
+PIP.CTRL_W6.INT_NODE_GLOBAL_0_INT_OUT0 1961
+PIP.CTRL_W6.INT_NODE_GLOBAL_10_INT_OUT0 2011
+PIP.CTRL_W6.INT_NODE_GLOBAL_13_INT_OUT1 1864
+PIP.CTRL_W6.INT_NODE_GLOBAL_15_INT_OUT1 1912
+PIP.CTRL_W6.INT_NODE_GLOBAL_3_INT_OUT0 1769
+PIP.CTRL_W6.INT_NODE_GLOBAL_5_INT_OUT0 1817
+PIP.CTRL_W6.INT_NODE_GLOBAL_7_INT_OUT1 1865
+PIP.CTRL_W6.INT_NODE_GLOBAL_9_INT_OUT1 1913
+PIP.CTRL_W6.VCC_WIRE
+PIP.CTRL_W7.INT_NODE_GLOBAL_0_INT_OUT0 2109
+PIP.CTRL_W7.INT_NODE_GLOBAL_10_INT_OUT0 2059
+PIP.CTRL_W7.INT_NODE_GLOBAL_13_INT_OUT1 1820
+PIP.CTRL_W7.INT_NODE_GLOBAL_15_INT_OUT1 1772
+PIP.CTRL_W7.INT_NODE_GLOBAL_3_INT_OUT0 1915
+PIP.CTRL_W7.INT_NODE_GLOBAL_5_INT_OUT0 1867
+PIP.CTRL_W7.INT_NODE_GLOBAL_7_INT_OUT1 1819
+PIP.CTRL_W7.INT_NODE_GLOBAL_9_INT_OUT1 1771
+PIP.CTRL_W7.VCC_WIRE
+PIP.CTRL_W8.INT_NODE_GLOBAL_0_INT_OUT1 2135
+PIP.CTRL_W8.INT_NODE_GLOBAL_12_INT_OUT0 2185
+PIP.CTRL_W8.INT_NODE_GLOBAL_14_INT_OUT0 1847
+PIP.CTRL_W8.INT_NODE_GLOBAL_1_INT_OUT0 1895
+PIP.CTRL_W8.INT_NODE_GLOBAL_3_INT_OUT1 1752
+PIP.CTRL_W8.INT_NODE_GLOBAL_4_INT_OUT0 1800
+PIP.CTRL_W8.INT_NODE_GLOBAL_6_INT_OUT1 1848
+PIP.CTRL_W8.INT_NODE_GLOBAL_8_INT_OUT1 1896
+PIP.CTRL_W9.INT_NODE_GLOBAL_0_INT_OUT1 2183
+PIP.CTRL_W9.INT_NODE_GLOBAL_12_INT_OUT0 2137
+PIP.CTRL_W9.INT_NODE_GLOBAL_14_INT_OUT0 2231
+PIP.CTRL_W9.INT_NODE_GLOBAL_1_INT_OUT0 2279
+PIP.CTRL_W9.INT_NODE_GLOBAL_3_INT_OUT1 1945
+PIP.CTRL_W9.INT_NODE_GLOBAL_4_INT_OUT0 1993
+PIP.CTRL_W9.INT_NODE_GLOBAL_6_INT_OUT1 2041
+PIP.CTRL_W9.INT_NODE_GLOBAL_8_INT_OUT1 2089
+PIP.CTRL_W9.VCC_WIRE
+PIP.EE12_BEG0.EE12_BLN_7_FT1 1728
+PIP.EE12_BEG0.EE12_END0 1633
+PIP.EE12_BEG0.EE4_E_END0 1825
+PIP.EE12_BEG0.EE4_W_END0 1347
+PIP.EE12_BEG0.NN12_END0 1441
+PIP.EE12_BEG0.NN12_END1 1491
+PIP.EE12_BEG0.NN4_E_BLN_7_FT1 1393
+PIP.EE12_BEG0.NN4_W_BLN_7_FT1 1537
+PIP.EE12_BEG1.EE12_END1 1595
+PIP.EE12_BEG1.EE12_END2 1643
+PIP.EE12_BEG1.EE4_E_END1 1739
+PIP.EE12_BEG1.EE4_W_END1 1499
+PIP.EE12_BEG1.SS12_END0 1545
+PIP.EE12_BEG1.SS12_END1 1689
+PIP.EE12_BEG1.SS4_E_END2 1833
+PIP.EE12_BEG1.SS4_W_END2 1403
+PIP.EE12_BEG2.EE12_END1 1405
+PIP.EE12_BEG2.EE12_END2 1549
+PIP.EE12_BEG2.EE4_E_END2 1885
+PIP.EE12_BEG2.EE4_W_END2 1359
+PIP.EE12_BEG2.NN12_END2 1453
+PIP.EE12_BEG2.NN12_END3 1503
+PIP.EE12_BEG2.NN4_E_END1 1788
+PIP.EE12_BEG2.NN4_W_END1 1645
+PIP.EE12_BEG3.EE12_END3 1607
+PIP.EE12_BEG3.EE12_END4 1655
+PIP.EE12_BEG3.EE4_E_END3 1894
+PIP.EE12_BEG3.EE4_W_END3 1511
+PIP.EE12_BEG3.SS12_END2 1557
+PIP.EE12_BEG3.SS12_END3 1701
+PIP.EE12_BEG3.SS4_E_END4 1798
+PIP.EE12_BEG3.SS4_W_END4 1415
+PIP.EE12_BEG4.EE12_END3 1417
+PIP.EE12_BEG4.EE12_END4 1561
+PIP.EE12_BEG4.EE4_E_END4 1371
+PIP.EE12_BEG4.EE4_W_END4 1849
+PIP.EE12_BEG4.NN12_END4 1465
+PIP.EE12_BEG4.NN12_END5 1515
+PIP.EE12_BEG4.NN4_E_END3 1657
+PIP.EE12_BEG4.NN4_W_END3 1753
+PIP.EE12_BEG5.EE12_END5 1619
+PIP.EE12_BEG5.EE12_END6 1667
+PIP.EE12_BEG5.EE4_E_END5 1859
+PIP.EE12_BEG5.EE4_W_END5 1523
+PIP.EE12_BEG5.SS12_END4 1569
+PIP.EE12_BEG5.SS12_END5 1713
+PIP.EE12_BEG5.SS4_E_END6 1762
+PIP.EE12_BEG5.SS4_W_END6 1427
+PIP.EE12_BEG6.EE12_END5 1429
+PIP.EE12_BEG6.EE12_END6 1573
+PIP.EE12_BEG6.EE4_E_END6 1814
+PIP.EE12_BEG6.EE4_W_END6 1383
+PIP.EE12_BEG6.NN12_END6 1477
+PIP.EE12_BEG6.NN12_END7 1527
+PIP.EE12_BEG6.NN4_E_END5 1908
+PIP.EE12_BEG6.NN4_W_END5 1669
+PIP.EE12_BEG7.EE12_BLS_0_FT0 1439
+PIP.EE12_BEG7.EE12_END7 1822
+PIP.EE12_BEG7.EE4_E_END7 1919
+PIP.EE12_BEG7.EE4_W_END7 1535
+PIP.EE12_BEG7.SS12_END6 1581
+PIP.EE12_BEG7.SS12_END7 1725
+PIP.EE12_BEG7.SS4_E_BLS_0_FT0 1679
+PIP.EE12_BEG7.SS4_W_BLS_0_FT0 1631
+PIP.EE1_E_BEG0.INT_NODE_SDQ_11_INT_OUT1 2693
+PIP.EE1_E_BEG0.INT_NODE_SDQ_1_INT_OUT0 2308
+PIP.EE1_E_BEG0.INT_NODE_SDQ_22_INT_OUT1 2789
+PIP.EE1_E_BEG0.INT_NODE_SDQ_2_INT_OUT0 2404
+PIP.EE1_E_BEG1.INT_NODE_SDQ_4_INT_OUT1 2602
+PIP.EE1_E_BEG1.INT_NODE_SDQ_5_INT_OUT1 2891
+PIP.EE1_E_BEG1.INT_NODE_SDQ_7_INT_OUT0 2506
+PIP.EE1_E_BEG1.INT_NODE_SDQ_8_INT_OUT0 2987
+PIP.EE1_E_BEG2.INT_NODE_SDQ_10_INT_OUT1 2801
+PIP.EE1_E_BEG2.INT_NODE_SDQ_14_INT_OUT0 2320
+PIP.EE1_E_BEG2.INT_NODE_SDQ_15_INT_OUT0 2416
+PIP.EE1_E_BEG2.INT_NODE_SDQ_9_INT_OUT1 2705
+PIP.EE1_E_BEG3.INT_NODE_SDQ_17_INT_OUT1 2614
+PIP.EE1_E_BEG3.INT_NODE_SDQ_18_INT_OUT1 2903
+PIP.EE1_E_BEG3.INT_NODE_SDQ_20_INT_OUT0 2518
+PIP.EE1_E_BEG3.INT_NODE_SDQ_21_INT_OUT0 2999
+PIP.EE1_E_BEG4.INT_NODE_SDQ_23_INT_OUT1 2717
+PIP.EE1_E_BEG4.INT_NODE_SDQ_24_INT_OUT1 2813
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+PIP.IMUX_E30.INT_NODE_IMUX_14_INT_OUT1 3575
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+PIP.IMUX_E30.INT_NODE_IMUX_9_INT_OUT0 3574
+PIP.IMUX_E31.INT_NODE_IMUX_14_INT_OUT1 3623
+PIP.IMUX_E31.INT_NODE_IMUX_15_INT_OUT1 3430
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+PIP.IMUX_E32.INT_NODE_IMUX_10_INT_OUT0 3098
+PIP.IMUX_E32.INT_NODE_IMUX_13_INT_OUT0 3482
+PIP.IMUX_E32.INT_NODE_IMUX_15_INT_OUT1 3384
+PIP.IMUX_E32.INT_NODE_IMUX_17_INT_OUT1 3194
+PIP.IMUX_E32.INT_NODE_IMUX_19_INT_OUT1 3578
+PIP.IMUX_E32.INT_NODE_IMUX_8_INT_OUT0 3577
+PIP.IMUX_E33.INT_NODE_IMUX_10_INT_OUT0 3432
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+PIP.IMUX_E34.INT_NODE_IMUX_8_INT_OUT0 3485
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+PIP.IMUX_E35.INT_NODE_IMUX_18_INT_OUT1 3436
+PIP.IMUX_E35.INT_NODE_IMUX_20_INT_OUT1 3340
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+PIP.IMUX_E35.INT_NODE_IMUX_8_INT_OUT0 3533
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+PIP.IMUX_E36.INT_NODE_IMUX_23_INT_OUT1 3200
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+PIP.IMUX_E38.INT_NODE_IMUX_15_INT_OUT0 3586
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+PIP.IMUX_E38.INT_NODE_IMUX_19_INT_OUT0 3491
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+PIP.IMUX_E38.INT_NODE_IMUX_26_INT_OUT1 3587
+PIP.IMUX_E39.INT_NODE_IMUX_15_INT_OUT0 3634
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+PIP.IMUX_E39.INT_NODE_IMUX_26_INT_OUT1 3635
+PIP.IMUX_E4.INT_NODE_IMUX_1_INT_OUT0 3132
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+PIP.IMUX_E4.INT_NODE_IMUX_7_INT_OUT1 3228
+PIP.IMUX_E4.INT_NODE_IMUX_9_INT_OUT1 3517
+PIP.IMUX_E40.INT_NODE_IMUX_15_INT_OUT0 3494
+PIP.IMUX_E40.INT_NODE_IMUX_17_INT_OUT0 3110
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+PIP.IMUX_E40.INT_NODE_IMUX_25_INT_OUT1 3396
+PIP.IMUX_E40.INT_NODE_IMUX_27_INT_OUT1 3206
+PIP.IMUX_E40.INT_NODE_IMUX_29_INT_OUT1 3590
+PIP.IMUX_E41.INT_NODE_IMUX_15_INT_OUT0 3542
+PIP.IMUX_E41.INT_NODE_IMUX_17_INT_OUT0 3444
+PIP.IMUX_E41.INT_NODE_IMUX_19_INT_OUT0 3637
+PIP.IMUX_E41.INT_NODE_IMUX_25_INT_OUT1 3254
+PIP.IMUX_E41.INT_NODE_IMUX_27_INT_OUT1 3158
+PIP.IMUX_E41.INT_NODE_IMUX_29_INT_OUT1 3638
+PIP.IMUX_E42.INODE_E_BLS_3_FT0 3592
+PIP.IMUX_E42.INT_NODE_IMUX_18_INT_OUT0 3497
+PIP.IMUX_E42.INT_NODE_IMUX_20_INT_OUT0 3304
+PIP.IMUX_E42.INT_NODE_IMUX_23_INT_OUT0 3400
+PIP.IMUX_E42.INT_NODE_IMUX_25_INT_OUT1 3208
+PIP.IMUX_E42.INT_NODE_IMUX_27_INT_OUT1 3593
+PIP.IMUX_E43.INODE_E_BLS_3_FT0 3640
+PIP.IMUX_E43.INT_NODE_IMUX_18_INT_OUT0 3545
+PIP.IMUX_E43.INT_NODE_IMUX_20_INT_OUT0 3256
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+PIP.IMUX_E43.INT_NODE_IMUX_27_INT_OUT1 3641
+PIP.IMUX_E43.INT_NODE_IMUX_28_INT_OUT1 3448
+PIP.IMUX_E44.INODE_E_BLS_3_FT0 3212
+PIP.IMUX_E44.INODE_E_BLS_5_FT0 3116
+PIP.IMUX_E44.INT_NODE_IMUX_21_INT_OUT0 3595
+PIP.IMUX_E44.INT_NODE_IMUX_24_INT_OUT0 3500
+PIP.IMUX_E44.INT_NODE_IMUX_26_INT_OUT0 3596
+PIP.IMUX_E44.INT_NODE_IMUX_28_INT_OUT1 3402
+PIP.IMUX_E45.INODE_E_BLS_1_FT0 3260
+PIP.IMUX_E45.INODE_E_BLS_3_FT0 3164
+PIP.IMUX_E45.INODE_E_BLS_5_FT0 3450
+PIP.IMUX_E45.INT_NODE_IMUX_21_INT_OUT0 3643
+PIP.IMUX_E45.INT_NODE_IMUX_24_INT_OUT0 3548
+PIP.IMUX_E45.INT_NODE_IMUX_26_INT_OUT0 3644
+PIP.IMUX_E46.INODE_E_BLS_1_FT0 3214
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+PIP.IMUX_E46.INODE_E_BLS_9_FT0 3406
+PIP.IMUX_E46.INT_NODE_IMUX_21_INT_OUT0 3503
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+PIP.IMUX_E46.INT_NODE_IMUX_26_INT_OUT0 3599
+PIP.IMUX_E46.VCC_WIRE
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+PIP.IMUX_E47.INODE_E_BLS_5_FT0 3262
+PIP.IMUX_E47.INODE_E_BLS_9_FT0 3358
+PIP.IMUX_E47.INT_NODE_IMUX_21_INT_OUT0 3551
+PIP.IMUX_E47.INT_NODE_IMUX_24_INT_OUT0 3646
+PIP.IMUX_E47.INT_NODE_IMUX_26_INT_OUT0 3647
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+PIP.IMUX_E5.INT_NODE_IMUX_13_INT_OUT1 3520
+PIP.IMUX_E5.INT_NODE_IMUX_1_INT_OUT0 3326
+PIP.IMUX_E5.INT_NODE_IMUX_30_INT_OUT0 3615
+PIP.IMUX_E5.INT_NODE_IMUX_3_INT_OUT0 3519
+PIP.IMUX_E5.INT_NODE_IMUX_8_INT_OUT1 3136
+PIP.IMUX_E6.INT_NODE_IMUX_10_INT_OUT1 3523
+PIP.IMUX_E6.INT_NODE_IMUX_12_INT_OUT1 3330
+PIP.IMUX_E6.INT_NODE_IMUX_13_INT_OUT1 3234
+PIP.IMUX_E6.INT_NODE_IMUX_2_INT_OUT0 3618
+PIP.IMUX_E6.INT_NODE_IMUX_4_INT_OUT0 3138
+PIP.IMUX_E6.INT_NODE_IMUX_6_INT_OUT0 3522
+PIP.IMUX_E7.INT_NODE_IMUX_12_INT_OUT1 3142
+PIP.IMUX_E7.INT_NODE_IMUX_14_INT_OUT1 3428
+PIP.IMUX_E7.INT_NODE_IMUX_16_INT_OUT1 3526
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+PIP.IMUX_E7.INT_NODE_IMUX_7_INT_OUT0 3332
+PIP.IMUX_E7.INT_NODE_IMUX_9_INT_OUT0 3621
+PIP.IMUX_E8.INT_NODE_IMUX_15_INT_OUT1 3336
+PIP.IMUX_E8.INT_NODE_IMUX_17_INT_OUT1 3240
+PIP.IMUX_E8.INT_NODE_IMUX_19_INT_OUT1 3529
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+PIP.IMUX_E9.INT_NODE_IMUX_18_INT_OUT1 3148
+PIP.IMUX_E9.INT_NODE_IMUX_19_INT_OUT1 3434
+PIP.IMUX_E9.INT_NODE_IMUX_8_INT_OUT0 3627
+PIP.IMUX_W0.INODE_W_5_FT1 49
+PIP.IMUX_W0.INODE_W_9_FT1 336
+PIP.IMUX_W0.INODE_W_BLN_54_FT1 144
+PIP.IMUX_W0.INODE_W_BLN_58_FT1 240
+PIP.IMUX_W0.INODE_W_BLN_62_FT1 48
+PIP.IMUX_W0.INT_NODE_IMUX_62_INT_OUT1 432
+PIP.IMUX_W0.VCC_WIRE
+PIP.IMUX_W1.INODE_W_BLN_54_FT1 434
+PIP.IMUX_W1.INODE_W_BLN_58_FT1 51
+PIP.IMUX_W1.INT_NODE_IMUX_33_INT_OUT1 530
+PIP.IMUX_W1.INT_NODE_IMUX_35_INT_OUT1 52
+PIP.IMUX_W1.INT_NODE_IMUX_43_INT_OUT0 147
+PIP.IMUX_W1.INT_NODE_IMUX_62_INT_OUT1 244
+PIP.IMUX_W1.VCC_WIRE
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+PIP.IMUX_W10.INT_NODE_IMUX_46_INT_OUT0 270
+PIP.IMUX_W10.INT_NODE_IMUX_48_INT_OUT0 174
+PIP.IMUX_W10.INT_NODE_IMUX_50_INT_OUT1 462
+PIP.IMUX_W10.INT_NODE_IMUX_52_INT_OUT1 366
+PIP.IMUX_W10.INT_NODE_IMUX_55_INT_OUT1 79
+PIP.IMUX_W10.VCC_WIRE
+PIP.IMUX_W11.INT_NODE_IMUX_44_INT_OUT0 177
+PIP.IMUX_W11.INT_NODE_IMUX_46_INT_OUT0 464
+PIP.IMUX_W11.INT_NODE_IMUX_48_INT_OUT0 81
+PIP.IMUX_W11.INT_NODE_IMUX_53_INT_OUT1 274
+PIP.IMUX_W11.INT_NODE_IMUX_56_INT_OUT1 560
+PIP.IMUX_W11.INT_NODE_IMUX_58_INT_OUT1 82
+PIP.IMUX_W11.VCC_WIRE
+PIP.IMUX_W12.INT_NODE_IMUX_47_INT_OUT0 180
+PIP.IMUX_W12.INT_NODE_IMUX_49_INT_OUT0 276
+PIP.IMUX_W12.INT_NODE_IMUX_51_INT_OUT0 84
+PIP.IMUX_W12.INT_NODE_IMUX_56_INT_OUT1 85
+PIP.IMUX_W12.INT_NODE_IMUX_57_INT_OUT1 468
+PIP.IMUX_W12.INT_NODE_IMUX_58_INT_OUT1 372
+PIP.IMUX_W12.VCC_WIRE
+PIP.IMUX_W13.INT_NODE_IMUX_50_INT_OUT0 87
+PIP.IMUX_W13.INT_NODE_IMUX_52_INT_OUT0 470
+PIP.IMUX_W13.INT_NODE_IMUX_55_INT_OUT0 183
+PIP.IMUX_W13.INT_NODE_IMUX_57_INT_OUT1 280
+PIP.IMUX_W13.INT_NODE_IMUX_59_INT_OUT1 88
+PIP.IMUX_W13.INT_NODE_IMUX_61_INT_OUT1 566
+PIP.IMUX_W13.VCC_WIRE
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+PIP.IMUX_W14.INT_NODE_IMUX_50_INT_OUT0 186
+PIP.IMUX_W14.INT_NODE_IMUX_52_INT_OUT0 282
+PIP.IMUX_W14.INT_NODE_IMUX_55_INT_OUT0 378
+PIP.IMUX_W14.INT_NODE_IMUX_59_INT_OUT1 91
+PIP.IMUX_W14.INT_NODE_IMUX_60_INT_OUT1 474
+PIP.IMUX_W14.VCC_WIRE
+PIP.IMUX_W15.INODE_W_BLS_1_FT0 286
+PIP.IMUX_W15.INODE_W_BLS_5_FT0 572
+PIP.IMUX_W15.INODE_W_BLS_9_FT0 94
+PIP.IMUX_W15.INT_NODE_IMUX_53_INT_OUT0 189
+PIP.IMUX_W15.INT_NODE_IMUX_56_INT_OUT0 476
+PIP.IMUX_W15.INT_NODE_IMUX_58_INT_OUT0 93
+PIP.IMUX_W15.VCC_WIRE
+PIP.IMUX_W16.INODE_W_BLN_54_FT1 2
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+PIP.IMUX_W16.INODE_W_BLN_62_FT1 97
+PIP.IMUX_W16.INT_NODE_IMUX_33_INT_OUT1 290
+PIP.IMUX_W16.INT_NODE_IMUX_35_INT_OUT1 98
+PIP.IMUX_W16.INT_NODE_IMUX_62_INT_OUT1 480
+PIP.IMUX_W16.VCC_WIRE
+PIP.IMUX_W17.INODE_W_BLN_54_FT1 50
+PIP.IMUX_W17.INODE_W_BLN_58_FT1 528
+PIP.IMUX_W17.INODE_W_BLN_62_FT1 145
+PIP.IMUX_W17.INT_NODE_IMUX_33_INT_OUT1 242
+PIP.IMUX_W17.INT_NODE_IMUX_35_INT_OUT1 146
+PIP.IMUX_W17.INT_NODE_IMUX_62_INT_OUT1 338
+PIP.IMUX_W17.VCC_WIRE
+PIP.IMUX_W18.INODE_W_BLN_58_FT1 5
+PIP.IMUX_W18.INODE_W_BLN_60_FT1 388
+PIP.IMUX_W18.INT_NODE_IMUX_33_INT_OUT1 101
+PIP.IMUX_W18.INT_NODE_IMUX_35_INT_OUT1 484
+PIP.IMUX_W18.INT_NODE_IMUX_43_INT_OUT0 100
+PIP.IMUX_W18.INT_NODE_IMUX_62_INT_OUT1 292
+PIP.IMUX_W18.VCC_WIRE
+PIP.IMUX_W19.INODE_W_BLN_58_FT1 53
+PIP.IMUX_W19.INODE_W_BLN_60_FT1 340
+PIP.IMUX_W19.INT_NODE_IMUX_33_INT_OUT1 149
+PIP.IMUX_W19.INT_NODE_IMUX_34_INT_OUT1 532
+PIP.IMUX_W19.INT_NODE_IMUX_35_INT_OUT1 436
+PIP.IMUX_W19.INT_NODE_IMUX_43_INT_OUT0 148
+PIP.IMUX_W19.VCC_WIRE
+PIP.IMUX_W2.INODE_W_BLN_60_FT1 246
+PIP.IMUX_W2.INT_NODE_IMUX_32_INT_OUT0 150
+PIP.IMUX_W2.INT_NODE_IMUX_34_INT_OUT1 438
+PIP.IMUX_W2.INT_NODE_IMUX_36_INT_OUT1 342
+PIP.IMUX_W2.INT_NODE_IMUX_38_INT_OUT1 55
+PIP.IMUX_W2.INT_NODE_IMUX_43_INT_OUT0 54
+PIP.IMUX_W2.VCC_WIRE
+PIP.IMUX_W20.INT_NODE_IMUX_32_INT_OUT0 103
+PIP.IMUX_W20.INT_NODE_IMUX_34_INT_OUT1 486
+PIP.IMUX_W20.INT_NODE_IMUX_36_INT_OUT1 296
+PIP.IMUX_W20.INT_NODE_IMUX_38_INT_OUT1 104
+PIP.IMUX_W20.INT_NODE_IMUX_54_INT_OUT0 200
+PIP.IMUX_W20.INT_NODE_IMUX_63_INT_OUT0 8
+PIP.IMUX_W20.VCC_WIRE
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+PIP.IMUX_W21.INT_NODE_IMUX_34_INT_OUT1 344
+PIP.IMUX_W21.INT_NODE_IMUX_36_INT_OUT1 248
+PIP.IMUX_W21.INT_NODE_IMUX_38_INT_OUT1 152
+PIP.IMUX_W21.INT_NODE_IMUX_54_INT_OUT0 534
+PIP.IMUX_W21.INT_NODE_IMUX_63_INT_OUT0 56
+PIP.IMUX_W21.VCC_WIRE
+PIP.IMUX_W22.INT_NODE_IMUX_32_INT_OUT0 11
+PIP.IMUX_W22.INT_NODE_IMUX_37_INT_OUT1 298
+PIP.IMUX_W22.INT_NODE_IMUX_39_INT_OUT1 490
+PIP.IMUX_W22.INT_NODE_IMUX_41_INT_OUT1 107
+PIP.IMUX_W22.INT_NODE_IMUX_54_INT_OUT0 394
+PIP.IMUX_W22.INT_NODE_IMUX_63_INT_OUT0 106
+PIP.IMUX_W22.VCC_WIRE
+PIP.IMUX_W23.INT_NODE_IMUX_32_INT_OUT0 59
+PIP.IMUX_W23.INT_NODE_IMUX_37_INT_OUT1 538
+PIP.IMUX_W23.INT_NODE_IMUX_39_INT_OUT1 442
+PIP.IMUX_W23.INT_NODE_IMUX_41_INT_OUT1 155
+PIP.IMUX_W23.INT_NODE_IMUX_54_INT_OUT0 346
+PIP.IMUX_W23.INT_NODE_IMUX_63_INT_OUT0 154
+PIP.IMUX_W23.VCC_WIRE
+PIP.IMUX_W24.INT_NODE_IMUX_33_INT_OUT0 206
+PIP.IMUX_W24.INT_NODE_IMUX_35_INT_OUT0 109
+PIP.IMUX_W24.INT_NODE_IMUX_37_INT_OUT1 492
+PIP.IMUX_W24.INT_NODE_IMUX_39_INT_OUT1 110
+PIP.IMUX_W24.INT_NODE_IMUX_41_INT_OUT1 302
+PIP.IMUX_W24.INT_NODE_IMUX_62_INT_OUT0 14
+PIP.IMUX_W24.VCC_WIRE
+PIP.IMUX_W25.INT_NODE_IMUX_33_INT_OUT0 540
+PIP.IMUX_W25.INT_NODE_IMUX_35_INT_OUT0 157
+PIP.IMUX_W25.INT_NODE_IMUX_39_INT_OUT1 158
+PIP.IMUX_W25.INT_NODE_IMUX_40_INT_OUT1 350
+PIP.IMUX_W25.INT_NODE_IMUX_41_INT_OUT1 254
+PIP.IMUX_W25.INT_NODE_IMUX_62_INT_OUT0 62
+PIP.IMUX_W25.VCC_WIRE
+PIP.IMUX_W26.INT_NODE_IMUX_34_INT_OUT0 112
+PIP.IMUX_W26.INT_NODE_IMUX_36_INT_OUT0 400
+PIP.IMUX_W26.INT_NODE_IMUX_38_INT_OUT0 17
+PIP.IMUX_W26.INT_NODE_IMUX_40_INT_OUT1 304
+PIP.IMUX_W26.INT_NODE_IMUX_42_INT_OUT1 496
+PIP.IMUX_W26.INT_NODE_IMUX_45_INT_OUT1 113
+PIP.IMUX_W26.VCC_WIRE
+PIP.IMUX_W27.INT_NODE_IMUX_34_INT_OUT0 160
+PIP.IMUX_W27.INT_NODE_IMUX_36_INT_OUT0 352
+PIP.IMUX_W27.INT_NODE_IMUX_38_INT_OUT0 65
+PIP.IMUX_W27.INT_NODE_IMUX_40_INT_OUT1 544
+PIP.IMUX_W27.INT_NODE_IMUX_42_INT_OUT1 448
+PIP.IMUX_W27.INT_NODE_IMUX_45_INT_OUT1 161
+PIP.IMUX_W27.VCC_WIRE
+PIP.IMUX_W28.INT_NODE_IMUX_34_INT_OUT0 20
+PIP.IMUX_W28.INT_NODE_IMUX_36_INT_OUT0 212
+PIP.IMUX_W28.INT_NODE_IMUX_38_INT_OUT0 115
+PIP.IMUX_W28.INT_NODE_IMUX_44_INT_OUT1 498
+PIP.IMUX_W28.INT_NODE_IMUX_46_INT_OUT1 308
+PIP.IMUX_W28.INT_NODE_IMUX_48_INT_OUT1 116
+PIP.IMUX_W28.VCC_WIRE
+PIP.IMUX_W29.INT_NODE_IMUX_34_INT_OUT0 68
+PIP.IMUX_W29.INT_NODE_IMUX_36_INT_OUT0 546
+PIP.IMUX_W29.INT_NODE_IMUX_38_INT_OUT0 163
+PIP.IMUX_W29.INT_NODE_IMUX_44_INT_OUT1 356
+PIP.IMUX_W29.INT_NODE_IMUX_46_INT_OUT1 260
+PIP.IMUX_W29.INT_NODE_IMUX_48_INT_OUT1 164
+PIP.IMUX_W29.VCC_WIRE
+PIP.IMUX_W3.INT_NODE_IMUX_32_INT_OUT0 153
+PIP.IMUX_W3.INT_NODE_IMUX_36_INT_OUT1 58
+PIP.IMUX_W3.INT_NODE_IMUX_37_INT_OUT1 250
+PIP.IMUX_W3.INT_NODE_IMUX_38_INT_OUT1 536
+PIP.IMUX_W3.INT_NODE_IMUX_54_INT_OUT0 440
+PIP.IMUX_W3.INT_NODE_IMUX_63_INT_OUT0 57
+PIP.IMUX_W3.VCC_WIRE
+PIP.IMUX_W30.INT_NODE_IMUX_37_INT_OUT0 23
+PIP.IMUX_W30.INT_NODE_IMUX_39_INT_OUT0 406
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+PIP.WW2_E_BEG5.INT_NODE_SDQ_26_INT_OUT1 2815
+PIP.WW2_E_BEG5.INT_NODE_SDQ_29_INT_OUT0 2334
+PIP.WW2_E_BEG5.INT_NODE_SDQ_30_INT_OUT0 2430
+PIP.WW2_E_BEG6.INT_NODE_SDQ_32_INT_OUT1 2628
+PIP.WW2_E_BEG6.INT_NODE_SDQ_34_INT_OUT1 2917
+PIP.WW2_E_BEG6.INT_NODE_SDQ_36_INT_OUT0 2532
+PIP.WW2_E_BEG6.INT_NODE_SDQ_37_INT_OUT0 3013
+PIP.WW2_E_BEG7.INT_NODE_SDQ_38_INT_OUT1 2731
+PIP.WW2_E_BEG7.INT_NODE_SDQ_39_INT_OUT1 2827
+PIP.WW2_E_BEG7.INT_NODE_SDQ_42_INT_OUT0 2346
+PIP.WW2_E_BEG7.INT_NODE_SDQ_43_INT_OUT0 2442
+PIP.WW2_W_BEG0.INT_NODE_SDQ_70_INT_OUT0 865
+PIP.WW2_W_BEG0.SDQNODE_W_2_FT1 1152
+PIP.WW2_W_BEG0.SDQNODE_W_BLN_93_FT1 1248
+PIP.WW2_W_BEG0.SDQNODE_W_BLN_95_FT1 769
+PIP.WW2_W_BEG1.INT_NODE_SDQ_51_INT_OUT0 966
+PIP.WW2_W_BEG1.INT_NODE_SDQ_52_INT_OUT0 1062
+PIP.WW2_W_BEG1.INT_NODE_SDQ_81_INT_OUT1 583
+PIP.WW2_W_BEG1.INT_NODE_SDQ_92_INT_OUT1 679
+PIP.WW2_W_BEG2.INT_NODE_SDQ_54_INT_OUT1 1260
+PIP.WW2_W_BEG2.INT_NODE_SDQ_55_INT_OUT1 781
+PIP.WW2_W_BEG2.INT_NODE_SDQ_57_INT_OUT0 1164
+PIP.WW2_W_BEG2.INT_NODE_SDQ_58_INT_OUT0 877
+PIP.WW2_W_BEG3.INT_NODE_SDQ_60_INT_OUT1 595
+PIP.WW2_W_BEG3.INT_NODE_SDQ_61_INT_OUT1 691
+PIP.WW2_W_BEG3.INT_NODE_SDQ_64_INT_OUT0 978
+PIP.WW2_W_BEG3.INT_NODE_SDQ_65_INT_OUT0 1074
+PIP.WW2_W_BEG4.INT_NODE_SDQ_67_INT_OUT1 1272
+PIP.WW2_W_BEG4.INT_NODE_SDQ_68_INT_OUT1 793
+PIP.WW2_W_BEG4.INT_NODE_SDQ_71_INT_OUT0 1176
+PIP.WW2_W_BEG4.INT_NODE_SDQ_72_INT_OUT0 889
+PIP.WW2_W_BEG5.INT_NODE_SDQ_73_INT_OUT1 607
+PIP.WW2_W_BEG5.INT_NODE_SDQ_74_INT_OUT1 703
+PIP.WW2_W_BEG5.INT_NODE_SDQ_77_INT_OUT0 990
+PIP.WW2_W_BEG5.INT_NODE_SDQ_78_INT_OUT0 1086
+PIP.WW2_W_BEG6.INT_NODE_SDQ_80_INT_OUT1 1284
+PIP.WW2_W_BEG6.INT_NODE_SDQ_82_INT_OUT1 805
+PIP.WW2_W_BEG6.INT_NODE_SDQ_84_INT_OUT0 1188
+PIP.WW2_W_BEG6.INT_NODE_SDQ_85_INT_OUT0 901
+PIP.WW2_W_BEG7.INT_NODE_SDQ_86_INT_OUT1 619
+PIP.WW2_W_BEG7.INT_NODE_SDQ_87_INT_OUT1 715
+PIP.WW2_W_BEG7.INT_NODE_SDQ_90_INT_OUT0 1002
+PIP.WW2_W_BEG7.INT_NODE_SDQ_91_INT_OUT0 1098
+PIP.WW4_E_BEG0.INT_NODE_SDQ_0_INT_OUT1 2787
+PIP.WW4_E_BEG0.INT_NODE_SDQ_33_INT_OUT0 2306
+PIP.WW4_E_BEG0.INT_NODE_SDQ_44_INT_OUT0 2402
+PIP.WW4_E_BEG0.SDQNODE_E_BLN_95_FT1 2691
+PIP.WW4_E_BEG1.INT_NODE_SDQ_2_INT_OUT1 2600
+PIP.WW4_E_BEG1.INT_NODE_SDQ_3_INT_OUT1 2889
+PIP.WW4_E_BEG1.INT_NODE_SDQ_5_INT_OUT0 2504
+PIP.WW4_E_BEG1.INT_NODE_SDQ_6_INT_OUT0 2985
+PIP.WW4_E_BEG2.INT_NODE_SDQ_12_INT_OUT0 2318
+PIP.WW4_E_BEG2.INT_NODE_SDQ_13_INT_OUT0 2414
+PIP.WW4_E_BEG2.INT_NODE_SDQ_7_INT_OUT1 2703
+PIP.WW4_E_BEG2.INT_NODE_SDQ_8_INT_OUT1 2799
+PIP.WW4_E_BEG3.INT_NODE_SDQ_15_INT_OUT1 2612
+PIP.WW4_E_BEG3.INT_NODE_SDQ_16_INT_OUT1 2901
+PIP.WW4_E_BEG3.INT_NODE_SDQ_18_INT_OUT0 2516
+PIP.WW4_E_BEG3.INT_NODE_SDQ_19_INT_OUT0 2997
+PIP.WW4_E_BEG4.INT_NODE_SDQ_20_INT_OUT1 2715
+PIP.WW4_E_BEG4.INT_NODE_SDQ_21_INT_OUT1 2811
+PIP.WW4_E_BEG4.INT_NODE_SDQ_25_INT_OUT0 2330
+PIP.WW4_E_BEG4.INT_NODE_SDQ_26_INT_OUT0 2426
+PIP.WW4_E_BEG5.INT_NODE_SDQ_28_INT_OUT1 2624
+PIP.WW4_E_BEG5.INT_NODE_SDQ_29_INT_OUT1 2913
+PIP.WW4_E_BEG5.INT_NODE_SDQ_31_INT_OUT0 2528
+PIP.WW4_E_BEG5.INT_NODE_SDQ_32_INT_OUT0 3009
+PIP.WW4_E_BEG6.INT_NODE_SDQ_34_INT_OUT1 2727
+PIP.WW4_E_BEG6.INT_NODE_SDQ_35_INT_OUT1 2823
+PIP.WW4_E_BEG6.INT_NODE_SDQ_38_INT_OUT0 2342
+PIP.WW4_E_BEG6.INT_NODE_SDQ_39_INT_OUT0 2438
+PIP.WW4_E_BEG7.INT_NODE_SDQ_41_INT_OUT1 2636
+PIP.WW4_E_BEG7.INT_NODE_SDQ_42_INT_OUT1 2925
+PIP.WW4_E_BEG7.INT_NODE_SDQ_45_INT_OUT0 2540
+PIP.WW4_E_BEG7.INT_NODE_SDQ_46_INT_OUT0 3021
+PIP.WW4_W_BEG0.INT_NODE_SDQ_48_INT_OUT1 675
+PIP.WW4_W_BEG0.INT_NODE_SDQ_81_INT_OUT0 962
+PIP.WW4_W_BEG0.INT_NODE_SDQ_92_INT_OUT0 1058
+PIP.WW4_W_BEG0.SDQNODE_W_BLN_95_FT1 579
+PIP.WW4_W_BEG1.INT_NODE_SDQ_50_INT_OUT1 1256
+PIP.WW4_W_BEG1.INT_NODE_SDQ_51_INT_OUT1 777
+PIP.WW4_W_BEG1.INT_NODE_SDQ_53_INT_OUT0 1160
+PIP.WW4_W_BEG1.INT_NODE_SDQ_54_INT_OUT0 873
+PIP.WW4_W_BEG2.INT_NODE_SDQ_55_INT_OUT1 591
+PIP.WW4_W_BEG2.INT_NODE_SDQ_56_INT_OUT1 687
+PIP.WW4_W_BEG2.INT_NODE_SDQ_60_INT_OUT0 974
+PIP.WW4_W_BEG2.INT_NODE_SDQ_61_INT_OUT0 1070
+PIP.WW4_W_BEG3.INT_NODE_SDQ_63_INT_OUT1 1268
+PIP.WW4_W_BEG3.INT_NODE_SDQ_64_INT_OUT1 789
+PIP.WW4_W_BEG3.INT_NODE_SDQ_66_INT_OUT0 1172
+PIP.WW4_W_BEG3.INT_NODE_SDQ_67_INT_OUT0 885
+PIP.WW4_W_BEG4.INT_NODE_SDQ_68_INT_OUT1 603
+PIP.WW4_W_BEG4.INT_NODE_SDQ_69_INT_OUT1 699
+PIP.WW4_W_BEG4.INT_NODE_SDQ_73_INT_OUT0 986
+PIP.WW4_W_BEG4.INT_NODE_SDQ_74_INT_OUT0 1082
+PIP.WW4_W_BEG5.INT_NODE_SDQ_76_INT_OUT1 1280
+PIP.WW4_W_BEG5.INT_NODE_SDQ_77_INT_OUT1 801
+PIP.WW4_W_BEG5.INT_NODE_SDQ_79_INT_OUT0 1184
+PIP.WW4_W_BEG5.INT_NODE_SDQ_80_INT_OUT0 897
+PIP.WW4_W_BEG6.INT_NODE_SDQ_82_INT_OUT1 615
+PIP.WW4_W_BEG6.INT_NODE_SDQ_83_INT_OUT1 711
+PIP.WW4_W_BEG6.INT_NODE_SDQ_86_INT_OUT0 998
+PIP.WW4_W_BEG6.INT_NODE_SDQ_87_INT_OUT0 1094
+PIP.WW4_W_BEG7.INT_NODE_SDQ_89_INT_OUT1 1292
+PIP.WW4_W_BEG7.INT_NODE_SDQ_90_INT_OUT1 813
+PIP.WW4_W_BEG7.INT_NODE_SDQ_93_INT_OUT0 1196
+PIP.WW4_W_BEG7.INT_NODE_SDQ_94_INT_OUT0 909
diff --git a/RCLK_BRAM_INTF_L.bits b/RCLK_BRAM_INTF_L.bits
new file mode 100644
index 0000000..99434ec
--- /dev/null
+++ b/RCLK_BRAM_INTF_L.bits
@@ -0,0 +1,138 @@
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_IN.CLK_CMT_DRVR_TRI_ESD_0_CLK_OUT_SCHMITT_B 20
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_IN.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B 29 34
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_OUT.CLK_BUFCE_ROW_FSR_0_CE_PRE_OPTINV 42
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_OUT.CLK_BUFCE_ROW_FSR_0_CLK_IN 41
+PIP.CLK_BUFCE_ROW_FSR_2_CLK_IN.CLK_CMT_DRVR_TRI_ESD_4_CLK_OUT_SCHMITT_B
+PIP.CLK_BUFCE_ROW_FSR_2_CLK_IN.CLK_CMT_DRVR_TRI_ESD_5_CLK_OUT_SCHMITT_B 67 82
+PIP.CLK_BUFCE_ROW_FSR_2_CLK_OUT.CLK_BUFCE_ROW_FSR_2_CE_PRE_OPTINV 90
+PIP.CLK_BUFCE_ROW_FSR_2_CLK_OUT.CLK_BUFCE_ROW_FSR_2_CLK_IN 89
+PIP.CLK_BUFCE_ROW_FSR_4_CLK_IN.CLK_CMT_DRVR_TRI_ESD_8_CLK_OUT_SCHMITT_B 116
+PIP.CLK_BUFCE_ROW_FSR_4_CLK_IN.CLK_CMT_DRVR_TRI_ESD_9_CLK_OUT_SCHMITT_B 115 130
+PIP.CLK_BUFCE_ROW_FSR_4_CLK_OUT.CLK_BUFCE_ROW_FSR_4_CE_PRE_OPTINV 138
+PIP.CLK_BUFCE_ROW_FSR_4_CLK_OUT.CLK_BUFCE_ROW_FSR_4_CLK_IN 137
+PIP.CLK_BUFCE_ROW_FSR_6_CLK_IN.CLK_CMT_DRVR_TRI_ESD_12_CLK_OUT_SCHMITT_B 164
+PIP.CLK_BUFCE_ROW_FSR_6_CLK_IN.CLK_CMT_DRVR_TRI_ESD_13_CLK_OUT_SCHMITT_B 163 178
+PIP.CLK_BUFCE_ROW_FSR_6_CLK_OUT.CLK_BUFCE_ROW_FSR_6_CE_PRE_OPTINV 186
+PIP.CLK_BUFCE_ROW_FSR_6_CLK_OUT.CLK_BUFCE_ROW_FSR_6_CLK_IN 185
+PIP.CLK_CMT_DRVR_TRI_ESD_0_CLK_OUT_SCHMITT_B.CLK_VDISTR_BOT0
+PIP.CLK_CMT_DRVR_TRI_ESD_10_CLK_OUT_SCHMITT_B.CLK_VROUTE_BOT2 114
+PIP.CLK_CMT_DRVR_TRI_ESD_11_CLK_OUT_SCHMITT_B.CLK_VROUTE_TOP2 113
+PIP.CLK_CMT_DRVR_TRI_ESD_12_CLK_OUT_SCHMITT_B.CLK_VDISTR_BOT3
+PIP.CLK_CMT_DRVR_TRI_ESD_13_CLK_OUT_SCHMITT_B.CLK_VDISTR_TOP3
+PIP.CLK_CMT_DRVR_TRI_ESD_14_CLK_OUT_SCHMITT_B.CLK_VROUTE_BOT3 162 174
+PIP.CLK_CMT_DRVR_TRI_ESD_15_CLK_OUT_SCHMITT_B.CLK_VROUTE_TOP3 161
+PIP.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B.CLK_VDISTR_TOP0
+PIP.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B.CLK_VROUTE_BOT0 18
+PIP.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B.CLK_VROUTE_TOP0 17
+PIP.CLK_CMT_DRVR_TRI_ESD_4_CLK_OUT_SCHMITT_B.CLK_VDISTR_BOT1
+PIP.CLK_CMT_DRVR_TRI_ESD_5_CLK_OUT_SCHMITT_B.CLK_VDISTR_TOP1
+PIP.CLK_CMT_DRVR_TRI_ESD_6_CLK_OUT_SCHMITT_B.CLK_VROUTE_BOT1 66
+PIP.CLK_CMT_DRVR_TRI_ESD_7_CLK_OUT_SCHMITT_B.CLK_VROUTE_TOP1 65
+PIP.CLK_CMT_DRVR_TRI_ESD_8_CLK_OUT_SCHMITT_B.CLK_VDISTR_BOT2
+PIP.CLK_CMT_DRVR_TRI_ESD_9_CLK_OUT_SCHMITT_B.CLK_VDISTR_TOP2
+PIP.CLK_CMT_MUX_2TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_2TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B 33
+PIP.CLK_CMT_MUX_2TO1_3_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_6_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_2TO1_3_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_7_CLK_OUT_SCHMITT_B 81
+PIP.CLK_CMT_MUX_2TO1_5_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_10_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_2TO1_5_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_11_CLK_OUT_SCHMITT_B 129
+PIP.CLK_CMT_MUX_3TO1_0_CLK_OUT.CLK_HROUTE_CORE_OPT0 24 31
+PIP.CLK_CMT_MUX_3TO1_10_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_11_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_10_CLK_OUT.CLK_HROUTE_CORE_OPT2 123
+PIP.CLK_CMT_MUX_3TO1_11_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_10_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_11_CLK_OUT.CLK_HROUTE_CORE_OPT2 121
+PIP.CLK_CMT_MUX_3TO1_12_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_15_CLK_OUT_SCHMITT_B 164 168 176
+PIP.CLK_CMT_MUX_3TO1_13_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_14_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_14_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_15_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_14_CLK_OUT.CLK_HROUTE_CORE_OPT3 171
+PIP.CLK_CMT_MUX_3TO1_1_CLK_OUT.CLK_HROUTE_CORE_OPT0
+PIP.CLK_CMT_MUX_3TO1_2_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_2_CLK_OUT.CLK_HROUTE_CORE_OPT0 27
+PIP.CLK_CMT_MUX_3TO1_3_CLK_OUT.CLK_HROUTE_CORE_OPT0 17 21 25
+PIP.CLK_CMT_MUX_3TO1_4_CLK_OUT.CLK_HROUTE_CORE_OPT1 79
+PIP.CLK_CMT_MUX_3TO1_5_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_6_CLK_OUT_SCHMITT_B 78
+PIP.CLK_CMT_MUX_3TO1_5_CLK_OUT.CLK_HROUTE_CORE_OPT1 77
+PIP.CLK_CMT_MUX_3TO1_6_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_7_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_6_CLK_OUT.CLK_HROUTE_CORE_OPT1 75
+PIP.CLK_CMT_MUX_3TO1_7_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_6_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_7_CLK_OUT.CLK_HROUTE_CORE_OPT1 73
+PIP.CLK_CMT_MUX_3TO1_8_CLK_OUT.CLK_HROUTE_CORE_OPT2 116 120 127
+PIP.CLK_CMT_MUX_3TO1_9_CLK_OUT.CLK_HROUTE_CORE_OPT2 125
+PIP.CLK_HROUTE_CORE_OPT0.CLK_CMT_MUX_2TO1_1_CLK_OUT 46
+PIP.CLK_HROUTE_CORE_OPT1.CLK_CMT_MUX_2TO1_3_CLK_OUT 94
+PIP.CLK_HROUTE_CORE_OPT2.CLK_CMT_MUX_2TO1_5_CLK_OUT 142
+PIP.CLK_TEST_BUF_SITE_1_CLK_IN.CLK_BUFCE_ROW_FSR_0_CLK_OUT 47
+PIP.CLK_TEST_BUF_SITE_3_CLK_IN.CLK_BUFCE_ROW_FSR_2_CLK_OUT 95
+PIP.CLK_TEST_BUF_SITE_5_CLK_IN.CLK_BUFCE_ROW_FSR_4_CLK_OUT 143
+PIP.CLK_TEST_BUF_SITE_7_CLK_IN.CLK_BUFCE_ROW_FSR_6_CLK_OUT 191
+PIP.CLK_VDISTR_BOT0.CLK_CMT_MUX_3TO1_0_CLK_OUT
+PIP.CLK_VDISTR_BOT1.CLK_CMT_MUX_3TO1_4_CLK_OUT 68 72
+PIP.CLK_VDISTR_BOT2.CLK_CMT_MUX_3TO1_8_CLK_OUT
+PIP.CLK_VDISTR_BOT3.CLK_CMT_MUX_3TO1_12_CLK_OUT
+PIP.CLK_VDISTR_TOP0.CLK_CMT_MUX_3TO1_1_CLK_OUT 19 23
+PIP.CLK_VDISTR_TOP1.CLK_CMT_MUX_3TO1_5_CLK_OUT 71
+PIP.CLK_VDISTR_TOP2.CLK_CMT_MUX_3TO1_9_CLK_OUT 115 119
+PIP.CLK_VDISTR_TOP3.CLK_CMT_MUX_3TO1_13_CLK_OUT 163 167
+PIP.CLK_VROUTE_BOT0.CLK_CMT_MUX_3TO1_2_CLK_OUT 18 22
+PIP.CLK_VROUTE_BOT1.CLK_CMT_MUX_3TO1_6_CLK_OUT 66 70
+PIP.CLK_VROUTE_BOT2.CLK_CMT_MUX_3TO1_10_CLK_OUT 114 118
+PIP.CLK_VROUTE_BOT3.CLK_CMT_MUX_3TO1_14_CLK_OUT 162 166
+PIP.CLK_VROUTE_TOP0.CLK_CMT_MUX_3TO1_3_CLK_OUT
+PIP.CLK_VROUTE_TOP1.CLK_CMT_MUX_3TO1_7_CLK_OUT 65 69
+PIP.CLK_VROUTE_TOP2.CLK_CMT_MUX_3TO1_11_CLK_OUT 113 117
+WIRE.CLK_HDISTR_FT0_0.USED
+WIRE.CLK_HDISTR_FT0_1.USED
+WIRE.CLK_HDISTR_FT0_10.USED
+WIRE.CLK_HDISTR_FT0_11.USED
+WIRE.CLK_HDISTR_FT0_12.USED
+WIRE.CLK_HDISTR_FT0_13.USED
+WIRE.CLK_HDISTR_FT0_14.USED
+WIRE.CLK_HDISTR_FT0_15.USED
+WIRE.CLK_HDISTR_FT0_16.USED
+WIRE.CLK_HDISTR_FT0_17.USED
+WIRE.CLK_HDISTR_FT0_18.USED
+WIRE.CLK_HDISTR_FT0_19.USED
+WIRE.CLK_HDISTR_FT0_2.USED
+WIRE.CLK_HDISTR_FT0_20.USED
+WIRE.CLK_HDISTR_FT0_21.USED
+WIRE.CLK_HDISTR_FT0_22.USED
+WIRE.CLK_HDISTR_FT0_23.USED
+WIRE.CLK_HDISTR_FT0_3.USED
+WIRE.CLK_HDISTR_FT0_4.USED
+WIRE.CLK_HDISTR_FT0_5.USED
+WIRE.CLK_HDISTR_FT0_6.USED
+WIRE.CLK_HDISTR_FT0_7.USED
+WIRE.CLK_HDISTR_FT0_8.USED
+WIRE.CLK_HDISTR_FT0_9.USED
+WIRE.CLK_HROUTE_CORE_OPT0.USED 44
+WIRE.CLK_HROUTE_CORE_OPT1.USED 92
+WIRE.CLK_HROUTE_CORE_OPT2.USED 140
+WIRE.CLK_HROUTE_CORE_OPT3.USED 188
+WIRE.CLK_HROUTE_FT0_0.USED
+WIRE.CLK_HROUTE_FT0_1.USED
+WIRE.CLK_HROUTE_FT0_10.USED
+WIRE.CLK_HROUTE_FT0_11.USED
+WIRE.CLK_HROUTE_FT0_12.USED
+WIRE.CLK_HROUTE_FT0_13.USED
+WIRE.CLK_HROUTE_FT0_14.USED
+WIRE.CLK_HROUTE_FT0_15.USED
+WIRE.CLK_HROUTE_FT0_16.USED
+WIRE.CLK_HROUTE_FT0_17.USED
+WIRE.CLK_HROUTE_FT0_18.USED
+WIRE.CLK_HROUTE_FT0_19.USED
+WIRE.CLK_HROUTE_FT0_2.USED
+WIRE.CLK_HROUTE_FT0_20.USED
+WIRE.CLK_HROUTE_FT0_21.USED
+WIRE.CLK_HROUTE_FT0_22.USED
+WIRE.CLK_HROUTE_FT0_23.USED
+WIRE.CLK_HROUTE_FT0_3.USED
+WIRE.CLK_HROUTE_FT0_4.USED
+WIRE.CLK_HROUTE_FT0_5.USED
+WIRE.CLK_HROUTE_FT0_6.USED
+WIRE.CLK_HROUTE_FT0_7.USED
+WIRE.CLK_HROUTE_FT0_8.USED
+WIRE.CLK_HROUTE_FT0_9.USED
+WIRE.CLK_TEST_BUF_SITE_1_CLK_IN.USED 45
+WIRE.CLK_TEST_BUF_SITE_3_CLK_IN.USED 93
+WIRE.CLK_TEST_BUF_SITE_5_CLK_IN.USED 141
+WIRE.CLK_TEST_BUF_SITE_7_CLK_IN.USED 189
diff --git a/RCLK_BRAM_INTF_TD_L.bits b/RCLK_BRAM_INTF_TD_L.bits
new file mode 100644
index 0000000..900f2ac
--- /dev/null
+++ b/RCLK_BRAM_INTF_TD_L.bits
@@ -0,0 +1,110 @@
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_IN.CLK_CMT_DRVR_TRI_ESD_0_CLK_OUT_SCHMITT_B
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_IN.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B 34
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_OUT.CLK_BUFCE_ROW_FSR_0_CE_PRE_OPTINV 42
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_OUT.CLK_BUFCE_ROW_FSR_0_CLK_IN 41
+PIP.CLK_BUFCE_ROW_FSR_2_CLK_IN.CLK_CMT_DRVR_TRI_ESD_4_CLK_OUT_SCHMITT_B
+PIP.CLK_BUFCE_ROW_FSR_2_CLK_IN.CLK_CMT_DRVR_TRI_ESD_5_CLK_OUT_SCHMITT_B 82
+PIP.CLK_BUFCE_ROW_FSR_2_CLK_OUT.CLK_BUFCE_ROW_FSR_2_CE_PRE_OPTINV 90
+PIP.CLK_BUFCE_ROW_FSR_2_CLK_OUT.CLK_BUFCE_ROW_FSR_2_CLK_IN 89
+PIP.CLK_BUFCE_ROW_FSR_4_CLK_IN.CLK_CMT_DRVR_TRI_ESD_8_CLK_OUT_SCHMITT_B
+PIP.CLK_BUFCE_ROW_FSR_4_CLK_IN.CLK_CMT_DRVR_TRI_ESD_9_CLK_OUT_SCHMITT_B 130
+PIP.CLK_BUFCE_ROW_FSR_4_CLK_OUT.CLK_BUFCE_ROW_FSR_4_CE_PRE_OPTINV 138
+PIP.CLK_BUFCE_ROW_FSR_4_CLK_OUT.CLK_BUFCE_ROW_FSR_4_CLK_IN 137
+PIP.CLK_BUFCE_ROW_FSR_6_CLK_IN.CLK_CMT_DRVR_TRI_ESD_12_CLK_OUT_SCHMITT_B
+PIP.CLK_BUFCE_ROW_FSR_6_CLK_IN.CLK_CMT_DRVR_TRI_ESD_13_CLK_OUT_SCHMITT_B 178
+PIP.CLK_BUFCE_ROW_FSR_6_CLK_OUT.CLK_BUFCE_ROW_FSR_6_CE_PRE_OPTINV 186
+PIP.CLK_BUFCE_ROW_FSR_6_CLK_OUT.CLK_BUFCE_ROW_FSR_6_CLK_IN 185
+PIP.CLK_CMT_DRVR_TRI_ESD_0_CLK_OUT_SCHMITT_B.CLK_VDISTR_BOT0 20
+PIP.CLK_CMT_DRVR_TRI_ESD_10_CLK_OUT_SCHMITT_B.CLK_VROUTE_BOT2 114
+PIP.CLK_CMT_DRVR_TRI_ESD_11_CLK_OUT_SCHMITT_B.CLK_VROUTE_TOP2 113
+PIP.CLK_CMT_DRVR_TRI_ESD_12_CLK_OUT_SCHMITT_B.CLK_VDISTR_BOT3 164
+PIP.CLK_CMT_DRVR_TRI_ESD_13_CLK_OUT_SCHMITT_B.CLK_VDISTR_TOP3 163
+PIP.CLK_CMT_DRVR_TRI_ESD_14_CLK_OUT_SCHMITT_B.CLK_VROUTE_BOT3 162
+PIP.CLK_CMT_DRVR_TRI_ESD_15_CLK_OUT_SCHMITT_B.CLK_VROUTE_TOP3 161
+PIP.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B.CLK_VDISTR_TOP0 19
+PIP.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B.CLK_VROUTE_BOT0 18
+PIP.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B.CLK_VROUTE_TOP0 17
+PIP.CLK_CMT_DRVR_TRI_ESD_4_CLK_OUT_SCHMITT_B.CLK_VDISTR_BOT1 68
+PIP.CLK_CMT_DRVR_TRI_ESD_5_CLK_OUT_SCHMITT_B.CLK_VDISTR_TOP1 67
+PIP.CLK_CMT_DRVR_TRI_ESD_6_CLK_OUT_SCHMITT_B.CLK_VROUTE_BOT1 66
+PIP.CLK_CMT_DRVR_TRI_ESD_7_CLK_OUT_SCHMITT_B.CLK_VROUTE_TOP1 65
+PIP.CLK_CMT_DRVR_TRI_ESD_8_CLK_OUT_SCHMITT_B.CLK_VDISTR_BOT2 116
+PIP.CLK_CMT_DRVR_TRI_ESD_9_CLK_OUT_SCHMITT_B.CLK_VDISTR_TOP2 115
+PIP.CLK_CMT_MUX_2TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_2TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B 33
+PIP.CLK_CMT_MUX_2TO1_3_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_6_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_2TO1_3_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_7_CLK_OUT_SCHMITT_B 81
+PIP.CLK_CMT_MUX_2TO1_5_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_10_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_2TO1_5_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_11_CLK_OUT_SCHMITT_B 129
+PIP.CLK_CMT_MUX_2TO1_7_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_14_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_2TO1_7_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_15_CLK_OUT_SCHMITT_B 177
+PIP.CLK_CMT_MUX_3TO1_0_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_0_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B 32
+PIP.CLK_CMT_MUX_3TO1_0_CLK_OUT.CLK_HROUTE_CORE_OPT0 31
+PIP.CLK_CMT_MUX_3TO1_10_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_11_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_10_CLK_OUT.CLK_HROUTE_CORE_OPT2 123
+PIP.CLK_CMT_MUX_3TO1_11_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_10_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_11_CLK_OUT.CLK_HROUTE_CORE_OPT2 121
+PIP.CLK_CMT_MUX_3TO1_12_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_13_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_12_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_15_CLK_OUT_SCHMITT_B 176
+PIP.CLK_CMT_MUX_3TO1_12_CLK_OUT.CLK_HROUTE_CORE_OPT3 175
+PIP.CLK_CMT_MUX_3TO1_13_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_12_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_13_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_14_CLK_OUT_SCHMITT_B 174
+PIP.CLK_CMT_MUX_3TO1_13_CLK_OUT.CLK_HROUTE_CORE_OPT3 173
+PIP.CLK_CMT_MUX_3TO1_14_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_15_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_14_CLK_OUT.CLK_HROUTE_CORE_OPT3 171
+PIP.CLK_CMT_MUX_3TO1_15_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_14_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_15_CLK_OUT.CLK_HROUTE_CORE_OPT3 169
+PIP.CLK_CMT_MUX_3TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_0_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B 30
+PIP.CLK_CMT_MUX_3TO1_1_CLK_OUT.CLK_HROUTE_CORE_OPT0 29
+PIP.CLK_CMT_MUX_3TO1_2_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_2_CLK_OUT.CLK_HROUTE_CORE_OPT0 27
+PIP.CLK_CMT_MUX_3TO1_3_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_3_CLK_OUT.CLK_HROUTE_CORE_OPT0 25
+PIP.CLK_CMT_MUX_3TO1_4_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_5_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_4_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_7_CLK_OUT_SCHMITT_B 80
+PIP.CLK_CMT_MUX_3TO1_5_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_4_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_5_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_6_CLK_OUT_SCHMITT_B 78
+PIP.CLK_CMT_MUX_3TO1_5_CLK_OUT.CLK_HROUTE_CORE_OPT1 77
+PIP.CLK_CMT_MUX_3TO1_6_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_7_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_6_CLK_OUT.CLK_HROUTE_CORE_OPT1 75
+PIP.CLK_CMT_MUX_3TO1_7_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_6_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_7_CLK_OUT.CLK_HROUTE_CORE_OPT1 73
+PIP.CLK_CMT_MUX_3TO1_8_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_9_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_8_CLK_OUT.CLK_HROUTE_CORE_OPT2 127
+PIP.CLK_CMT_MUX_3TO1_9_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_10_CLK_OUT_SCHMITT_B 126
+PIP.CLK_CMT_MUX_3TO1_9_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_8_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_9_CLK_OUT.CLK_HROUTE_CORE_OPT2 125
+PIP.CLK_HROUTE_CORE_OPT0.CLK_CMT_MUX_2TO1_1_CLK_OUT 46
+PIP.CLK_HROUTE_CORE_OPT1.CLK_CMT_MUX_2TO1_3_CLK_OUT 94
+PIP.CLK_HROUTE_CORE_OPT2.CLK_CMT_MUX_2TO1_5_CLK_OUT 142
+PIP.CLK_HROUTE_CORE_OPT3.CLK_CMT_MUX_2TO1_7_CLK_OUT 190
+PIP.CLK_TEST_BUF_SITE_1_CLK_IN.CLK_BUFCE_ROW_FSR_0_CLK_OUT 47
+PIP.CLK_TEST_BUF_SITE_3_CLK_IN.CLK_BUFCE_ROW_FSR_2_CLK_OUT 95
+PIP.CLK_TEST_BUF_SITE_5_CLK_IN.CLK_BUFCE_ROW_FSR_4_CLK_OUT 143
+PIP.CLK_TEST_BUF_SITE_7_CLK_IN.CLK_BUFCE_ROW_FSR_6_CLK_OUT 191
+PIP.CLK_VDISTR_BOT0.CLK_CMT_MUX_3TO1_0_CLK_OUT 20 24
+PIP.CLK_VDISTR_BOT1.CLK_CMT_MUX_3TO1_4_CLK_OUT 68 72
+PIP.CLK_VDISTR_BOT2.CLK_CMT_MUX_3TO1_8_CLK_OUT 116 120
+PIP.CLK_VDISTR_BOT3.CLK_CMT_MUX_3TO1_12_CLK_OUT 164 168
+PIP.CLK_VDISTR_TOP0.CLK_CMT_MUX_3TO1_1_CLK_OUT 19 23
+PIP.CLK_VDISTR_TOP1.CLK_CMT_MUX_3TO1_5_CLK_OUT 67 71
+PIP.CLK_VDISTR_TOP2.CLK_CMT_MUX_3TO1_9_CLK_OUT 115 119
+PIP.CLK_VDISTR_TOP3.CLK_CMT_MUX_3TO1_13_CLK_OUT 163 167
+PIP.CLK_VROUTE_BOT0.CLK_CMT_MUX_3TO1_2_CLK_OUT 18 22
+PIP.CLK_VROUTE_BOT1.CLK_CMT_MUX_3TO1_6_CLK_OUT 66 70
+PIP.CLK_VROUTE_BOT2.CLK_CMT_MUX_3TO1_10_CLK_OUT 114 118
+PIP.CLK_VROUTE_BOT3.CLK_CMT_MUX_3TO1_14_CLK_OUT 162 166
+PIP.CLK_VROUTE_TOP0.CLK_CMT_MUX_3TO1_3_CLK_OUT 17 21
+PIP.CLK_VROUTE_TOP1.CLK_CMT_MUX_3TO1_7_CLK_OUT 65 69
+PIP.CLK_VROUTE_TOP2.CLK_CMT_MUX_3TO1_11_CLK_OUT 113 117
+PIP.CLK_VROUTE_TOP3.CLK_CMT_MUX_3TO1_15_CLK_OUT 161 165
+WIRE.CLK_HROUTE_CORE_OPT0.USED 44
+WIRE.CLK_HROUTE_CORE_OPT1.USED 92
+WIRE.CLK_HROUTE_CORE_OPT2.USED 140
+WIRE.CLK_HROUTE_CORE_OPT3.USED 188
+WIRE.CLK_TEST_BUF_SITE_1_CLK_IN.USED 45
+WIRE.CLK_TEST_BUF_SITE_3_CLK_IN.USED 93
+WIRE.CLK_TEST_BUF_SITE_5_CLK_IN.USED 141
+WIRE.CLK_TEST_BUF_SITE_7_CLK_IN.USED 189
diff --git a/RCLK_BRAM_INTF_TD_R.bits b/RCLK_BRAM_INTF_TD_R.bits
new file mode 100644
index 0000000..f74c66d
--- /dev/null
+++ b/RCLK_BRAM_INTF_TD_R.bits
@@ -0,0 +1,49 @@
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_IN.CLK_CMT_DRVR_TRI_ESD_0_CLK_OUT_SCHMITT_B
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_IN.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B 34
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_OUT.CLK_BUFCE_ROW_FSR_0_CE_PRE_OPTINV 42
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_OUT.CLK_BUFCE_ROW_FSR_0_CLK_IN 41
+PIP.CLK_BUFCE_ROW_FSR_2_CLK_OUT.CLK_BUFCE_ROW_FSR_2_CE_PRE_OPTINV 90 95
+PIP.CLK_BUFCE_ROW_FSR_4_CLK_IN.CLK_CMT_DRVR_TRI_ESD_9_CLK_OUT_SCHMITT_B 115 119 130 137
+PIP.CLK_BUFCE_ROW_FSR_4_CLK_OUT.CLK_BUFCE_ROW_FSR_4_CE_PRE_OPTINV 138
+PIP.CLK_BUFCE_ROW_FSR_4_CLK_OUT.CLK_BUFCE_ROW_FSR_4_CLK_IN
+PIP.CLK_BUFCE_ROW_FSR_6_CLK_IN.CLK_CMT_DRVR_TRI_ESD_13_CLK_OUT_SCHMITT_B 163 167 178 185
+PIP.CLK_BUFCE_ROW_FSR_6_CLK_OUT.CLK_BUFCE_ROW_FSR_6_CE_PRE_OPTINV 186
+PIP.CLK_BUFCE_ROW_FSR_6_CLK_OUT.CLK_BUFCE_ROW_FSR_6_CLK_IN
+PIP.CLK_CMT_DRVR_TRI_ESD_0_CLK_OUT_SCHMITT_B.CLK_VDISTR_BOT0 20
+PIP.CLK_CMT_DRVR_TRI_ESD_10_CLK_OUT_SCHMITT_B.CLK_VROUTE_BOT2 114
+PIP.CLK_CMT_DRVR_TRI_ESD_13_CLK_OUT_SCHMITT_B.CLK_VDISTR_TOP3
+PIP.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B.CLK_VDISTR_TOP0 19
+PIP.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B.CLK_VROUTE_BOT0 30
+PIP.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B.CLK_VROUTE_TOP0 17
+PIP.CLK_CMT_DRVR_TRI_ESD_7_CLK_OUT_SCHMITT_B.CLK_VROUTE_TOP1 65
+PIP.CLK_CMT_DRVR_TRI_ESD_9_CLK_OUT_SCHMITT_B.CLK_VDISTR_TOP2
+PIP.CLK_CMT_MUX_3TO1_0_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B 17 20 24
+PIP.CLK_CMT_MUX_3TO1_11_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_10_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_2_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_2_CLK_OUT.CLK_HROUTE_CORE_OPT0 27
+PIP.CLK_CMT_MUX_3TO1_3_CLK_OUT.CLK_HROUTE_CORE_OPT0 17 21 25
+PIP.CLK_CMT_MUX_3TO1_6_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_7_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_9_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_10_CLK_OUT_SCHMITT_B 126
+PIP.CLK_TEST_BUF_SITE_1_CLK_IN.CLK_BUFCE_ROW_FSR_0_CLK_OUT 47
+PIP.CLK_TEST_BUF_SITE_3_CLK_IN.CLK_BUFCE_ROW_FSR_2_CLK_OUT
+PIP.CLK_TEST_BUF_SITE_5_CLK_IN.CLK_BUFCE_ROW_FSR_4_CLK_OUT 143
+PIP.CLK_TEST_BUF_SITE_7_CLK_IN.CLK_BUFCE_ROW_FSR_6_CLK_OUT 191
+PIP.CLK_VDISTR_BOT0.CLK_CMT_MUX_3TO1_0_CLK_OUT
+PIP.CLK_VDISTR_TOP0.CLK_CMT_MUX_3TO1_1_CLK_OUT 18 19 23
+PIP.CLK_VDISTR_TOP2.CLK_CMT_MUX_3TO1_9_CLK_OUT
+PIP.CLK_VDISTR_TOP3.CLK_CMT_MUX_3TO1_13_CLK_OUT
+PIP.CLK_VROUTE_BOT0.CLK_CMT_MUX_3TO1_2_CLK_OUT 18 22
+PIP.CLK_VROUTE_BOT1.CLK_CMT_MUX_3TO1_6_CLK_OUT 66 70
+PIP.CLK_VROUTE_BOT2.CLK_CMT_MUX_3TO1_10_CLK_OUT 114 118
+PIP.CLK_VROUTE_BOT3.CLK_CMT_MUX_3TO1_14_CLK_OUT 162 166
+PIP.CLK_VROUTE_TOP0.CLK_CMT_MUX_3TO1_3_CLK_OUT
+PIP.CLK_VROUTE_TOP2.CLK_CMT_MUX_3TO1_11_CLK_OUT 113 117
+WIRE.CLK_HROUTE_CORE_OPT0.USED 44
+WIRE.CLK_HROUTE_CORE_OPT1.USED 92
+WIRE.CLK_HROUTE_CORE_OPT2.USED 140
+WIRE.CLK_HROUTE_CORE_OPT3.USED 188
+WIRE.CLK_TEST_BUF_SITE_1_CLK_IN.USED 45
+WIRE.CLK_TEST_BUF_SITE_3_CLK_IN.USED 93
+WIRE.CLK_TEST_BUF_SITE_5_CLK_IN.USED 141
+WIRE.CLK_TEST_BUF_SITE_7_CLK_IN.USED 189
diff --git a/RCLK_CLEL_L_L.bits b/RCLK_CLEL_L_L.bits
new file mode 100644
index 0000000..67bc596
--- /dev/null
+++ b/RCLK_CLEL_L_L.bits
@@ -0,0 +1,28 @@
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_IN.CLK_CMT_DRVR_TRI_ESD_0_CLK_OUT_SCHMITT_B
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_IN.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B 466
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_OUT.CLK_BUFCE_ROW_FSR_0_CE_PRE_OPTINV 474
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_OUT.CLK_BUFCE_ROW_FSR_0_CLK_IN 473
+PIP.CLK_CMT_DRVR_TRI_ESD_0_CLK_OUT_SCHMITT_B.CLK_VDISTR_BOT 452
+PIP.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B.CLK_VDISTR_TOP 451
+PIP.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B.CLK_VROUTE_BOT 450
+PIP.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B.CLK_VROUTE_TOP 449
+PIP.CLK_CMT_MUX_2TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_2TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B 465
+PIP.CLK_CMT_MUX_3TO1_0_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_0_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B 464
+PIP.CLK_CMT_MUX_3TO1_0_CLK_OUT.CLK_HROUTE_CORE_OPT 463
+PIP.CLK_CMT_MUX_3TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_0_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B 462
+PIP.CLK_CMT_MUX_3TO1_1_CLK_OUT.CLK_HROUTE_CORE_OPT 461
+PIP.CLK_CMT_MUX_3TO1_2_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_2_CLK_OUT.CLK_HROUTE_CORE_OPT 459
+PIP.CLK_CMT_MUX_3TO1_3_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_3_CLK_OUT.CLK_HROUTE_CORE_OPT 457
+PIP.CLK_HROUTE_CORE_OPT.CLK_CMT_MUX_2TO1_1_CLK_OUT 478
+PIP.CLK_TEST_BUF_SITE_1_CLK_IN.CLK_BUFCE_ROW_FSR_0_CLK_OUT 479
+PIP.CLK_VDISTR_BOT.CLK_CMT_MUX_3TO1_0_CLK_OUT 452 456
+PIP.CLK_VDISTR_TOP.CLK_CMT_MUX_3TO1_1_CLK_OUT 451 455
+PIP.CLK_VROUTE_BOT.CLK_CMT_MUX_3TO1_2_CLK_OUT 450 454
+PIP.CLK_VROUTE_TOP.CLK_CMT_MUX_3TO1_3_CLK_OUT 449 453
+WIRE.CLK_HROUTE_CORE_OPT.USED 476
+WIRE.CLK_TEST_BUF_SITE_1_CLK_IN.USED 477
diff --git a/RCLK_CLEL_L_R.bits b/RCLK_CLEL_L_R.bits
new file mode 100644
index 0000000..9cd19e2
--- /dev/null
+++ b/RCLK_CLEL_L_R.bits
@@ -0,0 +1,21 @@
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_IN.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B 451 466
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_OUT.CLK_BUFCE_ROW_FSR_0_CE_PRE_OPTINV 474
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_OUT.CLK_BUFCE_ROW_FSR_0_CLK_IN 473
+PIP.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B.CLK_VDISTR_TOP
+PIP.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B.CLK_VROUTE_BOT 450
+PIP.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B.CLK_VROUTE_TOP 449
+PIP.CLK_CMT_MUX_2TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B 465 478
+PIP.CLK_CMT_MUX_3TO1_0_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B 452 456 464
+PIP.CLK_CMT_MUX_3TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B 462
+PIP.CLK_CMT_MUX_3TO1_1_CLK_OUT.CLK_HROUTE_CORE_OPT 461
+PIP.CLK_CMT_MUX_3TO1_2_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_2_CLK_OUT.CLK_HROUTE_CORE_OPT 459
+PIP.CLK_CMT_MUX_3TO1_3_CLK_OUT.CLK_HROUTE_CORE_OPT 457
+PIP.CLK_HROUTE_CORE_OPT.CLK_CMT_MUX_2TO1_1_CLK_OUT
+PIP.CLK_TEST_BUF_SITE_1_CLK_IN.CLK_BUFCE_ROW_FSR_0_CLK_OUT 479
+PIP.CLK_VDISTR_BOT.CLK_CMT_MUX_3TO1_0_CLK_OUT
+PIP.CLK_VDISTR_TOP.CLK_CMT_MUX_3TO1_1_CLK_OUT 455
+PIP.CLK_VROUTE_BOT.CLK_CMT_MUX_3TO1_2_CLK_OUT 450 454
+PIP.CLK_VROUTE_TOP.CLK_CMT_MUX_3TO1_3_CLK_OUT 449 453
+WIRE.CLK_HROUTE_CORE_OPT.USED 476
+WIRE.CLK_TEST_BUF_SITE_1_CLK_IN.USED 477
diff --git a/RCLK_CLEM_CLKBUF_L.bits b/RCLK_CLEM_CLKBUF_L.bits
new file mode 100644
index 0000000..db2b9c0
--- /dev/null
+++ b/RCLK_CLEM_CLKBUF_L.bits
@@ -0,0 +1,120 @@
+PIP.CLK_HROUTE_R0.CLK_HROUTE_L0.FWD 671
+PIP.CLK_HROUTE_R0.CLK_HROUTE_L0.REV 623
+PIP.CLK_HROUTE_R1.CLK_HROUTE_L1.FWD 669
+PIP.CLK_HROUTE_R1.CLK_HROUTE_L1.REV 621
+PIP.CLK_HROUTE_R10.CLK_HROUTE_L10.FWD 651
+PIP.CLK_HROUTE_R10.CLK_HROUTE_L10.REV 603
+PIP.CLK_HROUTE_R11.CLK_HROUTE_L11.FWD 649
+PIP.CLK_HROUTE_R11.CLK_HROUTE_L11.REV 601
+PIP.CLK_HROUTE_R12.CLK_HROUTE_L12.FWD 647
+PIP.CLK_HROUTE_R12.CLK_HROUTE_L12.REV 599
+PIP.CLK_HROUTE_R13.CLK_HROUTE_L13.FWD 645
+PIP.CLK_HROUTE_R13.CLK_HROUTE_L13.REV 597
+PIP.CLK_HROUTE_R14.CLK_HROUTE_L14.FWD 643
+PIP.CLK_HROUTE_R14.CLK_HROUTE_L14.REV 595
+PIP.CLK_HROUTE_R15.CLK_HROUTE_L15.FWD 641
+PIP.CLK_HROUTE_R15.CLK_HROUTE_L15.REV 593
+PIP.CLK_HROUTE_R16.CLK_HROUTE_L16.FWD 639
+PIP.CLK_HROUTE_R16.CLK_HROUTE_L16.REV 591
+PIP.CLK_HROUTE_R17.CLK_HROUTE_L17.FWD 637
+PIP.CLK_HROUTE_R17.CLK_HROUTE_L17.REV 589
+PIP.CLK_HROUTE_R18.CLK_HROUTE_L18.FWD 635
+PIP.CLK_HROUTE_R18.CLK_HROUTE_L18.REV 587
+PIP.CLK_HROUTE_R19.CLK_HROUTE_L19.FWD 633
+PIP.CLK_HROUTE_R19.CLK_HROUTE_L19.REV 585
+PIP.CLK_HROUTE_R2.CLK_HROUTE_L2.FWD 667
+PIP.CLK_HROUTE_R2.CLK_HROUTE_L2.REV 619
+PIP.CLK_HROUTE_R20.CLK_HROUTE_L20.FWD 631
+PIP.CLK_HROUTE_R20.CLK_HROUTE_L20.REV 583
+PIP.CLK_HROUTE_R21.CLK_HROUTE_L21.FWD 629
+PIP.CLK_HROUTE_R21.CLK_HROUTE_L21.REV 581
+PIP.CLK_HROUTE_R22.CLK_HROUTE_L22.FWD 627
+PIP.CLK_HROUTE_R22.CLK_HROUTE_L22.REV 579
+PIP.CLK_HROUTE_R23.CLK_HROUTE_L23.FWD 625
+PIP.CLK_HROUTE_R23.CLK_HROUTE_L23.REV 577
+PIP.CLK_HROUTE_R3.CLK_HROUTE_L3.FWD 665
+PIP.CLK_HROUTE_R3.CLK_HROUTE_L3.REV 617
+PIP.CLK_HROUTE_R4.CLK_HROUTE_L4.FWD 663
+PIP.CLK_HROUTE_R4.CLK_HROUTE_L4.REV 615
+PIP.CLK_HROUTE_R5.CLK_HROUTE_L5.FWD 661
+PIP.CLK_HROUTE_R5.CLK_HROUTE_L5.REV 613
+PIP.CLK_HROUTE_R6.CLK_HROUTE_L6.FWD 659
+PIP.CLK_HROUTE_R6.CLK_HROUTE_L6.REV 611
+PIP.CLK_HROUTE_R7.CLK_HROUTE_L7.FWD 657
+PIP.CLK_HROUTE_R7.CLK_HROUTE_L7.REV 609
+PIP.CLK_HROUTE_R8.CLK_HROUTE_L8.FWD 655
+PIP.CLK_HROUTE_R8.CLK_HROUTE_L8.REV 607
+PIP.CLK_HROUTE_R9.CLK_HROUTE_L9.FWD 653
+PIP.CLK_HROUTE_R9.CLK_HROUTE_L9.REV 605
+WIRE.CLK_HDISTR_FT0_0.USED
+WIRE.CLK_HDISTR_FT0_1.USED
+WIRE.CLK_HDISTR_FT0_10.USED
+WIRE.CLK_HDISTR_FT0_11.USED
+WIRE.CLK_HDISTR_FT0_12.USED
+WIRE.CLK_HDISTR_FT0_13.USED
+WIRE.CLK_HDISTR_FT0_14.USED
+WIRE.CLK_HDISTR_FT0_15.USED
+WIRE.CLK_HDISTR_FT0_16.USED
+WIRE.CLK_HDISTR_FT0_17.USED
+WIRE.CLK_HDISTR_FT0_18.USED
+WIRE.CLK_HDISTR_FT0_19.USED
+WIRE.CLK_HDISTR_FT0_2.USED
+WIRE.CLK_HDISTR_FT0_20.USED
+WIRE.CLK_HDISTR_FT0_21.USED
+WIRE.CLK_HDISTR_FT0_22.USED
+WIRE.CLK_HDISTR_FT0_23.USED
+WIRE.CLK_HDISTR_FT0_3.USED
+WIRE.CLK_HDISTR_FT0_4.USED
+WIRE.CLK_HDISTR_FT0_5.USED
+WIRE.CLK_HDISTR_FT0_6.USED
+WIRE.CLK_HDISTR_FT0_7.USED
+WIRE.CLK_HDISTR_FT0_8.USED
+WIRE.CLK_HDISTR_FT0_9.USED
+WIRE.CLK_HROUTE_L0.USED 622
+WIRE.CLK_HROUTE_L1.USED 620
+WIRE.CLK_HROUTE_L10.USED 602
+WIRE.CLK_HROUTE_L11.USED 600
+WIRE.CLK_HROUTE_L12.USED 598
+WIRE.CLK_HROUTE_L13.USED 596
+WIRE.CLK_HROUTE_L14.USED 594
+WIRE.CLK_HROUTE_L15.USED 592
+WIRE.CLK_HROUTE_L16.USED 590
+WIRE.CLK_HROUTE_L17.USED 588
+WIRE.CLK_HROUTE_L18.USED 586
+WIRE.CLK_HROUTE_L19.USED 584
+WIRE.CLK_HROUTE_L2.USED 618
+WIRE.CLK_HROUTE_L20.USED 582
+WIRE.CLK_HROUTE_L21.USED 580
+WIRE.CLK_HROUTE_L22.USED 578
+WIRE.CLK_HROUTE_L23.USED 576
+WIRE.CLK_HROUTE_L3.USED 616
+WIRE.CLK_HROUTE_L4.USED 614
+WIRE.CLK_HROUTE_L5.USED 612
+WIRE.CLK_HROUTE_L6.USED 610
+WIRE.CLK_HROUTE_L7.USED 608
+WIRE.CLK_HROUTE_L8.USED 606
+WIRE.CLK_HROUTE_L9.USED 604
+WIRE.CLK_HROUTE_R0.USED 670
+WIRE.CLK_HROUTE_R1.USED 668
+WIRE.CLK_HROUTE_R10.USED 650
+WIRE.CLK_HROUTE_R11.USED 648
+WIRE.CLK_HROUTE_R12.USED 646
+WIRE.CLK_HROUTE_R13.USED 644
+WIRE.CLK_HROUTE_R14.USED 642
+WIRE.CLK_HROUTE_R15.USED 640
+WIRE.CLK_HROUTE_R16.USED 638
+WIRE.CLK_HROUTE_R17.USED 636
+WIRE.CLK_HROUTE_R18.USED 634
+WIRE.CLK_HROUTE_R19.USED 632
+WIRE.CLK_HROUTE_R2.USED 666
+WIRE.CLK_HROUTE_R20.USED 630
+WIRE.CLK_HROUTE_R21.USED 628
+WIRE.CLK_HROUTE_R22.USED 626
+WIRE.CLK_HROUTE_R23.USED 624
+WIRE.CLK_HROUTE_R3.USED 664
+WIRE.CLK_HROUTE_R4.USED 662
+WIRE.CLK_HROUTE_R5.USED 660
+WIRE.CLK_HROUTE_R6.USED 658
+WIRE.CLK_HROUTE_R7.USED 656
+WIRE.CLK_HROUTE_R8.USED 654
+WIRE.CLK_HROUTE_R9.USED 652
diff --git a/RCLK_CLEM_L.bits b/RCLK_CLEM_L.bits
new file mode 100644
index 0000000..67bc596
--- /dev/null
+++ b/RCLK_CLEM_L.bits
@@ -0,0 +1,28 @@
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_IN.CLK_CMT_DRVR_TRI_ESD_0_CLK_OUT_SCHMITT_B
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_IN.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B 466
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_OUT.CLK_BUFCE_ROW_FSR_0_CE_PRE_OPTINV 474
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_OUT.CLK_BUFCE_ROW_FSR_0_CLK_IN 473
+PIP.CLK_CMT_DRVR_TRI_ESD_0_CLK_OUT_SCHMITT_B.CLK_VDISTR_BOT 452
+PIP.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B.CLK_VDISTR_TOP 451
+PIP.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B.CLK_VROUTE_BOT 450
+PIP.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B.CLK_VROUTE_TOP 449
+PIP.CLK_CMT_MUX_2TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_2TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B 465
+PIP.CLK_CMT_MUX_3TO1_0_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_0_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B 464
+PIP.CLK_CMT_MUX_3TO1_0_CLK_OUT.CLK_HROUTE_CORE_OPT 463
+PIP.CLK_CMT_MUX_3TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_0_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B 462
+PIP.CLK_CMT_MUX_3TO1_1_CLK_OUT.CLK_HROUTE_CORE_OPT 461
+PIP.CLK_CMT_MUX_3TO1_2_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_2_CLK_OUT.CLK_HROUTE_CORE_OPT 459
+PIP.CLK_CMT_MUX_3TO1_3_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_3_CLK_OUT.CLK_HROUTE_CORE_OPT 457
+PIP.CLK_HROUTE_CORE_OPT.CLK_CMT_MUX_2TO1_1_CLK_OUT 478
+PIP.CLK_TEST_BUF_SITE_1_CLK_IN.CLK_BUFCE_ROW_FSR_0_CLK_OUT 479
+PIP.CLK_VDISTR_BOT.CLK_CMT_MUX_3TO1_0_CLK_OUT 452 456
+PIP.CLK_VDISTR_TOP.CLK_CMT_MUX_3TO1_1_CLK_OUT 451 455
+PIP.CLK_VROUTE_BOT.CLK_CMT_MUX_3TO1_2_CLK_OUT 450 454
+PIP.CLK_VROUTE_TOP.CLK_CMT_MUX_3TO1_3_CLK_OUT 449 453
+WIRE.CLK_HROUTE_CORE_OPT.USED 476
+WIRE.CLK_TEST_BUF_SITE_1_CLK_IN.USED 477
diff --git a/RCLK_CLEM_R.bits b/RCLK_CLEM_R.bits
new file mode 100644
index 0000000..f9339ab
--- /dev/null
+++ b/RCLK_CLEM_R.bits
@@ -0,0 +1,22 @@
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_IN.CLK_CMT_DRVR_TRI_ESD_0_CLK_OUT_SCHMITT_B 452
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_IN.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B 451 466
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_OUT.CLK_BUFCE_ROW_FSR_0_CE_PRE_OPTINV 474
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_OUT.CLK_BUFCE_ROW_FSR_0_CLK_IN 473
+PIP.CLK_CMT_DRVR_TRI_ESD_0_CLK_OUT_SCHMITT_B.CLK_VDISTR_BOT
+PIP.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B.CLK_VDISTR_TOP
+PIP.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B.CLK_VROUTE_BOT 450
+PIP.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B.CLK_VROUTE_TOP 449
+PIP.CLK_CMT_MUX_2TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B 465
+PIP.CLK_CMT_MUX_3TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B 462
+PIP.CLK_CMT_MUX_3TO1_1_CLK_OUT.CLK_HROUTE_CORE_OPT 461
+PIP.CLK_CMT_MUX_3TO1_2_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_2_CLK_OUT.CLK_HROUTE_CORE_OPT 459
+PIP.CLK_CMT_MUX_3TO1_3_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_3_CLK_OUT.CLK_HROUTE_CORE_OPT 457
+PIP.CLK_HROUTE_CORE_OPT.CLK_CMT_MUX_2TO1_1_CLK_OUT 478
+PIP.CLK_TEST_BUF_SITE_1_CLK_IN.CLK_BUFCE_ROW_FSR_0_CLK_OUT 479
+PIP.CLK_VDISTR_TOP.CLK_CMT_MUX_3TO1_1_CLK_OUT 451 455
+PIP.CLK_VROUTE_BOT.CLK_CMT_MUX_3TO1_2_CLK_OUT 450 454
+PIP.CLK_VROUTE_TOP.CLK_CMT_MUX_3TO1_3_CLK_OUT 449 453
+WIRE.CLK_HROUTE_CORE_OPT.USED 476
+WIRE.CLK_TEST_BUF_SITE_1_CLK_IN.USED 477
diff --git a/RCLK_DSP_INTF_CLKBUF_L.bits b/RCLK_DSP_INTF_CLKBUF_L.bits
new file mode 100644
index 0000000..712bcb9
--- /dev/null
+++ b/RCLK_DSP_INTF_CLKBUF_L.bits
@@ -0,0 +1,192 @@
+PIP.CLK_HDISTR_R0.CLK_HDISTR_L0.FWD 335
+PIP.CLK_HDISTR_R0.CLK_HDISTR_L0.REV 239
+PIP.CLK_HDISTR_R1.CLK_HDISTR_L1.FWD 333
+PIP.CLK_HDISTR_R1.CLK_HDISTR_L1.REV 237
+PIP.CLK_HDISTR_R10.CLK_HDISTR_L10.FWD 315
+PIP.CLK_HDISTR_R10.CLK_HDISTR_L10.REV 219
+PIP.CLK_HDISTR_R11.CLK_HDISTR_L11.FWD 313
+PIP.CLK_HDISTR_R11.CLK_HDISTR_L11.REV 217
+PIP.CLK_HDISTR_R12.CLK_HDISTR_L12.FWD 311
+PIP.CLK_HDISTR_R12.CLK_HDISTR_L12.REV 215
+PIP.CLK_HDISTR_R13.CLK_HDISTR_L13.FWD 309
+PIP.CLK_HDISTR_R13.CLK_HDISTR_L13.REV 213
+PIP.CLK_HDISTR_R14.CLK_HDISTR_L14.FWD 307
+PIP.CLK_HDISTR_R14.CLK_HDISTR_L14.REV 211
+PIP.CLK_HDISTR_R15.CLK_HDISTR_L15.FWD 305
+PIP.CLK_HDISTR_R15.CLK_HDISTR_L15.REV 209
+PIP.CLK_HDISTR_R16.CLK_HDISTR_L16.FWD 303
+PIP.CLK_HDISTR_R16.CLK_HDISTR_L16.REV 207
+PIP.CLK_HDISTR_R17.CLK_HDISTR_L17.FWD 301
+PIP.CLK_HDISTR_R17.CLK_HDISTR_L17.REV 205
+PIP.CLK_HDISTR_R18.CLK_HDISTR_L18.FWD 299
+PIP.CLK_HDISTR_R18.CLK_HDISTR_L18.REV 203
+PIP.CLK_HDISTR_R19.CLK_HDISTR_L19.FWD 297
+PIP.CLK_HDISTR_R19.CLK_HDISTR_L19.REV 201
+PIP.CLK_HDISTR_R2.CLK_HDISTR_L2.FWD 331
+PIP.CLK_HDISTR_R2.CLK_HDISTR_L2.REV 235
+PIP.CLK_HDISTR_R20.CLK_HDISTR_L20.FWD 295
+PIP.CLK_HDISTR_R20.CLK_HDISTR_L20.REV 199
+PIP.CLK_HDISTR_R21.CLK_HDISTR_L21.FWD 293
+PIP.CLK_HDISTR_R21.CLK_HDISTR_L21.REV 197
+PIP.CLK_HDISTR_R22.CLK_HDISTR_L22.FWD 291
+PIP.CLK_HDISTR_R22.CLK_HDISTR_L22.REV 195
+PIP.CLK_HDISTR_R23.CLK_HDISTR_L23.FWD 289
+PIP.CLK_HDISTR_R23.CLK_HDISTR_L23.REV 193
+PIP.CLK_HDISTR_R3.CLK_HDISTR_L3.FWD 329
+PIP.CLK_HDISTR_R3.CLK_HDISTR_L3.REV 233
+PIP.CLK_HDISTR_R4.CLK_HDISTR_L4.FWD 327
+PIP.CLK_HDISTR_R4.CLK_HDISTR_L4.REV 231
+PIP.CLK_HDISTR_R5.CLK_HDISTR_L5.FWD 325
+PIP.CLK_HDISTR_R5.CLK_HDISTR_L5.REV 229
+PIP.CLK_HDISTR_R6.CLK_HDISTR_L6.FWD 323
+PIP.CLK_HDISTR_R6.CLK_HDISTR_L6.REV 227
+PIP.CLK_HDISTR_R7.CLK_HDISTR_L7.FWD 321
+PIP.CLK_HDISTR_R7.CLK_HDISTR_L7.REV 225
+PIP.CLK_HDISTR_R8.CLK_HDISTR_L8.FWD 319
+PIP.CLK_HDISTR_R8.CLK_HDISTR_L8.REV 223
+PIP.CLK_HDISTR_R9.CLK_HDISTR_L9.FWD 317
+PIP.CLK_HDISTR_R9.CLK_HDISTR_L9.REV 221
+PIP.CLK_HROUTE_R0.CLK_HROUTE_L0.FWD 334
+PIP.CLK_HROUTE_R0.CLK_HROUTE_L0.REV 238
+PIP.CLK_HROUTE_R1.CLK_HROUTE_L1.FWD 332
+PIP.CLK_HROUTE_R1.CLK_HROUTE_L1.REV 236
+PIP.CLK_HROUTE_R10.CLK_HROUTE_L10.FWD 314
+PIP.CLK_HROUTE_R10.CLK_HROUTE_L10.REV 218
+PIP.CLK_HROUTE_R11.CLK_HROUTE_L11.FWD 312
+PIP.CLK_HROUTE_R11.CLK_HROUTE_L11.REV 216
+PIP.CLK_HROUTE_R12.CLK_HROUTE_L12.FWD 310
+PIP.CLK_HROUTE_R12.CLK_HROUTE_L12.REV 214
+PIP.CLK_HROUTE_R13.CLK_HROUTE_L13.FWD 308
+PIP.CLK_HROUTE_R13.CLK_HROUTE_L13.REV 212
+PIP.CLK_HROUTE_R14.CLK_HROUTE_L14.FWD 306
+PIP.CLK_HROUTE_R14.CLK_HROUTE_L14.REV 210
+PIP.CLK_HROUTE_R15.CLK_HROUTE_L15.FWD 304
+PIP.CLK_HROUTE_R15.CLK_HROUTE_L15.REV 208
+PIP.CLK_HROUTE_R16.CLK_HROUTE_L16.FWD 302
+PIP.CLK_HROUTE_R16.CLK_HROUTE_L16.REV 206
+PIP.CLK_HROUTE_R17.CLK_HROUTE_L17.FWD 300
+PIP.CLK_HROUTE_R17.CLK_HROUTE_L17.REV 204
+PIP.CLK_HROUTE_R18.CLK_HROUTE_L18.FWD 298
+PIP.CLK_HROUTE_R18.CLK_HROUTE_L18.REV 202
+PIP.CLK_HROUTE_R19.CLK_HROUTE_L19.FWD 296
+PIP.CLK_HROUTE_R19.CLK_HROUTE_L19.REV 200
+PIP.CLK_HROUTE_R2.CLK_HROUTE_L2.FWD 330
+PIP.CLK_HROUTE_R2.CLK_HROUTE_L2.REV 234
+PIP.CLK_HROUTE_R20.CLK_HROUTE_L20.FWD 294
+PIP.CLK_HROUTE_R20.CLK_HROUTE_L20.REV 198
+PIP.CLK_HROUTE_R21.CLK_HROUTE_L21.FWD 292
+PIP.CLK_HROUTE_R21.CLK_HROUTE_L21.REV 196
+PIP.CLK_HROUTE_R22.CLK_HROUTE_L22.FWD 290
+PIP.CLK_HROUTE_R22.CLK_HROUTE_L22.REV 194
+PIP.CLK_HROUTE_R23.CLK_HROUTE_L23.FWD 288
+PIP.CLK_HROUTE_R23.CLK_HROUTE_L23.REV 192
+PIP.CLK_HROUTE_R3.CLK_HROUTE_L3.FWD 328
+PIP.CLK_HROUTE_R3.CLK_HROUTE_L3.REV 232
+PIP.CLK_HROUTE_R4.CLK_HROUTE_L4.FWD 326
+PIP.CLK_HROUTE_R4.CLK_HROUTE_L4.REV 230
+PIP.CLK_HROUTE_R5.CLK_HROUTE_L5.FWD 324
+PIP.CLK_HROUTE_R5.CLK_HROUTE_L5.REV 228
+PIP.CLK_HROUTE_R6.CLK_HROUTE_L6.FWD 322
+PIP.CLK_HROUTE_R6.CLK_HROUTE_L6.REV 226
+PIP.CLK_HROUTE_R7.CLK_HROUTE_L7.FWD 320
+PIP.CLK_HROUTE_R7.CLK_HROUTE_L7.REV 224
+PIP.CLK_HROUTE_R8.CLK_HROUTE_L8.FWD 318
+PIP.CLK_HROUTE_R8.CLK_HROUTE_L8.REV 222
+PIP.CLK_HROUTE_R9.CLK_HROUTE_L9.FWD 316
+PIP.CLK_HROUTE_R9.CLK_HROUTE_L9.REV 220
+WIRE.CLK_HDISTR_L0.USED 287
+WIRE.CLK_HDISTR_L1.USED 285
+WIRE.CLK_HDISTR_L10.USED 267
+WIRE.CLK_HDISTR_L11.USED 265
+WIRE.CLK_HDISTR_L12.USED 263
+WIRE.CLK_HDISTR_L13.USED 261
+WIRE.CLK_HDISTR_L14.USED 259
+WIRE.CLK_HDISTR_L15.USED 257
+WIRE.CLK_HDISTR_L16.USED 255
+WIRE.CLK_HDISTR_L17.USED 253
+WIRE.CLK_HDISTR_L18.USED 251
+WIRE.CLK_HDISTR_L19.USED 249
+WIRE.CLK_HDISTR_L2.USED 283
+WIRE.CLK_HDISTR_L20.USED 247
+WIRE.CLK_HDISTR_L21.USED 245
+WIRE.CLK_HDISTR_L22.USED 243
+WIRE.CLK_HDISTR_L23.USED 241
+WIRE.CLK_HDISTR_L3.USED 281
+WIRE.CLK_HDISTR_L4.USED 279
+WIRE.CLK_HDISTR_L5.USED 277
+WIRE.CLK_HDISTR_L6.USED 275
+WIRE.CLK_HDISTR_L7.USED 273
+WIRE.CLK_HDISTR_L8.USED 271
+WIRE.CLK_HDISTR_L9.USED 269
+WIRE.CLK_HDISTR_R0.USED 383
+WIRE.CLK_HDISTR_R1.USED 381
+WIRE.CLK_HDISTR_R10.USED 363
+WIRE.CLK_HDISTR_R11.USED 361
+WIRE.CLK_HDISTR_R12.USED 359
+WIRE.CLK_HDISTR_R13.USED 357
+WIRE.CLK_HDISTR_R14.USED 355
+WIRE.CLK_HDISTR_R15.USED 353
+WIRE.CLK_HDISTR_R16.USED 351
+WIRE.CLK_HDISTR_R17.USED 349
+WIRE.CLK_HDISTR_R18.USED 347
+WIRE.CLK_HDISTR_R19.USED 345
+WIRE.CLK_HDISTR_R2.USED 379
+WIRE.CLK_HDISTR_R20.USED 343
+WIRE.CLK_HDISTR_R21.USED 341
+WIRE.CLK_HDISTR_R22.USED 339
+WIRE.CLK_HDISTR_R23.USED 337
+WIRE.CLK_HDISTR_R3.USED 377
+WIRE.CLK_HDISTR_R4.USED 375
+WIRE.CLK_HDISTR_R5.USED 373
+WIRE.CLK_HDISTR_R6.USED 371
+WIRE.CLK_HDISTR_R7.USED 369
+WIRE.CLK_HDISTR_R8.USED 367
+WIRE.CLK_HDISTR_R9.USED 365
+WIRE.CLK_HROUTE_L0.USED 286
+WIRE.CLK_HROUTE_L1.USED 284
+WIRE.CLK_HROUTE_L10.USED 266
+WIRE.CLK_HROUTE_L11.USED 264
+WIRE.CLK_HROUTE_L12.USED 262
+WIRE.CLK_HROUTE_L13.USED 260
+WIRE.CLK_HROUTE_L14.USED 258
+WIRE.CLK_HROUTE_L15.USED 256
+WIRE.CLK_HROUTE_L16.USED 254
+WIRE.CLK_HROUTE_L17.USED 252
+WIRE.CLK_HROUTE_L18.USED 250
+WIRE.CLK_HROUTE_L19.USED 248
+WIRE.CLK_HROUTE_L2.USED 282
+WIRE.CLK_HROUTE_L20.USED 246
+WIRE.CLK_HROUTE_L21.USED 244
+WIRE.CLK_HROUTE_L22.USED 242
+WIRE.CLK_HROUTE_L23.USED 240
+WIRE.CLK_HROUTE_L3.USED 280
+WIRE.CLK_HROUTE_L4.USED 278
+WIRE.CLK_HROUTE_L5.USED 276
+WIRE.CLK_HROUTE_L6.USED 274
+WIRE.CLK_HROUTE_L7.USED 272
+WIRE.CLK_HROUTE_L8.USED 270
+WIRE.CLK_HROUTE_L9.USED 268
+WIRE.CLK_HROUTE_R0.USED 382
+WIRE.CLK_HROUTE_R1.USED 380
+WIRE.CLK_HROUTE_R10.USED 362
+WIRE.CLK_HROUTE_R11.USED 360
+WIRE.CLK_HROUTE_R12.USED 358
+WIRE.CLK_HROUTE_R13.USED 356
+WIRE.CLK_HROUTE_R14.USED 354
+WIRE.CLK_HROUTE_R15.USED 352
+WIRE.CLK_HROUTE_R16.USED 350
+WIRE.CLK_HROUTE_R17.USED 348
+WIRE.CLK_HROUTE_R18.USED 346
+WIRE.CLK_HROUTE_R19.USED 344
+WIRE.CLK_HROUTE_R2.USED 378
+WIRE.CLK_HROUTE_R20.USED 342
+WIRE.CLK_HROUTE_R21.USED 340
+WIRE.CLK_HROUTE_R22.USED 338
+WIRE.CLK_HROUTE_R23.USED 336
+WIRE.CLK_HROUTE_R3.USED 376
+WIRE.CLK_HROUTE_R4.USED 374
+WIRE.CLK_HROUTE_R5.USED 372
+WIRE.CLK_HROUTE_R6.USED 370
+WIRE.CLK_HROUTE_R7.USED 368
+WIRE.CLK_HROUTE_R8.USED 366
+WIRE.CLK_HROUTE_R9.USED 364
diff --git a/RCLK_DSP_INTF_L.bits b/RCLK_DSP_INTF_L.bits
new file mode 100644
index 0000000..043eb12
--- /dev/null
+++ b/RCLK_DSP_INTF_L.bits
@@ -0,0 +1,56 @@
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_IN.CLK_CMT_DRVR_TRI_ESD_0_CLK_OUT_SCHMITT_B
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_IN.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B 226
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_OUT.CLK_BUFCE_ROW_FSR_0_CE_PRE_OPTINV 234
+PIP.CLK_BUFCE_ROW_FSR_0_CLK_OUT.CLK_BUFCE_ROW_FSR_0_CLK_IN 233
+PIP.CLK_BUFCE_ROW_FSR_2_CLK_IN.CLK_CMT_DRVR_TRI_ESD_4_CLK_OUT_SCHMITT_B
+PIP.CLK_BUFCE_ROW_FSR_2_CLK_IN.CLK_CMT_DRVR_TRI_ESD_5_CLK_OUT_SCHMITT_B 274
+PIP.CLK_BUFCE_ROW_FSR_2_CLK_OUT.CLK_BUFCE_ROW_FSR_2_CE_PRE_OPTINV 282
+PIP.CLK_BUFCE_ROW_FSR_2_CLK_OUT.CLK_BUFCE_ROW_FSR_2_CLK_IN 281
+PIP.CLK_CMT_DRVR_TRI_ESD_0_CLK_OUT_SCHMITT_B.CLK_VDISTR_BOT0 212
+PIP.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B.CLK_VDISTR_TOP0 211
+PIP.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B.CLK_VROUTE_BOT0 210
+PIP.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B.CLK_VROUTE_TOP0 209
+PIP.CLK_CMT_DRVR_TRI_ESD_4_CLK_OUT_SCHMITT_B.CLK_VDISTR_BOT1 260
+PIP.CLK_CMT_DRVR_TRI_ESD_5_CLK_OUT_SCHMITT_B.CLK_VDISTR_TOP1 259
+PIP.CLK_CMT_DRVR_TRI_ESD_6_CLK_OUT_SCHMITT_B.CLK_VROUTE_BOT1 258
+PIP.CLK_CMT_DRVR_TRI_ESD_7_CLK_OUT_SCHMITT_B.CLK_VROUTE_TOP1 257
+PIP.CLK_CMT_MUX_2TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_2TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B 225
+PIP.CLK_CMT_MUX_2TO1_3_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_6_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_2TO1_3_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_7_CLK_OUT_SCHMITT_B 273
+PIP.CLK_CMT_MUX_3TO1_0_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_1_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_0_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B 224
+PIP.CLK_CMT_MUX_3TO1_0_CLK_OUT.CLK_HROUTE_CORE_OPT0 223
+PIP.CLK_CMT_MUX_3TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_0_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_1_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B 222
+PIP.CLK_CMT_MUX_3TO1_1_CLK_OUT.CLK_HROUTE_CORE_OPT0 221
+PIP.CLK_CMT_MUX_3TO1_2_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_3_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_2_CLK_OUT.CLK_HROUTE_CORE_OPT0 219
+PIP.CLK_CMT_MUX_3TO1_3_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_2_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_3_CLK_OUT.CLK_HROUTE_CORE_OPT0 217
+PIP.CLK_CMT_MUX_3TO1_4_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_5_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_4_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_7_CLK_OUT_SCHMITT_B 272
+PIP.CLK_CMT_MUX_3TO1_4_CLK_OUT.CLK_HROUTE_CORE_OPT1 271
+PIP.CLK_CMT_MUX_3TO1_5_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_4_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_5_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_6_CLK_OUT_SCHMITT_B 270
+PIP.CLK_CMT_MUX_3TO1_5_CLK_OUT.CLK_HROUTE_CORE_OPT1 269
+PIP.CLK_CMT_MUX_3TO1_6_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_7_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_6_CLK_OUT.CLK_HROUTE_CORE_OPT1 267
+PIP.CLK_CMT_MUX_3TO1_7_CLK_OUT.CLK_CMT_DRVR_TRI_ESD_6_CLK_OUT_SCHMITT_B
+PIP.CLK_CMT_MUX_3TO1_7_CLK_OUT.CLK_HROUTE_CORE_OPT1 265
+PIP.CLK_HROUTE_CORE_OPT0.CLK_CMT_MUX_2TO1_1_CLK_OUT 238
+PIP.CLK_HROUTE_CORE_OPT1.CLK_CMT_MUX_2TO1_3_CLK_OUT 286
+PIP.CLK_TEST_BUF_SITE_1_CLK_IN.CLK_BUFCE_ROW_FSR_0_CLK_OUT 239
+PIP.CLK_TEST_BUF_SITE_3_CLK_IN.CLK_BUFCE_ROW_FSR_2_CLK_OUT 287
+PIP.CLK_VDISTR_BOT0.CLK_CMT_MUX_3TO1_0_CLK_OUT 212 216
+PIP.CLK_VDISTR_BOT1.CLK_CMT_MUX_3TO1_4_CLK_OUT 260 264
+PIP.CLK_VDISTR_TOP0.CLK_CMT_MUX_3TO1_1_CLK_OUT 211 215
+PIP.CLK_VDISTR_TOP1.CLK_CMT_MUX_3TO1_5_CLK_OUT 259 263
+PIP.CLK_VROUTE_BOT0.CLK_CMT_MUX_3TO1_2_CLK_OUT 210 214
+PIP.CLK_VROUTE_BOT1.CLK_CMT_MUX_3TO1_6_CLK_OUT 258 262
+PIP.CLK_VROUTE_TOP0.CLK_CMT_MUX_3TO1_3_CLK_OUT 209 213
+PIP.CLK_VROUTE_TOP1.CLK_CMT_MUX_3TO1_7_CLK_OUT 257 261
+WIRE.CLK_HROUTE_CORE_OPT0.USED 236
+WIRE.CLK_HROUTE_CORE_OPT1.USED 284
+WIRE.CLK_TEST_BUF_SITE_1_CLK_IN.USED 237
+WIRE.CLK_TEST_BUF_SITE_3_CLK_IN.USED 285
diff --git a/RCLK_INT_L.bits b/RCLK_INT_L.bits
new file mode 100644
index 0000000..a507da9
--- /dev/null
+++ b/RCLK_INT_L.bits
@@ -0,0 +1,1483 @@
+BUFCE_LEAF_X0Y0.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X0Y0.BUFCE_LEAF.CEINV.1 108
+BUFCE_LEAF_X0Y0.BUFCE_LEAF.CE_TYPE.ASYNC 60
+BUFCE_LEAF_X0Y0.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X0Y0.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X0Y0.BUFCE_LEAF.IINV.1 12
+BUFCE_LEAF_X0Y0.BUFCE_LEAF.IN_USE 15
+BUFCE_LEAF_X0Y1.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X0Y1.BUFCE_LEAF.CEINV.1 1452
+BUFCE_LEAF_X0Y1.BUFCE_LEAF.CE_TYPE.ASYNC 1404
+BUFCE_LEAF_X0Y1.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X0Y1.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X0Y1.BUFCE_LEAF.IINV.1 1356
+BUFCE_LEAF_X0Y1.BUFCE_LEAF.IN_USE 1359
+BUFCE_LEAF_X0Y2.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X0Y2.BUFCE_LEAF.CEINV.1 126
+BUFCE_LEAF_X0Y2.BUFCE_LEAF.CE_TYPE.ASYNC 78
+BUFCE_LEAF_X0Y2.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X0Y2.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X0Y2.BUFCE_LEAF.IINV.1 30
+BUFCE_LEAF_X0Y2.BUFCE_LEAF.IN_USE 33
+BUFCE_LEAF_X0Y3.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X0Y3.BUFCE_LEAF.CEINV.1 1470
+BUFCE_LEAF_X0Y3.BUFCE_LEAF.CE_TYPE.ASYNC 1422
+BUFCE_LEAF_X0Y3.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X0Y3.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X0Y3.BUFCE_LEAF.IINV.1 1374
+BUFCE_LEAF_X0Y3.BUFCE_LEAF.IN_USE 1377
+BUFCE_LEAF_X1Y0.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X1Y0.BUFCE_LEAF.CEINV.1 114
+BUFCE_LEAF_X1Y0.BUFCE_LEAF.CE_TYPE.ASYNC 66
+BUFCE_LEAF_X1Y0.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X1Y0.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X1Y0.BUFCE_LEAF.IINV.1 18
+BUFCE_LEAF_X1Y0.BUFCE_LEAF.IN_USE 21
+BUFCE_LEAF_X1Y1.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X1Y1.BUFCE_LEAF.CEINV.1 1458
+BUFCE_LEAF_X1Y1.BUFCE_LEAF.CE_TYPE.ASYNC 1410
+BUFCE_LEAF_X1Y1.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X1Y1.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X1Y1.BUFCE_LEAF.IINV.1 1362
+BUFCE_LEAF_X1Y1.BUFCE_LEAF.IN_USE 1365
+BUFCE_LEAF_X1Y2.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X1Y2.BUFCE_LEAF.CEINV.1 120
+BUFCE_LEAF_X1Y2.BUFCE_LEAF.CE_TYPE.ASYNC 72
+BUFCE_LEAF_X1Y2.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X1Y2.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X1Y2.BUFCE_LEAF.IINV.1 24
+BUFCE_LEAF_X1Y2.BUFCE_LEAF.IN_USE 27
+BUFCE_LEAF_X1Y3.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X1Y3.BUFCE_LEAF.CEINV.1 1464
+BUFCE_LEAF_X1Y3.BUFCE_LEAF.CE_TYPE.ASYNC 1416
+BUFCE_LEAF_X1Y3.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X1Y3.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X1Y3.BUFCE_LEAF.IINV.1 1368
+BUFCE_LEAF_X1Y3.BUFCE_LEAF.IN_USE 1371
+BUFCE_LEAF_X2Y0.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X2Y0.BUFCE_LEAF.CEINV.1 690
+BUFCE_LEAF_X2Y0.BUFCE_LEAF.CE_TYPE.ASYNC 642
+BUFCE_LEAF_X2Y0.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X2Y0.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X2Y0.BUFCE_LEAF.IINV.1 594
+BUFCE_LEAF_X2Y0.BUFCE_LEAF.IN_USE 597
+BUFCE_LEAF_X2Y1.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X2Y1.BUFCE_LEAF.CEINV.1 2226
+BUFCE_LEAF_X2Y1.BUFCE_LEAF.CE_TYPE.ASYNC 2178
+BUFCE_LEAF_X2Y1.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X2Y1.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X2Y1.BUFCE_LEAF.IINV.1 2130
+BUFCE_LEAF_X2Y1.BUFCE_LEAF.IN_USE 2133
+BUFCE_LEAF_X2Y2.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X2Y2.BUFCE_LEAF.CEINV.1 696
+BUFCE_LEAF_X2Y2.BUFCE_LEAF.CE_TYPE.ASYNC 648
+BUFCE_LEAF_X2Y2.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X2Y2.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X2Y2.BUFCE_LEAF.IINV.1 600
+BUFCE_LEAF_X2Y2.BUFCE_LEAF.IN_USE 603
+BUFCE_LEAF_X2Y3.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X2Y3.BUFCE_LEAF.CEINV.1 2232
+BUFCE_LEAF_X2Y3.BUFCE_LEAF.CE_TYPE.ASYNC 2184
+BUFCE_LEAF_X2Y3.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X2Y3.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X2Y3.BUFCE_LEAF.IINV.1 2136
+BUFCE_LEAF_X2Y3.BUFCE_LEAF.IN_USE 2139
+BUFCE_LEAF_X3Y0.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X3Y0.BUFCE_LEAF.CEINV.1 684
+BUFCE_LEAF_X3Y0.BUFCE_LEAF.CE_TYPE.ASYNC 636
+BUFCE_LEAF_X3Y0.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X3Y0.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X3Y0.BUFCE_LEAF.IINV.1 588
+BUFCE_LEAF_X3Y0.BUFCE_LEAF.IN_USE 591
+BUFCE_LEAF_X3Y1.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X3Y1.BUFCE_LEAF.CEINV.1 2220
+BUFCE_LEAF_X3Y1.BUFCE_LEAF.CE_TYPE.ASYNC 2172
+BUFCE_LEAF_X3Y1.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X3Y1.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X3Y1.BUFCE_LEAF.IINV.1 2124
+BUFCE_LEAF_X3Y1.BUFCE_LEAF.IN_USE 2127
+BUFCE_LEAF_X3Y2.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X3Y2.BUFCE_LEAF.CEINV.1 702
+BUFCE_LEAF_X3Y2.BUFCE_LEAF.CE_TYPE.ASYNC 654
+BUFCE_LEAF_X3Y2.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X3Y2.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X3Y2.BUFCE_LEAF.IINV.1 606
+BUFCE_LEAF_X3Y2.BUFCE_LEAF.IN_USE 609
+BUFCE_LEAF_X3Y3.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X3Y3.BUFCE_LEAF.CEINV.1 2238
+BUFCE_LEAF_X3Y3.BUFCE_LEAF.CE_TYPE.ASYNC 2190
+BUFCE_LEAF_X3Y3.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X3Y3.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X3Y3.BUFCE_LEAF.IINV.1 2142
+BUFCE_LEAF_X3Y3.BUFCE_LEAF.IN_USE 2145
+BUFCE_LEAF_X4Y0.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X4Y0.BUFCE_LEAF.CEINV.1 678
+BUFCE_LEAF_X4Y0.BUFCE_LEAF.CE_TYPE.ASYNC 630
+BUFCE_LEAF_X4Y0.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X4Y0.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X4Y0.BUFCE_LEAF.IINV.1 582
+BUFCE_LEAF_X4Y0.BUFCE_LEAF.IN_USE 585
+BUFCE_LEAF_X4Y1.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X4Y1.BUFCE_LEAF.CEINV.1 2214
+BUFCE_LEAF_X4Y1.BUFCE_LEAF.CE_TYPE.ASYNC 2166
+BUFCE_LEAF_X4Y1.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X4Y1.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X4Y1.BUFCE_LEAF.IINV.1 2118
+BUFCE_LEAF_X4Y1.BUFCE_LEAF.IN_USE 2121
+BUFCE_LEAF_X4Y2.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X4Y2.BUFCE_LEAF.CEINV.1 708
+BUFCE_LEAF_X4Y2.BUFCE_LEAF.CE_TYPE.ASYNC 660
+BUFCE_LEAF_X4Y2.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X4Y2.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X4Y2.BUFCE_LEAF.IINV.1 612
+BUFCE_LEAF_X4Y2.BUFCE_LEAF.IN_USE 615
+BUFCE_LEAF_X4Y3.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X4Y3.BUFCE_LEAF.CEINV.1 2244
+BUFCE_LEAF_X4Y3.BUFCE_LEAF.CE_TYPE.ASYNC 2196
+BUFCE_LEAF_X4Y3.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X4Y3.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X4Y3.BUFCE_LEAF.IINV.1 2148
+BUFCE_LEAF_X4Y3.BUFCE_LEAF.IN_USE 2151
+BUFCE_LEAF_X5Y0.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X5Y0.BUFCE_LEAF.CEINV.1 672
+BUFCE_LEAF_X5Y0.BUFCE_LEAF.CE_TYPE.ASYNC 624
+BUFCE_LEAF_X5Y0.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X5Y0.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X5Y0.BUFCE_LEAF.IINV.1 576
+BUFCE_LEAF_X5Y0.BUFCE_LEAF.IN_USE 579
+BUFCE_LEAF_X5Y1.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X5Y1.BUFCE_LEAF.CEINV.1 2208
+BUFCE_LEAF_X5Y1.BUFCE_LEAF.CE_TYPE.ASYNC 2160
+BUFCE_LEAF_X5Y1.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X5Y1.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X5Y1.BUFCE_LEAF.IINV.1 2112
+BUFCE_LEAF_X5Y1.BUFCE_LEAF.IN_USE 2115
+BUFCE_LEAF_X5Y2.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X5Y2.BUFCE_LEAF.CEINV.1 714
+BUFCE_LEAF_X5Y2.BUFCE_LEAF.CE_TYPE.ASYNC 666
+BUFCE_LEAF_X5Y2.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X5Y2.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X5Y2.BUFCE_LEAF.IINV.1 618
+BUFCE_LEAF_X5Y2.BUFCE_LEAF.IN_USE 621
+BUFCE_LEAF_X5Y3.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X5Y3.BUFCE_LEAF.CEINV.1 2250
+BUFCE_LEAF_X5Y3.BUFCE_LEAF.CE_TYPE.ASYNC 2202
+BUFCE_LEAF_X5Y3.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X5Y3.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X5Y3.BUFCE_LEAF.IINV.1 2154
+BUFCE_LEAF_X5Y3.BUFCE_LEAF.IN_USE 2157
+BUFCE_LEAF_X6Y0.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X6Y0.BUFCE_LEAF.CEINV.1 1440
+BUFCE_LEAF_X6Y0.BUFCE_LEAF.CE_TYPE.ASYNC 1392
+BUFCE_LEAF_X6Y0.BUFCE_LEAF.CE_TYPE.SYNC
+BUFCE_LEAF_X6Y0.BUFCE_LEAF.IINV.0
+BUFCE_LEAF_X6Y0.BUFCE_LEAF.IINV.1 1344
+BUFCE_LEAF_X6Y0.BUFCE_LEAF.IN_USE 1347
+BUFCE_LEAF_X6Y1.BUFCE_LEAF.CEINV.0
+BUFCE_LEAF_X6Y1.BUFCE_LEAF.CEINV.1 2988
+BUFCE_LEAF_X6Y1.BUFCE_LEAF.CE_TYPE.ASYNC 2940
+BUFCE_LEAF_X6Y1.BUFCE_LEAF.CE_TYPE.SYNC
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+PIP.CLK_LEAF_SITES_21_CLK_IN.CLK_HDISTR_FT0_4 2169 2218
+PIP.CLK_LEAF_SITES_21_CLK_IN.CLK_HDISTR_FT0_5 2125 2169 2170
+PIP.CLK_LEAF_SITES_21_CLK_IN.CLK_HDISTR_FT0_6 2217 2219
+PIP.CLK_LEAF_SITES_21_CLK_IN.CLK_HDISTR_FT0_7 2171 2217
+PIP.CLK_LEAF_SITES_21_CLK_IN.CLK_HDISTR_FT0_8 2123 2217
+PIP.CLK_LEAF_SITES_21_CLK_IN.CLK_HDISTR_FT0_9 2217 2266
+PIP.CLK_LEAF_SITES_21_CLK_LEAF.CLK_LEAF_SITES_21_CE_INT 2166
+PIP.CLK_LEAF_SITES_21_CLK_LEAF.CLK_LEAF_SITES_21_CLK_IN
+PIP.CLK_LEAF_SITES_22_CE_INT.INT_NODE_IMUX_12_INT_OUT0 88
+PIP.CLK_LEAF_SITES_22_CE_INT.INT_NODE_IMUX_14_INT_OUT1 280
+PIP.CLK_LEAF_SITES_22_CE_INT.INT_NODE_IMUX_16_INT_OUT1 470
+PIP.CLK_LEAF_SITES_22_CE_INT.INT_NODE_IMUX_18_INT_OUT1 87
+PIP.CLK_LEAF_SITES_22_CE_INT.INT_NODE_IMUX_21_INT_OUT0 566
+PIP.CLK_LEAF_SITES_22_CE_INT.INT_NODE_IMUX_23_INT_OUT0 183
+PIP.CLK_LEAF_SITES_22_CE_INT.VCC_WIRE
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_0 2175 2225
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_1 2175 2177
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_10 2223 2224
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_11 2176 2223
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_12 2225 2271
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_13 2177 2271
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_14 2129 2271
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_15 2271 2272
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_16 2224 2271
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_17 2176 2271
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_18 2128 2225
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_19 2128 2177
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_2 2129 2175
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_20 2128 2129
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_21 2128 2272
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_22 2128 2224
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_23 1351 1353 1359 1363 2113 2115 2128 2176
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_3 2175 2272
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_4 2175 2224
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_5 2175 2176
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_6 2223 2225
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_7 2177 2223
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_8 2129 2223
+PIP.CLK_LEAF_SITES_22_CLK_IN.CLK_HDISTR_FT0_9 2223 2272
+PIP.CLK_LEAF_SITES_22_CLK_LEAF.CLK_LEAF_SITES_22_CE_INT 2172
+PIP.CLK_LEAF_SITES_22_CLK_LEAF.CLK_LEAF_SITES_22_CLK_IN
+PIP.CLK_LEAF_SITES_23_CE_INT.INT_NODE_IMUX_14_INT_OUT1 568
+PIP.CLK_LEAF_SITES_23_CE_INT.INT_NODE_IMUX_16_INT_OUT1 376
+PIP.CLK_LEAF_SITES_23_CE_INT.INT_NODE_IMUX_18_INT_OUT1 184
+PIP.CLK_LEAF_SITES_23_CE_INT.INT_NODE_IMUX_20_INT_OUT0 185
+PIP.CLK_LEAF_SITES_23_CE_INT.VCC_WIRE
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_0 2181 2231
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_1 2181 2183
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_10 2229 2230
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_11 589 2137 2139 2143 2145 2149 2151 2182 2229 2901
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_12 2231 2277
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_13 2183 2277
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_14 2135 2277
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_15 2277 2278
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_16 2230 2277
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_17 2182 2277
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_18 2134 2231
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_19 2134 2183
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_2 2135 2181
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_20 2134 2135
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_21 2134 2278
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_22 2134 2230
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_23 2134 2182
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_3 2181 2278
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_4 2181 2230
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_5 2181 2182
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_6 2229 2231
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_7 2183 2229
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_8 2135 2229
+PIP.CLK_LEAF_SITES_23_CLK_IN.CLK_HDISTR_FT0_9 2229 2278
+PIP.CLK_LEAF_SITES_23_CLK_LEAF.CLK_LEAF_SITES_23_CE_INT 2178
+PIP.CLK_LEAF_SITES_23_CLK_LEAF.CLK_LEAF_SITES_23_CLK_IN
+PIP.CLK_LEAF_SITES_24_CE_INT.INT_NODE_IMUX_14_INT_OUT1 328
+PIP.CLK_LEAF_SITES_24_CE_INT.INT_NODE_IMUX_16_INT_OUT1 424
+PIP.CLK_LEAF_SITES_24_CE_INT.INT_NODE_IMUX_18_INT_OUT1 136
+PIP.CLK_LEAF_SITES_24_CE_INT.INT_NODE_IMUX_20_INT_OUT0 137
+PIP.CLK_LEAF_SITES_24_CE_INT.VCC_WIRE
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+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_1 2187 2189
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_10 2235 2236
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_11 1387 2188 2235
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_12 2237 2283
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_13 2189 2283
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_14 2141 2283
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+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_16 2236 2283
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_17 2188 2283
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_18 2140 2237
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_19 2140 2189
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_2 2141 2187
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_20 2140 2141
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_21 2140 2284
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_22 2140 2236
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_23 2140 2188
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_3 2187 2284
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_4 2187 2236
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_5 2187 2188
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_6 2235 2237
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_7 2189 2235
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_8 2141 2235
+PIP.CLK_LEAF_SITES_24_CLK_IN.CLK_HDISTR_FT0_9 2235 2284
+PIP.CLK_LEAF_SITES_24_CLK_LEAF.CLK_LEAF_SITES_24_CE_INT 2184
+PIP.CLK_LEAF_SITES_24_CLK_LEAF.CLK_LEAF_SITES_24_CLK_IN
+PIP.CLK_LEAF_SITES_25_CE_INT.INT_NODE_IMUX_12_INT_OUT0 40
+PIP.CLK_LEAF_SITES_25_CE_INT.INT_NODE_IMUX_14_INT_OUT1 422
+PIP.CLK_LEAF_SITES_25_CE_INT.INT_NODE_IMUX_16_INT_OUT1 518
+PIP.CLK_LEAF_SITES_25_CE_INT.INT_NODE_IMUX_18_INT_OUT1 39
+PIP.CLK_LEAF_SITES_25_CE_INT.INT_NODE_IMUX_21_INT_OUT0 232
+PIP.CLK_LEAF_SITES_25_CE_INT.INT_NODE_IMUX_23_INT_OUT0 135
+PIP.CLK_LEAF_SITES_25_CE_INT.VCC_WIRE
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+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_1 2193 2195
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+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_11 2194 2241
+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_12 2243 2289
+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_13 2195 2289
+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_14 2147 2289
+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_15 2289 2290
+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_16 2242 2289
+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_17 2194 2289
+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_18 2146 2243
+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_19 2146 2195
+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_2 2147 2193
+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_20 2146 2147
+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_21 2146 2290
+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_22 2146 2242
+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_23 2142 2146 2194
+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_3 2193 2290
+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_4 2193 2242
+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_5 2193 2194
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+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_7 2195 2241
+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_8 2147 2241
+PIP.CLK_LEAF_SITES_25_CLK_IN.CLK_HDISTR_FT0_9 2241 2290
+PIP.CLK_LEAF_SITES_25_CLK_LEAF.CLK_LEAF_SITES_25_CE_INT 2190
+PIP.CLK_LEAF_SITES_25_CLK_LEAF.CLK_LEAF_SITES_25_CLK_IN
+PIP.CLK_LEAF_SITES_26_CE_INT.INT_NODE_IMUX_12_INT_OUT0 8
+PIP.CLK_LEAF_SITES_26_CE_INT.INT_NODE_IMUX_16_INT_OUT1 103
+PIP.CLK_LEAF_SITES_26_CE_INT.INT_NODE_IMUX_17_INT_OUT1 486
+PIP.CLK_LEAF_SITES_26_CE_INT.INT_NODE_IMUX_18_INT_OUT1 200
+PIP.CLK_LEAF_SITES_26_CE_INT.INT_NODE_IMUX_21_INT_OUT0 296
+PIP.CLK_LEAF_SITES_26_CE_INT.INT_NODE_IMUX_23_INT_OUT0 104
+PIP.CLK_LEAF_SITES_26_CE_INT.VCC_WIRE
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+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_1 2199 2201
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_10 2247 2248
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+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_12 2249 2295
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_13 2201 2295
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_14 2153 2295
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_15 2295 2296
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_16 2248 2295
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_17 2200 2295
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_18 2152 2249
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_19 2152 2201
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_2 2153 2199
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_20 2152 2153
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_21 2152 2296
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_22 2152 2248
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_23 2152 2200
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_3 2199 2296
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_4 2199 2248
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_5 2199 2200
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_6 2247 2249
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_7 2201 2247
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_8 2153 2247
+PIP.CLK_LEAF_SITES_26_CLK_IN.CLK_HDISTR_FT0_9 2247 2296
+PIP.CLK_LEAF_SITES_26_CLK_LEAF.CLK_LEAF_SITES_26_CE_INT 2196
+PIP.CLK_LEAF_SITES_26_CLK_LEAF.CLK_LEAF_SITES_26_CLK_IN
+PIP.CLK_LEAF_SITES_27_CE_INT.INT_NODE_IMUX_12_INT_OUT0 102
+PIP.CLK_LEAF_SITES_27_CE_INT.INT_NODE_IMUX_17_INT_OUT1 198
+PIP.CLK_LEAF_SITES_27_CE_INT.INT_NODE_IMUX_19_INT_OUT1 294
+PIP.CLK_LEAF_SITES_27_CE_INT.INT_NODE_IMUX_21_INT_OUT0 390
+PIP.CLK_LEAF_SITES_27_CE_INT.INT_NODE_IMUX_23_INT_OUT0 7
+PIP.CLK_LEAF_SITES_27_CE_INT.VCC_WIRE
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_0 2205 2255
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_1 2205 2207
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_10 2253 2254
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_11 601 619 621 1369 1371 1387 1389 1425 2113 2115 2119 2206 2253 2893
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_12 2255 2301
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_13 2207 2301
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_14 2159 2301
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_15 2301 2302
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_16 2254 2301
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_17 2206 2301
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_18 2158 2255
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_19 2158 2207
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_2 2155 2159 2205
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_20 2158 2159
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_21 2158 2302
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_22 2158 2254
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_23 2158 2206
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_3 2205 2302
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_4 2205 2254
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_5 2205 2206
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_6 2253 2255
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_7 2207 2253
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_8 2159 2253
+PIP.CLK_LEAF_SITES_27_CLK_IN.CLK_HDISTR_FT0_9 2253 2302
+PIP.CLK_LEAF_SITES_27_CLK_LEAF.CLK_LEAF_SITES_27_CE_INT 2202
+PIP.CLK_LEAF_SITES_27_CLK_LEAF.CLK_LEAF_SITES_27_CLK_IN
+PIP.CLK_LEAF_SITES_28_CE_INT.INT_NODE_IMUX_13_INT_OUT0 436
+PIP.CLK_LEAF_SITES_28_CE_INT.INT_NODE_IMUX_15_INT_OUT0 53
+PIP.CLK_LEAF_SITES_28_CE_INT.INT_NODE_IMUX_17_INT_OUT1 532
+PIP.CLK_LEAF_SITES_28_CE_INT.INT_NODE_IMUX_19_INT_OUT1 340
+PIP.CLK_LEAF_SITES_28_CE_INT.INT_NODE_IMUX_22_INT_OUT0 149
+PIP.CLK_LEAF_SITES_28_CE_INT.VCC_WIRE
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+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_1 2943 2945
+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_10 2991 2992
+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_11 25 31 78 613 619 621 1345 1347 1395 2118 2124 2127 2133 2149 2223 2892 2899 2901 2944 2991
+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_12 2993 3039
+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_13 2945 3039
+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_14 2897 3039
+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_15 3039 3040
+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_16 2992 3039
+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_17 2944 3039
+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_18 2896 2993
+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_19 2896 2945
+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_2 2897 2943
+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_20 2896 2897
+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_21 2896 3040
+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_22 1351 2896 2992
+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_23 1359 2896 2944
+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_3 2943 3040
+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_4 2943 2992
+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_5 2943 2944
+PIP.CLK_LEAF_SITES_28_CLK_IN.CLK_HDISTR_FT0_6 2991 2993
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+PIP.CLK_LEAF_SITES_29_CE_INT.INT_NODE_IMUX_17_INT_OUT1 244
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+PIP.CLK_LEAF_SITES_29_CE_INT.VCC_WIRE
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+WIRE.CLK_LEAF_SITES_0_CLK_LEAF.DRIVEN 13
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diff --git a/frames.txt b/frames.txt
new file mode 100644
index 0000000..b61ab08
--- /dev/null
+++ b/frames.txt
@@ -0,0 +1,51908 @@
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diff --git a/tiles.json b/tiles.json
new file mode 100644
index 0000000..a21d2f3
--- /dev/null
+++ b/tiles.json
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