diff --git a/minitests/opentitan/.gitignore b/minitests/opentitan/.gitignore
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index 0000000..170e144
--- /dev/null
+++ b/minitests/opentitan/.gitignore
@@ -0,0 +1 @@
+src.yosys/*.v
diff --git a/minitests/opentitan/src/Makefile b/minitests/opentitan/src.vivado/Makefile
similarity index 100%
rename from minitests/opentitan/src/Makefile
rename to minitests/opentitan/src.vivado/Makefile
diff --git a/minitests/opentitan/src/boot_rom_fpga_nexysvideo.vmem b/minitests/opentitan/src.vivado/boot_rom_fpga_nexysvideo.vmem
similarity index 100%
rename from minitests/opentitan/src/boot_rom_fpga_nexysvideo.vmem
rename to minitests/opentitan/src.vivado/boot_rom_fpga_nexysvideo.vmem
diff --git a/minitests/opentitan/src/lowrisc_constants_top_pkg_0/rtl/top_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_constants_top_pkg_0/rtl/top_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_constants_top_pkg_0/rtl/top_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_constants_top_pkg_0/rtl/top_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_dv_pins_if_0/pins_if.sv b/minitests/opentitan/src.vivado/lowrisc_dv_pins_if_0/pins_if.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_dv_pins_if_0/pins_if.sv
rename to minitests/opentitan/src.vivado/lowrisc_dv_pins_if_0/pins_if.sv
diff --git a/minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_alu.sv b/minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_alu.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_alu.sv
rename to minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_alu.sv
diff --git a/minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_compressed_decoder.sv b/minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_compressed_decoder.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_compressed_decoder.sv
rename to minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_compressed_decoder.sv
diff --git a/minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_controller.sv b/minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_controller.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_controller.sv
rename to minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_controller.sv
diff --git a/minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_core.sv b/minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_core.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_core.sv
rename to minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_core.sv
diff --git a/minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_cs_registers.sv b/minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_cs_registers.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_cs_registers.sv
rename to minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_cs_registers.sv
diff --git a/minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_decoder.sv b/minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_decoder.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_decoder.sv
rename to minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_decoder.sv
diff --git a/minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_ex_block.sv b/minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_ex_block.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_ex_block.sv
rename to minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_ex_block.sv
diff --git a/minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_fetch_fifo.sv b/minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_fetch_fifo.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_fetch_fifo.sv
rename to minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_fetch_fifo.sv
diff --git a/minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_id_stage.sv b/minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_id_stage.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_id_stage.sv
rename to minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_id_stage.sv
diff --git a/minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_if_stage.sv b/minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_if_stage.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_if_stage.sv
rename to minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_if_stage.sv
diff --git a/minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_load_store_unit.sv b/minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_load_store_unit.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_load_store_unit.sv
rename to minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_load_store_unit.sv
diff --git a/minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_multdiv_fast.sv b/minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_multdiv_fast.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_multdiv_fast.sv
rename to minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_multdiv_fast.sv
diff --git a/minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_multdiv_slow.sv b/minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_multdiv_slow.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_multdiv_slow.sv
rename to minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_multdiv_slow.sv
diff --git a/minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_pmp.sv b/minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_pmp.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_pmp.sv
rename to minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_pmp.sv
diff --git a/minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_prefetch_buffer.sv b/minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_prefetch_buffer.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_prefetch_buffer.sv
rename to minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_prefetch_buffer.sv
diff --git a/minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_register_file_ff.sv b/minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_register_file_ff.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ibex_ibex_core_0.1/rtl/ibex_register_file_ff.sv
rename to minitests/opentitan/src.vivado/lowrisc_ibex_ibex_core_0.1/rtl/ibex_register_file_ff.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes.sv b/minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_cipher_control.sv b/minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_cipher_control.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_cipher_control.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_cipher_control.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_cipher_core.sv b/minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_cipher_core.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_cipher_core.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_cipher_core.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_control.sv b/minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_control.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_control.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_control.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_core.sv b/minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_core.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_core.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_core.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_key_expand.sv b/minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_key_expand.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_key_expand.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_key_expand.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_mix_columns.sv b/minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_mix_columns.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_mix_columns.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_mix_columns.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_mix_single_column.sv b/minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_mix_single_column.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_mix_single_column.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_mix_single_column.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_reg_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_reg_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_reg_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_reg_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_reg_top.sv b/minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_reg_top.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_reg_top.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_reg_top.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_sbox.sv b/minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_sbox.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_sbox.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_sbox.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_sbox_canright.sv b/minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_sbox_canright.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_sbox_canright.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_sbox_canright.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_sbox_lut.sv b/minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_sbox_lut.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_sbox_lut.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_sbox_lut.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_shift_rows.sv b/minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_shift_rows.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_shift_rows.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_shift_rows.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_sub_bytes.sv b/minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_sub_bytes.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_aes_0.5/rtl/aes_sub_bytes.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_aes_0.5/rtl/aes_sub_bytes.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler.sv b/minitests/opentitan/src.vivado/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_accu.sv b/minitests/opentitan/src.vivado/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_accu.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_accu.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_accu.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_class.sv b/minitests/opentitan/src.vivado/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_class.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_class.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_class.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_esc_timer.sv b/minitests/opentitan/src.vivado/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_esc_timer.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_esc_timer.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_esc_timer.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_ping_timer.sv b/minitests/opentitan/src.vivado/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_ping_timer.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_ping_timer.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_ping_timer.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_reg_wrap.sv b/minitests/opentitan/src.vivado/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_reg_wrap.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_reg_wrap.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_alert_handler_component_0.1/rtl/alert_handler_reg_wrap.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_alert_handler_component_0.1/rtl/alert_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_ip_alert_handler_component_0.1/rtl/alert_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_alert_handler_component_0.1/rtl/alert_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_alert_handler_component_0.1/rtl/alert_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl.sv b/minitests/opentitan/src.vivado/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl_reg_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl_reg_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl_reg_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl_reg_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl_reg_top.sv b/minitests/opentitan/src.vivado/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl_reg_top.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl_reg_top.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_flash_ctrl_0.1/rtl/flash_ctrl_reg_top.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_erase_ctrl.sv b/minitests/opentitan/src.vivado/lowrisc_ip_flash_ctrl_0.1/rtl/flash_erase_ctrl.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_erase_ctrl.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_flash_ctrl_0.1/rtl/flash_erase_ctrl.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_mp.sv b/minitests/opentitan/src.vivado/lowrisc_ip_flash_ctrl_0.1/rtl/flash_mp.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_mp.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_flash_ctrl_0.1/rtl/flash_mp.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_phy.sv b/minitests/opentitan/src.vivado/lowrisc_ip_flash_ctrl_0.1/rtl/flash_phy.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_phy.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_flash_ctrl_0.1/rtl/flash_phy.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_prog_ctrl.sv b/minitests/opentitan/src.vivado/lowrisc_ip_flash_ctrl_0.1/rtl/flash_prog_ctrl.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_prog_ctrl.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_flash_ctrl_0.1/rtl/flash_prog_ctrl.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_rd_ctrl.sv b/minitests/opentitan/src.vivado/lowrisc_ip_flash_ctrl_0.1/rtl/flash_rd_ctrl.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_rd_ctrl.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_flash_ctrl_0.1/rtl/flash_rd_ctrl.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_flash_ctrl_pkg_0.1/rtl/flash_ctrl_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_ip_flash_ctrl_pkg_0.1/rtl/flash_ctrl_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_flash_ctrl_pkg_0.1/rtl/flash_ctrl_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_flash_ctrl_pkg_0.1/rtl/flash_ctrl_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_gpio_0.1/rtl/gpio.sv b/minitests/opentitan/src.vivado/lowrisc_ip_gpio_0.1/rtl/gpio.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_gpio_0.1/rtl/gpio.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_gpio_0.1/rtl/gpio.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_gpio_0.1/rtl/gpio_reg_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_ip_gpio_0.1/rtl/gpio_reg_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_gpio_0.1/rtl/gpio_reg_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_gpio_0.1/rtl/gpio_reg_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_gpio_0.1/rtl/gpio_reg_top.sv b/minitests/opentitan/src.vivado/lowrisc_ip_gpio_0.1/rtl/gpio_reg_top.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_gpio_0.1/rtl/gpio_reg_top.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_gpio_0.1/rtl/gpio_reg_top.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_hmac_0.1/rtl/hmac.sv b/minitests/opentitan/src.vivado/lowrisc_ip_hmac_0.1/rtl/hmac.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_hmac_0.1/rtl/hmac.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_hmac_0.1/rtl/hmac.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_hmac_0.1/rtl/hmac_core.sv b/minitests/opentitan/src.vivado/lowrisc_ip_hmac_0.1/rtl/hmac_core.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_hmac_0.1/rtl/hmac_core.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_hmac_0.1/rtl/hmac_core.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_hmac_0.1/rtl/hmac_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_ip_hmac_0.1/rtl/hmac_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_hmac_0.1/rtl/hmac_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_hmac_0.1/rtl/hmac_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_hmac_0.1/rtl/hmac_reg_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_ip_hmac_0.1/rtl/hmac_reg_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_hmac_0.1/rtl/hmac_reg_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_hmac_0.1/rtl/hmac_reg_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_hmac_0.1/rtl/hmac_reg_top.sv b/minitests/opentitan/src.vivado/lowrisc_ip_hmac_0.1/rtl/hmac_reg_top.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_hmac_0.1/rtl/hmac_reg_top.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_hmac_0.1/rtl/hmac_reg_top.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_hmac_0.1/rtl/sha2.sv b/minitests/opentitan/src.vivado/lowrisc_ip_hmac_0.1/rtl/sha2.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_hmac_0.1/rtl/sha2.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_hmac_0.1/rtl/sha2.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_hmac_0.1/rtl/sha2_pad.sv b/minitests/opentitan/src.vivado/lowrisc_ip_hmac_0.1/rtl/sha2_pad.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_hmac_0.1/rtl/sha2_pad.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_hmac_0.1/rtl/sha2_pad.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_nmi_gen_0.1/rtl/nmi_gen.sv b/minitests/opentitan/src.vivado/lowrisc_ip_nmi_gen_0.1/rtl/nmi_gen.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_nmi_gen_0.1/rtl/nmi_gen.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_nmi_gen_0.1/rtl/nmi_gen.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_nmi_gen_0.1/rtl/nmi_gen_reg_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_ip_nmi_gen_0.1/rtl/nmi_gen_reg_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_nmi_gen_0.1/rtl/nmi_gen_reg_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_nmi_gen_0.1/rtl/nmi_gen_reg_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_nmi_gen_0.1/rtl/nmi_gen_reg_top.sv b/minitests/opentitan/src.vivado/lowrisc_ip_nmi_gen_0.1/rtl/nmi_gen_reg_top.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_nmi_gen_0.1/rtl/nmi_gen_reg_top.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_nmi_gen_0.1/rtl/nmi_gen_reg_top.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux.sv b/minitests/opentitan/src.vivado/lowrisc_ip_pinmux_component_0.1/rtl/pinmux.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_pinmux_component_0.1/rtl/pinmux.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_rv_core_ibex_0.1/rtl/rv_core_ibex.sv b/minitests/opentitan/src.vivado/lowrisc_ip_rv_core_ibex_0.1/rtl/rv_core_ibex.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_rv_core_ibex_0.1/rtl/rv_core_ibex.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_rv_core_ibex_0.1/rtl/rv_core_ibex.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_rv_dm_0.1/rtl/rv_dm.sv b/minitests/opentitan/src.vivado/lowrisc_ip_rv_dm_0.1/rtl/rv_dm.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_rv_dm_0.1/rtl/rv_dm.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_rv_dm_0.1/rtl/rv_dm.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_rv_dm_0.1/rtl/tlul_adapter_host.sv b/minitests/opentitan/src.vivado/lowrisc_ip_rv_dm_0.1/rtl/tlul_adapter_host.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_rv_dm_0.1/rtl/tlul_adapter_host.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_rv_dm_0.1/rtl/tlul_adapter_host.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_rv_plic_component_0.1/rtl/rv_plic_gateway.sv b/minitests/opentitan/src.vivado/lowrisc_ip_rv_plic_component_0.1/rtl/rv_plic_gateway.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_rv_plic_component_0.1/rtl/rv_plic_gateway.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_rv_plic_component_0.1/rtl/rv_plic_gateway.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_rv_plic_component_0.1/rtl/rv_plic_target.sv b/minitests/opentitan/src.vivado/lowrisc_ip_rv_plic_component_0.1/rtl/rv_plic_target.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_rv_plic_component_0.1/rtl/rv_plic_target.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_rv_plic_component_0.1/rtl/rv_plic_target.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_rv_timer_0.1/rtl/rv_timer.sv b/minitests/opentitan/src.vivado/lowrisc_ip_rv_timer_0.1/rtl/rv_timer.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_rv_timer_0.1/rtl/rv_timer.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_rv_timer_0.1/rtl/rv_timer.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_rv_timer_0.1/rtl/rv_timer_reg_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_ip_rv_timer_0.1/rtl/rv_timer_reg_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_rv_timer_0.1/rtl/rv_timer_reg_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_rv_timer_0.1/rtl/rv_timer_reg_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_rv_timer_0.1/rtl/rv_timer_reg_top.sv b/minitests/opentitan/src.vivado/lowrisc_ip_rv_timer_0.1/rtl/rv_timer_reg_top.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_rv_timer_0.1/rtl/rv_timer_reg_top.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_rv_timer_0.1/rtl/rv_timer_reg_top.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_rv_timer_0.1/rtl/timer_core.sv b/minitests/opentitan/src.vivado/lowrisc_ip_rv_timer_0.1/rtl/timer_core.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_rv_timer_0.1/rtl/timer_core.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_rv_timer_0.1/rtl/timer_core.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_spi_device_0.1/rtl/spi_device.sv b/minitests/opentitan/src.vivado/lowrisc_ip_spi_device_0.1/rtl/spi_device.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_spi_device_0.1/rtl/spi_device.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_spi_device_0.1/rtl/spi_device.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_spi_device_0.1/rtl/spi_device_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_ip_spi_device_0.1/rtl/spi_device_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_spi_device_0.1/rtl/spi_device_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_spi_device_0.1/rtl/spi_device_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_spi_device_0.1/rtl/spi_device_reg_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_ip_spi_device_0.1/rtl/spi_device_reg_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_spi_device_0.1/rtl/spi_device_reg_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_spi_device_0.1/rtl/spi_device_reg_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_spi_device_0.1/rtl/spi_device_reg_top.sv b/minitests/opentitan/src.vivado/lowrisc_ip_spi_device_0.1/rtl/spi_device_reg_top.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_spi_device_0.1/rtl/spi_device_reg_top.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_spi_device_0.1/rtl/spi_device_reg_top.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_spi_device_0.1/rtl/spi_fwm_rxf_ctrl.sv b/minitests/opentitan/src.vivado/lowrisc_ip_spi_device_0.1/rtl/spi_fwm_rxf_ctrl.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_spi_device_0.1/rtl/spi_fwm_rxf_ctrl.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_spi_device_0.1/rtl/spi_fwm_rxf_ctrl.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_spi_device_0.1/rtl/spi_fwm_txf_ctrl.sv b/minitests/opentitan/src.vivado/lowrisc_ip_spi_device_0.1/rtl/spi_fwm_txf_ctrl.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_spi_device_0.1/rtl/spi_fwm_txf_ctrl.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_spi_device_0.1/rtl/spi_fwm_txf_ctrl.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_spi_device_0.1/rtl/spi_fwmode.sv b/minitests/opentitan/src.vivado/lowrisc_ip_spi_device_0.1/rtl/spi_fwmode.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_spi_device_0.1/rtl/spi_fwmode.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_spi_device_0.1/rtl/spi_fwmode.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_uart_0.1/rtl/uart.sv b/minitests/opentitan/src.vivado/lowrisc_ip_uart_0.1/rtl/uart.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_uart_0.1/rtl/uart.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_uart_0.1/rtl/uart.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_uart_0.1/rtl/uart_core.sv b/minitests/opentitan/src.vivado/lowrisc_ip_uart_0.1/rtl/uart_core.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_uart_0.1/rtl/uart_core.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_uart_0.1/rtl/uart_core.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_uart_0.1/rtl/uart_reg_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_ip_uart_0.1/rtl/uart_reg_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_uart_0.1/rtl/uart_reg_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_uart_0.1/rtl/uart_reg_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_uart_0.1/rtl/uart_reg_top.sv b/minitests/opentitan/src.vivado/lowrisc_ip_uart_0.1/rtl/uart_reg_top.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_uart_0.1/rtl/uart_reg_top.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_uart_0.1/rtl/uart_reg_top.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_uart_0.1/rtl/uart_rx.sv b/minitests/opentitan/src.vivado/lowrisc_ip_uart_0.1/rtl/uart_rx.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_uart_0.1/rtl/uart_rx.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_uart_0.1/rtl/uart_rx.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_uart_0.1/rtl/uart_tx.sv b/minitests/opentitan/src.vivado/lowrisc_ip_uart_0.1/rtl/uart_tx.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_uart_0.1/rtl/uart_tx.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_uart_0.1/rtl/uart_tx.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_consts_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_consts_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_consts_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_consts_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_in_pe.sv b/minitests/opentitan/src.vivado/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_in_pe.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_in_pe.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_in_pe.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_out_pe.sv b/minitests/opentitan/src.vivado/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_out_pe.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_out_pe.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_out_pe.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_pe.sv b/minitests/opentitan/src.vivado/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_pe.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_pe.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_pe.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_rx.sv b/minitests/opentitan/src.vivado/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_rx.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_rx.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_rx.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_tx.sv b/minitests/opentitan/src.vivado/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_tx.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_tx.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_tx.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_tx_mux.sv b/minitests/opentitan/src.vivado/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_tx_mux.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_tx_mux.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_tx_mux.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_usbdev_0.1/rtl/usbdev.sv b/minitests/opentitan/src.vivado/lowrisc_ip_usbdev_0.1/rtl/usbdev.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_usbdev_0.1/rtl/usbdev.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_usbdev_0.1/rtl/usbdev.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_usbdev_0.1/rtl/usbdev_flop_2syncpulse.sv b/minitests/opentitan/src.vivado/lowrisc_ip_usbdev_0.1/rtl/usbdev_flop_2syncpulse.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_ip_usbdev_0.1/rtl/usbdev_flop_2syncpulse.sv
rename to minitests/opentitan/src.vivado/lowrisc_ip_usbdev_0.1/rtl/usbdev_flop_2syncpulse.sv
diff --git a/minitests/opentitan/src/lowrisc_ip_usbdev_0.1/rtl/usbdev_iomux.sv b/minitests/opentitan/src.vivado/lowrisc_ip_usbdev_0.1/rtl/usbdev_iomux.sv
similarity index 100%
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diff --git a/minitests/opentitan/src/lowrisc_ip_usbdev_0.1/rtl/usbdev_linkstate.sv b/minitests/opentitan/src.vivado/lowrisc_ip_usbdev_0.1/rtl/usbdev_linkstate.sv
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diff --git a/minitests/opentitan/src/lowrisc_ip_usbdev_0.1/rtl/usbdev_reg_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_ip_usbdev_0.1/rtl/usbdev_reg_pkg.sv
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diff --git a/minitests/opentitan/src/lowrisc_ip_usbdev_0.1/rtl/usbdev_reg_top.sv b/minitests/opentitan/src.vivado/lowrisc_ip_usbdev_0.1/rtl/usbdev_reg_top.sv
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diff --git a/minitests/opentitan/src/lowrisc_ip_usbdev_0.1/rtl/usbdev_usbif.sv b/minitests/opentitan/src.vivado/lowrisc_ip_usbdev_0.1/rtl/usbdev_usbif.sv
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diff --git a/minitests/opentitan/src/lowrisc_ip_xbar_main_0.1/tl_main_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_ip_xbar_main_0.1/tl_main_pkg.sv
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diff --git a/minitests/opentitan/src/lowrisc_ip_xbar_main_0.1/xbar_main.sv b/minitests/opentitan/src.vivado/lowrisc_ip_xbar_main_0.1/xbar_main.sv
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diff --git a/minitests/opentitan/src/lowrisc_ip_xbar_peri_0.1/tl_peri_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_ip_xbar_peri_0.1/tl_peri_pkg.sv
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diff --git a/minitests/opentitan/src/lowrisc_ip_xbar_peri_0.1/xbar_peri.sv b/minitests/opentitan/src.vivado/lowrisc_ip_xbar_peri_0.1/xbar_peri.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_all_0.1/rtl/prim_alert_receiver.sv b/minitests/opentitan/src.vivado/lowrisc_prim_all_0.1/rtl/prim_alert_receiver.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_all_0.1/rtl/prim_arbiter_ppc.sv b/minitests/opentitan/src.vivado/lowrisc_prim_all_0.1/rtl/prim_arbiter_ppc.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_all_0.1/rtl/prim_clock_inverter.sv b/minitests/opentitan/src.vivado/lowrisc_prim_all_0.1/rtl/prim_clock_inverter.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_all_0.1/rtl/prim_esc_receiver.sv b/minitests/opentitan/src.vivado/lowrisc_prim_all_0.1/rtl/prim_esc_receiver.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_all_0.1/rtl/prim_fifo_async.sv b/minitests/opentitan/src.vivado/lowrisc_prim_all_0.1/rtl/prim_fifo_async.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_all_0.1/rtl/prim_filter.sv b/minitests/opentitan/src.vivado/lowrisc_prim_all_0.1/rtl/prim_filter.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_all_0.1/rtl/prim_filter_ctr.sv b/minitests/opentitan/src.vivado/lowrisc_prim_all_0.1/rtl/prim_filter_ctr.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_all_0.1/rtl/prim_flop_2sync.sv b/minitests/opentitan/src.vivado/lowrisc_prim_all_0.1/rtl/prim_flop_2sync.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_all_0.1/rtl/prim_intr_hw.sv b/minitests/opentitan/src.vivado/lowrisc_prim_all_0.1/rtl/prim_intr_hw.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_all_0.1/rtl/prim_lfsr.sv b/minitests/opentitan/src.vivado/lowrisc_prim_all_0.1/rtl/prim_lfsr.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_all_0.1/rtl/prim_packer.sv b/minitests/opentitan/src.vivado/lowrisc_prim_all_0.1/rtl/prim_packer.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_all_0.1/rtl/prim_pulse_sync.sv b/minitests/opentitan/src.vivado/lowrisc_prim_all_0.1/rtl/prim_pulse_sync.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_all_0.1/rtl/prim_ram_2p_adv.sv b/minitests/opentitan/src.vivado/lowrisc_prim_all_0.1/rtl/prim_ram_2p_adv.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_all_0.1/rtl/prim_ram_2p_async_adv.sv b/minitests/opentitan/src.vivado/lowrisc_prim_all_0.1/rtl/prim_ram_2p_async_adv.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_all_0.1/rtl/prim_secded_39_32_dec.sv b/minitests/opentitan/src.vivado/lowrisc_prim_all_0.1/rtl/prim_secded_39_32_dec.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_all_0.1/rtl/prim_secded_39_32_enc.sv b/minitests/opentitan/src.vivado/lowrisc_prim_all_0.1/rtl/prim_secded_39_32_enc.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_all_0.1/rtl/prim_sram_arbiter.sv b/minitests/opentitan/src.vivado/lowrisc_prim_all_0.1/rtl/prim_sram_arbiter.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_all_0.1/rtl/prim_subreg.sv b/minitests/opentitan/src.vivado/lowrisc_prim_all_0.1/rtl/prim_subreg.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_all_0.1/rtl/prim_subreg_ext.sv b/minitests/opentitan/src.vivado/lowrisc_prim_all_0.1/rtl/prim_subreg_ext.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_assert_0.1/rtl/prim_assert.sv b/minitests/opentitan/src.vivado/lowrisc_prim_assert_0.1/rtl/prim_assert.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_clock_gating_0/abstract/prim_clock_gating.sv b/minitests/opentitan/src.vivado/lowrisc_prim_clock_gating_0/abstract/prim_clock_gating.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_clock_mux2_0/abstract/prim_clock_mux2.sv b/minitests/opentitan/src.vivado/lowrisc_prim_clock_mux2_0/abstract/prim_clock_mux2.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_diff_decode_0/rtl/prim_diff_decode.sv b/minitests/opentitan/src.vivado/lowrisc_prim_diff_decode_0/rtl/prim_diff_decode.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_flash_0/abstract/prim_flash.sv b/minitests/opentitan/src.vivado/lowrisc_prim_flash_0/abstract/prim_flash.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_generic_clock_gating_0/rtl/prim_generic_clock_gating.sv b/minitests/opentitan/src.vivado/lowrisc_prim_generic_clock_gating_0/rtl/prim_generic_clock_gating.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_generic_flash_0/rtl/prim_generic_flash.sv b/minitests/opentitan/src.vivado/lowrisc_prim_generic_flash_0/rtl/prim_generic_flash.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_generic_pad_wrapper_0/rtl/prim_generic_pad_wrapper.sv b/minitests/opentitan/src.vivado/lowrisc_prim_generic_pad_wrapper_0/rtl/prim_generic_pad_wrapper.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_generic_ram_1p_0/rtl/prim_generic_ram_1p.sv b/minitests/opentitan/src.vivado/lowrisc_prim_generic_ram_1p_0/rtl/prim_generic_ram_1p.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_generic_ram_2p_0/rtl/prim_generic_ram_2p.sv b/minitests/opentitan/src.vivado/lowrisc_prim_generic_ram_2p_0/rtl/prim_generic_ram_2p.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_generic_rom_0/rtl/prim_generic_rom.sv b/minitests/opentitan/src.vivado/lowrisc_prim_generic_rom_0/rtl/prim_generic_rom.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_pad_wrapper_0/abstract/prim_pad_wrapper.sv b/minitests/opentitan/src.vivado/lowrisc_prim_pad_wrapper_0/abstract/prim_pad_wrapper.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_prim_pkg_0.1/rtl/prim_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_prim_prim_pkg_0.1/rtl/prim_pkg.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_ram_2p_0/abstract/prim_ram_2p.sv b/minitests/opentitan/src.vivado/lowrisc_prim_ram_2p_0/abstract/prim_ram_2p.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_rom_0/abstract/prim_rom.sv b/minitests/opentitan/src.vivado/lowrisc_prim_rom_0/abstract/prim_rom.sv
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diff --git a/minitests/opentitan/src/lowrisc_prim_xilinx_clock_gating_0/rtl/prim_xilinx_clock_gating.sv b/minitests/opentitan/src.vivado/lowrisc_prim_xilinx_clock_gating_0/rtl/prim_xilinx_clock_gating.sv
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rename from minitests/opentitan/src/lowrisc_prim_xilinx_clock_gating_0/rtl/prim_xilinx_clock_gating.sv
rename to minitests/opentitan/src.vivado/lowrisc_prim_xilinx_clock_gating_0/rtl/prim_xilinx_clock_gating.sv
diff --git a/minitests/opentitan/src/lowrisc_prim_xilinx_clock_mux2_0/rtl/prim_xilinx_clock_mux2.sv b/minitests/opentitan/src.vivado/lowrisc_prim_xilinx_clock_mux2_0/rtl/prim_xilinx_clock_mux2.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_prim_xilinx_clock_mux2_0/rtl/prim_xilinx_clock_mux2.sv
rename to minitests/opentitan/src.vivado/lowrisc_prim_xilinx_clock_mux2_0/rtl/prim_xilinx_clock_mux2.sv
diff --git a/minitests/opentitan/src/lowrisc_prim_xilinx_pad_wrapper_0/rtl/prim_xilinx_pad_wrapper.sv b/minitests/opentitan/src.vivado/lowrisc_prim_xilinx_pad_wrapper_0/rtl/prim_xilinx_pad_wrapper.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_prim_xilinx_pad_wrapper_0/rtl/prim_xilinx_pad_wrapper.sv
rename to minitests/opentitan/src.vivado/lowrisc_prim_xilinx_pad_wrapper_0/rtl/prim_xilinx_pad_wrapper.sv
diff --git a/minitests/opentitan/src/lowrisc_prim_xilinx_ram_2p_0/rtl/prim_xilinx_ram_2p.sv b/minitests/opentitan/src.vivado/lowrisc_prim_xilinx_ram_2p_0/rtl/prim_xilinx_ram_2p.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_prim_xilinx_ram_2p_0/rtl/prim_xilinx_ram_2p.sv
rename to minitests/opentitan/src.vivado/lowrisc_prim_xilinx_ram_2p_0/rtl/prim_xilinx_ram_2p.sv
diff --git a/minitests/opentitan/src/lowrisc_prim_xilinx_rom_0/rtl/prim_xilinx_rom.sv b/minitests/opentitan/src.vivado/lowrisc_prim_xilinx_rom_0/rtl/prim_xilinx_rom.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_prim_xilinx_rom_0/rtl/prim_xilinx_rom.sv
rename to minitests/opentitan/src.vivado/lowrisc_prim_xilinx_rom_0/rtl/prim_xilinx_rom.sv
diff --git a/minitests/opentitan/src/lowrisc_systems_top_earlgrey_0.1/rtl/autogen/top_earlgrey.sv b/minitests/opentitan/src.vivado/lowrisc_systems_top_earlgrey_0.1/rtl/autogen/top_earlgrey.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_systems_top_earlgrey_0.1/rtl/autogen/top_earlgrey.sv
rename to minitests/opentitan/src.vivado/lowrisc_systems_top_earlgrey_0.1/rtl/autogen/top_earlgrey.sv
diff --git a/minitests/opentitan/src/lowrisc_systems_top_earlgrey_0.1/rtl/padctl.sv b/minitests/opentitan/src.vivado/lowrisc_systems_top_earlgrey_0.1/rtl/padctl.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_systems_top_earlgrey_0.1/rtl/padctl.sv
rename to minitests/opentitan/src.vivado/lowrisc_systems_top_earlgrey_0.1/rtl/padctl.sv
diff --git a/minitests/opentitan/src/lowrisc_systems_top_earlgrey_zcu104_0.1/data/pins_zcu104.xdc b/minitests/opentitan/src.vivado/lowrisc_systems_top_earlgrey_zcu104_0.1/data/pins_zcu104.xdc
similarity index 100%
rename from minitests/opentitan/src/lowrisc_systems_top_earlgrey_zcu104_0.1/data/pins_zcu104.xdc
rename to minitests/opentitan/src.vivado/lowrisc_systems_top_earlgrey_zcu104_0.1/data/pins_zcu104.xdc
diff --git a/minitests/opentitan/src/lowrisc_systems_top_earlgrey_zcu104_0.1/rtl/clkgen_xilusp.sv b/minitests/opentitan/src.vivado/lowrisc_systems_top_earlgrey_zcu104_0.1/rtl/clkgen_xilusp.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_systems_top_earlgrey_zcu104_0.1/rtl/clkgen_xilusp.sv
rename to minitests/opentitan/src.vivado/lowrisc_systems_top_earlgrey_zcu104_0.1/rtl/clkgen_xilusp.sv
diff --git a/minitests/opentitan/src/lowrisc_systems_top_earlgrey_zcu104_0.1/rtl/top_earlgrey_zcu104.sv b/minitests/opentitan/src.vivado/lowrisc_systems_top_earlgrey_zcu104_0.1/rtl/top_earlgrey_zcu104.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_systems_top_earlgrey_zcu104_0.1/rtl/top_earlgrey_zcu104.sv
rename to minitests/opentitan/src.vivado/lowrisc_systems_top_earlgrey_zcu104_0.1/rtl/top_earlgrey_zcu104.sv
diff --git a/minitests/opentitan/src/lowrisc_tlul_adapter_reg_0.1/rtl/tlul_adapter_reg.sv b/minitests/opentitan/src.vivado/lowrisc_tlul_adapter_reg_0.1/rtl/tlul_adapter_reg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_tlul_adapter_reg_0.1/rtl/tlul_adapter_reg.sv
rename to minitests/opentitan/src.vivado/lowrisc_tlul_adapter_reg_0.1/rtl/tlul_adapter_reg.sv
diff --git a/minitests/opentitan/src/lowrisc_tlul_adapter_sram_0.1/rtl/tlul_adapter_sram.sv b/minitests/opentitan/src.vivado/lowrisc_tlul_adapter_sram_0.1/rtl/tlul_adapter_sram.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_tlul_adapter_sram_0.1/rtl/tlul_adapter_sram.sv
rename to minitests/opentitan/src.vivado/lowrisc_tlul_adapter_sram_0.1/rtl/tlul_adapter_sram.sv
diff --git a/minitests/opentitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv b/minitests/opentitan/src.vivado/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv
rename to minitests/opentitan/src.vivado/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv
diff --git a/minitests/opentitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert_multiple.sv b/minitests/opentitan/src.vivado/lowrisc_tlul_common_0.1/rtl/tlul_assert_multiple.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_tlul_common_0.1/rtl/tlul_assert_multiple.sv
rename to minitests/opentitan/src.vivado/lowrisc_tlul_common_0.1/rtl/tlul_assert_multiple.sv
diff --git a/minitests/opentitan/src/lowrisc_tlul_common_0.1/rtl/tlul_err.sv b/minitests/opentitan/src.vivado/lowrisc_tlul_common_0.1/rtl/tlul_err.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_tlul_common_0.1/rtl/tlul_err.sv
rename to minitests/opentitan/src.vivado/lowrisc_tlul_common_0.1/rtl/tlul_err.sv
diff --git a/minitests/opentitan/src/lowrisc_tlul_common_0.1/rtl/tlul_fifo_async.sv b/minitests/opentitan/src.vivado/lowrisc_tlul_common_0.1/rtl/tlul_fifo_async.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_tlul_common_0.1/rtl/tlul_fifo_async.sv
rename to minitests/opentitan/src.vivado/lowrisc_tlul_common_0.1/rtl/tlul_fifo_async.sv
diff --git a/minitests/opentitan/src/lowrisc_tlul_common_0.1/rtl/tlul_fifo_sync.sv b/minitests/opentitan/src.vivado/lowrisc_tlul_common_0.1/rtl/tlul_fifo_sync.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_tlul_common_0.1/rtl/tlul_fifo_sync.sv
rename to minitests/opentitan/src.vivado/lowrisc_tlul_common_0.1/rtl/tlul_fifo_sync.sv
diff --git a/minitests/opentitan/src/lowrisc_tlul_headers_0.1/rtl/tlul_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_tlul_headers_0.1/rtl/tlul_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_tlul_headers_0.1/rtl/tlul_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_tlul_headers_0.1/rtl/tlul_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_tlul_socket_1n_0.1/rtl/tlul_err_resp.sv b/minitests/opentitan/src.vivado/lowrisc_tlul_socket_1n_0.1/rtl/tlul_err_resp.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_tlul_socket_1n_0.1/rtl/tlul_err_resp.sv
rename to minitests/opentitan/src.vivado/lowrisc_tlul_socket_1n_0.1/rtl/tlul_err_resp.sv
diff --git a/minitests/opentitan/src/lowrisc_tlul_socket_1n_0.1/rtl/tlul_socket_1n.sv b/minitests/opentitan/src.vivado/lowrisc_tlul_socket_1n_0.1/rtl/tlul_socket_1n.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_tlul_socket_1n_0.1/rtl/tlul_socket_1n.sv
rename to minitests/opentitan/src.vivado/lowrisc_tlul_socket_1n_0.1/rtl/tlul_socket_1n.sv
diff --git a/minitests/opentitan/src/lowrisc_tlul_socket_m1_0.1/rtl/tlul_socket_m1.sv b/minitests/opentitan/src.vivado/lowrisc_tlul_socket_m1_0.1/rtl/tlul_socket_m1.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_tlul_socket_m1_0.1/rtl/tlul_socket_m1.sv
rename to minitests/opentitan/src.vivado/lowrisc_tlul_socket_m1_0.1/rtl/tlul_socket_m1.sv
diff --git a/minitests/opentitan/src/lowrisc_tlul_sram2tlul_0.1/rtl/sram2tlul.sv b/minitests/opentitan/src.vivado/lowrisc_tlul_sram2tlul_0.1/rtl/sram2tlul.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_tlul_sram2tlul_0.1/rtl/sram2tlul.sv
rename to minitests/opentitan/src.vivado/lowrisc_tlul_sram2tlul_0.1/rtl/sram2tlul.sv
diff --git a/minitests/opentitan/src/lowrisc_top_earlgrey_alert_handler_reg_0.1/rtl/autogen/alert_handler_reg_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_top_earlgrey_alert_handler_reg_0.1/rtl/autogen/alert_handler_reg_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_top_earlgrey_alert_handler_reg_0.1/rtl/autogen/alert_handler_reg_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_top_earlgrey_alert_handler_reg_0.1/rtl/autogen/alert_handler_reg_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_top_earlgrey_alert_handler_reg_0.1/rtl/autogen/alert_handler_reg_top.sv b/minitests/opentitan/src.vivado/lowrisc_top_earlgrey_alert_handler_reg_0.1/rtl/autogen/alert_handler_reg_top.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_top_earlgrey_alert_handler_reg_0.1/rtl/autogen/alert_handler_reg_top.sv
rename to minitests/opentitan/src.vivado/lowrisc_top_earlgrey_alert_handler_reg_0.1/rtl/autogen/alert_handler_reg_top.sv
diff --git a/minitests/opentitan/src/lowrisc_top_earlgrey_pinmux_reg_0.1/rtl/autogen/pinmux_reg_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_top_earlgrey_pinmux_reg_0.1/rtl/autogen/pinmux_reg_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_top_earlgrey_pinmux_reg_0.1/rtl/autogen/pinmux_reg_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_top_earlgrey_pinmux_reg_0.1/rtl/autogen/pinmux_reg_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_top_earlgrey_pinmux_reg_0.1/rtl/autogen/pinmux_reg_top.sv b/minitests/opentitan/src.vivado/lowrisc_top_earlgrey_pinmux_reg_0.1/rtl/autogen/pinmux_reg_top.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_top_earlgrey_pinmux_reg_0.1/rtl/autogen/pinmux_reg_top.sv
rename to minitests/opentitan/src.vivado/lowrisc_top_earlgrey_pinmux_reg_0.1/rtl/autogen/pinmux_reg_top.sv
diff --git a/minitests/opentitan/src/lowrisc_top_earlgrey_rv_plic_0.1/rtl/autogen/rv_plic.sv b/minitests/opentitan/src.vivado/lowrisc_top_earlgrey_rv_plic_0.1/rtl/autogen/rv_plic.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_top_earlgrey_rv_plic_0.1/rtl/autogen/rv_plic.sv
rename to minitests/opentitan/src.vivado/lowrisc_top_earlgrey_rv_plic_0.1/rtl/autogen/rv_plic.sv
diff --git a/minitests/opentitan/src/lowrisc_top_earlgrey_rv_plic_0.1/rtl/autogen/rv_plic_reg_pkg.sv b/minitests/opentitan/src.vivado/lowrisc_top_earlgrey_rv_plic_0.1/rtl/autogen/rv_plic_reg_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_top_earlgrey_rv_plic_0.1/rtl/autogen/rv_plic_reg_pkg.sv
rename to minitests/opentitan/src.vivado/lowrisc_top_earlgrey_rv_plic_0.1/rtl/autogen/rv_plic_reg_pkg.sv
diff --git a/minitests/opentitan/src/lowrisc_top_earlgrey_rv_plic_0.1/rtl/autogen/rv_plic_reg_top.sv b/minitests/opentitan/src.vivado/lowrisc_top_earlgrey_rv_plic_0.1/rtl/autogen/rv_plic_reg_top.sv
similarity index 100%
rename from minitests/opentitan/src/lowrisc_top_earlgrey_rv_plic_0.1/rtl/autogen/rv_plic_reg_top.sv
rename to minitests/opentitan/src.vivado/lowrisc_top_earlgrey_rv_plic_0.1/rtl/autogen/rv_plic_reg_top.sv
diff --git a/minitests/opentitan/src/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/debug_rom/debug_rom.sv b/minitests/opentitan/src.vivado/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/debug_rom/debug_rom.sv
similarity index 100%
rename from minitests/opentitan/src/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/debug_rom/debug_rom.sv
rename to minitests/opentitan/src.vivado/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/debug_rom/debug_rom.sv
diff --git a/minitests/opentitan/src/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dm_csrs.sv b/minitests/opentitan/src.vivado/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dm_csrs.sv
similarity index 100%
rename from minitests/opentitan/src/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dm_csrs.sv
rename to minitests/opentitan/src.vivado/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dm_csrs.sv
diff --git a/minitests/opentitan/src/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dm_mem.sv b/minitests/opentitan/src.vivado/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dm_mem.sv
similarity index 100%
rename from minitests/opentitan/src/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dm_mem.sv
rename to minitests/opentitan/src.vivado/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dm_mem.sv
diff --git a/minitests/opentitan/src/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dm_pkg.sv b/minitests/opentitan/src.vivado/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dm_pkg.sv
similarity index 100%
rename from minitests/opentitan/src/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dm_pkg.sv
rename to minitests/opentitan/src.vivado/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dm_pkg.sv
diff --git a/minitests/opentitan/src/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dm_sba.sv b/minitests/opentitan/src.vivado/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dm_sba.sv
similarity index 100%
rename from minitests/opentitan/src/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dm_sba.sv
rename to minitests/opentitan/src.vivado/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dm_sba.sv
diff --git a/minitests/opentitan/src/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dmi_cdc.sv b/minitests/opentitan/src.vivado/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dmi_cdc.sv
similarity index 100%
rename from minitests/opentitan/src/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dmi_cdc.sv
rename to minitests/opentitan/src.vivado/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dmi_cdc.sv
diff --git a/minitests/opentitan/src/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dmi_jtag.sv b/minitests/opentitan/src.vivado/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dmi_jtag.sv
similarity index 100%
rename from minitests/opentitan/src/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dmi_jtag.sv
rename to minitests/opentitan/src.vivado/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dmi_jtag.sv
diff --git a/minitests/opentitan/src/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dmi_jtag_tap.sv b/minitests/opentitan/src.vivado/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dmi_jtag_tap.sv
similarity index 100%
rename from minitests/opentitan/src/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dmi_jtag_tap.sv
rename to minitests/opentitan/src.vivado/pulp-platform_riscv-dbg_0.1_0/pulp_riscv_dbg/src/dmi_jtag_tap.sv
diff --git a/minitests/opentitan/src/runme.py b/minitests/opentitan/src.vivado/runme.py
similarity index 99%
rename from minitests/opentitan/src/runme.py
rename to minitests/opentitan/src.vivado/runme.py
index cdb537e..58fdd80 100755
--- a/minitests/opentitan/src/runme.py
+++ b/minitests/opentitan/src.vivado/runme.py
@@ -7,7 +7,7 @@
 
 os.makedirs(work_root, exist_ok=True)
 
-synth_tool = 'yosys' if 'USE_YOSYS' in os.environ else 'vivado'
+synth_tool = 'vivado'
 
 srcs = [
     'lowrisc_constants_top_pkg_0/rtl/top_pkg.sv',
diff --git a/minitests/opentitan/src/Makefile b/minitests/opentitan/src.yosys/Makefile
similarity index 100%
copy from minitests/opentitan/src/Makefile
copy to minitests/opentitan/src.yosys/Makefile
diff --git a/minitests/opentitan/src/boot_rom_fpga_nexysvideo.vmem b/minitests/opentitan/src.yosys/boot_rom_fpga_nexysvideo.vmem
similarity index 100%
copy from minitests/opentitan/src/boot_rom_fpga_nexysvideo.vmem
copy to minitests/opentitan/src.yosys/boot_rom_fpga_nexysvideo.vmem
diff --git a/minitests/opentitan/src/lowrisc_systems_top_earlgrey_zcu104_0.1/data/pins_zcu104.xdc b/minitests/opentitan/src.yosys/pins_zcu104.xdc
similarity index 100%
copy from minitests/opentitan/src/lowrisc_systems_top_earlgrey_zcu104_0.1/data/pins_zcu104.xdc
copy to minitests/opentitan/src.yosys/pins_zcu104.xdc
diff --git a/minitests/opentitan/src.yosys/runme.py b/minitests/opentitan/src.yosys/runme.py
new file mode 100755
index 0000000..2e3d964
--- /dev/null
+++ b/minitests/opentitan/src.yosys/runme.py
@@ -0,0 +1,207 @@
+import edalize
+import os
+
+work_root = 'build'
+
+post_imp_file = os.path.realpath(os.path.join(work_root, 'post.tcl'))
+
+os.makedirs(work_root, exist_ok=True)
+
+synth_tool = 'yosys'
+
+srcs = [
+    'pins_if.v',
+    'prim_generic_clock_gating.v',
+    'prim_generic_clock_mux2.v',
+    'prim_generic_flash.v',
+    'prim_generic_pad_wrapper.v',
+    'prim_generic_ram_1p.v',
+    'prim_generic_ram_2p.v',
+    'prim_xilinx_clock_gating.v',
+    'prim_xilinx_clock_mux2.v',
+    'prim_xilinx_pad_wrapper.v',
+    'prim_xilinx_ram_2p.v',
+    'ibex_alu.v',
+    'ibex_compressed_decoder.v',
+    'ibex_controller.v',
+    'ibex_cs_registers.v',
+    'ibex_decoder.v',
+    'ibex_ex_block.v',
+    'ibex_fetch_fifo.v',
+    'ibex_id_stage.v',
+    'ibex_if_stage.v',
+    'ibex_load_store_unit.v',
+    'ibex_multdiv_fast.v',
+    'ibex_multdiv_slow.v',
+    'ibex_prefetch_buffer.v',
+    'ibex_pmp.v',
+    'ibex_register_file_ff.v',
+    'ibex_core.v',
+    'prim_clock_gating.v',
+    'prim_clock_mux2.v',
+    'prim_diff_decode.v',
+    'prim_pad_wrapper.v',
+    'prim_ram_1p.v',
+    'prim_ram_2p.v',
+    'prim_clock_inverter.v',
+    'prim_alert_receiver.v',
+    'prim_alert_sender.v',
+    'prim_arbiter_ppc.v',
+    'prim_arbiter_tree.v',
+    'prim_esc_receiver.v',
+    'prim_esc_sender.v',
+    'prim_sram_arbiter.v',
+    'prim_fifo_async.v',
+    'prim_fifo_sync.v',
+    'prim_flop_2sync.v',
+    'prim_lfsr.v',
+    'prim_packer.v',
+    'prim_pulse_sync.v',
+    'prim_filter.v',
+    'prim_filter_ctr.v',
+    'prim_subreg.v',
+    'prim_subreg_ext.v',
+    'prim_intr_hw.v',
+    'prim_secded_39_32_enc.v',
+    'prim_secded_39_32_dec.v',
+    'prim_ram_2p_adv.v',
+    'prim_ram_2p_async_adv.v',
+    'prim_flash.v',
+    'alert_handler_reg_top.v',
+    'pinmux_reg_top.v',
+    'usb_fs_nb_in_pe.v',
+    'usb_fs_nb_out_pe.v',
+    'usb_fs_nb_pe.v',
+    'usb_fs_rx.v',
+    'usb_fs_tx.v',
+    'usb_fs_tx_mux.v',
+    'prim_generic_rom.v',
+    'prim_xilinx_rom.v',
+    'tlul_fifo_sync.v',
+    'tlul_fifo_async.v',
+    'tlul_assert.v',
+    'tlul_err.v',
+    'tlul_assert_multiple.v',
+    'debug_rom.v',
+    'dm_sba.v',
+    'dm_csrs.v',
+    'dm_mem.v',
+    'dmi_cdc.v',
+    'dmi_jtag.v',
+    'dmi_jtag_tap.v',
+    'prim_rom.v',
+    'tlul_adapter_reg.v',
+    'tlul_adapter_sram.v',
+    'tlul_err_resp.v',
+    'tlul_socket_1n.v',
+    'tlul_socket_m1.v',
+    'sram2tlul.v',
+    'aes_reg_top.v',
+    'aes_core.v',
+    'aes_control.v',
+    'aes_cipher_core.v',
+    'aes_cipher_control.v',
+    'aes_sub_bytes.v',
+    'aes_sbox.v',
+    'aes_sbox_lut.v',
+    'aes_sbox_canright.v',
+    'aes_shift_rows.v',
+    'aes_mix_columns.v',
+    'aes_mix_single_column.v',
+    'aes_key_expand.v',
+    'aes.v',
+    'alert_handler_reg_wrap.v',
+    'alert_handler_class.v',
+    'alert_handler_ping_timer.v',
+    'alert_handler_esc_timer.v',
+    'alert_handler_accu.v',
+    'alert_handler.v',
+    'flash_ctrl_reg_top.v',
+    'flash_ctrl.v',
+    'flash_erase_ctrl.v',
+    'flash_prog_ctrl.v',
+    'flash_rd_ctrl.v',
+    'flash_mp.v',
+    'flash_phy.v',
+    'gpio.v',
+    'gpio_reg_top.v',
+    'sha2.v',
+    'sha2_pad.v',
+    'hmac_reg_top.v',
+    'hmac_core.v',
+    'hmac.v',
+    'nmi_gen_reg_top.v',
+    'nmi_gen.v',
+    'pinmux.v',
+    'rv_core_ibex.v',
+    'rv_dm.v',
+    'tlul_adapter_host.v',
+    'rv_plic_gateway.v',
+    'rv_plic_target.v',
+    'rv_timer_reg_top.v',
+    'timer_core.v',
+    'rv_timer.v',
+    'spi_device_reg_top.v',
+    'spi_fwm_rxf_ctrl.v',
+    'spi_fwm_txf_ctrl.v',
+    'spi_fwmode.v',
+    'spi_device.v',
+    'uart_reg_top.v',
+    'uart_rx.v',
+    'uart_tx.v',
+    'uart_core.v',
+    'uart.v',
+    'usbdev_reg_top.v',
+    'usbdev_usbif.v',
+    'usbdev_flop_2syncpulse.v',
+    'usbdev_linkstate.v',
+    'usbdev_iomux.v',
+    'usbdev.v',
+    'xbar_main.v',
+    'xbar_peri.v',
+    'rv_plic_reg_top.v',
+    'rv_plic.v',
+    'padctl.v',
+    'top_earlgrey.v',
+    'clkgen_xilusp.v',
+    'top_earlgrey_zcu104.v',
+]
+
+with open(post_imp_file, 'w') as f:
+    f.write('write_checkpoint -force design.dcp')
+
+files = [
+    {'name': os.path.realpath('lowrisc_systems_top_earlgrey_zcu104_0.1/data/pins_zcu104.xdc'), 'file_type': 'xdc'},
+    {'name': os.path.realpath('lowrisc_prim_assert_0.1/rtl/prim_assert.sv'), 'file_type': 'systemVerilogSource', 'is_include_file': 'true'}
+]
+
+parameters = {
+    'ROM_INIT_FILE': {'datatype': 'str', 'paramtype': 'vlogdefine'},
+    'PRIM_DEFAULT_IMPL': {'datatype': 'str', 'paramtype': 'vlogdefine'},
+}
+
+for src in srcs:
+    files.append({'name': os.path.realpath(src), 'file_type': 'systemVerilogSource'})
+
+tool = 'vivado'
+
+incdirs = [os.path.realpath('lowrisc_prim_assert_0.1/rtl')]
+
+edam = {
+  'files' : files,
+  'name'  : 'design',
+  'toplevel': 'top_earlgrey_zcu104',
+  'parameters': parameters,
+  'tool_options' : {'vivado' : {
+    'part' : os.environ['XRAY_PART'],
+    'post_imp' : post_imp_file,
+    'synth' : synth_tool
+    }}
+}
+
+backend = edalize.get_edatool(tool)(edam=edam, work_root=work_root)
+
+args = ['--ROM_INIT_FILE={}'.format(os.path.realpath('boot_rom_fpga_nexysvideo.vmem'))]
+
+backend.configure(args)
+backend.build()
diff --git a/minitests/opentitan/sv2v.sh b/minitests/opentitan/sv2v.sh
new file mode 100755
index 0000000..e23dd3e
--- /dev/null
+++ b/minitests/opentitan/sv2v.sh
@@ -0,0 +1,30 @@
+set -x
+
+TMPDIR=$(mktemp -d)
+
+find src.vivado -name "*.sv" -exec cp {} $TMPDIR \;
+
+pushd $TMPDIR
+
+for file in *.sv; do
+    module=`basename -s .sv $file`
+    echo $file
+
+    if [ "$file" = "prim_generic_pad_wrapper.sv" ]; then
+        sv2v --define=VERILATOR --define=SYNTHESIS *_pkg.sv prim_assert.sv $file > ${module}.v
+    else
+        sv2v --define=SYNTHESIS *_pkg.sv prim_assert.sv $file > ${module}.v
+    fi
+
+
+    sed -i 's/parameter unsigned/parameter/g' ${module}.v
+    sed -i 's/localparam unsigned/localparam/g' ${module}.v
+done
+
+rm -Rf *_pkg.v
+
+popd
+
+cp $TMPDIR/*.v src.yosys/.
+
+rm -rf $TMPDIR