diff --git a/fuzzers/002-tilegrid/add_tdb.py b/fuzzers/002-tilegrid/add_tdb.py
index a5d0271..b05d219 100644
--- a/fuzzers/002-tilegrid/add_tdb.py
+++ b/fuzzers/002-tilegrid/add_tdb.py
@@ -74,8 +74,8 @@
     build_dir = "build_" + os.getenv('URAY_PART')
     tdb_fns = [
         ("cle/" + build_dir + "/segbits_tilegrid.tdb", 36, 3),
-        ("clel_int/" + build_dir + "/segbits_tilegrid.tdb", 60, 3),
-        ("clem_int/" + build_dir + "/segbits_tilegrid.tdb", 60, 3),
+        ("clel_int/" + build_dir + "/segbits_tilegrid.tdb", int_frames, int_words),
+        ("clem_int/" + build_dir + "/segbits_tilegrid.tdb", int_frames, int_words),
     ]
 
     for (tdb_fn, frames, words) in tdb_fns:
diff --git a/fuzzers/002-tilegrid/generate_full.py b/fuzzers/002-tilegrid/generate_full.py
index 810f5cf..3629496 100644
--- a/fuzzers/002-tilegrid/generate_full.py
+++ b/fuzzers/002-tilegrid/generate_full.py
@@ -40,75 +40,25 @@
     return tiles_by_grid
 
 
-def propagate_INT_lr_bits(database, tiles_by_grid, verbose=False):
-    '''Populate segment base addresses: L/R along INT column'''
-
-    int_frames, int_words, _ = localutil.get_entry('INT', 'CLB_IO_CLK')
-
-    verbose and print('')
-    for tile in database:
-        if database[tile]["type"] not in ["INT_L", "INT_R"]:
-            continue
-
-        if not database[tile]["bits"]:
-            continue
-
-        grid_x = database[tile]["grid_x"]
-        grid_y = database[tile]["grid_y"]
-        baseaddr = int(database[tile]["bits"]["CLB_IO_CLK"]["baseaddr"], 0)
-        offset = database[tile]["bits"]["CLB_IO_CLK"]["offset"]
-
-        if database[tile]["type"] == "INT_L":
-            grid_x += 1
-            baseaddr = baseaddr + 0x80
-        elif database[tile]["type"] == "INT_R":
-            grid_x -= 1
-            baseaddr = baseaddr - 0x80
-        else:
-            assert 0, database[tile]["type"]
-
-        # ROI at edge?
-        if (grid_x, grid_y) not in tiles_by_grid:
-            verbose and print('  Skip edge')
-            continue
-
-        other_tile = tiles_by_grid[(grid_x, grid_y)]
-
-        if database[tile]["type"] == "INT_L":
-            assert database[other_tile]["type"] == "INT_R"
-        elif database[tile]["type"] == "INT_R":
-            assert database[other_tile]["type"] == "INT_L"
-        else:
-            assert 0
-
-        localutil.add_tile_bits(
-            other_tile, database[other_tile], baseaddr, offset, int_frames,
-            int_words)
-
-
 def propagate_INT_bits_in_column(database, tiles_by_grid):
     """ Propigate INT offsets up and down INT columns.
 
     INT columns appear to be fairly regular, where starting from offset 0,
-    INT tiles next to INT tiles increase the word offset by 2.  The HCLK tile
-    is surrounded above and sometimes below by an INT tile.  Because the HCLK
-    tile only useds one word, the offset increase by one at the HCLK.
+    INT tiles next to INT tiles increase the word offset by 3.
 
     """
 
     seen_int = set()
 
-    int_frames, int_words, _ = localutil.get_entry('INT', 'CLB_IO_CLK')
-    hclk_frames, hclk_words, _ = localutil.get_entry('HCLK', 'CLB_IO_CLK')
+    int_frames, int_words = localutil.get_entry('INT', 'CLB_IO_CLK')
+    rclk_frames, rclk_words = localutil.get_entry('RCLK_INT_L', 'CLB_IO_CLK')
 
     for tile_name in sorted(database.keys()):
         tile = database[tile_name]
 
-        if tile['type'] not in ['INT_L', 'INT_R']:
+        if tile['type'] != 'INT':
             continue
 
-        l_or_r = tile['type'][-1]
-
         if not tile['bits']:
             continue
 
@@ -124,41 +74,37 @@
 
             if tile['bits']['CLB_IO_CLK']['offset'] == 0:
                 assert next_tile_type in [
-                    'B_TERM_INT', 'BRKH_INT', 'BRKH_B_TERM_INT'
+                    'INT_TERM_B', 'INT_RBRK'
                 ], next_tile_type
                 break
 
             baseaddr = int(tile['bits']['CLB_IO_CLK']['baseaddr'], 0)
             offset = tile['bits']['CLB_IO_CLK']['offset']
 
-            if tile['type'].startswith(
-                    'INT_') and next_tile_type == tile['type']:
+            if tile['type'] == 'INT' and next_tile_type == tile['type']:
                 # INT next to INT
                 offset -= int_words
                 localutil.add_tile_bits(
                     next_tile, database[next_tile], baseaddr, offset,
                     int_frames, int_words)
-            elif tile['type'].startswith('INT_'):
-                # INT above HCLK
-                assert next_tile_type.startswith(
-                    'HCLK_{}'.format(l_or_r)), next_tile_type
+            elif tile['type'] == 'INT':
+                # INT above RCLK
+                assert next_tile_type in ['RCLK_INT_L', 'RCLK_INT_R'], next_tile_type
 
-                offset -= hclk_words
+                offset -= rclk_words
                 localutil.add_tile_bits(
                     next_tile, database[next_tile], baseaddr, offset,
-                    hclk_frames, hclk_words)
+                    rclk_frames, rclk_words)
             else:
-                # HCLK above INT
-                assert tile['type'].startswith(
-                    'HCLK_{}'.format(l_or_r)), tile['type']
-                if next_tile_type == 'INT_{}'.format(l_or_r):
+                # RCLK above INT
+                assert tile['type'] in ['RCLK_INT_L', 'RCLK_INT_R'], tile['type']
+                if next_tile_type == 'INT':
                     offset -= int_words
                     localutil.add_tile_bits(
                         next_tile, database[next_tile], baseaddr, offset,
                         int_frames, int_words)
                 else:
-                    # Handle special case column where the PCIE tile is present.
-                    assert next_tile_type in ['PCIE_NULL'], next_tile_type
+                    assert next_tile_type in [], next_tile_type
                     break
 
             tile_name = next_tile
@@ -171,39 +117,35 @@
             next_tile = tiles_by_grid[(tile['grid_x'], tile['grid_y'] - 1)]
             next_tile_type = database[next_tile]['type']
 
-            if tile['bits']['CLB_IO_CLK']['offset'] == 99:
+            if tile['bits']['CLB_IO_CLK']['offset'] == 183:
                 assert next_tile_type in [
-                    'T_TERM_INT', 'BRKH_INT', 'BRKH_TERM_INT'
+                    'INT_TERM_T', 'INT_RBRK'
                 ], next_tile_type
                 break
 
             baseaddr = int(tile['bits']['CLB_IO_CLK']['baseaddr'], 0)
             offset = tile['bits']['CLB_IO_CLK']['offset']
 
-            if tile['type'].startswith(
-                    'INT_') and next_tile_type == tile['type']:
+            if tile['type'] == 'INT' and next_tile_type == tile['type']:
                 # INT next to INT
                 offset += int_words
                 localutil.add_tile_bits(
                     next_tile, database[next_tile], baseaddr, offset,
                     int_frames, int_words)
-            elif tile['type'].startswith('INT_'):
-                # INT below HCLK
-                assert next_tile_type.startswith(
-                    'HCLK_{}'.format(l_or_r)), next_tile_type
+            elif tile['type'] == 'INT':
+                # INT below RCLK
+                assert next_tile_type in ['RCLK_INT_L', 'RCLK_INT_R'], next_tile_type
 
                 offset += int_words
                 localutil.add_tile_bits(
                     next_tile, database[next_tile], baseaddr, offset,
-                    hclk_frames, hclk_words)
+                    rclk_frames, rclk_words)
             else:
-                # HCLK below INT
-                assert tile['type'].startswith(
-                    'HCLK_{}'.format(l_or_r)), tile['type']
-                assert next_tile_type == 'INT_{}'.format(
-                    l_or_r), next_tile_type
+                # RCLK below INT
+                assert tile['type'] in ['RCLK_INT_L', 'RCLK_INT_R'], tile['type']
+                assert next_tile_type == 'INT', next_tile_type
 
-                offset += hclk_words
+                offset += rclk_words
                 localutil.add_tile_bits(
                     next_tile, database[next_tile], baseaddr, offset,
                     int_frames, int_words)
@@ -448,8 +390,7 @@
     database = json.load(open(json_in_fn, "r"))
     tiles_by_grid = make_tiles_by_grid(database)
 
-    #propagate_INT_lr_bits(database, tiles_by_grid, verbose=verbose)
-    #propagate_INT_bits_in_column(database, tiles_by_grid)
+    propagate_INT_bits_in_column(database, tiles_by_grid)
     #propagate_rebuf(database, tiles_by_grid)
     #propagate_IOB_SING(database, tiles_by_grid)
     #propagate_IOI_SING(database, tiles_by_grid)
diff --git a/fuzzers/002-tilegrid/util.py b/fuzzers/002-tilegrid/util.py
index 1cc3fbf..728fa6f 100644
--- a/fuzzers/002-tilegrid/util.py
+++ b/fuzzers/002-tilegrid/util.py
@@ -9,19 +9,14 @@
 def get_entry(tile_type, block_type):
     """ Get frames and words for a given tile_type (e.g. CLBLL) and block_type (CLB_IO_CLK, BLOCK_RAM, etc). """
     return {
-        # (tile_type, block_type): (frames, words, height)
-        ("CLBLL", "CLB_IO_CLK"): (36, 2, None),
-        ("CLBLM", "CLB_IO_CLK"): (36, 2, None),
-        ("HCLK", "CLB_IO_CLK"): (26, 1, None),
-        ("INT", "CLB_IO_CLK"): (28, 2, None),
-        ("BRAM", "CLB_IO_CLK"): (28, 10, None),
-        ("BRAM", "BLOCK_RAM"): (128, 10, None),
-        ("DSP", "CLB_IO_CLK"): (28, 2, None),
+        # (tile_type, block_type): (frames, words)
+        ("INT", "CLB_IO_CLK"): (60, 3),
+        ("RCLK_INT_L", "CLB_IO_CLK"): (60, 6),
     }.get((tile_type, block_type), None)
 
 
 def get_int_params():
-    int_frames, int_words, _ = get_entry('INT', 'CLB_IO_CLK')
+    int_frames, int_words = get_entry('INT', 'CLB_IO_CLK')
     return int_frames, int_words
 
 
diff --git a/tools/tilegrid_report.py b/tools/tilegrid_report.py
new file mode 100755
index 0000000..9add2ca
--- /dev/null
+++ b/tools/tilegrid_report.py
@@ -0,0 +1,85 @@
+#!/usr/bin/env python3
+import argparse
+from utils.db import Database
+from utils.grid import BlockType
+from utils import util
+
+
+def main():
+    parser = argparse.ArgumentParser(
+        description="Tool for checking which tiles have bits defined.")
+
+    util.db_root_arg(parser)
+    util.part_arg(parser)
+    parser.add_argument('--show-only-missing', action='store_true')
+    parser.add_argument('--verbose', action='store_true')
+
+    args = parser.parse_args()
+
+    db = Database(args.db_root, args.part)
+    grid = db.grid()
+
+    tile_types = {}
+    for tile in grid.tiles():
+        gridinfo = grid.gridinfo_at_tilename(tile)
+        if gridinfo.tile_type not in tile_types:
+            tile_types[gridinfo.tile_type] = []
+
+        tile_types[gridinfo.tile_type].append((tile, gridinfo))
+
+    total_tile_count = 0
+    total_have_bits = 0
+
+    for tile_type, tiles in sorted(tile_types.items()):
+        try:
+            tile_type_info = db.get_tile_type(tile_type)
+
+            # Skip empty tiles, as no base address is requied.
+            if len(tile_type_info.get_pips()) == 0 and len(
+                    tile_type_info.get_sites()) == 0:
+                continue
+        except KeyError:
+            pass
+
+        # INT_INTERFACE tiles likely don't contain configuration?  Remove this
+        # if this ends up false.
+        if 'INT_INTERFACE' in tile_type:
+            continue
+
+        if 'BRKH' in tile_type:
+            continue
+
+        have_bits = 0
+        for tile_name, gridinfo in tiles:
+            total_tile_count += 1
+            if BlockType.CLB_IO_CLK in gridinfo.bits:
+                have_bits += 1
+                total_have_bits += 1
+
+        if args.show_only_missing and have_bits == len(tiles):
+            continue
+
+        print(
+            '{}: {}/{} ({:.2f} %)'.format(
+                tile_type, have_bits, len(tiles),
+                100. * float(have_bits) / len(tiles)))
+
+        if args.verbose:
+            tiles_with_missing_bits = []
+            for tile_name, gridinfo in tiles:
+                total_tile_count += 1
+                if BlockType.CLB_IO_CLK not in gridinfo.bits:
+                    tiles_with_missing_bits.append(tile_name)
+
+            for tile_name in sorted(tiles_with_missing_bits):
+                print('{} is missing CLB_IO_CLK'.format(tile_name))
+
+    print('')
+    print(
+        'Summary: {}/{} ({:.2f} %)'.format(
+            total_have_bits, total_tile_count,
+            100. * float(total_have_bits) / total_tile_count))
+
+
+if __name__ == "__main__":
+    main()