| commit | 9da4cabf328ebeed6b37b31966caa6222d405af0 | [log] [tgz] |
|---|---|---|
| author | Alessandro Comodi <acomodi@antmicro.com> | Wed Mar 25 19:37:06 2020 +0100 |
| committer | Alessandro Comodi <acomodi@antmicro.com> | Wed Mar 25 19:37:06 2020 +0100 |
| tree | bb99535487f3994b0d3208c585dcd706974c0b9b | |
| parent | 59e9b2aaede6ef941261865af760ad0a3c52cf03 [diff] |
update symbiflow-tools to use relative repo Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
Project U-Ray is an attempt at documenting the bitstream format for the Xilinx Ultrascale and Ultrascale+ parts including all parts from the following lines;
It takes a lot of the learning from Project X-Ray and Project Trellis.
| Board | Maker | Price | Part |
|---|---|---|---|
| Ultra96-V2 Zynq UltraScale+ ZU3EG Development Board (ULTRA96-V2-G) | ??? | Xilinx Zynq UltraScale+ MPSoC ZU3EG | $USD249 |
| Genesys ZU: Zynq Ultrascale+ MPSoC Development Board | Digilent | Xilinx Zynq UltraScale+ MPSoC ZU3EG | $USD1,149 |
We have a goal of initially targeting parts supported by WebPack so that anyone can contribute.
WebPack supports the following parts;
Zynq UltraScale+ MPSoC -- UltraScale+ MPSoC