LiteX minitest

This folder contains minitest for two LiteX configurations for the ZCU104 platform. It is divided into two directories that differ in the SoC configuration.

  • zephyr - Small configuration that uses only internal BRAMs for memory and a Vexriscv CPU in Full configuration.
  • linux - Linux capable SoC with LiteDRAM memory controller and external DDR4 RAM SO-DIMM (KVR21SE15S8/4 was used during tests) that uses Linux configuration of the Vexriscv CPU.

Synthesis+Implementation

Each variant currently supports only Vivado only flow. In order to run one of them go into src subdirectory ie. zephyr/zcu104/src/ and run make. Once the bitstream is generated it can be loaded to the board, we should see the LiteX BIOS prompt on the serial port.

HDL code generation

The following repositories were used to generate the HDL code.

Repo URLSHA
https://github.com/enjoy-digital/litex9521f2f
https://github.com/enjoy-digital/litedram3b0ec8f
https://github.com/litex-hub/litex-boards608541d
https://github.com/litex-hub/linux-on-litex-vexriscv986fcb6
https://github.com/m-labs/migend11565a

To generate zephyr variant the following command was ran from the litex-boards directory: ./targets/zcu104.py --integrated-main-ram-size=131072 --cpu-type vexriscv --cpu-variant full.

linux variant was generated by first entering linux-on-litex-vexriscv directory and then executing ./make.py --board zcu104 --build command.