Updating all based on "Merge pull request #1339 from SymbiFlow/dependabot/submodules/third_party/cctz-24e9dcf". See [Info File](Info.md) for details. Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
diff --git a/Info.md b/Info.md index 8f186bb..1332423 100644 --- a/Info.md +++ b/Info.md
@@ -37,20 +37,20 @@ # Details -Last updated on Mon 11 May 2020 11:47:34 PM UTC (2020-05-11T23:47:34+00:00). +Last updated on Tue 26 May 2020 03:52:53 PM UTC (2020-05-26T15:52:53+00:00). -Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [7ddd5f88](https://github.com/SymbiFlow/prjxray/commit/7ddd5f88e60c9876a6d7171b343c1c855239dc85). +Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [e81bd909](https://github.com/SymbiFlow/prjxray/commit/e81bd90964d0dac70db7d98e7ed7ecd2cc7b57e0). Latest commit was; ``` -commit 7ddd5f88e60c9876a6d7171b343c1c855239dc85 -Merge: 8df6ed11 e7560c6a +commit e81bd90964d0dac70db7d98e7ed7ecd2cc7b57e0 +Merge: a7d0c84c a20b821c Author: SymbiFlow Robot <foss-fpga-tools-bot@google.com> -Date: Sat May 9 14:50:02 2020 -0700 +Date: Sat May 23 05:31:20 2020 -0700 - Merge pull request #1327 from SymbiFlow/dependabot/submodules/third_party/yaml-cpp-a98b8af + Merge pull request #1339 from SymbiFlow/dependabot/submodules/third_party/cctz-24e9dcf - Bump third_party/yaml-cpp from `9fb5153` to `a98b8af` + Bump third_party/cctz from `00f4089` to `24e9dcf` ``` @@ -59,7 +59,7 @@ ### Settings -Created using following [settings/artix7.sh (sha256: 51184f624609564b925e9c029ae13326b7163f65679b5c5e13dbd00144df3732)](https://github.com/SymbiFlow/prjxray/blob/7ddd5f88e60c9876a6d7171b343c1c855239dc85/settings/artix7.sh) +Created using following [settings/artix7.sh (sha256: e080f892077c6d49f06f4709a433771d273b5a79f59baaa3c6d85ca7540f5336)](https://github.com/SymbiFlow/prjxray/blob/e81bd90964d0dac70db7d98e7ed7ecd2cc7b57e0/settings/artix7.sh) ```shell export XRAY_DATABASE="artix7" export XRAY_PART="xc7a50tfgg484-1" @@ -71,6 +71,10 @@ export XRAY_EXCLUDE_ROI_TILEGRID="" +# This is used by fuzzers/005-tilegrid/generate_full.py +# (special handling for frame addresses of certain IOIs -- see the script for details). +# This needs to be changed for any new device! +# If you have a FASM mismatch or unknown bits in IOIs, CHECK THIS FIRST. export XRAY_IOI3_TILES="LIOI3_X0Y9 RIOI3_X43Y9" # These settings must remain in sync @@ -82,7 +86,9 @@ export XRAY_ROI_GRID_Y1="0" export XRAY_ROI_GRID_Y2="51" +# clock pin export XRAY_PIN_00="E22" +# data pins export XRAY_PIN_01="D22" export XRAY_PIN_02="E21" export XRAY_PIN_03="D21" @@ -153,13 +159,13 @@ * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./artix7/mask_hclk_r.db`](./artix7/mask_hclk_r.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./artix7/mask_hclk_r.origin_info.db`](./artix7/mask_hclk_r.origin_info.db) * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./artix7/mask_liob33.db`](./artix7/mask_liob33.db) - * [`f665e297181be0a1ed08f33873068b4fe4cefcb85118e30b85548c117d5fa63c ./artix7/mask_lioi3.db`](./artix7/mask_lioi3.db) - * [`f665e297181be0a1ed08f33873068b4fe4cefcb85118e30b85548c117d5fa63c ./artix7/mask_lioi3_tbytesrc.db`](./artix7/mask_lioi3_tbytesrc.db) - * [`f665e297181be0a1ed08f33873068b4fe4cefcb85118e30b85548c117d5fa63c ./artix7/mask_lioi3_tbyteterm.db`](./artix7/mask_lioi3_tbyteterm.db) + * [`42a673bf372466a9d6487b377b528c0cb0d33c6f1d31047b4a5db41c77feac8b ./artix7/mask_lioi3.db`](./artix7/mask_lioi3.db) + * [`42a673bf372466a9d6487b377b528c0cb0d33c6f1d31047b4a5db41c77feac8b ./artix7/mask_lioi3_tbytesrc.db`](./artix7/mask_lioi3_tbytesrc.db) + * [`42a673bf372466a9d6487b377b528c0cb0d33c6f1d31047b4a5db41c77feac8b ./artix7/mask_lioi3_tbyteterm.db`](./artix7/mask_lioi3_tbyteterm.db) * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./artix7/mask_riob33.db`](./artix7/mask_riob33.db) - * [`f665e297181be0a1ed08f33873068b4fe4cefcb85118e30b85548c117d5fa63c ./artix7/mask_rioi3.db`](./artix7/mask_rioi3.db) - * [`f665e297181be0a1ed08f33873068b4fe4cefcb85118e30b85548c117d5fa63c ./artix7/mask_rioi3_tbytesrc.db`](./artix7/mask_rioi3_tbytesrc.db) - * [`f665e297181be0a1ed08f33873068b4fe4cefcb85118e30b85548c117d5fa63c ./artix7/mask_rioi3_tbyteterm.db`](./artix7/mask_rioi3_tbyteterm.db) + * [`42a673bf372466a9d6487b377b528c0cb0d33c6f1d31047b4a5db41c77feac8b ./artix7/mask_rioi3.db`](./artix7/mask_rioi3.db) + * [`42a673bf372466a9d6487b377b528c0cb0d33c6f1d31047b4a5db41c77feac8b ./artix7/mask_rioi3_tbytesrc.db`](./artix7/mask_rioi3_tbytesrc.db) + * [`42a673bf372466a9d6487b377b528c0cb0d33c6f1d31047b4a5db41c77feac8b ./artix7/mask_rioi3_tbyteterm.db`](./artix7/mask_rioi3_tbyteterm.db) * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf ./artix7/ppips_bram_int_interface_l.db`](./artix7/ppips_bram_int_interface_l.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./artix7/ppips_bram_int_interface_l.origin_info.db`](./artix7/ppips_bram_int_interface_l.origin_info.db) * [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae ./artix7/ppips_bram_int_interface_r.db`](./artix7/ppips_bram_int_interface_r.db) @@ -262,9 +268,9 @@ * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./artix7/segbits_hclk_r.db`](./artix7/segbits_hclk_r.db) * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0 ./artix7/segbits_hclk_r.origin_info.db`](./artix7/segbits_hclk_r.origin_info.db) * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./artix7/segbits_int_l.db`](./artix7/segbits_int_l.db) - * [`73060b8def3a9eb1c21e841a1ee39eb33e2daeaf497f1b9d361e01e91a578df0 ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db) + * [`9422a0e25afbca0dcdfa5ee5e5c24eb067b120dc1cdbd625ea250383cd11beba ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db) * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./artix7/segbits_int_r.db`](./artix7/segbits_int_r.db) - * [`5cfb63c95c8120bbec05c0f560abe22fe2f62541821e5533e0a94c90cdbb7459 ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db) + * [`a8eace4ecc0832e8ddc26afec882037a51762ef24daad2a87e07244bb6a5852d ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db) * [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23 ./artix7/segbits_liob33.db`](./artix7/segbits_liob33.db) * [`0fca9c6530589b14c77b738e68c63ed4246713e44e1e699e153b69907e77e09e ./artix7/segbits_liob33.origin_info.db`](./artix7/segbits_liob33.origin_info.db) * [`c9dfa75f8b565b3c47813cdf7f1df2aa7c59402f41396e939dd97ec68f7638d8 ./artix7/segbits_lioi3.db`](./artix7/segbits_lioi3.db) @@ -476,8 +482,8 @@ * [`bda848e132cf93158addf5db6e449dd5d79050155bd2ba52ccad7bd3c1607ec4 ./artix7/timings/CMT_TOP_R_LOWER_T.sdf`](./artix7/timings/CMT_TOP_R_LOWER_T.sdf) * [`e56222b18e7fabf7473656f7446958e93373a3bf956ca75968d26f9c652fa14e ./artix7/timings/CMT_TOP_R_UPPER_B.sdf`](./artix7/timings/CMT_TOP_R_UPPER_B.sdf) * [`24408756edd72f9c82dc2badb3e94e372916c00c407e86a88db1274f8951d721 ./artix7/timings/CMT_TOP_R_UPPER_T.sdf`](./artix7/timings/CMT_TOP_R_UPPER_T.sdf) - * [`3f9923d175379d32f859a8d3e07992c0174cabe3b260c14b69394009fa1d0569 ./artix7/timings/DSP_L.sdf`](./artix7/timings/DSP_L.sdf) - * [`3f9923d175379d32f859a8d3e07992c0174cabe3b260c14b69394009fa1d0569 ./artix7/timings/DSP_R.sdf`](./artix7/timings/DSP_R.sdf) + * [`bff896002fa72a5edd01102cc54fbf658e8c6df5b5d1d5c82da379809b443fc6 ./artix7/timings/DSP_L.sdf`](./artix7/timings/DSP_L.sdf) + * [`bff896002fa72a5edd01102cc54fbf658e8c6df5b5d1d5c82da379809b443fc6 ./artix7/timings/DSP_R.sdf`](./artix7/timings/DSP_R.sdf) * [`fd93513fb5389752c1f1716bf15c2d3d118666e9f968533bb50d845504deb5ff ./artix7/timings/GTP_CHANNEL_0.sdf`](./artix7/timings/GTP_CHANNEL_0.sdf) * [`fd93513fb5389752c1f1716bf15c2d3d118666e9f968533bb50d845504deb5ff ./artix7/timings/GTP_CHANNEL_1.sdf`](./artix7/timings/GTP_CHANNEL_1.sdf) * [`fd93513fb5389752c1f1716bf15c2d3d118666e9f968533bb50d845504deb5ff ./artix7/timings/GTP_CHANNEL_2.sdf`](./artix7/timings/GTP_CHANNEL_2.sdf) @@ -508,12 +514,12 @@ * [`277906907e43846ac8a52115983cd0ece673b2310d8d10c9b2253d6537bf1a02 ./artix7/xc7a100tcsg324-1/part.json`](./artix7/xc7a100tcsg324-1/part.json) * [`4e1f153303270ed3727ca40af3179020f74271ff63c4d771556020b1d3037b92 ./artix7/xc7a100tcsg324-1/part.yaml`](./artix7/xc7a100tcsg324-1/part.yaml) * [`9cf701615e6f9ed6e89d86738f10ebb9d5bf1a233f1e3251315b2f9159f73391 ./artix7/xc7a100tcsg324-1/tileconn.json`](./artix7/xc7a100tcsg324-1/tileconn.json) - * [`58d35b8327cb31c6db0333149f48a833956d9e03738ff31a8e47aa426fbe545f ./artix7/xc7a100tcsg324-1/tilegrid.json`](./artix7/xc7a100tcsg324-1/tilegrid.json) + * [`39cc9858c25af7026cab740cc5eeca7cea3a658cbb56ac2828d68e652dcbcb2e ./artix7/xc7a100tcsg324-1/tilegrid.json`](./artix7/xc7a100tcsg324-1/tilegrid.json) * [`bf25d62e58330960eb582f0b3b99196bd59df046db0d7de5330634b64cd397ad ./artix7/xc7a100tfgg676-1/package_pins.csv`](./artix7/xc7a100tfgg676-1/package_pins.csv) * [`78909bda2084de19e6095258ab1b1ad549c2db376abdd8699235a7bdc3aa19fb ./artix7/xc7a100tfgg676-1/part.json`](./artix7/xc7a100tfgg676-1/part.json) * [`4e1f153303270ed3727ca40af3179020f74271ff63c4d771556020b1d3037b92 ./artix7/xc7a100tfgg676-1/part.yaml`](./artix7/xc7a100tfgg676-1/part.yaml) * [`9cf701615e6f9ed6e89d86738f10ebb9d5bf1a233f1e3251315b2f9159f73391 ./artix7/xc7a100tfgg676-1/tileconn.json`](./artix7/xc7a100tfgg676-1/tileconn.json) - * [`58d35b8327cb31c6db0333149f48a833956d9e03738ff31a8e47aa426fbe545f ./artix7/xc7a100tfgg676-1/tilegrid.json`](./artix7/xc7a100tfgg676-1/tilegrid.json) + * [`39cc9858c25af7026cab740cc5eeca7cea3a658cbb56ac2828d68e652dcbcb2e ./artix7/xc7a100tfgg676-1/tilegrid.json`](./artix7/xc7a100tfgg676-1/tilegrid.json) * [`72dd638f5c8f6c36e74765915c01b2fa28e3c28b2c0afd91871ab7b0490a14f3 ./artix7/xc7a200tffg1156-1/package_pins.csv`](./artix7/xc7a200tffg1156-1/package_pins.csv) * [`fe44ca57c10c7b804357ded2cdea392c008b7b4d5a82ad917fa3148a756e4e42 ./artix7/xc7a200tffg1156-1/part.json`](./artix7/xc7a200tffg1156-1/part.json) * [`a3d493aef436b9978b2ed1c98c4e1364ab9eb096f824e19acd7cce3f7d920e97 ./artix7/xc7a200tffg1156-1/part.yaml`](./artix7/xc7a200tffg1156-1/part.yaml) @@ -550,7 +556,7 @@ ### Settings -Created using following [settings/kintex7.sh (sha256: 845b1414faf8d98843ae2886a273625000548289cc8f0d3635c94599d38cdb81)](https://github.com/SymbiFlow/prjxray/blob/7ddd5f88e60c9876a6d7171b343c1c855239dc85/settings/kintex7.sh) +Created using following [settings/kintex7.sh (sha256: 845b1414faf8d98843ae2886a273625000548289cc8f0d3635c94599d38cdb81)](https://github.com/SymbiFlow/prjxray/blob/e81bd90964d0dac70db7d98e7ed7ecd2cc7b57e0/settings/kintex7.sh) ```shell export XRAY_DATABASE="kintex7" export XRAY_PART="xc7k70tfbg676-2" @@ -727,9 +733,9 @@ * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./kintex7/segbits_hclk_r.db`](./kintex7/segbits_hclk_r.db) * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0 ./kintex7/segbits_hclk_r.origin_info.db`](./kintex7/segbits_hclk_r.origin_info.db) * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./kintex7/segbits_int_l.db`](./kintex7/segbits_int_l.db) - * [`c39c5a5ac18cbabc04214f3d812efc99d3312d58ba8449da7bb63d70c4af41e6 ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db) + * [`532c60af07228baf62517db058f7b424a53ba5a52f291fb45269f63e76a58815 ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db) * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./kintex7/segbits_int_r.db`](./kintex7/segbits_int_r.db) - * [`ff35290c25f59a62cb25016b2c601a78cd9a4f139cb0bcc9840895fafef585a7 ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db) + * [`57c7c689eec4fb91d8fbda87d2c09d1def8f6cd71be8dd85f6f8951921a4b3c5 ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db) * [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23 ./kintex7/segbits_liob33.db`](./kintex7/segbits_liob33.db) * [`0fca9c6530589b14c77b738e68c63ed4246713e44e1e699e153b69907e77e09e ./kintex7/segbits_liob33.origin_info.db`](./kintex7/segbits_liob33.origin_info.db) * [`c9dfa75f8b565b3c47813cdf7f1df2aa7c59402f41396e939dd97ec68f7638d8 ./kintex7/segbits_lioi3.db`](./kintex7/segbits_lioi3.db) @@ -922,7 +928,7 @@ ### Settings -Created using following [settings/zynq7.sh (sha256: b2055ef65885124f2f229a181100b6b73852464aa260b38691a4d84aa351475b)](https://github.com/SymbiFlow/prjxray/blob/7ddd5f88e60c9876a6d7171b343c1c855239dc85/settings/zynq7.sh) +Created using following [settings/zynq7.sh (sha256: b2055ef65885124f2f229a181100b6b73852464aa260b38691a4d84aa351475b)](https://github.com/SymbiFlow/prjxray/blob/e81bd90964d0dac70db7d98e7ed7ecd2cc7b57e0/settings/zynq7.sh) ```shell export XRAY_DATABASE="zynq7" export XRAY_PART="xc7z020clg484-1" @@ -997,13 +1003,13 @@ * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./zynq7/mask_hclk_r.db`](./zynq7/mask_hclk_r.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/mask_hclk_r.origin_info.db`](./zynq7/mask_hclk_r.origin_info.db) * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./zynq7/mask_liob33.db`](./zynq7/mask_liob33.db) - * [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576 ./zynq7/mask_lioi3.db`](./zynq7/mask_lioi3.db) - * [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576 ./zynq7/mask_lioi3_tbytesrc.db`](./zynq7/mask_lioi3_tbytesrc.db) - * [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576 ./zynq7/mask_lioi3_tbyteterm.db`](./zynq7/mask_lioi3_tbyteterm.db) + * [`21473e9cb688d2299659ed9011a5ddaa4c98fdc752851ac57bddffca06dd6d1c ./zynq7/mask_lioi3.db`](./zynq7/mask_lioi3.db) + * [`21473e9cb688d2299659ed9011a5ddaa4c98fdc752851ac57bddffca06dd6d1c ./zynq7/mask_lioi3_tbytesrc.db`](./zynq7/mask_lioi3_tbytesrc.db) + * [`21473e9cb688d2299659ed9011a5ddaa4c98fdc752851ac57bddffca06dd6d1c ./zynq7/mask_lioi3_tbyteterm.db`](./zynq7/mask_lioi3_tbyteterm.db) * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./zynq7/mask_riob33.db`](./zynq7/mask_riob33.db) - * [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576 ./zynq7/mask_rioi3.db`](./zynq7/mask_rioi3.db) - * [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576 ./zynq7/mask_rioi3_tbytesrc.db`](./zynq7/mask_rioi3_tbytesrc.db) - * [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576 ./zynq7/mask_rioi3_tbyteterm.db`](./zynq7/mask_rioi3_tbyteterm.db) + * [`21473e9cb688d2299659ed9011a5ddaa4c98fdc752851ac57bddffca06dd6d1c ./zynq7/mask_rioi3.db`](./zynq7/mask_rioi3.db) + * [`21473e9cb688d2299659ed9011a5ddaa4c98fdc752851ac57bddffca06dd6d1c ./zynq7/mask_rioi3_tbytesrc.db`](./zynq7/mask_rioi3_tbytesrc.db) + * [`21473e9cb688d2299659ed9011a5ddaa4c98fdc752851ac57bddffca06dd6d1c ./zynq7/mask_rioi3_tbyteterm.db`](./zynq7/mask_rioi3_tbyteterm.db) * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf ./zynq7/ppips_bram_int_interface_l.db`](./zynq7/ppips_bram_int_interface_l.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/ppips_bram_int_interface_l.origin_info.db`](./zynq7/ppips_bram_int_interface_l.origin_info.db) * [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae ./zynq7/ppips_bram_int_interface_r.db`](./zynq7/ppips_bram_int_interface_r.db) @@ -1113,9 +1119,9 @@ * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./zynq7/segbits_hclk_r.db`](./zynq7/segbits_hclk_r.db) * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0 ./zynq7/segbits_hclk_r.origin_info.db`](./zynq7/segbits_hclk_r.origin_info.db) * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./zynq7/segbits_int_l.db`](./zynq7/segbits_int_l.db) - * [`64548d858388d8f6f6e20a316d850abe54fbb273f893aebdd73f53f7081a5372 ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db) + * [`6c40ae95b616e7fc37471d2b6a217028ffddae72a4bbc2b4eac992f5dc2dcfda ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db) * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./zynq7/segbits_int_r.db`](./zynq7/segbits_int_r.db) - * [`14d19389a75ae50f8a6b6608a4ca90513de4c5ba844f6d9ac08900544cd25880 ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db) + * [`51cf5676754a846fde6db6b2390a248a3aa3806e45b489a3e79e5f06dfc44f5e ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db) * [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23 ./zynq7/segbits_liob33.db`](./zynq7/segbits_liob33.db) * [`0fca9c6530589b14c77b738e68c63ed4246713e44e1e699e153b69907e77e09e ./zynq7/segbits_liob33.origin_info.db`](./zynq7/segbits_liob33.origin_info.db) * [`c9dfa75f8b565b3c47813cdf7f1df2aa7c59402f41396e939dd97ec68f7638d8 ./zynq7/segbits_lioi3.db`](./zynq7/segbits_lioi3.db) @@ -1303,12 +1309,12 @@ * [`bda848e132cf93158addf5db6e449dd5d79050155bd2ba52ccad7bd3c1607ec4 ./zynq7/timings/CMT_TOP_R_LOWER_T.sdf`](./zynq7/timings/CMT_TOP_R_LOWER_T.sdf) * [`e56222b18e7fabf7473656f7446958e93373a3bf956ca75968d26f9c652fa14e ./zynq7/timings/CMT_TOP_R_UPPER_B.sdf`](./zynq7/timings/CMT_TOP_R_UPPER_B.sdf) * [`24408756edd72f9c82dc2badb3e94e372916c00c407e86a88db1274f8951d721 ./zynq7/timings/CMT_TOP_R_UPPER_T.sdf`](./zynq7/timings/CMT_TOP_R_UPPER_T.sdf) - * [`a1945d3cc9f7a422691d7cad098dc61cf6804bdbb8df8c572576d651e0f44c44 ./zynq7/timings/DSP_L.sdf`](./zynq7/timings/DSP_L.sdf) - * [`a1945d3cc9f7a422691d7cad098dc61cf6804bdbb8df8c572576d651e0f44c44 ./zynq7/timings/DSP_R.sdf`](./zynq7/timings/DSP_R.sdf) + * [`3f9923d175379d32f859a8d3e07992c0174cabe3b260c14b69394009fa1d0569 ./zynq7/timings/DSP_L.sdf`](./zynq7/timings/DSP_L.sdf) + * [`3f9923d175379d32f859a8d3e07992c0174cabe3b260c14b69394009fa1d0569 ./zynq7/timings/DSP_R.sdf`](./zynq7/timings/DSP_R.sdf) * [`5afccb72fdc7e9a452988e5db5dd7517ab38792ba21af020f9f1885f686ae5a3 ./zynq7/timings/HCLK_CMT.sdf`](./zynq7/timings/HCLK_CMT.sdf) * [`5afccb72fdc7e9a452988e5db5dd7517ab38792ba21af020f9f1885f686ae5a3 ./zynq7/timings/HCLK_CMT_L.sdf`](./zynq7/timings/HCLK_CMT_L.sdf) * [`b5d5ca72d453879fca2bf2470fb0a670ebfb38d6e85cdbfdb3967e2e4f59ee73 ./zynq7/timings/HCLK_IOI3.sdf`](./zynq7/timings/HCLK_IOI3.sdf) - * [`a64ba6e07bedc352898bc06d44b3677111739e9c0ecdf989fa57f1a200547b14 ./zynq7/timings/LIOB33.sdf`](./zynq7/timings/LIOB33.sdf) + * [`9313a012de7cbb7120baf15fe30bf8d44b238cad6226ece1a9776746e2857863 ./zynq7/timings/LIOB33.sdf`](./zynq7/timings/LIOB33.sdf) * [`0fdaf6a593346b5cac8899eebf4f62d1732d6d6fb0a17c9f4b6a4e54e03c3523 ./zynq7/timings/LIOB33_SING.sdf`](./zynq7/timings/LIOB33_SING.sdf) * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1 ./zynq7/timings/LIOI3.sdf`](./zynq7/timings/LIOI3.sdf) * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1 ./zynq7/timings/LIOI3_SING.sdf`](./zynq7/timings/LIOI3_SING.sdf)
diff --git a/artix7/mask_lioi3.db b/artix7/mask_lioi3.db index 22def1d..0c65a9a 100644 --- a/artix7/mask_lioi3.db +++ b/artix7/mask_lioi3.db
@@ -16,7 +16,6 @@ bit 25_84 bit 25_85 bit 25_95 -bit 25_96 bit 25_98 bit 25_99 bit 25_111
diff --git a/artix7/mask_lioi3_tbytesrc.db b/artix7/mask_lioi3_tbytesrc.db index 22def1d..0c65a9a 100644 --- a/artix7/mask_lioi3_tbytesrc.db +++ b/artix7/mask_lioi3_tbytesrc.db
@@ -16,7 +16,6 @@ bit 25_84 bit 25_85 bit 25_95 -bit 25_96 bit 25_98 bit 25_99 bit 25_111
diff --git a/artix7/mask_lioi3_tbyteterm.db b/artix7/mask_lioi3_tbyteterm.db index 22def1d..0c65a9a 100644 --- a/artix7/mask_lioi3_tbyteterm.db +++ b/artix7/mask_lioi3_tbyteterm.db
@@ -16,7 +16,6 @@ bit 25_84 bit 25_85 bit 25_95 -bit 25_96 bit 25_98 bit 25_99 bit 25_111
diff --git a/artix7/mask_rioi3.db b/artix7/mask_rioi3.db index 22def1d..0c65a9a 100644 --- a/artix7/mask_rioi3.db +++ b/artix7/mask_rioi3.db
@@ -16,7 +16,6 @@ bit 25_84 bit 25_85 bit 25_95 -bit 25_96 bit 25_98 bit 25_99 bit 25_111
diff --git a/artix7/mask_rioi3_tbytesrc.db b/artix7/mask_rioi3_tbytesrc.db index 22def1d..0c65a9a 100644 --- a/artix7/mask_rioi3_tbytesrc.db +++ b/artix7/mask_rioi3_tbytesrc.db
@@ -16,7 +16,6 @@ bit 25_84 bit 25_85 bit 25_95 -bit 25_96 bit 25_98 bit 25_99 bit 25_111
diff --git a/artix7/mask_rioi3_tbyteterm.db b/artix7/mask_rioi3_tbyteterm.db index 22def1d..0c65a9a 100644 --- a/artix7/mask_rioi3_tbyteterm.db +++ b/artix7/mask_rioi3_tbyteterm.db
@@ -16,7 +16,6 @@ bit 25_84 bit 25_85 bit 25_95 -bit 25_96 bit 25_98 bit 25_99 bit 25_111
diff --git a/artix7/segbits_int_l.origin_info.db b/artix7/segbits_int_l.origin_info.db index b7a7345..8fc2ca7 100644 --- a/artix7/segbits_int_l.origin_info.db +++ b/artix7/segbits_int_l.origin_info.db
@@ -301,7 +301,7 @@ INT_L.FAN_ALT0.FAN_BOUNCE6 origin:050-pip-seed !23_00 20_00 22_00 24_00 25_00 INT_L.FAN_ALT0.LOGIC_OUTS_L0 origin:050-pip-seed !23_00 21_00 22_00 24_00 25_00 INT_L.FAN_ALT0.LOGIC_OUTS_L12 origin:050-pip-seed !22_00 21_00 23_00 24_00 25_00 -INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:056-pip-rem !22_00 !23_00 !25_00 21_00 24_00 +INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:050-pip-seed !22_00 !23_00 !25_00 21_00 24_00 INT_L.FAN_ALT0.SR1END_N3_3 origin:050-pip-seed !23_00 19_01 22_00 24_00 25_00 INT_L.FAN_ALT0.SS2END_N0_3 origin:050-pip-seed !22_00 !23_00 !24_00 17_00 25_00 INT_L.FAN_ALT0.SW2END_N0_3 origin:050-pip-seed !22_00 !23_00 !25_00 17_00 24_00 @@ -396,7 +396,7 @@ INT_L.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08 INT_L.FAN_ALT4.LOGIC_OUTS_L4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08 INT_L.FAN_ALT4.LOGIC_OUTS_L8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08 -INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:056-pip-rem !22_08 !23_08 !25_08 21_08 24_08 +INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08 INT_L.FAN_ALT4.SR1BEG_S0 origin:050-pip-seed !23_08 19_09 22_08 24_08 25_08 INT_L.FAN_ALT4.EE2END0 origin:050-pip-seed !22_08 !23_08 !24_08 16_08 25_08 INT_L.FAN_ALT4.EL1END0 origin:050-pip-seed !22_08 16_08 23_08 24_08 25_08 @@ -1917,7 +1917,7 @@ INT_L.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43 INT_L.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40 INT_L.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43 -INT_L.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43 +INT_L.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43 INT_L.EE4BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 02_57 07_57 INT_L.EE4BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_57 04_58 INT_L.EE4BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_56 04_58 @@ -2273,7 +2273,7 @@ INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55 INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52 INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53 -INT_L.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52 +INT_L.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52 INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17 INT_L.NL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_17 14_17 INT_L.NL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_17 13_17 @@ -2887,7 +2887,7 @@ INT_L.SE6BEG3.NE2END3 origin:050-pip-seed 03_58 04_56 INT_L.SE6BEG3.NE6END3 origin:050-pip-seed 04_56 04_59 INT_L.SE6BEG3.NN2END3 origin:050-pip-seed 02_59 04_56 -INT_L.SE6BEG3.NN6END3 origin:050-pip-seed 04_56 07_59 +INT_L.SE6BEG3.NN6END3 origin:056-pip-rem 04_56 07_59 INT_L.SE6BEG3.SE2END3 origin:050-pip-seed 02_58 03_58 INT_L.SE6BEG3.SE6END3 origin:050-pip-seed 02_58 07_59 INT_L.SE6BEG3.SS2END3 origin:050-pip-seed 02_59 05_58 @@ -3302,7 +3302,7 @@ INT_L.SW6BEG1.LOGIC_OUTS_L23 origin:050-pip-seed 04_30 06_28 INT_L.SW6BEG1.LV_L9 origin:056-pip-rem 04_30 05_28 INT_L.SW6BEG1.EE2END1 origin:050-pip-seed 03_28 04_29 -INT_L.SW6BEG1.EE4END1 origin:056-pip-rem 04_29 05_28 +INT_L.SW6BEG1.EE4END1 origin:050-pip-seed 04_29 05_28 INT_L.SW6BEG1.LH6 origin:056-pip-rem 05_28 07_29 INT_L.SW6BEG1.NW2END2 origin:050-pip-seed 02_29 05_31 INT_L.SW6BEG1.NW6END2 origin:050-pip-seed 05_31 06_28 @@ -3323,7 +3323,7 @@ INT_L.SW6BEG2.LVB_L0 origin:056-pip-rem 04_46 05_44 INT_L.SW6BEG2.LVB_L12 origin:056-pip-rem 05_44 07_45 INT_L.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45 -INT_L.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44 +INT_L.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44 INT_L.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47 INT_L.SW6BEG2.NW6END3 origin:050-pip-seed 05_47 06_44 INT_L.SW6BEG2.SE2END2 origin:050-pip-seed 02_45 04_45
diff --git a/artix7/segbits_int_r.origin_info.db b/artix7/segbits_int_r.origin_info.db index b001449..3e34d3e 100644 --- a/artix7/segbits_int_r.origin_info.db +++ b/artix7/segbits_int_r.origin_info.db
@@ -170,7 +170,7 @@ INT_R.BYP_ALT7.BYP_BOUNCE6 origin:050-pip-seed !22_63 !23_63 !25_63 21_63 24_63 INT_R.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63 INT_R.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63 -INT_R.BYP_ALT7.FAN_BOUNCE_S3_6 origin:056-pip-rem !22_63 21_63 23_63 24_63 25_63 +INT_R.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63 INT_R.BYP_ALT7.LOGIC_OUTS3 origin:051-pip-imuxlout-bypalts !22_63 20_63 23_63 24_63 25_63 INT_R.BYP_ALT7.LOGIC_OUTS15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63 INT_R.BYP_ALT7.LOGIC_OUTS21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63 @@ -329,7 +329,7 @@ INT_R.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08 INT_R.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08 INT_R.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08 -INT_R.FAN_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_08 20_08 23_08 24_08 25_08 +INT_R.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08 INT_R.FAN_ALT4.LOGIC_OUTS4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08 INT_R.FAN_ALT4.LOGIC_OUTS8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08 INT_R.FAN_ALT4.LOGIC_OUTS18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08 @@ -705,7 +705,7 @@ INT_R.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43 INT_R.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40 INT_R.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43 -INT_R.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43 +INT_R.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43 INT_R.EE4BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_57 07_57 INT_R.EE4BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_57 04_58 INT_R.EE4BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_56 04_58 @@ -2253,7 +2253,7 @@ INT_R.NE6BEG2.SE2END2 origin:050-pip-seed 02_37 05_39 INT_R.NE6BEG2.SE6END2 origin:050-pip-seed 05_39 06_36 INT_R.NE6BEG2.WW2END1 origin:050-pip-seed 03_36 04_37 -INT_R.NE6BEG2.WW4END2 origin:050-pip-seed 04_37 05_36 +INT_R.NE6BEG2.WW4END2 origin:056-pip-rem 04_37 05_36 INT_R.NE6BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_53 04_54 INT_R.NE6BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_53 07_53 INT_R.NE6BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_52 07_53 @@ -2273,7 +2273,7 @@ INT_R.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55 INT_R.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52 INT_R.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53 -INT_R.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52 +INT_R.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52 INT_R.NL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_16 14_17 INT_R.NL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_17 14_17 INT_R.NL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_17 13_17 @@ -2491,7 +2491,7 @@ INT_R.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52 INT_R.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55 INT_R.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54 -INT_R.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55 +INT_R.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55 INT_R.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52 INT_R.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55 INT_R.NR1BEG0.LOGIC_OUTS0 origin:050-pip-seed 11_07 14_07 @@ -2887,7 +2887,7 @@ INT_R.SE6BEG3.NE2END3 origin:050-pip-seed 03_58 04_56 INT_R.SE6BEG3.NE6END3 origin:050-pip-seed 04_56 04_59 INT_R.SE6BEG3.NN2END3 origin:050-pip-seed 02_59 04_56 -INT_R.SE6BEG3.NN6END3 origin:056-pip-rem 04_56 07_59 +INT_R.SE6BEG3.NN6END3 origin:050-pip-seed 04_56 07_59 INT_R.SE6BEG3.SE2END3 origin:050-pip-seed 02_58 03_58 INT_R.SE6BEG3.SE6END3 origin:050-pip-seed 02_58 07_59 INT_R.SE6BEG3.SS2END3 origin:050-pip-seed 02_59 05_58 @@ -3321,7 +3321,7 @@ INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44 INT_R.SW6BEG2.LOGIC_OUTS20 origin:050-pip-seed 06_44 07_45 INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45 -INT_R.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44 +INT_R.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44 INT_R.SW6BEG2.LVB0 origin:056-pip-rem 04_46 05_44 INT_R.SW6BEG2.LVB12 origin:056-pip-rem 05_44 07_45 INT_R.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47
diff --git a/artix7/timings/DSP_L.sdf b/artix7/timings/DSP_L.sdf index 4eb87d8..d69252a 100644 --- a/artix7/timings/DSP_L.sdf +++ b/artix7/timings/DSP_L.sdf
@@ -321,16 +321,16 @@ (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") (INSTANCE DSP48E1) (TIMINGCHECK - (HOLD D (posedge CLK) (-3.158::-0.249)) - (SETUP D (posedge CLK) (0.249::3.158)) + (HOLD A (posedge CLK) (-3.158::-0.249)) + (SETUP A (posedge CLK) (0.249::3.158)) ) ) (CELL (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") (INSTANCE DSP48E1) (TIMINGCHECK - (HOLD D (posedge CLK) (-3.158::-0.249)) - (SETUP D (posedge CLK) (0.249::3.158)) + (HOLD A (posedge CLK) (-3.158::-0.249)) + (SETUP A (posedge CLK) (0.249::3.158)) ) ) (CELL
diff --git a/artix7/timings/DSP_R.sdf b/artix7/timings/DSP_R.sdf index 4eb87d8..d69252a 100644 --- a/artix7/timings/DSP_R.sdf +++ b/artix7/timings/DSP_R.sdf
@@ -321,16 +321,16 @@ (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") (INSTANCE DSP48E1) (TIMINGCHECK - (HOLD D (posedge CLK) (-3.158::-0.249)) - (SETUP D (posedge CLK) (0.249::3.158)) + (HOLD A (posedge CLK) (-3.158::-0.249)) + (SETUP A (posedge CLK) (0.249::3.158)) ) ) (CELL (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") (INSTANCE DSP48E1) (TIMINGCHECK - (HOLD D (posedge CLK) (-3.158::-0.249)) - (SETUP D (posedge CLK) (0.249::3.158)) + (HOLD A (posedge CLK) (-3.158::-0.249)) + (SETUP A (posedge CLK) (0.249::3.158)) ) ) (CELL
diff --git a/artix7/xc7a100tcsg324-1/tilegrid.json b/artix7/xc7a100tcsg324-1/tilegrid.json index 1dbec68..434a65b 100644 --- a/artix7/xc7a100tcsg324-1/tilegrid.json +++ b/artix7/xc7a100tcsg324-1/tilegrid.json
@@ -408609,7 +408609,14 @@ "type": "LIOI3" }, "LIOI3_X0Y9": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00420000", + "frames": 42, + "offset": 18, + "words": 4 + } + }, "clock_region": "X0Y0", "grid_x": 1, "grid_y": 198, @@ -409398,7 +409405,7 @@ "CLB_IO_CLK": { "baseaddr": "0x00000000", "frames": 42, - "offset": 18, + "offset": 2, "words": 4 } }, @@ -452865,7 +452872,7 @@ "CLB_IO_CLK": { "baseaddr": "0x00001C80", "frames": 42, - "offset": 18, + "offset": 2, "words": 4 } },
diff --git a/artix7/xc7a100tfgg676-1/tilegrid.json b/artix7/xc7a100tfgg676-1/tilegrid.json index 1dbec68..434a65b 100644 --- a/artix7/xc7a100tfgg676-1/tilegrid.json +++ b/artix7/xc7a100tfgg676-1/tilegrid.json
@@ -408609,7 +408609,14 @@ "type": "LIOI3" }, "LIOI3_X0Y9": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00420000", + "frames": 42, + "offset": 18, + "words": 4 + } + }, "clock_region": "X0Y0", "grid_x": 1, "grid_y": 198, @@ -409398,7 +409405,7 @@ "CLB_IO_CLK": { "baseaddr": "0x00000000", "frames": 42, - "offset": 18, + "offset": 2, "words": 4 } }, @@ -452865,7 +452872,7 @@ "CLB_IO_CLK": { "baseaddr": "0x00001C80", "frames": 42, - "offset": 18, + "offset": 2, "words": 4 } },
diff --git a/kintex7/segbits_int_l.origin_info.db b/kintex7/segbits_int_l.origin_info.db index b78635d..570667b 100644 --- a/kintex7/segbits_int_l.origin_info.db +++ b/kintex7/segbits_int_l.origin_info.db
@@ -301,7 +301,7 @@ INT_L.FAN_ALT0.FAN_BOUNCE6 origin:050-pip-seed !23_00 20_00 22_00 24_00 25_00 INT_L.FAN_ALT0.LOGIC_OUTS_L0 origin:050-pip-seed !23_00 21_00 22_00 24_00 25_00 INT_L.FAN_ALT0.LOGIC_OUTS_L12 origin:050-pip-seed !22_00 21_00 23_00 24_00 25_00 -INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:056-pip-rem !22_00 !23_00 !25_00 21_00 24_00 +INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:050-pip-seed !22_00 !23_00 !25_00 21_00 24_00 INT_L.FAN_ALT0.SR1END_N3_3 origin:050-pip-seed !23_00 19_01 22_00 24_00 25_00 INT_L.FAN_ALT0.SS2END_N0_3 origin:050-pip-seed !22_00 !23_00 !24_00 17_00 25_00 INT_L.FAN_ALT0.SW2END_N0_3 origin:050-pip-seed !22_00 !23_00 !25_00 17_00 24_00 @@ -1897,7 +1897,7 @@ INT_L.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27 INT_L.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24 INT_L.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27 -INT_L.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27 +INT_L.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27 INT_L.EE4BEG2.LOGIC_OUTS_L2 origin:050-pip-seed 02_41 04_42 INT_L.EE4BEG2.LOGIC_OUTS_L6 origin:050-pip-seed 02_41 07_41 INT_L.EE4BEG2.LOGIC_OUTS_L10 origin:050-pip-seed 03_40 07_41 @@ -1917,7 +1917,7 @@ INT_L.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43 INT_L.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40 INT_L.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43 -INT_L.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43 +INT_L.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43 INT_L.EE4BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 02_57 07_57 INT_L.EE4BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_57 04_58 INT_L.EE4BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_56 04_58 @@ -1937,7 +1937,7 @@ INT_L.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59 INT_L.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56 INT_L.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59 -INT_L.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59 +INT_L.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59 INT_L.EL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_20 14_21 INT_L.EL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_21 14_21 INT_L.EL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_21 13_21 @@ -2271,9 +2271,9 @@ INT_L.NE6BEG3.NW2END3 origin:050-pip-seed 02_53 04_53 INT_L.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52 INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55 -INT_L.NE6BEG3.SE6END3 origin:056-pip-rem 05_55 06_52 +INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52 INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53 -INT_L.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52 +INT_L.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52 INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17 INT_L.NL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_17 14_17 INT_L.NL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_17 13_17 @@ -2885,7 +2885,7 @@ INT_L.SE6BEG3.EE4END3 origin:050-pip-seed 02_58 04_59 INT_L.SE6BEG3.LH0 origin:056-pip-rem 04_59 06_58 INT_L.SE6BEG3.NE2END3 origin:050-pip-seed 03_58 04_56 -INT_L.SE6BEG3.NE6END3 origin:050-pip-seed 04_56 04_59 +INT_L.SE6BEG3.NE6END3 origin:056-pip-rem 04_56 04_59 INT_L.SE6BEG3.NN2END3 origin:050-pip-seed 02_59 04_56 INT_L.SE6BEG3.NN6END3 origin:050-pip-seed 04_56 07_59 INT_L.SE6BEG3.SE2END3 origin:050-pip-seed 02_58 03_58
diff --git a/kintex7/segbits_int_r.origin_info.db b/kintex7/segbits_int_r.origin_info.db index 9697a37..8cfeb58 100644 --- a/kintex7/segbits_int_r.origin_info.db +++ b/kintex7/segbits_int_r.origin_info.db
@@ -329,7 +329,7 @@ INT_R.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08 INT_R.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08 INT_R.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08 -INT_R.FAN_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_08 20_08 23_08 24_08 25_08 +INT_R.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08 INT_R.FAN_ALT4.LOGIC_OUTS4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08 INT_R.FAN_ALT4.LOGIC_OUTS8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08 INT_R.FAN_ALT4.LOGIC_OUTS18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08 @@ -705,7 +705,7 @@ INT_R.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43 INT_R.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40 INT_R.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43 -INT_R.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43 +INT_R.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43 INT_R.EE4BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_57 07_57 INT_R.EE4BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_57 04_58 INT_R.EE4BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_56 04_58 @@ -725,7 +725,7 @@ INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59 INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56 INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59 -INT_R.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59 +INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59 INT_R.EL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_20 14_21 INT_R.EL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_21 14_21 INT_R.EL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_21 13_21 @@ -2273,7 +2273,7 @@ INT_R.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55 INT_R.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52 INT_R.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53 -INT_R.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52 +INT_R.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52 INT_R.NL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_16 14_17 INT_R.NL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_17 14_17 INT_R.NL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_17 13_17 @@ -3321,7 +3321,7 @@ INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44 INT_R.SW6BEG2.LOGIC_OUTS20 origin:050-pip-seed 06_44 07_45 INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45 -INT_R.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44 +INT_R.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44 INT_R.SW6BEG2.LVB0 origin:056-pip-rem 04_46 05_44 INT_R.SW6BEG2.LVB12 origin:056-pip-rem 05_44 07_45 INT_R.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47 @@ -3344,7 +3344,7 @@ INT_R.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60 INT_R.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63 INT_R.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61 -INT_R.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60 +INT_R.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60 INT_R.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60 INT_R.SW6BEG3.LV18 origin:056-pip-rem 05_60 07_61 INT_R.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61 @@ -3623,7 +3623,7 @@ INT_R.WW4BEG3.LH0 origin:056-pip-rem 04_50 05_48 INT_R.WW4BEG3.LV18 origin:056-pip-rem 05_48 07_49 INT_R.WW4BEG3.NE2END3 origin:050-pip-seed 02_49 05_51 -INT_R.WW4BEG3.NE6END3 origin:056-pip-rem 05_48 05_51 +INT_R.WW4BEG3.NE6END3 origin:050-pip-seed 05_48 05_51 INT_R.WW4BEG3.NN2END3 origin:050-pip-seed 03_48 05_51 INT_R.WW4BEG3.NN6END3 origin:050-pip-seed 05_51 06_48 INT_R.WW4BEG3.NW2END3 origin:050-pip-seed 02_49 03_49
diff --git a/zynq7/mask_lioi3.db b/zynq7/mask_lioi3.db index 4a5f68d..45c988a 100644 --- a/zynq7/mask_lioi3.db +++ b/zynq7/mask_lioi3.db
@@ -1,5 +1,5 @@ bit 25_07 -bit 25_16 +bit 25_08 bit 25_20 bit 25_21 bit 25_23
diff --git a/zynq7/mask_lioi3_tbytesrc.db b/zynq7/mask_lioi3_tbytesrc.db index 4a5f68d..45c988a 100644 --- a/zynq7/mask_lioi3_tbytesrc.db +++ b/zynq7/mask_lioi3_tbytesrc.db
@@ -1,5 +1,5 @@ bit 25_07 -bit 25_16 +bit 25_08 bit 25_20 bit 25_21 bit 25_23
diff --git a/zynq7/mask_lioi3_tbyteterm.db b/zynq7/mask_lioi3_tbyteterm.db index 4a5f68d..45c988a 100644 --- a/zynq7/mask_lioi3_tbyteterm.db +++ b/zynq7/mask_lioi3_tbyteterm.db
@@ -1,5 +1,5 @@ bit 25_07 -bit 25_16 +bit 25_08 bit 25_20 bit 25_21 bit 25_23
diff --git a/zynq7/mask_rioi3.db b/zynq7/mask_rioi3.db index 4a5f68d..45c988a 100644 --- a/zynq7/mask_rioi3.db +++ b/zynq7/mask_rioi3.db
@@ -1,5 +1,5 @@ bit 25_07 -bit 25_16 +bit 25_08 bit 25_20 bit 25_21 bit 25_23
diff --git a/zynq7/mask_rioi3_tbytesrc.db b/zynq7/mask_rioi3_tbytesrc.db index 4a5f68d..45c988a 100644 --- a/zynq7/mask_rioi3_tbytesrc.db +++ b/zynq7/mask_rioi3_tbytesrc.db
@@ -1,5 +1,5 @@ bit 25_07 -bit 25_16 +bit 25_08 bit 25_20 bit 25_21 bit 25_23
diff --git a/zynq7/mask_rioi3_tbyteterm.db b/zynq7/mask_rioi3_tbyteterm.db index 4a5f68d..45c988a 100644 --- a/zynq7/mask_rioi3_tbyteterm.db +++ b/zynq7/mask_rioi3_tbyteterm.db
@@ -1,5 +1,5 @@ bit 25_07 -bit 25_16 +bit 25_08 bit 25_20 bit 25_21 bit 25_23
diff --git a/zynq7/segbits_int_l.origin_info.db b/zynq7/segbits_int_l.origin_info.db index d6d514d..c43a130 100644 --- a/zynq7/segbits_int_l.origin_info.db +++ b/zynq7/segbits_int_l.origin_info.db
@@ -301,7 +301,7 @@ INT_L.FAN_ALT0.FAN_BOUNCE6 origin:050-pip-seed !23_00 20_00 22_00 24_00 25_00 INT_L.FAN_ALT0.LOGIC_OUTS_L0 origin:050-pip-seed !23_00 21_00 22_00 24_00 25_00 INT_L.FAN_ALT0.LOGIC_OUTS_L12 origin:050-pip-seed !22_00 21_00 23_00 24_00 25_00 -INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:050-pip-seed !22_00 !23_00 !25_00 21_00 24_00 +INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:056-pip-rem !22_00 !23_00 !25_00 21_00 24_00 INT_L.FAN_ALT0.SR1END_N3_3 origin:050-pip-seed !23_00 19_01 22_00 24_00 25_00 INT_L.FAN_ALT0.SS2END_N0_3 origin:050-pip-seed !22_00 !23_00 !24_00 17_00 25_00 INT_L.FAN_ALT0.SW2END_N0_3 origin:050-pip-seed !22_00 !23_00 !25_00 17_00 24_00 @@ -1937,7 +1937,7 @@ INT_L.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59 INT_L.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56 INT_L.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59 -INT_L.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59 +INT_L.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59 INT_L.EL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_20 14_21 INT_L.EL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_21 14_21 INT_L.EL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_21 13_21 @@ -2273,7 +2273,7 @@ INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55 INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52 INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53 -INT_L.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52 +INT_L.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52 INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17 INT_L.NL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_17 14_17 INT_L.NL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_17 13_17 @@ -2491,7 +2491,7 @@ INT_L.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52 INT_L.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55 INT_L.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54 -INT_L.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55 +INT_L.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55 INT_L.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52 INT_L.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55 INT_L.NR1BEG0.LOGIC_OUTS_L0 origin:050-pip-seed 11_07 14_07 @@ -3302,7 +3302,7 @@ INT_L.SW6BEG1.LOGIC_OUTS_L23 origin:050-pip-seed 04_30 06_28 INT_L.SW6BEG1.LV_L9 origin:056-pip-rem 04_30 05_28 INT_L.SW6BEG1.EE2END1 origin:050-pip-seed 03_28 04_29 -INT_L.SW6BEG1.EE4END1 origin:050-pip-seed 04_29 05_28 +INT_L.SW6BEG1.EE4END1 origin:056-pip-rem 04_29 05_28 INT_L.SW6BEG1.LH6 origin:056-pip-rem 05_28 07_29 INT_L.SW6BEG1.NW2END2 origin:050-pip-seed 02_29 05_31 INT_L.SW6BEG1.NW6END2 origin:050-pip-seed 05_31 06_28 @@ -3603,7 +3603,7 @@ INT_L.WW4BEG2.LVB_L0 origin:056-pip-rem 04_34 05_32 INT_L.WW4BEG2.LVB_L12 origin:056-pip-rem 05_32 07_33 INT_L.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35 -INT_L.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35 +INT_L.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35 INT_L.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35 INT_L.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32 INT_L.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
diff --git a/zynq7/segbits_int_r.origin_info.db b/zynq7/segbits_int_r.origin_info.db index 78bf6ea..aea914c 100644 --- a/zynq7/segbits_int_r.origin_info.db +++ b/zynq7/segbits_int_r.origin_info.db
@@ -328,8 +328,8 @@ INT_R.FAN_ALT3.WW2END3 origin:050-pip-seed !22_56 !23_56 !24_56 19_57 25_56 INT_R.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08 INT_R.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08 -INT_R.FAN_ALT4.FAN_BOUNCE2 origin:056-pip-rem !23_08 20_08 22_08 24_08 25_08 -INT_R.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08 +INT_R.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08 +INT_R.FAN_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_08 20_08 23_08 24_08 25_08 INT_R.FAN_ALT4.LOGIC_OUTS4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08 INT_R.FAN_ALT4.LOGIC_OUTS8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08 INT_R.FAN_ALT4.LOGIC_OUTS18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08 @@ -665,7 +665,7 @@ INT_R.EE4BEG0.SS2END0 origin:050-pip-seed 03_08 05_11 INT_R.EE4BEG0.SS6END0 origin:050-pip-seed 05_11 06_08 INT_R.EE4BEG0.SW2END0 origin:050-pip-seed 02_09 05_11 -INT_R.EE4BEG0.SW6END0 origin:050-pip-seed 05_08 05_11 +INT_R.EE4BEG0.SW6END0 origin:056-pip-rem 05_08 05_11 INT_R.EE4BEG1.LOGIC_OUTS1 origin:050-pip-seed 02_25 07_25 INT_R.EE4BEG1.LOGIC_OUTS5 origin:050-pip-seed 02_25 04_26 INT_R.EE4BEG1.LOGIC_OUTS9 origin:050-pip-seed 03_24 04_26 @@ -685,7 +685,7 @@ INT_R.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27 INT_R.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24 INT_R.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27 -INT_R.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27 +INT_R.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27 INT_R.EE4BEG2.LOGIC_OUTS2 origin:050-pip-seed 02_41 04_42 INT_R.EE4BEG2.LOGIC_OUTS6 origin:050-pip-seed 02_41 07_41 INT_R.EE4BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_40 07_41 @@ -725,7 +725,7 @@ INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59 INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56 INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59 -INT_R.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59 +INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59 INT_R.EL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_20 14_21 INT_R.EL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_21 14_21 INT_R.EL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_21 13_21 @@ -2471,7 +2471,7 @@ INT_R.NN6BEG2.NW2END2 origin:050-pip-seed 03_38 04_36 INT_R.NN6BEG2.NW6END2 origin:050-pip-seed 04_36 07_39 INT_R.NN6BEG2.SE2END2 origin:050-pip-seed 03_38 05_38 -INT_R.NN6BEG2.SE6END2 origin:056-pip-rem 05_38 07_39 +INT_R.NN6BEG2.SE6END2 origin:050-pip-seed 05_38 07_39 INT_R.NN6BEG2.WW2END1 origin:050-pip-seed 02_39 04_36 INT_R.NN6BEG2.WW4END2 origin:050-pip-seed 04_36 04_39 INT_R.NN6BEG3.LOGIC_OUTS3 origin:050-pip-seed 03_54 06_54 @@ -2491,7 +2491,7 @@ INT_R.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52 INT_R.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55 INT_R.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54 -INT_R.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55 +INT_R.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55 INT_R.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52 INT_R.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55 INT_R.NR1BEG0.LOGIC_OUTS0 origin:050-pip-seed 11_07 14_07 @@ -3321,7 +3321,7 @@ INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44 INT_R.SW6BEG2.LOGIC_OUTS20 origin:050-pip-seed 06_44 07_45 INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45 -INT_R.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44 +INT_R.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44 INT_R.SW6BEG2.LVB0 origin:056-pip-rem 04_46 05_44 INT_R.SW6BEG2.LVB12 origin:056-pip-rem 05_44 07_45 INT_R.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47 @@ -3344,7 +3344,7 @@ INT_R.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60 INT_R.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63 INT_R.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61 -INT_R.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60 +INT_R.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60 INT_R.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60 INT_R.SW6BEG3.LV18 origin:056-pip-rem 05_60 07_61 INT_R.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61 @@ -3603,7 +3603,7 @@ INT_R.WW4BEG2.LVB0 origin:056-pip-rem 04_34 05_32 INT_R.WW4BEG2.LVB12 origin:056-pip-rem 05_32 07_33 INT_R.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35 -INT_R.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35 +INT_R.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35 INT_R.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35 INT_R.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32 INT_R.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
diff --git a/zynq7/timings/DSP_L.sdf b/zynq7/timings/DSP_L.sdf index e23a6ff..4eb87d8 100644 --- a/zynq7/timings/DSP_L.sdf +++ b/zynq7/timings/DSP_L.sdf
@@ -260,13 +260,13 @@ (INSTANCE DSP48E1) (DELAY (ABSOLUTE - (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400)) - (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046)) - (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029)) - (IOPATH A P (0.587::2.142)(1.346::5.070)) - (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636)) - (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636)) - (IOPATH A PCOUT (0.580::2.133)(1.334::5.046)) + (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400)) + (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046)) + (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029)) + (IOPATH D P (0.587::2.142)(1.346::5.070)) + (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH D PCOUT (0.580::2.133)(1.334::5.046)) ) ) ) @@ -275,13 +275,13 @@ (INSTANCE DSP48E1) (DELAY (ABSOLUTE - (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400)) - (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046)) - (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029)) - (IOPATH A P (0.587::2.142)(1.346::5.070)) - (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636)) - (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636)) - (IOPATH A PCOUT (0.580::2.133)(1.334::5.046)) + (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400)) + (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046)) + (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029)) + (IOPATH D P (0.587::2.142)(1.346::5.070)) + (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH D PCOUT (0.580::2.133)(1.334::5.046)) ) ) ) @@ -289,48 +289,48 @@ (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") (INSTANCE DSP48E1) (TIMINGCHECK - (HOLD A (posedge CLK) (-4.951::-0.994)) - (SETUP A (posedge CLK) (0.994::4.951)) + (HOLD D (posedge CLK) (-4.951::-0.994)) + (SETUP D (posedge CLK) (0.994::4.951)) ) ) (CELL (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") (INSTANCE DSP48E1) (TIMINGCHECK - (HOLD A (posedge CLK) (-5.342::-1.063)) - (SETUP A (posedge CLK) (1.063::5.342)) + (HOLD D (posedge CLK) (-5.342::-1.063)) + (SETUP D (posedge CLK) (1.063::5.342)) ) ) (CELL (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") (INSTANCE DSP48E1) (TIMINGCHECK - (HOLD A (posedge CLK) (-4.951::-0.994)) - (SETUP A (posedge CLK) (0.994::4.951)) + (HOLD D (posedge CLK) (-4.951::-0.994)) + (SETUP D (posedge CLK) (0.994::4.951)) ) ) (CELL (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") (INSTANCE DSP48E1) (TIMINGCHECK - (HOLD A (posedge CLK) (-5.342::-1.063)) - (SETUP A (posedge CLK) (1.063::5.342)) + (HOLD D (posedge CLK) (-5.342::-1.063)) + (SETUP D (posedge CLK) (1.063::5.342)) ) ) (CELL (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") (INSTANCE DSP48E1) (TIMINGCHECK - (HOLD A (posedge CLK) (-3.158::-0.249)) - (SETUP A (posedge CLK) (0.249::3.158)) + (HOLD D (posedge CLK) (-3.158::-0.249)) + (SETUP D (posedge CLK) (0.249::3.158)) ) ) (CELL (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") (INSTANCE DSP48E1) (TIMINGCHECK - (HOLD A (posedge CLK) (-3.158::-0.249)) - (SETUP A (posedge CLK) (0.249::3.158)) + (HOLD D (posedge CLK) (-3.158::-0.249)) + (SETUP D (posedge CLK) (0.249::3.158)) ) ) (CELL @@ -1837,8 +1837,12 @@ (INSTANCE DSP48E1) (DELAY (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650)) (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297)) + (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279)) (IOPATH CLK P (0.696::2.251)(1.533::5.320)) + (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885)) + (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885)) (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515)) ) ) @@ -1848,34 +1852,14 @@ (INSTANCE DSP48E1) (DELAY (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650)) (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297)) + (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279)) (IOPATH CLK P (0.696::2.251)(1.533::5.320)) + (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885)) + (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885)) (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515)) ) ) ) - (CELL - (CELLTYPE "DSP48E1DREG_1_A_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") - (INSTANCE DSP48E1) - (DELAY - (ABSOLUTE - (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650)) - (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279)) - (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885)) - (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885)) - ) - ) - ) - (CELL - (CELLTYPE "DSP48E1DREG_1_A_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") - (INSTANCE DSP48E1) - (DELAY - (ABSOLUTE - (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650)) - (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279)) - (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885)) - (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885)) - ) - ) - ) ) \ No newline at end of file
diff --git a/zynq7/timings/DSP_R.sdf b/zynq7/timings/DSP_R.sdf index e23a6ff..4eb87d8 100644 --- a/zynq7/timings/DSP_R.sdf +++ b/zynq7/timings/DSP_R.sdf
@@ -260,13 +260,13 @@ (INSTANCE DSP48E1) (DELAY (ABSOLUTE - (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400)) - (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046)) - (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029)) - (IOPATH A P (0.587::2.142)(1.346::5.070)) - (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636)) - (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636)) - (IOPATH A PCOUT (0.580::2.133)(1.334::5.046)) + (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400)) + (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046)) + (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029)) + (IOPATH D P (0.587::2.142)(1.346::5.070)) + (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH D PCOUT (0.580::2.133)(1.334::5.046)) ) ) ) @@ -275,13 +275,13 @@ (INSTANCE DSP48E1) (DELAY (ABSOLUTE - (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400)) - (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046)) - (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029)) - (IOPATH A P (0.587::2.142)(1.346::5.070)) - (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636)) - (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636)) - (IOPATH A PCOUT (0.580::2.133)(1.334::5.046)) + (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400)) + (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046)) + (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029)) + (IOPATH D P (0.587::2.142)(1.346::5.070)) + (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH D PCOUT (0.580::2.133)(1.334::5.046)) ) ) ) @@ -289,48 +289,48 @@ (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") (INSTANCE DSP48E1) (TIMINGCHECK - (HOLD A (posedge CLK) (-4.951::-0.994)) - (SETUP A (posedge CLK) (0.994::4.951)) + (HOLD D (posedge CLK) (-4.951::-0.994)) + (SETUP D (posedge CLK) (0.994::4.951)) ) ) (CELL (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") (INSTANCE DSP48E1) (TIMINGCHECK - (HOLD A (posedge CLK) (-5.342::-1.063)) - (SETUP A (posedge CLK) (1.063::5.342)) + (HOLD D (posedge CLK) (-5.342::-1.063)) + (SETUP D (posedge CLK) (1.063::5.342)) ) ) (CELL (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") (INSTANCE DSP48E1) (TIMINGCHECK - (HOLD A (posedge CLK) (-4.951::-0.994)) - (SETUP A (posedge CLK) (0.994::4.951)) + (HOLD D (posedge CLK) (-4.951::-0.994)) + (SETUP D (posedge CLK) (0.994::4.951)) ) ) (CELL (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") (INSTANCE DSP48E1) (TIMINGCHECK - (HOLD A (posedge CLK) (-5.342::-1.063)) - (SETUP A (posedge CLK) (1.063::5.342)) + (HOLD D (posedge CLK) (-5.342::-1.063)) + (SETUP D (posedge CLK) (1.063::5.342)) ) ) (CELL (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") (INSTANCE DSP48E1) (TIMINGCHECK - (HOLD A (posedge CLK) (-3.158::-0.249)) - (SETUP A (posedge CLK) (0.249::3.158)) + (HOLD D (posedge CLK) (-3.158::-0.249)) + (SETUP D (posedge CLK) (0.249::3.158)) ) ) (CELL (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") (INSTANCE DSP48E1) (TIMINGCHECK - (HOLD A (posedge CLK) (-3.158::-0.249)) - (SETUP A (posedge CLK) (0.249::3.158)) + (HOLD D (posedge CLK) (-3.158::-0.249)) + (SETUP D (posedge CLK) (0.249::3.158)) ) ) (CELL @@ -1837,8 +1837,12 @@ (INSTANCE DSP48E1) (DELAY (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650)) (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297)) + (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279)) (IOPATH CLK P (0.696::2.251)(1.533::5.320)) + (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885)) + (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885)) (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515)) ) ) @@ -1848,34 +1852,14 @@ (INSTANCE DSP48E1) (DELAY (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650)) (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297)) + (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279)) (IOPATH CLK P (0.696::2.251)(1.533::5.320)) + (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885)) + (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885)) (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515)) ) ) ) - (CELL - (CELLTYPE "DSP48E1DREG_1_A_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") - (INSTANCE DSP48E1) - (DELAY - (ABSOLUTE - (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650)) - (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279)) - (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885)) - (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885)) - ) - ) - ) - (CELL - (CELLTYPE "DSP48E1DREG_1_A_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") - (INSTANCE DSP48E1) - (DELAY - (ABSOLUTE - (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650)) - (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279)) - (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885)) - (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885)) - ) - ) - ) ) \ No newline at end of file
diff --git a/zynq7/timings/LIOB33.sdf b/zynq7/timings/LIOB33.sdf index bfd9395..43ad6e0 100644 --- a/zynq7/timings/LIOB33.sdf +++ b/zynq7/timings/LIOB33.sdf
@@ -4,11 +4,11 @@ (TIMESCALE 1ns) (CELL - (CELLTYPE "IOB33_INBUF_ENIOB33_IOB_INBUF_EN") + (CELLTYPE "IOB33M_INBUF_ENIOB33_IOBM_INBUF_EN") (INSTANCE IOB33M) (DELAY (ABSOLUTE - (IOPATH IBUFDISABLE OUT (0.339::0.390)(1.027::1.182)) + (IOPATH IBUFDISABLE OUT (0.339::0.390)(1.016::1.169)) ) ) )