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            "RAMB18_X2Y5": "RAMB18E1",
            "RAMB36_X2Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y125": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y50": "FIFO18E1",
            "RAMB18_X2Y51": "RAMB18E1",
            "RAMB36_X2Y25": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y130": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y52": "FIFO18E1",
            "RAMB18_X2Y53": "RAMB18E1",
            "RAMB36_X2Y26": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y135": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y54": "FIFO18E1",
            "RAMB18_X2Y55": "RAMB18E1",
            "RAMB36_X2Y27": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y140": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y56": "FIFO18E1",
            "RAMB18_X2Y57": "RAMB18E1",
            "RAMB36_X2Y28": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y145": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y58": "FIFO18E1",
            "RAMB18_X2Y59": "RAMB18E1",
            "RAMB36_X2Y29": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 77,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y6": "FIFO18E1",
            "RAMB18_X2Y7": "RAMB18E1",
            "RAMB36_X2Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y150": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y60": "FIFO18E1",
            "RAMB18_X2Y61": "RAMB18E1",
            "RAMB36_X2Y30": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y155": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y62": "FIFO18E1",
            "RAMB18_X2Y63": "RAMB18E1",
            "RAMB36_X2Y31": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y160": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y64": "FIFO18E1",
            "RAMB18_X2Y65": "RAMB18E1",
            "RAMB36_X2Y32": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y165": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y66": "FIFO18E1",
            "RAMB18_X2Y67": "RAMB18E1",
            "RAMB36_X2Y33": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y170": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y68": "FIFO18E1",
            "RAMB18_X2Y69": "RAMB18E1",
            "RAMB36_X2Y34": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y175": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y70": "FIFO18E1",
            "RAMB18_X2Y71": "RAMB18E1",
            "RAMB36_X2Y35": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y180": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y72": "FIFO18E1",
            "RAMB18_X2Y73": "RAMB18E1",
            "RAMB36_X2Y36": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y185": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y74": "FIFO18E1",
            "RAMB18_X2Y75": "RAMB18E1",
            "RAMB36_X2Y37": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y190": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y76": "FIFO18E1",
            "RAMB18_X2Y77": "RAMB18E1",
            "RAMB36_X2Y38": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y195": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y78": "FIFO18E1",
            "RAMB18_X2Y79": "RAMB18E1",
            "RAMB36_X2Y39": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 77,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y8": "FIFO18E1",
            "RAMB18_X2Y9": "RAMB18E1",
            "RAMB36_X2Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 77,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y10": "FIFO18E1",
            "RAMB18_X2Y11": "RAMB18E1",
            "RAMB36_X2Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 77,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y12": "FIFO18E1",
            "RAMB18_X2Y13": "RAMB18E1",
            "RAMB36_X2Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 77,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y14": "FIFO18E1",
            "RAMB18_X2Y15": "RAMB18E1",
            "RAMB36_X2Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 77,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y16": "FIFO18E1",
            "RAMB18_X2Y17": "RAMB18E1",
            "RAMB36_X2Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 77,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y18": "FIFO18E1",
            "RAMB18_X2Y19": "RAMB18E1",
            "RAMB36_X2Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 77,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y2": "FIFO18E1",
            "RAMB18_X2Y3": "RAMB18E1",
            "RAMB36_X2Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y20": "FIFO18E1",
            "RAMB18_X2Y21": "RAMB18E1",
            "RAMB36_X2Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y22": "FIFO18E1",
            "RAMB18_X2Y23": "RAMB18E1",
            "RAMB36_X2Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y24": "FIFO18E1",
            "RAMB18_X2Y25": "RAMB18E1",
            "RAMB36_X2Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y26": "FIFO18E1",
            "RAMB18_X2Y27": "RAMB18E1",
            "RAMB36_X2Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y28": "FIFO18E1",
            "RAMB18_X2Y29": "RAMB18E1",
            "RAMB36_X2Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y30": "FIFO18E1",
            "RAMB18_X2Y31": "RAMB18E1",
            "RAMB36_X2Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y32": "FIFO18E1",
            "RAMB18_X2Y33": "RAMB18E1",
            "RAMB36_X2Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y34": "FIFO18E1",
            "RAMB18_X2Y35": "RAMB18E1",
            "RAMB36_X2Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y36": "FIFO18E1",
            "RAMB18_X2Y37": "RAMB18E1",
            "RAMB36_X2Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y38": "FIFO18E1",
            "RAMB18_X2Y39": "RAMB18E1",
            "RAMB36_X2Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y0": "FIFO18E1",
            "RAMB18_X0Y1": "RAMB18E1",
            "RAMB36_X0Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y4": "FIFO18E1",
            "RAMB18_X0Y5": "RAMB18E1",
            "RAMB36_X0Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y100": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y40": "FIFO18E1",
            "RAMB18_X0Y41": "RAMB18E1",
            "RAMB36_X0Y20": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y105": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y42": "FIFO18E1",
            "RAMB18_X0Y43": "RAMB18E1",
            "RAMB36_X0Y21": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y110": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y44": "FIFO18E1",
            "RAMB18_X0Y45": "RAMB18E1",
            "RAMB36_X0Y22": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y115": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y46": "FIFO18E1",
            "RAMB18_X0Y47": "RAMB18E1",
            "RAMB36_X0Y23": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y120": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y48": "FIFO18E1",
            "RAMB18_X0Y49": "RAMB18E1",
            "RAMB36_X0Y24": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y125": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y50": "FIFO18E1",
            "RAMB18_X0Y51": "RAMB18E1",
            "RAMB36_X0Y25": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y130": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y52": "FIFO18E1",
            "RAMB18_X0Y53": "RAMB18E1",
            "RAMB36_X0Y26": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y135": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y54": "FIFO18E1",
            "RAMB18_X0Y55": "RAMB18E1",
            "RAMB36_X0Y27": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y140": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y56": "FIFO18E1",
            "RAMB18_X0Y57": "RAMB18E1",
            "RAMB36_X0Y28": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y145": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y58": "FIFO18E1",
            "RAMB18_X0Y59": "RAMB18E1",
            "RAMB36_X0Y29": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y6": "FIFO18E1",
            "RAMB18_X0Y7": "RAMB18E1",
            "RAMB36_X0Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y150": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y60": "FIFO18E1",
            "RAMB18_X0Y61": "RAMB18E1",
            "RAMB36_X0Y30": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y155": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y62": "FIFO18E1",
            "RAMB18_X0Y63": "RAMB18E1",
            "RAMB36_X0Y31": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y160": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y64": "FIFO18E1",
            "RAMB18_X0Y65": "RAMB18E1",
            "RAMB36_X0Y32": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y165": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y66": "FIFO18E1",
            "RAMB18_X0Y67": "RAMB18E1",
            "RAMB36_X0Y33": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y170": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y68": "FIFO18E1",
            "RAMB18_X0Y69": "RAMB18E1",
            "RAMB36_X0Y34": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y175": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y70": "FIFO18E1",
            "RAMB18_X0Y71": "RAMB18E1",
            "RAMB36_X0Y35": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y180": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y72": "FIFO18E1",
            "RAMB18_X0Y73": "RAMB18E1",
            "RAMB36_X0Y36": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y185": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y74": "FIFO18E1",
            "RAMB18_X0Y75": "RAMB18E1",
            "RAMB36_X0Y37": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y190": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y76": "FIFO18E1",
            "RAMB18_X0Y77": "RAMB18E1",
            "RAMB36_X0Y38": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y195": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y78": "FIFO18E1",
            "RAMB18_X0Y79": "RAMB18E1",
            "RAMB36_X0Y39": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y8": "FIFO18E1",
            "RAMB18_X0Y9": "RAMB18E1",
            "RAMB36_X0Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y10": "FIFO18E1",
            "RAMB18_X0Y11": "RAMB18E1",
            "RAMB36_X0Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y12": "FIFO18E1",
            "RAMB18_X0Y13": "RAMB18E1",
            "RAMB36_X0Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y14": "FIFO18E1",
            "RAMB18_X0Y15": "RAMB18E1",
            "RAMB36_X0Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y16": "FIFO18E1",
            "RAMB18_X0Y17": "RAMB18E1",
            "RAMB36_X0Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y18": "FIFO18E1",
            "RAMB18_X0Y19": "RAMB18E1",
            "RAMB36_X0Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y2": "FIFO18E1",
            "RAMB18_X0Y3": "RAMB18E1",
            "RAMB36_X0Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y20": "FIFO18E1",
            "RAMB18_X0Y21": "RAMB18E1",
            "RAMB36_X0Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y22": "FIFO18E1",
            "RAMB18_X0Y23": "RAMB18E1",
            "RAMB36_X0Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y24": "FIFO18E1",
            "RAMB18_X0Y25": "RAMB18E1",
            "RAMB36_X0Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y26": "FIFO18E1",
            "RAMB18_X0Y27": "RAMB18E1",
            "RAMB36_X0Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y28": "FIFO18E1",
            "RAMB18_X0Y29": "RAMB18E1",
            "RAMB36_X0Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y30": "FIFO18E1",
            "RAMB18_X0Y31": "RAMB18E1",
            "RAMB36_X0Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y32": "FIFO18E1",
            "RAMB18_X0Y33": "RAMB18E1",
            "RAMB36_X0Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y34": "FIFO18E1",
            "RAMB18_X0Y35": "RAMB18E1",
            "RAMB36_X0Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y36": "FIFO18E1",
            "RAMB18_X0Y37": "RAMB18E1",
            "RAMB36_X0Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y38": "FIFO18E1",
            "RAMB18_X0Y39": "RAMB18E1",
            "RAMB36_X0Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_R_X17Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y0": "FIFO18E1",
            "RAMB18_X1Y1": "RAMB18E1",
            "RAMB36_X1Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y4": "FIFO18E1",
            "RAMB18_X1Y5": "RAMB18E1",
            "RAMB36_X1Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y100": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y40": "FIFO18E1",
            "RAMB18_X1Y41": "RAMB18E1",
            "RAMB36_X1Y20": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y105": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y42": "FIFO18E1",
            "RAMB18_X1Y43": "RAMB18E1",
            "RAMB36_X1Y21": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y110": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y44": "FIFO18E1",
            "RAMB18_X1Y45": "RAMB18E1",
            "RAMB36_X1Y22": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y115": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y46": "FIFO18E1",
            "RAMB18_X1Y47": "RAMB18E1",
            "RAMB36_X1Y23": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y120": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y48": "FIFO18E1",
            "RAMB18_X1Y49": "RAMB18E1",
            "RAMB36_X1Y24": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y125": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y50": "FIFO18E1",
            "RAMB18_X1Y51": "RAMB18E1",
            "RAMB36_X1Y25": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y130": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y52": "FIFO18E1",
            "RAMB18_X1Y53": "RAMB18E1",
            "RAMB36_X1Y26": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y135": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y54": "FIFO18E1",
            "RAMB18_X1Y55": "RAMB18E1",
            "RAMB36_X1Y27": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y140": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y56": "FIFO18E1",
            "RAMB18_X1Y57": "RAMB18E1",
            "RAMB36_X1Y28": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y145": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y58": "FIFO18E1",
            "RAMB18_X1Y59": "RAMB18E1",
            "RAMB36_X1Y29": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y6": "FIFO18E1",
            "RAMB18_X1Y7": "RAMB18E1",
            "RAMB36_X1Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y150": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y60": "FIFO18E1",
            "RAMB18_X1Y61": "RAMB18E1",
            "RAMB36_X1Y30": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y155": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y62": "FIFO18E1",
            "RAMB18_X1Y63": "RAMB18E1",
            "RAMB36_X1Y31": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y160": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y64": "FIFO18E1",
            "RAMB18_X1Y65": "RAMB18E1",
            "RAMB36_X1Y32": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y165": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y66": "FIFO18E1",
            "RAMB18_X1Y67": "RAMB18E1",
            "RAMB36_X1Y33": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y170": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y68": "FIFO18E1",
            "RAMB18_X1Y69": "RAMB18E1",
            "RAMB36_X1Y34": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y175": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y70": "FIFO18E1",
            "RAMB18_X1Y71": "RAMB18E1",
            "RAMB36_X1Y35": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y180": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y72": "FIFO18E1",
            "RAMB18_X1Y73": "RAMB18E1",
            "RAMB36_X1Y36": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y185": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y74": "FIFO18E1",
            "RAMB18_X1Y75": "RAMB18E1",
            "RAMB36_X1Y37": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y190": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y76": "FIFO18E1",
            "RAMB18_X1Y77": "RAMB18E1",
            "RAMB36_X1Y38": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y195": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y78": "FIFO18E1",
            "RAMB18_X1Y79": "RAMB18E1",
            "RAMB36_X1Y39": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y8": "FIFO18E1",
            "RAMB18_X1Y9": "RAMB18E1",
            "RAMB36_X1Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y10": "FIFO18E1",
            "RAMB18_X1Y11": "RAMB18E1",
            "RAMB36_X1Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y12": "FIFO18E1",
            "RAMB18_X1Y13": "RAMB18E1",
            "RAMB36_X1Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y14": "FIFO18E1",
            "RAMB18_X1Y15": "RAMB18E1",
            "RAMB36_X1Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y16": "FIFO18E1",
            "RAMB18_X1Y17": "RAMB18E1",
            "RAMB36_X1Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y18": "FIFO18E1",
            "RAMB18_X1Y19": "RAMB18E1",
            "RAMB36_X1Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y2": "FIFO18E1",
            "RAMB18_X1Y3": "RAMB18E1",
            "RAMB36_X1Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y20": "FIFO18E1",
            "RAMB18_X1Y21": "RAMB18E1",
            "RAMB36_X1Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y22": "FIFO18E1",
            "RAMB18_X1Y23": "RAMB18E1",
            "RAMB36_X1Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y24": "FIFO18E1",
            "RAMB18_X1Y25": "RAMB18E1",
            "RAMB36_X1Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y26": "FIFO18E1",
            "RAMB18_X1Y27": "RAMB18E1",
            "RAMB36_X1Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y28": "FIFO18E1",
            "RAMB18_X1Y29": "RAMB18E1",
            "RAMB36_X1Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y30": "FIFO18E1",
            "RAMB18_X1Y31": "RAMB18E1",
            "RAMB36_X1Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y32": "FIFO18E1",
            "RAMB18_X1Y33": "RAMB18E1",
            "RAMB36_X1Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y34": "FIFO18E1",
            "RAMB18_X1Y35": "RAMB18E1",
            "RAMB36_X1Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y36": "FIFO18E1",
            "RAMB18_X1Y37": "RAMB18E1",
            "RAMB36_X1Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y38": "FIFO18E1",
            "RAMB18_X1Y39": "RAMB18E1",
            "RAMB36_X1Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y0": "FIFO18E1",
            "RAMB18_X3Y1": "RAMB18E1",
            "RAMB36_X3Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y4": "FIFO18E1",
            "RAMB18_X3Y5": "RAMB18E1",
            "RAMB36_X3Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y6": "FIFO18E1",
            "RAMB18_X3Y7": "RAMB18E1",
            "RAMB36_X3Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y8": "FIFO18E1",
            "RAMB18_X3Y9": "RAMB18E1",
            "RAMB36_X3Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y10": "FIFO18E1",
            "RAMB18_X3Y11": "RAMB18E1",
            "RAMB36_X3Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y12": "FIFO18E1",
            "RAMB18_X3Y13": "RAMB18E1",
            "RAMB36_X3Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y14": "FIFO18E1",
            "RAMB18_X3Y15": "RAMB18E1",
            "RAMB36_X3Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y16": "FIFO18E1",
            "RAMB18_X3Y17": "RAMB18E1",
            "RAMB36_X3Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y18": "FIFO18E1",
            "RAMB18_X3Y19": "RAMB18E1",
            "RAMB36_X3Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y2": "FIFO18E1",
            "RAMB18_X3Y3": "RAMB18E1",
            "RAMB36_X3Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 97,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y20": "FIFO18E1",
            "RAMB18_X3Y21": "RAMB18E1",
            "RAMB36_X3Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
                "frames": 28,
                "offset": 10,
                "words": 10
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                "baseaddr": "0x00420B00",
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        "type": "CLK_FEED"
    },
    "CLK_FEED_X67Y42": {
        "bits": {},
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        "pin_functions": {},
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        "type": "CLK_FEED"
    },
    "CLK_FEED_X67Y43": {
        "bits": {},
        "grid_x": 67,
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        "pin_functions": {},
        "sites": {},
        "type": "CLK_FEED"
    },
    "CLK_FEED_X67Y44": {
        "bits": {},
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        "pin_functions": {},
        "sites": {},
        "type": "CLK_FEED"
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    "CLK_FEED_X67Y45": {
        "bits": {},
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        "pin_functions": {},
        "sites": {},
        "type": "CLK_FEED"
    },
    "CLK_FEED_X67Y46": {
        "bits": {},
        "grid_x": 67,
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        "pin_functions": {},
        "sites": {},
        "type": "CLK_FEED"
    },
    "CLK_FEED_X67Y47": {
        "bits": {},
        "grid_x": 67,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_FEED"
    },
    "CLK_FEED_X67Y48": {
        "bits": {},
        "grid_x": 67,
        "grid_y": 160,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_FEED"
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    "CLK_FEED_X67Y49": {
        "bits": {},
        "grid_x": 67,
        "grid_y": 159,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_FEED"
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    "CLK_FEED_X67Y5": {
        "bits": {},
        "grid_x": 67,
        "grid_y": 203,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_FEED"
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    "CLK_FEED_X67Y50": {
        "bits": {},
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        "pin_functions": {},
        "sites": {},
        "type": "CLK_FEED"
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    "CLK_FEED_X67Y51": {
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        "pin_functions": {},
        "sites": {},
        "type": "CLK_FEED"
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    "CLK_FEED_X67Y53": {
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        "pin_functions": {},
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y6": {
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        "pin_functions": {},
        "sites": {},
        "type": "CLK_FEED"
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    "CLK_FEED_X67Y61": {
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        "pin_functions": {},
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y62": {
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        "pin_functions": {},
        "sites": {},
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    "CLK_FEED_X67Y63": {
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    "CLK_FEED_X67Y64": {
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    "CLK_FEED_X67Y67": {
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        "pin_functions": {},
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    "CLK_FEED_X67Y68": {
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    "CLK_FEED_X67Y69": {
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y7": {
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y71": {
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y72": {
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    "CLK_FEED_X67Y73": {
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    "CLK_FEED_X67Y8": {
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    "CLK_FEED_X67Y84": {
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y85": {
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y87": {
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y88": {
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y89": {
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    "CLK_FEED_X67Y9": {
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    "CLK_FEED_X67Y92": {
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    "CLK_FEED_X67Y93": {
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y94": {
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        "pin_functions": {},
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y96": {
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    "CLK_FEED_X67Y97": {
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    "CLK_FEED_X67Y98": {
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        "type": "CLK_FEED"
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                "words": 18
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        "grid_y": 182,
        "pin_functions": {},
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            "BUFHCE_X0Y1": "BUFHCE",
            "BUFHCE_X0Y10": "BUFHCE",
            "BUFHCE_X0Y11": "BUFHCE",
            "BUFHCE_X0Y2": "BUFHCE",
            "BUFHCE_X0Y3": "BUFHCE",
            "BUFHCE_X0Y4": "BUFHCE",
            "BUFHCE_X0Y5": "BUFHCE",
            "BUFHCE_X0Y6": "BUFHCE",
            "BUFHCE_X0Y7": "BUFHCE",
            "BUFHCE_X0Y8": "BUFHCE",
            "BUFHCE_X0Y9": "BUFHCE",
            "BUFHCE_X1Y0": "BUFHCE",
            "BUFHCE_X1Y1": "BUFHCE",
            "BUFHCE_X1Y10": "BUFHCE",
            "BUFHCE_X1Y11": "BUFHCE",
            "BUFHCE_X1Y2": "BUFHCE",
            "BUFHCE_X1Y3": "BUFHCE",
            "BUFHCE_X1Y4": "BUFHCE",
            "BUFHCE_X1Y5": "BUFHCE",
            "BUFHCE_X1Y6": "BUFHCE",
            "BUFHCE_X1Y7": "BUFHCE",
            "BUFHCE_X1Y8": "BUFHCE",
            "BUFHCE_X1Y9": "BUFHCE"
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        "type": "CLK_HROW_BOT_R"
    },
    "CLK_HROW_BOT_R_X67Y78": {
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                "baseaddr": "0x00400C80",
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        "grid_y": 130,
        "pin_functions": {},
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            "BUFHCE_X0Y13": "BUFHCE",
            "BUFHCE_X0Y14": "BUFHCE",
            "BUFHCE_X0Y15": "BUFHCE",
            "BUFHCE_X0Y16": "BUFHCE",
            "BUFHCE_X0Y17": "BUFHCE",
            "BUFHCE_X0Y18": "BUFHCE",
            "BUFHCE_X0Y19": "BUFHCE",
            "BUFHCE_X0Y20": "BUFHCE",
            "BUFHCE_X0Y21": "BUFHCE",
            "BUFHCE_X0Y22": "BUFHCE",
            "BUFHCE_X0Y23": "BUFHCE",
            "BUFHCE_X1Y12": "BUFHCE",
            "BUFHCE_X1Y13": "BUFHCE",
            "BUFHCE_X1Y14": "BUFHCE",
            "BUFHCE_X1Y15": "BUFHCE",
            "BUFHCE_X1Y16": "BUFHCE",
            "BUFHCE_X1Y17": "BUFHCE",
            "BUFHCE_X1Y18": "BUFHCE",
            "BUFHCE_X1Y19": "BUFHCE",
            "BUFHCE_X1Y20": "BUFHCE",
            "BUFHCE_X1Y21": "BUFHCE",
            "BUFHCE_X1Y22": "BUFHCE",
            "BUFHCE_X1Y23": "BUFHCE"
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        "type": "CLK_HROW_BOT_R"
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    "CLK_HROW_TOP_R_X67Y130": {
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                "baseaddr": "0x00000C80",
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                "offset": 42,
                "words": 18
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        },
        "clock_region": "X1Y2",
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        "grid_y": 78,
        "pin_functions": {},
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            "BUFHCE_X0Y24": "BUFHCE",
            "BUFHCE_X0Y25": "BUFHCE",
            "BUFHCE_X0Y26": "BUFHCE",
            "BUFHCE_X0Y27": "BUFHCE",
            "BUFHCE_X0Y28": "BUFHCE",
            "BUFHCE_X0Y29": "BUFHCE",
            "BUFHCE_X0Y30": "BUFHCE",
            "BUFHCE_X0Y31": "BUFHCE",
            "BUFHCE_X0Y32": "BUFHCE",
            "BUFHCE_X0Y33": "BUFHCE",
            "BUFHCE_X0Y34": "BUFHCE",
            "BUFHCE_X0Y35": "BUFHCE",
            "BUFHCE_X1Y24": "BUFHCE",
            "BUFHCE_X1Y25": "BUFHCE",
            "BUFHCE_X1Y26": "BUFHCE",
            "BUFHCE_X1Y27": "BUFHCE",
            "BUFHCE_X1Y28": "BUFHCE",
            "BUFHCE_X1Y29": "BUFHCE",
            "BUFHCE_X1Y30": "BUFHCE",
            "BUFHCE_X1Y31": "BUFHCE",
            "BUFHCE_X1Y32": "BUFHCE",
            "BUFHCE_X1Y33": "BUFHCE",
            "BUFHCE_X1Y34": "BUFHCE",
            "BUFHCE_X1Y35": "BUFHCE"
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        "type": "CLK_HROW_TOP_R"
    },
    "CLK_HROW_TOP_R_X67Y182": {
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                "baseaddr": "0x00020C80",
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                "offset": 42,
                "words": 18
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        "clock_region": "X1Y3",
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        "grid_y": 26,
        "pin_functions": {},
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            "BUFHCE_X0Y37": "BUFHCE",
            "BUFHCE_X0Y38": "BUFHCE",
            "BUFHCE_X0Y39": "BUFHCE",
            "BUFHCE_X0Y40": "BUFHCE",
            "BUFHCE_X0Y41": "BUFHCE",
            "BUFHCE_X0Y42": "BUFHCE",
            "BUFHCE_X0Y43": "BUFHCE",
            "BUFHCE_X0Y44": "BUFHCE",
            "BUFHCE_X0Y45": "BUFHCE",
            "BUFHCE_X0Y46": "BUFHCE",
            "BUFHCE_X0Y47": "BUFHCE",
            "BUFHCE_X1Y36": "BUFHCE",
            "BUFHCE_X1Y37": "BUFHCE",
            "BUFHCE_X1Y38": "BUFHCE",
            "BUFHCE_X1Y39": "BUFHCE",
            "BUFHCE_X1Y40": "BUFHCE",
            "BUFHCE_X1Y41": "BUFHCE",
            "BUFHCE_X1Y42": "BUFHCE",
            "BUFHCE_X1Y43": "BUFHCE",
            "BUFHCE_X1Y44": "BUFHCE",
            "BUFHCE_X1Y45": "BUFHCE",
            "BUFHCE_X1Y46": "BUFHCE",
            "BUFHCE_X1Y47": "BUFHCE"
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        "type": "CLK_HROW_TOP_R"
    },
    "CLK_MTBF2_X67Y99": {
        "bits": {},
        "grid_x": 67,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_MTBF2"
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    "CLK_PMV2_SVT_X67Y86": {
        "bits": {},
        "grid_x": 67,
        "grid_y": 122,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_PMV2_SVT"
    },
    "CLK_PMV2_X67Y95": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 67,
        "grid_y": 113,
        "pin_functions": {},
        "sites": {
            "PMV_X0Y2": "PMV2"
        },
        "type": "CLK_PMV2"
    },
    "CLK_PMVIOB_X67Y70": {
        "bits": {},
        "grid_x": 67,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_PMVIOB"
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    "CLK_PMV_X67Y54": {
        "bits": {},
        "grid_x": 67,
        "grid_y": 154,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_PMV"
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    "CLK_TERM_X67Y0": {
        "bits": {},
        "grid_x": 67,
        "grid_y": 208,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_TERM"
    },
    "CLK_TERM_X67Y208": {
        "bits": {},
        "grid_x": 67,
        "grid_y": 0,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_TERM"
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    "CMT_FIFO_L_X109Y20": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 109,
        "grid_y": 188,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y1": "IN_FIFO",
            "OUT_FIFO_X1Y1": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X109Y33": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 109,
        "grid_y": 175,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y2": "IN_FIFO",
            "OUT_FIFO_X1Y2": "OUT_FIFO"
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        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X109Y45": {
        "bits": {},
        "clock_region": "X1Y0",
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        "grid_y": 163,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y3": "IN_FIFO",
            "OUT_FIFO_X1Y3": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X109Y60": {
        "bits": {},
        "clock_region": "X1Y1",
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        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y4": "IN_FIFO",
            "OUT_FIFO_X1Y4": "OUT_FIFO"
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        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X109Y72": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 109,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y5": "IN_FIFO",
            "OUT_FIFO_X1Y5": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X109Y8": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 109,
        "grid_y": 200,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y0": "IN_FIFO",
            "OUT_FIFO_X1Y0": "OUT_FIFO"
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        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X109Y85": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 109,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y6": "IN_FIFO",
            "OUT_FIFO_X1Y6": "OUT_FIFO"
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        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X109Y97": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 109,
        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y7": "IN_FIFO",
            "OUT_FIFO_X1Y7": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_R_X7Y112": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 7,
        "grid_y": 96,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y8": "IN_FIFO",
            "OUT_FIFO_X0Y8": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y124": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 7,
        "grid_y": 84,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y9": "IN_FIFO",
            "OUT_FIFO_X0Y9": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y137": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 7,
        "grid_y": 71,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y10": "IN_FIFO",
            "OUT_FIFO_X0Y10": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y149": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 7,
        "grid_y": 59,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y11": "IN_FIFO",
            "OUT_FIFO_X0Y11": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y164": {
        "bits": {},
        "clock_region": "X0Y3",
        "grid_x": 7,
        "grid_y": 44,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y12": "IN_FIFO",
            "OUT_FIFO_X0Y12": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y176": {
        "bits": {},
        "clock_region": "X0Y3",
        "grid_x": 7,
        "grid_y": 32,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y13": "IN_FIFO",
            "OUT_FIFO_X0Y13": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y189": {
        "bits": {},
        "clock_region": "X0Y3",
        "grid_x": 7,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y14": "IN_FIFO",
            "OUT_FIFO_X0Y14": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y20": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 188,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y1": "IN_FIFO",
            "OUT_FIFO_X0Y1": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y201": {
        "bits": {},
        "clock_region": "X0Y3",
        "grid_x": 7,
        "grid_y": 7,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y15": "IN_FIFO",
            "OUT_FIFO_X0Y15": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y33": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 175,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y2": "IN_FIFO",
            "OUT_FIFO_X0Y2": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y45": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 163,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y3": "IN_FIFO",
            "OUT_FIFO_X0Y3": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y60": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 7,
        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y4": "IN_FIFO",
            "OUT_FIFO_X0Y4": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y72": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 7,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y5": "IN_FIFO",
            "OUT_FIFO_X0Y5": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y8": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 200,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y0": "IN_FIFO",
            "OUT_FIFO_X0Y0": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y85": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 7,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y6": "IN_FIFO",
            "OUT_FIFO_X0Y6": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y97": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 7,
        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y7": "IN_FIFO",
            "OUT_FIFO_X0Y7": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_PMV_L_X109Y1": {
        "bits": {},
        "grid_x": 109,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X109Y103": {
        "bits": {},
        "grid_x": 109,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X109Y51": {
        "bits": {},
        "grid_x": 109,
        "grid_y": 157,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X109Y53": {
        "bits": {},
        "grid_x": 109,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_X7Y1": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y103": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y105": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y155": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y157": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y207": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 1,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y51": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 157,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y53": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_TOP_L_LOWER_B_X108Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 108,
        "grid_y": 147,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X1Y1": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_B_X108Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 199,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X1Y0": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_T_X108Y18": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 190,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y0": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y1": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y0": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y1": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_LOWER_T_X108Y70": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 108,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y4": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y5": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y4": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y5": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_UPPER_B_X108Y31": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 177,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y2": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y3": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y2": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y3": "PHASER_OUT_PHY",
            "PHASER_REF_X1Y0": "PHASER_REF",
            "PHY_CONTROL_X1Y0": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_B_X108Y83": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 108,
        "grid_y": 125,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y6": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y7": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y6": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y7": "PHASER_OUT_PHY",
            "PHASER_REF_X1Y1": "PHASER_REF",
            "PHY_CONTROL_X1Y1": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_T_X108Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 164,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X1Y0": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "CMT_TOP_L_UPPER_T_X108Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 108,
        "grid_y": 112,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X1Y1": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "CMT_TOP_R_LOWER_B_X8Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000080",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 8,
        "grid_y": 95,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X0Y2": "MMCME2_ADV"
        },
        "type": "CMT_TOP_R_LOWER_B"
    },
    "CMT_TOP_R_LOWER_B_X8Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 8,
        "grid_y": 43,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X0Y3": "MMCME2_ADV"
        },
        "type": "CMT_TOP_R_LOWER_B"
    },
    "CMT_TOP_R_LOWER_B_X8Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 8,
        "grid_y": 147,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X0Y1": "MMCME2_ADV"
        },
        "type": "CMT_TOP_R_LOWER_B"
    },
    "CMT_TOP_R_LOWER_B_X8Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 199,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X0Y0": "MMCME2_ADV"
        },
        "type": "CMT_TOP_R_LOWER_B"
    },
    "CMT_TOP_R_LOWER_T_X8Y122": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 8,
        "grid_y": 86,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y8": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y9": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y8": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y9": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_R_LOWER_T"
    },
    "CMT_TOP_R_LOWER_T_X8Y174": {
        "bits": {},
        "clock_region": "X0Y3",
        "grid_x": 8,
        "grid_y": 34,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y12": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y13": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y12": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y13": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_R_LOWER_T"
    },
    "CMT_TOP_R_LOWER_T_X8Y18": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 190,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y0": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y1": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y0": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y1": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_R_LOWER_T"
    },
    "CMT_TOP_R_LOWER_T_X8Y70": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 8,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y4": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y5": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y4": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y5": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_R_LOWER_T"
    },
    "CMT_TOP_R_UPPER_B_X8Y135": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 8,
        "grid_y": 73,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y10": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y11": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y10": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y11": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y2": "PHASER_REF",
            "PHY_CONTROL_X0Y2": "PHY_CONTROL"
        },
        "type": "CMT_TOP_R_UPPER_B"
    },
    "CMT_TOP_R_UPPER_B_X8Y187": {
        "bits": {},
        "clock_region": "X0Y3",
        "grid_x": 8,
        "grid_y": 21,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y14": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y15": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y14": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y15": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y3": "PHASER_REF",
            "PHY_CONTROL_X0Y3": "PHY_CONTROL"
        },
        "type": "CMT_TOP_R_UPPER_B"
    },
    "CMT_TOP_R_UPPER_B_X8Y31": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 177,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y2": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y3": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y2": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y3": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y0": "PHASER_REF",
            "PHY_CONTROL_X0Y0": "PHY_CONTROL"
        },
        "type": "CMT_TOP_R_UPPER_B"
    },
    "CMT_TOP_R_UPPER_B_X8Y83": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 8,
        "grid_y": 125,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y6": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y7": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y6": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y7": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y1": "PHASER_REF",
            "PHY_CONTROL_X0Y1": "PHY_CONTROL"
        },
        "type": "CMT_TOP_R_UPPER_B"
    },
    "CMT_TOP_R_UPPER_T_X8Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000080",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 8,
        "grid_y": 60,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X0Y2": "PLLE2_ADV"
        },
        "type": "CMT_TOP_R_UPPER_T"
    },
    "CMT_TOP_R_UPPER_T_X8Y200": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 8,
        "grid_y": 8,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X0Y3": "PLLE2_ADV"
        },
        "type": "CMT_TOP_R_UPPER_T"
    },
    "CMT_TOP_R_UPPER_T_X8Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 164,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X0Y0": "PLLE2_ADV"
        },
        "type": "CMT_TOP_R_UPPER_T"
    },
    "CMT_TOP_R_UPPER_T_X8Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 8,
        "grid_y": 112,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X0Y1": "PLLE2_ADV"
        },
        "type": "CMT_TOP_R_UPPER_T"
    },
    "DSP_L_X14Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y0": "DSP48E1",
            "DSP48_X1Y1": "DSP48E1",
            "TIEOFF_X15Y0": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y4": "DSP48E1",
            "DSP48_X1Y5": "DSP48E1",
            "TIEOFF_X15Y10": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y40": "DSP48E1",
            "DSP48_X1Y41": "DSP48E1",
            "TIEOFF_X15Y100": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y42": "DSP48E1",
            "DSP48_X1Y43": "DSP48E1",
            "TIEOFF_X15Y105": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y44": "DSP48E1",
            "DSP48_X1Y45": "DSP48E1",
            "TIEOFF_X15Y110": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y46": "DSP48E1",
            "DSP48_X1Y47": "DSP48E1",
            "TIEOFF_X15Y115": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y48": "DSP48E1",
            "DSP48_X1Y49": "DSP48E1",
            "TIEOFF_X15Y120": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y50": "DSP48E1",
            "DSP48_X1Y51": "DSP48E1",
            "TIEOFF_X15Y125": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y52": "DSP48E1",
            "DSP48_X1Y53": "DSP48E1",
            "TIEOFF_X15Y130": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y54": "DSP48E1",
            "DSP48_X1Y55": "DSP48E1",
            "TIEOFF_X15Y135": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y56": "DSP48E1",
            "DSP48_X1Y57": "DSP48E1",
            "TIEOFF_X15Y140": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y58": "DSP48E1",
            "DSP48_X1Y59": "DSP48E1",
            "TIEOFF_X15Y145": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y6": "DSP48E1",
            "DSP48_X1Y7": "DSP48E1",
            "TIEOFF_X15Y15": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y60": "DSP48E1",
            "DSP48_X1Y61": "DSP48E1",
            "TIEOFF_X15Y150": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y62": "DSP48E1",
            "DSP48_X1Y63": "DSP48E1",
            "TIEOFF_X15Y155": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y64": "DSP48E1",
            "DSP48_X1Y65": "DSP48E1",
            "TIEOFF_X15Y160": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y66": "DSP48E1",
            "DSP48_X1Y67": "DSP48E1",
            "TIEOFF_X15Y165": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y68": "DSP48E1",
            "DSP48_X1Y69": "DSP48E1",
            "TIEOFF_X15Y170": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y70": "DSP48E1",
            "DSP48_X1Y71": "DSP48E1",
            "TIEOFF_X15Y175": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y72": "DSP48E1",
            "DSP48_X1Y73": "DSP48E1",
            "TIEOFF_X15Y180": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y74": "DSP48E1",
            "DSP48_X1Y75": "DSP48E1",
            "TIEOFF_X15Y185": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y76": "DSP48E1",
            "DSP48_X1Y77": "DSP48E1",
            "TIEOFF_X15Y190": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y78": "DSP48E1",
            "DSP48_X1Y79": "DSP48E1",
            "TIEOFF_X15Y195": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y8": "DSP48E1",
            "DSP48_X1Y9": "DSP48E1",
            "TIEOFF_X15Y20": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y10": "DSP48E1",
            "DSP48_X1Y11": "DSP48E1",
            "TIEOFF_X15Y25": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y12": "DSP48E1",
            "DSP48_X1Y13": "DSP48E1",
            "TIEOFF_X15Y30": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y14": "DSP48E1",
            "DSP48_X1Y15": "DSP48E1",
            "TIEOFF_X15Y35": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y16": "DSP48E1",
            "DSP48_X1Y17": "DSP48E1",
            "TIEOFF_X15Y40": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y18": "DSP48E1",
            "DSP48_X1Y19": "DSP48E1",
            "TIEOFF_X15Y45": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y2": "DSP48E1",
            "DSP48_X1Y3": "DSP48E1",
            "TIEOFF_X15Y5": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y20": "DSP48E1",
            "DSP48_X1Y21": "DSP48E1",
            "TIEOFF_X15Y50": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y22": "DSP48E1",
            "DSP48_X1Y23": "DSP48E1",
            "TIEOFF_X15Y55": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y24": "DSP48E1",
            "DSP48_X1Y25": "DSP48E1",
            "TIEOFF_X15Y60": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y26": "DSP48E1",
            "DSP48_X1Y27": "DSP48E1",
            "TIEOFF_X15Y65": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y28": "DSP48E1",
            "DSP48_X1Y29": "DSP48E1",
            "TIEOFF_X15Y70": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y30": "DSP48E1",
            "DSP48_X1Y31": "DSP48E1",
            "TIEOFF_X15Y75": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y32": "DSP48E1",
            "DSP48_X1Y33": "DSP48E1",
            "TIEOFF_X15Y80": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y34": "DSP48E1",
            "DSP48_X1Y35": "DSP48E1",
            "TIEOFF_X15Y85": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y36": "DSP48E1",
            "DSP48_X1Y37": "DSP48E1",
            "TIEOFF_X15Y90": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y38": "DSP48E1",
            "DSP48_X1Y39": "DSP48E1",
            "TIEOFF_X15Y95": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_R_X33Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y0": "DSP48E1",
            "DSP48_X2Y1": "DSP48E1",
            "TIEOFF_X36Y0": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y4": "DSP48E1",
            "DSP48_X2Y5": "DSP48E1",
            "TIEOFF_X36Y10": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y40": "DSP48E1",
            "DSP48_X2Y41": "DSP48E1",
            "TIEOFF_X36Y100": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y42": "DSP48E1",
            "DSP48_X2Y43": "DSP48E1",
            "TIEOFF_X36Y105": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y44": "DSP48E1",
            "DSP48_X2Y45": "DSP48E1",
            "TIEOFF_X36Y110": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y46": "DSP48E1",
            "DSP48_X2Y47": "DSP48E1",
            "TIEOFF_X36Y115": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y48": "DSP48E1",
            "DSP48_X2Y49": "DSP48E1",
            "TIEOFF_X36Y120": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y50": "DSP48E1",
            "DSP48_X2Y51": "DSP48E1",
            "TIEOFF_X36Y125": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y52": "DSP48E1",
            "DSP48_X2Y53": "DSP48E1",
            "TIEOFF_X36Y130": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y54": "DSP48E1",
            "DSP48_X2Y55": "DSP48E1",
            "TIEOFF_X36Y135": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y56": "DSP48E1",
            "DSP48_X2Y57": "DSP48E1",
            "TIEOFF_X36Y140": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y58": "DSP48E1",
            "DSP48_X2Y59": "DSP48E1",
            "TIEOFF_X36Y145": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y6": "DSP48E1",
            "DSP48_X2Y7": "DSP48E1",
            "TIEOFF_X36Y15": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y60": "DSP48E1",
            "DSP48_X2Y61": "DSP48E1",
            "TIEOFF_X36Y150": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y62": "DSP48E1",
            "DSP48_X2Y63": "DSP48E1",
            "TIEOFF_X36Y155": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y64": "DSP48E1",
            "DSP48_X2Y65": "DSP48E1",
            "TIEOFF_X36Y160": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y66": "DSP48E1",
            "DSP48_X2Y67": "DSP48E1",
            "TIEOFF_X36Y165": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y68": "DSP48E1",
            "DSP48_X2Y69": "DSP48E1",
            "TIEOFF_X36Y170": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y70": "DSP48E1",
            "DSP48_X2Y71": "DSP48E1",
            "TIEOFF_X36Y175": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y72": "DSP48E1",
            "DSP48_X2Y73": "DSP48E1",
            "TIEOFF_X36Y180": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y74": "DSP48E1",
            "DSP48_X2Y75": "DSP48E1",
            "TIEOFF_X36Y185": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y76": "DSP48E1",
            "DSP48_X2Y77": "DSP48E1",
            "TIEOFF_X36Y190": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y78": "DSP48E1",
            "DSP48_X2Y79": "DSP48E1",
            "TIEOFF_X36Y195": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y8": "DSP48E1",
            "DSP48_X2Y9": "DSP48E1",
            "TIEOFF_X36Y20": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y10": "DSP48E1",
            "DSP48_X2Y11": "DSP48E1",
            "TIEOFF_X36Y25": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y12": "DSP48E1",
            "DSP48_X2Y13": "DSP48E1",
            "TIEOFF_X36Y30": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y14": "DSP48E1",
            "DSP48_X2Y15": "DSP48E1",
            "TIEOFF_X36Y35": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y16": "DSP48E1",
            "DSP48_X2Y17": "DSP48E1",
            "TIEOFF_X36Y40": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y18": "DSP48E1",
            "DSP48_X2Y19": "DSP48E1",
            "TIEOFF_X36Y45": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y2": "DSP48E1",
            "DSP48_X2Y3": "DSP48E1",
            "TIEOFF_X36Y5": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y20": "DSP48E1",
            "DSP48_X2Y21": "DSP48E1",
            "TIEOFF_X36Y50": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y22": "DSP48E1",
            "DSP48_X2Y23": "DSP48E1",
            "TIEOFF_X36Y55": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y24": "DSP48E1",
            "DSP48_X2Y25": "DSP48E1",
            "TIEOFF_X36Y60": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y26": "DSP48E1",
            "DSP48_X2Y27": "DSP48E1",
            "TIEOFF_X36Y65": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y28": "DSP48E1",
            "DSP48_X2Y29": "DSP48E1",
            "TIEOFF_X36Y70": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y30": "DSP48E1",
            "DSP48_X2Y31": "DSP48E1",
            "TIEOFF_X36Y75": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y32": "DSP48E1",
            "DSP48_X2Y33": "DSP48E1",
            "TIEOFF_X36Y80": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y34": "DSP48E1",
            "DSP48_X2Y35": "DSP48E1",
            "TIEOFF_X36Y85": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y36": "DSP48E1",
            "DSP48_X2Y37": "DSP48E1",
            "TIEOFF_X36Y90": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y38": "DSP48E1",
            "DSP48_X2Y39": "DSP48E1",
            "TIEOFF_X36Y95": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y0": "DSP48E1",
            "DSP48_X0Y1": "DSP48E1",
            "TIEOFF_X10Y0": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y4": "DSP48E1",
            "DSP48_X0Y5": "DSP48E1",
            "TIEOFF_X10Y10": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y40": "DSP48E1",
            "DSP48_X0Y41": "DSP48E1",
            "TIEOFF_X10Y100": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y42": "DSP48E1",
            "DSP48_X0Y43": "DSP48E1",
            "TIEOFF_X10Y105": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y44": "DSP48E1",
            "DSP48_X0Y45": "DSP48E1",
            "TIEOFF_X10Y110": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y46": "DSP48E1",
            "DSP48_X0Y47": "DSP48E1",
            "TIEOFF_X10Y115": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y48": "DSP48E1",
            "DSP48_X0Y49": "DSP48E1",
            "TIEOFF_X10Y120": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y50": "DSP48E1",
            "DSP48_X0Y51": "DSP48E1",
            "TIEOFF_X10Y125": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y52": "DSP48E1",
            "DSP48_X0Y53": "DSP48E1",
            "TIEOFF_X10Y130": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y54": "DSP48E1",
            "DSP48_X0Y55": "DSP48E1",
            "TIEOFF_X10Y135": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y56": "DSP48E1",
            "DSP48_X0Y57": "DSP48E1",
            "TIEOFF_X10Y140": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y58": "DSP48E1",
            "DSP48_X0Y59": "DSP48E1",
            "TIEOFF_X10Y145": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y6": "DSP48E1",
            "DSP48_X0Y7": "DSP48E1",
            "TIEOFF_X10Y15": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y60": "DSP48E1",
            "DSP48_X0Y61": "DSP48E1",
            "TIEOFF_X10Y150": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y62": "DSP48E1",
            "DSP48_X0Y63": "DSP48E1",
            "TIEOFF_X10Y155": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y64": "DSP48E1",
            "DSP48_X0Y65": "DSP48E1",
            "TIEOFF_X10Y160": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y66": "DSP48E1",
            "DSP48_X0Y67": "DSP48E1",
            "TIEOFF_X10Y165": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y68": "DSP48E1",
            "DSP48_X0Y69": "DSP48E1",
            "TIEOFF_X10Y170": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y70": "DSP48E1",
            "DSP48_X0Y71": "DSP48E1",
            "TIEOFF_X10Y175": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y72": "DSP48E1",
            "DSP48_X0Y73": "DSP48E1",
            "TIEOFF_X10Y180": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y74": "DSP48E1",
            "DSP48_X0Y75": "DSP48E1",
            "TIEOFF_X10Y185": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y76": "DSP48E1",
            "DSP48_X0Y77": "DSP48E1",
            "TIEOFF_X10Y190": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y78": "DSP48E1",
            "DSP48_X0Y79": "DSP48E1",
            "TIEOFF_X10Y195": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y8": "DSP48E1",
            "DSP48_X0Y9": "DSP48E1",
            "TIEOFF_X10Y20": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y10": "DSP48E1",
            "DSP48_X0Y11": "DSP48E1",
            "TIEOFF_X10Y25": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y12": "DSP48E1",
            "DSP48_X0Y13": "DSP48E1",
            "TIEOFF_X10Y30": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y14": "DSP48E1",
            "DSP48_X0Y15": "DSP48E1",
            "TIEOFF_X10Y35": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y16": "DSP48E1",
            "DSP48_X0Y17": "DSP48E1",
            "TIEOFF_X10Y40": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y18": "DSP48E1",
            "DSP48_X0Y19": "DSP48E1",
            "TIEOFF_X10Y45": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y2": "DSP48E1",
            "DSP48_X0Y3": "DSP48E1",
            "TIEOFF_X10Y5": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y20": "DSP48E1",
            "DSP48_X0Y21": "DSP48E1",
            "TIEOFF_X10Y50": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y22": "DSP48E1",
            "DSP48_X0Y23": "DSP48E1",
            "TIEOFF_X10Y55": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y24": "DSP48E1",
            "DSP48_X0Y25": "DSP48E1",
            "TIEOFF_X10Y60": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y26": "DSP48E1",
            "DSP48_X0Y27": "DSP48E1",
            "TIEOFF_X10Y65": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y28": "DSP48E1",
            "DSP48_X0Y29": "DSP48E1",
            "TIEOFF_X10Y70": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y30": "DSP48E1",
            "DSP48_X0Y31": "DSP48E1",
            "TIEOFF_X10Y75": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y32": "DSP48E1",
            "DSP48_X0Y33": "DSP48E1",
            "TIEOFF_X10Y80": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y34": "DSP48E1",
            "DSP48_X0Y35": "DSP48E1",
            "TIEOFF_X10Y85": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y36": "DSP48E1",
            "DSP48_X0Y37": "DSP48E1",
            "TIEOFF_X10Y90": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y38": "DSP48E1",
            "DSP48_X0Y39": "DSP48E1",
            "TIEOFF_X10Y95": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "GTX_CHANNEL_0_X99Y110": {
        "bits": {},
        "clock_region": "X1Y2",
        "grid_x": 99,
        "grid_y": 98,
        "pin_functions": {
            "IPAD_X0Y0": "MGTXRXN0_115",
            "IPAD_X0Y1": "MGTXRXP0_115",
            "OPAD_X0Y0": "MGTXTXN0_115",
            "OPAD_X0Y1": "MGTXTXP0_115"
        },
        "sites": {
            "GTXE2_CHANNEL_X0Y0": "GTXE2_CHANNEL",
            "IPAD_X0Y0": "IPAD",
            "IPAD_X0Y1": "IPAD",
            "OPAD_X0Y0": "OPAD",
            "OPAD_X0Y1": "OPAD"
        },
        "type": "GTX_CHANNEL_0"
    },
    "GTX_CHANNEL_0_X99Y162": {
        "bits": {},
        "clock_region": "X1Y3",
        "grid_x": 99,
        "grid_y": 46,
        "pin_functions": {
            "IPAD_X0Y30": "MGTXRXN0_116",
            "IPAD_X0Y31": "MGTXRXP0_116",
            "OPAD_X0Y8": "MGTXTXN0_116",
            "OPAD_X0Y9": "MGTXTXP0_116"
        },
        "sites": {
            "GTXE2_CHANNEL_X0Y4": "GTXE2_CHANNEL",
            "IPAD_X0Y30": "IPAD",
            "IPAD_X0Y31": "IPAD",
            "OPAD_X0Y8": "OPAD",
            "OPAD_X0Y9": "OPAD"
        },
        "type": "GTX_CHANNEL_0"
    },
    "GTX_CHANNEL_1_X99Y121": {
        "bits": {},
        "clock_region": "X1Y2",
        "grid_x": 99,
        "grid_y": 87,
        "pin_functions": {
            "IPAD_X0Y6": "MGTXRXN1_115",
            "IPAD_X0Y7": "MGTXRXP1_115",
            "OPAD_X0Y2": "MGTXTXN1_115",
            "OPAD_X0Y3": "MGTXTXP1_115"
        },
        "sites": {
            "GTXE2_CHANNEL_X0Y1": "GTXE2_CHANNEL",
            "IPAD_X0Y6": "IPAD",
            "IPAD_X0Y7": "IPAD",
            "OPAD_X0Y2": "OPAD",
            "OPAD_X0Y3": "OPAD"
        },
        "type": "GTX_CHANNEL_1"
    },
    "GTX_CHANNEL_1_X99Y173": {
        "bits": {},
        "clock_region": "X1Y3",
        "grid_x": 99,
        "grid_y": 35,
        "pin_functions": {
            "IPAD_X0Y36": "MGTXRXN1_116",
            "IPAD_X0Y37": "MGTXRXP1_116",
            "OPAD_X0Y10": "MGTXTXN1_116",
            "OPAD_X0Y11": "MGTXTXP1_116"
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            "TIEOFF_X0Y131": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 65,
                "words": 2
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            "TIEOFF_X0Y132": "TIEOFF"
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        "bits": {
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            "TIEOFF_X0Y133": "TIEOFF"
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    },
    "INT_L_X0Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
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                "words": 2
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            "TIEOFF_X0Y134": "TIEOFF"
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        "bits": {
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            "TIEOFF_X0Y135": "TIEOFF"
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        "bits": {
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            "TIEOFF_X0Y137": "TIEOFF"
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        "bits": {
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        "type": "INT_L"
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    "INT_L_X0Y177": {
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            "TIEOFF_X0Y177": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X0Y178": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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            "TIEOFF_X0Y179": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 28,
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            "TIEOFF_X0Y18": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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            "TIEOFF_X0Y180": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y181": {
        "bits": {
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            "TIEOFF_X0Y181": "TIEOFF"
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        "bits": {
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        "type": "INT_L"
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            "TIEOFF_X0Y41": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 28,
                "offset": 85,
                "words": 2
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            "TIEOFF_X0Y42": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00420000",
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                "words": 2
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            "TIEOFF_X0Y43": "TIEOFF"
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        "bits": {
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            "TIEOFF_X0Y44": "TIEOFF"
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        "bits": {
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            "TIEOFF_X0Y45": "TIEOFF"
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            "TIEOFF_X0Y46": "TIEOFF"
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            "TIEOFF_X0Y47": "TIEOFF"
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            "TIEOFF_X0Y72": "TIEOFF"
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            "TIEOFF_X0Y73": "TIEOFF"
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                "words": 2
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    "INT_L_X0Y75": {
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            "TIEOFF_X0Y75": "TIEOFF"
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            "TIEOFF_X0Y76": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X0Y77": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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        },
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        "type": "INT_L"
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                "offset": 59,
                "words": 2
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        },
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        "type": "INT_L"
    },
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        "bits": {
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                "offset": 61,
                "words": 2
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        "type": "INT_L"
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        "bits": {
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                "words": 2
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X0Y82": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "words": 2
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        "type": "INT_L"
    },
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X0Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y85": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y85": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y86": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y87": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y89": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 28,
                "offset": 18,
                "words": 2
            }
        },
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        "grid_y": 198,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y9": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y90": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 83,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y92": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y93": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
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                "offset": 89,
                "words": 2
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        },
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            "TIEOFF_X0Y94": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
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                "offset": 91,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y95": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
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                "offset": 93,
                "words": 2
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        },
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            "TIEOFF_X0Y96": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
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                "offset": 95,
                "words": 2
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        },
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            "TIEOFF_X0Y97": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
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            "TIEOFF_X0Y98": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
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                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X0Y99": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00420500",
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            "TIEOFF_X11Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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            "TIEOFF_X11Y1": "TIEOFF"
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    },
    "INT_L_X10Y10": {
        "bits": {
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                "baseaddr": "0x00420500",
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        },
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            "TIEOFF_X11Y10": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y100": {
        "bits": {
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        },
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            "TIEOFF_X11Y100": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y101": {
        "bits": {
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                "baseaddr": "0x00000500",
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                "words": 2
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        "sites": {
            "TIEOFF_X11Y101": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y102": {
        "bits": {
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                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 4,
                "words": 2
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            "TIEOFF_X11Y102": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y103": {
        "bits": {
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                "baseaddr": "0x00000500",
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                "offset": 6,
                "words": 2
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        },
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            "TIEOFF_X11Y103": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y104": {
        "bits": {
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                "offset": 8,
                "words": 2
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        },
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            "TIEOFF_X11Y104": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y105": {
        "bits": {
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                "offset": 10,
                "words": 2
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        },
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            "TIEOFF_X11Y105": "TIEOFF"
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    },
    "INT_L_X10Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 12,
                "words": 2
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            "TIEOFF_X11Y106": "TIEOFF"
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    },
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        "bits": {
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                "offset": 14,
                "words": 2
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            "TIEOFF_X11Y107": "TIEOFF"
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    "INT_L_X10Y108": {
        "bits": {
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                "words": 2
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            "TIEOFF_X11Y108": "TIEOFF"
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    },
    "INT_L_X10Y109": {
        "bits": {
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                "offset": 18,
                "words": 2
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        },
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            "TIEOFF_X11Y109": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420500",
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                "offset": 22,
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        "pin_functions": {},
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            "TIEOFF_X11Y11": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        "pin_functions": {},
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            "TIEOFF_X11Y110": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y111": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X11Y111": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y112": {
        "bits": {
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                "offset": 24,
                "words": 2
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            "TIEOFF_X11Y112": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y113": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y114": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y115": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y116": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y117": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y118": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y119": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 195,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y120": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y121": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y122": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 31,
        "grid_y": 80,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y123": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y124": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y125": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y129": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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        "sites": {
            "TIEOFF_X11Y130": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 63,
                "words": 2
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            "TIEOFF_X11Y131": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y132": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X11Y132": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y133": {
        "bits": {
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                "words": 2
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            "TIEOFF_X11Y133": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y134": {
        "bits": {
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            "TIEOFF_X11Y134": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y135": {
        "bits": {
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            "TIEOFF_X11Y135": "TIEOFF"
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        "bits": {
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        "bits": {
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        "type": "INT_L"
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y175": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y176": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y176": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y177": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y177": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y178": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y178": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y179": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "words": 2
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        },
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            "TIEOFF_X11Y179": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 36,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "words": 2
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        },
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            "TIEOFF_X11Y180": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y181": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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        },
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            "TIEOFF_X11Y181": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y182": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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        },
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            "TIEOFF_X11Y182": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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            "TIEOFF_X11Y183": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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            "TIEOFF_X11Y184": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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            "TIEOFF_X11Y185": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020500",
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            "TIEOFF_X11Y186": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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            "TIEOFF_X11Y187": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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            "TIEOFF_X11Y188": "TIEOFF"
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    "INT_L_X10Y189": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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            "TIEOFF_X11Y19": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020500",
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        "bits": {
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                "baseaddr": "0x00020500",
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        "bits": {
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            "TIEOFF_X11Y192": "TIEOFF"
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        "bits": {
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            "TIEOFF_X11Y193": "TIEOFF"
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        "bits": {
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            "TIEOFF_X11Y194": "TIEOFF"
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    "INT_L_X10Y195": {
        "bits": {
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        "bits": {
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    "INT_L_X10Y199": {
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            "TIEOFF_X11Y22": "TIEOFF"
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        "bits": {
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            "TIEOFF_X11Y25": "TIEOFF"
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    "INT_L_X10Y26": {
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                "baseaddr": "0x00420500",
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                "offset": 53,
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X11Y26": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00420500",
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                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X11Y27": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 57,
                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X11Y28": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420500",
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                "offset": 59,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X11Y29": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00420500",
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                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X11Y3": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X11Y30": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 63,
                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y31": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 65,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y32": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 67,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y33": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y34": {
        "bits": {
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                "baseaddr": "0x00420500",
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                "offset": 69,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y34": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 71,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y35": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y36": {
        "bits": {
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                "baseaddr": "0x00420500",
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                "offset": 73,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y36": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y37": {
        "bits": {
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                "baseaddr": "0x00420500",
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                "offset": 75,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y37": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y38": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 77,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y38": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y39": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 8,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y4": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y40": {
        "bits": {
            "CLB_IO_CLK": {
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "words": 2
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            "TIEOFF_X11Y41": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420500",
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        "bits": {
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            "TIEOFF_X11Y85": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y86": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 77,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y88": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 79,
                "words": 2
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        },
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            "TIEOFF_X11Y89": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
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                "frames": 28,
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        },
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            "TIEOFF_X11Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y90": {
        "bits": {
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            "TIEOFF_X11Y90": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y91": {
        "bits": {
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                "baseaddr": "0x00400500",
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            "TIEOFF_X11Y91": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y92": {
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        "bits": {
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            "TIEOFF_X11Y93": "TIEOFF"
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        "bits": {
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        "bits": {
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            "TIEOFF_X13Y1": "TIEOFF"
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            "TIEOFF_X13Y111": "TIEOFF"
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        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X13Y113": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "words": 2
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            "TIEOFF_X13Y114": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y115": {
        "bits": {
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y115": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000600",
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                "words": 2
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        },
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            "TIEOFF_X13Y116": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y117": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X13Y117": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y118": {
        "bits": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X13Y118": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y119": {
        "bits": {
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                "offset": 38,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y119": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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        "pin_functions": {},
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            "TIEOFF_X13Y12": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000600",
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                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y120": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000600",
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                "offset": 42,
                "words": 2
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        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y121": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000600",
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                "offset": 44,
                "words": 2
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        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y122": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000600",
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                "offset": 46,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y123": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000600",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y124": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y125": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y125": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y126": {
        "bits": {
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y127": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000600",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000600",
                "frames": 28,
                "offset": 59,
                "words": 2
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    "INT_L_X12Y174": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 48,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y174": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y175": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y176": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 53,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y176": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y177": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 55,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X13Y177": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y178": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y178": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y179": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "words": 2
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        },
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            "TIEOFF_X13Y179": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "words": 2
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        },
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            "TIEOFF_X13Y18": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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            "TIEOFF_X13Y180": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y181": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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            "TIEOFF_X13Y181": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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            "TIEOFF_X13Y182": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X13Y183": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X13Y185": "TIEOFF"
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        "bits": {
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            "TIEOFF_X13Y186": "TIEOFF"
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            "TIEOFF_X13Y187": "TIEOFF"
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    },
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        "bits": {
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            "TIEOFF_X13Y188": "TIEOFF"
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        "bits": {
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            "TIEOFF_X13Y19": "TIEOFF"
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        "bits": {
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    "INT_L_X12Y191": {
        "bits": {
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    "INT_L_X12Y192": {
        "bits": {
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        "bits": {
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            "TIEOFF_X13Y2": "TIEOFF"
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            "TIEOFF_X13Y22": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y23": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X13Y23": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y24": {
        "bits": {
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                "baseaddr": "0x00420600",
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                "offset": 48,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y24": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "offset": 51,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X13Y25": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y26": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y27": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X13Y28": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y29": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "offset": 6,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y3": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y30": {
        "bits": {
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                "baseaddr": "0x00420600",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y30": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y31": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "offset": 65,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y32": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "offset": 67,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y33": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "offset": 69,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y34": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "offset": 71,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y35": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "offset": 73,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y36": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y37": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y38": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "offset": 77,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 35,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y38": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "offset": 79,
                "words": 2
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        },
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        "bits": {
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                "baseaddr": "0x00420600",
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        "bits": {
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                "offset": 69,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X13Y84": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y85": {
        "bits": {
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                "baseaddr": "0x00400600",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X13Y85": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400600",
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                "offset": 73,
                "words": 2
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            "TIEOFF_X13Y86": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y87": {
        "bits": {
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                "baseaddr": "0x00400600",
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                "offset": 75,
                "words": 2
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            "TIEOFF_X13Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y88": {
        "bits": {
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                "baseaddr": "0x00400600",
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                "words": 2
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            "TIEOFF_X13Y88": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y89": {
        "bits": {
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                "baseaddr": "0x00400600",
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            "TIEOFF_X13Y89": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X13Y9": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X13Y93": "TIEOFF"
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    "INT_L_X14Y109": {
        "bits": {
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    "INT_L_X14Y112": {
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            "TIEOFF_X16Y112": "TIEOFF"
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    "INT_L_X14Y113": {
        "bits": {
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                "words": 2
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            "TIEOFF_X16Y113": "TIEOFF"
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    },
    "INT_L_X14Y114": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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            "TIEOFF_X16Y114": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X14Y115": {
        "bits": {
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                "words": 2
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            "TIEOFF_X16Y115": "TIEOFF"
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    "INT_L_X14Y116": {
        "bits": {
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                "baseaddr": "0x00000700",
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                "words": 2
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            "TIEOFF_X16Y116": "TIEOFF"
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    "INT_L_X14Y117": {
        "bits": {
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                "words": 2
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            "TIEOFF_X16Y117": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X14Y118": {
        "bits": {
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            "TIEOFF_X16Y118": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X14Y119": {
        "bits": {
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                "words": 2
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        "bits": {
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    "INT_L_X14Y120": {
        "bits": {
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    "INT_L_X14Y121": {
        "bits": {
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                "words": 2
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    "INT_L_X14Y122": {
        "bits": {
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        "bits": {
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    "INT_L_X14Y124": {
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        "type": "INT_L"
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    "INT_L_X14Y125": {
        "bits": {
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                "words": 2
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X14Y126": {
        "bits": {
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X16Y126": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X14Y127": {
        "bits": {
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                "words": 2
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                "baseaddr": "0x00400700",
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    "INT_L_X16Y126": {
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            "TIEOFF_X18Y170": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00020800",
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                "offset": 42,
                "words": 2
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            "TIEOFF_X18Y171": "TIEOFF"
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    },
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        "bits": {
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            "TIEOFF_X18Y172": "TIEOFF"
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    "INT_L_X16Y173": {
        "bits": {
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            "TIEOFF_X18Y173": "TIEOFF"
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        "bits": {
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            "TIEOFF_X18Y174": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020800",
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            "TIEOFF_X18Y175": "TIEOFF"
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        "bits": {
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            "TIEOFF_X18Y3": "TIEOFF"
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    "INT_L_X16Y31": {
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        "pin_functions": {},
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        "type": "INT_L"
    },
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                "words": 2
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        "type": "INT_L"
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        "clock_region": "X0Y0",
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            "TIEOFF_X18Y33": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X16Y34": {
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                "words": 2
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        },
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        "pin_functions": {},
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        "type": "INT_L"
    },
    "INT_L_X16Y35": {
        "bits": {
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                "baseaddr": "0x00420800",
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X18Y35": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y36": {
        "bits": {
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            "TIEOFF_X18Y80": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400800",
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                "offset": 63,
                "words": 2
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            "TIEOFF_X18Y81": "TIEOFF"
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        "bits": {
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            "TIEOFF_X18Y82": "TIEOFF"
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        "bits": {
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            "TIEOFF_X18Y84": "TIEOFF"
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            "TIEOFF_X18Y85": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y166": {
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    "INT_L_X18Y167": {
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        "type": "INT_L"
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    "INT_L_X18Y168": {
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        },
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    "INT_L_X18Y169": {
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            "TIEOFF_X20Y169": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y17": {
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                "baseaddr": "0x00420900",
                "frames": 28,
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                "words": 2
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    "INT_L_X20Y167": {
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    "INT_L_X20Y168": {
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
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                "offset": 38,
                "words": 2
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            "TIEOFF_X22Y169": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
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                "words": 2
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            "TIEOFF_X22Y17": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
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            "TIEOFF_X22Y170": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y171": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
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            "TIEOFF_X22Y171": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y172": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
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            "TIEOFF_X22Y172": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X20Y173": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
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            "TIEOFF_X22Y173": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00020A00",
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            "TIEOFF_X22Y174": "TIEOFF"
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            "CLB_IO_CLK": {
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            "TIEOFF_X22Y175": "TIEOFF"
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        "bits": {
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            "TIEOFF_X22Y176": "TIEOFF"
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        "bits": {
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            "TIEOFF_X22Y177": "TIEOFF"
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            "TIEOFF_X22Y178": "TIEOFF"
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            "TIEOFF_X22Y179": "TIEOFF"
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            "TIEOFF_X22Y18": "TIEOFF"
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            "TIEOFF_X22Y184": "TIEOFF"
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            "TIEOFF_X22Y185": "TIEOFF"
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            "TIEOFF_X22Y186": "TIEOFF"
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            "TIEOFF_X22Y197": "TIEOFF"
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    "INT_L_X20Y198": {
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            "TIEOFF_X22Y198": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y199": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 99,
                "words": 2
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            "TIEOFF_X22Y199": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
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                "offset": 4,
                "words": 2
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            "TIEOFF_X22Y2": "TIEOFF"
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    },
    "INT_L_X20Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
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                "offset": 40,
                "words": 2
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            "TIEOFF_X22Y20": "TIEOFF"
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    },
    "INT_L_X20Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
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                "offset": 42,
                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X22Y21": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
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                "offset": 44,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X22Y22": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
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                "offset": 46,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X22Y23": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
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                "offset": 48,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X22Y24": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
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                "offset": 51,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X22Y25": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X22Y26": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X22Y27": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
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                "offset": 57,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y28": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
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                "offset": 59,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y29": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
                "frames": 28,
                "offset": 6,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y3": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
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                "offset": 61,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y30": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 55,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y31": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
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                "offset": 65,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 55,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y32": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y33": {
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                "baseaddr": "0x00420B00",
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        "pin_functions": {},
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            "TIEOFF_X26Y12": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X26Y120": "TIEOFF"
        },
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    },
    "INT_L_X24Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X26Y121": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
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        },
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            "TIEOFF_X26Y122": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y123": {
        "bits": {
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            "TIEOFF_X26Y123": "TIEOFF"
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    },
    "INT_L_X24Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
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        },
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            "TIEOFF_X26Y124": "TIEOFF"
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    "INT_L_X24Y125": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X26Y125": "TIEOFF"
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    "INT_L_X24Y126": {
        "bits": {
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            "TIEOFF_X26Y126": "TIEOFF"
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            "TIEOFF_X26Y127": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X26Y128": "TIEOFF"
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        "bits": {
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            "TIEOFF_X26Y129": "TIEOFF"
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            "CLB_IO_CLK": {
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            "TIEOFF_X26Y149": "TIEOFF"
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        "bits": {
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            "TIEOFF_X26Y15": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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            "TIEOFF_X26Y150": "TIEOFF"
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    },
    "INT_L_X24Y151": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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            "TIEOFF_X26Y151": "TIEOFF"
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    "INT_L_X24Y152": {
        "bits": {
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                "baseaddr": "0x00020C00",
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        "pin_functions": {},
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            "TIEOFF_X26Y152": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y153": {
        "bits": {
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                "baseaddr": "0x00020C00",
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            "TIEOFF_X26Y153": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y154": {
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                "baseaddr": "0x00020C00",
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            "TIEOFF_X26Y154": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X24Y155": {
        "bits": {
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                "baseaddr": "0x00020C00",
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            "TIEOFF_X26Y155": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X24Y156": {
        "bits": {
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                "baseaddr": "0x00020C00",
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                "words": 2
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            "TIEOFF_X26Y156": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00020C00",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X26Y157": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X24Y158": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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                "words": 2
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        },
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            "TIEOFF_X26Y158": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y159": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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                "words": 2
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            "TIEOFF_X26Y159": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C00",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X26Y16": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
                "frames": 28,
                "offset": 20,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X26Y160": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y161": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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                "offset": 22,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X26Y161": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y162": {
        "bits": {
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                "baseaddr": "0x00020C00",
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                "offset": 24,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X26Y162": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y163": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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                "offset": 26,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y163": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y164": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y164": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y165": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y166": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y166": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y167": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X26Y167": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y168": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X26Y168": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y169": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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            "TIEOFF_X26Y169": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C00",
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        "pin_functions": {},
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            "TIEOFF_X26Y17": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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            "TIEOFF_X26Y170": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y171": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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            "TIEOFF_X26Y171": "TIEOFF"
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    },
    "INT_L_X24Y172": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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            "TIEOFF_X26Y172": "TIEOFF"
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    },
    "INT_L_X24Y173": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X26Y173": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y174": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X26Y174": "TIEOFF"
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    },
    "INT_L_X24Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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            "TIEOFF_X26Y175": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X26Y176": "TIEOFF"
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    "INT_L_X24Y177": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X26Y177": "TIEOFF"
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            "CLB_IO_CLK": {
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            "TIEOFF_X26Y178": "TIEOFF"
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            "TIEOFF_X26Y179": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X26Y18": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X26Y180": "TIEOFF"
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    "INT_L_X24Y181": {
        "bits": {
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            "TIEOFF_X26Y181": "TIEOFF"
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    "INT_L_X24Y182": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X26Y182": "TIEOFF"
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        "bits": {
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            "TIEOFF_X26Y183": "TIEOFF"
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    "INT_L_X24Y184": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X26Y184": "TIEOFF"
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    "INT_L_X24Y185": {
        "bits": {
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    "INT_L_X24Y186": {
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        "bits": {
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    "INT_L_X24Y188": {
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    "INT_L_X24Y189": {
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    "INT_L_X24Y190": {
        "bits": {
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    "INT_L_X24Y191": {
        "bits": {
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            "TIEOFF_X26Y192": "TIEOFF"
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    "INT_L_X24Y193": {
        "bits": {
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            "TIEOFF_X26Y193": "TIEOFF"
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    },
    "INT_L_X24Y194": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 89,
                "words": 2
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            "TIEOFF_X26Y194": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y195": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 91,
                "words": 2
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        },
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            "TIEOFF_X26Y195": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y196": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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                "offset": 93,
                "words": 2
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        "clock_region": "X0Y3",
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            "TIEOFF_X26Y196": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y197": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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                "offset": 95,
                "words": 2
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        },
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            "TIEOFF_X26Y197": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y198": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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                "offset": 97,
                "words": 2
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        },
        "clock_region": "X0Y3",
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            "TIEOFF_X26Y198": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y199": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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                "offset": 99,
                "words": 2
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        "clock_region": "X0Y3",
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            "TIEOFF_X26Y199": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C00",
                "frames": 28,
                "offset": 4,
                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X26Y2": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C00",
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                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X26Y20": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C00",
                "frames": 28,
                "offset": 42,
                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X26Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C00",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y22": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C00",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y23": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C00",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y24": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C00",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y25": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C00",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y26": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C00",
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y27": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C00",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y28": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C00",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 64,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y29": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C00",
                "frames": 28,
                "offset": 6,
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C00",
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                "baseaddr": "0x00400C00",
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        "bits": {
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        "bits": {
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            "TIEOFF_X28Y113": "TIEOFF"
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    "INT_L_X26Y114": {
        "bits": {
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    "INT_L_X26Y115": {
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            "TIEOFF_X28Y115": "TIEOFF"
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    "INT_L_X26Y116": {
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            "TIEOFF_X28Y116": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X26Y117": {
        "bits": {
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y117": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X26Y26": {
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            "TIEOFF_X28Y71": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
                "frames": 28,
                "offset": 44,
                "words": 2
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            "TIEOFF_X28Y72": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
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                "words": 2
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            "TIEOFF_X28Y73": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
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            "TIEOFF_X28Y74": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
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            "TIEOFF_X28Y75": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
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            "TIEOFF_X28Y76": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
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            "TIEOFF_X28Y77": "TIEOFF"
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            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
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            "TIEOFF_X28Y78": "TIEOFF"
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            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
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            "TIEOFF_X28Y79": "TIEOFF"
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        "bits": {
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            "TIEOFF_X28Y8": "TIEOFF"
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                "baseaddr": "0x00400D00",
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            "TIEOFF_X28Y80": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
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            "TIEOFF_X28Y81": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400D00",
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            "TIEOFF_X28Y82": "TIEOFF"
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            "TIEOFF_X28Y84": "TIEOFF"
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            "TIEOFF_X28Y85": "TIEOFF"
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            "TIEOFF_X28Y87": "TIEOFF"
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            "TIEOFF_X30Y11": "TIEOFF"
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            "CLB_IO_CLK": {
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            "TIEOFF_X30Y12": "TIEOFF"
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    },
    "INT_L_X28Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 51,
                "words": 2
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        },
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    "INT_L_X28Y126": {
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                "baseaddr": "0x00000E00",
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            "TIEOFF_X30Y126": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X30Y127": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "words": 2
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        },
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            "TIEOFF_X30Y128": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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        },
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            "TIEOFF_X30Y129": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X30Y13": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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        "pin_functions": {},
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            "TIEOFF_X30Y130": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y131": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y132": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        "clock_region": "X1Y2",
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            "TIEOFF_X30Y132": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 67,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X30Y133": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y134": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y135": {
        "bits": {
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                "baseaddr": "0x00000E00",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y135": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y136": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y136": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y137": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 74,
        "grid_y": 64,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y138": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 79,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y139": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 81,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y140": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y141": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X30Y142": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 87,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X30Y143": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y144": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 89,
                "words": 2
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        },
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            "TIEOFF_X30Y144": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y145": {
        "bits": {
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                "baseaddr": "0x00000E00",
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                "words": 2
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        },
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            "TIEOFF_X30Y145": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y146": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "words": 2
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        },
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            "TIEOFF_X30Y146": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "words": 2
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        },
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            "TIEOFF_X30Y147": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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        },
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            "TIEOFF_X30Y148": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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            "TIEOFF_X30Y149": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
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            "TIEOFF_X30Y15": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y150": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y151": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y151": "TIEOFF"
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    },
    "INT_L_X28Y152": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y152": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y153": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y153": "TIEOFF"
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    },
    "INT_L_X28Y154": {
        "bits": {
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                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y154": "TIEOFF"
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    "INT_L_X28Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y155": "TIEOFF"
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    },
    "INT_L_X28Y156": {
        "bits": {
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            "TIEOFF_X30Y156": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y157": {
        "bits": {
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            "TIEOFF_X30Y157": "TIEOFF"
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    "INT_L_X28Y158": {
        "bits": {
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            "TIEOFF_X30Y158": "TIEOFF"
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        "bits": {
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            "TIEOFF_X30Y159": "TIEOFF"
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    },
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            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
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            "TIEOFF_X30Y16": "TIEOFF"
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    },
    "INT_L_X28Y160": {
        "bits": {
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                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y160": "TIEOFF"
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    "INT_L_X28Y161": {
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                "baseaddr": "0x00020E00",
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    "INT_L_X28Y162": {
        "bits": {
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                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y162": "TIEOFF"
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    "INT_L_X28Y163": {
        "bits": {
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            "TIEOFF_X30Y163": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y164": {
        "bits": {
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                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y164": "TIEOFF"
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    },
    "INT_L_X28Y165": {
        "bits": {
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                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y165": "TIEOFF"
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    },
    "INT_L_X28Y166": {
        "bits": {
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        "pin_functions": {},
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            "TIEOFF_X30Y166": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y167": {
        "bits": {
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                "baseaddr": "0x00020E00",
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y167": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y168": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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                "words": 2
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        },
        "clock_region": "X1Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y168": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y169": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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                "words": 2
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        "clock_region": "X1Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y169": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "grid_y": 190,
        "pin_functions": {},
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            "TIEOFF_X30Y17": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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                "offset": 40,
                "words": 2
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        },
        "clock_region": "X1Y3",
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        "pin_functions": {},
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            "TIEOFF_X30Y170": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y171": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X1Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y171": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y172": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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                "words": 2
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        },
        "clock_region": "X1Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y172": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y173": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
        "clock_region": "X1Y3",
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        "pin_functions": {},
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            "TIEOFF_X30Y173": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y174": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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                "words": 2
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        },
        "clock_region": "X1Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y174": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
        "clock_region": "X1Y3",
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        "pin_functions": {},
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            "TIEOFF_X30Y175": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y176": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X1Y3",
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        "pin_functions": {},
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            "TIEOFF_X30Y176": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y177": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y177": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y178": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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                "offset": 57,
                "words": 2
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        },
        "clock_region": "X1Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y178": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y179": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X30Y179": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y18": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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                "words": 2
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        },
        "clock_region": "X1Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y180": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y181": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y181": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y182": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y182": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y183": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
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            "TIEOFF_X30Y183": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y184": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y184": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y185": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y186": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y186": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y187": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y187": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y188": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y188": "TIEOFF"
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    "INT_L_X28Y189": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y189": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
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            "TIEOFF_X30Y19": "TIEOFF"
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        "bits": {
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        "bits": {
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    "INT_L_X28Y34": {
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    "INT_L_X28Y35": {
        "bits": {
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                "baseaddr": "0x00420E00",
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                "baseaddr": "0x00420E00",
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            "TIEOFF_X30Y39": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420E00",
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            "TIEOFF_X30Y4": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420E00",
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    "INT_L_X28Y41": {
        "bits": {
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                "baseaddr": "0x00420E00",
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    "INT_L_X28Y42": {
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                "baseaddr": "0x00420E00",
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    "INT_L_X28Y43": {
        "bits": {
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                "baseaddr": "0x00420E00",
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    "INT_L_X28Y44": {
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    "INT_L_X28Y45": {
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                "baseaddr": "0x00420E00",
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        "pin_functions": {},
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            "TIEOFF_X30Y45": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y46": {
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            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X30Y46": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y47": {
        "bits": {
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            "TIEOFF_X30Y47": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y48": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y48": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
                "frames": 28,
                "offset": 99,
                "words": 2
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            "TIEOFF_X30Y49": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
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            "TIEOFF_X30Y5": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y50": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y51": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y52": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y52": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y53": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y54": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y55": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y56": "TIEOFF"
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            "CLB_IO_CLK": {
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            "TIEOFF_X30Y57": "TIEOFF"
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            "TIEOFF_X30Y6": "TIEOFF"
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            "TIEOFF_X30Y62": "TIEOFF"
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            "TIEOFF_X30Y76": "TIEOFF"
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    "INT_L_X28Y77": {
        "bits": {
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            "TIEOFF_X30Y77": "TIEOFF"
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    "INT_L_X28Y78": {
        "bits": {
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            "TIEOFF_X30Y78": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400E00",
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                "offset": 59,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X30Y79": "TIEOFF"
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            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X30Y8": "TIEOFF"
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    "INT_L_X28Y80": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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                "words": 2
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            "TIEOFF_X30Y80": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X30Y81": "TIEOFF"
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    "INT_L_X28Y82": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X30Y82": "TIEOFF"
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    "INT_L_X28Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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                "words": 2
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            "TIEOFF_X30Y83": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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                "words": 2
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            "TIEOFF_X30Y84": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y85": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
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                "words": 2
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X30Y86": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y87": {
        "bits": {
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                "baseaddr": "0x00400E00",
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        },
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        "pin_functions": {},
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            "TIEOFF_X30Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y88": {
        "bits": {
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                "baseaddr": "0x00400E00",
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X30Y88": "TIEOFF"
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    "INT_L_X28Y89": {
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                "baseaddr": "0x00400E00",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X30Y89": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y9": {
        "bits": {
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                "baseaddr": "0x00420E00",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X30Y9": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X30Y90": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y91": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 85,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 74,
        "grid_y": 112,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y92": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 87,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y93": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y94": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 91,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y95": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 93,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X30Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X30Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y0": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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        },
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            "TIEOFF_X2Y1": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
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            "TIEOFF_X2Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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        },
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            "TIEOFF_X2Y100": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y101": {
        "bits": {
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                "baseaddr": "0x00000100",
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        },
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            "TIEOFF_X2Y101": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y102": {
        "bits": {
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                "baseaddr": "0x00000100",
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        },
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            "TIEOFF_X2Y102": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y103": {
        "bits": {
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                "baseaddr": "0x00000100",
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        },
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            "TIEOFF_X2Y103": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00000100",
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        },
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            "TIEOFF_X2Y104": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y105": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 10,
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        },
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            "TIEOFF_X2Y105": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y106": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 12,
                "words": 2
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        },
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            "TIEOFF_X2Y106": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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                "offset": 14,
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        },
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            "TIEOFF_X2Y107": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y108": {
        "bits": {
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                "baseaddr": "0x00000100",
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                "words": 2
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        },
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            "TIEOFF_X2Y108": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y109": {
        "bits": {
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                "baseaddr": "0x00000100",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y109": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y11": {
        "bits": {
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                "baseaddr": "0x00420100",
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            "TIEOFF_X2Y11": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X2Y110": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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        },
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            "TIEOFF_X2Y111": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y112": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 24,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y112": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y113": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 26,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X2Y113": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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                "words": 2
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        },
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            "TIEOFF_X2Y114": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y115": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y115": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y116": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X2Y116": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y117": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 34,
                "words": 2
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        },
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            "TIEOFF_X2Y117": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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                "offset": 36,
                "words": 2
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        },
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            "TIEOFF_X2Y118": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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                "offset": 38,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y119": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 195,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y120": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y121": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y122": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 80,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y123": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y124": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y125": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 76,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 75,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 74,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y129": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 194,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y130": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y131": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 70,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y132": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y133": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 68,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y134": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
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            "TIEOFF_X2Y135": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 73,
                "words": 2
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            "TIEOFF_X2Y136": "TIEOFF"
        },
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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                "offset": 75,
                "words": 2
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            "TIEOFF_X2Y137": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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                "words": 2
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            "TIEOFF_X2Y138": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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                "words": 2
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            "TIEOFF_X2Y139": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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        },
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            "TIEOFF_X2Y14": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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        "type": "INT_L"
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            "CLB_IO_CLK": {
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        "bits": {
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            "TIEOFF_X2Y165": "TIEOFF"
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    "INT_L_X2Y166": {
        "bits": {
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            "TIEOFF_X2Y166": "TIEOFF"
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    "INT_L_X2Y167": {
        "bits": {
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X2Y167": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y168": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y168": "TIEOFF"
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    },
    "INT_L_X2Y169": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "words": 2
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        "sites": {
            "TIEOFF_X2Y169": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y17": {
        "bits": {
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        "pin_functions": {},
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            "TIEOFF_X2Y17": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y170": {
        "bits": {
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                "baseaddr": "0x00020100",
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                "offset": 40,
                "words": 2
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            "TIEOFF_X2Y170": "TIEOFF"
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    },
    "INT_L_X2Y171": {
        "bits": {
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                "baseaddr": "0x00020100",
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                "offset": 42,
                "words": 2
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        },
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            "TIEOFF_X2Y171": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y172": {
        "bits": {
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                "baseaddr": "0x00020100",
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                "offset": 44,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X2Y172": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y173": {
        "bits": {
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                "baseaddr": "0x00020100",
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                "offset": 46,
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            "TIEOFF_X2Y173": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00020100",
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            "TIEOFF_X2Y174": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y175": {
        "bits": {
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                "baseaddr": "0x00020100",
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                "words": 2
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        },
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            "TIEOFF_X2Y175": "TIEOFF"
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    "INT_L_X2Y176": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X2Y176": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y177": {
        "bits": {
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        },
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            "TIEOFF_X2Y177": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y178": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y178": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X2Y179": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X2Y179": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y18": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 11,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y180": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y181": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 11,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y181": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y182": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 11,
        "grid_y": 18,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y182": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y183": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y183": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y184": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y184": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
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        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y185": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y186": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y186": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y187": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y187": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y188": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 77,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y188": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y189": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y189": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "offset": 81,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y190": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y191": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "offset": 83,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y191": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y192": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "offset": 85,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y192": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y193": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y193": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y194": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "offset": 89,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "sites": {
            "TIEOFF_X2Y194": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "offset": 91,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y195": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y196": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "offset": 93,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y196": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y197": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 95,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y197": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y198": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 97,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y198": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y199": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y199": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 4,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X2Y2": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y20": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y22": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y23": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y24": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y25": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y26": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y27": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y28": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y29": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 6,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 204,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y3": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y30": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 175,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y31": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 174,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y32": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 173,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y33": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 172,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y34": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y35": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 170,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y36": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 169,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y37": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y38": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 168,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y38": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 167,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y39": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 8,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 203,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y4": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y40": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 83,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 165,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y41": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y42": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 85,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 164,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y42": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 87,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 163,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y43": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 162,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y44": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 91,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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            "TIEOFF_X2Y45": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y46": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "offset": 95,
                "words": 2
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        },
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            "TIEOFF_X2Y47": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y48": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "offset": 97,
                "words": 2
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        },
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            "TIEOFF_X2Y48": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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            "TIEOFF_X2Y49": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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            "TIEOFF_X2Y5": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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            "TIEOFF_X2Y50": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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            "TIEOFF_X2Y51": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400100",
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            "TIEOFF_X2Y52": "TIEOFF"
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        "bits": {
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            "TIEOFF_X2Y53": "TIEOFF"
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        "bits": {
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        "bits": {
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            "TIEOFF_X2Y74": "TIEOFF"
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    "INT_L_X2Y75": {
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            "TIEOFF_X2Y75": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y76": {
        "bits": {
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                "baseaddr": "0x00400100",
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        },
        "clock_region": "X0Y1",
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            "TIEOFF_X2Y76": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y77": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X2Y77": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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            "TIEOFF_X2Y78": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y79": {
        "bits": {
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                "baseaddr": "0x00400100",
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                "offset": 59,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y79": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X2Y8": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 61,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y80": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y81": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y82": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 67,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y83": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y84": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 71,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y85": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 77,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y88": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 79,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y89": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y9": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 11,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y90": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 83,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 113,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y91": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 85,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 11,
        "grid_y": 112,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y92": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 87,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y93": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 110,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y94": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 91,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y95": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "sites": {
            "TIEOFF_X2Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y99": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
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        },
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        "sites": {
            "TIEOFF_X32Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X32Y1": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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                "words": 2
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        },
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            "TIEOFF_X32Y10": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
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                "words": 2
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        },
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            "TIEOFF_X32Y100": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
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        },
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        "sites": {
            "TIEOFF_X32Y101": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X32Y102": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y103": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X32Y104": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 10,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X32Y105": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
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                "offset": 12,
                "words": 2
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        },
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            "TIEOFF_X32Y106": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X32Y107": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y108": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
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                "offset": 18,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y109": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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        },
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        "pin_functions": {},
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            "TIEOFF_X32Y11": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
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                "words": 2
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        },
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            "TIEOFF_X32Y110": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X32Y111": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y112": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X32Y113": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y114": {
        "bits": {
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                "baseaddr": "0x00000F00",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X32Y114": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y115": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y116": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y117": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y118": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 84,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y119": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "grid_y": 195,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y120": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 82,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y121": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 81,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y122": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 79,
        "grid_y": 80,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y123": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y124": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y125": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 75,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y129": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y130": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y131": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y132": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
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        },
        "type": "INT_L"
    },
    "INT_L_X30Y179": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 59,
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        "sites": {
            "TIEOFF_X32Y179": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X32Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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            "TIEOFF_X32Y180": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y181": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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            "TIEOFF_X32Y181": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y182": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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            "TIEOFF_X32Y182": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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            "TIEOFF_X32Y183": "TIEOFF"
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        "bits": {
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            "TIEOFF_X32Y184": "TIEOFF"
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            "TIEOFF_X32Y186": "TIEOFF"
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            "TIEOFF_X32Y187": "TIEOFF"
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            "TIEOFF_X32Y188": "TIEOFF"
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            "TIEOFF_X32Y28": "TIEOFF"
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            "TIEOFF_X32Y3": "TIEOFF"
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    "INT_L_X30Y30": {
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            "TIEOFF_X32Y30": "TIEOFF"
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        "pin_functions": {},
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            "TIEOFF_X32Y31": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y32": {
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        "pin_functions": {},
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            "TIEOFF_X32Y32": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X32Y33": "TIEOFF"
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    "INT_L_X30Y34": {
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                "baseaddr": "0x00420F00",
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                "words": 2
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            "TIEOFF_X32Y34": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X32Y35": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X32Y36": "TIEOFF"
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        "type": "INT_L"
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        "pin_functions": {},
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        "type": "INT_L"
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                "words": 2
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            "TIEOFF_X32Y38": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y39": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X32Y39": "TIEOFF"
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    },
    "INT_L_X30Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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            "TIEOFF_X32Y4": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y40": {
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                "baseaddr": "0x00420F00",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X32Y40": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y41": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X32Y41": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y42": {
        "bits": {
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                "baseaddr": "0x00420F00",
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                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y42": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 87,
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            "TIEOFF_X32Y43": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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            "TIEOFF_X32Y44": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420F00",
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            "TIEOFF_X32Y45": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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            "TIEOFF_X32Y46": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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            "TIEOFF_X32Y47": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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            "TIEOFF_X32Y48": "TIEOFF"
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                "baseaddr": "0x00420F00",
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            "TIEOFF_X32Y49": "TIEOFF"
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            "TIEOFF_X32Y5": "TIEOFF"
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            "TIEOFF_X32Y72": "TIEOFF"
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            "TIEOFF_X32Y73": "TIEOFF"
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            "TIEOFF_X32Y74": "TIEOFF"
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    "INT_L_X30Y75": {
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                "words": 2
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            "TIEOFF_X32Y76": "TIEOFF"
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    "INT_L_X30Y77": {
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            "TIEOFF_X32Y77": "TIEOFF"
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            "TIEOFF_X32Y78": "TIEOFF"
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                "baseaddr": "0x00400F00",
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            "TIEOFF_X32Y79": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X32Y8": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X32Y80": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X32Y81": "TIEOFF"
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    "INT_L_X30Y82": {
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        "pin_functions": {},
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            "TIEOFF_X32Y82": "TIEOFF"
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        "type": "INT_L"
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        },
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        "pin_functions": {},
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            "TIEOFF_X32Y83": "TIEOFF"
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    "INT_L_X30Y84": {
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        "pin_functions": {},
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            "TIEOFF_X32Y84": "TIEOFF"
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    "INT_L_X30Y85": {
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        "pin_functions": {},
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            "TIEOFF_X32Y85": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y86": {
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        "pin_functions": {},
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            "TIEOFF_X32Y86": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y87": {
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y88": {
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        },
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        "sites": {
            "TIEOFF_X32Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 79,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X32Y89": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X32Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
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                "words": 2
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        },
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            "TIEOFF_X32Y90": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
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        },
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        "pin_functions": {},
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            "TIEOFF_X32Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
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            "TIEOFF_X32Y92": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y93": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X32Y93": "TIEOFF"
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    },
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        "bits": {
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            "TIEOFF_X32Y94": "TIEOFF"
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    "INT_L_X30Y95": {
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            "TIEOFF_X32Y95": "TIEOFF"
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            "TIEOFF_X32Y96": "TIEOFF"
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    },
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        "bits": {
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            "TIEOFF_X32Y97": "TIEOFF"
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        "bits": {
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            "TIEOFF_X32Y99": "TIEOFF"
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            "TIEOFF_X34Y0": "TIEOFF"
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        "bits": {
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            "TIEOFF_X34Y115": "TIEOFF"
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        "bits": {
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            "TIEOFF_X34Y116": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y117": {
        "bits": {
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            "TIEOFF_X34Y117": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y118": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X34Y118": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y119": {
        "bits": {
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                "words": 2
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            "TIEOFF_X34Y119": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y12": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X34Y12": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y120": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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            "TIEOFF_X34Y120": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y121": {
        "bits": {
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            "TIEOFF_X34Y121": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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                "words": 2
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        "clock_region": "X1Y2",
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            "TIEOFF_X34Y122": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y123": {
        "bits": {
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        "clock_region": "X1Y2",
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            "TIEOFF_X34Y123": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y124": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        "sites": {
            "TIEOFF_X34Y124": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y125": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y126": {
        "bits": {
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y126": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y127": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y127": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y128": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y129": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y129": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421000",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y13": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y130": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X34Y130": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
                "frames": 28,
                "offset": 63,
                "words": 2
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        "sites": {
            "TIEOFF_X34Y131": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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            "TIEOFF_X34Y132": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        "sites": {
            "TIEOFF_X34Y133": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y134": {
        "bits": {
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            "TIEOFF_X34Y134": "TIEOFF"
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        "bits": {
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            "TIEOFF_X34Y135": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X34Y160": "TIEOFF"
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            "TIEOFF_X34Y161": "TIEOFF"
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    "INT_L_X32Y162": {
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            "TIEOFF_X34Y162": "TIEOFF"
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    "INT_L_X32Y163": {
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            "TIEOFF_X34Y163": "TIEOFF"
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    },
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            "TIEOFF_X34Y164": "TIEOFF"
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    "INT_L_X32Y165": {
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            "TIEOFF_X34Y165": "TIEOFF"
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    "INT_L_X32Y166": {
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            "TIEOFF_X34Y166": "TIEOFF"
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    "INT_L_X32Y167": {
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            "TIEOFF_X34Y167": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y168": {
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        "pin_functions": {},
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            "TIEOFF_X34Y168": "TIEOFF"
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    "INT_L_X32Y169": {
        "bits": {
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            "TIEOFF_X34Y169": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X34Y17": "TIEOFF"
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    "INT_L_X32Y170": {
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    "INT_L_X32Y171": {
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            "TIEOFF_X34Y171": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y172": {
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            "TIEOFF_X34Y172": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y173": {
        "bits": {
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            "TIEOFF_X34Y173": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y174": {
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            "TIEOFF_X34Y174": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y175": {
        "bits": {
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        },
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        "type": "INT_L"
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    "INT_L_X32Y176": {
        "bits": {
            "CLB_IO_CLK": {
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        "sites": {
            "TIEOFF_X34Y176": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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                "words": 2
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        },
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            "TIEOFF_X34Y177": "TIEOFF"
        },
        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00021000",
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            "TIEOFF_X34Y178": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y179": {
        "bits": {
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                "baseaddr": "0x00021000",
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            "TIEOFF_X34Y179": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00421000",
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            "TIEOFF_X34Y18": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X34Y180": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X34Y181": "TIEOFF"
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            "TIEOFF_X34Y29": "TIEOFF"
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            "TIEOFF_X34Y3": "TIEOFF"
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            "TIEOFF_X34Y30": "TIEOFF"
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    "INT_L_X32Y32": {
        "bits": {
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        "bits": {
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            "TIEOFF_X34Y33": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y34": {
        "bits": {
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            "TIEOFF_X34Y34": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        "type": "INT_L"
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    "INT_L_X32Y37": {
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            "TIEOFF_X34Y37": "TIEOFF"
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    "INT_L_X32Y38": {
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            "TIEOFF_X34Y38": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y39": {
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        "type": "INT_L"
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    "INT_L_X32Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421000",
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        "pin_functions": {},
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            "TIEOFF_X34Y4": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y40": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421000",
                "frames": 28,
                "offset": 83,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X34Y41": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y42": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421000",
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                "words": 2
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        },
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            "TIEOFF_X34Y42": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421000",
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                "offset": 87,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y43": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421000",
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                "offset": 89,
                "words": 2
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        },
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            "TIEOFF_X34Y44": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y45": {
        "bits": {
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                "baseaddr": "0x00421000",
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        },
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            "TIEOFF_X34Y45": "TIEOFF"
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    "INT_L_X32Y46": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421000",
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            "TIEOFF_X34Y46": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421000",
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            "TIEOFF_X34Y47": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421000",
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        "bits": {
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            "TIEOFF_X34Y49": "TIEOFF"
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            "TIEOFF_X34Y5": "TIEOFF"
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            "TIEOFF_X34Y67": "TIEOFF"
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            "TIEOFF_X34Y69": "TIEOFF"
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            "TIEOFF_X34Y7": "TIEOFF"
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        "bits": {
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            "TIEOFF_X34Y70": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401000",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X34Y71": "TIEOFF"
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    "INT_L_X32Y72": {
        "bits": {
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                "baseaddr": "0x00401000",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X34Y72": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y73": {
        "bits": {
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                "baseaddr": "0x00401000",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X34Y73": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y74": {
        "bits": {
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                "baseaddr": "0x00401000",
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                "offset": 48,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X34Y74": "TIEOFF"
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    },
    "INT_L_X32Y75": {
        "bits": {
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                "baseaddr": "0x00401000",
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                "offset": 51,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X34Y75": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X34Y76": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X34Y77": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "offset": 57,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X34Y78": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y79": {
        "bits": {
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                "baseaddr": "0x00401000",
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                "words": 2
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        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y79": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421000",
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                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X34Y8": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y80": {
        "bits": {
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                "baseaddr": "0x00401000",
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                "offset": 61,
                "words": 2
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X34Y80": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y81": {
        "bits": {
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                "baseaddr": "0x00401000",
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y81": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y82": {
        "bits": {
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                "baseaddr": "0x00401000",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y82": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y83": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y85": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "offset": 73,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X34Y87": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y88": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X34Y88": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "offset": 79,
                "words": 2
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        },
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            "TIEOFF_X34Y89": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y9": {
        "bits": {
            "CLB_IO_CLK": {
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        "pin_functions": {},
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            "TIEOFF_X34Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y90": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X34Y90": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y91": {
        "bits": {
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                "baseaddr": "0x00401000",
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            "TIEOFF_X34Y91": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X34Y92": "TIEOFF"
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    "INT_L_X32Y93": {
        "bits": {
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            "TIEOFF_X34Y93": "TIEOFF"
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            "TIEOFF_X34Y94": "TIEOFF"
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        "bits": {
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            "TIEOFF_X34Y95": "TIEOFF"
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            "TIEOFF_X34Y99": "TIEOFF"
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        "bits": {
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            "TIEOFF_X37Y114": "TIEOFF"
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        "bits": {
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                "words": 2
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            "TIEOFF_X37Y115": "TIEOFF"
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    "INT_L_X34Y116": {
        "bits": {
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                "words": 2
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            "TIEOFF_X37Y116": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "words": 2
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            "TIEOFF_X37Y117": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y118": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X37Y118": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y119": {
        "bits": {
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            "TIEOFF_X37Y119": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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            "TIEOFF_X37Y12": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X34Y120": {
        "bits": {
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                "words": 2
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        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X37Y120": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X34Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X37Y121": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X34Y122": {
        "bits": {
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                "baseaddr": "0x00001100",
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        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X37Y122": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X34Y123": {
        "bits": {
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                "baseaddr": "0x00001100",
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        "clock_region": "X1Y2",
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        "type": "INT_L"
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    "INT_L_X34Y124": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        "type": "INT_L"
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    "INT_L_X34Y125": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y125": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y126": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y126": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y127": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X34Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y129": "TIEOFF"
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        "type": "INT_L"
    },
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                "baseaddr": "0x00421100",
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                "words": 2
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        },
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            "TIEOFF_X37Y13": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00001100",
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                "offset": 61,
                "words": 2
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            "TIEOFF_X37Y130": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y131": {
        "bits": {
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                "baseaddr": "0x00001100",
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                "words": 2
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    },
    "INT_L_X34Y132": {
        "bits": {
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                "words": 2
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            "TIEOFF_X37Y132": "TIEOFF"
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        "bits": {
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                "words": 2
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            "TIEOFF_X37Y133": "TIEOFF"
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        "bits": {
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                "words": 2
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        "bits": {
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                "words": 2
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    "INT_L_X34Y162": {
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            "TIEOFF_X37Y165": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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    "INT_L_X34Y167": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X34Y168": {
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        "type": "INT_L"
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    "INT_L_X34Y169": {
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                "words": 2
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        "type": "INT_L"
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        "type": "INT_L"
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        "type": "INT_L"
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    "INT_L_X34Y174": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y174": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00021100",
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            "TIEOFF_X37Y175": "TIEOFF"
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    },
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        "bits": {
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        "type": "INT_L"
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        "type": "INT_L"
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        "bits": {
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        "bits": {
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        "type": "INT_L"
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    "INT_L_X34Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y85": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X37Y86": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X37Y87": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X37Y88": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
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                "words": 2
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        },
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            "TIEOFF_X37Y89": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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        },
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            "TIEOFF_X37Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y90": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X37Y90": "TIEOFF"
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    "INT_L_X34Y91": {
        "bits": {
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                "baseaddr": "0x00401100",
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        },
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            "TIEOFF_X37Y91": "TIEOFF"
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    "INT_L_X34Y92": {
        "bits": {
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        },
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            "TIEOFF_X37Y92": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00401100",
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            "TIEOFF_X37Y93": "TIEOFF"
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                "baseaddr": "0x00401100",
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            "TIEOFF_X37Y94": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401100",
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                "baseaddr": "0x00401100",
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        "bits": {
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                "baseaddr": "0x00401100",
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        },
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        "bits": {
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            "TIEOFF_X39Y100": "TIEOFF"
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        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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            "TIEOFF_X39Y111": "TIEOFF"
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    "INT_L_X36Y112": {
        "bits": {
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            "TIEOFF_X39Y112": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X36Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "grid_y": 90,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X39Y113": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X36Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X39Y114": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X36Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "offset": 30,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X39Y115": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X36Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "offset": 32,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X39Y116": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X36Y117": {
        "bits": {
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                "baseaddr": "0x00001200",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X39Y117": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X36Y118": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X39Y118": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X36Y119": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X39Y119": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X36Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421200",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X39Y12": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X36Y120": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 40,
                "words": 2
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        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X39Y120": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X36Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "offset": 42,
                "words": 2
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        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X39Y121": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X36Y122": {
        "bits": {
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                "baseaddr": "0x00001200",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X39Y122": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X36Y123": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
    },
    "INT_L_X36Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X39Y124": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X36Y125": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X39Y125": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X36Y126": {
        "bits": {
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                "baseaddr": "0x00001200",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X39Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X36Y127": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X39Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X36Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "bits": {
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        "bits": {
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                "baseaddr": "0x00021200",
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                "offset": 46,
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                "baseaddr": "0x00421200",
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                "offset": 79,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X39Y39": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421200",
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                "words": 2
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        },
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            "TIEOFF_X39Y4": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421200",
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                "words": 2
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421200",
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            "TIEOFF_X39Y41": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X36Y42": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421200",
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        },
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            "TIEOFF_X39Y42": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00421200",
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            "TIEOFF_X39Y73": "TIEOFF"
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    "INT_L_X36Y75": {
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        "type": "INT_L"
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    "INT_L_X36Y82": {
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
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            "TIEOFF_X39Y84": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00401200",
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            "TIEOFF_X39Y85": "TIEOFF"
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            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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                "words": 2
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            "TIEOFF_X39Y86": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X36Y87": {
        "bits": {
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            "TIEOFF_X39Y87": "TIEOFF"
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        "bits": {
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            "TIEOFF_X39Y88": "TIEOFF"
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            "TIEOFF_X39Y89": "TIEOFF"
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    "INT_L_X38Y34": {
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        "type": "INT_L"
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    "INT_L_X38Y37": {
        "bits": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y37": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 77,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X41Y38": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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                "words": 2
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            "TIEOFF_X41Y39": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00421300",
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            "TIEOFF_X41Y4": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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            "TIEOFF_X41Y40": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421300",
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            "TIEOFF_X41Y41": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421300",
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            "TIEOFF_X41Y42": "TIEOFF"
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            "TIEOFF_X41Y68": "TIEOFF"
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            "TIEOFF_X41Y69": "TIEOFF"
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            "TIEOFF_X41Y71": "TIEOFF"
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            "TIEOFF_X41Y72": "TIEOFF"
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    "INT_L_X38Y74": {
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        "pin_functions": {},
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            "TIEOFF_X41Y75": "TIEOFF"
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        "clock_region": "X1Y1",
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                "baseaddr": "0x00401300",
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            "TIEOFF_X41Y77": "TIEOFF"
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X41Y79": "TIEOFF"
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X41Y8": "TIEOFF"
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        "type": "INT_L"
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        "pin_functions": {},
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            "TIEOFF_X41Y80": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X38Y81": {
        "bits": {
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y81": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y82": {
        "bits": {
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        },
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        "grid_x": 100,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y82": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X41Y83": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X38Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X41Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
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                "words": 2
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        },
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            "TIEOFF_X41Y85": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X38Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
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        "pin_functions": {},
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            "TIEOFF_X41Y86": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X38Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
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        },
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            "TIEOFF_X41Y87": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X38Y88": {
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                "baseaddr": "0x00401300",
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            "TIEOFF_X41Y88": "TIEOFF"
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    "INT_L_X38Y89": {
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                "baseaddr": "0x00401300",
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            "TIEOFF_X41Y89": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X41Y9": "TIEOFF"
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        "bits": {
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    "INT_L_X40Y23": {
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    "INT_L_X40Y31": {
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    "INT_L_X40Y33": {
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    "INT_L_X40Y34": {
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    "INT_L_X40Y36": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y36": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y37": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y38": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X43Y38": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X43Y39": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y4": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y40": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y41": "TIEOFF"
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    "INT_L_X40Y42": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y42": "TIEOFF"
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    "INT_L_X40Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y43": "TIEOFF"
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            "TIEOFF_X43Y46": "TIEOFF"
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            "TIEOFF_X43Y49": "TIEOFF"
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        "pin_functions": {},
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            "TIEOFF_X43Y66": "TIEOFF"
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                "baseaddr": "0x00401400",
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            "TIEOFF_X43Y67": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y68": {
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                "baseaddr": "0x00401400",
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                "words": 2
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        },
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            "TIEOFF_X43Y68": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y69": {
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                "baseaddr": "0x00401400",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X43Y69": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y7": {
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X43Y7": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401400",
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        },
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        "pin_functions": {},
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            "TIEOFF_X43Y70": "TIEOFF"
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    "INT_L_X40Y71": {
        "bits": {
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                "baseaddr": "0x00401400",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X43Y71": "TIEOFF"
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    "INT_L_X40Y72": {
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                "baseaddr": "0x00401400",
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                "words": 2
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X43Y72": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y73": {
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                "baseaddr": "0x00401400",
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                "words": 2
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X43Y73": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y74": {
        "bits": {
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X43Y74": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y75": {
        "bits": {
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X43Y75": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y76": {
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X43Y76": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y77": {
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                "baseaddr": "0x00401400",
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                "words": 2
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X43Y77": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y78": {
        "bits": {
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X43Y78": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y79": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y8": {
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X43Y8": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y80": {
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        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y80": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 104,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y81": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y82": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y83": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y84": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y85": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 73,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X43Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X43Y88": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "words": 2
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        },
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            "TIEOFF_X43Y89": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X43Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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        },
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            "TIEOFF_X43Y90": "TIEOFF"
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    },
    "INT_L_X40Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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        },
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            "TIEOFF_X43Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y92": {
        "bits": {
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                "baseaddr": "0x00401400",
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        },
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            "TIEOFF_X43Y92": "TIEOFF"
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    },
    "INT_L_X40Y93": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X43Y93": "TIEOFF"
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    },
    "INT_L_X40Y94": {
        "bits": {
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                "baseaddr": "0x00401400",
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        },
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            "TIEOFF_X43Y94": "TIEOFF"
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    },
    "INT_L_X40Y95": {
        "bits": {
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                "baseaddr": "0x00401400",
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            "TIEOFF_X43Y95": "TIEOFF"
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    },
    "INT_L_X40Y96": {
        "bits": {
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                "baseaddr": "0x00401400",
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                "words": 2
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        },
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            "TIEOFF_X43Y96": "TIEOFF"
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    },
    "INT_L_X40Y97": {
        "bits": {
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                "baseaddr": "0x00401400",
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                "offset": 95,
                "words": 2
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        },
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            "TIEOFF_X43Y97": "TIEOFF"
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    "INT_L_X40Y98": {
        "bits": {
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                "baseaddr": "0x00401400",
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                "offset": 97,
                "words": 2
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        },
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            "TIEOFF_X43Y98": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X43Y99": "TIEOFF"
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    "INT_L_X42Y0": {
        "bits": {
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                "baseaddr": "0x00421500",
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                "offset": 0,
                "words": 2
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            "TIEOFF_X45Y0": "TIEOFF"
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    "INT_L_X42Y1": {
        "bits": {
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                "baseaddr": "0x00421500",
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                "words": 2
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            "TIEOFF_X45Y1": "TIEOFF"
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                "offset": 22,
                "words": 2
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            "TIEOFF_X45Y11": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421500",
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                "baseaddr": "0x00421500",
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            "TIEOFF_X45Y13": "TIEOFF"
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        "bits": {
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            "TIEOFF_X45Y14": "TIEOFF"
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                "baseaddr": "0x00421500",
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                "words": 2
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            "TIEOFF_X45Y15": "TIEOFF"
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                "baseaddr": "0x00421500",
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                "words": 2
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        },
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            "TIEOFF_X45Y16": "TIEOFF"
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    "INT_L_X42Y17": {
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                "baseaddr": "0x00421500",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X45Y17": "TIEOFF"
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    "INT_L_X42Y18": {
        "bits": {
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                "baseaddr": "0x00421500",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X45Y18": "TIEOFF"
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    },
    "INT_L_X42Y19": {
        "bits": {
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                "baseaddr": "0x00421500",
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                "offset": 38,
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X45Y19": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X45Y2": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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                "offset": 40,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X45Y20": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X45Y21": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y22": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X45Y23": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X45Y24": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X45Y25": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y26": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X45Y27": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y28": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y29": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 6,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y3": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y30": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y31": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y32": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y33": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y34": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X45Y35": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y36": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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                "words": 2
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        },
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            "TIEOFF_X45Y37": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y38": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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                "words": 2
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        },
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            "TIEOFF_X45Y38": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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        },
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            "TIEOFF_X45Y39": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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        },
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            "TIEOFF_X45Y4": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00421500",
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            "TIEOFF_X45Y40": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421500",
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            "TIEOFF_X45Y41": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421500",
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            "TIEOFF_X45Y42": "TIEOFF"
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        "bits": {
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        "bits": {
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            "TIEOFF_X45Y66": "TIEOFF"
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                "words": 2
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            "TIEOFF_X45Y67": "TIEOFF"
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            "TIEOFF_X45Y68": "TIEOFF"
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            "TIEOFF_X45Y69": "TIEOFF"
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        "clock_region": "X1Y0",
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            "TIEOFF_X45Y7": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00401500",
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                "baseaddr": "0x00401500",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X45Y71": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X42Y72": {
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        "clock_region": "X1Y1",
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            "TIEOFF_X45Y72": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00401500",
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        "clock_region": "X1Y1",
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        "type": "INT_L"
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    "INT_L_X42Y74": {
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                "baseaddr": "0x00401500",
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        "clock_region": "X1Y1",
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        "type": "INT_L"
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    "INT_L_X42Y75": {
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        },
        "clock_region": "X1Y1",
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        "type": "INT_L"
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X45Y76": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X42Y77": {
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                "baseaddr": "0x00401500",
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X45Y77": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X42Y78": {
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        },
        "clock_region": "X1Y1",
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        "type": "INT_L"
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    "INT_L_X42Y79": {
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X45Y79": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y8": {
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                "baseaddr": "0x00421500",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y8": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y80": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y81": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y82": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y83": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 71,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X45Y85": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "words": 2
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        },
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            "TIEOFF_X45Y86": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "words": 2
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        },
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            "TIEOFF_X45Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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        },
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            "TIEOFF_X45Y88": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "words": 2
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        },
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            "TIEOFF_X45Y89": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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                "words": 2
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        },
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            "TIEOFF_X45Y9": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X42Y90": {
        "bits": {
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                "baseaddr": "0x00401500",
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        },
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            "TIEOFF_X45Y90": "TIEOFF"
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    "INT_L_X42Y91": {
        "bits": {
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                "baseaddr": "0x00401500",
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        },
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            "TIEOFF_X45Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y92": {
        "bits": {
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                "baseaddr": "0x00401500",
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        },
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            "TIEOFF_X45Y92": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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        },
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    "INT_L_X42Y94": {
        "bits": {
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                "baseaddr": "0x00401500",
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            "TIEOFF_X45Y94": "TIEOFF"
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    "INT_L_X42Y95": {
        "bits": {
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                "baseaddr": "0x00401500",
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                "words": 2
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    "INT_L_X42Y96": {
        "bits": {
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                "baseaddr": "0x00401500",
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                "offset": 93,
                "words": 2
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        },
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            "TIEOFF_X45Y96": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X42Y97": {
        "bits": {
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                "baseaddr": "0x00401500",
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                "words": 2
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        },
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        "type": "INT_L"
    },
    "INT_L_X42Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
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            "TIEOFF_X45Y98": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X42Y99": {
        "bits": {
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                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X45Y99": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00420200",
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                "offset": 0,
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            "TIEOFF_X4Y0": "TIEOFF"
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    "INT_L_X4Y1": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X4Y1": "TIEOFF"
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        "bits": {
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                "offset": 20,
                "words": 2
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        },
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    },
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        "bits": {
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            "TIEOFF_X4Y100": "TIEOFF"
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        "bits": {
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                "words": 2
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            "TIEOFF_X4Y101": "TIEOFF"
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    },
    "INT_L_X4Y102": {
        "bits": {
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                "offset": 4,
                "words": 2
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        },
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            "TIEOFF_X4Y102": "TIEOFF"
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        "bits": {
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                "offset": 6,
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    },
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        "bits": {
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                "offset": 8,
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        "type": "INT_L"
    },
    "INT_L_X4Y105": {
        "bits": {
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                "offset": 10,
                "words": 2
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        "type": "INT_L"
    },
    "INT_L_X4Y106": {
        "bits": {
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                "offset": 12,
                "words": 2
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        },
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            "TIEOFF_X4Y106": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y107": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X4Y107": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000200",
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                "offset": 16,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y108": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000200",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y109": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420200",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X4Y11": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000200",
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                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y110": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000200",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y111": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000200",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y112": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000200",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 90,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y113": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000200",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y114": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000200",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 15,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y115": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000200",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y116": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000200",
                "frames": 28,
                "offset": 34,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 15,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y117": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000200",
                "frames": 28,
                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 15,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y118": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000200",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y119": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420200",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000200",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y120": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000200",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 15,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y121": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000200",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 15,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y122": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000200",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y2",
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420200",
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        "type": "INT_L"
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            "TIEOFF_X4Y33": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00420200",
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                "words": 2
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            "TIEOFF_X4Y34": "TIEOFF"
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        "bits": {
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        "type": "INT_L"
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        "type": "INT_L"
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    "INT_L_X4Y79": {
        "bits": {
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        "sites": {
            "TIEOFF_X4Y79": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420200",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X4Y8": "TIEOFF"
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                "words": 2
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            "TIEOFF_X4Y80": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00400200",
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                "words": 2
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            "TIEOFF_X4Y81": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X4Y82": {
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                "words": 2
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            "TIEOFF_X4Y82": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00400200",
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            "TIEOFF_X4Y83": "TIEOFF"
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            "TIEOFF_X4Y84": "TIEOFF"
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        "bits": {
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        "bits": {
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        "bits": {
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                "words": 2
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        },
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        "type": "INT_L"
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        "bits": {
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        "sites": {
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    "INT_L_X6Y116": {
        "bits": {
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        "type": "INT_L"
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        "type": "INT_L"
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    "INT_L_X6Y118": {
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        },
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        "type": "INT_L"
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        "type": "INT_L"
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    "INT_L_X6Y120": {
        "bits": {
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        },
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        "sites": {
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        "type": "INT_L"
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    "INT_L_X6Y121": {
        "bits": {
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        "pin_functions": {},
        "sites": {
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
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                "words": 2
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        },
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            "TIEOFF_X6Y169": "TIEOFF"
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y31": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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    "INT_L_X6Y75": {
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    "INT_L_X6Y76": {
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                "offset": 55,
                "words": 2
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X8Y8": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y114": {
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        "type": "INT_R"
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    "INT_R_X11Y115": {
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    "INT_R_X11Y116": {
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        "type": "INT_R"
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    "INT_R_X11Y117": {
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        "type": "INT_R"
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    "INT_R_X11Y118": {
        "bits": {
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        },
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        "type": "INT_R"
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    "INT_R_X11Y119": {
        "bits": {
            "CLB_IO_CLK": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X11Y161": {
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        "type": "INT_R"
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    "INT_R_X11Y162": {
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        "type": "INT_R"
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    "INT_R_X11Y163": {
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        "pin_functions": {},
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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                "offset": 28,
                "words": 2
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        },
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            "TIEOFF_X12Y164": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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                "offset": 30,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X12Y165": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y166": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X12Y166": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y167": {
        "bits": {
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                "baseaddr": "0x00020580",
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                "words": 2
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        },
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            "TIEOFF_X12Y167": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y168": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X12Y168": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y169": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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                "words": 2
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        },
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            "TIEOFF_X12Y169": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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        },
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            "TIEOFF_X12Y17": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y170": {
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                "baseaddr": "0x00020580",
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        },
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            "TIEOFF_X12Y170": "TIEOFF"
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    "INT_R_X11Y171": {
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                "baseaddr": "0x00020580",
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            "TIEOFF_X12Y171": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y172": {
        "bits": {
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                "baseaddr": "0x00020580",
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    "INT_R_X11Y173": {
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                "baseaddr": "0x00020580",
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        "bits": {
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        "bits": {
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                "baseaddr": "0x00020580",
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        "bits": {
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        },
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        "bits": {
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    "INT_R_X11Y179": {
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    "INT_R_X11Y18": {
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            "TIEOFF_X12Y18": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y180": {
        "bits": {
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    "INT_R_X11Y181": {
        "bits": {
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    "INT_R_X11Y182": {
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    "INT_R_X11Y183": {
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    "INT_R_X11Y186": {
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    "INT_R_X11Y187": {
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    "INT_R_X11Y188": {
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    "INT_R_X11Y189": {
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        "type": "INT_R"
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    "INT_R_X11Y190": {
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        "type": "INT_R"
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    "INT_R_X11Y191": {
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        "type": "INT_R"
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    "INT_R_X11Y192": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X11Y193": {
        "bits": {
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                "words": 2
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        "clock_region": "X0Y3",
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            "TIEOFF_X12Y193": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y194": {
        "bits": {
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                "baseaddr": "0x00020580",
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                "words": 2
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        "clock_region": "X0Y3",
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            "TIEOFF_X12Y194": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y195": {
        "bits": {
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                "baseaddr": "0x00020580",
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                "words": 2
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        },
        "clock_region": "X0Y3",
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            "TIEOFF_X12Y195": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y196": {
        "bits": {
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                "baseaddr": "0x00020580",
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                "offset": 93,
                "words": 2
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        },
        "clock_region": "X0Y3",
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            "TIEOFF_X12Y196": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y197": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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                "words": 2
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        },
        "clock_region": "X0Y3",
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            "TIEOFF_X12Y197": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y198": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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                "offset": 97,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "sites": {
            "TIEOFF_X12Y198": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y199": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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                "offset": 99,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "sites": {
            "TIEOFF_X12Y199": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X12Y2": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X12Y20": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y21": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y22": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X12Y23": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y24": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y25": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 32,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y26": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y27": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y28": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
                "frames": 28,
                "offset": 59,
                "words": 2
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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    "INT_R_X11Y72": {
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            "TIEOFF_X12Y73": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400580",
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                "offset": 48,
                "words": 2
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        },
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            "TIEOFF_X12Y74": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400580",
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                "words": 2
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        },
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            "TIEOFF_X12Y75": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400580",
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        },
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            "TIEOFF_X12Y76": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400580",
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                "words": 2
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        },
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            "TIEOFF_X12Y77": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y78": {
        "bits": {
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                "baseaddr": "0x00400580",
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        },
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            "TIEOFF_X12Y78": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400580",
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            "TIEOFF_X12Y79": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X12Y8": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y80": {
        "bits": {
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                "baseaddr": "0x00400580",
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        "type": "INT_R"
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    "INT_R_X11Y82": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X11Y91": {
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    "INT_R_X11Y92": {
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    "INT_R_X11Y98": {
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            "TIEOFF_X14Y100": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y101": {
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        },
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        "type": "INT_R"
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    "INT_R_X13Y102": {
        "bits": {
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        },
        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X13Y103": {
        "bits": {
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                "baseaddr": "0x00000680",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X13Y104": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X13Y105": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X13Y106": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X14Y106": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y107": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X13Y108": {
        "bits": {
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X14Y108": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000680",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X14Y109": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X14Y11": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y110": {
        "bits": {
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        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
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        "type": "INT_R"
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    "INT_R_X13Y111": {
        "bits": {
            "CLB_IO_CLK": {
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        "clock_region": "X0Y2",
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    "INT_R_X13Y112": {
        "bits": {
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        },
        "clock_region": "X0Y2",
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        "sites": {
            "TIEOFF_X14Y112": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y113": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y113": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y114": {
        "bits": {
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X13Y115": {
        "bits": {
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        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X14Y115": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y116": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y116": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y117": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00000680",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X14Y118": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X14Y120": "TIEOFF"
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    "INT_R_X13Y151": {
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    "INT_R_X13Y152": {
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    "INT_R_X13Y153": {
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    "INT_R_X13Y154": {
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    "INT_R_X13Y157": {
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    "INT_R_X13Y158": {
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        "type": "INT_R"
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    "INT_R_X13Y159": {
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        "type": "INT_R"
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    "INT_R_X13Y160": {
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        },
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        "type": "INT_R"
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    "INT_R_X13Y161": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X13Y162": {
        "bits": {
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        "type": "INT_R"
    },
    "INT_R_X13Y163": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020680",
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        },
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            "TIEOFF_X14Y163": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y164": {
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        "type": "INT_R"
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    "INT_R_X13Y165": {
        "bits": {
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        },
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            "TIEOFF_X14Y165": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y166": {
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            "TIEOFF_X14Y166": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y167": {
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            "TIEOFF_X14Y167": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X14Y168": "TIEOFF"
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    "INT_R_X13Y194": {
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    "INT_R_X13Y199": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X13Y23": {
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        "type": "INT_R"
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    "INT_R_X13Y24": {
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        "type": "INT_R"
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    "INT_R_X13Y25": {
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        "type": "INT_R"
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    "INT_R_X13Y26": {
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X13Y27": {
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                "words": 2
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    "INT_R_X13Y72": {
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        "type": "INT_R"
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        "type": "INT_R"
    },
    "INT_R_X17Y115": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X17Y116": {
        "bits": {
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                "words": 2
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        "type": "INT_R"
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X17Y146": {
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                "words": 2
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                "words": 2
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                "words": 2
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X17Y151": {
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                "words": 2
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    "INT_R_X17Y153": {
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    "INT_R_X17Y154": {
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    "INT_R_X17Y155": {
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    "INT_R_X17Y156": {
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    "INT_R_X17Y157": {
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        "type": "INT_R"
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    "INT_R_X17Y158": {
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        },
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        "type": "INT_R"
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    "INT_R_X17Y159": {
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        "type": "INT_R"
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                "baseaddr": "0x00420880",
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        "type": "INT_R"
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    "INT_R_X17Y162": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X17Y199": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X17Y22": {
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        "type": "INT_R"
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    "INT_R_X17Y23": {
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        "type": "INT_R"
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    "INT_R_X17Y24": {
        "bits": {
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    "INT_R_X19Y158": {
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    "INT_R_X1Y111": {
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        "type": "INT_R"
    },
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        "bits": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X1Y155": {
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        "type": "INT_R"
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    "INT_R_X1Y156": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y156": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y157": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
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            "TIEOFF_X1Y157": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y158": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X1Y158": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y159": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y159": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
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                "words": 2
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        },
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            "TIEOFF_X1Y16": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
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                "words": 2
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        },
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            "TIEOFF_X1Y160": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y161": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
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        },
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            "TIEOFF_X1Y161": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y162": {
        "bits": {
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                "baseaddr": "0x00020080",
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            "TIEOFF_X1Y162": "TIEOFF"
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    "INT_R_X1Y163": {
        "bits": {
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    "INT_R_X1Y164": {
        "bits": {
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            "TIEOFF_X1Y164": "TIEOFF"
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    "INT_R_X1Y165": {
        "bits": {
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                "baseaddr": "0x00020080",
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            "TIEOFF_X1Y165": "TIEOFF"
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    "INT_R_X1Y166": {
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            "TIEOFF_X1Y166": "TIEOFF"
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    "INT_R_X1Y167": {
        "bits": {
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            "TIEOFF_X1Y168": "TIEOFF"
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            "TIEOFF_X1Y169": "TIEOFF"
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    "INT_R_X1Y172": {
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    "INT_R_X1Y173": {
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    "INT_R_X1Y177": {
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    "INT_R_X1Y179": {
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    "INT_R_X1Y18": {
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    "INT_R_X1Y180": {
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    "INT_R_X1Y181": {
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    "INT_R_X1Y182": {
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    "INT_R_X1Y183": {
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    "INT_R_X1Y184": {
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        },
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    "INT_R_X1Y185": {
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            "TIEOFF_X1Y185": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y186": {
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                "words": 2
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        },
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            "TIEOFF_X1Y186": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y187": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y3",
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            "TIEOFF_X1Y187": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y188": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X1Y188": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y189": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X1Y189": "TIEOFF"
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    },
    "INT_R_X1Y19": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X1Y19": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y190": {
        "bits": {
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                "baseaddr": "0x00020080",
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                "words": 2
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        },
        "clock_region": "X0Y3",
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            "TIEOFF_X1Y190": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y191": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y3",
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            "TIEOFF_X1Y191": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y192": {
        "bits": {
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                "baseaddr": "0x00020080",
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                "offset": 85,
                "words": 2
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        },
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            "TIEOFF_X1Y192": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y193": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 87,
                "words": 2
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        },
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            "TIEOFF_X1Y193": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y194": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y3",
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        "sites": {
            "TIEOFF_X1Y194": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y195": {
        "bits": {
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                "baseaddr": "0x00020080",
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                "words": 2
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        },
        "clock_region": "X0Y3",
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        "sites": {
            "TIEOFF_X1Y195": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y196": {
        "bits": {
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                "baseaddr": "0x00020080",
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                "offset": 93,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "sites": {
            "TIEOFF_X1Y196": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y197": {
        "bits": {
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                "frames": 28,
                "offset": 95,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "sites": {
            "TIEOFF_X1Y197": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y198": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y198": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y199": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "sites": {
            "TIEOFF_X1Y199": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y2": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y20": {
        "bits": {
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                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 5,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y20": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
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            "TIEOFF_X1Y66": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
                "frames": 28,
                "offset": 34,
                "words": 2
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        },
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        "grid_x": 5,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y67": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
                "frames": 28,
                "offset": 36,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y68": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y69": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X1Y7": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y70": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
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                "offset": 42,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X1Y71": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
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                "words": 2
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        },
        "clock_region": "X0Y1",
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            "TIEOFF_X1Y72": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
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        },
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        "pin_functions": {},
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            "TIEOFF_X1Y73": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
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        },
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            "TIEOFF_X1Y74": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
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        },
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            "TIEOFF_X1Y75": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
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        },
        "clock_region": "X0Y1",
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            "TIEOFF_X1Y76": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
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                "words": 2
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        },
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            "TIEOFF_X1Y77": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y78": {
        "bits": {
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                "baseaddr": "0x00400080",
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        },
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            "TIEOFF_X1Y78": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y79": {
        "bits": {
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        },
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            "TIEOFF_X1Y79": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
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        },
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            "TIEOFF_X1Y8": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
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        },
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            "TIEOFF_X1Y80": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y81": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X1Y81": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y82": {
        "bits": {
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                "baseaddr": "0x00400080",
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                "words": 2
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        },
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            "TIEOFF_X1Y82": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y83": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y1",
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            "TIEOFF_X1Y83": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y84": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y1",
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            "TIEOFF_X1Y84": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y85": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y1",
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            "TIEOFF_X1Y85": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y86": {
        "bits": {
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                "baseaddr": "0x00400080",
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                "words": 2
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        },
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            "TIEOFF_X1Y86": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y87": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X1Y87": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y88": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X1Y88": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y89": {
        "bits": {
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        },
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            "TIEOFF_X1Y89": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y9": {
        "bits": {
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X1Y9": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y90": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X1Y90": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y91": {
        "bits": {
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                "baseaddr": "0x00400080",
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X1Y91": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y92": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X1Y92": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y93": {
        "bits": {
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                "offset": 87,
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X1Y93": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y94": {
        "bits": {
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                "baseaddr": "0x00400080",
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                "words": 2
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        },
        "clock_region": "X0Y1",
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            "TIEOFF_X1Y94": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y95": {
        "bits": {
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                "baseaddr": "0x00400080",
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y95": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y96": {
        "bits": {
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                "baseaddr": "0x00400080",
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                "offset": 93,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y96": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
                "frames": 28,
                "offset": 95,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y97": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
                "frames": 28,
                "offset": 97,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y98": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y99": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 56,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y0": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y1": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y10": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y11": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 195,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y12": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 56,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y13": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y14": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y15": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
        "clock_region": "X0Y3",
        "grid_x": 56,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y150": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y151": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 2,
                "words": 2
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        },
        "clock_region": "X0Y3",
        "grid_x": 56,
        "grid_y": 50,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y151": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y152": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 4,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 56,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y152": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y153": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 6,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 56,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y153": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y154": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 8,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 56,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y154": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
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        "sites": {
            "TIEOFF_X23Y155": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y156": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X23Y156": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y157": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
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            "TIEOFF_X23Y157": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y158": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
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            "TIEOFF_X23Y158": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y159": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
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            "TIEOFF_X23Y159": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
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            "TIEOFF_X23Y16": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
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            "TIEOFF_X23Y160": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y161": {
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            "TIEOFF_X23Y161": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y162": {
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    "INT_R_X21Y163": {
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            "TIEOFF_X23Y163": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y164": {
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            "TIEOFF_X23Y164": "TIEOFF"
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        "bits": {
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            "TIEOFF_X23Y165": "TIEOFF"
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    "INT_R_X21Y167": {
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            "TIEOFF_X23Y167": "TIEOFF"
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            "TIEOFF_X23Y168": "TIEOFF"
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            "TIEOFF_X23Y169": "TIEOFF"
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    "INT_R_X21Y170": {
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    "INT_R_X21Y171": {
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    "INT_R_X21Y173": {
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    "INT_R_X21Y175": {
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    "INT_R_X21Y176": {
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    "INT_R_X21Y181": {
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    "INT_R_X21Y182": {
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    "INT_R_X21Y183": {
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    "INT_R_X21Y184": {
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    "INT_R_X21Y185": {
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        "type": "INT_R"
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    "INT_R_X21Y186": {
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                "words": 2
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            "TIEOFF_X23Y186": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y187": {
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                "words": 2
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    "INT_R_X21Y188": {
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                "words": 2
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        "clock_region": "X0Y3",
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    "INT_R_X21Y189": {
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        "type": "INT_R"
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    "INT_R_X21Y19": {
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                "words": 2
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    "INT_R_X21Y190": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X21Y191": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X21Y192": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X21Y193": {
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                "words": 2
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            "TIEOFF_X23Y193": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y194": {
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                "offset": 89,
                "words": 2
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            "TIEOFF_X23Y194": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y195": {
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                "words": 2
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        "clock_region": "X0Y3",
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            "TIEOFF_X23Y195": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y196": {
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                "words": 2
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        },
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            "TIEOFF_X23Y196": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y197": {
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                "words": 2
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            "TIEOFF_X23Y197": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y198": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y3",
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        "sites": {
            "TIEOFF_X23Y198": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y199": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
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                "words": 2
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        },
        "clock_region": "X0Y3",
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        "sites": {
            "TIEOFF_X23Y199": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
                "frames": 28,
                "offset": 4,
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00420A80",
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    "INT_R_X23Y151": {
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    "INT_R_X23Y152": {
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        "type": "INT_R"
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    "INT_R_X23Y153": {
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                "baseaddr": "0x00020B80",
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    "INT_R_X23Y186": {
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    "INT_R_X23Y187": {
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    "INT_R_X23Y189": {
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    "INT_R_X23Y190": {
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    "INT_R_X23Y191": {
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    "INT_R_X23Y192": {
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        "type": "INT_R"
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    "INT_R_X23Y193": {
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        "type": "INT_R"
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    "INT_R_X23Y194": {
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        "type": "INT_R"
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    "INT_R_X23Y195": {
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        "type": "INT_R"
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    "INT_R_X23Y196": {
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        "type": "INT_R"
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    "INT_R_X23Y197": {
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        "type": "INT_R"
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    "INT_R_X23Y198": {
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        "sites": {
            "TIEOFF_X25Y198": "TIEOFF"
        },
        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020B80",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X25Y199": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
                "frames": 28,
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            "TIEOFF_X25Y2": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00420B80",
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            "TIEOFF_X25Y20": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y21": {
        "bits": {
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                "baseaddr": "0x00420B80",
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            "TIEOFF_X25Y21": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y22": {
        "bits": {
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                "baseaddr": "0x00420B80",
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            "TIEOFF_X25Y22": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y23": {
        "bits": {
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                "baseaddr": "0x00420B80",
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            "TIEOFF_X25Y23": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y24": {
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    "INT_R_X23Y25": {
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            "TIEOFF_X25Y25": "TIEOFF"
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    "INT_R_X23Y26": {
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            "TIEOFF_X25Y26": "TIEOFF"
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                "baseaddr": "0x00420B80",
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            "TIEOFF_X25Y27": "TIEOFF"
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            "TIEOFF_X25Y28": "TIEOFF"
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    "INT_R_X23Y33": {
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    "INT_R_X23Y34": {
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    "INT_R_X23Y48": {
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        "type": "INT_R"
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    "INT_R_X23Y49": {
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        "type": "INT_R"
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    "INT_R_X23Y5": {
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        "clock_region": "X0Y0",
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            "TIEOFF_X25Y5": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00420B80",
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X25Y6": "TIEOFF"
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        "type": "INT_R"
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            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X25Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y8": {
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y8": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y9": {
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                "words": 2
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        "clock_region": "X0Y0",
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            "TIEOFF_X25Y9": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X27Y0": "TIEOFF"
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            "TIEOFF_X27Y1": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X27Y10": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y100": {
        "bits": {
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                "baseaddr": "0x00000C80",
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        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X27Y100": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y101": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X27Y101": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y102": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y102": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y103": {
        "bits": {
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                "baseaddr": "0x00000C80",
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X27Y103": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y104": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y104": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y105": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y105": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y106": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y107": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y108": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
                "frames": 28,
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X27Y109": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C80",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X27Y11": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
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        },
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            "TIEOFF_X27Y110": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
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        },
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            "TIEOFF_X27Y111": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y112": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X27Y112": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y113": {
        "bits": {
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        },
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            "TIEOFF_X27Y113": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X27Y114": "TIEOFF"
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    "INT_R_X25Y115": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X27Y115": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y116": {
        "bits": {
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        },
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            "TIEOFF_X27Y116": "TIEOFF"
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    "INT_R_X25Y118": {
        "bits": {
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        },
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            "TIEOFF_X27Y119": "TIEOFF"
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    "INT_R_X25Y121": {
        "bits": {
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    "INT_R_X25Y126": {
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    "INT_R_X25Y129": {
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    "INT_R_X25Y130": {
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    "INT_R_X25Y131": {
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    "INT_R_X25Y132": {
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    "INT_R_X25Y134": {
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    "INT_R_X25Y135": {
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        "type": "INT_R"
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    "INT_R_X25Y136": {
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        },
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        "type": "INT_R"
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    "INT_R_X25Y137": {
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        },
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        "type": "INT_R"
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    "INT_R_X25Y138": {
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        },
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            "TIEOFF_X27Y138": "TIEOFF"
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    "INT_R_X25Y139": {
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                "words": 2
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            "TIEOFF_X27Y139": "TIEOFF"
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    "INT_R_X25Y140": {
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                "words": 2
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    "INT_R_X25Y141": {
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        "type": "INT_R"
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    "INT_R_X25Y142": {
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    "INT_R_X25Y143": {
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                "words": 2
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    "INT_R_X25Y144": {
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                "words": 2
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    "INT_R_X25Y145": {
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                "words": 2
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        "clock_region": "X0Y2",
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    "INT_R_X25Y146": {
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    "INT_R_X25Y147": {
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X25Y148": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X27Y148": "TIEOFF"
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    "INT_R_X25Y149": {
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        "type": "INT_R"
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    "INT_R_X25Y15": {
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                "baseaddr": "0x00420C80",
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            "TIEOFF_X27Y15": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y150": {
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        "pin_functions": {},
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            "TIEOFF_X27Y150": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y151": {
        "bits": {
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                "frames": 28,
                "offset": 2,
                "words": 2
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                "baseaddr": "0x00020C80",
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    "INT_R_X25Y191": {
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    "INT_R_X25Y193": {
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    "INT_R_X25Y194": {
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        "type": "INT_R"
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    "INT_R_X25Y195": {
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        "type": "INT_R"
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    "INT_R_X25Y196": {
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            "TIEOFF_X27Y196": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y197": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
                "frames": 28,
                "offset": 95,
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            "TIEOFF_X27Y197": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y198": {
        "bits": {
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                "baseaddr": "0x00020C80",
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            "TIEOFF_X27Y198": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y199": {
        "bits": {
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                "baseaddr": "0x00020C80",
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            "TIEOFF_X27Y199": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y2": {
        "bits": {
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                "baseaddr": "0x00420C80",
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            "TIEOFF_X27Y2": "TIEOFF"
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        "type": "INT_R"
    },
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            "CLB_IO_CLK": {
                "baseaddr": "0x00420C80",
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            "TIEOFF_X27Y20": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y21": {
        "bits": {
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            "TIEOFF_X27Y21": "TIEOFF"
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            "TIEOFF_X27Y22": "TIEOFF"
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            "TIEOFF_X27Y24": "TIEOFF"
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            "TIEOFF_X27Y25": "TIEOFF"
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            "TIEOFF_X27Y26": "TIEOFF"
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    "INT_R_X25Y52": {
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    "INT_R_X25Y57": {
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    "INT_R_X25Y58": {
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    "INT_R_X25Y59": {
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        "clock_region": "X0Y1",
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        "type": "INT_R"
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y60": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X27Y61": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
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            "TIEOFF_X27Y62": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00400C80",
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            "TIEOFF_X27Y63": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
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            "TIEOFF_X27Y64": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00400C80",
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            "TIEOFF_X27Y65": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00400C80",
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            "TIEOFF_X27Y66": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00400C80",
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            "TIEOFF_X27Y67": "TIEOFF"
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            "TIEOFF_X27Y68": "TIEOFF"
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            "TIEOFF_X27Y69": "TIEOFF"
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    "INT_R_X25Y75": {
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        "type": "INT_R"
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            "TIEOFF_X27Y91": "TIEOFF"
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    "INT_R_X25Y92": {
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            "TIEOFF_X27Y92": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y93": {
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        "clock_region": "X0Y1",
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    "INT_R_X25Y94": {
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        "clock_region": "X0Y1",
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            "TIEOFF_X27Y94": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y95": {
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            "TIEOFF_X27Y95": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y96": {
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            "TIEOFF_X27Y96": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y97": {
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                "baseaddr": "0x00400C80",
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X25Y98": {
        "bits": {
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                "words": 2
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        "clock_region": "X0Y1",
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            "TIEOFF_X27Y98": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y99": {
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                "offset": 99,
                "words": 2
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        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X27Y99": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00420D80",
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        "pin_functions": {},
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            "TIEOFF_X29Y0": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y1": {
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                "baseaddr": "0x00420D80",
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X29Y1": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y10": {
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                "baseaddr": "0x00420D80",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X29Y10": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y100": {
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                "baseaddr": "0x00000D80",
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X29Y100": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y101": {
        "bits": {
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                "baseaddr": "0x00000D80",
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X29Y101": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y102": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X29Y102": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y103": {
        "bits": {
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                "baseaddr": "0x00000D80",
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X29Y103": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y104": {
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    "INT_R_X27Y190": {
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    "INT_R_X27Y193": {
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        "type": "INT_R"
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    "INT_R_X27Y99": {
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        "type": "INT_R"
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    "INT_R_X29Y12": {
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        "type": "INT_R"
    },
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                "baseaddr": "0x00420E80",
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            "TIEOFF_X31Y17": "TIEOFF"
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    "INT_R_X29Y23": {
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    "INT_R_X29Y24": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X29Y28": {
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        "type": "INT_R"
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    "INT_R_X29Y29": {
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        "type": "INT_R"
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    "INT_R_X29Y30": {
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        "type": "INT_R"
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    "INT_R_X29Y31": {
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        "type": "INT_R"
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    "INT_R_X29Y32": {
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        "type": "INT_R"
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    "INT_R_X29Y33": {
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            "TIEOFF_X31Y33": "TIEOFF"
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        "type": "INT_R"
    },
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                "baseaddr": "0x00420E80",
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E80",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y79": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E80",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X31Y8": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E80",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X31Y80": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E80",
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                "words": 2
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        },
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            "TIEOFF_X31Y81": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E80",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X31Y82": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E80",
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                "words": 2
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        },
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            "TIEOFF_X31Y83": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y84": {
        "bits": {
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                "baseaddr": "0x00400E80",
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            "TIEOFF_X31Y84": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E80",
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            "TIEOFF_X31Y85": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E80",
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            "TIEOFF_X31Y86": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E80",
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        },
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            "TIEOFF_X31Y87": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y88": {
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                "baseaddr": "0x00400E80",
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        },
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            "TIEOFF_X31Y88": "TIEOFF"
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    "INT_R_X29Y89": {
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                "baseaddr": "0x00400E80",
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            "TIEOFF_X31Y89": "TIEOFF"
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            "CLB_IO_CLK": {
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            "TIEOFF_X31Y9": "TIEOFF"
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    "INT_R_X29Y90": {
        "bits": {
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                "baseaddr": "0x00400E80",
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        },
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            "TIEOFF_X31Y90": "TIEOFF"
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    "INT_R_X29Y91": {
        "bits": {
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            "TIEOFF_X31Y91": "TIEOFF"
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            "TIEOFF_X31Y92": "TIEOFF"
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    "INT_R_X29Y93": {
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            "TIEOFF_X31Y93": "TIEOFF"
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    "INT_R_X29Y94": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X29Y95": {
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            "TIEOFF_X31Y95": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y96": {
        "bits": {
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                "baseaddr": "0x00400E80",
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        "type": "INT_R"
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    "INT_R_X29Y97": {
        "bits": {
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            "TIEOFF_X31Y97": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y98": {
        "bits": {
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00420F80",
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            "TIEOFF_X33Y0": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X31Y101": {
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        "type": "INT_R"
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    "INT_R_X31Y102": {
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        },
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        "type": "INT_R"
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    "INT_R_X31Y104": {
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            "TIEOFF_X33Y104": "TIEOFF"
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    "INT_R_X31Y105": {
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                "words": 2
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        },
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            "TIEOFF_X33Y105": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y106": {
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                "baseaddr": "0x00000F80",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X33Y106": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X33Y107": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y108": {
        "bits": {
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                "baseaddr": "0x00000F80",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y108": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X33Y109": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X33Y11": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y110": {
        "bits": {
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                "baseaddr": "0x00000F80",
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                "offset": 20,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X33Y110": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X33Y111": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X33Y112": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
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                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y113": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y114": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y115": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y116": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y117": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y118": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
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                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 80,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y119": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
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                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 80,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y12": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 80,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y120": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y121": {
        "bits": {
            "CLB_IO_CLK": {
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    "INT_R_X31Y162": {
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    "INT_R_X31Y164": {
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00020F80",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X33Y167": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y168": {
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            "TIEOFF_X33Y168": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y169": {
        "bits": {
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            "TIEOFF_X33Y169": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00420F80",
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            "TIEOFF_X33Y17": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X33Y170": "TIEOFF"
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    "INT_R_X31Y171": {
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    "INT_R_X31Y195": {
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    "INT_R_X31Y196": {
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    "INT_R_X31Y197": {
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    "INT_R_X31Y198": {
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                "words": 2
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            "TIEOFF_X33Y198": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y199": {
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                "words": 2
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            "TIEOFF_X33Y199": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y2": {
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                "baseaddr": "0x00420F80",
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                "words": 2
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            "TIEOFF_X33Y2": "TIEOFF"
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    "INT_R_X31Y20": {
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        "type": "INT_R"
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    "INT_R_X31Y21": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X31Y22": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X31Y23": {
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                "baseaddr": "0x00420F80",
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X31Y24": {
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                "baseaddr": "0x00420F80",
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            "TIEOFF_X33Y24": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y25": {
        "bits": {
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                "baseaddr": "0x00420F80",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X33Y25": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y26": {
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                "baseaddr": "0x00420F80",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X33Y26": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X33Y27": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y28": {
        "bits": {
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                "baseaddr": "0x00420F80",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y28": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y29": {
        "bits": {
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                "baseaddr": "0x00420F80",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y29": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y3": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y30": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y30": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
                "frames": 28,
                "offset": 63,
                "words": 2
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            "TIEOFF_X33Y31": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
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            "TIEOFF_X33Y32": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
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            "TIEOFF_X33Y33": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
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            "TIEOFF_X33Y34": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00420F80",
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            "TIEOFF_X33Y35": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y36": {
        "bits": {
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                "baseaddr": "0x00420F80",
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    "INT_R_X31Y62": {
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    "INT_R_X31Y65": {
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    "INT_R_X31Y66": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X31Y67": {
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        "type": "INT_R"
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    "INT_R_X31Y68": {
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        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X31Y69": {
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            "TIEOFF_X33Y69": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y7": {
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        "clock_region": "X1Y0",
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            "TIEOFF_X33Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y71": {
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X31Y72": {
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X33Y72": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y73": {
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X33Y73": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y74": {
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X33Y74": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y75": {
        "bits": {
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y75": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
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            "TIEOFF_X33Y76": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
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                "words": 2
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        },
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            "TIEOFF_X33Y77": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
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        },
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            "TIEOFF_X33Y78": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y79": {
        "bits": {
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                "baseaddr": "0x00400F80",
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            "TIEOFF_X33Y79": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
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        },
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            "TIEOFF_X33Y8": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
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            "TIEOFF_X33Y80": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y81": {
        "bits": {
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                "baseaddr": "0x00400F80",
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            "TIEOFF_X33Y81": "TIEOFF"
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    "INT_R_X31Y82": {
        "bits": {
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    "INT_R_X31Y83": {
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            "TIEOFF_X33Y83": "TIEOFF"
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    "INT_R_X31Y84": {
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    "INT_R_X31Y85": {
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    "INT_R_X31Y87": {
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    "INT_R_X31Y88": {
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    "INT_R_X31Y89": {
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    "INT_R_X31Y91": {
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        "type": "INT_R"
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    "INT_R_X31Y93": {
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                "words": 2
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        "type": "INT_R"
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        "bits": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00421080",
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        "type": "INT_R"
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            "TIEOFF_X35Y1": "TIEOFF"
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                "words": 2
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        "type": "INT_R"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00001080",
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                "words": 2
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            "TIEOFF_X35Y101": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y102": {
        "bits": {
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                "offset": 4,
                "words": 2
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        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X35Y102": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y103": {
        "bits": {
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                "offset": 6,
                "words": 2
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        "clock_region": "X1Y2",
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            "TIEOFF_X35Y103": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
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                "offset": 8,
                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X35Y104": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
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                "offset": 10,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X35Y105": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y106": {
        "bits": {
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                "baseaddr": "0x00001080",
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                "offset": 12,
                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X35Y106": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y107": {
        "bits": {
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                "baseaddr": "0x00001080",
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X35Y107": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y108": {
        "bits": {
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                "baseaddr": "0x00001080",
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                "offset": 16,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y108": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y109": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y11": {
        "bits": {
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                "baseaddr": "0x00421080",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X35Y11": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y110": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
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                "words": 2
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        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y111": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y112": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y113": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y114": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y115": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y116": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y117": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y118": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X33Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 38,
                "words": 2
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        "bits": {
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        "type": "INT_R"
    },
    "INT_R_X33Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
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            "TIEOFF_X35Y75": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y77": {
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            "TIEOFF_X35Y77": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y78": {
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            "TIEOFF_X35Y78": "TIEOFF"
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                "baseaddr": "0x00401080",
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            "TIEOFF_X35Y79": "TIEOFF"
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                "baseaddr": "0x00421080",
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            "TIEOFF_X35Y8": "TIEOFF"
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    "INT_R_X35Y104": {
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    "INT_R_X35Y105": {
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    "INT_R_X35Y106": {
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    "INT_R_X35Y108": {
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    "INT_R_X35Y109": {
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    "INT_R_X35Y111": {
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    "INT_R_X35Y112": {
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        "type": "INT_R"
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    "INT_R_X35Y113": {
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        },
        "clock_region": "X1Y2",
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        "type": "INT_R"
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    "INT_R_X35Y114": {
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        "type": "INT_R"
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    "INT_R_X35Y115": {
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        "clock_region": "X1Y2",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X35Y116": {
        "bits": {
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X38Y116": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X35Y117": {
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X38Y117": "TIEOFF"
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    "INT_R_X35Y161": {
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    "INT_R_X35Y162": {
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        "type": "INT_R"
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        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X35Y72": {
        "bits": {
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X38Y77": "TIEOFF"
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    "INT_R_X37Y106": {
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    "INT_R_X37Y108": {
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    "INT_R_X37Y109": {
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        "type": "INT_R"
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    "INT_R_X37Y111": {
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    "INT_R_X37Y112": {
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        "type": "INT_R"
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    "INT_R_X37Y113": {
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        },
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        "type": "INT_R"
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    "INT_R_X37Y114": {
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        "type": "INT_R"
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    "INT_R_X37Y115": {
        "bits": {
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            "TIEOFF_X40Y115": "TIEOFF"
        },
        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
                "frames": 28,
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        },
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            "TIEOFF_X40Y116": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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    "INT_R_X37Y118": {
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            "TIEOFF_X40Y118": "TIEOFF"
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    "INT_R_X37Y119": {
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                "baseaddr": "0x00421280",
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        "type": "INT_R"
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    "INT_R_X37Y151": {
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        "type": "INT_R"
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    "INT_R_X37Y152": {
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        "type": "INT_R"
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    "INT_R_X37Y153": {
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    "INT_R_X37Y154": {
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    "INT_R_X37Y155": {
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    "INT_R_X37Y156": {
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        "type": "INT_R"
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    "INT_R_X37Y157": {
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    "INT_R_X37Y158": {
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        "clock_region": "X1Y3",
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        "type": "INT_R"
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    "INT_R_X37Y159": {
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            "TIEOFF_X40Y159": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y16": {
        "bits": {
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        "type": "INT_R"
    },
    "INT_R_X37Y160": {
        "bits": {
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
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            "TIEOFF_X40Y70": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
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                "words": 2
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        },
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            "TIEOFF_X40Y71": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
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        },
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            "TIEOFF_X40Y72": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
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                "words": 2
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        },
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            "TIEOFF_X40Y73": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
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        },
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            "TIEOFF_X40Y74": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
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        },
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            "TIEOFF_X40Y75": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y76": {
        "bits": {
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                "baseaddr": "0x00401280",
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        },
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            "TIEOFF_X40Y76": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y77": {
        "bits": {
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            "TIEOFF_X40Y77": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
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            "TIEOFF_X40Y78": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X37Y82": {
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        },
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    "INT_R_X37Y88": {
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    "INT_R_X37Y89": {
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    "INT_R_X37Y97": {
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    "INT_R_X37Y99": {
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        "type": "INT_R"
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    "INT_R_X39Y0": {
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            "TIEOFF_X42Y0": "TIEOFF"
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            "TIEOFF_X42Y1": "TIEOFF"
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    "INT_R_X39Y10": {
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        "clock_region": "X1Y0",
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    "INT_R_X39Y12": {
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        "clock_region": "X1Y0",
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    "INT_R_X39Y13": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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                "words": 2
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X39Y17": {
        "bits": {
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                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X42Y17": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y18": {
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                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X39Y19": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X39Y2": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00421380",
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X42Y2": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y20": {
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        "clock_region": "X1Y0",
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            "TIEOFF_X42Y20": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y21": {
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X39Y22": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X42Y22": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y23": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X42Y23": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y24": {
        "bits": {
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                "baseaddr": "0x00421380",
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00421380",
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        "pin_functions": {},
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            "TIEOFF_X42Y69": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X39Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421380",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 101,
        "grid_y": 200,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y7": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X39Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X42Y70": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X39Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
                "frames": 28,
                "offset": 42,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y71": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X39Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X42Y72": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X42Y73": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X42Y74": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X42Y75": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X42Y76": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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        },
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            "TIEOFF_X42Y77": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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        },
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            "TIEOFF_X42Y78": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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                "offset": 59,
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        },
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            "TIEOFF_X42Y79": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00421380",
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        },
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            "TIEOFF_X42Y8": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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                "words": 2
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        },
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            "TIEOFF_X42Y80": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00401380",
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        },
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            "TIEOFF_X42Y81": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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                "words": 2
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        },
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            "TIEOFF_X42Y82": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y83": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "words": 2
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        },
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            "TIEOFF_X42Y83": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y84": {
        "bits": {
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                "baseaddr": "0x00401380",
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        },
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            "TIEOFF_X42Y84": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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                "offset": 71,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X42Y85": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y86": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X42Y86": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y87": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "offset": 75,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X42Y87": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y88": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X42Y88": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y89": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "offset": 79,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X42Y89": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y9": {
        "bits": {
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        "pin_functions": {},
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            "TIEOFF_X42Y9": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y90": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "offset": 81,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X42Y90": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y91": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "offset": 83,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X42Y91": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y92": {
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                "baseaddr": "0x00401380",
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                "offset": 85,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X42Y92": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y93": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "offset": 87,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X42Y93": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y94": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X42Y94": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y95": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "offset": 91,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X42Y95": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y96": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "offset": 93,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X42Y96": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y97": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "offset": 95,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X42Y97": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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                "offset": 97,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y98": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y99": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y0": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 206,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y1": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y10": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 12,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y100": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 12,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y101": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
                "frames": 28,
                "offset": 4,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 12,
        "grid_y": 101,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y102": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
                "frames": 28,
                "offset": 6,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 12,
        "grid_y": 100,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y103": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
                "frames": 28,
                "offset": 8,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 12,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y104": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
                "frames": 28,
                "offset": 10,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 12,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y105": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
                "frames": 28,
                "offset": 12,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 12,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y106": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
                "frames": 28,
                "offset": 14,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 12,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y107": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 12,
        "grid_y": 95,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y108": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 12,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y109": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 12,
        "grid_y": 196,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y11": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 12,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y110": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 12,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y111": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y112": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X3Y112": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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            "TIEOFF_X3Y113": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
    },
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        "bits": {
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        "type": "INT_R"
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    "INT_R_X3Y116": {
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            "TIEOFF_X3Y116": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y118": {
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        "type": "INT_R"
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    "INT_R_X3Y145": {
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        "type": "INT_R"
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    "INT_R_X3Y146": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X3Y147": {
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                "words": 2
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        "bits": {
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        "type": "INT_R"
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    "INT_R_X3Y149": {
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                "words": 2
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X3Y151": {
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        "clock_region": "X0Y3",
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        "type": "INT_R"
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    "INT_R_X3Y152": {
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        "type": "INT_R"
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    "INT_R_X3Y153": {
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        },
        "clock_region": "X0Y3",
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        "type": "INT_R"
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    "INT_R_X3Y154": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X3Y155": {
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        },
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        "type": "INT_R"
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    "INT_R_X3Y156": {
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        },
        "clock_region": "X0Y3",
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        "sites": {
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        "type": "INT_R"
    },
    "INT_R_X3Y157": {
        "bits": {
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y157": "TIEOFF"
        },
        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 16,
                "words": 2
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        },
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            "TIEOFF_X3Y158": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y159": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X3Y159": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y16": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "words": 2
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        },
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            "TIEOFF_X3Y160": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y161": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "words": 2
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        },
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            "TIEOFF_X3Y161": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y162": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y162": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y163": {
        "bits": {
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                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y163": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y164": {
        "bits": {
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                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y164": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y165": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y166": {
        "bits": {
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                "baseaddr": "0x00020180",
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            "TIEOFF_X3Y166": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y167": {
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                "baseaddr": "0x00020180",
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            "TIEOFF_X3Y167": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00020180",
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    "INT_R_X3Y169": {
        "bits": {
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            "TIEOFF_X3Y169": "TIEOFF"
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    "INT_R_X3Y172": {
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    "INT_R_X3Y173": {
        "bits": {
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        "bits": {
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        "type": "INT_R"
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    "INT_R_X3Y177": {
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    "INT_R_X3Y181": {
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    "INT_R_X3Y182": {
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    "INT_R_X3Y183": {
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        "type": "INT_R"
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    "INT_R_X3Y184": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X3Y185": {
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                "words": 2
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        },
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            "TIEOFF_X3Y185": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y186": {
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        },
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            "TIEOFF_X3Y186": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y187": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X3Y187": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y188": {
        "bits": {
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                "baseaddr": "0x00020180",
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                "words": 2
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        },
        "clock_region": "X0Y3",
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        "sites": {
            "TIEOFF_X3Y188": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y189": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "words": 2
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
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            "TIEOFF_X3Y189": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y19": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X3Y19": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y190": {
        "bits": {
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                "baseaddr": "0x00020180",
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                "offset": 81,
                "words": 2
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        },
        "clock_region": "X0Y3",
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            "TIEOFF_X3Y190": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y191": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "offset": 83,
                "words": 2
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        },
        "clock_region": "X0Y3",
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            "TIEOFF_X3Y191": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y192": {
        "bits": {
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                "baseaddr": "0x00020180",
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                "offset": 85,
                "words": 2
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        },
        "clock_region": "X0Y3",
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            "TIEOFF_X3Y192": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y193": {
        "bits": {
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                "baseaddr": "0x00020180",
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                "offset": 87,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "sites": {
            "TIEOFF_X3Y193": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y194": {
        "bits": {
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                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 89,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
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            "TIEOFF_X3Y194": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y195": {
        "bits": {
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                "baseaddr": "0x00020180",
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                "words": 2
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y195": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y196": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y196": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y197": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y197": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y198": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y198": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y199": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "sites": {
            "TIEOFF_X3Y199": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y2": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y20": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y20": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y21": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 12,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y21": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
                "frames": 28,
                "offset": 44,
                "words": 2
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
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        "type": "INT_R"
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    "INT_R_X3Y67": {
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        "pin_functions": {},
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        "type": "INT_R"
    },
    "INT_R_X3Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 36,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y68": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y69": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X3Y7": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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                "offset": 40,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X3Y70": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y71": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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                "offset": 44,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X3Y72": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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        },
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            "TIEOFF_X3Y73": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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        },
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            "TIEOFF_X3Y74": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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        },
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            "TIEOFF_X3Y75": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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        },
        "clock_region": "X0Y1",
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            "TIEOFF_X3Y76": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y77": {
        "bits": {
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                "baseaddr": "0x00400180",
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        },
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            "TIEOFF_X3Y77": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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        },
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            "TIEOFF_X3Y78": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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        },
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            "TIEOFF_X3Y79": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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        },
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            "TIEOFF_X3Y8": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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        },
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            "TIEOFF_X3Y80": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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        },
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            "TIEOFF_X3Y81": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y82": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X3Y82": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y83": {
        "bits": {
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        },
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            "TIEOFF_X3Y83": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y84": {
        "bits": {
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        },
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            "TIEOFF_X3Y84": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y85": {
        "bits": {
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                "baseaddr": "0x00400180",
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        },
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            "TIEOFF_X3Y85": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y86": {
        "bits": {
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        },
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            "TIEOFF_X3Y86": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y87": {
        "bits": {
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        },
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            "TIEOFF_X3Y87": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y88": {
        "bits": {
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        },
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            "TIEOFF_X3Y88": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y89": {
        "bits": {
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        },
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            "TIEOFF_X3Y89": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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    "INT_R_X3Y90": {
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        },
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            "TIEOFF_X3Y90": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y91": {
        "bits": {
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        },
        "clock_region": "X0Y1",
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            "TIEOFF_X3Y91": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y92": {
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        "clock_region": "X0Y1",
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            "TIEOFF_X3Y92": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y93": {
        "bits": {
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                "baseaddr": "0x00400180",
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        },
        "clock_region": "X0Y1",
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            "TIEOFF_X3Y93": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y94": {
        "bits": {
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        },
        "clock_region": "X0Y1",
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            "TIEOFF_X3Y94": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y95": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X3Y95": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y96": {
        "bits": {
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                "baseaddr": "0x00400180",
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y96": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y97": {
        "bits": {
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                "baseaddr": "0x00400180",
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                "offset": 95,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y97": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y98": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y99": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y0": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
                "frames": 28,
                "offset": 2,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y1": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X41Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y10": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y11": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X41Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y12": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X41Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y13": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X41Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y14": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X41Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y15": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X41Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 105,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y16": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X41Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
                "frames": 28,
                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 105,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y17": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X41Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
                "frames": 28,
                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 105,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y18": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X41Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y19": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X41Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
                "frames": 28,
                "offset": 4,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 105,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y2": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X41Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 105,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y20": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X41Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
                "frames": 28,
                "offset": 42,
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            "TIEOFF_X44Y66": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X41Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401480",
                "frames": 28,
                "offset": 34,
                "words": 2
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        },
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            "TIEOFF_X44Y67": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401480",
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X41Y69": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X44Y69": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X41Y7": {
        "bits": {
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            "TIEOFF_X44Y7": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X44Y70": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X44Y71": "TIEOFF"
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    "INT_R_X41Y75": {
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    "INT_R_X41Y97": {
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    "INT_R_X41Y98": {
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    "INT_R_X41Y99": {
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            "TIEOFF_X44Y99": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X46Y1": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X43Y10": {
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        "type": "INT_R"
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    "INT_R_X43Y12": {
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        "type": "INT_R"
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    "INT_R_X43Y13": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X43Y15": {
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        "type": "INT_R"
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    "INT_R_X43Y16": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X43Y17": {
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X43Y18": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X43Y19": {
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            "TIEOFF_X46Y19": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X43Y2": {
        "bits": {
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X46Y2": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X43Y20": {
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        "bits": {
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                "baseaddr": "0x00401580",
                "frames": 28,
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            "TIEOFF_X46Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X43Y97": {
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    "INT_R_X43Y98": {
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    "INT_R_X43Y99": {
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            "TIEOFF_X46Y99": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X5Y0": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X5Y101": {
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        "clock_region": "X0Y2",
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    "INT_R_X5Y102": {
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        "type": "INT_R"
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    "INT_R_X5Y103": {
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        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X5Y104": {
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        "type": "INT_R"
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    "INT_R_X5Y105": {
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        "type": "INT_R"
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    "INT_R_X5Y106": {
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        "type": "INT_R"
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    "INT_R_X5Y107": {
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        },
        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X5Y108": {
        "bits": {
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        },
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        "sites": {
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        "type": "INT_R"
    },
    "INT_R_X5Y109": {
        "bits": {
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                "frames": 28,
                "offset": 18,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y109": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y11": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y110": {
        "bits": {
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                "baseaddr": "0x00000280",
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                "offset": 20,
                "words": 2
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        },
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            "TIEOFF_X5Y110": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y111": {
        "bits": {
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y111": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y112": {
        "bits": {
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                "baseaddr": "0x00000280",
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            "TIEOFF_X5Y112": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y113": {
        "bits": {
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        },
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            "TIEOFF_X5Y113": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y114": {
        "bits": {
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            "TIEOFF_X5Y114": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y115": {
        "bits": {
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            "TIEOFF_X5Y115": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X5Y116": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
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    "INT_R_X5Y118": {
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        },
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        "type": "INT_R"
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        "bits": {
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    "INT_R_X5Y121": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X5Y129": {
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    "INT_R_X5Y132": {
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    "INT_R_X5Y134": {
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        "type": "INT_R"
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    "INT_R_X5Y135": {
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    "INT_R_X5Y137": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X5Y139": {
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                "words": 2
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        },
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            "TIEOFF_X5Y139": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y14": {
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X5Y140": {
        "bits": {
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                "words": 2
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        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X5Y141": {
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                "words": 2
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            "TIEOFF_X5Y141": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y142": {
        "bits": {
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                "words": 2
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        "clock_region": "X0Y2",
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            "TIEOFF_X5Y142": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y143": {
        "bits": {
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        },
        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X5Y144": {
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                "words": 2
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        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X5Y145": {
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                "words": 2
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        "clock_region": "X0Y2",
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        "sites": {
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        "type": "INT_R"
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    "INT_R_X5Y146": {
        "bits": {
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                "words": 2
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        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X5Y147": {
        "bits": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X5Y148": {
        "bits": {
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                "offset": 97,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X5Y148": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y149": {
        "bits": {
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                "words": 2
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        "clock_region": "X0Y2",
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        "type": "INT_R"
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        "bits": {
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X5Y150": {
        "bits": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y150": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y151": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y3",
        "grid_x": 16,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y151": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y152": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y152": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y153": {
        "bits": {
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y153": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y154": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
                "frames": 28,
                "offset": 8,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y154": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X5Y155": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y156": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X5Y156": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y157": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
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        },
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            "TIEOFF_X5Y157": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y158": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
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        },
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            "TIEOFF_X5Y158": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y159": {
        "bits": {
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                "baseaddr": "0x00020280",
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        },
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            "TIEOFF_X5Y159": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00420280",
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        },
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            "TIEOFF_X5Y16": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
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        },
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            "TIEOFF_X5Y160": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X5Y161": "TIEOFF"
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                "baseaddr": "0x00020280",
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            "TIEOFF_X5Y162": "TIEOFF"
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                "baseaddr": "0x00020280",
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    "INT_R_X5Y182": {
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    "INT_R_X5Y183": {
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        "type": "INT_R"
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    "INT_R_X5Y184": {
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        },
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        "type": "INT_R"
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    "INT_R_X5Y185": {
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                "words": 2
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            "TIEOFF_X5Y185": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y186": {
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                "words": 2
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        },
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            "TIEOFF_X5Y186": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y187": {
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                "words": 2
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        },
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            "TIEOFF_X5Y187": "TIEOFF"
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    "INT_R_X5Y188": {
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        },
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            "TIEOFF_X5Y188": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y189": {
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        },
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        "type": "INT_R"
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    "INT_R_X5Y19": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X5Y190": {
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                "words": 2
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        "clock_region": "X0Y3",
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        "type": "INT_R"
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    "INT_R_X5Y191": {
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        "type": "INT_R"
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    "INT_R_X5Y192": {
        "bits": {
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                "offset": 85,
                "words": 2
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        "clock_region": "X0Y3",
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        "type": "INT_R"
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    "INT_R_X5Y193": {
        "bits": {
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                "words": 2
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        "clock_region": "X0Y3",
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            "TIEOFF_X5Y193": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y194": {
        "bits": {
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                "baseaddr": "0x00020280",
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                "offset": 89,
                "words": 2
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        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y194": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y195": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y195": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y196": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y196": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y197": {
        "bits": {
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                "baseaddr": "0x00020280",
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                "offset": 95,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y197": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y198": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
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                "offset": 97,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y198": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y199": {
        "bits": {
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                "baseaddr": "0x00020280",
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        },
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        "sites": {
            "TIEOFF_X5Y199": "TIEOFF"
        },
        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
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                "words": 2
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        },
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            "TIEOFF_X5Y2": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00420280",
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                "words": 2
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        },
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            "TIEOFF_X5Y20": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y21": {
        "bits": {
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                "baseaddr": "0x00420280",
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                "words": 2
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        },
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            "TIEOFF_X5Y21": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y22": {
        "bits": {
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                "baseaddr": "0x00420280",
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        },
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            "TIEOFF_X5Y22": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y23": {
        "bits": {
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                "baseaddr": "0x00420280",
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        },
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            "TIEOFF_X5Y23": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y24": {
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        "type": "INT_R"
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            "TIEOFF_X5Y25": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X5Y51": {
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    "INT_R_X5Y52": {
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    "INT_R_X5Y54": {
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    "INT_R_X5Y57": {
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    "INT_R_X5Y58": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X5Y61": {
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        },
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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        "clock_region": "X0Y1",
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                "baseaddr": "0x00400280",
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    "INT_R_X7Y103": {
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    "INT_R_X7Y107": {
        "bits": {
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                "baseaddr": "0x00020380",
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        "sites": {
            "IOB_X0Y150": "IOB33"
        },
        "type": "LIOB33_SING"
    },
    "LIOB33_SING_X0Y199": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "LIOB33"
                },
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 1,
        "pin_functions": {
            "IOB_X0Y199": "IO_0_16"
        },
        "sites": {
            "IOB_X0Y199": "IOB33"
        },
        "type": "LIOB33_SING"
    },
    "LIOB33_SING_X0Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "LIOB33"
                },
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 157,
        "pin_functions": {
            "IOB_X0Y49": "IO_0_13"
        },
        "sites": {
            "IOB_X0Y49": "IOB33"
        },
        "type": "LIOB33_SING"
    },
    "LIOB33_SING_X0Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y0"
                    },
                    "start_offset": 2,
                    "type": "LIOB33"
                },
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 155,
        "pin_functions": {
            "IOB_X0Y50": "IO_25_14"
        },
        "sites": {
            "IOB_X0Y50": "IOB33"
        },
        "type": "LIOB33_SING"
    },
    "LIOB33_SING_X0Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "LIOB33"
                },
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 105,
        "pin_functions": {
            "IOB_X0Y99": "IO_0_14"
        },
        "sites": {
            "IOB_X0Y99": "IOB33"
        },
        "type": "LIOB33_SING"
    },
    "LIOB33_X0Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 206,
        "pin_functions": {
            "IOB_X0Y1": "IO_L24N_T3_13",
            "IOB_X0Y2": "IO_L24P_T3_13"
        },
        "sites": {
            "IOB_X0Y1": "IOB33S",
            "IOB_X0Y2": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 102,
        "pin_functions": {
            "IOB_X0Y101": "IO_L24N_T3_RS0_15",
            "IOB_X0Y102": "IO_L24P_T3_RS1_15"
        },
        "sites": {
            "IOB_X0Y101": "IOB33S",
            "IOB_X0Y102": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 100,
        "pin_functions": {
            "IOB_X0Y103": "IO_L23N_T3_FWE_B_15",
            "IOB_X0Y104": "IO_L23P_T3_FOE_B_15"
        },
        "sites": {
            "IOB_X0Y103": "IOB33S",
            "IOB_X0Y104": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 98,
        "pin_functions": {
            "IOB_X0Y105": "IO_L22N_T3_A16_15",
            "IOB_X0Y106": "IO_L22P_T3_A17_15"
        },
        "sites": {
            "IOB_X0Y105": "IOB33S",
            "IOB_X0Y106": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 96,
        "pin_functions": {
            "IOB_X0Y107": "IO_L21N_T3_DQS_A18_15",
            "IOB_X0Y108": "IO_L21P_T3_DQS_15"
        },
        "sites": {
            "IOB_X0Y107": "IOB33S",
            "IOB_X0Y108": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 94,
        "pin_functions": {
            "IOB_X0Y109": "IO_L20N_T3_A19_15",
            "IOB_X0Y110": "IO_L20P_T3_A20_15"
        },
        "sites": {
            "IOB_X0Y109": "IOB33S",
            "IOB_X0Y110": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 196,
        "pin_functions": {
            "IOB_X0Y11": "IO_L19N_T3_VREF_13",
            "IOB_X0Y12": "IO_L19P_T3_13"
        },
        "sites": {
            "IOB_X0Y11": "IOB33S",
            "IOB_X0Y12": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 92,
        "pin_functions": {
            "IOB_X0Y111": "IO_L19N_T3_A21_VREF_15",
            "IOB_X0Y112": "IO_L19P_T3_A22_15"
        },
        "sites": {
            "IOB_X0Y111": "IOB33S",
            "IOB_X0Y112": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 90,
        "pin_functions": {
            "IOB_X0Y113": "IO_L18N_T2_A23_15",
            "IOB_X0Y114": "IO_L18P_T2_A24_15"
        },
        "sites": {
            "IOB_X0Y113": "IOB33S",
            "IOB_X0Y114": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 88,
        "pin_functions": {
            "IOB_X0Y115": "IO_L17N_T2_A25_15",
            "IOB_X0Y116": "IO_L17P_T2_A26_15"
        },
        "sites": {
            "IOB_X0Y115": "IOB33S",
            "IOB_X0Y116": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 86,
        "pin_functions": {
            "IOB_X0Y117": "IO_L16N_T2_A27_15",
            "IOB_X0Y118": "IO_L16P_T2_A28_15"
        },
        "sites": {
            "IOB_X0Y117": "IOB33S",
            "IOB_X0Y118": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 84,
        "pin_functions": {
            "IOB_X0Y119": "IO_L15N_T2_DQS_ADV_B_15",
            "IOB_X0Y120": "IO_L15P_T2_DQS_15"
        },
        "sites": {
            "IOB_X0Y119": "IOB33S",
            "IOB_X0Y120": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 82,
        "pin_functions": {
            "IOB_X0Y121": "IO_L14N_T2_SRCC_15",
            "IOB_X0Y122": "IO_L14P_T2_SRCC_15"
        },
        "sites": {
            "IOB_X0Y121": "IOB33S",
            "IOB_X0Y122": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 80,
        "pin_functions": {
            "IOB_X0Y123": "IO_L13N_T2_MRCC_15",
            "IOB_X0Y124": "IO_L13P_T2_MRCC_15"
        },
        "sites": {
            "IOB_X0Y123": "IOB33S",
            "IOB_X0Y124": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 77,
        "pin_functions": {
            "IOB_X0Y125": "IO_L12N_T1_MRCC_AD5N_15",
            "IOB_X0Y126": "IO_L12P_T1_MRCC_AD5P_15"
        },
        "sites": {
            "IOB_X0Y125": "IOB33S",
            "IOB_X0Y126": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 75,
        "pin_functions": {
            "IOB_X0Y127": "IO_L11N_T1_SRCC_AD12N_15",
            "IOB_X0Y128": "IO_L11P_T1_SRCC_AD12P_15"
        },
        "sites": {
            "IOB_X0Y127": "IOB33S",
            "IOB_X0Y128": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 73,
        "pin_functions": {
            "IOB_X0Y129": "IO_L10N_T1_AD4N_15",
            "IOB_X0Y130": "IO_L10P_T1_AD4P_15"
        },
        "sites": {
            "IOB_X0Y129": "IOB33S",
            "IOB_X0Y130": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 194,
        "pin_functions": {
            "IOB_X0Y13": "IO_L18N_T2_13",
            "IOB_X0Y14": "IO_L18P_T2_13"
        },
        "sites": {
            "IOB_X0Y13": "IOB33S",
            "IOB_X0Y14": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 71,
        "pin_functions": {
            "IOB_X0Y131": "IO_L9N_T1_DQS_AD11N_15",
            "IOB_X0Y132": "IO_L9P_T1_DQS_AD11P_15"
        },
        "sites": {
            "IOB_X0Y131": "IOB33S",
            "IOB_X0Y132": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 69,
        "pin_functions": {
            "IOB_X0Y133": "IO_L8N_T1_AD3N_15",
            "IOB_X0Y134": "IO_L8P_T1_AD3P_15"
        },
        "sites": {
            "IOB_X0Y133": "IOB33S",
            "IOB_X0Y134": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 67,
        "pin_functions": {
            "IOB_X0Y135": "IO_L7N_T1_AD10N_15",
            "IOB_X0Y136": "IO_L7P_T1_AD10P_15"
        },
        "sites": {
            "IOB_X0Y135": "IOB33S",
            "IOB_X0Y136": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 65,
        "pin_functions": {
            "IOB_X0Y137": "IO_L6N_T0_VREF_15",
            "IOB_X0Y138": "IO_L6P_T0_15"
        },
        "sites": {
            "IOB_X0Y137": "IOB33S",
            "IOB_X0Y138": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 63,
        "pin_functions": {
            "IOB_X0Y139": "IO_L5N_T0_AD2N_15",
            "IOB_X0Y140": "IO_L5P_T0_AD2P_15"
        },
        "sites": {
            "IOB_X0Y139": "IOB33S",
            "IOB_X0Y140": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 61,
        "pin_functions": {
            "IOB_X0Y141": "IO_L4N_T0_AD9N_15",
            "IOB_X0Y142": "IO_L4P_T0_AD9P_15"
        },
        "sites": {
            "IOB_X0Y141": "IOB33S",
            "IOB_X0Y142": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 59,
        "pin_functions": {
            "IOB_X0Y143": "IO_L3N_T0_DQS_AD1N_15",
            "IOB_X0Y144": "IO_L3P_T0_DQS_AD1P_15"
        },
        "sites": {
            "IOB_X0Y143": "IOB33S",
            "IOB_X0Y144": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 57,
        "pin_functions": {
            "IOB_X0Y145": "IO_L2N_T0_AD8N_15",
            "IOB_X0Y146": "IO_L2P_T0_AD8P_15"
        },
        "sites": {
            "IOB_X0Y145": "IOB33S",
            "IOB_X0Y146": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 55,
        "pin_functions": {
            "IOB_X0Y147": "IO_L1N_T0_AD0N_15",
            "IOB_X0Y148": "IO_L1P_T0_AD0P_15"
        },
        "sites": {
            "IOB_X0Y147": "IOB33S",
            "IOB_X0Y148": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 192,
        "pin_functions": {
            "IOB_X0Y15": "IO_L17N_T2_13",
            "IOB_X0Y16": "IO_L17P_T2_13"
        },
        "sites": {
            "IOB_X0Y15": "IOB33S",
            "IOB_X0Y16": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y151": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 50,
        "pin_functions": {
            "IOB_X0Y151": "IO_L24N_T3_16",
            "IOB_X0Y152": "IO_L24P_T3_16"
        },
        "sites": {
            "IOB_X0Y151": "IOB33S",
            "IOB_X0Y152": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y153": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 48,
        "pin_functions": {
            "IOB_X0Y153": "IO_L23N_T3_16",
            "IOB_X0Y154": "IO_L23P_T3_16"
        },
        "sites": {
            "IOB_X0Y153": "IOB33S",
            "IOB_X0Y154": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 46,
        "pin_functions": {
            "IOB_X0Y155": "IO_L22N_T3_16",
            "IOB_X0Y156": "IO_L22P_T3_16"
        },
        "sites": {
            "IOB_X0Y155": "IOB33S",
            "IOB_X0Y156": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y157": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 44,
        "pin_functions": {
            "IOB_X0Y157": "IO_L21N_T3_DQS_16",
            "IOB_X0Y158": "IO_L21P_T3_DQS_16"
        },
        "sites": {
            "IOB_X0Y157": "IOB33S",
            "IOB_X0Y158": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y159": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 42,
        "pin_functions": {
            "IOB_X0Y159": "IO_L20N_T3_16",
            "IOB_X0Y160": "IO_L20P_T3_16"
        },
        "sites": {
            "IOB_X0Y159": "IOB33S",
            "IOB_X0Y160": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y161": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 40,
        "pin_functions": {
            "IOB_X0Y161": "IO_L19N_T3_VREF_16",
            "IOB_X0Y162": "IO_L19P_T3_16"
        },
        "sites": {
            "IOB_X0Y161": "IOB33S",
            "IOB_X0Y162": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y163": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 38,
        "pin_functions": {
            "IOB_X0Y163": "IO_L18N_T2_16",
            "IOB_X0Y164": "IO_L18P_T2_16"
        },
        "sites": {
            "IOB_X0Y163": "IOB33S",
            "IOB_X0Y164": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 36,
        "pin_functions": {
            "IOB_X0Y165": "IO_L17N_T2_16",
            "IOB_X0Y166": "IO_L17P_T2_16"
        },
        "sites": {
            "IOB_X0Y165": "IOB33S",
            "IOB_X0Y166": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y167": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 34,
        "pin_functions": {
            "IOB_X0Y167": "IO_L16N_T2_16",
            "IOB_X0Y168": "IO_L16P_T2_16"
        },
        "sites": {
            "IOB_X0Y167": "IOB33S",
            "IOB_X0Y168": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y169": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 32,
        "pin_functions": {
            "IOB_X0Y169": "IO_L15N_T2_DQS_16",
            "IOB_X0Y170": "IO_L15P_T2_DQS_16"
        },
        "sites": {
            "IOB_X0Y169": "IOB33S",
            "IOB_X0Y170": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 190,
        "pin_functions": {
            "IOB_X0Y17": "IO_L16N_T2_13",
            "IOB_X0Y18": "IO_L16P_T2_13"
        },
        "sites": {
            "IOB_X0Y17": "IOB33S",
            "IOB_X0Y18": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y171": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 30,
        "pin_functions": {
            "IOB_X0Y171": "IO_L14N_T2_SRCC_16",
            "IOB_X0Y172": "IO_L14P_T2_SRCC_16"
        },
        "sites": {
            "IOB_X0Y171": "IOB33S",
            "IOB_X0Y172": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y173": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 28,
        "pin_functions": {
            "IOB_X0Y173": "IO_L13N_T2_MRCC_16",
            "IOB_X0Y174": "IO_L13P_T2_MRCC_16"
        },
        "sites": {
            "IOB_X0Y173": "IOB33S",
            "IOB_X0Y174": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 25,
        "pin_functions": {
            "IOB_X0Y175": "IO_L12N_T1_MRCC_16",
            "IOB_X0Y176": "IO_L12P_T1_MRCC_16"
        },
        "sites": {
            "IOB_X0Y175": "IOB33S",
            "IOB_X0Y176": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y177": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 23,
        "pin_functions": {
            "IOB_X0Y177": "IO_L11N_T1_SRCC_16",
            "IOB_X0Y178": "IO_L11P_T1_SRCC_16"
        },
        "sites": {
            "IOB_X0Y177": "IOB33S",
            "IOB_X0Y178": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y179": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 21,
        "pin_functions": {
            "IOB_X0Y179": "IO_L10N_T1_16",
            "IOB_X0Y180": "IO_L10P_T1_16"
        },
        "sites": {
            "IOB_X0Y179": "IOB33S",
            "IOB_X0Y180": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y181": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 19,
        "pin_functions": {
            "IOB_X0Y181": "IO_L9N_T1_DQS_16",
            "IOB_X0Y182": "IO_L9P_T1_DQS_16"
        },
        "sites": {
            "IOB_X0Y181": "IOB33S",
            "IOB_X0Y182": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y183": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 17,
        "pin_functions": {
            "IOB_X0Y183": "IO_L8N_T1_16",
            "IOB_X0Y184": "IO_L8P_T1_16"
        },
        "sites": {
            "IOB_X0Y183": "IOB33S",
            "IOB_X0Y184": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 15,
        "pin_functions": {
            "IOB_X0Y185": "IO_L7N_T1_16",
            "IOB_X0Y186": "IO_L7P_T1_16"
        },
        "sites": {
            "IOB_X0Y185": "IOB33S",
            "IOB_X0Y186": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y187": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 13,
        "pin_functions": {
            "IOB_X0Y187": "IO_L6N_T0_VREF_16",
            "IOB_X0Y188": "IO_L6P_T0_16"
        },
        "sites": {
            "IOB_X0Y187": "IOB33S",
            "IOB_X0Y188": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y189": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 11,
        "pin_functions": {
            "IOB_X0Y189": "IO_L5N_T0_16",
            "IOB_X0Y190": "IO_L5P_T0_16"
        },
        "sites": {
            "IOB_X0Y189": "IOB33S",
            "IOB_X0Y190": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 188,
        "pin_functions": {
            "IOB_X0Y19": "IO_L15N_T2_DQS_13",
            "IOB_X0Y20": "IO_L15P_T2_DQS_13"
        },
        "sites": {
            "IOB_X0Y19": "IOB33S",
            "IOB_X0Y20": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y191": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 9,
        "pin_functions": {
            "IOB_X0Y191": "IO_L4N_T0_16",
            "IOB_X0Y192": "IO_L4P_T0_16"
        },
        "sites": {
            "IOB_X0Y191": "IOB33S",
            "IOB_X0Y192": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y193": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 7,
        "pin_functions": {
            "IOB_X0Y193": "IO_L3N_T0_DQS_16",
            "IOB_X0Y194": "IO_L3P_T0_DQS_16"
        },
        "sites": {
            "IOB_X0Y193": "IOB33S",
            "IOB_X0Y194": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 5,
        "pin_functions": {
            "IOB_X0Y195": "IO_L2N_T0_16",
            "IOB_X0Y196": "IO_L2P_T0_16"
        },
        "sites": {
            "IOB_X0Y195": "IOB33S",
            "IOB_X0Y196": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y197": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 3,
        "pin_functions": {
            "IOB_X0Y197": "IO_L1N_T0_16",
            "IOB_X0Y198": "IO_L1P_T0_16"
        },
        "sites": {
            "IOB_X0Y197": "IOB33S",
            "IOB_X0Y198": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 186,
        "pin_functions": {
            "IOB_X0Y21": "IO_L14N_T2_SRCC_13",
            "IOB_X0Y22": "IO_L14P_T2_SRCC_13"
        },
        "sites": {
            "IOB_X0Y21": "IOB33S",
            "IOB_X0Y22": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 184,
        "pin_functions": {
            "IOB_X0Y23": "IO_L13N_T2_MRCC_13",
            "IOB_X0Y24": "IO_L13P_T2_MRCC_13"
        },
        "sites": {
            "IOB_X0Y23": "IOB33S",
            "IOB_X0Y24": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 181,
        "pin_functions": {
            "IOB_X0Y25": "IO_L12N_T1_MRCC_13",
            "IOB_X0Y26": "IO_L12P_T1_MRCC_13"
        },
        "sites": {
            "IOB_X0Y25": "IOB33S",
            "IOB_X0Y26": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 179,
        "pin_functions": {
            "IOB_X0Y27": "IO_L11N_T1_SRCC_13",
            "IOB_X0Y28": "IO_L11P_T1_SRCC_13"
        },
        "sites": {
            "IOB_X0Y27": "IOB33S",
            "IOB_X0Y28": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 177,
        "pin_functions": {
            "IOB_X0Y29": "IO_L10N_T1_13",
            "IOB_X0Y30": "IO_L10P_T1_13"
        },
        "sites": {
            "IOB_X0Y29": "IOB33S",
            "IOB_X0Y30": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 204,
        "pin_functions": {
            "IOB_X0Y3": "IO_L23N_T3_13",
            "IOB_X0Y4": "IO_L23P_T3_13"
        },
        "sites": {
            "IOB_X0Y3": "IOB33S",
            "IOB_X0Y4": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 175,
        "pin_functions": {
            "IOB_X0Y31": "IO_L9N_T1_DQS_13",
            "IOB_X0Y32": "IO_L9P_T1_DQS_13"
        },
        "sites": {
            "IOB_X0Y31": "IOB33S",
            "IOB_X0Y32": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 173,
        "pin_functions": {
            "IOB_X0Y33": "IO_L8N_T1_13",
            "IOB_X0Y34": "IO_L8P_T1_13"
        },
        "sites": {
            "IOB_X0Y33": "IOB33S",
            "IOB_X0Y34": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 171,
        "pin_functions": {
            "IOB_X0Y35": "IO_L7N_T1_13",
            "IOB_X0Y36": "IO_L7P_T1_13"
        },
        "sites": {
            "IOB_X0Y35": "IOB33S",
            "IOB_X0Y36": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 169,
        "pin_functions": {
            "IOB_X0Y37": "IO_L6N_T0_VREF_13",
            "IOB_X0Y38": "IO_L6P_T0_13"
        },
        "sites": {
            "IOB_X0Y37": "IOB33S",
            "IOB_X0Y38": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 167,
        "pin_functions": {
            "IOB_X0Y39": "IO_L5N_T0_13",
            "IOB_X0Y40": "IO_L5P_T0_13"
        },
        "sites": {
            "IOB_X0Y39": "IOB33S",
            "IOB_X0Y40": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 165,
        "pin_functions": {
            "IOB_X0Y41": "IO_L4N_T0_13",
            "IOB_X0Y42": "IO_L4P_T0_13"
        },
        "sites": {
            "IOB_X0Y41": "IOB33S",
            "IOB_X0Y42": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 163,
        "pin_functions": {
            "IOB_X0Y43": "IO_L3N_T0_DQS_13",
            "IOB_X0Y44": "IO_L3P_T0_DQS_13"
        },
        "sites": {
            "IOB_X0Y43": "IOB33S",
            "IOB_X0Y44": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 161,
        "pin_functions": {
            "IOB_X0Y45": "IO_L2N_T0_13",
            "IOB_X0Y46": "IO_L2P_T0_13"
        },
        "sites": {
            "IOB_X0Y45": "IOB33S",
            "IOB_X0Y46": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 159,
        "pin_functions": {
            "IOB_X0Y47": "IO_L1N_T0_13",
            "IOB_X0Y48": "IO_L1P_T0_13"
        },
        "sites": {
            "IOB_X0Y47": "IOB33S",
            "IOB_X0Y48": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 202,
        "pin_functions": {
            "IOB_X0Y5": "IO_L22N_T3_13",
            "IOB_X0Y6": "IO_L22P_T3_13"
        },
        "sites": {
            "IOB_X0Y5": "IOB33S",
            "IOB_X0Y6": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 154,
        "pin_functions": {
            "IOB_X0Y51": "IO_L24N_T3_A00_D16_14",
            "IOB_X0Y52": "IO_L24P_T3_A01_D17_14"
        },
        "sites": {
            "IOB_X0Y51": "IOB33S",
            "IOB_X0Y52": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 152,
        "pin_functions": {
            "IOB_X0Y53": "IO_L23N_T3_A02_D18_14",
            "IOB_X0Y54": "IO_L23P_T3_A03_D19_14"
        },
        "sites": {
            "IOB_X0Y53": "IOB33S",
            "IOB_X0Y54": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 150,
        "pin_functions": {
            "IOB_X0Y55": "IO_L22N_T3_A04_D20_14",
            "IOB_X0Y56": "IO_L22P_T3_A05_D21_14"
        },
        "sites": {
            "IOB_X0Y55": "IOB33S",
            "IOB_X0Y56": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 148,
        "pin_functions": {
            "IOB_X0Y57": "IO_L21N_T3_DQS_A06_D22_14",
            "IOB_X0Y58": "IO_L21P_T3_DQS_14"
        },
        "sites": {
            "IOB_X0Y57": "IOB33S",
            "IOB_X0Y58": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 146,
        "pin_functions": {
            "IOB_X0Y59": "IO_L20N_T3_A07_D23_14",
            "IOB_X0Y60": "IO_L20P_T3_A08_D24_14"
        },
        "sites": {
            "IOB_X0Y59": "IOB33S",
            "IOB_X0Y60": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 144,
        "pin_functions": {
            "IOB_X0Y61": "IO_L19N_T3_A09_D25_VREF_14",
            "IOB_X0Y62": "IO_L19P_T3_A10_D26_14"
        },
        "sites": {
            "IOB_X0Y61": "IOB33S",
            "IOB_X0Y62": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 142,
        "pin_functions": {
            "IOB_X0Y63": "IO_L18N_T2_A11_D27_14",
            "IOB_X0Y64": "IO_L18P_T2_A12_D28_14"
        },
        "sites": {
            "IOB_X0Y63": "IOB33S",
            "IOB_X0Y64": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 140,
        "pin_functions": {
            "IOB_X0Y65": "IO_L17N_T2_A13_D29_14",
            "IOB_X0Y66": "IO_L17P_T2_A14_D30_14"
        },
        "sites": {
            "IOB_X0Y65": "IOB33S",
            "IOB_X0Y66": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 138,
        "pin_functions": {
            "IOB_X0Y67": "IO_L16N_T2_A15_D31_14",
            "IOB_X0Y68": "IO_L16P_T2_CSI_B_14"
        },
        "sites": {
            "IOB_X0Y67": "IOB33S",
            "IOB_X0Y68": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 136,
        "pin_functions": {
            "IOB_X0Y69": "IO_L15N_T2_DQS_DOUT_CSO_B_14",
            "IOB_X0Y70": "IO_L15P_T2_DQS_RDWR_B_14"
        },
        "sites": {
            "IOB_X0Y69": "IOB33S",
            "IOB_X0Y70": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 200,
        "pin_functions": {
            "IOB_X0Y7": "IO_L21N_T3_DQS_13",
            "IOB_X0Y8": "IO_L21P_T3_DQS_13"
        },
        "sites": {
            "IOB_X0Y7": "IOB33S",
            "IOB_X0Y8": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 134,
        "pin_functions": {
            "IOB_X0Y71": "IO_L14N_T2_SRCC_14",
            "IOB_X0Y72": "IO_L14P_T2_SRCC_14"
        },
        "sites": {
            "IOB_X0Y71": "IOB33S",
            "IOB_X0Y72": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 132,
        "pin_functions": {
            "IOB_X0Y73": "IO_L13N_T2_MRCC_14",
            "IOB_X0Y74": "IO_L13P_T2_MRCC_14"
        },
        "sites": {
            "IOB_X0Y73": "IOB33S",
            "IOB_X0Y74": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 129,
        "pin_functions": {
            "IOB_X0Y75": "IO_L12N_T1_MRCC_14",
            "IOB_X0Y76": "IO_L12P_T1_MRCC_14"
        },
        "sites": {
            "IOB_X0Y75": "IOB33S",
            "IOB_X0Y76": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 127,
        "pin_functions": {
            "IOB_X0Y77": "IO_L11N_T1_SRCC_14",
            "IOB_X0Y78": "IO_L11P_T1_SRCC_14"
        },
        "sites": {
            "IOB_X0Y77": "IOB33S",
            "IOB_X0Y78": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 125,
        "pin_functions": {
            "IOB_X0Y79": "IO_L10N_T1_D15_14",
            "IOB_X0Y80": "IO_L10P_T1_D14_14"
        },
        "sites": {
            "IOB_X0Y79": "IOB33S",
            "IOB_X0Y80": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 123,
        "pin_functions": {
            "IOB_X0Y81": "IO_L9N_T1_DQS_D13_14",
            "IOB_X0Y82": "IO_L9P_T1_DQS_14"
        },
        "sites": {
            "IOB_X0Y81": "IOB33S",
            "IOB_X0Y82": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 121,
        "pin_functions": {
            "IOB_X0Y83": "IO_L8N_T1_D12_14",
            "IOB_X0Y84": "IO_L8P_T1_D11_14"
        },
        "sites": {
            "IOB_X0Y83": "IOB33S",
            "IOB_X0Y84": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 119,
        "pin_functions": {
            "IOB_X0Y85": "IO_L7N_T1_D10_14",
            "IOB_X0Y86": "IO_L7P_T1_D09_14"
        },
        "sites": {
            "IOB_X0Y85": "IOB33S",
            "IOB_X0Y86": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 117,
        "pin_functions": {
            "IOB_X0Y87": "IO_L6N_T0_D08_VREF_14",
            "IOB_X0Y88": "IO_L6P_T0_FCS_B_14"
        },
        "sites": {
            "IOB_X0Y87": "IOB33S",
            "IOB_X0Y88": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 115,
        "pin_functions": {
            "IOB_X0Y89": "IO_L5N_T0_D07_14",
            "IOB_X0Y90": "IO_L5P_T0_D06_14"
        },
        "sites": {
            "IOB_X0Y89": "IOB33S",
            "IOB_X0Y90": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 198,
        "pin_functions": {
            "IOB_X0Y10": "IO_L20P_T3_13",
            "IOB_X0Y9": "IO_L20N_T3_13"
        },
        "sites": {
            "IOB_X0Y10": "IOB33M",
            "IOB_X0Y9": "IOB33S"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 113,
        "pin_functions": {
            "IOB_X0Y91": "IO_L4N_T0_D05_14",
            "IOB_X0Y92": "IO_L4P_T0_D04_14"
        },
        "sites": {
            "IOB_X0Y91": "IOB33S",
            "IOB_X0Y92": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 111,
        "pin_functions": {
            "IOB_X0Y93": "IO_L3N_T0_DQS_EMCCLK_14",
            "IOB_X0Y94": "IO_L3P_T0_DQS_PUDC_B_14"
        },
        "sites": {
            "IOB_X0Y93": "IOB33S",
            "IOB_X0Y94": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 109,
        "pin_functions": {
            "IOB_X0Y95": "IO_L2N_T0_D03_14",
            "IOB_X0Y96": "IO_L2P_T0_D02_14"
        },
        "sites": {
            "IOB_X0Y95": "IOB33S",
            "IOB_X0Y96": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 107,
        "pin_functions": {
            "IOB_X0Y97": "IO_L1N_T0_D01_DIN_14",
            "IOB_X0Y98": "IO_L1P_T0_D00_MOSI_14"
        },
        "sites": {
            "IOB_X0Y97": "IOB33S",
            "IOB_X0Y98": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOI3_SING_X0Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y0": "IDELAYE2",
            "ILOGIC_X0Y0": "ILOGICE3",
            "OLOGIC_X0Y0": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y100": "IDELAYE2",
            "ILOGIC_X0Y100": "ILOGICE3",
            "OLOGIC_X0Y100": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y149": "IDELAYE2",
            "ILOGIC_X0Y149": "ILOGICE3",
            "OLOGIC_X0Y149": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y150": "IDELAYE2",
            "ILOGIC_X0Y150": "ILOGICE3",
            "OLOGIC_X0Y150": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y199": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 1,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y199": "IDELAYE2",
            "ILOGIC_X0Y199": "ILOGICE3",
            "OLOGIC_X0Y199": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "LIOI3"
                },
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                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 157,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y49": "IDELAYE2",
            "ILOGIC_X0Y49": "ILOGICE3",
            "OLOGIC_X0Y49": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y50": "IDELAYE2",
            "ILOGIC_X0Y50": "ILOGICE3",
            "OLOGIC_X0Y50": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00400000",
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                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y99": "IDELAYE2",
            "ILOGIC_X0Y99": "ILOGICE3",
            "OLOGIC_X0Y99": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_TBYTESRC_X0Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 96,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y107": "IDELAYE2",
            "IDELAY_X0Y108": "IDELAYE2",
            "ILOGIC_X0Y107": "ILOGICE3",
            "ILOGIC_X0Y108": "ILOGICE3",
            "OLOGIC_X0Y107": "OLOGICE3",
            "OLOGIC_X0Y108": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 84,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y119": "IDELAYE2",
            "IDELAY_X0Y120": "IDELAYE2",
            "ILOGIC_X0Y119": "ILOGICE3",
            "ILOGIC_X0Y120": "ILOGICE3",
            "OLOGIC_X0Y119": "OLOGICE3",
            "OLOGIC_X0Y120": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 71,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y131": "IDELAYE2",
            "IDELAY_X0Y132": "IDELAYE2",
            "ILOGIC_X0Y131": "ILOGICE3",
            "ILOGIC_X0Y132": "ILOGICE3",
            "OLOGIC_X0Y131": "OLOGICE3",
            "OLOGIC_X0Y132": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 59,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y143": "IDELAYE2",
            "IDELAY_X0Y144": "IDELAYE2",
            "ILOGIC_X0Y143": "ILOGICE3",
            "ILOGIC_X0Y144": "ILOGICE3",
            "OLOGIC_X0Y143": "OLOGICE3",
            "OLOGIC_X0Y144": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y157": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 44,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y157": "IDELAYE2",
            "IDELAY_X0Y158": "IDELAYE2",
            "ILOGIC_X0Y157": "ILOGICE3",
            "ILOGIC_X0Y158": "ILOGICE3",
            "OLOGIC_X0Y157": "OLOGICE3",
            "OLOGIC_X0Y158": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y169": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 32,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y169": "IDELAYE2",
            "IDELAY_X0Y170": "IDELAYE2",
            "ILOGIC_X0Y169": "ILOGICE3",
            "ILOGIC_X0Y170": "ILOGICE3",
            "OLOGIC_X0Y169": "OLOGICE3",
            "OLOGIC_X0Y170": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y181": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y181": "IDELAYE2",
            "IDELAY_X0Y182": "IDELAYE2",
            "ILOGIC_X0Y181": "ILOGICE3",
            "ILOGIC_X0Y182": "ILOGICE3",
            "OLOGIC_X0Y181": "OLOGICE3",
            "OLOGIC_X0Y182": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 188,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y19": "IDELAYE2",
            "IDELAY_X0Y20": "IDELAYE2",
            "ILOGIC_X0Y19": "ILOGICE3",
            "ILOGIC_X0Y20": "ILOGICE3",
            "OLOGIC_X0Y19": "OLOGICE3",
            "OLOGIC_X0Y20": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y193": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 7,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y193": "IDELAYE2",
            "IDELAY_X0Y194": "IDELAYE2",
            "ILOGIC_X0Y193": "ILOGICE3",
            "ILOGIC_X0Y194": "ILOGICE3",
            "OLOGIC_X0Y193": "OLOGICE3",
            "OLOGIC_X0Y194": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 175,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y31": "IDELAYE2",
            "IDELAY_X0Y32": "IDELAYE2",
            "ILOGIC_X0Y31": "ILOGICE3",
            "ILOGIC_X0Y32": "ILOGICE3",
            "OLOGIC_X0Y31": "OLOGICE3",
            "OLOGIC_X0Y32": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 163,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y43": "IDELAYE2",
            "IDELAY_X0Y44": "IDELAYE2",
            "ILOGIC_X0Y43": "ILOGICE3",
            "ILOGIC_X0Y44": "ILOGICE3",
            "OLOGIC_X0Y43": "OLOGICE3",
            "OLOGIC_X0Y44": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y57": "IDELAYE2",
            "IDELAY_X0Y58": "IDELAYE2",
            "ILOGIC_X0Y57": "ILOGICE3",
            "ILOGIC_X0Y58": "ILOGICE3",
            "OLOGIC_X0Y57": "OLOGICE3",
            "OLOGIC_X0Y58": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y69": "IDELAYE2",
            "IDELAY_X0Y70": "IDELAYE2",
            "ILOGIC_X0Y69": "ILOGICE3",
            "ILOGIC_X0Y70": "ILOGICE3",
            "OLOGIC_X0Y69": "OLOGICE3",
            "OLOGIC_X0Y70": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 200,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y7": "IDELAYE2",
            "IDELAY_X0Y8": "IDELAYE2",
            "ILOGIC_X0Y7": "ILOGICE3",
            "ILOGIC_X0Y8": "ILOGICE3",
            "OLOGIC_X0Y7": "OLOGICE3",
            "OLOGIC_X0Y8": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y81": "IDELAYE2",
            "IDELAY_X0Y82": "IDELAYE2",
            "ILOGIC_X0Y81": "ILOGICE3",
            "ILOGIC_X0Y82": "ILOGICE3",
            "OLOGIC_X0Y81": "OLOGICE3",
            "OLOGIC_X0Y82": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y93": "IDELAYE2",
            "IDELAY_X0Y94": "IDELAYE2",
            "ILOGIC_X0Y93": "ILOGICE3",
            "ILOGIC_X0Y94": "ILOGICE3",
            "OLOGIC_X0Y93": "OLOGICE3",
            "OLOGIC_X0Y94": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTETERM_X0Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 90,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y113": "IDELAYE2",
            "IDELAY_X0Y114": "IDELAYE2",
            "ILOGIC_X0Y113": "ILOGICE3",
            "ILOGIC_X0Y114": "ILOGICE3",
            "OLOGIC_X0Y113": "OLOGICE3",
            "OLOGIC_X0Y114": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 194,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y13": "IDELAYE2",
            "IDELAY_X0Y14": "IDELAYE2",
            "ILOGIC_X0Y13": "ILOGICE3",
            "ILOGIC_X0Y14": "ILOGICE3",
            "OLOGIC_X0Y13": "OLOGICE3",
            "OLOGIC_X0Y14": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 65,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y137": "IDELAYE2",
            "IDELAY_X0Y138": "IDELAYE2",
            "ILOGIC_X0Y137": "ILOGICE3",
            "ILOGIC_X0Y138": "ILOGICE3",
            "OLOGIC_X0Y137": "OLOGICE3",
            "OLOGIC_X0Y138": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y163": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 38,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y163": "IDELAYE2",
            "IDELAY_X0Y164": "IDELAYE2",
            "ILOGIC_X0Y163": "ILOGICE3",
            "ILOGIC_X0Y164": "ILOGICE3",
            "OLOGIC_X0Y163": "OLOGICE3",
            "OLOGIC_X0Y164": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y187": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 13,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y187": "IDELAYE2",
            "IDELAY_X0Y188": "IDELAYE2",
            "ILOGIC_X0Y187": "ILOGICE3",
            "ILOGIC_X0Y188": "ILOGICE3",
            "OLOGIC_X0Y187": "OLOGICE3",
            "OLOGIC_X0Y188": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 169,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y37": "IDELAYE2",
            "IDELAY_X0Y38": "IDELAYE2",
            "ILOGIC_X0Y37": "ILOGICE3",
            "ILOGIC_X0Y38": "ILOGICE3",
            "OLOGIC_X0Y37": "OLOGICE3",
            "OLOGIC_X0Y38": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 142,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y63": "IDELAYE2",
            "IDELAY_X0Y64": "IDELAYE2",
            "ILOGIC_X0Y63": "ILOGICE3",
            "ILOGIC_X0Y64": "ILOGICE3",
            "OLOGIC_X0Y63": "OLOGICE3",
            "OLOGIC_X0Y64": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 117,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y87": "IDELAYE2",
            "IDELAY_X0Y88": "IDELAYE2",
            "ILOGIC_X0Y87": "ILOGICE3",
            "ILOGIC_X0Y88": "ILOGICE3",
            "OLOGIC_X0Y87": "OLOGICE3",
            "OLOGIC_X0Y88": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_X0Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 206,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y1": "IDELAYE2",
            "IDELAY_X0Y2": "IDELAYE2",
            "ILOGIC_X0Y1": "ILOGICE3",
            "ILOGIC_X0Y2": "ILOGICE3",
            "OLOGIC_X0Y1": "OLOGICE3",
            "OLOGIC_X0Y2": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 102,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y101": "IDELAYE2",
            "IDELAY_X0Y102": "IDELAYE2",
            "ILOGIC_X0Y101": "ILOGICE3",
            "ILOGIC_X0Y102": "ILOGICE3",
            "OLOGIC_X0Y101": "OLOGICE3",
            "OLOGIC_X0Y102": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 100,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y103": "IDELAYE2",
            "IDELAY_X0Y104": "IDELAYE2",
            "ILOGIC_X0Y103": "ILOGICE3",
            "ILOGIC_X0Y104": "ILOGICE3",
            "OLOGIC_X0Y103": "OLOGICE3",
            "OLOGIC_X0Y104": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y105": "IDELAYE2",
            "IDELAY_X0Y106": "IDELAYE2",
            "ILOGIC_X0Y105": "ILOGICE3",
            "ILOGIC_X0Y106": "ILOGICE3",
            "OLOGIC_X0Y105": "OLOGICE3",
            "OLOGIC_X0Y106": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 94,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y109": "IDELAYE2",
            "IDELAY_X0Y110": "IDELAYE2",
            "ILOGIC_X0Y109": "ILOGICE3",
            "ILOGIC_X0Y110": "ILOGICE3",
            "OLOGIC_X0Y109": "OLOGICE3",
            "OLOGIC_X0Y110": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 196,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y11": "IDELAYE2",
            "IDELAY_X0Y12": "IDELAYE2",
            "ILOGIC_X0Y11": "ILOGICE3",
            "ILOGIC_X0Y12": "ILOGICE3",
            "OLOGIC_X0Y11": "OLOGICE3",
            "OLOGIC_X0Y12": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 92,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y111": "IDELAYE2",
            "IDELAY_X0Y112": "IDELAYE2",
            "ILOGIC_X0Y111": "ILOGICE3",
            "ILOGIC_X0Y112": "ILOGICE3",
            "OLOGIC_X0Y111": "OLOGICE3",
            "OLOGIC_X0Y112": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y115": "IDELAYE2",
            "IDELAY_X0Y116": "IDELAYE2",
            "ILOGIC_X0Y115": "ILOGICE3",
            "ILOGIC_X0Y116": "ILOGICE3",
            "OLOGIC_X0Y115": "OLOGICE3",
            "OLOGIC_X0Y116": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 86,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y117": "IDELAYE2",
            "IDELAY_X0Y118": "IDELAYE2",
            "ILOGIC_X0Y117": "ILOGICE3",
            "ILOGIC_X0Y118": "ILOGICE3",
            "OLOGIC_X0Y117": "OLOGICE3",
            "OLOGIC_X0Y118": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 82,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y121": "IDELAYE2",
            "IDELAY_X0Y122": "IDELAYE2",
            "ILOGIC_X0Y121": "ILOGICE3",
            "ILOGIC_X0Y122": "ILOGICE3",
            "OLOGIC_X0Y121": "OLOGICE3",
            "OLOGIC_X0Y122": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 80,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y123": "IDELAYE2",
            "IDELAY_X0Y124": "IDELAYE2",
            "ILOGIC_X0Y123": "ILOGICE3",
            "ILOGIC_X0Y124": "ILOGICE3",
            "OLOGIC_X0Y123": "OLOGICE3",
            "OLOGIC_X0Y124": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y125": "IDELAYE2",
            "IDELAY_X0Y126": "IDELAYE2",
            "ILOGIC_X0Y125": "ILOGICE3",
            "ILOGIC_X0Y126": "ILOGICE3",
            "OLOGIC_X0Y125": "OLOGICE3",
            "OLOGIC_X0Y126": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 75,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y127": "IDELAYE2",
            "IDELAY_X0Y128": "IDELAYE2",
            "ILOGIC_X0Y127": "ILOGICE3",
            "ILOGIC_X0Y128": "ILOGICE3",
            "OLOGIC_X0Y127": "OLOGICE3",
            "OLOGIC_X0Y128": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 73,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y129": "IDELAYE2",
            "IDELAY_X0Y130": "IDELAYE2",
            "ILOGIC_X0Y129": "ILOGICE3",
            "ILOGIC_X0Y130": "ILOGICE3",
            "OLOGIC_X0Y129": "OLOGICE3",
            "OLOGIC_X0Y130": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 69,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y133": "IDELAYE2",
            "IDELAY_X0Y134": "IDELAYE2",
            "ILOGIC_X0Y133": "ILOGICE3",
            "ILOGIC_X0Y134": "ILOGICE3",
            "OLOGIC_X0Y133": "OLOGICE3",
            "OLOGIC_X0Y134": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y135": "IDELAYE2",
            "IDELAY_X0Y136": "IDELAYE2",
            "ILOGIC_X0Y135": "ILOGICE3",
            "ILOGIC_X0Y136": "ILOGICE3",
            "OLOGIC_X0Y135": "OLOGICE3",
            "OLOGIC_X0Y136": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 63,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y139": "IDELAYE2",
            "IDELAY_X0Y140": "IDELAYE2",
            "ILOGIC_X0Y139": "ILOGICE3",
            "ILOGIC_X0Y140": "ILOGICE3",
            "OLOGIC_X0Y139": "OLOGICE3",
            "OLOGIC_X0Y140": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 61,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y141": "IDELAYE2",
            "IDELAY_X0Y142": "IDELAYE2",
            "ILOGIC_X0Y141": "ILOGICE3",
            "ILOGIC_X0Y142": "ILOGICE3",
            "OLOGIC_X0Y141": "OLOGICE3",
            "OLOGIC_X0Y142": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y145": "IDELAYE2",
            "IDELAY_X0Y146": "IDELAYE2",
            "ILOGIC_X0Y145": "ILOGICE3",
            "ILOGIC_X0Y146": "ILOGICE3",
            "OLOGIC_X0Y145": "OLOGICE3",
            "OLOGIC_X0Y146": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 55,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y147": "IDELAYE2",
            "IDELAY_X0Y148": "IDELAYE2",
            "ILOGIC_X0Y147": "ILOGICE3",
            "ILOGIC_X0Y148": "ILOGICE3",
            "OLOGIC_X0Y147": "OLOGICE3",
            "OLOGIC_X0Y148": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y15": "IDELAYE2",
            "IDELAY_X0Y16": "IDELAYE2",
            "ILOGIC_X0Y15": "ILOGICE3",
            "ILOGIC_X0Y16": "ILOGICE3",
            "OLOGIC_X0Y15": "OLOGICE3",
            "OLOGIC_X0Y16": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y151": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 50,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y151": "IDELAYE2",
            "IDELAY_X0Y152": "IDELAYE2",
            "ILOGIC_X0Y151": "ILOGICE3",
            "ILOGIC_X0Y152": "ILOGICE3",
            "OLOGIC_X0Y151": "OLOGICE3",
            "OLOGIC_X0Y152": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y153": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 48,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y153": "IDELAYE2",
            "IDELAY_X0Y154": "IDELAYE2",
            "ILOGIC_X0Y153": "ILOGICE3",
            "ILOGIC_X0Y154": "ILOGICE3",
            "OLOGIC_X0Y153": "OLOGICE3",
            "OLOGIC_X0Y154": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y155": "IDELAYE2",
            "IDELAY_X0Y156": "IDELAYE2",
            "ILOGIC_X0Y155": "ILOGICE3",
            "ILOGIC_X0Y156": "ILOGICE3",
            "OLOGIC_X0Y155": "OLOGICE3",
            "OLOGIC_X0Y156": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y159": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 42,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y159": "IDELAYE2",
            "IDELAY_X0Y160": "IDELAYE2",
            "ILOGIC_X0Y159": "ILOGICE3",
            "ILOGIC_X0Y160": "ILOGICE3",
            "OLOGIC_X0Y159": "OLOGICE3",
            "OLOGIC_X0Y160": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y161": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 40,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y161": "IDELAYE2",
            "IDELAY_X0Y162": "IDELAYE2",
            "ILOGIC_X0Y161": "ILOGICE3",
            "ILOGIC_X0Y162": "ILOGICE3",
            "OLOGIC_X0Y161": "OLOGICE3",
            "OLOGIC_X0Y162": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y165": "IDELAYE2",
            "IDELAY_X0Y166": "IDELAYE2",
            "ILOGIC_X0Y165": "ILOGICE3",
            "ILOGIC_X0Y166": "ILOGICE3",
            "OLOGIC_X0Y165": "OLOGICE3",
            "OLOGIC_X0Y166": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y167": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 34,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y167": "IDELAYE2",
            "IDELAY_X0Y168": "IDELAYE2",
            "ILOGIC_X0Y167": "ILOGICE3",
            "ILOGIC_X0Y168": "ILOGICE3",
            "OLOGIC_X0Y167": "OLOGICE3",
            "OLOGIC_X0Y168": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 190,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y17": "IDELAYE2",
            "IDELAY_X0Y18": "IDELAYE2",
            "ILOGIC_X0Y17": "ILOGICE3",
            "ILOGIC_X0Y18": "ILOGICE3",
            "OLOGIC_X0Y17": "OLOGICE3",
            "OLOGIC_X0Y18": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y171": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 30,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y171": "IDELAYE2",
            "IDELAY_X0Y172": "IDELAYE2",
            "ILOGIC_X0Y171": "ILOGICE3",
            "ILOGIC_X0Y172": "ILOGICE3",
            "OLOGIC_X0Y171": "OLOGICE3",
            "OLOGIC_X0Y172": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y173": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 28,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y173": "IDELAYE2",
            "IDELAY_X0Y174": "IDELAYE2",
            "ILOGIC_X0Y173": "ILOGICE3",
            "ILOGIC_X0Y174": "ILOGICE3",
            "OLOGIC_X0Y173": "OLOGICE3",
            "OLOGIC_X0Y174": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y175": "IDELAYE2",
            "IDELAY_X0Y176": "IDELAYE2",
            "ILOGIC_X0Y175": "ILOGICE3",
            "ILOGIC_X0Y176": "ILOGICE3",
            "OLOGIC_X0Y175": "OLOGICE3",
            "OLOGIC_X0Y176": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y177": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y177": "IDELAYE2",
            "IDELAY_X0Y178": "IDELAYE2",
            "ILOGIC_X0Y177": "ILOGICE3",
            "ILOGIC_X0Y178": "ILOGICE3",
            "OLOGIC_X0Y177": "OLOGICE3",
            "OLOGIC_X0Y178": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y179": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y179": "IDELAYE2",
            "IDELAY_X0Y180": "IDELAYE2",
            "ILOGIC_X0Y179": "ILOGICE3",
            "ILOGIC_X0Y180": "ILOGICE3",
            "OLOGIC_X0Y179": "OLOGICE3",
            "OLOGIC_X0Y180": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y183": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y183": "IDELAYE2",
            "IDELAY_X0Y184": "IDELAYE2",
            "ILOGIC_X0Y183": "ILOGICE3",
            "ILOGIC_X0Y184": "ILOGICE3",
            "OLOGIC_X0Y183": "OLOGICE3",
            "OLOGIC_X0Y184": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
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        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y185": "IDELAYE2",
            "IDELAY_X0Y186": "IDELAYE2",
            "ILOGIC_X0Y185": "ILOGICE3",
            "ILOGIC_X0Y186": "ILOGICE3",
            "OLOGIC_X0Y185": "OLOGICE3",
            "OLOGIC_X0Y186": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y189": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
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        "grid_y": 11,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y189": "IDELAYE2",
            "IDELAY_X0Y190": "IDELAYE2",
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            "ILOGIC_X0Y190": "ILOGICE3",
            "OLOGIC_X0Y189": "OLOGICE3",
            "OLOGIC_X0Y190": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y191": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 9,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y191": "IDELAYE2",
            "IDELAY_X0Y192": "IDELAYE2",
            "ILOGIC_X0Y191": "ILOGICE3",
            "ILOGIC_X0Y192": "ILOGICE3",
            "OLOGIC_X0Y191": "OLOGICE3",
            "OLOGIC_X0Y192": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
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        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y195": "IDELAYE2",
            "IDELAY_X0Y196": "IDELAYE2",
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            "ILOGIC_X0Y196": "ILOGICE3",
            "OLOGIC_X0Y195": "OLOGICE3",
            "OLOGIC_X0Y196": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y197": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
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        "grid_y": 3,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y197": "IDELAYE2",
            "IDELAY_X0Y198": "IDELAYE2",
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            "ILOGIC_X0Y198": "ILOGICE3",
            "OLOGIC_X0Y197": "OLOGICE3",
            "OLOGIC_X0Y198": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y21": "IDELAYE2",
            "IDELAY_X0Y22": "IDELAYE2",
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            "ILOGIC_X0Y22": "ILOGICE3",
            "OLOGIC_X0Y21": "OLOGICE3",
            "OLOGIC_X0Y22": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y23": "IDELAYE2",
            "IDELAY_X0Y24": "IDELAYE2",
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            "ILOGIC_X0Y24": "ILOGICE3",
            "OLOGIC_X0Y23": "OLOGICE3",
            "OLOGIC_X0Y24": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y25": "IDELAYE2",
            "IDELAY_X0Y26": "IDELAYE2",
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            "ILOGIC_X0Y26": "ILOGICE3",
            "OLOGIC_X0Y25": "OLOGICE3",
            "OLOGIC_X0Y26": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 179,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y27": "IDELAYE2",
            "IDELAY_X0Y28": "IDELAYE2",
            "ILOGIC_X0Y27": "ILOGICE3",
            "ILOGIC_X0Y28": "ILOGICE3",
            "OLOGIC_X0Y27": "OLOGICE3",
            "OLOGIC_X0Y28": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y29": "IDELAYE2",
            "IDELAY_X0Y30": "IDELAYE2",
            "ILOGIC_X0Y29": "ILOGICE3",
            "ILOGIC_X0Y30": "ILOGICE3",
            "OLOGIC_X0Y29": "OLOGICE3",
            "OLOGIC_X0Y30": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y3": "IDELAYE2",
            "IDELAY_X0Y4": "IDELAYE2",
            "ILOGIC_X0Y3": "ILOGICE3",
            "ILOGIC_X0Y4": "ILOGICE3",
            "OLOGIC_X0Y3": "OLOGICE3",
            "OLOGIC_X0Y4": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y33": "IDELAYE2",
            "IDELAY_X0Y34": "IDELAYE2",
            "ILOGIC_X0Y33": "ILOGICE3",
            "ILOGIC_X0Y34": "ILOGICE3",
            "OLOGIC_X0Y33": "OLOGICE3",
            "OLOGIC_X0Y34": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y35": "IDELAYE2",
            "IDELAY_X0Y36": "IDELAYE2",
            "ILOGIC_X0Y35": "ILOGICE3",
            "ILOGIC_X0Y36": "ILOGICE3",
            "OLOGIC_X0Y35": "OLOGICE3",
            "OLOGIC_X0Y36": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y39": "IDELAYE2",
            "IDELAY_X0Y40": "IDELAYE2",
            "ILOGIC_X0Y39": "ILOGICE3",
            "ILOGIC_X0Y40": "ILOGICE3",
            "OLOGIC_X0Y39": "OLOGICE3",
            "OLOGIC_X0Y40": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y41": "IDELAYE2",
            "IDELAY_X0Y42": "IDELAYE2",
            "ILOGIC_X0Y41": "ILOGICE3",
            "ILOGIC_X0Y42": "ILOGICE3",
            "OLOGIC_X0Y41": "OLOGICE3",
            "OLOGIC_X0Y42": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y45": "IDELAYE2",
            "IDELAY_X0Y46": "IDELAYE2",
            "ILOGIC_X0Y45": "ILOGICE3",
            "ILOGIC_X0Y46": "ILOGICE3",
            "OLOGIC_X0Y45": "OLOGICE3",
            "OLOGIC_X0Y46": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 159,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y47": "IDELAYE2",
            "IDELAY_X0Y48": "IDELAYE2",
            "ILOGIC_X0Y47": "ILOGICE3",
            "ILOGIC_X0Y48": "ILOGICE3",
            "OLOGIC_X0Y47": "OLOGICE3",
            "OLOGIC_X0Y48": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y5": "IDELAYE2",
            "IDELAY_X0Y6": "IDELAYE2",
            "ILOGIC_X0Y5": "ILOGICE3",
            "ILOGIC_X0Y6": "ILOGICE3",
            "OLOGIC_X0Y5": "OLOGICE3",
            "OLOGIC_X0Y6": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 154,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y51": "IDELAYE2",
            "IDELAY_X0Y52": "IDELAYE2",
            "ILOGIC_X0Y51": "ILOGICE3",
            "ILOGIC_X0Y52": "ILOGICE3",
            "OLOGIC_X0Y51": "OLOGICE3",
            "OLOGIC_X0Y52": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 152,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y53": "IDELAYE2",
            "IDELAY_X0Y54": "IDELAYE2",
            "ILOGIC_X0Y53": "ILOGICE3",
            "ILOGIC_X0Y54": "ILOGICE3",
            "OLOGIC_X0Y53": "OLOGICE3",
            "OLOGIC_X0Y54": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y55": "IDELAYE2",
            "IDELAY_X0Y56": "IDELAYE2",
            "ILOGIC_X0Y55": "ILOGICE3",
            "ILOGIC_X0Y56": "ILOGICE3",
            "OLOGIC_X0Y55": "OLOGICE3",
            "OLOGIC_X0Y56": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 146,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y59": "IDELAYE2",
            "IDELAY_X0Y60": "IDELAYE2",
            "ILOGIC_X0Y59": "ILOGICE3",
            "ILOGIC_X0Y60": "ILOGICE3",
            "OLOGIC_X0Y59": "OLOGICE3",
            "OLOGIC_X0Y60": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 144,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y61": "IDELAYE2",
            "IDELAY_X0Y62": "IDELAYE2",
            "ILOGIC_X0Y61": "ILOGICE3",
            "ILOGIC_X0Y62": "ILOGICE3",
            "OLOGIC_X0Y61": "OLOGICE3",
            "OLOGIC_X0Y62": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y65": "IDELAYE2",
            "IDELAY_X0Y66": "IDELAYE2",
            "ILOGIC_X0Y65": "ILOGICE3",
            "ILOGIC_X0Y66": "ILOGICE3",
            "OLOGIC_X0Y65": "OLOGICE3",
            "OLOGIC_X0Y66": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y67": "IDELAYE2",
            "IDELAY_X0Y68": "IDELAYE2",
            "ILOGIC_X0Y67": "ILOGICE3",
            "ILOGIC_X0Y68": "ILOGICE3",
            "OLOGIC_X0Y67": "OLOGICE3",
            "OLOGIC_X0Y68": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y71": "IDELAYE2",
            "IDELAY_X0Y72": "IDELAYE2",
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            "ILOGIC_X0Y72": "ILOGICE3",
            "OLOGIC_X0Y71": "OLOGICE3",
            "OLOGIC_X0Y72": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y73": "IDELAYE2",
            "IDELAY_X0Y74": "IDELAYE2",
            "ILOGIC_X0Y73": "ILOGICE3",
            "ILOGIC_X0Y74": "ILOGICE3",
            "OLOGIC_X0Y73": "OLOGICE3",
            "OLOGIC_X0Y74": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
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        "grid_y": 196,
        "pin_functions": {
            "IOB_X1Y11": "IO_L19N_T3_VREF_33",
            "IOB_X1Y12": "IO_L19P_T3_33"
        },
        "sites": {
            "IOB_X1Y11": "IOB18S",
            "IOB_X1Y12": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y13": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 194,
        "pin_functions": {
            "IOB_X1Y13": "IO_L18N_T2_33",
            "IOB_X1Y14": "IO_L18P_T2_33"
        },
        "sites": {
            "IOB_X1Y13": "IOB18S",
            "IOB_X1Y14": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y15": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 192,
        "pin_functions": {
            "IOB_X1Y15": "IO_L17N_T2_33",
            "IOB_X1Y16": "IO_L17P_T2_33"
        },
        "sites": {
            "IOB_X1Y15": "IOB18S",
            "IOB_X1Y16": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y17": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 190,
        "pin_functions": {
            "IOB_X1Y17": "IO_L16N_T2_33",
            "IOB_X1Y18": "IO_L16P_T2_33"
        },
        "sites": {
            "IOB_X1Y17": "IOB18S",
            "IOB_X1Y18": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y19": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 188,
        "pin_functions": {
            "IOB_X1Y19": "IO_L15N_T2_DQS_33",
            "IOB_X1Y20": "IO_L15P_T2_DQS_33"
        },
        "sites": {
            "IOB_X1Y19": "IOB18S",
            "IOB_X1Y20": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y21": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 186,
        "pin_functions": {
            "IOB_X1Y21": "IO_L14N_T2_SRCC_33",
            "IOB_X1Y22": "IO_L14P_T2_SRCC_33"
        },
        "sites": {
            "IOB_X1Y21": "IOB18S",
            "IOB_X1Y22": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y23": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 184,
        "pin_functions": {
            "IOB_X1Y23": "IO_L13N_T2_MRCC_33",
            "IOB_X1Y24": "IO_L13P_T2_MRCC_33"
        },
        "sites": {
            "IOB_X1Y23": "IOB18S",
            "IOB_X1Y24": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y25": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 181,
        "pin_functions": {
            "IOB_X1Y25": "IO_L12N_T1_MRCC_33",
            "IOB_X1Y26": "IO_L12P_T1_MRCC_33"
        },
        "sites": {
            "IOB_X1Y25": "IOB18S",
            "IOB_X1Y26": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y27": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 179,
        "pin_functions": {
            "IOB_X1Y27": "IO_L11N_T1_SRCC_33",
            "IOB_X1Y28": "IO_L11P_T1_SRCC_33"
        },
        "sites": {
            "IOB_X1Y27": "IOB18S",
            "IOB_X1Y28": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y29": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 177,
        "pin_functions": {
            "IOB_X1Y29": "IO_L10N_T1_33",
            "IOB_X1Y30": "IO_L10P_T1_33"
        },
        "sites": {
            "IOB_X1Y29": "IOB18S",
            "IOB_X1Y30": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y3": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 204,
        "pin_functions": {
            "IOB_X1Y3": "IO_L23N_T3_33",
            "IOB_X1Y4": "IO_L23P_T3_33"
        },
        "sites": {
            "IOB_X1Y3": "IOB18S",
            "IOB_X1Y4": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y31": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 175,
        "pin_functions": {
            "IOB_X1Y31": "IO_L9N_T1_DQS_33",
            "IOB_X1Y32": "IO_L9P_T1_DQS_33"
        },
        "sites": {
            "IOB_X1Y31": "IOB18S",
            "IOB_X1Y32": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y33": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 173,
        "pin_functions": {
            "IOB_X1Y33": "IO_L8N_T1_33",
            "IOB_X1Y34": "IO_L8P_T1_33"
        },
        "sites": {
            "IOB_X1Y33": "IOB18S",
            "IOB_X1Y34": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y35": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 171,
        "pin_functions": {
            "IOB_X1Y35": "IO_L7N_T1_33",
            "IOB_X1Y36": "IO_L7P_T1_33"
        },
        "sites": {
            "IOB_X1Y35": "IOB18S",
            "IOB_X1Y36": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y37": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 169,
        "pin_functions": {
            "IOB_X1Y37": "IO_L6N_T0_VREF_33",
            "IOB_X1Y38": "IO_L6P_T0_33"
        },
        "sites": {
            "IOB_X1Y37": "IOB18S",
            "IOB_X1Y38": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y39": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 167,
        "pin_functions": {
            "IOB_X1Y39": "IO_L5N_T0_33",
            "IOB_X1Y40": "IO_L5P_T0_33"
        },
        "sites": {
            "IOB_X1Y39": "IOB18S",
            "IOB_X1Y40": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y41": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 165,
        "pin_functions": {
            "IOB_X1Y41": "IO_L4N_T0_33",
            "IOB_X1Y42": "IO_L4P_T0_33"
        },
        "sites": {
            "IOB_X1Y41": "IOB18S",
            "IOB_X1Y42": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y43": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 163,
        "pin_functions": {
            "IOB_X1Y43": "IO_L3N_T0_DQS_33",
            "IOB_X1Y44": "IO_L3P_T0_DQS_33"
        },
        "sites": {
            "IOB_X1Y43": "IOB18S",
            "IOB_X1Y44": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y45": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 161,
        "pin_functions": {
            "IOB_X1Y45": "IO_L2N_T0_33",
            "IOB_X1Y46": "IO_L2P_T0_33"
        },
        "sites": {
            "IOB_X1Y45": "IOB18S",
            "IOB_X1Y46": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y47": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 159,
        "pin_functions": {
            "IOB_X1Y47": "IO_L1N_T0_33",
            "IOB_X1Y48": "IO_L1P_T0_33"
        },
        "sites": {
            "IOB_X1Y47": "IOB18S",
            "IOB_X1Y48": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y5": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 202,
        "pin_functions": {
            "IOB_X1Y5": "IO_L22N_T3_33",
            "IOB_X1Y6": "IO_L22P_T3_33"
        },
        "sites": {
            "IOB_X1Y5": "IOB18S",
            "IOB_X1Y6": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y51": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 154,
        "pin_functions": {
            "IOB_X1Y51": "IO_L24N_T3_34",
            "IOB_X1Y52": "IO_L24P_T3_34"
        },
        "sites": {
            "IOB_X1Y51": "IOB18S",
            "IOB_X1Y52": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y53": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 152,
        "pin_functions": {
            "IOB_X1Y53": "IO_L23N_T3_34",
            "IOB_X1Y54": "IO_L23P_T3_34"
        },
        "sites": {
            "IOB_X1Y53": "IOB18S",
            "IOB_X1Y54": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y55": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 150,
        "pin_functions": {
            "IOB_X1Y55": "IO_L22N_T3_34",
            "IOB_X1Y56": "IO_L22P_T3_34"
        },
        "sites": {
            "IOB_X1Y55": "IOB18S",
            "IOB_X1Y56": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y57": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 148,
        "pin_functions": {
            "IOB_X1Y57": "IO_L21N_T3_DQS_34",
            "IOB_X1Y58": "IO_L21P_T3_DQS_34"
        },
        "sites": {
            "IOB_X1Y57": "IOB18S",
            "IOB_X1Y58": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y59": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 146,
        "pin_functions": {
            "IOB_X1Y59": "IO_L20N_T3_34",
            "IOB_X1Y60": "IO_L20P_T3_34"
        },
        "sites": {
            "IOB_X1Y59": "IOB18S",
            "IOB_X1Y60": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y61": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 144,
        "pin_functions": {
            "IOB_X1Y61": "IO_L19N_T3_VREF_34",
            "IOB_X1Y62": "IO_L19P_T3_34"
        },
        "sites": {
            "IOB_X1Y61": "IOB18S",
            "IOB_X1Y62": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y63": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 142,
        "pin_functions": {
            "IOB_X1Y63": "IO_L18N_T2_34",
            "IOB_X1Y64": "IO_L18P_T2_34"
        },
        "sites": {
            "IOB_X1Y63": "IOB18S",
            "IOB_X1Y64": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y65": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 140,
        "pin_functions": {
            "IOB_X1Y65": "IO_L17N_T2_34",
            "IOB_X1Y66": "IO_L17P_T2_34"
        },
        "sites": {
            "IOB_X1Y65": "IOB18S",
            "IOB_X1Y66": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y67": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 138,
        "pin_functions": {
            "IOB_X1Y67": "IO_L16N_T2_34",
            "IOB_X1Y68": "IO_L16P_T2_34"
        },
        "sites": {
            "IOB_X1Y67": "IOB18S",
            "IOB_X1Y68": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y69": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 136,
        "pin_functions": {
            "IOB_X1Y69": "IO_L15N_T2_DQS_34",
            "IOB_X1Y70": "IO_L15P_T2_DQS_34"
        },
        "sites": {
            "IOB_X1Y69": "IOB18S",
            "IOB_X1Y70": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y7": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 200,
        "pin_functions": {
            "IOB_X1Y7": "IO_L21N_T3_DQS_33",
            "IOB_X1Y8": "IO_L21P_T3_DQS_33"
        },
        "sites": {
            "IOB_X1Y7": "IOB18S",
            "IOB_X1Y8": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y71": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 134,
        "pin_functions": {
            "IOB_X1Y71": "IO_L14N_T2_SRCC_34",
            "IOB_X1Y72": "IO_L14P_T2_SRCC_34"
        },
        "sites": {
            "IOB_X1Y71": "IOB18S",
            "IOB_X1Y72": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y73": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 132,
        "pin_functions": {
            "IOB_X1Y73": "IO_L13N_T2_MRCC_34",
            "IOB_X1Y74": "IO_L13P_T2_MRCC_34"
        },
        "sites": {
            "IOB_X1Y73": "IOB18S",
            "IOB_X1Y74": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y75": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 129,
        "pin_functions": {
            "IOB_X1Y75": "IO_L12N_T1_MRCC_34",
            "IOB_X1Y76": "IO_L12P_T1_MRCC_34"
        },
        "sites": {
            "IOB_X1Y75": "IOB18S",
            "IOB_X1Y76": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y77": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 127,
        "pin_functions": {
            "IOB_X1Y77": "IO_L11N_T1_SRCC_34",
            "IOB_X1Y78": "IO_L11P_T1_SRCC_34"
        },
        "sites": {
            "IOB_X1Y77": "IOB18S",
            "IOB_X1Y78": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y79": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 125,
        "pin_functions": {
            "IOB_X1Y79": "IO_L10N_T1_34",
            "IOB_X1Y80": "IO_L10P_T1_34"
        },
        "sites": {
            "IOB_X1Y79": "IOB18S",
            "IOB_X1Y80": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y81": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 123,
        "pin_functions": {
            "IOB_X1Y81": "IO_L9N_T1_DQS_34",
            "IOB_X1Y82": "IO_L9P_T1_DQS_34"
        },
        "sites": {
            "IOB_X1Y81": "IOB18S",
            "IOB_X1Y82": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y83": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 121,
        "pin_functions": {
            "IOB_X1Y83": "IO_L8N_T1_34",
            "IOB_X1Y84": "IO_L8P_T1_34"
        },
        "sites": {
            "IOB_X1Y83": "IOB18S",
            "IOB_X1Y84": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y85": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 119,
        "pin_functions": {
            "IOB_X1Y85": "IO_L7N_T1_34",
            "IOB_X1Y86": "IO_L7P_T1_34"
        },
        "sites": {
            "IOB_X1Y85": "IOB18S",
            "IOB_X1Y86": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y87": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 117,
        "pin_functions": {
            "IOB_X1Y87": "IO_L6N_T0_VREF_34",
            "IOB_X1Y88": "IO_L6P_T0_34"
        },
        "sites": {
            "IOB_X1Y87": "IOB18S",
            "IOB_X1Y88": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y89": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 115,
        "pin_functions": {
            "IOB_X1Y89": "IO_L5N_T0_34",
            "IOB_X1Y90": "IO_L5P_T0_34"
        },
        "sites": {
            "IOB_X1Y89": "IOB18S",
            "IOB_X1Y90": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y9": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 198,
        "pin_functions": {
            "IOB_X1Y10": "IO_L20P_T3_33",
            "IOB_X1Y9": "IO_L20N_T3_33"
        },
        "sites": {
            "IOB_X1Y10": "IOB18M",
            "IOB_X1Y9": "IOB18S"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y91": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 113,
        "pin_functions": {
            "IOB_X1Y91": "IO_L4N_T0_34",
            "IOB_X1Y92": "IO_L4P_T0_34"
        },
        "sites": {
            "IOB_X1Y91": "IOB18S",
            "IOB_X1Y92": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y93": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 111,
        "pin_functions": {
            "IOB_X1Y93": "IO_L3N_T0_DQS_34",
            "IOB_X1Y94": "IO_L3P_T0_DQS_34"
        },
        "sites": {
            "IOB_X1Y93": "IOB18S",
            "IOB_X1Y94": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y95": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 109,
        "pin_functions": {
            "IOB_X1Y95": "IO_L2N_T0_34",
            "IOB_X1Y96": "IO_L2P_T0_34"
        },
        "sites": {
            "IOB_X1Y95": "IOB18S",
            "IOB_X1Y96": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y97": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 107,
        "pin_functions": {
            "IOB_X1Y97": "IO_L1N_T0_34",
            "IOB_X1Y98": "IO_L1P_T0_34"
        },
        "sites": {
            "IOB_X1Y97": "IOB18S",
            "IOB_X1Y98": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOI_SING_X43Y0": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y0": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y0": "ILOGICE2",
            "ODELAY_X1Y0": "ODELAYE2",
            "OLOGIC_X1Y0": "OLOGICE2"
        },
        "type": "RIOI_SING"
    },
    "RIOI_SING_X43Y49": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 157,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y49": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y49": "ILOGICE2",
            "ODELAY_X1Y49": "ODELAYE2",
            "OLOGIC_X1Y49": "OLOGICE2"
        },
        "type": "RIOI_SING"
    },
    "RIOI_SING_X43Y50": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y50": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y50": "ILOGICE2",
            "ODELAY_X1Y50": "ODELAYE2",
            "OLOGIC_X1Y50": "OLOGICE2"
        },
        "type": "RIOI_SING"
    },
    "RIOI_SING_X43Y99": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y99": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y99": "ILOGICE2",
            "ODELAY_X1Y99": "ODELAYE2",
            "OLOGIC_X1Y99": "OLOGICE2"
        },
        "type": "RIOI_SING"
    },
    "RIOI_TBYTESRC_X43Y19": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 188,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y19": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y20": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y19": "ILOGICE2",
            "ILOGIC_X1Y20": "ILOGICE2",
            "ODELAY_X1Y19": "ODELAYE2",
            "ODELAY_X1Y20": "ODELAYE2",
            "OLOGIC_X1Y19": "OLOGICE2",
            "OLOGIC_X1Y20": "OLOGICE2"
        },
        "type": "RIOI_TBYTESRC"
    },
    "RIOI_TBYTESRC_X43Y31": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 175,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y31": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y32": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y31": "ILOGICE2",
            "ILOGIC_X1Y32": "ILOGICE2",
            "ODELAY_X1Y31": "ODELAYE2",
            "ODELAY_X1Y32": "ODELAYE2",
            "OLOGIC_X1Y31": "OLOGICE2",
            "OLOGIC_X1Y32": "OLOGICE2"
        },
        "type": "RIOI_TBYTESRC"
    },
    "RIOI_TBYTESRC_X43Y43": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 163,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y43": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y44": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y43": "ILOGICE2",
            "ILOGIC_X1Y44": "ILOGICE2",
            "ODELAY_X1Y43": "ODELAYE2",
            "ODELAY_X1Y44": "ODELAYE2",
            "OLOGIC_X1Y43": "OLOGICE2",
            "OLOGIC_X1Y44": "OLOGICE2"
        },
        "type": "RIOI_TBYTESRC"
    },
    "RIOI_TBYTESRC_X43Y57": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y57": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y58": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y57": "ILOGICE2",
            "ILOGIC_X1Y58": "ILOGICE2",
            "ODELAY_X1Y57": "ODELAYE2",
            "ODELAY_X1Y58": "ODELAYE2",
            "OLOGIC_X1Y57": "OLOGICE2",
            "OLOGIC_X1Y58": "OLOGICE2"
        },
        "type": "RIOI_TBYTESRC"
    },
    "RIOI_TBYTESRC_X43Y69": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y69": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y70": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y69": "ILOGICE2",
            "ILOGIC_X1Y70": "ILOGICE2",
            "ODELAY_X1Y69": "ODELAYE2",
            "ODELAY_X1Y70": "ODELAYE2",
            "OLOGIC_X1Y69": "OLOGICE2",
            "OLOGIC_X1Y70": "OLOGICE2"
        },
        "type": "RIOI_TBYTESRC"
    },
    "RIOI_TBYTESRC_X43Y7": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 200,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y7": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y8": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y7": "ILOGICE2",
            "ILOGIC_X1Y8": "ILOGICE2",
            "ODELAY_X1Y7": "ODELAYE2",
            "ODELAY_X1Y8": "ODELAYE2",
            "OLOGIC_X1Y7": "OLOGICE2",
            "OLOGIC_X1Y8": "OLOGICE2"
        },
        "type": "RIOI_TBYTESRC"
    },
    "RIOI_TBYTESRC_X43Y81": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y81": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y82": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y81": "ILOGICE2",
            "ILOGIC_X1Y82": "ILOGICE2",
            "ODELAY_X1Y81": "ODELAYE2",
            "ODELAY_X1Y82": "ODELAYE2",
            "OLOGIC_X1Y81": "OLOGICE2",
            "OLOGIC_X1Y82": "OLOGICE2"
        },
        "type": "RIOI_TBYTESRC"
    },
    "RIOI_TBYTESRC_X43Y93": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y93": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y94": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y93": "ILOGICE2",
            "ILOGIC_X1Y94": "ILOGICE2",
            "ODELAY_X1Y93": "ODELAYE2",
            "ODELAY_X1Y94": "ODELAYE2",
            "OLOGIC_X1Y93": "OLOGICE2",
            "OLOGIC_X1Y94": "OLOGICE2"
        },
        "type": "RIOI_TBYTESRC"
    },
    "RIOI_TBYTETERM_X43Y13": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 194,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y13": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y14": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y13": "ILOGICE2",
            "ILOGIC_X1Y14": "ILOGICE2",
            "ODELAY_X1Y13": "ODELAYE2",
            "ODELAY_X1Y14": "ODELAYE2",
            "OLOGIC_X1Y13": "OLOGICE2",
            "OLOGIC_X1Y14": "OLOGICE2"
        },
        "type": "RIOI_TBYTETERM"
    },
    "RIOI_TBYTETERM_X43Y37": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 169,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y37": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y38": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y37": "ILOGICE2",
            "ILOGIC_X1Y38": "ILOGICE2",
            "ODELAY_X1Y37": "ODELAYE2",
            "ODELAY_X1Y38": "ODELAYE2",
            "OLOGIC_X1Y37": "OLOGICE2",
            "OLOGIC_X1Y38": "OLOGICE2"
        },
        "type": "RIOI_TBYTETERM"
    },
    "RIOI_TBYTETERM_X43Y63": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 142,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y63": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y64": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y63": "ILOGICE2",
            "ILOGIC_X1Y64": "ILOGICE2",
            "ODELAY_X1Y63": "ODELAYE2",
            "ODELAY_X1Y64": "ODELAYE2",
            "OLOGIC_X1Y63": "OLOGICE2",
            "OLOGIC_X1Y64": "OLOGICE2"
        },
        "type": "RIOI_TBYTETERM"
    },
    "RIOI_TBYTETERM_X43Y87": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 117,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y87": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y88": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y87": "ILOGICE2",
            "ILOGIC_X1Y88": "ILOGICE2",
            "ODELAY_X1Y87": "ODELAYE2",
            "ODELAY_X1Y88": "ODELAYE2",
            "OLOGIC_X1Y87": "OLOGICE2",
            "OLOGIC_X1Y88": "OLOGICE2"
        },
        "type": "RIOI_TBYTETERM"
    },
    "RIOI_X43Y1": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 206,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y1": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y2": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y1": "ILOGICE2",
            "ILOGIC_X1Y2": "ILOGICE2",
            "ODELAY_X1Y1": "ODELAYE2",
            "ODELAY_X1Y2": "ODELAYE2",
            "OLOGIC_X1Y1": "OLOGICE2",
            "OLOGIC_X1Y2": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y11": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 196,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y11": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y12": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y11": "ILOGICE2",
            "ILOGIC_X1Y12": "ILOGICE2",
            "ODELAY_X1Y11": "ODELAYE2",
            "ODELAY_X1Y12": "ODELAYE2",
            "OLOGIC_X1Y11": "OLOGICE2",
            "OLOGIC_X1Y12": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y15": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y15": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y16": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y15": "ILOGICE2",
            "ILOGIC_X1Y16": "ILOGICE2",
            "ODELAY_X1Y15": "ODELAYE2",
            "ODELAY_X1Y16": "ODELAYE2",
            "OLOGIC_X1Y15": "OLOGICE2",
            "OLOGIC_X1Y16": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y17": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 190,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y17": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y18": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y17": "ILOGICE2",
            "ILOGIC_X1Y18": "ILOGICE2",
            "ODELAY_X1Y17": "ODELAYE2",
            "ODELAY_X1Y18": "ODELAYE2",
            "OLOGIC_X1Y17": "OLOGICE2",
            "OLOGIC_X1Y18": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y21": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 186,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y21": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y22": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y21": "ILOGICE2",
            "ILOGIC_X1Y22": "ILOGICE2",
            "ODELAY_X1Y21": "ODELAYE2",
            "ODELAY_X1Y22": "ODELAYE2",
            "OLOGIC_X1Y21": "OLOGICE2",
            "OLOGIC_X1Y22": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y23": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 184,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y23": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y24": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y23": "ILOGICE2",
            "ILOGIC_X1Y24": "ILOGICE2",
            "ODELAY_X1Y23": "ODELAYE2",
            "ODELAY_X1Y24": "ODELAYE2",
            "OLOGIC_X1Y23": "OLOGICE2",
            "OLOGIC_X1Y24": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y25": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y25": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y26": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y25": "ILOGICE2",
            "ILOGIC_X1Y26": "ILOGICE2",
            "ODELAY_X1Y25": "ODELAYE2",
            "ODELAY_X1Y26": "ODELAYE2",
            "OLOGIC_X1Y25": "OLOGICE2",
            "OLOGIC_X1Y26": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y27": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 179,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y27": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y28": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y27": "ILOGICE2",
            "ILOGIC_X1Y28": "ILOGICE2",
            "ODELAY_X1Y27": "ODELAYE2",
            "ODELAY_X1Y28": "ODELAYE2",
            "OLOGIC_X1Y27": "OLOGICE2",
            "OLOGIC_X1Y28": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y29": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 177,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y29": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y30": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y29": "ILOGICE2",
            "ILOGIC_X1Y30": "ILOGICE2",
            "ODELAY_X1Y29": "ODELAYE2",
            "ODELAY_X1Y30": "ODELAYE2",
            "OLOGIC_X1Y29": "OLOGICE2",
            "OLOGIC_X1Y30": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y3": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 204,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y3": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y4": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y3": "ILOGICE2",
            "ILOGIC_X1Y4": "ILOGICE2",
            "ODELAY_X1Y3": "ODELAYE2",
            "ODELAY_X1Y4": "ODELAYE2",
            "OLOGIC_X1Y3": "OLOGICE2",
            "OLOGIC_X1Y4": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y33": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 173,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y33": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y34": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y33": "ILOGICE2",
            "ILOGIC_X1Y34": "ILOGICE2",
            "ODELAY_X1Y33": "ODELAYE2",
            "ODELAY_X1Y34": "ODELAYE2",
            "OLOGIC_X1Y33": "OLOGICE2",
            "OLOGIC_X1Y34": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y35": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y35": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y36": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y35": "ILOGICE2",
            "ILOGIC_X1Y36": "ILOGICE2",
            "ODELAY_X1Y35": "ODELAYE2",
            "ODELAY_X1Y36": "ODELAYE2",
            "OLOGIC_X1Y35": "OLOGICE2",
            "OLOGIC_X1Y36": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y39": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 167,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y39": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y40": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y39": "ILOGICE2",
            "ILOGIC_X1Y40": "ILOGICE2",
            "ODELAY_X1Y39": "ODELAYE2",
            "ODELAY_X1Y40": "ODELAYE2",
            "OLOGIC_X1Y39": "OLOGICE2",
            "OLOGIC_X1Y40": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y41": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 165,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y41": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y42": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y41": "ILOGICE2",
            "ILOGIC_X1Y42": "ILOGICE2",
            "ODELAY_X1Y41": "ODELAYE2",
            "ODELAY_X1Y42": "ODELAYE2",
            "OLOGIC_X1Y41": "OLOGICE2",
            "OLOGIC_X1Y42": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y45": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y45": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y46": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y45": "ILOGICE2",
            "ILOGIC_X1Y46": "ILOGICE2",
            "ODELAY_X1Y45": "ODELAYE2",
            "ODELAY_X1Y46": "ODELAYE2",
            "OLOGIC_X1Y45": "OLOGICE2",
            "OLOGIC_X1Y46": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y47": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 159,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y47": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y48": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y47": "ILOGICE2",
            "ILOGIC_X1Y48": "ILOGICE2",
            "ODELAY_X1Y47": "ODELAYE2",
            "ODELAY_X1Y48": "ODELAYE2",
            "OLOGIC_X1Y47": "OLOGICE2",
            "OLOGIC_X1Y48": "OLOGICE2"
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