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        "type": "BRAM_INT_INTERFACE_R"
    },
    "BRAM_INT_INTERFACE_R_X25Y92": {
        "bits": {},
        "grid_x": 107,
        "grid_y": 8,
        "pin_functions": {},
        "sites": {},
        "type": "BRAM_INT_INTERFACE_R"
    },
    "BRAM_INT_INTERFACE_R_X25Y93": {
        "bits": {},
        "grid_x": 107,
        "grid_y": 7,
        "pin_functions": {},
        "sites": {},
        "type": "BRAM_INT_INTERFACE_R"
    },
    "BRAM_INT_INTERFACE_R_X25Y94": {
        "bits": {},
        "grid_x": 107,
        "grid_y": 6,
        "pin_functions": {},
        "sites": {},
        "type": "BRAM_INT_INTERFACE_R"
    },
    "BRAM_INT_INTERFACE_R_X25Y95": {
        "bits": {},
        "grid_x": 107,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {},
        "type": "BRAM_INT_INTERFACE_R"
    },
    "BRAM_INT_INTERFACE_R_X25Y96": {
        "bits": {},
        "grid_x": 107,
        "grid_y": 4,
        "pin_functions": {},
        "sites": {},
        "type": "BRAM_INT_INTERFACE_R"
    },
    "BRAM_INT_INTERFACE_R_X25Y97": {
        "bits": {},
        "grid_x": 107,
        "grid_y": 3,
        "pin_functions": {},
        "sites": {},
        "type": "BRAM_INT_INTERFACE_R"
    },
    "BRAM_INT_INTERFACE_R_X25Y98": {
        "bits": {},
        "grid_x": 107,
        "grid_y": 2,
        "pin_functions": {},
        "sites": {},
        "type": "BRAM_INT_INTERFACE_R"
    },
    "BRAM_INT_INTERFACE_R_X25Y99": {
        "bits": {},
        "grid_x": 107,
        "grid_y": 1,
        "pin_functions": {},
        "sites": {},
        "type": "BRAM_INT_INTERFACE_R"
    },
    "BRAM_L_X18Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y0": "FIFO18E1",
            "RAMB18_X1Y1": "RAMB18E1",
            "RAMB36_X1Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y4": "FIFO18E1",
            "RAMB18_X1Y5": "RAMB18E1",
            "RAMB36_X1Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y6": "FIFO18E1",
            "RAMB18_X1Y7": "RAMB18E1",
            "RAMB36_X1Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y8": "FIFO18E1",
            "RAMB18_X1Y9": "RAMB18E1",
            "RAMB36_X1Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y10": "FIFO18E1",
            "RAMB18_X1Y11": "RAMB18E1",
            "RAMB36_X1Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y12": "FIFO18E1",
            "RAMB18_X1Y13": "RAMB18E1",
            "RAMB36_X1Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y14": "FIFO18E1",
            "RAMB18_X1Y15": "RAMB18E1",
            "RAMB36_X1Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y16": "FIFO18E1",
            "RAMB18_X1Y17": "RAMB18E1",
            "RAMB36_X1Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y18": "FIFO18E1",
            "RAMB18_X1Y19": "RAMB18E1",
            "RAMB36_X1Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y2": "FIFO18E1",
            "RAMB18_X1Y3": "RAMB18E1",
            "RAMB36_X1Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y20": "FIFO18E1",
            "RAMB18_X1Y21": "RAMB18E1",
            "RAMB36_X1Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y22": "FIFO18E1",
            "RAMB18_X1Y23": "RAMB18E1",
            "RAMB36_X1Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y24": "FIFO18E1",
            "RAMB18_X1Y25": "RAMB18E1",
            "RAMB36_X1Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y26": "FIFO18E1",
            "RAMB18_X1Y27": "RAMB18E1",
            "RAMB36_X1Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y28": "FIFO18E1",
            "RAMB18_X1Y29": "RAMB18E1",
            "RAMB36_X1Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y30": "FIFO18E1",
            "RAMB18_X1Y31": "RAMB18E1",
            "RAMB36_X1Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y32": "FIFO18E1",
            "RAMB18_X1Y33": "RAMB18E1",
            "RAMB36_X1Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y34": "FIFO18E1",
            "RAMB18_X1Y35": "RAMB18E1",
            "RAMB36_X1Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y36": "FIFO18E1",
            "RAMB18_X1Y37": "RAMB18E1",
            "RAMB36_X1Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y38": "FIFO18E1",
            "RAMB18_X1Y39": "RAMB18E1",
            "RAMB36_X1Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 40,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y0": "FIFO18E1",
            "RAMB18_X0Y1": "RAMB18E1",
            "RAMB36_X0Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 40,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y4": "FIFO18E1",
            "RAMB18_X0Y5": "RAMB18E1",
            "RAMB36_X0Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 40,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y6": "FIFO18E1",
            "RAMB18_X0Y7": "RAMB18E1",
            "RAMB36_X0Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 40,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y8": "FIFO18E1",
            "RAMB18_X0Y9": "RAMB18E1",
            "RAMB36_X0Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 40,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y10": "FIFO18E1",
            "RAMB18_X0Y11": "RAMB18E1",
            "RAMB36_X0Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 40,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y12": "FIFO18E1",
            "RAMB18_X0Y13": "RAMB18E1",
            "RAMB36_X0Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 40,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y14": "FIFO18E1",
            "RAMB18_X0Y15": "RAMB18E1",
            "RAMB36_X0Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 40,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y16": "FIFO18E1",
            "RAMB18_X0Y17": "RAMB18E1",
            "RAMB36_X0Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 40,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y18": "FIFO18E1",
            "RAMB18_X0Y19": "RAMB18E1",
            "RAMB36_X0Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 40,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y2": "FIFO18E1",
            "RAMB18_X0Y3": "RAMB18E1",
            "RAMB36_X0Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 40,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y20": "FIFO18E1",
            "RAMB18_X0Y21": "RAMB18E1",
            "RAMB36_X0Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 40,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y22": "FIFO18E1",
            "RAMB18_X0Y23": "RAMB18E1",
            "RAMB36_X0Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 40,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y24": "FIFO18E1",
            "RAMB18_X0Y25": "RAMB18E1",
            "RAMB36_X0Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 40,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y26": "FIFO18E1",
            "RAMB18_X0Y27": "RAMB18E1",
            "RAMB36_X0Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 40,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y28": "FIFO18E1",
            "RAMB18_X0Y29": "RAMB18E1",
            "RAMB36_X0Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 40,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y30": "FIFO18E1",
            "RAMB18_X0Y31": "RAMB18E1",
            "RAMB36_X0Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 40,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y32": "FIFO18E1",
            "RAMB18_X0Y33": "RAMB18E1",
            "RAMB36_X0Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 40,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y34": "FIFO18E1",
            "RAMB18_X0Y35": "RAMB18E1",
            "RAMB36_X0Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 40,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y36": "FIFO18E1",
            "RAMB18_X0Y37": "RAMB18E1",
            "RAMB36_X0Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 40,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y38": "FIFO18E1",
            "RAMB18_X0Y39": "RAMB18E1",
            "RAMB36_X0Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_R_X25Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y0": "FIFO18E1",
            "RAMB18_X2Y1": "RAMB18E1",
            "RAMB36_X2Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y4": "FIFO18E1",
            "RAMB18_X2Y5": "RAMB18E1",
            "RAMB36_X2Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y6": "FIFO18E1",
            "RAMB18_X2Y7": "RAMB18E1",
            "RAMB36_X2Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y8": "FIFO18E1",
            "RAMB18_X2Y9": "RAMB18E1",
            "RAMB36_X2Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y10": "FIFO18E1",
            "RAMB18_X2Y11": "RAMB18E1",
            "RAMB36_X2Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y12": "FIFO18E1",
            "RAMB18_X2Y13": "RAMB18E1",
            "RAMB36_X2Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y14": "FIFO18E1",
            "RAMB18_X2Y15": "RAMB18E1",
            "RAMB36_X2Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y16": "FIFO18E1",
            "RAMB18_X2Y17": "RAMB18E1",
            "RAMB36_X2Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y18": "FIFO18E1",
            "RAMB18_X2Y19": "RAMB18E1",
            "RAMB36_X2Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y2": "FIFO18E1",
            "RAMB18_X2Y3": "RAMB18E1",
            "RAMB36_X2Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 108,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y20": "FIFO18E1",
            "RAMB18_X2Y21": "RAMB18E1",
            "RAMB36_X2Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 108,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y22": "FIFO18E1",
            "RAMB18_X2Y23": "RAMB18E1",
            "RAMB36_X2Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 108,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y24": "FIFO18E1",
            "RAMB18_X2Y25": "RAMB18E1",
            "RAMB36_X2Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 108,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y26": "FIFO18E1",
            "RAMB18_X2Y27": "RAMB18E1",
            "RAMB36_X2Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 108,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y28": "FIFO18E1",
            "RAMB18_X2Y29": "RAMB18E1",
            "RAMB36_X2Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 108,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y30": "FIFO18E1",
            "RAMB18_X2Y31": "RAMB18E1",
            "RAMB36_X2Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 108,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y32": "FIFO18E1",
            "RAMB18_X2Y33": "RAMB18E1",
            "RAMB36_X2Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 108,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y34": "FIFO18E1",
            "RAMB18_X2Y35": "RAMB18E1",
            "RAMB36_X2Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 108,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y36": "FIFO18E1",
            "RAMB18_X2Y37": "RAMB18E1",
            "RAMB36_X2Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 108,
        "grid_y": 5,
        "pin_functions": {},
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        "type": "CLK_FEED"
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        "type": "CLK_FEED"
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        "type": "CLK_FEED"
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        "type": "CLK_FEED"
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        "type": "CLK_FEED"
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                "offset": 42,
                "words": 18
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        },
        "clock_region": "X1Y0",
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        "grid_y": 78,
        "pin_functions": {},
        "sites": {
            "BUFHCE_X0Y0": "BUFHCE",
            "BUFHCE_X0Y1": "BUFHCE",
            "BUFHCE_X0Y10": "BUFHCE",
            "BUFHCE_X0Y11": "BUFHCE",
            "BUFHCE_X0Y2": "BUFHCE",
            "BUFHCE_X0Y3": "BUFHCE",
            "BUFHCE_X0Y4": "BUFHCE",
            "BUFHCE_X0Y5": "BUFHCE",
            "BUFHCE_X0Y6": "BUFHCE",
            "BUFHCE_X0Y7": "BUFHCE",
            "BUFHCE_X0Y8": "BUFHCE",
            "BUFHCE_X0Y9": "BUFHCE",
            "BUFHCE_X1Y0": "BUFHCE",
            "BUFHCE_X1Y1": "BUFHCE",
            "BUFHCE_X1Y10": "BUFHCE",
            "BUFHCE_X1Y11": "BUFHCE",
            "BUFHCE_X1Y2": "BUFHCE",
            "BUFHCE_X1Y3": "BUFHCE",
            "BUFHCE_X1Y4": "BUFHCE",
            "BUFHCE_X1Y5": "BUFHCE",
            "BUFHCE_X1Y6": "BUFHCE",
            "BUFHCE_X1Y7": "BUFHCE",
            "BUFHCE_X1Y8": "BUFHCE",
            "BUFHCE_X1Y9": "BUFHCE"
        },
        "type": "CLK_HROW_BOT_R"
    },
    "CLK_HROW_TOP_R_X82Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
                "frames": 30,
                "offset": 42,
                "words": 18
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 82,
        "grid_y": 26,
        "pin_functions": {},
        "sites": {
            "BUFHCE_X0Y12": "BUFHCE",
            "BUFHCE_X0Y13": "BUFHCE",
            "BUFHCE_X0Y14": "BUFHCE",
            "BUFHCE_X0Y15": "BUFHCE",
            "BUFHCE_X0Y16": "BUFHCE",
            "BUFHCE_X0Y17": "BUFHCE",
            "BUFHCE_X0Y18": "BUFHCE",
            "BUFHCE_X0Y19": "BUFHCE",
            "BUFHCE_X0Y20": "BUFHCE",
            "BUFHCE_X0Y21": "BUFHCE",
            "BUFHCE_X0Y22": "BUFHCE",
            "BUFHCE_X0Y23": "BUFHCE",
            "BUFHCE_X1Y12": "BUFHCE",
            "BUFHCE_X1Y13": "BUFHCE",
            "BUFHCE_X1Y14": "BUFHCE",
            "BUFHCE_X1Y15": "BUFHCE",
            "BUFHCE_X1Y16": "BUFHCE",
            "BUFHCE_X1Y17": "BUFHCE",
            "BUFHCE_X1Y18": "BUFHCE",
            "BUFHCE_X1Y19": "BUFHCE",
            "BUFHCE_X1Y20": "BUFHCE",
            "BUFHCE_X1Y21": "BUFHCE",
            "BUFHCE_X1Y22": "BUFHCE",
            "BUFHCE_X1Y23": "BUFHCE"
        },
        "type": "CLK_HROW_TOP_R"
    },
    "CLK_MTBF2_X82Y47": {
        "bits": {},
        "grid_x": 82,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_MTBF2"
    },
    "CLK_PMV2_SVT_X82Y34": {
        "bits": {},
        "grid_x": 82,
        "grid_y": 70,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_PMV2_SVT"
    },
    "CLK_PMV2_X82Y43": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 82,
        "grid_y": 61,
        "pin_functions": {},
        "sites": {
            "PMV_X0Y2": "PMV2"
        },
        "type": "CLK_PMV2"
    },
    "CLK_PMVIOB_X82Y18": {
        "bits": {},
        "grid_x": 82,
        "grid_y": 86,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_PMVIOB"
    },
    "CLK_PMV_X82Y2": {
        "bits": {},
        "grid_x": 82,
        "grid_y": 102,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_PMV"
    },
    "CLK_TERM_X82Y0": {
        "bits": {},
        "grid_x": 82,
        "grid_y": 104,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_TERM"
    },
    "CLK_TERM_X82Y104": {
        "bits": {},
        "grid_x": 82,
        "grid_y": 0,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_TERM"
    },
    "CMT_FIFO_L_X120Y20": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 120,
        "grid_y": 84,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y1": "IN_FIFO",
            "OUT_FIFO_X0Y1": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X120Y33": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 120,
        "grid_y": 71,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y2": "IN_FIFO",
            "OUT_FIFO_X0Y2": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X120Y45": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 120,
        "grid_y": 59,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y3": "IN_FIFO",
            "OUT_FIFO_X0Y3": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X120Y60": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 120,
        "grid_y": 44,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y4": "IN_FIFO",
            "OUT_FIFO_X0Y4": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X120Y72": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 120,
        "grid_y": 32,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y5": "IN_FIFO",
            "OUT_FIFO_X0Y5": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X120Y8": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 120,
        "grid_y": 96,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y0": "IN_FIFO",
            "OUT_FIFO_X0Y0": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X120Y85": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 120,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y6": "IN_FIFO",
            "OUT_FIFO_X0Y6": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X120Y97": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 120,
        "grid_y": 7,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y7": "IN_FIFO",
            "OUT_FIFO_X0Y7": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_PMV_L_X120Y1": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X120Y103": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 1,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X120Y51": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X120Y53": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_TOP_L_LOWER_B_X119Y61": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 119,
        "grid_y": 43,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X0Y1": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_B_X119Y9": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 119,
        "grid_y": 95,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X0Y0": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_T_X119Y18": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 119,
        "grid_y": 86,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y0": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y1": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y0": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y1": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_LOWER_T_X119Y70": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 119,
        "grid_y": 34,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y4": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y5": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y4": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y5": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_UPPER_B_X119Y31": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 119,
        "grid_y": 73,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y2": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y3": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y2": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y3": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y0": "PHASER_REF",
            "PHY_CONTROL_X0Y0": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_B_X119Y83": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 119,
        "grid_y": 21,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y6": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y7": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y6": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y7": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y1": "PHASER_REF",
            "PHY_CONTROL_X0Y1": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_T_X119Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 119,
        "grid_y": 60,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X0Y0": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "CMT_TOP_L_UPPER_T_X119Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 119,
        "grid_y": 8,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X0Y1": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "DSP_L_X22Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y0": "DSP48E1",
            "DSP48_X1Y1": "DSP48E1",
            "TIEOFF_X23Y0": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y4": "DSP48E1",
            "DSP48_X1Y5": "DSP48E1",
            "TIEOFF_X23Y10": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y6": "DSP48E1",
            "DSP48_X1Y7": "DSP48E1",
            "TIEOFF_X23Y15": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y8": "DSP48E1",
            "DSP48_X1Y9": "DSP48E1",
            "TIEOFF_X23Y20": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y10": "DSP48E1",
            "DSP48_X1Y11": "DSP48E1",
            "TIEOFF_X23Y25": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y12": "DSP48E1",
            "DSP48_X1Y13": "DSP48E1",
            "TIEOFF_X23Y30": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y14": "DSP48E1",
            "DSP48_X1Y15": "DSP48E1",
            "TIEOFF_X23Y35": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y16": "DSP48E1",
            "DSP48_X1Y17": "DSP48E1",
            "TIEOFF_X23Y40": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y18": "DSP48E1",
            "DSP48_X1Y19": "DSP48E1",
            "TIEOFF_X23Y45": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y2": "DSP48E1",
            "DSP48_X1Y3": "DSP48E1",
            "TIEOFF_X23Y5": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 99,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y20": "DSP48E1",
            "DSP48_X1Y21": "DSP48E1",
            "TIEOFF_X23Y50": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 99,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y22": "DSP48E1",
            "DSP48_X1Y23": "DSP48E1",
            "TIEOFF_X23Y55": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 99,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y24": "DSP48E1",
            "DSP48_X1Y25": "DSP48E1",
            "TIEOFF_X23Y60": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 99,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y26": "DSP48E1",
            "DSP48_X1Y27": "DSP48E1",
            "TIEOFF_X23Y65": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 99,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y28": "DSP48E1",
            "DSP48_X1Y29": "DSP48E1",
            "TIEOFF_X23Y70": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 99,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y30": "DSP48E1",
            "DSP48_X1Y31": "DSP48E1",
            "TIEOFF_X23Y75": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 99,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y32": "DSP48E1",
            "DSP48_X1Y33": "DSP48E1",
            "TIEOFF_X23Y80": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 99,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y34": "DSP48E1",
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            "TIEOFF_X0Y20": "TIEOFF"
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y65": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 32,
        "grid_y": 35,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y66": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y67": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 33,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y68": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y69": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y7": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y70": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 42,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y71": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y72": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y73": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "sites": {
            "TIEOFF_X0Y74": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y75": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 53,
                "words": 2
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        },
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            "TIEOFF_X0Y76": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 55,
                "words": 2
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        },
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            "TIEOFF_X0Y77": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 57,
                "words": 2
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        },
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            "TIEOFF_X0Y78": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 59,
                "words": 2
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        },
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            "TIEOFF_X0Y79": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
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                "words": 2
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        },
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            "TIEOFF_X0Y8": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 61,
                "words": 2
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            "TIEOFF_X0Y80": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X0Y81": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 65,
                "words": 2
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        },
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            "TIEOFF_X0Y82": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y83": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y84": {
        "bits": {
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                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "sites": {
            "TIEOFF_X0Y84": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
        "clock_region": "X0Y1",
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            "TIEOFF_X0Y85": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 73,
                "words": 2
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        },
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            "TIEOFF_X0Y86": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 75,
                "words": 2
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        },
        "clock_region": "X0Y1",
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            "TIEOFF_X0Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 77,
                "words": 2
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        },
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            "TIEOFF_X0Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 79,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y89": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X0Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 81,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y90": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 83,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y91": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 85,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y92": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 87,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y93": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 6,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y94": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 91,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y95": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 93,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 4,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 95,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 3,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 97,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 2,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 1,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 70,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y0": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 70,
        "grid_y": 102,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y1": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 70,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 70,
        "grid_y": 92,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 70,
        "grid_y": 91,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 70,
        "grid_y": 90,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 70,
        "grid_y": 89,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 70,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 70,
        "grid_y": 87,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 70,
        "grid_y": 86,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 70,
        "grid_y": 85,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 70,
        "grid_y": 84,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 4,
                "words": 2
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                "baseaddr": "0x00401100",
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    "INT_L_X10Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 70,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y65": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y66": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y67": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y68": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y69": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "grid_y": 96,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y7": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y70": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y71": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y72": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y73": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y74": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y75": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y76": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y77": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y78": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
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                "offset": 59,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X11Y79": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 16,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y8": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y80": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y81": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y82": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y83": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
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                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y84": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
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                "offset": 71,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y85": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
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                "offset": 75,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X11Y87": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
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                "offset": 77,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 79,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "grid_y": 11,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y89": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "grid_y": 94,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 81,
                "words": 2
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        },
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        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y90": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 83,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y91": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y92": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y93": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
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                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 6,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y94": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 91,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y95": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 93,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 4,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 95,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 3,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 97,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 70,
        "grid_y": 2,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 1,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 74,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y0": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 74,
        "grid_y": 102,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y1": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 74,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 74,
        "grid_y": 92,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 91,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 74,
        "grid_y": 90,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 74,
        "grid_y": 89,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 74,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 74,
        "grid_y": 87,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 74,
        "grid_y": 86,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 74,
        "grid_y": 85,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 74,
        "grid_y": 84,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 4,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 74,
        "grid_y": 101,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y2": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y20": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 42,
                "words": 2
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        },
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        "grid_y": 82,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y22": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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                "offset": 46,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y23": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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                "offset": 48,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X13Y24": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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                "words": 2
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        },
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            "TIEOFF_X13Y25": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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                "offset": 53,
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            "TIEOFF_X13Y26": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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                "offset": 55,
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            "TIEOFF_X13Y27": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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                "words": 2
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            "TIEOFF_X13Y28": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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            "TIEOFF_X13Y29": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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        },
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            "TIEOFF_X13Y3": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00401200",
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            "TIEOFF_X13Y30": "TIEOFF"
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        "bits": {
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        },
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            "TIEOFF_X13Y31": "TIEOFF"
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    "INT_L_X12Y32": {
        "bits": {
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                "baseaddr": "0x00401200",
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        },
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            "TIEOFF_X13Y32": "TIEOFF"
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    "INT_L_X12Y33": {
        "bits": {
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                "baseaddr": "0x00401200",
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                "words": 2
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    "INT_L_X12Y34": {
        "bits": {
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                "words": 2
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            "TIEOFF_X13Y34": "TIEOFF"
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    "INT_L_X12Y35": {
        "bits": {
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                "baseaddr": "0x00401200",
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                "words": 2
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    "INT_L_X12Y36": {
        "bits": {
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                "baseaddr": "0x00401200",
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                "words": 2
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            "TIEOFF_X13Y36": "TIEOFF"
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    "INT_L_X12Y37": {
        "bits": {
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                "words": 2
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            "TIEOFF_X13Y37": "TIEOFF"
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        "bits": {
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            "TIEOFF_X13Y38": "TIEOFF"
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            "TIEOFF_X13Y39": "TIEOFF"
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            "TIEOFF_X13Y4": "TIEOFF"
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                "baseaddr": "0x00401200",
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            "TIEOFF_X13Y41": "TIEOFF"
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        "bits": {
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            "TIEOFF_X13Y42": "TIEOFF"
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    "INT_L_X12Y43": {
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            "TIEOFF_X13Y44": "TIEOFF"
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                "baseaddr": "0x00401200",
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            "TIEOFF_X13Y46": "TIEOFF"
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            "TIEOFF_X13Y47": "TIEOFF"
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        "bits": {
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        },
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            "TIEOFF_X13Y48": "TIEOFF"
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    "INT_L_X12Y49": {
        "bits": {
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                "baseaddr": "0x00401200",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X13Y49": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00401200",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X13Y5": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y50": {
        "bits": {
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                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y50": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "grid_y": 50,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y51": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y52": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y52": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "offset": 6,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y53": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y54": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y54": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "offset": 10,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y55": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y56": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 12,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y56": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y57": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y58": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "offset": 16,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y58": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y59": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 12,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "grid_y": 97,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y6": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y60": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y61": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y62": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y62": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y63": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y64": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y64": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y1",
        "grid_x": 74,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y65": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y66": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y67": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 36,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y68": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y69": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X13Y7": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
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            "TIEOFF_X13Y70": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "offset": 42,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X13Y71": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "words": 2
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        },
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            "TIEOFF_X13Y72": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "offset": 46,
                "words": 2
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        },
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            "TIEOFF_X13Y73": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "offset": 48,
                "words": 2
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        },
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            "TIEOFF_X13Y74": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "words": 2
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        },
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            "TIEOFF_X13Y75": "TIEOFF"
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    },
    "INT_L_X12Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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        },
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            "TIEOFF_X13Y76": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "words": 2
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        },
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            "TIEOFF_X13Y77": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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            "TIEOFF_X13Y78": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y79": {
        "bits": {
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                "words": 2
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            "TIEOFF_X13Y79": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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        },
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            "TIEOFF_X13Y8": "TIEOFF"
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    "INT_L_X12Y80": {
        "bits": {
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                "baseaddr": "0x00001200",
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                "words": 2
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            "TIEOFF_X13Y80": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "words": 2
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            "TIEOFF_X13Y81": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "offset": 65,
                "words": 2
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            "TIEOFF_X13Y82": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y83": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 67,
                "words": 2
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            "TIEOFF_X13Y83": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y84": {
        "bits": {
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                "baseaddr": "0x00001200",
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                "words": 2
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            "TIEOFF_X13Y84": "TIEOFF"
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    "INT_L_X12Y85": {
        "bits": {
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                "baseaddr": "0x00001200",
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                "words": 2
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            "TIEOFF_X13Y85": "TIEOFF"
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    },
    "INT_L_X12Y86": {
        "bits": {
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                "baseaddr": "0x00001200",
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                "words": 2
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            "TIEOFF_X13Y86": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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            "TIEOFF_X13Y87": "TIEOFF"
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    },
    "INT_L_X12Y88": {
        "bits": {
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                "baseaddr": "0x00001200",
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                "offset": 77,
                "words": 2
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            "TIEOFF_X13Y88": "TIEOFF"
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    },
    "INT_L_X12Y89": {
        "bits": {
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                "words": 2
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            "TIEOFF_X13Y89": "TIEOFF"
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    },
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        "bits": {
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            "TIEOFF_X13Y9": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y90": {
        "bits": {
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                "baseaddr": "0x00001200",
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                "words": 2
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X12Y91": {
        "bits": {
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                "baseaddr": "0x00001200",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X13Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y92": {
        "bits": {
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                "baseaddr": "0x00001200",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X13Y92": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "offset": 87,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X13Y93": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "offset": 89,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y94": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 91,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y95": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 93,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 4,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 95,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 3,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 97,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 2,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 1,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y0": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 102,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y1": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 92,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 91,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 79,
        "grid_y": 90,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 79,
        "grid_y": 89,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 79,
        "grid_y": 87,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 79,
        "grid_y": 86,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 79,
        "grid_y": 85,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y19": {
        "bits": {
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            "TIEOFF_X15Y19": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00401300",
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                "words": 2
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            "TIEOFF_X15Y2": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401300",
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            "TIEOFF_X15Y63": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
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                "offset": 28,
                "words": 2
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            "TIEOFF_X15Y64": "TIEOFF"
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                "baseaddr": "0x00001300",
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                "words": 2
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            "TIEOFF_X15Y65": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X15Y66": "TIEOFF"
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        "bits": {
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            "TIEOFF_X15Y67": "TIEOFF"
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                "baseaddr": "0x00001300",
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            "TIEOFF_X15Y68": "TIEOFF"
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            "TIEOFF_X15Y69": "TIEOFF"
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            "TIEOFF_X15Y7": "TIEOFF"
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                "words": 2
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            "TIEOFF_X15Y96": "TIEOFF"
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    "INT_L_X14Y98": {
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            "TIEOFF_X15Y98": "TIEOFF"
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            "TIEOFF_X15Y99": "TIEOFF"
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        "type": "INT_L"
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        "type": "INT_L"
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    "INT_L_X16Y16": {
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            "TIEOFF_X17Y16": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X16Y17": {
        "bits": {
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        "sites": {
            "TIEOFF_X17Y17": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 85,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
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        "grid_y": 84,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 4,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 101,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y2": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y20": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 42,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X17Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 44,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y22": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "words": 2
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        },
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            "TIEOFF_X17Y23": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 48,
                "words": 2
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        },
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            "TIEOFF_X17Y24": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y25": {
        "bits": {
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                "baseaddr": "0x00401400",
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        },
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            "TIEOFF_X17Y25": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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        },
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            "TIEOFF_X17Y26": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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        },
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            "TIEOFF_X17Y27": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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        },
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            "TIEOFF_X17Y28": "TIEOFF"
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    },
    "INT_L_X16Y29": {
        "bits": {
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                "baseaddr": "0x00401400",
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        },
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            "TIEOFF_X17Y29": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        },
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            "TIEOFF_X17Y3": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X16Y30": {
        "bits": {
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                "baseaddr": "0x00401400",
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            "TIEOFF_X17Y30": "TIEOFF"
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    "INT_L_X16Y31": {
        "bits": {
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                "baseaddr": "0x00401400",
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            "TIEOFF_X17Y31": "TIEOFF"
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    "INT_L_X16Y32": {
        "bits": {
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            "TIEOFF_X17Y32": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X16Y33": {
        "bits": {
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                "baseaddr": "0x00401400",
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        },
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            "TIEOFF_X17Y33": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X16Y34": {
        "bits": {
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            "TIEOFF_X17Y34": "TIEOFF"
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    "INT_L_X16Y35": {
        "bits": {
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    "INT_L_X16Y36": {
        "bits": {
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    "INT_L_X16Y37": {
        "bits": {
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        "bits": {
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            "TIEOFF_X17Y39": "TIEOFF"
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            "TIEOFF_X17Y4": "TIEOFF"
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    "INT_L_X16Y40": {
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    "INT_L_X16Y41": {
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    "INT_L_X16Y42": {
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    "INT_L_X16Y43": {
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            "TIEOFF_X17Y43": "TIEOFF"
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    "INT_L_X16Y44": {
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            "TIEOFF_X17Y44": "TIEOFF"
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    "INT_L_X16Y45": {
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            "TIEOFF_X17Y45": "TIEOFF"
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    "INT_L_X16Y46": {
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            "TIEOFF_X17Y46": "TIEOFF"
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    },
    "INT_L_X16Y47": {
        "bits": {
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                "baseaddr": "0x00401400",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X17Y47": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y48": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 97,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y48": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y49": {
        "bits": {
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                "baseaddr": "0x00401400",
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                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X17Y49": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y5": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 0,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y50": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X16Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X17Y51": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y52": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y52": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y53": {
        "bits": {
            "CLB_IO_CLK": {
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X17Y53": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y54": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y54": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y55": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y56": {
        "bits": {
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                "baseaddr": "0x00001400",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y56": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y57": {
        "bits": {
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                "baseaddr": "0x00001400",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X17Y57": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y58": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y58": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y59": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y6": {
        "bits": {
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                "baseaddr": "0x00401400",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y6": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y60": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y61": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y62": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y62": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y63": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y64": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y64": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y65": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 32,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y66": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 34,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y67": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 36,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X17Y68": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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        },
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            "TIEOFF_X17Y69": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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        },
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            "TIEOFF_X17Y7": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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        },
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            "TIEOFF_X17Y70": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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        },
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            "TIEOFF_X17Y71": "TIEOFF"
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    },
    "INT_L_X16Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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            "TIEOFF_X17Y72": "TIEOFF"
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    },
    "INT_L_X16Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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        },
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            "TIEOFF_X17Y73": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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        },
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            "TIEOFF_X17Y74": "TIEOFF"
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    "INT_L_X16Y75": {
        "bits": {
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                "baseaddr": "0x00001400",
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        },
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            "TIEOFF_X17Y75": "TIEOFF"
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    },
    "INT_L_X16Y76": {
        "bits": {
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                "baseaddr": "0x00001400",
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        },
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            "TIEOFF_X17Y76": "TIEOFF"
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    },
    "INT_L_X16Y77": {
        "bits": {
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        },
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            "TIEOFF_X17Y77": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y78": {
        "bits": {
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            "TIEOFF_X17Y78": "TIEOFF"
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    },
    "INT_L_X16Y79": {
        "bits": {
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            "TIEOFF_X17Y79": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X17Y8": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y80": {
        "bits": {
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                "baseaddr": "0x00001400",
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        },
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            "TIEOFF_X17Y80": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X16Y81": {
        "bits": {
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                "baseaddr": "0x00001400",
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                "offset": 63,
                "words": 2
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        },
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            "TIEOFF_X17Y81": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X16Y82": {
        "bits": {
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                "baseaddr": "0x00001400",
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                "offset": 65,
                "words": 2
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        },
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            "TIEOFF_X17Y82": "TIEOFF"
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    "INT_L_X16Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "words": 2
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        },
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            "TIEOFF_X17Y83": "TIEOFF"
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    "INT_L_X16Y84": {
        "bits": {
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                "baseaddr": "0x00001400",
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                "offset": 69,
                "words": 2
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            "TIEOFF_X17Y84": "TIEOFF"
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    "INT_L_X16Y85": {
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            "TIEOFF_X17Y85": "TIEOFF"
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    },
    "INT_L_X16Y86": {
        "bits": {
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                "words": 2
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            "TIEOFF_X17Y86": "TIEOFF"
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    "INT_L_X16Y87": {
        "bits": {
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            "TIEOFF_X17Y87": "TIEOFF"
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    "INT_L_X16Y88": {
        "bits": {
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                "baseaddr": "0x00001400",
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                "words": 2
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            "TIEOFF_X17Y88": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X16Y89": {
        "bits": {
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                "baseaddr": "0x00001400",
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                "words": 2
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        },
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            "TIEOFF_X17Y89": "TIEOFF"
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    },
    "INT_L_X16Y9": {
        "bits": {
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                "baseaddr": "0x00401400",
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        "pin_functions": {},
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            "TIEOFF_X17Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 81,
                "words": 2
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            "TIEOFF_X17Y90": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 83,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X17Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 85,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y92": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y93": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 6,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y94": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 91,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y95": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 93,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 95,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 3,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 97,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 2,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 1,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y0": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 91,
        "grid_y": 102,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y1": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 92,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 91,
        "grid_y": 91,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 91,
        "grid_y": 90,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 91,
        "grid_y": 89,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 91,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 91,
        "grid_y": 87,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y17": {
        "bits": {
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                "baseaddr": "0x00401500",
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                "offset": 34,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 36,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 38,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 4,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X19Y2": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 40,
                "words": 2
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        },
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            "TIEOFF_X19Y20": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "words": 2
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        },
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            "TIEOFF_X19Y21": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "words": 2
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        },
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            "TIEOFF_X19Y22": "TIEOFF"
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    "INT_L_X18Y23": {
        "bits": {
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            "TIEOFF_X19Y23": "TIEOFF"
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    "INT_L_X18Y24": {
        "bits": {
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                "baseaddr": "0x00401500",
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    "INT_L_X18Y25": {
        "bits": {
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                "baseaddr": "0x00401500",
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            "TIEOFF_X19Y25": "TIEOFF"
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        "bits": {
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        "bits": {
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    "INT_L_X18Y33": {
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    "INT_L_X18Y34": {
        "bits": {
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    "INT_L_X18Y46": {
        "bits": {
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            "TIEOFF_X19Y46": "TIEOFF"
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    "INT_L_X18Y47": {
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                "baseaddr": "0x00401500",
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        },
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            "TIEOFF_X19Y47": "TIEOFF"
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    "INT_L_X18Y48": {
        "bits": {
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                "baseaddr": "0x00401500",
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            "TIEOFF_X19Y48": "TIEOFF"
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    "INT_L_X18Y49": {
        "bits": {
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                "baseaddr": "0x00401500",
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                "words": 2
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            "TIEOFF_X19Y49": "TIEOFF"
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            "TIEOFF_X19Y5": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00001500",
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            "TIEOFF_X19Y50": "TIEOFF"
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    },
    "INT_L_X18Y51": {
        "bits": {
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        },
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            "TIEOFF_X19Y51": "TIEOFF"
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    },
    "INT_L_X18Y52": {
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        "clock_region": "X1Y1",
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            "TIEOFF_X19Y52": "TIEOFF"
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    "INT_L_X18Y53": {
        "bits": {
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    "INT_L_X18Y54": {
        "bits": {
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    "INT_L_X18Y55": {
        "bits": {
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            "TIEOFF_X19Y55": "TIEOFF"
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    "INT_L_X18Y56": {
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        "type": "INT_L"
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    "INT_L_X18Y57": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X18Y58": {
        "bits": {
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        },
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            "TIEOFF_X19Y58": "TIEOFF"
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    "INT_L_X18Y59": {
        "bits": {
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        },
        "clock_region": "X1Y1",
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        "type": "INT_L"
    },
    "INT_L_X18Y6": {
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        },
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            "TIEOFF_X19Y6": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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        },
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        "sites": {
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        "type": "INT_L"
    },
    "INT_L_X18Y61": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "bits": {
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                "baseaddr": "0x00001500",
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                "offset": 24,
                "words": 2
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        "bits": {
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                "baseaddr": "0x00001500",
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            "TIEOFF_X19Y63": "TIEOFF"
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            "TIEOFF_X19Y64": "TIEOFF"
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        "bits": {
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            "TIEOFF_X19Y65": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00001500",
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        },
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            "TIEOFF_X19Y66": "TIEOFF"
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        "bits": {
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                "words": 2
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                "words": 2
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                "words": 2
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    "INT_L_X18Y97": {
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                "words": 2
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    "INT_L_X18Y98": {
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    "INT_L_X18Y99": {
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                "words": 2
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    "INT_L_X20Y0": {
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00401600",
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            "TIEOFF_X21Y1": "TIEOFF"
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    },
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        "type": "INT_L"
    },
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        },
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        "type": "INT_L"
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X21Y13": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y14": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X21Y14": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y15": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X21Y15": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X20Y16": {
        "bits": {
            "CLB_IO_CLK": {
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    },
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        "bits": {
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                "baseaddr": "0x00401600",
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                "offset": 34,
                "words": 2
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            "TIEOFF_X21Y17": "TIEOFF"
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            "TIEOFF_X21Y18": "TIEOFF"
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        "bits": {
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            "TIEOFF_X21Y19": "TIEOFF"
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        "bits": {
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            "TIEOFF_X21Y2": "TIEOFF"
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        "bits": {
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            "TIEOFF_X21Y20": "TIEOFF"
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            "TIEOFF_X21Y21": "TIEOFF"
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
    },
    "INT_L_X20Y61": {
        "bits": {
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                "baseaddr": "0x00001600",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
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        "grid_x": 95,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y61": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y62": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001600",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y62": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001600",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y63": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y64": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001600",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y64": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001600",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y65": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001600",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y66": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001600",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y67": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001600",
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                "offset": 36,
                "words": 2
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        },
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            "TIEOFF_X21Y68": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001600",
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                "words": 2
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        },
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            "TIEOFF_X21Y69": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401600",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X21Y7": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001600",
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                "words": 2
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        },
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            "TIEOFF_X21Y70": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00001600",
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                "words": 2
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        },
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            "TIEOFF_X21Y71": "TIEOFF"
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    },
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        "bits": {
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                "words": 2
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            "TIEOFF_X21Y72": "TIEOFF"
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    },
    "INT_L_X20Y73": {
        "bits": {
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        },
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            "TIEOFF_X21Y73": "TIEOFF"
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    "INT_L_X20Y74": {
        "bits": {
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                "baseaddr": "0x00001600",
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        },
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            "TIEOFF_X21Y74": "TIEOFF"
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    "INT_L_X20Y75": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X21Y75": "TIEOFF"
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    },
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        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X21Y76": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00001600",
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                "words": 2
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        },
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            "TIEOFF_X21Y77": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "offset": 57,
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        },
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            "TIEOFF_X21Y78": "TIEOFF"
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        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X21Y79": "TIEOFF"
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        "bits": {
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        },
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            "TIEOFF_X21Y8": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "offset": 61,
                "words": 2
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            "TIEOFF_X21Y80": "TIEOFF"
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        "bits": {
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                "words": 2
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            "TIEOFF_X21Y81": "TIEOFF"
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    "INT_L_X20Y82": {
        "bits": {
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                "words": 2
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        "bits": {
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                "words": 2
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                "words": 2
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        },
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            "TIEOFF_X21Y84": "TIEOFF"
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    "INT_L_X20Y85": {
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                "words": 2
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        },
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            "TIEOFF_X21Y85": "TIEOFF"
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                "words": 2
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            "TIEOFF_X21Y86": "TIEOFF"
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    "INT_L_X20Y87": {
        "bits": {
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                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X21Y87": "TIEOFF"
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    },
    "INT_L_X20Y88": {
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                "offset": 77,
                "words": 2
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        },
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                "offset": 79,
                "words": 2
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        },
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        "type": "INT_L"
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        "bits": {
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        "pin_functions": {},
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            "TIEOFF_X21Y9": "TIEOFF"
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    },
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        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 10,
        "pin_functions": {},
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            "TIEOFF_X21Y90": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001600",
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                "offset": 83,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 9,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001600",
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                "offset": 85,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 8,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y92": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001600",
                "frames": 28,
                "offset": 87,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 7,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y93": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001600",
                "frames": 28,
                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 6,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y94": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001600",
                "frames": 28,
                "offset": 91,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y95": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001600",
                "frames": 28,
                "offset": 93,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 4,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001600",
                "frames": 28,
                "offset": 95,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 3,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001600",
                "frames": 28,
                "offset": 97,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 2,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001600",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 1,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 101,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y0": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 101,
        "grid_y": 102,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y1": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 92,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 101,
        "grid_y": 91,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 101,
        "grid_y": 90,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 101,
        "grid_y": 89,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 101,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 101,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
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                "offset": 4,
                "words": 2
            }
        },
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        "pin_functions": {},
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            "TIEOFF_X24Y2": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
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                "offset": 40,
                "words": 2
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        },
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            "TIEOFF_X24Y20": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
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                "words": 2
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        },
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            "TIEOFF_X24Y21": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
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        },
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            "TIEOFF_X24Y22": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
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        },
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            "TIEOFF_X24Y23": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
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        },
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            "TIEOFF_X24Y24": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X22Y25": {
        "bits": {
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                "baseaddr": "0x00401700",
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            "TIEOFF_X24Y25": "TIEOFF"
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    "INT_L_X22Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
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            "TIEOFF_X24Y26": "TIEOFF"
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                "baseaddr": "0x00401700",
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            "TIEOFF_X24Y27": "TIEOFF"
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        "bits": {
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            "TIEOFF_X24Y28": "TIEOFF"
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        "bits": {
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            "TIEOFF_X24Y29": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401700",
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        },
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            "TIEOFF_X24Y3": "TIEOFF"
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        "bits": {
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            "TIEOFF_X24Y30": "TIEOFF"
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        "bits": {
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            "TIEOFF_X24Y31": "TIEOFF"
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    "INT_L_X22Y32": {
        "bits": {
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            "TIEOFF_X24Y32": "TIEOFF"
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    "INT_L_X22Y33": {
        "bits": {
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                "baseaddr": "0x00401700",
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            "TIEOFF_X24Y33": "TIEOFF"
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    "INT_L_X22Y34": {
        "bits": {
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                "baseaddr": "0x00401700",
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            "TIEOFF_X24Y34": "TIEOFF"
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    "INT_L_X22Y35": {
        "bits": {
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            "TIEOFF_X24Y35": "TIEOFF"
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            "TIEOFF_X24Y38": "TIEOFF"
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            "TIEOFF_X24Y39": "TIEOFF"
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            "TIEOFF_X24Y4": "TIEOFF"
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            "TIEOFF_X24Y41": "TIEOFF"
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    "INT_L_X22Y42": {
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            "TIEOFF_X24Y42": "TIEOFF"
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    "INT_L_X22Y43": {
        "bits": {
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                "baseaddr": "0x00401700",
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        },
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            "TIEOFF_X24Y43": "TIEOFF"
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    "INT_L_X22Y44": {
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                "baseaddr": "0x00401700",
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        },
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            "TIEOFF_X24Y44": "TIEOFF"
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    "INT_L_X22Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
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                "offset": 91,
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X24Y45": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y46": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
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                "offset": 93,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y46": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y47": {
        "bits": {
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                "baseaddr": "0x00401700",
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                "offset": 95,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X24Y47": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y48": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X24Y48": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
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                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X24Y49": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 10,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X24Y5": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y50": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 2,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 50,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y51": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y52": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y52": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y53": {
        "bits": {
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                "baseaddr": "0x00001700",
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                "offset": 6,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y53": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y54": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "offset": 8,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y54": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "offset": 10,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y55": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y56": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "offset": 12,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y56": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 14,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y57": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y58": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y58": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y59": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
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                "offset": 12,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 101,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y6": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
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        "grid_x": 101,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y60": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 101,
        "grid_y": 40,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y61": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y62": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 101,
        "grid_y": 39,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y62": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 101,
        "grid_y": 38,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y63": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y64": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 101,
        "grid_y": 37,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y64": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y65": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y66": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y67": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "sites": {
            "TIEOFF_X24Y68": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X24Y69": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X24Y7": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "offset": 40,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X24Y70": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "offset": 42,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X24Y71": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "words": 2
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        },
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            "TIEOFF_X24Y72": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "words": 2
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        },
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            "TIEOFF_X24Y73": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "offset": 48,
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X24Y74": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "offset": 51,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X24Y75": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "offset": 53,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X24Y76": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "offset": 55,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X24Y77": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "offset": 57,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "sites": {
            "TIEOFF_X24Y78": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "offset": 59,
                "words": 2
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        },
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            "TIEOFF_X24Y79": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
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                "offset": 16,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X24Y8": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "offset": 61,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X24Y80": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X24Y81": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X24Y82": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "offset": 67,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X24Y83": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X24Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
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                "offset": 71,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 15,
        "pin_functions": {},
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            "TIEOFF_X24Y85": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 73,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X24Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 77,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y88": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 79,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X24Y89": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y9": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y90": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 83,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 9,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y91": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 85,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 8,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y92": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 87,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 7,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y93": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 101,
        "grid_y": 6,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y94": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 91,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y95": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 93,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 4,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 95,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 101,
        "grid_y": 3,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 97,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 101,
        "grid_y": 2,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 101,
        "grid_y": 1,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401800",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 105,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y0": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401800",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 105,
        "grid_y": 102,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y1": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401800",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 105,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401800",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 105,
        "grid_y": 92,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401800",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 105,
        "grid_y": 91,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401800",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 105,
        "grid_y": 90,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401800",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 105,
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        "pin_functions": {},
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        "bits": {
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                "words": 2
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        },
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        "grid_x": 105,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y6": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y60": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y61": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y62": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y62": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y63": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y64": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X26Y64": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
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                "offset": 30,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X26Y65": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
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        },
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            "TIEOFF_X26Y66": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
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                "words": 2
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        },
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            "TIEOFF_X26Y67": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
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        },
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            "TIEOFF_X26Y68": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X24Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
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        },
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            "TIEOFF_X26Y69": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401800",
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        },
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            "TIEOFF_X26Y7": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00001800",
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            "TIEOFF_X26Y70": "TIEOFF"
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        "bits": {
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            "TIEOFF_X26Y71": "TIEOFF"
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        "bits": {
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            "TIEOFF_X26Y72": "TIEOFF"
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        "bits": {
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            "TIEOFF_X26Y73": "TIEOFF"
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    "INT_L_X24Y74": {
        "bits": {
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            "TIEOFF_X26Y74": "TIEOFF"
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    "INT_L_X24Y75": {
        "bits": {
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            "TIEOFF_X26Y75": "TIEOFF"
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        "bits": {
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    "INT_L_X24Y77": {
        "bits": {
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    "INT_L_X24Y79": {
        "bits": {
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        "bits": {
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    "INT_L_X24Y82": {
        "bits": {
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                "words": 2
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            "TIEOFF_X26Y82": "TIEOFF"
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        "bits": {
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            "TIEOFF_X26Y84": "TIEOFF"
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    "INT_L_X24Y85": {
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            "TIEOFF_X26Y86": "TIEOFF"
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    "INT_L_X24Y87": {
        "bits": {
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                "words": 2
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    "INT_L_X24Y88": {
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                "words": 2
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    },
    "INT_L_X24Y89": {
        "bits": {
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                "words": 2
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            "TIEOFF_X26Y89": "TIEOFF"
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    },
    "INT_L_X24Y9": {
        "bits": {
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                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X26Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
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                "offset": 81,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X26Y90": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
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                "offset": 83,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
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                "offset": 85,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 8,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y92": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
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                "offset": 87,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y93": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
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                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y94": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
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                "offset": 91,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y95": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 93,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y96": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 95,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 3,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 97,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y98": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 1,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y99": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 2,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 102,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y1": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 92,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 111,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 90,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 89,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 87,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 86,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 4,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X28Y2": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y20": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X28Y21": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 44,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X28Y22": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y23": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 48,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y24": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 51,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y25": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 53,
                "words": 2
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        },
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            "TIEOFF_X28Y26": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y27": "TIEOFF"
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    },
    "INT_L_X26Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 57,
                "words": 2
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        },
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            "TIEOFF_X28Y28": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 59,
                "words": 2
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        },
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            "TIEOFF_X28Y29": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 6,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y3": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 61,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y30": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y31": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X28Y32": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 67,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X28Y33": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X28Y34": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 71,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y35": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 73,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y36": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y37": {
        "bits": {
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                "baseaddr": "0x00401900",
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                "offset": 75,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y37": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y38": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 77,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y38": "TIEOFF"
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    "INT_L_X26Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 79,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X28Y39": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 8,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X28Y4": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y40": {
        "bits": {
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                "baseaddr": "0x00401900",
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                "offset": 81,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X28Y40": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 83,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "sites": {
            "TIEOFF_X28Y41": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y42": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 85,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y42": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 87,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y43": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y44": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 91,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y45": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y46": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 93,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 56,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y46": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 95,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y47": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y48": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 97,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y48": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 53,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y49": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 10,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y5": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y50": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 50,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y51": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y52": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 4,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 49,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y52": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 6,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 48,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y53": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y54": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 8,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 47,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y54": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 10,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y55": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y56": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 12,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 45,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y56": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 14,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 44,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y57": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y58": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 43,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y58": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 18,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 42,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y59": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 12,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 97,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y6": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y60": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 40,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y61": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y62": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 39,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y62": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 38,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y63": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y64": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 37,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y64": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y65": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 35,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y66": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 34,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y67": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 33,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y68": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 32,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y69": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 14,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 96,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y7": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y70": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 30,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y71": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 29,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y72": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 28,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y73": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 27,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y74": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y75": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 24,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y76": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 23,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y77": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 22,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y78": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 21,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y79": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 95,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y8": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y80": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y81": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 18,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y82": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 17,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y83": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 16,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y84": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y85": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 14,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 13,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y87": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 12,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 11,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y89": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 18,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 94,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y9": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y90": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 83,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 9,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y91": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 85,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 8,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y92": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 87,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 7,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y93": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 6,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y94": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 91,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y95": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 93,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 4,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 95,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 3,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 97,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 2,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 1,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y0": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 102,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y1": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 92,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 91,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
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        "grid_x": 115,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
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        "grid_y": 89,
        "pin_functions": {},
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            "TIEOFF_X30Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
                "frames": 28,
                "offset": 30,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X30Y16": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
                "frames": 28,
                "offset": 34,
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        "pin_functions": {},
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            "TIEOFF_X30Y17": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
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            "TIEOFF_X30Y18": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
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            "TIEOFF_X30Y19": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
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            "TIEOFF_X30Y2": "TIEOFF"
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    },
    "INT_L_X28Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
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            "TIEOFF_X30Y20": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
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            "TIEOFF_X30Y21": "TIEOFF"
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    "INT_L_X28Y22": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X30Y22": "TIEOFF"
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    "INT_L_X28Y23": {
        "bits": {
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                "baseaddr": "0x00401A00",
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                "baseaddr": "0x00401A00",
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            "TIEOFF_X30Y24": "TIEOFF"
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            "TIEOFF_X30Y25": "TIEOFF"
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            "TIEOFF_X30Y26": "TIEOFF"
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            "TIEOFF_X30Y27": "TIEOFF"
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            "TIEOFF_X30Y28": "TIEOFF"
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            "TIEOFF_X30Y3": "TIEOFF"
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    "INT_L_X28Y42": {
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    "INT_L_X28Y44": {
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    "INT_L_X28Y45": {
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    "INT_L_X28Y46": {
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                "baseaddr": "0x00401A00",
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    "INT_L_X28Y47": {
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                "baseaddr": "0x00401A00",
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                "baseaddr": "0x00401A00",
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                "words": 2
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    "INT_L_X28Y49": {
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            "TIEOFF_X30Y49": "TIEOFF"
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    "INT_L_X28Y5": {
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                "baseaddr": "0x00401A00",
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            "TIEOFF_X30Y5": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y50": {
        "bits": {
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                "baseaddr": "0x00001A00",
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        },
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            "TIEOFF_X30Y50": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y51": {
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                "baseaddr": "0x00001A00",
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        },
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            "TIEOFF_X30Y51": "TIEOFF"
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    "INT_L_X28Y52": {
        "bits": {
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                "baseaddr": "0x00001A00",
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X30Y52": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y53": {
        "bits": {
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                "baseaddr": "0x00001A00",
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X30Y53": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y54": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X30Y54": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y55": {
        "bits": {
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                "baseaddr": "0x00001A00",
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X30Y55": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y56": {
        "bits": {
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                "baseaddr": "0x00001A00",
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y56": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y57": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y57": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y58": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 43,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y58": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 18,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 42,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y59": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
                "frames": 28,
                "offset": 12,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 97,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y6": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 115,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y60": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 40,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y61": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y62": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 39,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y62": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y63": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y64": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y64": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y65": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y66": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
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                "offset": 34,
                "words": 2
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        },
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            "TIEOFF_X30Y67": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
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                "words": 2
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        },
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            "TIEOFF_X30Y68": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
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                "offset": 38,
                "words": 2
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        },
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            "TIEOFF_X30Y69": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
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                "words": 2
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        },
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            "TIEOFF_X30Y7": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
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                "offset": 40,
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        },
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            "TIEOFF_X30Y70": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
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                "words": 2
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        },
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            "TIEOFF_X30Y71": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
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                "words": 2
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        },
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            "TIEOFF_X30Y72": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
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                "offset": 46,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X30Y73": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
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                "offset": 48,
                "words": 2
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        },
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            "TIEOFF_X30Y74": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X30Y75": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X30Y76": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
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                "offset": 55,
                "words": 2
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        },
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            "TIEOFF_X30Y77": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
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            "TIEOFF_X30Y78": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
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                "offset": 59,
                "words": 2
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        },
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            "TIEOFF_X30Y79": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X30Y8": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
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                "offset": 61,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X30Y80": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y81": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
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                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X30Y82": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
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                "offset": 67,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y83": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
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                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X30Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y85": {
        "bits": {
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                "baseaddr": "0x00001A00",
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                "offset": 71,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X30Y85": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
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                "offset": 73,
                "words": 2
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        },
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            "TIEOFF_X30Y86": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y87": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
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                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 12,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 11,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y89": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
                "frames": 28,
                "offset": 18,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 94,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y9": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y90": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 83,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 9,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y91": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 85,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 8,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y92": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 87,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 7,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y93": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 6,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y94": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 91,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y95": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 93,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 4,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 95,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 3,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 97,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 2,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A00",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 1,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 36,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y0": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 36,
        "grid_y": 102,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y1": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 36,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 36,
        "grid_y": 92,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 36,
        "grid_y": 91,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 36,
        "grid_y": 90,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 89,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 87,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 86,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X2Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X2Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 4,
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X2Y2": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
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            "TIEOFF_X2Y20": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 42,
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            "TIEOFF_X2Y21": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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        },
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            "TIEOFF_X2Y22": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "offset": 46,
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            "TIEOFF_X2Y23": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "words": 2
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            "TIEOFF_X2Y24": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "offset": 51,
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            "TIEOFF_X2Y25": "TIEOFF"
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    },
    "INT_L_X2Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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        },
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            "TIEOFF_X2Y26": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "words": 2
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        },
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            "TIEOFF_X2Y27": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
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            "TIEOFF_X2Y28": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "offset": 59,
                "words": 2
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        },
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            "TIEOFF_X2Y29": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X2Y3": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "words": 2
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        },
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            "TIEOFF_X2Y30": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y31": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "words": 2
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        },
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            "TIEOFF_X2Y32": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "offset": 67,
                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X2Y33": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X2Y34": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "offset": 71,
                "words": 2
            }
        },
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        "pin_functions": {},
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            "TIEOFF_X2Y35": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y36": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
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            "TIEOFF_X2Y37": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y38": {
        "bits": {
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                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 77,
                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X2Y38": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y39": {
        "bits": {
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                "baseaddr": "0x00400A00",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y39": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 8,
                "words": 2
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        },
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        "grid_y": 99,
        "pin_functions": {},
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            "TIEOFF_X2Y4": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 81,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X2Y40": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 83,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 61,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y41": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y42": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 85,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 60,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y42": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 87,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 59,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y43": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 58,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y44": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 91,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y45": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y46": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 93,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 56,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y46": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 95,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 55,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y47": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y48": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 97,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 54,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y48": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 36,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y49": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 10,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 36,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y5": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A00",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 36,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y50": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A00",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 36,
        "grid_y": 50,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y51": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y52": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A00",
                "frames": 28,
                "offset": 4,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 49,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y52": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A00",
                "frames": 28,
                "offset": 6,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 36,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y53": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y54": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A00",
                "frames": 28,
                "offset": 8,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 36,
        "grid_y": 47,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y54": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A00",
                "frames": 28,
                "offset": 10,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 36,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y55": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y56": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A00",
                "frames": 28,
                "offset": 12,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y56": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A00",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y57": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A00",
                "frames": 28,
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X2Y58": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A00",
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                "words": 2
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        },
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            "TIEOFF_X2Y59": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X2Y6": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A00",
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                "words": 2
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        },
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            "TIEOFF_X2Y60": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A00",
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            "TIEOFF_X2Y61": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X2Y62": "TIEOFF"
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            "TIEOFF_X2Y63": "TIEOFF"
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        "bits": {
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    "INT_L_X2Y88": {
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        },
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            "TIEOFF_X2Y89": "TIEOFF"
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            "TIEOFF_X2Y9": "TIEOFF"
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            "TIEOFF_X2Y90": "TIEOFF"
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            "TIEOFF_X2Y94": "TIEOFF"
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            "TIEOFF_X2Y95": "TIEOFF"
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            "TIEOFF_X2Y96": "TIEOFF"
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        "type": "INT_L"
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        "type": "INT_L"
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            "TIEOFF_X2Y98": "TIEOFF"
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            "TIEOFF_X32Y0": "TIEOFF"
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        "type": "INT_L"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00401B00",
                "frames": 28,
                "offset": 22,
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                "baseaddr": "0x00401B00",
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            "TIEOFF_X32Y12": "TIEOFF"
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            "TIEOFF_X32Y13": "TIEOFF"
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            "TIEOFF_X32Y55": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y56": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
                "frames": 28,
                "offset": 12,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y56": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y57": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y58": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
                "frames": 28,
                "offset": 16,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y58": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X32Y59": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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                "words": 2
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        },
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            "TIEOFF_X32Y6": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
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        },
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            "TIEOFF_X32Y60": "TIEOFF"
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    "INT_L_X30Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
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        },
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            "TIEOFF_X32Y61": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
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            "TIEOFF_X32Y62": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
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            "TIEOFF_X32Y63": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00001B00",
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            "TIEOFF_X32Y64": "TIEOFF"
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        "bits": {
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            "TIEOFF_X32Y65": "TIEOFF"
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            "TIEOFF_X32Y66": "TIEOFF"
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            "TIEOFF_X32Y67": "TIEOFF"
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            "TIEOFF_X32Y68": "TIEOFF"
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            "TIEOFF_X32Y69": "TIEOFF"
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            "TIEOFF_X32Y7": "TIEOFF"
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            "TIEOFF_X32Y70": "TIEOFF"
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            "TIEOFF_X32Y71": "TIEOFF"
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        "bits": {
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            "TIEOFF_X32Y73": "TIEOFF"
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            "TIEOFF_X32Y74": "TIEOFF"
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    "INT_L_X30Y75": {
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            "TIEOFF_X32Y76": "TIEOFF"
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            "TIEOFF_X32Y77": "TIEOFF"
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            "TIEOFF_X32Y78": "TIEOFF"
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            "TIEOFF_X32Y79": "TIEOFF"
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            "TIEOFF_X32Y8": "TIEOFF"
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            "TIEOFF_X32Y80": "TIEOFF"
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            "TIEOFF_X32Y81": "TIEOFF"
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            "TIEOFF_X32Y82": "TIEOFF"
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            "TIEOFF_X32Y83": "TIEOFF"
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            "TIEOFF_X32Y84": "TIEOFF"
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    "INT_L_X30Y85": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X32Y85": "TIEOFF"
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    "INT_L_X30Y86": {
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                "baseaddr": "0x00001B00",
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                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X32Y86": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y87": {
        "bits": {
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                "baseaddr": "0x00001B00",
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                "offset": 75,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X32Y87": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y88": {
        "bits": {
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                "baseaddr": "0x00001B00",
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                "offset": 77,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X32Y88": "TIEOFF"
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    },
    "INT_L_X30Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
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                "offset": 79,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X32Y89": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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        },
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        "pin_functions": {},
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            "TIEOFF_X32Y9": "TIEOFF"
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    "INT_L_X30Y90": {
        "bits": {
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                "baseaddr": "0x00001B00",
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                "offset": 81,
                "words": 2
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        },
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            "TIEOFF_X32Y90": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
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                "offset": 83,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X32Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
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                "offset": 85,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X32Y92": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
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                "offset": 87,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y93": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y94": {
        "bits": {
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                "baseaddr": "0x00001B00",
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                "offset": 89,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y94": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y95": {
        "bits": {
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                "baseaddr": "0x00001B00",
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                "offset": 91,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y95": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
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                "offset": 93,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y96": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y97": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y98": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
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                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 0,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y0": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y1": {
        "bits": {
            "CLB_IO_CLK": {
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        "bits": {
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
                "offset": 0,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y0": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
                "offset": 2,
                "words": 2
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            "TIEOFF_X6Y1": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
                "offset": 20,
                "words": 2
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            "TIEOFF_X6Y10": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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            "TIEOFF_X6Y11": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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            "TIEOFF_X6Y12": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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            "TIEOFF_X6Y13": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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            "TIEOFF_X6Y15": "TIEOFF"
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    "INT_L_X6Y43": {
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            "TIEOFF_X6Y45": "TIEOFF"
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            "TIEOFF_X6Y46": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X6Y48": "TIEOFF"
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            "TIEOFF_X6Y5": "TIEOFF"
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            "TIEOFF_X6Y50": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X6Y51": {
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        "type": "INT_L"
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    "INT_L_X6Y52": {
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        "pin_functions": {},
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            "TIEOFF_X6Y52": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y53": {
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        "sites": {
            "TIEOFF_X6Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y99": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
                "frames": 28,
                "offset": 0,
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            "TIEOFF_X9Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
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            "TIEOFF_X9Y1": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
                "frames": 28,
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            "TIEOFF_X9Y10": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
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            "TIEOFF_X9Y11": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X8Y12": {
        "bits": {
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                "baseaddr": "0x00400D00",
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            "TIEOFF_X9Y12": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
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            "TIEOFF_X9Y13": "TIEOFF"
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            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
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            "TIEOFF_X9Y14": "TIEOFF"
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            "TIEOFF_X9Y15": "TIEOFF"
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                "baseaddr": "0x00400D00",
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            "TIEOFF_X9Y2": "TIEOFF"
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    "INT_L_X8Y42": {
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    "INT_L_X8Y43": {
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                "baseaddr": "0x00400D00",
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    "INT_L_X8Y45": {
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    "INT_L_X8Y46": {
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    "INT_L_X8Y47": {
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            "TIEOFF_X9Y48": "TIEOFF"
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    "INT_L_X8Y49": {
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        "type": "INT_L"
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            "TIEOFF_X9Y5": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X9Y50": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X8Y51": {
        "bits": {
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X9Y51": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00000D00",
                "frames": 28,
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            "TIEOFF_X9Y52": "TIEOFF"
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    },
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            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
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                "baseaddr": "0x00000D00",
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            "TIEOFF_X9Y54": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
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            "TIEOFF_X9Y55": "TIEOFF"
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        "bits": {
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            "TIEOFF_X9Y57": "TIEOFF"
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    "INT_L_X8Y82": {
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            "TIEOFF_X9Y85": "TIEOFF"
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    "INT_L_X8Y87": {
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    "INT_L_X8Y91": {
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    "INT_L_X8Y95": {
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        "type": "INT_L"
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    "INT_L_X8Y96": {
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        "type": "INT_L"
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    "INT_L_X8Y97": {
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            "CLB_IO_CLK": {
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                "offset": 95,
                "words": 2
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        },
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        "grid_x": 52,
        "grid_y": 3,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X9Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X9Y98": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "sites": {
            "TIEOFF_X9Y99": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_R_X11Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401180",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X12Y0": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401180",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X12Y1": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401180",
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                "offset": 20,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y10": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401180",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X12Y11": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401180",
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                "words": 2
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        },
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            "TIEOFF_X12Y12": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401180",
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                "words": 2
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        },
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            "TIEOFF_X12Y13": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401180",
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        },
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            "TIEOFF_X12Y14": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00401180",
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        },
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            "TIEOFF_X12Y15": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y16": {
        "bits": {
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                "baseaddr": "0x00401180",
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        },
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            "TIEOFF_X12Y16": "TIEOFF"
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    "INT_R_X11Y17": {
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        },
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            "TIEOFF_X12Y17": "TIEOFF"
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        },
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            "TIEOFF_X12Y18": "TIEOFF"
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            "TIEOFF_X12Y19": "TIEOFF"
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        },
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            "TIEOFF_X12Y2": "TIEOFF"
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        "bits": {
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            "TIEOFF_X12Y20": "TIEOFF"
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    "INT_R_X11Y21": {
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            "TIEOFF_X12Y21": "TIEOFF"
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    "INT_R_X11Y22": {
        "bits": {
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            "TIEOFF_X12Y22": "TIEOFF"
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    "INT_R_X11Y23": {
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            "TIEOFF_X12Y23": "TIEOFF"
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    "INT_R_X11Y24": {
        "bits": {
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            "TIEOFF_X12Y24": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y25": {
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    "INT_R_X11Y26": {
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    "INT_R_X11Y32": {
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        "type": "INT_R"
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    "INT_R_X11Y33": {
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        "type": "INT_R"
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    "INT_R_X11Y34": {
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    "INT_R_X11Y35": {
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        },
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        "type": "INT_R"
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    "INT_R_X11Y36": {
        "bits": {
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X11Y37": {
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        },
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    "INT_R_X11Y38": {
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        },
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        "pin_functions": {},
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            "TIEOFF_X12Y38": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y39": {
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                "words": 2
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        },
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            "TIEOFF_X12Y39": "TIEOFF"
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        "bits": {
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        },
        "clock_region": "X0Y0",
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    "INT_R_X11Y40": {
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                "words": 2
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X11Y41": {
        "bits": {
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                "words": 2
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X11Y42": {
        "bits": {
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                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X11Y43": {
        "bits": {
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X11Y44": {
        "bits": {
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                "baseaddr": "0x00401180",
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X11Y45": {
        "bits": {
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                "baseaddr": "0x00401180",
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X11Y46": {
        "bits": {
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X11Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401180",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X12Y47": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y48": {
        "bits": {
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                "baseaddr": "0x00401180",
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X12Y48": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y49": {
        "bits": {
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                "baseaddr": "0x00401180",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "sites": {
            "TIEOFF_X12Y49": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00401180",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 71,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y5": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001180",
                "frames": 28,
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        },
        "clock_region": "X0Y1",
        "grid_x": 71,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y50": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001180",
                "frames": 28,
                "offset": 2,
                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X11Y52": {
        "bits": {
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                "baseaddr": "0x00001180",
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        },
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        "type": "INT_R"
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    "INT_R_X11Y53": {
        "bits": {
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                "baseaddr": "0x00001180",
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            "TIEOFF_X12Y53": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y54": {
        "bits": {
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                "baseaddr": "0x00001180",
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        },
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            "TIEOFF_X12Y54": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00001180",
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            "TIEOFF_X12Y55": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X12Y56": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00001180",
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    "INT_R_X11Y82": {
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    "INT_R_X11Y83": {
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                "words": 2
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        },
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    "INT_R_X11Y85": {
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    "INT_R_X11Y87": {
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    "INT_R_X11Y88": {
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        "type": "INT_R"
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    "INT_R_X11Y89": {
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        "type": "INT_R"
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    "INT_R_X11Y91": {
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        "type": "INT_R"
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    "INT_R_X11Y93": {
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        "type": "INT_R"
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    "INT_R_X11Y94": {
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            "TIEOFF_X12Y94": "TIEOFF"
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    "INT_R_X11Y95": {
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    "INT_R_X11Y96": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y96": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X11Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001180",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X12Y97": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X11Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001180",
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                "words": 2
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        },
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            "TIEOFF_X12Y98": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001180",
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                "offset": 99,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X12Y99": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
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                "offset": 0,
                "words": 2
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        },
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            "TIEOFF_X14Y0": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
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        },
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        "pin_functions": {},
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            "TIEOFF_X14Y1": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
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        },
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            "TIEOFF_X14Y10": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00401280",
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        },
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            "TIEOFF_X14Y11": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00401280",
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        },
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            "TIEOFF_X14Y12": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00401280",
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        },
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            "TIEOFF_X14Y13": "TIEOFF"
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        "type": "INT_R"
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        },
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            "TIEOFF_X14Y14": "TIEOFF"
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        },
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            "TIEOFF_X14Y15": "TIEOFF"
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        },
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            "TIEOFF_X14Y18": "TIEOFF"
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            "TIEOFF_X14Y2": "TIEOFF"
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    "INT_R_X13Y33": {
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    "INT_R_X13Y34": {
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    "INT_R_X13Y35": {
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        },
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        "type": "INT_R"
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    "INT_R_X13Y36": {
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        },
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    "INT_R_X13Y37": {
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        },
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            "TIEOFF_X14Y37": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y38": {
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                "words": 2
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        },
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            "TIEOFF_X14Y38": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y40": {
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    "INT_R_X13Y41": {
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    "INT_R_X13Y42": {
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        },
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        "type": "INT_R"
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    "INT_R_X13Y43": {
        "bits": {
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        },
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    "INT_R_X13Y44": {
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        },
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    "INT_R_X13Y45": {
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        "type": "INT_R"
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    "INT_R_X13Y46": {
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X13Y47": {
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X13Y48": {
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        },
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            "TIEOFF_X14Y48": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y49": {
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        },
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        "type": "INT_R"
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    "INT_R_X13Y5": {
        "bits": {
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y5": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X13Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
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            "TIEOFF_X14Y50": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
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                "words": 2
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        },
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            "TIEOFF_X14Y51": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y52": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
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                "offset": 4,
                "words": 2
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        },
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            "TIEOFF_X14Y52": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
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                "words": 2
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        },
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            "TIEOFF_X14Y53": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y54": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
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        },
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            "TIEOFF_X14Y54": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
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        },
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            "TIEOFF_X14Y55": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y56": {
        "bits": {
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                "baseaddr": "0x00001280",
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        },
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            "TIEOFF_X14Y56": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00001280",
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        },
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            "TIEOFF_X14Y57": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00001280",
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            "TIEOFF_X14Y58": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00001280",
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        },
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            "TIEOFF_X14Y59": "TIEOFF"
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            "TIEOFF_X14Y6": "TIEOFF"
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            "TIEOFF_X14Y62": "TIEOFF"
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            "TIEOFF_X14Y64": "TIEOFF"
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            "TIEOFF_X14Y65": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X14Y66": "TIEOFF"
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        },
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        "type": "INT_R"
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    "INT_R_X13Y68": {
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    "INT_R_X13Y69": {
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            "TIEOFF_X14Y7": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X14Y70": "TIEOFF"
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            "TIEOFF_X14Y71": "TIEOFF"
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    "INT_R_X13Y72": {
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    "INT_R_X13Y73": {
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    "INT_R_X13Y74": {
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    "INT_R_X13Y75": {
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            "TIEOFF_X14Y75": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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            "TIEOFF_X14Y8": "TIEOFF"
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    "INT_R_X13Y80": {
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                "baseaddr": "0x00001280",
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        },
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            "TIEOFF_X14Y80": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y81": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X14Y81": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y82": {
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                "words": 2
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        },
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            "TIEOFF_X14Y82": "TIEOFF"
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    "INT_R_X13Y83": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X14Y83": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y84": {
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                "words": 2
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        },
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            "TIEOFF_X14Y84": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y85": {
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                "words": 2
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        },
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            "TIEOFF_X14Y85": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y86": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X14Y86": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y87": {
        "bits": {
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                "offset": 75,
                "words": 2
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        },
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            "TIEOFF_X14Y87": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y88": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X14Y88": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y89": {
        "bits": {
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                "baseaddr": "0x00001280",
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                "words": 2
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        },
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            "TIEOFF_X14Y89": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y9": {
        "bits": {
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                "baseaddr": "0x00401280",
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        "pin_functions": {},
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            "TIEOFF_X14Y9": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X14Y90": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y91": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "sites": {
            "TIEOFF_X14Y91": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y92": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y92": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y93": {
        "bits": {
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                "baseaddr": "0x00001280",
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y93": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y94": {
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y94": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y95": {
        "bits": {
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        "sites": {
            "TIEOFF_X14Y95": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00001280",
                "frames": 28,
                "offset": 93,
                "words": 2
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            "TIEOFF_X14Y96": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X13Y98": {
        "bits": {
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                "words": 2
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            "TIEOFF_X14Y98": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y99": {
        "bits": {
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            "TIEOFF_X14Y99": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X16Y0": "TIEOFF"
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            "TIEOFF_X16Y1": "TIEOFF"
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        "sites": {
            "TIEOFF_X16Y49": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
                "frames": 28,
                "offset": 10,
                "words": 2
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            "TIEOFF_X16Y5": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X15Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
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            "TIEOFF_X16Y50": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X15Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
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        },
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            "TIEOFF_X16Y51": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y52": {
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                "baseaddr": "0x00001380",
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        },
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            "TIEOFF_X16Y52": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y53": {
        "bits": {
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                "baseaddr": "0x00001380",
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        },
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            "TIEOFF_X16Y53": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y54": {
        "bits": {
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                "baseaddr": "0x00001380",
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        },
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            "TIEOFF_X16Y54": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X16Y55": "TIEOFF"
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            "TIEOFF_X16Y58": "TIEOFF"
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            "TIEOFF_X16Y62": "TIEOFF"
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            "TIEOFF_X16Y63": "TIEOFF"
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            "TIEOFF_X16Y64": "TIEOFF"
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            "TIEOFF_X16Y65": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y67": {
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        "type": "INT_R"
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            "TIEOFF_X16Y69": "TIEOFF"
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            "TIEOFF_X16Y78": "TIEOFF"
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            "TIEOFF_X16Y8": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y80": {
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            "TIEOFF_X16Y80": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y81": {
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                "words": 2
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            "TIEOFF_X16Y81": "TIEOFF"
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    "INT_R_X15Y82": {
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                "words": 2
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        },
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            "TIEOFF_X16Y82": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y83": {
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            "TIEOFF_X16Y83": "TIEOFF"
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                "words": 2
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        },
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            "TIEOFF_X16Y84": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y85": {
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        "type": "INT_R"
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    "INT_R_X15Y86": {
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X15Y87": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X15Y88": {
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                "words": 2
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        "clock_region": "X0Y1",
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        "type": "INT_R"
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    "INT_R_X15Y89": {
        "bits": {
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                "baseaddr": "0x00001380",
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                "words": 2
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            "TIEOFF_X16Y89": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y9": {
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        "pin_functions": {},
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            "TIEOFF_X16Y9": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y90": {
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                "words": 2
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        "clock_region": "X0Y1",
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            "TIEOFF_X16Y90": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y91": {
        "bits": {
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                "words": 2
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        "clock_region": "X0Y1",
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            "TIEOFF_X16Y91": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y92": {
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                "words": 2
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        },
        "clock_region": "X0Y1",
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            "TIEOFF_X16Y92": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y93": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "sites": {
            "TIEOFF_X16Y93": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y94": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X16Y94": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X15Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
                "frames": 28,
                "offset": 91,
                "words": 2
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        },
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            "TIEOFF_X16Y95": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X15Y96": {
        "bits": {
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                "baseaddr": "0x00001380",
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                "offset": 93,
                "words": 2
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        },
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            "TIEOFF_X16Y96": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X15Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
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                "words": 2
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        },
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            "TIEOFF_X16Y97": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X15Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
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                "words": 2
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        },
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            "TIEOFF_X16Y98": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X15Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
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                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X16Y99": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X17Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401480",
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            "TIEOFF_X18Y0": "TIEOFF"
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        "type": "INT_R"
    },
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                "baseaddr": "0x00401480",
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        },
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            "TIEOFF_X18Y1": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00401480",
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        },
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            "TIEOFF_X18Y10": "TIEOFF"
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            "TIEOFF_X18Y11": "TIEOFF"
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            "TIEOFF_X18Y13": "TIEOFF"
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    "INT_R_X17Y17": {
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    "INT_R_X17Y33": {
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    "INT_R_X17Y34": {
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    "INT_R_X17Y37": {
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    "INT_R_X17Y39": {
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    "INT_R_X17Y42": {
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        "clock_region": "X1Y0",
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    "INT_R_X17Y43": {
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    "INT_R_X17Y44": {
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    "INT_R_X17Y45": {
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    "INT_R_X17Y46": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X17Y47": {
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X17Y48": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X18Y48": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401480",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X18Y49": "TIEOFF"
        },
        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401480",
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                "words": 2
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        },
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            "TIEOFF_X18Y5": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X17Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001480",
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        },
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            "TIEOFF_X18Y50": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X17Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001480",
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                "words": 2
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        },
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            "TIEOFF_X18Y51": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X17Y52": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001480",
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                "words": 2
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        },
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            "TIEOFF_X18Y52": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X17Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001480",
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        },
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            "TIEOFF_X18Y53": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y54": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001480",
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        },
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            "TIEOFF_X18Y54": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001480",
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        },
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            "TIEOFF_X18Y55": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X18Y56": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
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            "TIEOFF_X18Y57": "TIEOFF"
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        },
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        "type": "INT_R"
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        },
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        "bits": {
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        },
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        },
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            "TIEOFF_X18Y62": "TIEOFF"
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        },
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            "TIEOFF_X18Y63": "TIEOFF"
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    "INT_R_X17Y64": {
        "bits": {
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        },
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            "TIEOFF_X18Y64": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y65": {
        "bits": {
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            "TIEOFF_X18Y65": "TIEOFF"
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    "INT_R_X17Y66": {
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        },
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        "type": "INT_R"
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    "INT_R_X17Y67": {
        "bits": {
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            "TIEOFF_X18Y67": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y68": {
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    "INT_R_X17Y71": {
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    "INT_R_X17Y72": {
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            "TIEOFF_X18Y72": "TIEOFF"
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    "INT_R_X17Y73": {
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    "INT_R_X17Y74": {
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    "INT_R_X17Y75": {
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        },
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    "INT_R_X17Y77": {
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    "INT_R_X17Y78": {
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X18Y78": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y79": {
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X18Y79": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y8": {
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        },
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        "pin_functions": {},
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            "TIEOFF_X18Y8": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y80": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X18Y80": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X17Y81": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X18Y81": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y82": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X18Y82": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y83": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X18Y83": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y84": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X18Y84": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y85": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X18Y85": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y86": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X18Y86": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X17Y87": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X18Y87": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X17Y88": {
        "bits": {
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                "baseaddr": "0x00001480",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X18Y88": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y89": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "sites": {
            "TIEOFF_X18Y89": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X17Y9": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X18Y9": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y90": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "sites": {
            "TIEOFF_X18Y90": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X17Y91": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X18Y91": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X17Y92": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X18Y92": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001480",
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        },
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            "TIEOFF_X18Y93": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X17Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001480",
                "frames": 28,
                "offset": 89,
                "words": 2
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        },
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            "TIEOFF_X18Y94": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y95": {
        "bits": {
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                "baseaddr": "0x00001480",
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        },
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            "TIEOFF_X18Y95": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001480",
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                "words": 2
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        },
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            "TIEOFF_X18Y96": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X17Y97": {
        "bits": {
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                "baseaddr": "0x00001480",
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                "words": 2
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        },
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            "TIEOFF_X18Y97": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X17Y98": {
        "bits": {
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                "baseaddr": "0x00001480",
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        },
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            "TIEOFF_X18Y98": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y99": {
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                "baseaddr": "0x00001480",
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        },
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            "TIEOFF_X18Y99": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00401580",
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            "TIEOFF_X20Y0": "TIEOFF"
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                "baseaddr": "0x00401580",
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            "TIEOFF_X20Y1": "TIEOFF"
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            "TIEOFF_X20Y10": "TIEOFF"
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    "INT_R_X19Y33": {
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    "INT_R_X19Y34": {
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                "words": 2
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    "INT_R_X19Y37": {
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    "INT_R_X19Y38": {
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    "INT_R_X19Y41": {
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    "INT_R_X19Y42": {
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    "INT_R_X19Y43": {
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    "INT_R_X19Y44": {
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        "type": "INT_R"
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    "INT_R_X19Y45": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X19Y46": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X19Y47": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y47": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00401580",
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                "offset": 97,
                "words": 2
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        },
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00401580",
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                "words": 2
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        "type": "INT_R"
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        },
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            "TIEOFF_X20Y5": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X20Y50": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y51": {
        "bits": {
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                "baseaddr": "0x00001580",
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        },
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            "TIEOFF_X20Y51": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y52": {
        "bits": {
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                "baseaddr": "0x00001580",
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        },
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        },
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    "INT_R_X19Y82": {
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    "INT_R_X19Y83": {
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        },
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    "INT_R_X19Y84": {
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    "INT_R_X19Y85": {
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        "type": "INT_R"
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    "INT_R_X19Y87": {
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    "INT_R_X19Y88": {
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        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X19Y89": {
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X20Y89": "TIEOFF"
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X19Y90": {
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X20Y90": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y91": {
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X20Y91": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y92": {
        "bits": {
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            "TIEOFF_X20Y92": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00001580",
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                "words": 2
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        },
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            "TIEOFF_X20Y93": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X20Y94": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X19Y95": {
        "bits": {
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        },
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            "TIEOFF_X20Y95": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y96": {
        "bits": {
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        },
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            "TIEOFF_X20Y96": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X19Y97": {
        "bits": {
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        },
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            "TIEOFF_X20Y97": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y98": {
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            "TIEOFF_X20Y98": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X20Y99": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X1Y0": "TIEOFF"
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    "INT_R_X1Y46": {
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        "sites": {
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        "type": "INT_R"
    },
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                "baseaddr": "0x00400980",
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        "sites": {
            "TIEOFF_X1Y91": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000980",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y92": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000980",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y93": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000980",
                "frames": 28,
                "offset": 89,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y94": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000980",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X1Y95": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000980",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X1Y96": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000980",
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        },
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        "sites": {
            "TIEOFF_X1Y97": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000980",
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                "words": 2
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        },
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            "TIEOFF_X1Y98": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000980",
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                "words": 2
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        },
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            "TIEOFF_X1Y99": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401680",
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        },
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            "TIEOFF_X22Y0": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y1": {
        "bits": {
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                "baseaddr": "0x00401680",
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        },
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            "TIEOFF_X22Y1": "TIEOFF"
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    },
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        },
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            "TIEOFF_X22Y10": "TIEOFF"
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        },
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            "TIEOFF_X22Y11": "TIEOFF"
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        },
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            "TIEOFF_X22Y12": "TIEOFF"
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        },
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            "TIEOFF_X22Y13": "TIEOFF"
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        "type": "INT_R"
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        },
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            "TIEOFF_X22Y14": "TIEOFF"
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            "TIEOFF_X22Y15": "TIEOFF"
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        "type": "INT_R"
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        },
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            "TIEOFF_X22Y16": "TIEOFF"
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    "INT_R_X21Y17": {
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        "type": "INT_R"
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        },
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            "TIEOFF_X22Y21": "TIEOFF"
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    "INT_R_X21Y30": {
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        "clock_region": "X1Y0",
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            "TIEOFF_X22Y30": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y31": {
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                "words": 2
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        },
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            "TIEOFF_X22Y31": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y32": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X22Y32": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y33": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X22Y33": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401680",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X22Y34": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y35": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X21Y36": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X21Y37": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X21Y38": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X22Y38": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y39": {
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                "baseaddr": "0x00401680",
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X22Y39": "TIEOFF"
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    "INT_R_X21Y4": {
        "bits": {
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                "baseaddr": "0x00401680",
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X22Y4": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y40": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X21Y41": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X22Y41": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y42": {
        "bits": {
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                "baseaddr": "0x00401680",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y42": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y43": {
        "bits": {
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                "baseaddr": "0x00401680",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X21Y44": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X21Y45": {
        "bits": {
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                "baseaddr": "0x00401680",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "sites": {
            "TIEOFF_X22Y45": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y46": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401680",
                "frames": 28,
                "offset": 93,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y46": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401680",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y47": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y48": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401680",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y48": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401680",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y49": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401680",
                "frames": 28,
                "offset": 10,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y5": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
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                "offset": 0,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y50": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
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                "offset": 2,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 50,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y51": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y52": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
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                "words": 2
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        },
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            "TIEOFF_X22Y52": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
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        },
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            "TIEOFF_X22Y53": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y54": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
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                "offset": 8,
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X22Y54": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
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        },
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            "TIEOFF_X22Y55": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y56": {
        "bits": {
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                "baseaddr": "0x00001680",
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        },
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            "TIEOFF_X22Y56": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y57": {
        "bits": {
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                "baseaddr": "0x00001680",
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        },
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            "TIEOFF_X22Y57": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y58": {
        "bits": {
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                "baseaddr": "0x00001680",
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                "words": 2
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        },
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            "TIEOFF_X22Y58": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y59": {
        "bits": {
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                "baseaddr": "0x00001680",
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        },
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            "TIEOFF_X22Y59": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401680",
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        },
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            "TIEOFF_X22Y6": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X22Y60": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X22Y61": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y62": {
        "bits": {
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                "baseaddr": "0x00001680",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X22Y62": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
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                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X22Y63": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y64": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X22Y64": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y65": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X22Y65": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y66": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X22Y66": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y67": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X22Y67": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y68": {
        "bits": {
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                "baseaddr": "0x00001680",
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                "words": 2
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        },
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            "TIEOFF_X22Y68": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y69": {
        "bits": {
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X22Y69": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y7": {
        "bits": {
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                "baseaddr": "0x00401680",
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        },
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            "TIEOFF_X22Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y70": {
        "bits": {
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                "baseaddr": "0x00001680",
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                "offset": 40,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X22Y70": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y71": {
        "bits": {
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                "baseaddr": "0x00001680",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X22Y71": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y72": {
        "bits": {
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                "baseaddr": "0x00001680",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X22Y72": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y73": {
        "bits": {
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                "baseaddr": "0x00001680",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y73": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y74": {
        "bits": {
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                "baseaddr": "0x00001680",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y74": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
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                "offset": 51,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y75": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 24,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y76": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y77": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 22,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y78": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
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                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y79": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401680",
                "frames": 28,
                "offset": 16,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y8": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 96,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y80": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y81": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 18,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y82": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y83": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 96,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y84": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y85": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y86": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 96,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y87": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 96,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y88": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y89": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401680",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 96,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y9": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 81,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y90": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 83,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 96,
        "grid_y": 9,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y91": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 8,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y92": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 7,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y93": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y94": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 91,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y95": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y96": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
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                "offset": 95,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X22Y97": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
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                "offset": 97,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X22Y98": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001680",
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                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X22Y99": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
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                "offset": 0,
                "words": 2
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        },
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            "TIEOFF_X25Y0": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
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                "words": 2
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        },
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            "TIEOFF_X25Y1": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00401780",
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        },
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            "TIEOFF_X25Y10": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y11": {
        "bits": {
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                "baseaddr": "0x00401780",
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        },
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            "TIEOFF_X25Y11": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
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        },
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            "TIEOFF_X25Y12": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00401780",
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X25Y13": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y14": {
        "bits": {
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                "baseaddr": "0x00401780",
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X25Y14": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y15": {
        "bits": {
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                "baseaddr": "0x00401780",
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                "offset": 30,
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        },
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        "pin_functions": {},
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            "TIEOFF_X25Y15": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y16": {
        "bits": {
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                "baseaddr": "0x00401780",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y16": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y17": {
        "bits": {
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                "baseaddr": "0x00401780",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y17": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y18": {
        "bits": {
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                "baseaddr": "0x00401780",
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                "words": 2
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        },
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            "TIEOFF_X25Y18": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y19": {
        "bits": {
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                "baseaddr": "0x00401780",
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                "words": 2
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        },
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            "TIEOFF_X25Y19": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y2": {
        "bits": {
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                "baseaddr": "0x00401780",
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                "words": 2
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        },
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            "TIEOFF_X25Y2": "TIEOFF"
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        "type": "INT_R"
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                "words": 2
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        },
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            "TIEOFF_X25Y20": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y21": {
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                "words": 2
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        },
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            "TIEOFF_X25Y21": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y22": {
        "bits": {
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                "baseaddr": "0x00401780",
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                "words": 2
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        },
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            "TIEOFF_X25Y22": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y23": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X25Y23": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y24": {
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        },
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        "type": "INT_R"
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    "INT_R_X23Y25": {
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        },
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            "TIEOFF_X25Y25": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y26": {
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        },
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            "TIEOFF_X25Y26": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y27": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X25Y27": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y28": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X25Y28": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y29": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X25Y29": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y3": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y30": {
        "bits": {
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                "baseaddr": "0x00401780",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y30": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y31": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
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                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y32": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
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                "offset": 67,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y33": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
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                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y34": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
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                "offset": 71,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y35": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
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                "offset": 73,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y36": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
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                "offset": 75,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y37": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y38": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
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                "offset": 77,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y38": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y39": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y4": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
                "frames": 28,
                "offset": 81,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 102,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y40": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y41": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y42": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
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                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 102,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y42": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
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                "offset": 87,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y43": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y44": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
                "frames": 28,
                "offset": 91,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y45": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y46": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
                "frames": 28,
                "offset": 93,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 56,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y46": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
                "frames": 28,
                "offset": 95,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y47": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y48": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
                "frames": 28,
                "offset": 97,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 54,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y48": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y49": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
                "frames": 28,
                "offset": 10,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y5": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y50": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 2,
                "words": 2
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        },
        "clock_region": "X1Y1",
        "grid_x": 102,
        "grid_y": 50,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y51": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y52": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y52": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 6,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y53": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y54": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 8,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X25Y54": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 10,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X25Y55": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y56": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 12,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y56": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y57": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y58": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "sites": {
            "TIEOFF_X25Y58": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 18,
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X25Y59": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y6": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 20,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X25Y60": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X25Y61": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y62": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X25Y62": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X25Y63": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y64": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y64": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 30,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y65": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y66": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y67": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y68": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y69": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y7": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y70": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 42,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y71": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 44,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y72": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y73": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y74": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 102,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y75": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 102,
        "grid_y": 24,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y76": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 23,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y77": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 102,
        "grid_y": 22,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y78": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 102,
        "grid_y": 21,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y79": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y8": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 102,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y80": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y1",
        "grid_x": 102,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y81": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 102,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y82": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 102,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y83": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y1",
        "grid_x": 102,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y84": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 102,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y85": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 102,
        "grid_y": 14,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y86": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
        "clock_region": "X1Y1",
        "grid_x": 102,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y87": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 102,
        "grid_y": 12,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y88": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 102,
        "grid_y": 11,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y89": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
                "frames": 28,
                "offset": 18,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y9": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 102,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y90": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 83,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y91": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y92": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y93": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 89,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y94": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 91,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y95": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 93,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y96": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 95,
                "words": 2
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        },
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            "TIEOFF_X25Y97": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X25Y98": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X25Y99": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
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        },
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            "TIEOFF_X27Y0": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
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                "words": 2
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        },
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            "TIEOFF_X27Y1": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00401880",
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        },
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            "TIEOFF_X27Y10": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00401880",
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X27Y11": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y12": {
        "bits": {
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                "baseaddr": "0x00401880",
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        },
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            "TIEOFF_X27Y12": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y13": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X27Y13": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y14": {
        "bits": {
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        },
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            "TIEOFF_X27Y14": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X27Y15": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y16": {
        "bits": {
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                "baseaddr": "0x00401880",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X27Y16": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y17": {
        "bits": {
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                "baseaddr": "0x00401880",
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        },
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            "TIEOFF_X27Y17": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y18": {
        "bits": {
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                "baseaddr": "0x00401880",
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                "words": 2
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        },
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            "TIEOFF_X27Y18": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y19": {
        "bits": {
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                "baseaddr": "0x00401880",
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                "words": 2
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        },
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            "TIEOFF_X27Y19": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y2": {
        "bits": {
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        },
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            "TIEOFF_X27Y2": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
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        "type": "INT_R"
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            "TIEOFF_X27Y21": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y22": {
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                "words": 2
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        },
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            "TIEOFF_X27Y22": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y23": {
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        "type": "INT_R"
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    "INT_R_X25Y24": {
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        },
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        "type": "INT_R"
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    "INT_R_X25Y25": {
        "bits": {
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                "baseaddr": "0x00401880",
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        },
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            "TIEOFF_X27Y25": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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            "TIEOFF_X27Y26": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y27": {
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        },
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            "TIEOFF_X27Y27": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y28": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X27Y28": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y29": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X27Y29": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y3": {
        "bits": {
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                "baseaddr": "0x00401880",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X27Y3": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y30": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X27Y30": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y31": {
        "bits": {
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                "baseaddr": "0x00401880",
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X27Y31": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
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                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y32": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y33": {
        "bits": {
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                "baseaddr": "0x00401880",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X27Y33": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
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                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X27Y34": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
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                "offset": 71,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X27Y35": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y36": {
        "bits": {
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                "baseaddr": "0x00401880",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X27Y36": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
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                "offset": 75,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X27Y37": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y38": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X27Y38": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y39": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y4": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
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                "offset": 81,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y40": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y41": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y42": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
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                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 106,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y42": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y43": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
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                "offset": 89,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y44": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 91,
                "words": 2
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        },
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            "TIEOFF_X27Y45": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y46": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X27Y46": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
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                "offset": 95,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X27Y47": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y48": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
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                "offset": 97,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "sites": {
            "TIEOFF_X27Y48": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
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                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X27Y49": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
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        },
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            "TIEOFF_X27Y5": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
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        },
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            "TIEOFF_X27Y50": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
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        },
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            "TIEOFF_X27Y51": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y52": {
        "bits": {
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                "baseaddr": "0x00001880",
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        },
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            "TIEOFF_X27Y52": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y53": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X25Y54": {
        "bits": {
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        },
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            "TIEOFF_X27Y54": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y55": {
        "bits": {
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            "TIEOFF_X27Y55": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
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        "type": "INT_R"
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    "INT_R_X25Y57": {
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        },
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            "TIEOFF_X27Y57": "TIEOFF"
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        "bits": {
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        },
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        "bits": {
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        },
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            "TIEOFF_X27Y59": "TIEOFF"
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        "bits": {
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            "TIEOFF_X27Y6": "TIEOFF"
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            "TIEOFF_X27Y60": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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    "INT_R_X25Y63": {
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            "TIEOFF_X27Y63": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X27Y65": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y67": {
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        },
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        "type": "INT_R"
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    "INT_R_X25Y68": {
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        "type": "INT_R"
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    "INT_R_X25Y69": {
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        },
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            "TIEOFF_X27Y69": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X27Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y70": {
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        "type": "INT_R"
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    "INT_R_X25Y71": {
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        },
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            "TIEOFF_X27Y71": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y72": {
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            "TIEOFF_X27Y72": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y73": {
        "bits": {
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X27Y73": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y74": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y75": {
        "bits": {
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                "baseaddr": "0x00001880",
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y75": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y76": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X27Y76": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y77": {
        "bits": {
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                "baseaddr": "0x00001880",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X27Y77": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y78": {
        "bits": {
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X27Y78": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y79": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X27Y79": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y8": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X27Y8": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X27Y80": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y81": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X27Y81": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y82": {
        "bits": {
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                "baseaddr": "0x00001880",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y82": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y83": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y84": {
        "bits": {
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                "baseaddr": "0x00001880",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y84": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y85": {
        "bits": {
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                "baseaddr": "0x00001880",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y85": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y86": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y86": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y87": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y87": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y88": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y88": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y89": {
        "bits": {
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                "baseaddr": "0x00001880",
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                "offset": 79,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y89": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y9": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
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                "offset": 81,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y90": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y91": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X27Y92": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X27Y93": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001880",
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                "words": 2
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        },
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            "TIEOFF_X27Y94": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y95": {
        "bits": {
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                "baseaddr": "0x00001880",
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        },
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            "TIEOFF_X27Y95": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y96": {
        "bits": {
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                "baseaddr": "0x00001880",
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        },
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            "TIEOFF_X27Y96": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y97": {
        "bits": {
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                "baseaddr": "0x00001880",
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        },
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            "TIEOFF_X27Y97": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y98": {
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                "baseaddr": "0x00001880",
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        },
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            "TIEOFF_X27Y98": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y99": {
        "bits": {
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                "baseaddr": "0x00001880",
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        },
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            "TIEOFF_X27Y99": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X29Y0": "TIEOFF"
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        "type": "INT_R"
    },
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                "baseaddr": "0x00401980",
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        },
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            "TIEOFF_X29Y1": "TIEOFF"
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        },
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            "TIEOFF_X29Y10": "TIEOFF"
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        "type": "INT_R"
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        },
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        },
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        },
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            "TIEOFF_X29Y13": "TIEOFF"
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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        },
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            "TIEOFF_X29Y15": "TIEOFF"
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    "INT_R_X27Y17": {
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                "words": 2
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            "TIEOFF_X29Y17": "TIEOFF"
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        },
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            "TIEOFF_X29Y19": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y27": {
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        },
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            "TIEOFF_X29Y27": "TIEOFF"
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        "type": "INT_R"
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X29Y29": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y3": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X29Y3": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y30": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X29Y30": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y31": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X29Y31": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y32": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X29Y32": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y33": {
        "bits": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X27Y34": {
        "bits": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X29Y34": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y35": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X29Y35": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y36": {
        "bits": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X27Y37": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X27Y38": {
        "bits": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X27Y39": {
        "bits": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X29Y39": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401980",
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X29Y4": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y40": {
        "bits": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X29Y40": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y41": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X29Y41": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y42": {
        "bits": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X29Y42": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y43": {
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            "TIEOFF_X29Y88": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X27Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001980",
                "frames": 28,
                "offset": 79,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X29Y89": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401980",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X29Y9": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001980",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X29Y90": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001980",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X29Y91": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001980",
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                "words": 2
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        },
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            "TIEOFF_X29Y92": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001980",
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        },
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        "sites": {
            "TIEOFF_X29Y93": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y94": {
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                "baseaddr": "0x00001980",
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        },
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            "TIEOFF_X29Y94": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001980",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X29Y95": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001980",
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X27Y97": {
        "bits": {
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                "baseaddr": "0x00001980",
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        },
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            "TIEOFF_X29Y97": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00001980",
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X27Y99": {
        "bits": {
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                "baseaddr": "0x00001980",
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            "TIEOFF_X29Y99": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y0": {
        "bits": {
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            "TIEOFF_X31Y0": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X31Y1": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X31Y12": "TIEOFF"
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    "INT_R_X29Y17": {
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            "TIEOFF_X31Y27": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X29Y29": {
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            "TIEOFF_X31Y29": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y3": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X29Y30": {
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        "type": "INT_R"
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    "INT_R_X29Y31": {
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            "TIEOFF_X31Y31": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y32": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X29Y33": {
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X29Y34": {
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        "type": "INT_R"
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    "INT_R_X29Y35": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X29Y36": {
        "bits": {
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        "clock_region": "X1Y0",
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            "TIEOFF_X31Y36": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y37": {
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        "type": "INT_R"
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    "INT_R_X29Y38": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X31Y38": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y39": {
        "bits": {
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        "clock_region": "X1Y0",
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            "TIEOFF_X31Y39": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y4": {
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X29Y40": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X31Y40": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y41": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X31Y41": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X29Y42": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A80",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y42": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A80",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X31Y43": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A80",
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                "words": 2
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        "type": "INT_R"
    },
    "INT_R_X29Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A80",
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        },
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            "TIEOFF_X31Y45": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y46": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A80",
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            "TIEOFF_X31Y46": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A80",
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            "TIEOFF_X31Y47": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y48": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A80",
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        },
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            "TIEOFF_X31Y48": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X31Y49": "TIEOFF"
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            "TIEOFF_X31Y5": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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        },
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        },
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        },
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        "type": "INT_R"
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        "type": "INT_R"
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                "words": 2
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        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X29Y72": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X31Y72": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y73": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X31Y73": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y74": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X31Y74": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y75": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X31Y75": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y76": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X31Y76": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y77": {
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X29Y78": {
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        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X29Y79": {
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        },
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            "TIEOFF_X31Y79": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y8": {
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            "TIEOFF_X31Y8": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y80": {
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X31Y80": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y81": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X31Y81": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y82": {
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                "baseaddr": "0x00001A80",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "sites": {
            "TIEOFF_X31Y82": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y83": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
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        "type": "INT_R"
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    "INT_R_X29Y84": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "sites": {
            "TIEOFF_X31Y84": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y85": {
        "bits": {
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                "baseaddr": "0x00001A80",
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y85": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y86": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y86": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y87": {
        "bits": {
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                "offset": 75,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X31Y87": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X29Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A80",
                "frames": 28,
                "offset": 77,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X31Y88": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X29Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A80",
                "frames": 28,
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        },
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        "pin_functions": {},
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            "TIEOFF_X31Y89": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A80",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X31Y9": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A80",
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                "words": 2
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        },
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            "TIEOFF_X31Y90": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A80",
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                "words": 2
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        },
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            "TIEOFF_X31Y91": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A80",
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        },
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            "TIEOFF_X31Y92": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A80",
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        },
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            "TIEOFF_X31Y93": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001A80",
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        },
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            "TIEOFF_X31Y94": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y95": {
        "bits": {
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                "baseaddr": "0x00001A80",
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        },
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            "TIEOFF_X31Y95": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y96": {
        "bits": {
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                "baseaddr": "0x00001A80",
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        },
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        "type": "INT_R"
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                "baseaddr": "0x00001A80",
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        },
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        "type": "INT_R"
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    "INT_R_X29Y98": {
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            "TIEOFF_X31Y98": "TIEOFF"
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                "baseaddr": "0x00001A80",
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            "TIEOFF_X31Y99": "TIEOFF"
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            "TIEOFF_X33Y0": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y28": {
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        "type": "INT_R"
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    "INT_R_X31Y29": {
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            "TIEOFF_X33Y29": "TIEOFF"
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    "INT_R_X31Y3": {
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    "INT_R_X31Y30": {
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            "TIEOFF_X33Y30": "TIEOFF"
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    "INT_R_X31Y31": {
        "bits": {
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                "words": 2
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            "TIEOFF_X33Y31": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y32": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X31Y33": {
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        },
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        "type": "INT_R"
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    "INT_R_X31Y34": {
        "bits": {
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        },
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            "TIEOFF_X33Y34": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y35": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X31Y36": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X31Y37": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X33Y37": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y38": {
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        "clock_region": "X1Y0",
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            "TIEOFF_X33Y38": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y39": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X33Y39": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y4": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X33Y4": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y40": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00401B80",
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    "INT_R_X31Y42": {
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        "type": "INT_R"
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    "INT_R_X31Y74": {
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    "INT_R_X31Y75": {
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    "INT_R_X31Y82": {
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        "type": "INT_R"
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    "INT_R_X31Y83": {
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        "type": "INT_R"
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    "INT_R_X31Y84": {
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        },
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            "TIEOFF_X33Y84": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y85": {
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        },
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        "type": "INT_R"
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    "INT_R_X31Y86": {
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            "TIEOFF_X33Y86": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y87": {
        "bits": {
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                "baseaddr": "0x00001B80",
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            "TIEOFF_X33Y88": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y89": {
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        },
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            "TIEOFF_X33Y89": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X3Y34": {
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    "INT_R_X3Y39": {
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    "INT_R_X3Y4": {
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    },
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        "bits": {
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                "words": 2
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            "TIEOFF_X3Y85": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y86": {
        "bits": {
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                "baseaddr": "0x00000A80",
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        },
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            "TIEOFF_X3Y86": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y87": {
        "bits": {
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                "baseaddr": "0x00000A80",
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        },
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            "TIEOFF_X3Y87": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y88": {
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            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X3Y88": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y89": {
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                "baseaddr": "0x00000A80",
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        },
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            "TIEOFF_X3Y89": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X3Y9": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X3Y91": {
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        },
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    "INT_R_X3Y98": {
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    "INT_R_X5Y25": {
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    "INT_R_X5Y28": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X5Y31": {
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        "type": "INT_R"
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    "INT_R_X5Y32": {
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        "type": "INT_R"
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    "INT_R_X5Y33": {
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        "type": "INT_R"
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    "INT_R_X5Y34": {
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        "type": "INT_R"
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    "INT_R_X5Y37": {
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        },
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        "type": "INT_R"
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    "INT_R_X5Y38": {
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        "type": "INT_R"
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    "INT_R_X5Y39": {
        "bits": {
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B80",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
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            "TIEOFF_X5Y84": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00000B80",
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            "TIEOFF_X5Y85": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X5Y86": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y87": {
        "bits": {
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            "TIEOFF_X5Y87": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y88": {
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            "TIEOFF_X5Y88": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X5Y89": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X7Y33": {
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        "type": "INT_R"
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    "INT_R_X7Y34": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X7Y36": {
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        "type": "INT_R"
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    "INT_R_X7Y37": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X7Y37": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00400C80",
                "frames": 28,
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        "type": "INT_R"
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        "type": "INT_R"
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            "TIEOFF_X7Y81": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X7Y82": {
        "bits": {
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            "TIEOFF_X7Y82": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X7Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
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                "words": 2
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        },
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            "TIEOFF_X7Y83": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
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            "TIEOFF_X7Y84": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X7Y85": {
        "bits": {
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        },
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            "TIEOFF_X7Y85": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X7Y86": {
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        },
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            "TIEOFF_X7Y86": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X7Y87": {
        "bits": {
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                "baseaddr": "0x00000C80",
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        },
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            "TIEOFF_X7Y87": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X7Y88": {
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            "TIEOFF_X7Y88": "TIEOFF"
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    "INT_R_X7Y89": {
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            "TIEOFF_X7Y89": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X7Y9": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X9Y23": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X9Y3": {
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X9Y30": {
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        "type": "INT_R"
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    "INT_R_X9Y31": {
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        "type": "INT_R"
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    "INT_R_X9Y32": {
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        "type": "INT_R"
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    "INT_R_X9Y33": {
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        "type": "INT_R"
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    "INT_R_X9Y34": {
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        "type": "INT_R"
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    "INT_R_X9Y35": {
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        "type": "INT_R"
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    "INT_R_X9Y36": {
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        "grid_x": 9,
        "grid_y": 49,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y56": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 48,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y57": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 47,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y58": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y59": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 45,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y6": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y60": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 44,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y61": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 43,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y62": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 42,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y63": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y64": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 40,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y65": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 39,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y66": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 38,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y67": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 37,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y68": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y69": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 35,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y7": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 97,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y70": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 34,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y71": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 33,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y72": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 32,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y73": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y74": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 30,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y75": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 29,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y76": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 28,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y77": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 27,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y79": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y8": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 96,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y80": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 24,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y81": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 23,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y82": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 22,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y83": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 21,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y84": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y85": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y86": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 18,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y87": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 17,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y88": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 16,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y89": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y9": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 95,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y90": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 14,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y91": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 13,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y92": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 12,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y93": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 11,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y94": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y95": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 9,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y96": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 8,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y97": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 7,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y98": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 6,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X9Y99": {
        "bits": {},
        "grid_x": 9,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PSS0_X13Y11": {
        "bits": {},
        "grid_x": 13,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {},
        "type": "PSS0"
    },
    "PSS1_X13Y32": {
        "bits": {},
        "grid_x": 13,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {},
        "type": "PSS1"
    },
    "PSS2_X13Y53": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 13,
        "grid_y": 51,
        "pin_functions": {
            "IOPAD_X1Y1": "PS_DDR_WE_B_502",
            "IOPAD_X1Y10": "PS_DDR_A6_502",
            "IOPAD_X1Y100": "PS_MIO23_501",
            "IOPAD_X1Y101": "PS_MIO24_501",
            "IOPAD_X1Y102": "PS_MIO25_501",
            "IOPAD_X1Y103": "PS_MIO26_501",
            "IOPAD_X1Y104": "PS_MIO27_501",
            "IOPAD_X1Y105": "PS_MIO28_501",
            "IOPAD_X1Y106": "PS_MIO29_501",
            "IOPAD_X1Y107": "PS_MIO30_501",
            "IOPAD_X1Y108": "PS_MIO31_501",
            "IOPAD_X1Y109": "PS_MIO32_501",
            "IOPAD_X1Y11": "PS_DDR_A7_502",
            "IOPAD_X1Y110": "PS_MIO33_501",
            "IOPAD_X1Y111": "PS_MIO34_501",
            "IOPAD_X1Y112": "PS_MIO35_501",
            "IOPAD_X1Y113": "PS_MIO36_501",
            "IOPAD_X1Y114": "PS_MIO37_501",
            "IOPAD_X1Y115": "PS_MIO38_501",
            "IOPAD_X1Y116": "PS_MIO39_501",
            "IOPAD_X1Y117": "PS_MIO40_501",
            "IOPAD_X1Y118": "PS_MIO41_501",
            "IOPAD_X1Y119": "PS_MIO42_501",
            "IOPAD_X1Y12": "PS_DDR_A8_502",
            "IOPAD_X1Y120": "PS_MIO43_501",
            "IOPAD_X1Y121": "PS_MIO44_501",
            "IOPAD_X1Y122": "PS_MIO45_501",
            "IOPAD_X1Y123": "PS_MIO46_501",
            "IOPAD_X1Y124": "PS_MIO47_501",
            "IOPAD_X1Y125": "PS_MIO48_501",
            "IOPAD_X1Y126": "PS_MIO49_501",
            "IOPAD_X1Y127": "PS_MIO50_501",
            "IOPAD_X1Y128": "PS_MIO51_501",
            "IOPAD_X1Y129": "PS_MIO52_501",
            "IOPAD_X1Y13": "PS_DDR_A9_502",
            "IOPAD_X1Y130": "PS_MIO53_501",
            "IOPAD_X1Y131": "PS_DDR_ODT_502",
            "IOPAD_X1Y132": "PS_POR_B_500",
            "IOPAD_X1Y133": "PS_DDR_RAS_B_502",
            "IOPAD_X1Y134": "PS_SRST_B_501",
            "IOPAD_X1Y14": "PS_DDR_A10_502",
            "IOPAD_X1Y15": "PS_DDR_A11_502",
            "IOPAD_X1Y16": "PS_DDR_A12_502",
            "IOPAD_X1Y17": "PS_DDR_A14_502",
            "IOPAD_X1Y18": "PS_DDR_A13_502",
            "IOPAD_X1Y19": "PS_DDR_BA0_502",
            "IOPAD_X1Y2": "PS_DDR_VRN_502",
            "IOPAD_X1Y20": "PS_DDR_BA1_502",
            "IOPAD_X1Y21": "PS_DDR_BA2_502",
            "IOPAD_X1Y22": "PS_DDR_CAS_B_502",
            "IOPAD_X1Y23": "PS_DDR_CKE_502",
            "IOPAD_X1Y24": "PS_DDR_CKN_502",
            "IOPAD_X1Y25": "PS_DDR_CKP_502",
            "IOPAD_X1Y26": "PS_CLK_500",
            "IOPAD_X1Y27": "PS_DDR_CS_B_502",
            "IOPAD_X1Y28": "PS_DDR_DM0_502",
            "IOPAD_X1Y29": "PS_DDR_DM1_502",
            "IOPAD_X1Y3": "PS_DDR_VRP_502",
            "IOPAD_X1Y30": "PS_DDR_DM2_502",
            "IOPAD_X1Y31": "PS_DDR_DM3_502",
            "IOPAD_X1Y32": "PS_DDR_DQ0_502",
            "IOPAD_X1Y33": "PS_DDR_DQ1_502",
            "IOPAD_X1Y34": "PS_DDR_DQ2_502",
            "IOPAD_X1Y35": "PS_DDR_DQ3_502",
            "IOPAD_X1Y36": "PS_DDR_DQ4_502",
            "IOPAD_X1Y37": "PS_DDR_DQ5_502",
            "IOPAD_X1Y38": "PS_DDR_DQ6_502",
            "IOPAD_X1Y39": "PS_DDR_DQ7_502",
            "IOPAD_X1Y4": "PS_DDR_A0_502",
            "IOPAD_X1Y40": "PS_DDR_DQ8_502",
            "IOPAD_X1Y41": "PS_DDR_DQ9_502",
            "IOPAD_X1Y42": "PS_DDR_DQ10_502",
            "IOPAD_X1Y43": "PS_DDR_DQ11_502",
            "IOPAD_X1Y44": "PS_DDR_DQ12_502",
            "IOPAD_X1Y45": "PS_DDR_DQ13_502",
            "IOPAD_X1Y46": "PS_DDR_DQ14_502",
            "IOPAD_X1Y47": "PS_DDR_DQ15_502",
            "IOPAD_X1Y48": "PS_DDR_DQ16_502",
            "IOPAD_X1Y49": "PS_DDR_DQ17_502",
            "IOPAD_X1Y5": "PS_DDR_A1_502",
            "IOPAD_X1Y50": "PS_DDR_DQ18_502",
            "IOPAD_X1Y51": "PS_DDR_DQ19_502",
            "IOPAD_X1Y52": "PS_DDR_DQ20_502",
            "IOPAD_X1Y53": "PS_DDR_DQ21_502",
            "IOPAD_X1Y54": "PS_DDR_DQ22_502",
            "IOPAD_X1Y55": "PS_DDR_DQ23_502",
            "IOPAD_X1Y56": "PS_DDR_DQ24_502",
            "IOPAD_X1Y57": "PS_DDR_DQ25_502",
            "IOPAD_X1Y58": "PS_DDR_DQ26_502",
            "IOPAD_X1Y59": "PS_DDR_DQ27_502",
            "IOPAD_X1Y6": "PS_DDR_A2_502",
            "IOPAD_X1Y60": "PS_DDR_DQ28_502",
            "IOPAD_X1Y61": "PS_DDR_DQ29_502",
            "IOPAD_X1Y62": "PS_DDR_DQ30_502",
            "IOPAD_X1Y63": "PS_DDR_DQ31_502",
            "IOPAD_X1Y64": "PS_DDR_DQS_N0_502",
            "IOPAD_X1Y65": "PS_DDR_DQS_N1_502",
            "IOPAD_X1Y66": "PS_DDR_DQS_N2_502",
            "IOPAD_X1Y67": "PS_DDR_DQS_N3_502",
            "IOPAD_X1Y68": "PS_DDR_DQS_P0_502",
            "IOPAD_X1Y69": "PS_DDR_DQS_P1_502",
            "IOPAD_X1Y7": "PS_DDR_A3_502",
            "IOPAD_X1Y70": "PS_DDR_DQS_P2_502",
            "IOPAD_X1Y71": "PS_DDR_DQS_P3_502",
            "IOPAD_X1Y72": "PS_DDR_DRST_B_502",
            "IOPAD_X1Y77": "PS_MIO0_500",
            "IOPAD_X1Y78": "PS_MIO1_500",
            "IOPAD_X1Y79": "PS_MIO2_500",
            "IOPAD_X1Y8": "PS_DDR_A4_502",
            "IOPAD_X1Y80": "PS_MIO3_500",
            "IOPAD_X1Y81": "PS_MIO4_500",
            "IOPAD_X1Y82": "PS_MIO5_500",
            "IOPAD_X1Y83": "PS_MIO6_500",
            "IOPAD_X1Y84": "PS_MIO7_500",
            "IOPAD_X1Y85": "PS_MIO8_500",
            "IOPAD_X1Y86": "PS_MIO9_500",
            "IOPAD_X1Y87": "PS_MIO10_500",
            "IOPAD_X1Y88": "PS_MIO11_500",
            "IOPAD_X1Y89": "PS_MIO12_500",
            "IOPAD_X1Y9": "PS_DDR_A5_502",
            "IOPAD_X1Y90": "PS_MIO13_500",
            "IOPAD_X1Y91": "PS_MIO14_500",
            "IOPAD_X1Y92": "PS_MIO15_500",
            "IOPAD_X1Y93": "PS_MIO16_501",
            "IOPAD_X1Y94": "PS_MIO17_501",
            "IOPAD_X1Y95": "PS_MIO18_501",
            "IOPAD_X1Y96": "PS_MIO19_501",
            "IOPAD_X1Y97": "PS_MIO20_501",
            "IOPAD_X1Y98": "PS_MIO21_501",
            "IOPAD_X1Y99": "PS_MIO22_501"
        },
        "sites": {
            "IOPAD_X1Y1": "IOPAD",
            "IOPAD_X1Y10": "IOPAD",
            "IOPAD_X1Y100": "IOPAD",
            "IOPAD_X1Y101": "IOPAD",
            "IOPAD_X1Y102": "IOPAD",
            "IOPAD_X1Y103": "IOPAD",
            "IOPAD_X1Y104": "IOPAD",
            "IOPAD_X1Y105": "IOPAD",
            "IOPAD_X1Y106": "IOPAD",
            "IOPAD_X1Y107": "IOPAD",
            "IOPAD_X1Y108": "IOPAD",
            "IOPAD_X1Y109": "IOPAD",
            "IOPAD_X1Y11": "IOPAD",
            "IOPAD_X1Y110": "IOPAD",
            "IOPAD_X1Y111": "IOPAD",
            "IOPAD_X1Y112": "IOPAD",
            "IOPAD_X1Y113": "IOPAD",
            "IOPAD_X1Y114": "IOPAD",
            "IOPAD_X1Y115": "IOPAD",
            "IOPAD_X1Y116": "IOPAD",
            "IOPAD_X1Y117": "IOPAD",
            "IOPAD_X1Y118": "IOPAD",
            "IOPAD_X1Y119": "IOPAD",
            "IOPAD_X1Y12": "IOPAD",
            "IOPAD_X1Y120": "IOPAD",
            "IOPAD_X1Y121": "IOPAD",
            "IOPAD_X1Y122": "IOPAD",
            "IOPAD_X1Y123": "IOPAD",
            "IOPAD_X1Y124": "IOPAD",
            "IOPAD_X1Y125": "IOPAD",
            "IOPAD_X1Y126": "IOPAD",
            "IOPAD_X1Y127": "IOPAD",
            "IOPAD_X1Y128": "IOPAD",
            "IOPAD_X1Y129": "IOPAD",
            "IOPAD_X1Y13": "IOPAD",
            "IOPAD_X1Y130": "IOPAD",
            "IOPAD_X1Y131": "IOPAD",
            "IOPAD_X1Y132": "IOPAD",
            "IOPAD_X1Y133": "IOPAD",
            "IOPAD_X1Y134": "IOPAD",
            "IOPAD_X1Y14": "IOPAD",
            "IOPAD_X1Y15": "IOPAD",
            "IOPAD_X1Y16": "IOPAD",
            "IOPAD_X1Y17": "IOPAD",
            "IOPAD_X1Y18": "IOPAD",
            "IOPAD_X1Y19": "IOPAD",
            "IOPAD_X1Y2": "IOPAD",
            "IOPAD_X1Y20": "IOPAD",
            "IOPAD_X1Y21": "IOPAD",
            "IOPAD_X1Y22": "IOPAD",
            "IOPAD_X1Y23": "IOPAD",
            "IOPAD_X1Y24": "IOPAD",
            "IOPAD_X1Y25": "IOPAD",
            "IOPAD_X1Y26": "IOPAD",
            "IOPAD_X1Y27": "IOPAD",
            "IOPAD_X1Y28": "IOPAD",
            "IOPAD_X1Y29": "IOPAD",
            "IOPAD_X1Y3": "IOPAD",
            "IOPAD_X1Y30": "IOPAD",
            "IOPAD_X1Y31": "IOPAD",
            "IOPAD_X1Y32": "IOPAD",
            "IOPAD_X1Y33": "IOPAD",
            "IOPAD_X1Y34": "IOPAD",
            "IOPAD_X1Y35": "IOPAD",
            "IOPAD_X1Y36": "IOPAD",
            "IOPAD_X1Y37": "IOPAD",
            "IOPAD_X1Y38": "IOPAD",
            "IOPAD_X1Y39": "IOPAD",
            "IOPAD_X1Y4": "IOPAD",
            "IOPAD_X1Y40": "IOPAD",
            "IOPAD_X1Y41": "IOPAD",
            "IOPAD_X1Y42": "IOPAD",
            "IOPAD_X1Y43": "IOPAD",
            "IOPAD_X1Y44": "IOPAD",
            "IOPAD_X1Y45": "IOPAD",
            "IOPAD_X1Y46": "IOPAD",
            "IOPAD_X1Y47": "IOPAD",
            "IOPAD_X1Y48": "IOPAD",
            "IOPAD_X1Y49": "IOPAD",
            "IOPAD_X1Y5": "IOPAD",
            "IOPAD_X1Y50": "IOPAD",
            "IOPAD_X1Y51": "IOPAD",
            "IOPAD_X1Y52": "IOPAD",
            "IOPAD_X1Y53": "IOPAD",
            "IOPAD_X1Y54": "IOPAD",
            "IOPAD_X1Y55": "IOPAD",
            "IOPAD_X1Y56": "IOPAD",
            "IOPAD_X1Y57": "IOPAD",
            "IOPAD_X1Y58": "IOPAD",
            "IOPAD_X1Y59": "IOPAD",
            "IOPAD_X1Y6": "IOPAD",
            "IOPAD_X1Y60": "IOPAD",
            "IOPAD_X1Y61": "IOPAD",
            "IOPAD_X1Y62": "IOPAD",
            "IOPAD_X1Y63": "IOPAD",
            "IOPAD_X1Y64": "IOPAD",
            "IOPAD_X1Y65": "IOPAD",
            "IOPAD_X1Y66": "IOPAD",
            "IOPAD_X1Y67": "IOPAD",
            "IOPAD_X1Y68": "IOPAD",
            "IOPAD_X1Y69": "IOPAD",
            "IOPAD_X1Y7": "IOPAD",
            "IOPAD_X1Y70": "IOPAD",
            "IOPAD_X1Y71": "IOPAD",
            "IOPAD_X1Y72": "IOPAD",
            "IOPAD_X1Y77": "IOPAD",
            "IOPAD_X1Y78": "IOPAD",
            "IOPAD_X1Y79": "IOPAD",
            "IOPAD_X1Y8": "IOPAD",
            "IOPAD_X1Y80": "IOPAD",
            "IOPAD_X1Y81": "IOPAD",
            "IOPAD_X1Y82": "IOPAD",
            "IOPAD_X1Y83": "IOPAD",
            "IOPAD_X1Y84": "IOPAD",
            "IOPAD_X1Y85": "IOPAD",
            "IOPAD_X1Y86": "IOPAD",
            "IOPAD_X1Y87": "IOPAD",
            "IOPAD_X1Y88": "IOPAD",
            "IOPAD_X1Y89": "IOPAD",
            "IOPAD_X1Y9": "IOPAD",
            "IOPAD_X1Y90": "IOPAD",
            "IOPAD_X1Y91": "IOPAD",
            "IOPAD_X1Y92": "IOPAD",
            "IOPAD_X1Y93": "IOPAD",
            "IOPAD_X1Y94": "IOPAD",
            "IOPAD_X1Y95": "IOPAD",
            "IOPAD_X1Y96": "IOPAD",
            "IOPAD_X1Y97": "IOPAD",
            "IOPAD_X1Y98": "IOPAD",
            "IOPAD_X1Y99": "IOPAD",
            "PS7_X0Y0": "PS7"
        },
        "type": "PSS2"
    },
    "PSS3_X13Y73": {
        "bits": {},
        "grid_x": 13,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {},
        "type": "PSS3"
    },
    "PSS4_X13Y94": {
        "bits": {},
        "grid_x": 13,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {},
        "type": "PSS4"
    },
    "RIOB33_SING_X31Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y0"
                    },
                    "start_offset": 2,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 103,
        "pin_functions": {
            "IOB_X0Y0": "IO_25_34"
        },
        "sites": {
            "IOB_X0Y0": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X31Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 53,
        "pin_functions": {
            "IOB_X0Y49": "IO_0_34"
        },
        "sites": {
            "IOB_X0Y49": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X31Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y0"
                    },
                    "start_offset": 2,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 51,
        "pin_functions": {
            "IOB_X0Y50": "IO_25_35"
        },
        "sites": {
            "IOB_X0Y50": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X31Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 1,
        "pin_functions": {
            "IOB_X0Y99": "IO_0_35"
        },
        "sites": {
            "IOB_X0Y99": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_X31Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 102,
        "pin_functions": {
            "IOB_X0Y1": "IO_L24N_T3_34",
            "IOB_X0Y2": "IO_L24P_T3_34"
        },
        "sites": {
            "IOB_X0Y1": "IOB33S",
            "IOB_X0Y2": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 92,
        "pin_functions": {
            "IOB_X0Y11": "IO_L19N_T3_VREF_34",
            "IOB_X0Y12": "IO_L19P_T3_34"
        },
        "sites": {
            "IOB_X0Y11": "IOB33S",
            "IOB_X0Y12": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 90,
        "pin_functions": {
            "IOB_X0Y13": "IO_L18N_T2_34",
            "IOB_X0Y14": "IO_L18P_T2_34"
        },
        "sites": {
            "IOB_X0Y13": "IOB33S",
            "IOB_X0Y14": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 88,
        "pin_functions": {
            "IOB_X0Y15": "IO_L17N_T2_34",
            "IOB_X0Y16": "IO_L17P_T2_34"
        },
        "sites": {
            "IOB_X0Y15": "IOB33S",
            "IOB_X0Y16": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 86,
        "pin_functions": {
            "IOB_X0Y17": "IO_L16N_T2_34",
            "IOB_X0Y18": "IO_L16P_T2_34"
        },
        "sites": {
            "IOB_X0Y17": "IOB33S",
            "IOB_X0Y18": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 84,
        "pin_functions": {
            "IOB_X0Y19": "IO_L15N_T2_DQS_34",
            "IOB_X0Y20": "IO_L15P_T2_DQS_34"
        },
        "sites": {
            "IOB_X0Y19": "IOB33S",
            "IOB_X0Y20": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 82,
        "pin_functions": {
            "IOB_X0Y21": "IO_L14N_T2_SRCC_34",
            "IOB_X0Y22": "IO_L14P_T2_SRCC_34"
        },
        "sites": {
            "IOB_X0Y21": "IOB33S",
            "IOB_X0Y22": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 80,
        "pin_functions": {
            "IOB_X0Y23": "IO_L13N_T2_MRCC_34",
            "IOB_X0Y24": "IO_L13P_T2_MRCC_34"
        },
        "sites": {
            "IOB_X0Y23": "IOB33S",
            "IOB_X0Y24": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 77,
        "pin_functions": {
            "IOB_X0Y25": "IO_L12N_T1_MRCC_34",
            "IOB_X0Y26": "IO_L12P_T1_MRCC_34"
        },
        "sites": {
            "IOB_X0Y25": "IOB33S",
            "IOB_X0Y26": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 75,
        "pin_functions": {
            "IOB_X0Y27": "IO_L11N_T1_SRCC_34",
            "IOB_X0Y28": "IO_L11P_T1_SRCC_34"
        },
        "sites": {
            "IOB_X0Y27": "IOB33S",
            "IOB_X0Y28": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 73,
        "pin_functions": {
            "IOB_X0Y29": "IO_L10N_T1_34",
            "IOB_X0Y30": "IO_L10P_T1_34"
        },
        "sites": {
            "IOB_X0Y29": "IOB33S",
            "IOB_X0Y30": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 100,
        "pin_functions": {
            "IOB_X0Y3": "IO_L23N_T3_34",
            "IOB_X0Y4": "IO_L23P_T3_34"
        },
        "sites": {
            "IOB_X0Y3": "IOB33S",
            "IOB_X0Y4": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 71,
        "pin_functions": {
            "IOB_X0Y31": "IO_L9N_T1_DQS_34",
            "IOB_X0Y32": "IO_L9P_T1_DQS_34"
        },
        "sites": {
            "IOB_X0Y31": "IOB33S",
            "IOB_X0Y32": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 69,
        "pin_functions": {
            "IOB_X0Y33": "IO_L8N_T1_34",
            "IOB_X0Y34": "IO_L8P_T1_34"
        },
        "sites": {
            "IOB_X0Y33": "IOB33S",
            "IOB_X0Y34": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 67,
        "pin_functions": {
            "IOB_X0Y35": "IO_L7N_T1_34",
            "IOB_X0Y36": "IO_L7P_T1_34"
        },
        "sites": {
            "IOB_X0Y35": "IOB33S",
            "IOB_X0Y36": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 65,
        "pin_functions": {
            "IOB_X0Y37": "IO_L6N_T0_VREF_34",
            "IOB_X0Y38": "IO_L6P_T0_34"
        },
        "sites": {
            "IOB_X0Y37": "IOB33S",
            "IOB_X0Y38": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 63,
        "pin_functions": {
            "IOB_X0Y39": "IO_L5N_T0_34",
            "IOB_X0Y40": "IO_L5P_T0_34"
        },
        "sites": {
            "IOB_X0Y39": "IOB33S",
            "IOB_X0Y40": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 61,
        "pin_functions": {
            "IOB_X0Y41": "IO_L4N_T0_34",
            "IOB_X0Y42": "IO_L4P_T0_34"
        },
        "sites": {
            "IOB_X0Y41": "IOB33S",
            "IOB_X0Y42": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 59,
        "pin_functions": {
            "IOB_X0Y43": "IO_L3N_T0_DQS_34",
            "IOB_X0Y44": "IO_L3P_T0_DQS_PUDC_B_34"
        },
        "sites": {
            "IOB_X0Y43": "IOB33S",
            "IOB_X0Y44": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 57,
        "pin_functions": {
            "IOB_X0Y45": "IO_L2N_T0_34",
            "IOB_X0Y46": "IO_L2P_T0_34"
        },
        "sites": {
            "IOB_X0Y45": "IOB33S",
            "IOB_X0Y46": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 55,
        "pin_functions": {
            "IOB_X0Y47": "IO_L1N_T0_34",
            "IOB_X0Y48": "IO_L1P_T0_34"
        },
        "sites": {
            "IOB_X0Y47": "IOB33S",
            "IOB_X0Y48": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 98,
        "pin_functions": {
            "IOB_X0Y5": "IO_L22N_T3_34",
            "IOB_X0Y6": "IO_L22P_T3_34"
        },
        "sites": {
            "IOB_X0Y5": "IOB33S",
            "IOB_X0Y6": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 50,
        "pin_functions": {
            "IOB_X0Y51": "IO_L24N_T3_AD15N_35",
            "IOB_X0Y52": "IO_L24P_T3_AD15P_35"
        },
        "sites": {
            "IOB_X0Y51": "IOB33S",
            "IOB_X0Y52": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 48,
        "pin_functions": {
            "IOB_X0Y53": "IO_L23N_T3_35",
            "IOB_X0Y54": "IO_L23P_T3_35"
        },
        "sites": {
            "IOB_X0Y53": "IOB33S",
            "IOB_X0Y54": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 46,
        "pin_functions": {
            "IOB_X0Y55": "IO_L22N_T3_AD7N_35",
            "IOB_X0Y56": "IO_L22P_T3_AD7P_35"
        },
        "sites": {
            "IOB_X0Y55": "IOB33S",
            "IOB_X0Y56": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 44,
        "pin_functions": {
            "IOB_X0Y57": "IO_L21N_T3_DQS_AD14N_35",
            "IOB_X0Y58": "IO_L21P_T3_DQS_AD14P_35"
        },
        "sites": {
            "IOB_X0Y57": "IOB33S",
            "IOB_X0Y58": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 42,
        "pin_functions": {
            "IOB_X0Y59": "IO_L20N_T3_AD6N_35",
            "IOB_X0Y60": "IO_L20P_T3_AD6P_35"
        },
        "sites": {
            "IOB_X0Y59": "IOB33S",
            "IOB_X0Y60": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 40,
        "pin_functions": {
            "IOB_X0Y61": "IO_L19N_T3_VREF_35",
            "IOB_X0Y62": "IO_L19P_T3_35"
        },
        "sites": {
            "IOB_X0Y61": "IOB33S",
            "IOB_X0Y62": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 38,
        "pin_functions": {
            "IOB_X0Y63": "IO_L18N_T2_AD13N_35",
            "IOB_X0Y64": "IO_L18P_T2_AD13P_35"
        },
        "sites": {
            "IOB_X0Y63": "IOB33S",
            "IOB_X0Y64": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 36,
        "pin_functions": {
            "IOB_X0Y65": "IO_L17N_T2_AD5N_35",
            "IOB_X0Y66": "IO_L17P_T2_AD5P_35"
        },
        "sites": {
            "IOB_X0Y65": "IOB33S",
            "IOB_X0Y66": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 34,
        "pin_functions": {
            "IOB_X0Y67": "IO_L16N_T2_35",
            "IOB_X0Y68": "IO_L16P_T2_35"
        },
        "sites": {
            "IOB_X0Y67": "IOB33S",
            "IOB_X0Y68": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 32,
        "pin_functions": {
            "IOB_X0Y69": "IO_L15N_T2_DQS_AD12N_35",
            "IOB_X0Y70": "IO_L15P_T2_DQS_AD12P_35"
        },
        "sites": {
            "IOB_X0Y69": "IOB33S",
            "IOB_X0Y70": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 96,
        "pin_functions": {
            "IOB_X0Y7": "IO_L21N_T3_DQS_34",
            "IOB_X0Y8": "IO_L21P_T3_DQS_34"
        },
        "sites": {
            "IOB_X0Y7": "IOB33S",
            "IOB_X0Y8": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 30,
        "pin_functions": {
            "IOB_X0Y71": "IO_L14N_T2_AD4N_SRCC_35",
            "IOB_X0Y72": "IO_L14P_T2_AD4P_SRCC_35"
        },
        "sites": {
            "IOB_X0Y71": "IOB33S",
            "IOB_X0Y72": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 28,
        "pin_functions": {
            "IOB_X0Y73": "IO_L13N_T2_MRCC_35",
            "IOB_X0Y74": "IO_L13P_T2_MRCC_35"
        },
        "sites": {
            "IOB_X0Y73": "IOB33S",
            "IOB_X0Y74": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 25,
        "pin_functions": {
            "IOB_X0Y75": "IO_L12N_T1_MRCC_35",
            "IOB_X0Y76": "IO_L12P_T1_MRCC_35"
        },
        "sites": {
            "IOB_X0Y75": "IOB33S",
            "IOB_X0Y76": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 23,
        "pin_functions": {
            "IOB_X0Y77": "IO_L11N_T1_SRCC_35",
            "IOB_X0Y78": "IO_L11P_T1_SRCC_35"
        },
        "sites": {
            "IOB_X0Y77": "IOB33S",
            "IOB_X0Y78": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 21,
        "pin_functions": {
            "IOB_X0Y79": "IO_L10N_T1_AD11N_35",
            "IOB_X0Y80": "IO_L10P_T1_AD11P_35"
        },
        "sites": {
            "IOB_X0Y79": "IOB33S",
            "IOB_X0Y80": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 19,
        "pin_functions": {
            "IOB_X0Y81": "IO_L9N_T1_DQS_AD3N_35",
            "IOB_X0Y82": "IO_L9P_T1_DQS_AD3P_35"
        },
        "sites": {
            "IOB_X0Y81": "IOB33S",
            "IOB_X0Y82": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 17,
        "pin_functions": {
            "IOB_X0Y83": "IO_L8N_T1_AD10N_35",
            "IOB_X0Y84": "IO_L8P_T1_AD10P_35"
        },
        "sites": {
            "IOB_X0Y83": "IOB33S",
            "IOB_X0Y84": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 15,
        "pin_functions": {
            "IOB_X0Y85": "IO_L7N_T1_AD2N_35",
            "IOB_X0Y86": "IO_L7P_T1_AD2P_35"
        },
        "sites": {
            "IOB_X0Y85": "IOB33S",
            "IOB_X0Y86": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 13,
        "pin_functions": {
            "IOB_X0Y87": "IO_L6N_T0_VREF_35",
            "IOB_X0Y88": "IO_L6P_T0_35"
        },
        "sites": {
            "IOB_X0Y87": "IOB33S",
            "IOB_X0Y88": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 11,
        "pin_functions": {
            "IOB_X0Y89": "IO_L5N_T0_AD9N_35",
            "IOB_X0Y90": "IO_L5P_T0_AD9P_35"
        },
        "sites": {
            "IOB_X0Y89": "IOB33S",
            "IOB_X0Y90": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 94,
        "pin_functions": {
            "IOB_X0Y10": "IO_L20P_T3_34",
            "IOB_X0Y9": "IO_L20N_T3_34"
        },
        "sites": {
            "IOB_X0Y10": "IOB33M",
            "IOB_X0Y9": "IOB33S"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 9,
        "pin_functions": {
            "IOB_X0Y91": "IO_L4N_T0_35",
            "IOB_X0Y92": "IO_L4P_T0_35"
        },
        "sites": {
            "IOB_X0Y91": "IOB33S",
            "IOB_X0Y92": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 7,
        "pin_functions": {
            "IOB_X0Y93": "IO_L3N_T0_DQS_AD1N_35",
            "IOB_X0Y94": "IO_L3P_T0_DQS_AD1P_35"
        },
        "sites": {
            "IOB_X0Y93": "IOB33S",
            "IOB_X0Y94": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 5,
        "pin_functions": {
            "IOB_X0Y95": "IO_L2N_T0_AD8N_35",
            "IOB_X0Y96": "IO_L2P_T0_AD8P_35"
        },
        "sites": {
            "IOB_X0Y95": "IOB33S",
            "IOB_X0Y96": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 3,
        "pin_functions": {
            "IOB_X0Y97": "IO_L1N_T0_AD0N_35",
            "IOB_X0Y98": "IO_L1P_T0_AD0P_35"
        },
        "sites": {
            "IOB_X0Y97": "IOB33S",
            "IOB_X0Y98": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOI3_SING_X31Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y0": "IDELAYE2",
            "ILOGIC_X0Y0": "ILOGICE3",
            "OLOGIC_X0Y0": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X31Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y49": "IDELAYE2",
            "ILOGIC_X0Y49": "ILOGICE3",
            "OLOGIC_X0Y49": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X31Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 126,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y50": "IDELAYE2",
            "ILOGIC_X0Y50": "ILOGICE3",
            "OLOGIC_X0Y50": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X31Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 126,
        "grid_y": 1,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y99": "IDELAYE2",
            "ILOGIC_X0Y99": "ILOGICE3",
            "OLOGIC_X0Y99": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_TBYTESRC_X31Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 84,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y19": "IDELAYE2",
            "IDELAY_X0Y20": "IDELAYE2",
            "ILOGIC_X0Y19": "ILOGICE3",
            "ILOGIC_X0Y20": "ILOGICE3",
            "OLOGIC_X0Y19": "OLOGICE3",
            "OLOGIC_X0Y20": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X31Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 71,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y31": "IDELAYE2",
            "IDELAY_X0Y32": "IDELAYE2",
            "ILOGIC_X0Y31": "ILOGICE3",
            "ILOGIC_X0Y32": "ILOGICE3",
            "OLOGIC_X0Y31": "OLOGICE3",
            "OLOGIC_X0Y32": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X31Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 59,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y43": "IDELAYE2",
            "IDELAY_X0Y44": "IDELAYE2",
            "ILOGIC_X0Y43": "ILOGICE3",
            "ILOGIC_X0Y44": "ILOGICE3",
            "OLOGIC_X0Y43": "OLOGICE3",
            "OLOGIC_X0Y44": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X31Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 126,
        "grid_y": 44,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y57": "IDELAYE2",
            "IDELAY_X0Y58": "IDELAYE2",
            "ILOGIC_X0Y57": "ILOGICE3",
            "ILOGIC_X0Y58": "ILOGICE3",
            "OLOGIC_X0Y57": "OLOGICE3",
            "OLOGIC_X0Y58": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X31Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 126,
        "grid_y": 32,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y69": "IDELAYE2",
            "IDELAY_X0Y70": "IDELAYE2",
            "ILOGIC_X0Y69": "ILOGICE3",
            "ILOGIC_X0Y70": "ILOGICE3",
            "OLOGIC_X0Y69": "OLOGICE3",
            "OLOGIC_X0Y70": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X31Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 96,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y7": "IDELAYE2",
            "IDELAY_X0Y8": "IDELAYE2",
            "ILOGIC_X0Y7": "ILOGICE3",
            "ILOGIC_X0Y8": "ILOGICE3",
            "OLOGIC_X0Y7": "OLOGICE3",
            "OLOGIC_X0Y8": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
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                "baseaddr": "0x00001B80",
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        },
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            "OLOGIC_X0Y82": "OLOGICE3"
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        },
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        "type": "RIOI3_TBYTESRC"
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        },
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        },
        "type": "RIOI3_TBYTETERM"
    },
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        },
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        },
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        },
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        },
        "type": "RIOI3_TBYTETERM"
    },
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        },
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        },
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        },
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        },
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        },
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        },
        "type": "RIOI3"
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        },
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        },
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        },
        "type": "RIOI3"
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        "bits": {
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        },
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            "OLOGIC_X0Y24": "OLOGICE3"
        },
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        "bits": {
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        },
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        },
        "type": "RIOI3"
    },
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        "bits": {
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        },
        "type": "RIOI3"
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        "bits": {
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        },
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            "OLOGIC_X0Y30": "OLOGICE3"
        },
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        "bits": {
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        },
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            "OLOGIC_X0Y4": "OLOGICE3"
        },
        "type": "RIOI3"
    },
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        "bits": {
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                "words": 4
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        },
        "clock_region": "X1Y0",
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        },
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                "words": 4
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        },
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            "OLOGIC_X0Y36": "OLOGICE3"
        },
        "type": "RIOI3"
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                "words": 4
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        },
        "type": "RIOI3"
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        },
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            "OLOGIC_X0Y42": "OLOGICE3"
        },
        "type": "RIOI3"
    },
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        "bits": {
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                "words": 4
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        },
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            "OLOGIC_X0Y46": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X31Y47": {
        "bits": {
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                "offset": 95,
                "words": 4
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        },
        "clock_region": "X1Y0",
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            "OLOGIC_X0Y48": "OLOGICE3"
        },
        "type": "RIOI3"
    },
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        "bits": {
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                "offset": 10,
                "words": 4
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        },
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            "OLOGIC_X0Y6": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X31Y51": {
        "bits": {
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                "frames": 42,
                "offset": 2,
                "words": 4
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        },
        "clock_region": "X1Y1",
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        "grid_y": 50,
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            "OLOGIC_X0Y51": "OLOGICE3",
            "OLOGIC_X0Y52": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X31Y53": {
        "bits": {
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                "offset": 6,
                "words": 4
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        },
        "clock_region": "X1Y1",
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            "OLOGIC_X0Y53": "OLOGICE3",
            "OLOGIC_X0Y54": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X31Y55": {
        "bits": {
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                "offset": 10,
                "words": 4
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        },
        "clock_region": "X1Y1",
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            "OLOGIC_X0Y55": "OLOGICE3",
            "OLOGIC_X0Y56": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X31Y59": {
        "bits": {
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                "offset": 18,
                "words": 4
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        },
        "clock_region": "X1Y1",
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            "OLOGIC_X0Y59": "OLOGICE3",
            "OLOGIC_X0Y60": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X31Y61": {
        "bits": {
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                "offset": 22,
                "words": 4
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        },
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            "OLOGIC_X0Y61": "OLOGICE3",
            "OLOGIC_X0Y62": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X31Y65": {
        "bits": {
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                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 30,
                "words": 4
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        },
        "clock_region": "X1Y1",
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            "OLOGIC_X0Y65": "OLOGICE3",
            "OLOGIC_X0Y66": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X31Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 34,
                "words": 4
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "OLOGIC_X0Y67": "OLOGICE3",
            "OLOGIC_X0Y68": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X31Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 42,
                "words": 4
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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