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foss-fpga-tools/prjxray-db/1dd33bf4d7e21d44700172f36046be8bd35e7dac^!/.
commit
1dd33bf4d7e21d44700172f36046be8bd35e7dac
[log] [tgz]
author
Tim 'mithro' Ansell <me@mith.ro>
Fri Oct 05 14:21:37 2018 +0000
committer
SymbiYosys Travis Bot <nobody@nowhere.com>
Fri Oct 05 14:21:37 2018 +0000
tree
773f6ceb16d93b99a03a0e40e29fb65dabfec4e8
parent
305fd351b47591f7d602e84203d884659f1aadab [diff]
Travis build #277 of v0.0-116-gfcb76b4

From https://github.com/SymbiFlow/prjxray-db/tree/fcb76b4ac952140a907fca67dc1103a29dfbc2d2

diff --git a/artix7/seg_clbll_r.html b/artix7/seg_clbll_r.html
index 49d9adb..c6d4914 100644
--- a/artix7/seg_clbll_r.html
+++ b/artix7/seg_clbll_r.html

@@ -24098,6 +24098,118 @@
 <tr bgcolor="#dddddd"><!-- 1-----1-- --><td>INT_R.WW4BEG3.NE6END3</td><td align="center">-</td><td align="center">-</td><td align="center">1</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td></tr>
 <tr><!-- 1----1--- --><td>INT_R.WW4BEG3.NN6END3</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td></tr>
 </table>
+<h3>Tile INT_R Pseudo PIPs</h3>
+<table cellspacing=0>
+<tr><th width="500" align="left">PIP</th><th>Type</th></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN_ALT0.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.FAN_ALT1.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN_ALT2.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.FAN_ALT3.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN_ALT4.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.FAN_ALT5.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN_ALT6.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.FAN_ALT7.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP_ALT0.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.BYP_ALT1.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP_ALT2.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.BYP_ALT3.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP_ALT4.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.BYP_ALT5.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP_ALT6.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.BYP_ALT7.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX0.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX1.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX2.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX3.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX4.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX5.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX6.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX7.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX8.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX9.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX10.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX11.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX12.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX13.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX14.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX15.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX16.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX17.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX18.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX19.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX20.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX21.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX22.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX23.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX24.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX25.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX26.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX27.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX28.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX29.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX30.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX31.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX32.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX33.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX34.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX35.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX36.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX37.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX38.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX39.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX40.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX41.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX42.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX43.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX44.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX45.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX46.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX47.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP_BOUNCE0.BYP_ALT0</td><td>always</td></tr>
+<tr><td>INT_R.BYP_BOUNCE1.BYP_ALT1</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP_BOUNCE2.BYP_ALT2</td><td>always</td></tr>
+<tr><td>INT_R.BYP_BOUNCE3.BYP_ALT3</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP_BOUNCE4.BYP_ALT4</td><td>always</td></tr>
+<tr><td>INT_R.BYP_BOUNCE5.BYP_ALT5</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP_BOUNCE6.BYP_ALT6</td><td>always</td></tr>
+<tr><td>INT_R.BYP_BOUNCE7.BYP_ALT7</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP0.BYP_ALT0</td><td>always</td></tr>
+<tr><td>INT_R.BYP1.BYP_ALT1</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP2.BYP_ALT2</td><td>always</td></tr>
+<tr><td>INT_R.BYP3.BYP_ALT3</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP4.BYP_ALT4</td><td>always</td></tr>
+<tr><td>INT_R.BYP5.BYP_ALT5</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP6.BYP_ALT6</td><td>always</td></tr>
+<tr><td>INT_R.BYP7.BYP_ALT7</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN_BOUNCE0.FAN_ALT0</td><td>always</td></tr>
+<tr><td>INT_R.FAN_BOUNCE1.FAN_ALT1</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN_BOUNCE2.FAN_ALT2</td><td>always</td></tr>
+<tr><td>INT_R.FAN_BOUNCE3.FAN_ALT3</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN_BOUNCE4.FAN_ALT4</td><td>always</td></tr>
+<tr><td>INT_R.FAN_BOUNCE5.FAN_ALT5</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN_BOUNCE6.FAN_ALT6</td><td>always</td></tr>
+<tr><td>INT_R.FAN_BOUNCE7.FAN_ALT7</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN0.FAN_ALT0</td><td>always</td></tr>
+<tr><td>INT_R.FAN1.FAN_ALT1</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN2.FAN_ALT2</td><td>always</td></tr>
+<tr><td>INT_R.FAN3.FAN_ALT3</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN4.FAN_ALT4</td><td>always</td></tr>
+<tr><td>INT_R.FAN5.FAN_ALT5</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN6.FAN_ALT6</td><td>always</td></tr>
+<tr><td>INT_R.FAN7.FAN_ALT7</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.GCLK_B0_EAST.GCLK_B0</td><td>always</td></tr>
+<tr><td>INT_R.GCLK_B0_WEST.GCLK_B0</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.GCLK_B1_EAST.GCLK_B1</td><td>always</td></tr>
+<tr><td>INT_R.GCLK_B1_WEST.GCLK_B1</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.GCLK_B2_EAST.GCLK_B2</td><td>always</td></tr>
+<tr><td>INT_R.GCLK_B2_WEST.GCLK_B2</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.GCLK_B3_EAST.GCLK_B3</td><td>always</td></tr>
+<tr><td>INT_R.GCLK_B3_WEST.GCLK_B3</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.GCLK_B4_EAST.GCLK_B4</td><td>always</td></tr>
+<tr><td>INT_R.GCLK_B4_WEST.GCLK_B4</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.GCLK_B5_EAST.GCLK_B5</td><td>always</td></tr>
+<tr><td>INT_R.GCLK_B5_WEST.GCLK_B5</td><td>always</td></tr>
+</table>
 <h3>Tile CLBLL_R Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
@@ -24248,117 +24360,5 @@
 <tr bgcolor="#dddddd"><td>CLBLL_R.CLBLL_LOGIC_OUTS19.CLBLL_L_DMUX</td><td>always</td></tr>
 <tr><td>CLBLL_R.CLBLL_LOGIC_OUTS3.CLBLL_L_DQ</td><td>always</td></tr>
 </table>
-<h3>Tile INT_R Pseudo PIPs</h3>
-<table cellspacing=0>
-<tr><th width="500" align="left">PIP</th><th>Type</th></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN_ALT0.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.FAN_ALT1.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN_ALT2.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.FAN_ALT3.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN_ALT4.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.FAN_ALT5.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN_ALT6.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.FAN_ALT7.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP_ALT0.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.BYP_ALT1.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP_ALT2.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.BYP_ALT3.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP_ALT4.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.BYP_ALT5.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP_ALT6.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.BYP_ALT7.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX0.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX1.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX2.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX3.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX4.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX5.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX6.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX7.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX8.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX9.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX10.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX11.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX12.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX13.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX14.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX15.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX16.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX17.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX18.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX19.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX20.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX21.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX22.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX23.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX24.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX25.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX26.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX27.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX28.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX29.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX30.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX31.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX32.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX33.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX34.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX35.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX36.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX37.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX38.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX39.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX40.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX41.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX42.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX43.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX44.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX45.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX46.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX47.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP_BOUNCE0.BYP_ALT0</td><td>always</td></tr>
-<tr><td>INT_R.BYP_BOUNCE1.BYP_ALT1</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP_BOUNCE2.BYP_ALT2</td><td>always</td></tr>
-<tr><td>INT_R.BYP_BOUNCE3.BYP_ALT3</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP_BOUNCE4.BYP_ALT4</td><td>always</td></tr>
-<tr><td>INT_R.BYP_BOUNCE5.BYP_ALT5</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP_BOUNCE6.BYP_ALT6</td><td>always</td></tr>
-<tr><td>INT_R.BYP_BOUNCE7.BYP_ALT7</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP0.BYP_ALT0</td><td>always</td></tr>
-<tr><td>INT_R.BYP1.BYP_ALT1</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP2.BYP_ALT2</td><td>always</td></tr>
-<tr><td>INT_R.BYP3.BYP_ALT3</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP4.BYP_ALT4</td><td>always</td></tr>
-<tr><td>INT_R.BYP5.BYP_ALT5</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP6.BYP_ALT6</td><td>always</td></tr>
-<tr><td>INT_R.BYP7.BYP_ALT7</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN_BOUNCE0.FAN_ALT0</td><td>always</td></tr>
-<tr><td>INT_R.FAN_BOUNCE1.FAN_ALT1</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN_BOUNCE2.FAN_ALT2</td><td>always</td></tr>
-<tr><td>INT_R.FAN_BOUNCE3.FAN_ALT3</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN_BOUNCE4.FAN_ALT4</td><td>always</td></tr>
-<tr><td>INT_R.FAN_BOUNCE5.FAN_ALT5</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN_BOUNCE6.FAN_ALT6</td><td>always</td></tr>
-<tr><td>INT_R.FAN_BOUNCE7.FAN_ALT7</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN0.FAN_ALT0</td><td>always</td></tr>
-<tr><td>INT_R.FAN1.FAN_ALT1</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN2.FAN_ALT2</td><td>always</td></tr>
-<tr><td>INT_R.FAN3.FAN_ALT3</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN4.FAN_ALT4</td><td>always</td></tr>
-<tr><td>INT_R.FAN5.FAN_ALT5</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN6.FAN_ALT6</td><td>always</td></tr>
-<tr><td>INT_R.FAN7.FAN_ALT7</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.GCLK_B0_EAST.GCLK_B0</td><td>always</td></tr>
-<tr><td>INT_R.GCLK_B0_WEST.GCLK_B0</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.GCLK_B1_EAST.GCLK_B1</td><td>always</td></tr>
-<tr><td>INT_R.GCLK_B1_WEST.GCLK_B1</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.GCLK_B2_EAST.GCLK_B2</td><td>always</td></tr>
-<tr><td>INT_R.GCLK_B2_WEST.GCLK_B2</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.GCLK_B3_EAST.GCLK_B3</td><td>always</td></tr>
-<tr><td>INT_R.GCLK_B3_WEST.GCLK_B3</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.GCLK_B4_EAST.GCLK_B4</td><td>always</td></tr>
-<tr><td>INT_R.GCLK_B4_WEST.GCLK_B4</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.GCLK_B5_EAST.GCLK_B5</td><td>always</td></tr>
-<tr><td>INT_R.GCLK_B5_WEST.GCLK_B5</td><td>always</td></tr>
-</table>
 </div>
 </body></html>

diff --git a/artix7/seg_clblm_r.html b/artix7/seg_clblm_r.html
index cf7d67d..47fd799 100644
--- a/artix7/seg_clblm_r.html
+++ b/artix7/seg_clblm_r.html

@@ -24098,6 +24098,118 @@
 <tr bgcolor="#dddddd"><!-- 1-----1-- --><td>INT_R.WW4BEG3.NE6END3</td><td align="center">-</td><td align="center">-</td><td align="center">1</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td></tr>
 <tr><!-- 1----1--- --><td>INT_R.WW4BEG3.NN6END3</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td></tr>
 </table>
+<h3>Tile INT_R Pseudo PIPs</h3>
+<table cellspacing=0>
+<tr><th width="500" align="left">PIP</th><th>Type</th></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN_ALT0.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.FAN_ALT1.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN_ALT2.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.FAN_ALT3.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN_ALT4.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.FAN_ALT5.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN_ALT6.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.FAN_ALT7.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP_ALT0.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.BYP_ALT1.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP_ALT2.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.BYP_ALT3.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP_ALT4.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.BYP_ALT5.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP_ALT6.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.BYP_ALT7.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX0.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX1.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX2.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX3.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX4.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX5.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX6.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX7.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX8.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX9.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX10.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX11.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX12.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX13.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX14.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX15.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX16.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX17.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX18.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX19.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX20.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX21.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX22.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX23.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX24.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX25.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX26.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX27.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX28.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX29.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX30.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX31.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX32.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX33.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX34.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX35.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX36.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX37.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX38.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX39.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX40.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX41.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX42.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX43.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX44.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX45.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.IMUX46.VCC_WIRE</td><td>default</td></tr>
+<tr><td>INT_R.IMUX47.VCC_WIRE</td><td>default</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP_BOUNCE0.BYP_ALT0</td><td>always</td></tr>
+<tr><td>INT_R.BYP_BOUNCE1.BYP_ALT1</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP_BOUNCE2.BYP_ALT2</td><td>always</td></tr>
+<tr><td>INT_R.BYP_BOUNCE3.BYP_ALT3</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP_BOUNCE4.BYP_ALT4</td><td>always</td></tr>
+<tr><td>INT_R.BYP_BOUNCE5.BYP_ALT5</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP_BOUNCE6.BYP_ALT6</td><td>always</td></tr>
+<tr><td>INT_R.BYP_BOUNCE7.BYP_ALT7</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP0.BYP_ALT0</td><td>always</td></tr>
+<tr><td>INT_R.BYP1.BYP_ALT1</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP2.BYP_ALT2</td><td>always</td></tr>
+<tr><td>INT_R.BYP3.BYP_ALT3</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP4.BYP_ALT4</td><td>always</td></tr>
+<tr><td>INT_R.BYP5.BYP_ALT5</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.BYP6.BYP_ALT6</td><td>always</td></tr>
+<tr><td>INT_R.BYP7.BYP_ALT7</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN_BOUNCE0.FAN_ALT0</td><td>always</td></tr>
+<tr><td>INT_R.FAN_BOUNCE1.FAN_ALT1</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN_BOUNCE2.FAN_ALT2</td><td>always</td></tr>
+<tr><td>INT_R.FAN_BOUNCE3.FAN_ALT3</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN_BOUNCE4.FAN_ALT4</td><td>always</td></tr>
+<tr><td>INT_R.FAN_BOUNCE5.FAN_ALT5</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN_BOUNCE6.FAN_ALT6</td><td>always</td></tr>
+<tr><td>INT_R.FAN_BOUNCE7.FAN_ALT7</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN0.FAN_ALT0</td><td>always</td></tr>
+<tr><td>INT_R.FAN1.FAN_ALT1</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN2.FAN_ALT2</td><td>always</td></tr>
+<tr><td>INT_R.FAN3.FAN_ALT3</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN4.FAN_ALT4</td><td>always</td></tr>
+<tr><td>INT_R.FAN5.FAN_ALT5</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.FAN6.FAN_ALT6</td><td>always</td></tr>
+<tr><td>INT_R.FAN7.FAN_ALT7</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.GCLK_B0_EAST.GCLK_B0</td><td>always</td></tr>
+<tr><td>INT_R.GCLK_B0_WEST.GCLK_B0</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.GCLK_B1_EAST.GCLK_B1</td><td>always</td></tr>
+<tr><td>INT_R.GCLK_B1_WEST.GCLK_B1</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.GCLK_B2_EAST.GCLK_B2</td><td>always</td></tr>
+<tr><td>INT_R.GCLK_B2_WEST.GCLK_B2</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.GCLK_B3_EAST.GCLK_B3</td><td>always</td></tr>
+<tr><td>INT_R.GCLK_B3_WEST.GCLK_B3</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.GCLK_B4_EAST.GCLK_B4</td><td>always</td></tr>
+<tr><td>INT_R.GCLK_B4_WEST.GCLK_B4</td><td>always</td></tr>
+<tr bgcolor="#dddddd"><td>INT_R.GCLK_B5_EAST.GCLK_B5</td><td>always</td></tr>
+<tr><td>INT_R.GCLK_B5_WEST.GCLK_B5</td><td>always</td></tr>
+</table>
 <h3>Tile CLBLM_R Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
@@ -24253,117 +24365,5 @@
 <tr><td>CLBLM_R.CLBLM_LOGIC_OUTS23.CLBLM_M_DMUX</td><td>always</td></tr>
 <tr bgcolor="#dddddd"><td>CLBLM_R.CLBLM_LOGIC_OUTS7.CLBLM_M_DQ</td><td>always</td></tr>
 </table>
-<h3>Tile INT_R Pseudo PIPs</h3>
-<table cellspacing=0>
-<tr><th width="500" align="left">PIP</th><th>Type</th></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN_ALT0.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.FAN_ALT1.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN_ALT2.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.FAN_ALT3.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN_ALT4.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.FAN_ALT5.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN_ALT6.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.FAN_ALT7.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP_ALT0.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.BYP_ALT1.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP_ALT2.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.BYP_ALT3.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP_ALT4.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.BYP_ALT5.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP_ALT6.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.BYP_ALT7.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX0.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX1.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX2.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX3.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX4.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX5.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX6.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX7.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX8.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX9.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX10.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX11.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX12.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX13.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX14.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX15.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX16.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX17.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX18.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX19.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX20.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX21.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX22.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX23.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX24.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX25.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX26.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX27.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX28.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX29.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX30.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX31.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX32.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX33.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX34.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX35.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX36.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX37.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX38.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX39.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX40.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX41.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX42.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX43.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX44.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX45.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.IMUX46.VCC_WIRE</td><td>default</td></tr>
-<tr><td>INT_R.IMUX47.VCC_WIRE</td><td>default</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP_BOUNCE0.BYP_ALT0</td><td>always</td></tr>
-<tr><td>INT_R.BYP_BOUNCE1.BYP_ALT1</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP_BOUNCE2.BYP_ALT2</td><td>always</td></tr>
-<tr><td>INT_R.BYP_BOUNCE3.BYP_ALT3</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP_BOUNCE4.BYP_ALT4</td><td>always</td></tr>
-<tr><td>INT_R.BYP_BOUNCE5.BYP_ALT5</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP_BOUNCE6.BYP_ALT6</td><td>always</td></tr>
-<tr><td>INT_R.BYP_BOUNCE7.BYP_ALT7</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP0.BYP_ALT0</td><td>always</td></tr>
-<tr><td>INT_R.BYP1.BYP_ALT1</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP2.BYP_ALT2</td><td>always</td></tr>
-<tr><td>INT_R.BYP3.BYP_ALT3</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP4.BYP_ALT4</td><td>always</td></tr>
-<tr><td>INT_R.BYP5.BYP_ALT5</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.BYP6.BYP_ALT6</td><td>always</td></tr>
-<tr><td>INT_R.BYP7.BYP_ALT7</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN_BOUNCE0.FAN_ALT0</td><td>always</td></tr>
-<tr><td>INT_R.FAN_BOUNCE1.FAN_ALT1</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN_BOUNCE2.FAN_ALT2</td><td>always</td></tr>
-<tr><td>INT_R.FAN_BOUNCE3.FAN_ALT3</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN_BOUNCE4.FAN_ALT4</td><td>always</td></tr>
-<tr><td>INT_R.FAN_BOUNCE5.FAN_ALT5</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN_BOUNCE6.FAN_ALT6</td><td>always</td></tr>
-<tr><td>INT_R.FAN_BOUNCE7.FAN_ALT7</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN0.FAN_ALT0</td><td>always</td></tr>
-<tr><td>INT_R.FAN1.FAN_ALT1</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN2.FAN_ALT2</td><td>always</td></tr>
-<tr><td>INT_R.FAN3.FAN_ALT3</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN4.FAN_ALT4</td><td>always</td></tr>
-<tr><td>INT_R.FAN5.FAN_ALT5</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.FAN6.FAN_ALT6</td><td>always</td></tr>
-<tr><td>INT_R.FAN7.FAN_ALT7</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.GCLK_B0_EAST.GCLK_B0</td><td>always</td></tr>
-<tr><td>INT_R.GCLK_B0_WEST.GCLK_B0</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.GCLK_B1_EAST.GCLK_B1</td><td>always</td></tr>
-<tr><td>INT_R.GCLK_B1_WEST.GCLK_B1</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.GCLK_B2_EAST.GCLK_B2</td><td>always</td></tr>
-<tr><td>INT_R.GCLK_B2_WEST.GCLK_B2</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.GCLK_B3_EAST.GCLK_B3</td><td>always</td></tr>
-<tr><td>INT_R.GCLK_B3_WEST.GCLK_B3</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.GCLK_B4_EAST.GCLK_B4</td><td>always</td></tr>
-<tr><td>INT_R.GCLK_B4_WEST.GCLK_B4</td><td>always</td></tr>
-<tr bgcolor="#dddddd"><td>INT_R.GCLK_B5_EAST.GCLK_B5</td><td>always</td></tr>
-<tr><td>INT_R.GCLK_B5_WEST.GCLK_B5</td><td>always</td></tr>
-</table>
 </div>
 </body></html>

diff --git a/kintex7/seg_bram0_l.html b/kintex7/seg_bram0_l.html
index 84c0170..06b0e05 100644
--- a/kintex7/seg_bram0_l.html
+++ b/kintex7/seg_bram0_l.html

@@ -20530,10 +20530,6 @@
 <tr bgcolor="#dddddd"><!-- 1------1- --><td>INT_L.WW4BEG3.LOGIC_OUTS_L15</td><td align="center">-</td><td align="center">1</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td></tr>
 <tr><!-- 11------- --><td>INT_L.WW4BEG3.LOGIC_OUTS_L21</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td><td align="center">1</td></tr>
 </table>
-<h3>Tile BRAM_INT_INTERFACE_L Pseudo PIPs</h3>
-<table cellspacing=0>
-<tr><th width="500" align="left">PIP</th><th>Type</th></tr>
-</table>
 <h3>Tile INT_L Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
@@ -20542,5 +20538,9 @@
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>
+<h3>Tile BRAM_INT_INTERFACE_L Pseudo PIPs</h3>
+<table cellspacing=0>
+<tr><th width="500" align="left">PIP</th><th>Type</th></tr>
+</table>
 </div>
 </body></html>

diff --git a/kintex7/seg_bram1_l.html b/kintex7/seg_bram1_l.html
index 8dd098d..f0fc704 100644
--- a/kintex7/seg_bram1_l.html
+++ b/kintex7/seg_bram1_l.html

@@ -20530,11 +20530,11 @@
 <tr bgcolor="#dddddd"><!-- 1------1- --><td>INT_L.WW4BEG3.LOGIC_OUTS_L15</td><td align="center">-</td><td align="center">1</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td></tr>
 <tr><!-- 11------- --><td>INT_L.WW4BEG3.LOGIC_OUTS_L21</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td><td align="center">1</td></tr>
 </table>
-<h3>Tile BRAM_INT_INTERFACE_L Pseudo PIPs</h3>
+<h3>Tile INT_L Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>
-<h3>Tile INT_L Pseudo PIPs</h3>
+<h3>Tile BRAM_INT_INTERFACE_L Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>

diff --git a/kintex7/seg_bram2_l.html b/kintex7/seg_bram2_l.html
index 4d422ca..ae7239e 100644
--- a/kintex7/seg_bram2_l.html
+++ b/kintex7/seg_bram2_l.html

@@ -20530,11 +20530,11 @@
 <tr bgcolor="#dddddd"><!-- 1------1- --><td>INT_L.WW4BEG3.LOGIC_OUTS_L15</td><td align="center">-</td><td align="center">1</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td></tr>
 <tr><!-- 11------- --><td>INT_L.WW4BEG3.LOGIC_OUTS_L21</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td><td align="center">1</td></tr>
 </table>
-<h3>Tile BRAM_INT_INTERFACE_L Pseudo PIPs</h3>
+<h3>Tile INT_L Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>
-<h3>Tile INT_L Pseudo PIPs</h3>
+<h3>Tile BRAM_INT_INTERFACE_L Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>

diff --git a/kintex7/seg_bram3_l.html b/kintex7/seg_bram3_l.html
index e248200..b9dbf90 100644
--- a/kintex7/seg_bram3_l.html
+++ b/kintex7/seg_bram3_l.html

@@ -20530,11 +20530,11 @@
 <tr bgcolor="#dddddd"><!-- 1------1- --><td>INT_L.WW4BEG3.LOGIC_OUTS_L15</td><td align="center">-</td><td align="center">1</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td></tr>
 <tr><!-- 11------- --><td>INT_L.WW4BEG3.LOGIC_OUTS_L21</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td><td align="center">1</td></tr>
 </table>
-<h3>Tile BRAM_INT_INTERFACE_L Pseudo PIPs</h3>
+<h3>Tile INT_L Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>
-<h3>Tile INT_L Pseudo PIPs</h3>
+<h3>Tile BRAM_INT_INTERFACE_L Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>

diff --git a/kintex7/seg_bram4_l.html b/kintex7/seg_bram4_l.html
index 9ff5f66..769bb02 100644
--- a/kintex7/seg_bram4_l.html
+++ b/kintex7/seg_bram4_l.html

@@ -20530,11 +20530,11 @@
 <tr bgcolor="#dddddd"><!-- 1------1- --><td>INT_L.WW4BEG3.LOGIC_OUTS_L15</td><td align="center">-</td><td align="center">1</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td></tr>
 <tr><!-- 11------- --><td>INT_L.WW4BEG3.LOGIC_OUTS_L21</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td><td align="center">1</td></tr>
 </table>
-<h3>Tile BRAM_INT_INTERFACE_L Pseudo PIPs</h3>
+<h3>Tile INT_L Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>
-<h3>Tile INT_L Pseudo PIPs</h3>
+<h3>Tile BRAM_INT_INTERFACE_L Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>

diff --git a/kintex7/seg_clbll_l.html b/kintex7/seg_clbll_l.html
index 9c5a2cb..7af4a9e 100644
--- a/kintex7/seg_clbll_l.html
+++ b/kintex7/seg_clbll_l.html

@@ -22868,11 +22868,11 @@
 <tr bgcolor="#dddddd"><!-- 1-----1-- --><td>INT_L.WW4BEG3.NE6END3</td><td align="center">-</td><td align="center">-</td><td align="center">1</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td></tr>
 <tr><!-- 1----1--- --><td>INT_L.WW4BEG3.NN6END3</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td></tr>
 </table>
-<h3>Tile CLBLL_L Pseudo PIPs</h3>
+<h3>Tile INT_L Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>
-<h3>Tile INT_L Pseudo PIPs</h3>
+<h3>Tile CLBLL_L Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>

diff --git a/kintex7/seg_clblm_l.html b/kintex7/seg_clblm_l.html
index ed14fc2..33cbc5a 100644
--- a/kintex7/seg_clblm_l.html
+++ b/kintex7/seg_clblm_l.html

@@ -22868,11 +22868,11 @@
 <tr bgcolor="#dddddd"><!-- 1-----1-- --><td>INT_L.WW4BEG3.NE6END3</td><td align="center">-</td><td align="center">-</td><td align="center">1</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td></tr>
 <tr><!-- 1----1--- --><td>INT_L.WW4BEG3.NN6END3</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td></tr>
 </table>
-<h3>Tile CLBLM_L Pseudo PIPs</h3>
+<h3>Tile INT_L Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>
-<h3>Tile INT_L Pseudo PIPs</h3>
+<h3>Tile CLBLM_L Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>

diff --git a/kintex7/seg_clblm_r.html b/kintex7/seg_clblm_r.html
index dae8e14..6e52043 100644
--- a/kintex7/seg_clblm_r.html
+++ b/kintex7/seg_clblm_r.html

@@ -22868,11 +22868,11 @@
 <tr bgcolor="#dddddd"><!-- 1-----1-- --><td>INT_R.WW4BEG3.NE6END3</td><td align="center">-</td><td align="center">-</td><td align="center">1</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td></tr>
 <tr><!-- 1----1--- --><td>INT_R.WW4BEG3.NN6END3</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td></tr>
 </table>
-<h3>Tile INT_R Pseudo PIPs</h3>
+<h3>Tile CLBLM_R Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>
-<h3>Tile CLBLM_R Pseudo PIPs</h3>
+<h3>Tile INT_R Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>

diff --git a/kintex7/seg_dsp1_r.html b/kintex7/seg_dsp1_r.html
index eee07ab..fe4211b 100644
--- a/kintex7/seg_dsp1_r.html
+++ b/kintex7/seg_dsp1_r.html

@@ -20530,11 +20530,11 @@
 <tr bgcolor="#dddddd"><!-- 1------1- --><td>INT_R.WW4BEG3.LOGIC_OUTS15</td><td align="center">-</td><td align="center">1</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td></tr>
 <tr><!-- 11------- --><td>INT_R.WW4BEG3.LOGIC_OUTS21</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td><td align="center">1</td></tr>
 </table>
-<h3>Tile INT_R Pseudo PIPs</h3>
+<h3>Tile INT_INTERFACE_R Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>
-<h3>Tile INT_INTERFACE_R Pseudo PIPs</h3>
+<h3>Tile INT_R Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>

diff --git a/kintex7/seg_dsp2_r.html b/kintex7/seg_dsp2_r.html
index 72aaa8e..f97970c 100644
--- a/kintex7/seg_dsp2_r.html
+++ b/kintex7/seg_dsp2_r.html

@@ -20530,11 +20530,11 @@
 <tr bgcolor="#dddddd"><!-- 1------1- --><td>INT_R.WW4BEG3.LOGIC_OUTS15</td><td align="center">-</td><td align="center">1</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td></tr>
 <tr><!-- 11------- --><td>INT_R.WW4BEG3.LOGIC_OUTS21</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td><td align="center">1</td></tr>
 </table>
-<h3>Tile INT_R Pseudo PIPs</h3>
+<h3>Tile INT_INTERFACE_R Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>
-<h3>Tile INT_INTERFACE_R Pseudo PIPs</h3>
+<h3>Tile INT_R Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>

diff --git a/kintex7/seg_dsp3_r.html b/kintex7/seg_dsp3_r.html
index ad55e4d..ee6be61 100644
--- a/kintex7/seg_dsp3_r.html
+++ b/kintex7/seg_dsp3_r.html

@@ -20530,11 +20530,11 @@
 <tr bgcolor="#dddddd"><!-- 1------1- --><td>INT_R.WW4BEG3.LOGIC_OUTS15</td><td align="center">-</td><td align="center">1</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td></tr>
 <tr><!-- 11------- --><td>INT_R.WW4BEG3.LOGIC_OUTS21</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td><td align="center">1</td></tr>
 </table>
-<h3>Tile INT_R Pseudo PIPs</h3>
+<h3>Tile INT_INTERFACE_R Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>
-<h3>Tile INT_INTERFACE_R Pseudo PIPs</h3>
+<h3>Tile INT_R Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>

diff --git a/kintex7/seg_dsp4_r.html b/kintex7/seg_dsp4_r.html
index 265fa69..66a9ea8 100644
--- a/kintex7/seg_dsp4_r.html
+++ b/kintex7/seg_dsp4_r.html

@@ -20530,11 +20530,11 @@
 <tr bgcolor="#dddddd"><!-- 1------1- --><td>INT_R.WW4BEG3.LOGIC_OUTS15</td><td align="center">-</td><td align="center">1</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td></tr>
 <tr><!-- 11------- --><td>INT_R.WW4BEG3.LOGIC_OUTS21</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">-</td><td align="center">1</td><td align="center">1</td></tr>
 </table>
-<h3>Tile INT_R Pseudo PIPs</h3>
+<h3>Tile INT_INTERFACE_R Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>
-<h3>Tile INT_INTERFACE_R Pseudo PIPs</h3>
+<h3>Tile INT_R Pseudo PIPs</h3>
 <table cellspacing=0>
 <tr><th width="500" align="left">PIP</th><th>Type</th></tr>
 </table>