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        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y8": "FIFO18E1",
            "RAMB18_X0Y9": "RAMB18E1",
            "RAMB36_X0Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y10": "FIFO18E1",
            "RAMB18_X0Y11": "RAMB18E1",
            "RAMB36_X0Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y12": "FIFO18E1",
            "RAMB18_X0Y13": "RAMB18E1",
            "RAMB36_X0Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y14": "FIFO18E1",
            "RAMB18_X0Y15": "RAMB18E1",
            "RAMB36_X0Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y16": "FIFO18E1",
            "RAMB18_X0Y17": "RAMB18E1",
            "RAMB36_X0Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y18": "FIFO18E1",
            "RAMB18_X0Y19": "RAMB18E1",
            "RAMB36_X0Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y20": "FIFO18E1",
            "RAMB18_X0Y21": "RAMB18E1",
            "RAMB36_X0Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y22": "FIFO18E1",
            "RAMB18_X0Y23": "RAMB18E1",
            "RAMB36_X0Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y24": "FIFO18E1",
            "RAMB18_X0Y25": "RAMB18E1",
            "RAMB36_X0Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y26": "FIFO18E1",
            "RAMB18_X0Y27": "RAMB18E1",
            "RAMB36_X0Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y28": "FIFO18E1",
            "RAMB18_X0Y29": "RAMB18E1",
            "RAMB36_X0Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y30": "FIFO18E1",
            "RAMB18_X0Y31": "RAMB18E1",
            "RAMB36_X0Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y32": "FIFO18E1",
            "RAMB18_X0Y33": "RAMB18E1",
            "RAMB36_X0Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y34": "FIFO18E1",
            "RAMB18_X0Y35": "RAMB18E1",
            "RAMB36_X0Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y36": "FIFO18E1",
            "RAMB18_X0Y37": "RAMB18E1",
            "RAMB36_X0Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y38": "FIFO18E1",
            "RAMB18_X0Y39": "RAMB18E1",
            "RAMB36_X0Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y100": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y40": "FIFO18E1",
            "RAMB18_X0Y41": "RAMB18E1",
            "RAMB36_X0Y20": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y105": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y42": "FIFO18E1",
            "RAMB18_X0Y43": "RAMB18E1",
            "RAMB36_X0Y21": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y110": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y44": "FIFO18E1",
            "RAMB18_X0Y45": "RAMB18E1",
            "RAMB36_X0Y22": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y115": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y46": "FIFO18E1",
            "RAMB18_X0Y47": "RAMB18E1",
            "RAMB36_X0Y23": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y120": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y48": "FIFO18E1",
            "RAMB18_X0Y49": "RAMB18E1",
            "RAMB36_X0Y24": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y125": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y50": "FIFO18E1",
            "RAMB18_X0Y51": "RAMB18E1",
            "RAMB36_X0Y25": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y130": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y52": "FIFO18E1",
            "RAMB18_X0Y53": "RAMB18E1",
            "RAMB36_X0Y26": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y135": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y54": "FIFO18E1",
            "RAMB18_X0Y55": "RAMB18E1",
            "RAMB36_X0Y27": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y140": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y56": "FIFO18E1",
            "RAMB18_X0Y57": "RAMB18E1",
            "RAMB36_X0Y28": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y145": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y58": "FIFO18E1",
            "RAMB18_X0Y59": "RAMB18E1",
            "RAMB36_X0Y29": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 75,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y0": "FIFO18E1",
            "RAMB18_X1Y1": "RAMB18E1",
            "RAMB36_X1Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 75,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y2": "FIFO18E1",
            "RAMB18_X1Y3": "RAMB18E1",
            "RAMB36_X1Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 75,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y4": "FIFO18E1",
            "RAMB18_X1Y5": "RAMB18E1",
            "RAMB36_X1Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 75,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y6": "FIFO18E1",
            "RAMB18_X1Y7": "RAMB18E1",
            "RAMB36_X1Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 75,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y8": "FIFO18E1",
            "RAMB18_X1Y9": "RAMB18E1",
            "RAMB36_X1Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 75,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y10": "FIFO18E1",
            "RAMB18_X1Y11": "RAMB18E1",
            "RAMB36_X1Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 75,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y12": "FIFO18E1",
            "RAMB18_X1Y13": "RAMB18E1",
            "RAMB36_X1Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 75,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y14": "FIFO18E1",
            "RAMB18_X1Y15": "RAMB18E1",
            "RAMB36_X1Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 75,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y16": "FIFO18E1",
            "RAMB18_X1Y17": "RAMB18E1",
            "RAMB36_X1Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 75,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y18": "FIFO18E1",
            "RAMB18_X1Y19": "RAMB18E1",
            "RAMB36_X1Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 75,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y20": "FIFO18E1",
            "RAMB18_X1Y21": "RAMB18E1",
            "RAMB36_X1Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 75,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y22": "FIFO18E1",
            "RAMB18_X1Y23": "RAMB18E1",
            "RAMB36_X1Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 75,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y24": "FIFO18E1",
            "RAMB18_X1Y25": "RAMB18E1",
            "RAMB36_X1Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 75,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y26": "FIFO18E1",
            "RAMB18_X1Y27": "RAMB18E1",
            "RAMB36_X1Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 75,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y28": "FIFO18E1",
            "RAMB18_X1Y29": "RAMB18E1",
            "RAMB36_X1Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 75,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y30": "FIFO18E1",
            "RAMB18_X1Y31": "RAMB18E1",
            "RAMB36_X1Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 75,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y32": "FIFO18E1",
            "RAMB18_X1Y33": "RAMB18E1",
            "RAMB36_X1Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 75,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y34": "FIFO18E1",
            "RAMB18_X1Y35": "RAMB18E1",
            "RAMB36_X1Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 75,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y36": "FIFO18E1",
            "RAMB18_X1Y37": "RAMB18E1",
            "RAMB36_X1Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 75,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y38": "FIFO18E1",
            "RAMB18_X1Y39": "RAMB18E1",
            "RAMB36_X1Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y125": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 75,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y50": "FIFO18E1",
            "RAMB18_X1Y51": "RAMB18E1",
            "RAMB36_X1Y25": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y130": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 75,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y52": "FIFO18E1",
            "RAMB18_X1Y53": "RAMB18E1",
            "RAMB36_X1Y26": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y135": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 75,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y54": "FIFO18E1",
            "RAMB18_X1Y55": "RAMB18E1",
            "RAMB36_X1Y27": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y140": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 75,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y56": "FIFO18E1",
            "RAMB18_X1Y57": "RAMB18E1",
            "RAMB36_X1Y28": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y145": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 75,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y58": "FIFO18E1",
            "RAMB18_X1Y59": "RAMB18E1",
            "RAMB36_X1Y29": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_R_X37Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 95,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y0": "FIFO18E1",
            "RAMB18_X2Y1": "RAMB18E1",
            "RAMB36_X2Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 95,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y2": "FIFO18E1",
            "RAMB18_X2Y3": "RAMB18E1",
            "RAMB36_X2Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 95,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y4": "FIFO18E1",
            "RAMB18_X2Y5": "RAMB18E1",
            "RAMB36_X2Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 95,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y6": "FIFO18E1",
            "RAMB18_X2Y7": "RAMB18E1",
            "RAMB36_X2Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 95,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y8": "FIFO18E1",
            "RAMB18_X2Y9": "RAMB18E1",
            "RAMB36_X2Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 95,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y10": "FIFO18E1",
            "RAMB18_X2Y11": "RAMB18E1",
            "RAMB36_X2Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 95,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y12": "FIFO18E1",
            "RAMB18_X2Y13": "RAMB18E1",
            "RAMB36_X2Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 95,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y14": "FIFO18E1",
            "RAMB18_X2Y15": "RAMB18E1",
            "RAMB36_X2Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 95,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y16": "FIFO18E1",
            "RAMB18_X2Y17": "RAMB18E1",
            "RAMB36_X2Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 95,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y18": "FIFO18E1",
            "RAMB18_X2Y19": "RAMB18E1",
            "RAMB36_X2Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 95,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y20": "FIFO18E1",
            "RAMB18_X2Y21": "RAMB18E1",
            "RAMB36_X2Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 95,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y22": "FIFO18E1",
            "RAMB18_X2Y23": "RAMB18E1",
            "RAMB36_X2Y11": "RAMBFIFO36E1"
        },
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                "offset": 95,
                "words": 2
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        },
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        "sites": {
            "SLICE_X30Y97": "SLICEM",
            "SLICE_X31Y97": "SLICEL"
        },
        "type": "CLBLM_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A00",
                "frames": 36,
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                "words": 2
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        },
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        "sites": {
            "SLICE_X30Y98": "SLICEM",
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        },
        "type": "CLBLM_L"
    },
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        "bits": {
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                "frames": 36,
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                "words": 2
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        },
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            "SLICE_X30Y99": "SLICEM",
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        "type": "CLBLM_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
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        },
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            "SLICE_X30Y100": "SLICEM",
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        },
        "type": "CLBLM_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
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        },
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        "pin_functions": {},
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            "SLICE_X30Y101": "SLICEM",
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        "type": "CLBLM_L"
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        },
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        "type": "CLBLM_L"
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        "bits": {
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        },
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        "type": "CLBLM_L"
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        "type": "CLBLM_L"
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        "type": "CLBLM_L"
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    },
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        "type": "CLBLM_L"
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                "words": 2
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                "words": 2
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        "type": "CLBLM_L"
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                "words": 2
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                "words": 2
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        "sites": {
            "SLICE_X30Y140": "SLICEM",
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        "type": "CLBLM_L"
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                "words": 2
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        "type": "CLBLM_L"
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    "CLBLM_L_X22Y34": {
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "SLICE_X34Y34": "SLICEM",
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        "pin_functions": {},
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        "type": "CLK_FEED"
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        "type": "CLK_FEED"
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        "type": "CLK_FEED"
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        "type": "CLK_FEED"
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        "type": "CLK_FEED"
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        "grid_y": 130,
        "pin_functions": {},
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            "BUFHCE_X0Y1": "BUFHCE",
            "BUFHCE_X0Y2": "BUFHCE",
            "BUFHCE_X0Y3": "BUFHCE",
            "BUFHCE_X0Y4": "BUFHCE",
            "BUFHCE_X0Y5": "BUFHCE",
            "BUFHCE_X0Y6": "BUFHCE",
            "BUFHCE_X0Y7": "BUFHCE",
            "BUFHCE_X0Y8": "BUFHCE",
            "BUFHCE_X0Y9": "BUFHCE",
            "BUFHCE_X0Y10": "BUFHCE",
            "BUFHCE_X0Y11": "BUFHCE",
            "BUFHCE_X1Y0": "BUFHCE",
            "BUFHCE_X1Y1": "BUFHCE",
            "BUFHCE_X1Y2": "BUFHCE",
            "BUFHCE_X1Y3": "BUFHCE",
            "BUFHCE_X1Y4": "BUFHCE",
            "BUFHCE_X1Y5": "BUFHCE",
            "BUFHCE_X1Y6": "BUFHCE",
            "BUFHCE_X1Y7": "BUFHCE",
            "BUFHCE_X1Y8": "BUFHCE",
            "BUFHCE_X1Y9": "BUFHCE",
            "BUFHCE_X1Y10": "BUFHCE",
            "BUFHCE_X1Y11": "BUFHCE"
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        "type": "CLK_HROW_BOT_R"
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    "CLK_HROW_TOP_R_X60Y78": {
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        "clock_region": "X1Y1",
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        "grid_y": 78,
        "pin_functions": {},
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            "BUFHCE_X0Y13": "BUFHCE",
            "BUFHCE_X0Y14": "BUFHCE",
            "BUFHCE_X0Y15": "BUFHCE",
            "BUFHCE_X0Y16": "BUFHCE",
            "BUFHCE_X0Y17": "BUFHCE",
            "BUFHCE_X0Y18": "BUFHCE",
            "BUFHCE_X0Y19": "BUFHCE",
            "BUFHCE_X0Y20": "BUFHCE",
            "BUFHCE_X0Y21": "BUFHCE",
            "BUFHCE_X0Y22": "BUFHCE",
            "BUFHCE_X0Y23": "BUFHCE",
            "BUFHCE_X1Y12": "BUFHCE",
            "BUFHCE_X1Y13": "BUFHCE",
            "BUFHCE_X1Y14": "BUFHCE",
            "BUFHCE_X1Y15": "BUFHCE",
            "BUFHCE_X1Y16": "BUFHCE",
            "BUFHCE_X1Y17": "BUFHCE",
            "BUFHCE_X1Y18": "BUFHCE",
            "BUFHCE_X1Y19": "BUFHCE",
            "BUFHCE_X1Y20": "BUFHCE",
            "BUFHCE_X1Y21": "BUFHCE",
            "BUFHCE_X1Y22": "BUFHCE",
            "BUFHCE_X1Y23": "BUFHCE"
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    "CLK_HROW_TOP_R_X60Y130": {
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        "pin_functions": {},
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            "BUFHCE_X0Y25": "BUFHCE",
            "BUFHCE_X0Y26": "BUFHCE",
            "BUFHCE_X0Y27": "BUFHCE",
            "BUFHCE_X0Y28": "BUFHCE",
            "BUFHCE_X0Y29": "BUFHCE",
            "BUFHCE_X0Y30": "BUFHCE",
            "BUFHCE_X0Y31": "BUFHCE",
            "BUFHCE_X0Y32": "BUFHCE",
            "BUFHCE_X0Y33": "BUFHCE",
            "BUFHCE_X0Y34": "BUFHCE",
            "BUFHCE_X0Y35": "BUFHCE",
            "BUFHCE_X1Y24": "BUFHCE",
            "BUFHCE_X1Y25": "BUFHCE",
            "BUFHCE_X1Y26": "BUFHCE",
            "BUFHCE_X1Y27": "BUFHCE",
            "BUFHCE_X1Y28": "BUFHCE",
            "BUFHCE_X1Y29": "BUFHCE",
            "BUFHCE_X1Y30": "BUFHCE",
            "BUFHCE_X1Y31": "BUFHCE",
            "BUFHCE_X1Y32": "BUFHCE",
            "BUFHCE_X1Y33": "BUFHCE",
            "BUFHCE_X1Y34": "BUFHCE",
            "BUFHCE_X1Y35": "BUFHCE"
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        "type": "CLK_HROW_TOP_R"
    },
    "CLK_MTBF2_X60Y47": {
        "bits": {},
        "grid_x": 60,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_MTBF2"
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    "CLK_PMV2_SVT_X60Y34": {
        "bits": {},
        "grid_x": 60,
        "grid_y": 122,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_PMV2_SVT"
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    "CLK_PMV2_X60Y43": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 60,
        "grid_y": 113,
        "pin_functions": {},
        "sites": {
            "PMV_X0Y2": "PMV2"
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        "type": "CLK_PMV2"
    },
    "CLK_PMVIOB_X60Y18": {
        "bits": {},
        "grid_x": 60,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_PMVIOB"
    },
    "CLK_PMV_X60Y2": {
        "bits": {},
        "grid_x": 60,
        "grid_y": 154,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_PMV"
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    "CLK_TERM_X60Y0": {
        "bits": {},
        "grid_x": 60,
        "grid_y": 156,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_TERM"
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    "CLK_TERM_X60Y156": {
        "bits": {},
        "grid_x": 60,
        "grid_y": 0,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_TERM"
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    "CMT_FIFO_L_X107Y8": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 107,
        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y0": "IN_FIFO",
            "OUT_FIFO_X1Y0": "OUT_FIFO"
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        "type": "CMT_FIFO_L"
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    "CMT_FIFO_L_X107Y20": {
        "bits": {},
        "clock_region": "X1Y0",
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        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y1": "IN_FIFO",
            "OUT_FIFO_X1Y1": "OUT_FIFO"
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        "type": "CMT_FIFO_L"
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    "CMT_FIFO_L_X107Y33": {
        "bits": {},
        "clock_region": "X1Y0",
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        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y2": "IN_FIFO",
            "OUT_FIFO_X1Y2": "OUT_FIFO"
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        "type": "CMT_FIFO_L"
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    "CMT_FIFO_L_X107Y45": {
        "bits": {},
        "clock_region": "X1Y0",
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        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y3": "IN_FIFO",
            "OUT_FIFO_X1Y3": "OUT_FIFO"
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        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X107Y60": {
        "bits": {},
        "clock_region": "X1Y1",
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        "grid_y": 96,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y4": "IN_FIFO",
            "OUT_FIFO_X1Y4": "OUT_FIFO"
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        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X107Y72": {
        "bits": {},
        "clock_region": "X1Y1",
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        "grid_y": 84,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y5": "IN_FIFO",
            "OUT_FIFO_X1Y5": "OUT_FIFO"
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        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X107Y85": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 107,
        "grid_y": 71,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y6": "IN_FIFO",
            "OUT_FIFO_X1Y6": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
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    "CMT_FIFO_L_X107Y97": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 107,
        "grid_y": 59,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y7": "IN_FIFO",
            "OUT_FIFO_X1Y7": "OUT_FIFO"
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        "type": "CMT_FIFO_L"
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    "CMT_FIFO_R_X7Y8": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y0": "IN_FIFO",
            "OUT_FIFO_X0Y0": "OUT_FIFO"
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        "type": "CMT_FIFO_R"
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    "CMT_FIFO_R_X7Y20": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y1": "IN_FIFO",
            "OUT_FIFO_X0Y1": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y33": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y2": "IN_FIFO",
            "OUT_FIFO_X0Y2": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y45": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y3": "IN_FIFO",
            "OUT_FIFO_X0Y3": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y60": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 7,
        "grid_y": 96,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y4": "IN_FIFO",
            "OUT_FIFO_X0Y4": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y72": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 7,
        "grid_y": 84,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y5": "IN_FIFO",
            "OUT_FIFO_X0Y5": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y85": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 7,
        "grid_y": 71,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y6": "IN_FIFO",
            "OUT_FIFO_X0Y6": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y97": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 7,
        "grid_y": 59,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y7": "IN_FIFO",
            "OUT_FIFO_X0Y7": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y112": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 7,
        "grid_y": 44,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y8": "IN_FIFO",
            "OUT_FIFO_X0Y8": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y124": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 7,
        "grid_y": 32,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y9": "IN_FIFO",
            "OUT_FIFO_X0Y9": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y137": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 7,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y10": "IN_FIFO",
            "OUT_FIFO_X0Y10": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y149": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 7,
        "grid_y": 7,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y11": "IN_FIFO",
            "OUT_FIFO_X0Y11": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_PMV_L_X107Y1": {
        "bits": {},
        "grid_x": 107,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X107Y51": {
        "bits": {},
        "grid_x": 107,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X107Y53": {
        "bits": {},
        "grid_x": 107,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X107Y103": {
        "bits": {},
        "grid_x": 107,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_X7Y1": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y51": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y53": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y103": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y105": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y155": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 1,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_TOP_L_LOWER_B_X106Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 106,
        "grid_y": 147,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X1Y0": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_B_X106Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 106,
        "grid_y": 95,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X1Y1": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_T_X106Y18": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 106,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y0": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y1": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y0": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y1": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_LOWER_T_X106Y70": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 106,
        "grid_y": 86,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y4": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y5": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y4": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y5": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_UPPER_B_X106Y31": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 106,
        "grid_y": 125,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y2": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y3": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y2": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y3": "PHASER_OUT_PHY",
            "PHASER_REF_X1Y0": "PHASER_REF",
            "PHY_CONTROL_X1Y0": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_B_X106Y83": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 106,
        "grid_y": 73,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y6": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y7": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y6": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y7": "PHASER_OUT_PHY",
            "PHASER_REF_X1Y1": "PHASER_REF",
            "PHY_CONTROL_X1Y1": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_T_X106Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 106,
        "grid_y": 112,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X1Y0": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "CMT_TOP_L_UPPER_T_X106Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 106,
        "grid_y": 60,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X1Y1": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "CMT_TOP_R_LOWER_B_X8Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 147,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X0Y0": "MMCME2_ADV"
        },
        "type": "CMT_TOP_R_LOWER_B"
    },
    "CMT_TOP_R_LOWER_B_X8Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000080",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 8,
        "grid_y": 95,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X0Y1": "MMCME2_ADV"
        },
        "type": "CMT_TOP_R_LOWER_B"
    },
    "CMT_TOP_R_LOWER_B_X8Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 8,
        "grid_y": 43,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X0Y2": "MMCME2_ADV"
        },
        "type": "CMT_TOP_R_LOWER_B"
    },
    "CMT_TOP_R_LOWER_T_X8Y18": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y0": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y1": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y0": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y1": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_R_LOWER_T"
    },
    "CMT_TOP_R_LOWER_T_X8Y70": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 8,
        "grid_y": 86,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y4": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y5": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y4": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y5": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_R_LOWER_T"
    },
    "CMT_TOP_R_LOWER_T_X8Y122": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 8,
        "grid_y": 34,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y8": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y9": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y8": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y9": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_R_LOWER_T"
    },
    "CMT_TOP_R_UPPER_B_X8Y31": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 125,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y2": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y3": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y2": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y3": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y0": "PHASER_REF",
            "PHY_CONTROL_X0Y0": "PHY_CONTROL"
        },
        "type": "CMT_TOP_R_UPPER_B"
    },
    "CMT_TOP_R_UPPER_B_X8Y83": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 8,
        "grid_y": 73,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y6": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y7": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y6": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y7": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y1": "PHASER_REF",
            "PHY_CONTROL_X0Y1": "PHY_CONTROL"
        },
        "type": "CMT_TOP_R_UPPER_B"
    },
    "CMT_TOP_R_UPPER_B_X8Y135": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 8,
        "grid_y": 21,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y10": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y11": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y10": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y11": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y2": "PHASER_REF",
            "PHY_CONTROL_X0Y2": "PHY_CONTROL"
        },
        "type": "CMT_TOP_R_UPPER_B"
    },
    "CMT_TOP_R_UPPER_T_X8Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 112,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X0Y0": "PLLE2_ADV"
        },
        "type": "CMT_TOP_R_UPPER_T"
    },
    "CMT_TOP_R_UPPER_T_X8Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000080",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 8,
        "grid_y": 60,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X0Y1": "PLLE2_ADV"
        },
        "type": "CMT_TOP_R_UPPER_T"
    },
    "CMT_TOP_R_UPPER_T_X8Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 8,
        "grid_y": 8,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X0Y2": "PLLE2_ADV"
        },
        "type": "CMT_TOP_R_UPPER_T"
    },
    "DSP_L_X34Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 86,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y0": "DSP48E1",
            "DSP48_X1Y1": "DSP48E1",
            "TIEOFF_X35Y0": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 86,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y2": "DSP48E1",
            "DSP48_X1Y3": "DSP48E1",
            "TIEOFF_X35Y5": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 86,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y4": "DSP48E1",
            "DSP48_X1Y5": "DSP48E1",
            "TIEOFF_X35Y10": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 86,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y6": "DSP48E1",
            "DSP48_X1Y7": "DSP48E1",
            "TIEOFF_X35Y15": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 86,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y8": "DSP48E1",
            "DSP48_X1Y9": "DSP48E1",
            "TIEOFF_X35Y20": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 86,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y10": "DSP48E1",
            "DSP48_X1Y11": "DSP48E1",
            "TIEOFF_X35Y25": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 86,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y12": "DSP48E1",
            "DSP48_X1Y13": "DSP48E1",
            "TIEOFF_X35Y30": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 86,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y14": "DSP48E1",
            "DSP48_X1Y15": "DSP48E1",
            "TIEOFF_X35Y35": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 86,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y16": "DSP48E1",
            "DSP48_X1Y17": "DSP48E1",
            "TIEOFF_X35Y40": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 86,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y18": "DSP48E1",
            "DSP48_X1Y19": "DSP48E1",
            "TIEOFF_X35Y45": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 86,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y20": "DSP48E1",
            "DSP48_X1Y21": "DSP48E1",
            "TIEOFF_X35Y50": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 86,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y22": "DSP48E1",
            "DSP48_X1Y23": "DSP48E1",
            "TIEOFF_X35Y55": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 86,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y24": "DSP48E1",
            "DSP48_X1Y25": "DSP48E1",
            "TIEOFF_X35Y60": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 86,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y26": "DSP48E1",
            "DSP48_X1Y27": "DSP48E1",
            "TIEOFF_X35Y65": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 86,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y28": "DSP48E1",
            "DSP48_X1Y29": "DSP48E1",
            "TIEOFF_X35Y70": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 86,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y30": "DSP48E1",
            "DSP48_X1Y31": "DSP48E1",
            "TIEOFF_X35Y75": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 86,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y32": "DSP48E1",
            "DSP48_X1Y33": "DSP48E1",
            "TIEOFF_X35Y80": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 86,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y34": "DSP48E1",
            "DSP48_X1Y35": "DSP48E1",
            "TIEOFF_X35Y85": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 86,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y36": "DSP48E1",
            "DSP48_X1Y37": "DSP48E1",
            "TIEOFF_X35Y90": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 86,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y38": "DSP48E1",
            "DSP48_X1Y39": "DSP48E1",
            "TIEOFF_X35Y95": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021100",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 86,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y40": "DSP48E1",
            "DSP48_X1Y41": "DSP48E1",
            "TIEOFF_X35Y100": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021100",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 86,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y42": "DSP48E1",
            "DSP48_X1Y43": "DSP48E1",
            "TIEOFF_X35Y105": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021100",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 86,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y44": "DSP48E1",
            "DSP48_X1Y45": "DSP48E1",
            "TIEOFF_X35Y110": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021100",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 86,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y46": "DSP48E1",
            "DSP48_X1Y47": "DSP48E1",
            "TIEOFF_X35Y115": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021100",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 86,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y48": "DSP48E1",
            "DSP48_X1Y49": "DSP48E1",
            "TIEOFF_X35Y120": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021100",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 86,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y50": "DSP48E1",
            "DSP48_X1Y51": "DSP48E1",
            "TIEOFF_X35Y125": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021100",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 86,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y52": "DSP48E1",
            "DSP48_X1Y53": "DSP48E1",
            "TIEOFF_X35Y130": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021100",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 86,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y54": "DSP48E1",
            "DSP48_X1Y55": "DSP48E1",
            "TIEOFF_X35Y135": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021100",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 86,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y56": "DSP48E1",
            "DSP48_X1Y57": "DSP48E1",
            "TIEOFF_X35Y140": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X34Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021100",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 86,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y58": "DSP48E1",
            "DSP48_X1Y59": "DSP48E1",
            "TIEOFF_X35Y145": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_R_X9Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y0": "DSP48E1",
            "DSP48_X0Y1": "DSP48E1",
            "TIEOFF_X10Y0": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y2": "DSP48E1",
            "DSP48_X0Y3": "DSP48E1",
            "TIEOFF_X10Y5": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y4": "DSP48E1",
            "DSP48_X0Y5": "DSP48E1",
            "TIEOFF_X10Y10": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y6": "DSP48E1",
            "DSP48_X0Y7": "DSP48E1",
            "TIEOFF_X10Y15": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y8": "DSP48E1",
            "DSP48_X0Y9": "DSP48E1",
            "TIEOFF_X10Y20": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y10": "DSP48E1",
            "DSP48_X0Y11": "DSP48E1",
            "TIEOFF_X10Y25": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y12": "DSP48E1",
            "DSP48_X0Y13": "DSP48E1",
            "TIEOFF_X10Y30": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y14": "DSP48E1",
            "DSP48_X0Y15": "DSP48E1",
            "TIEOFF_X10Y35": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y16": "DSP48E1",
            "DSP48_X0Y17": "DSP48E1",
            "TIEOFF_X10Y40": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y18": "DSP48E1",
            "DSP48_X0Y19": "DSP48E1",
            "TIEOFF_X10Y45": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y20": "DSP48E1",
            "DSP48_X0Y21": "DSP48E1",
            "TIEOFF_X10Y50": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y22": "DSP48E1",
            "DSP48_X0Y23": "DSP48E1",
            "TIEOFF_X10Y55": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y24": "DSP48E1",
            "DSP48_X0Y25": "DSP48E1",
            "TIEOFF_X10Y60": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y26": "DSP48E1",
            "DSP48_X0Y27": "DSP48E1",
            "TIEOFF_X10Y65": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y28": "DSP48E1",
            "DSP48_X0Y29": "DSP48E1",
            "TIEOFF_X10Y70": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y30": "DSP48E1",
            "DSP48_X0Y31": "DSP48E1",
            "TIEOFF_X10Y75": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y32": "DSP48E1",
            "DSP48_X0Y33": "DSP48E1",
            "TIEOFF_X10Y80": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y34": "DSP48E1",
            "DSP48_X0Y35": "DSP48E1",
            "TIEOFF_X10Y85": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y36": "DSP48E1",
            "DSP48_X0Y37": "DSP48E1",
            "TIEOFF_X10Y90": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y38": "DSP48E1",
            "DSP48_X0Y39": "DSP48E1",
            "TIEOFF_X10Y95": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y40": "DSP48E1",
            "DSP48_X0Y41": "DSP48E1",
            "TIEOFF_X10Y100": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y42": "DSP48E1",
            "DSP48_X0Y43": "DSP48E1",
            "TIEOFF_X10Y105": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 20,
                "words": 10
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        },
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        "pin_functions": {},
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            "DSP48_X0Y45": "DSP48E1",
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        "type": "DSP_R"
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        "bits": {
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                "words": 10
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        "pin_functions": {},
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        "type": "DSP_R"
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    "DSP_R_X9Y120": {
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                "baseaddr": "0x00020480",
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                "words": 10
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        "pin_functions": {},
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        "type": "DSP_R"
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    "DSP_R_X9Y125": {
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                "words": 10
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        "type": "DSP_R"
    },
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        "bits": {
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                "baseaddr": "0x00020480",
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        "type": "DSP_R"
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        },
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            "IPAD_X1Y15": "IPAD",
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            "IPAD_X1Y17": "IPAD"
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        "type": "HCLK_BRAM"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 69,
                "words": 2
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            "TIEOFF_X0Y34": "TIEOFF"
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        "bits": {
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                "words": 2
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        "type": "INT_L"
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y83": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
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        "grid_x": 4,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y84": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y85": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 75,
                "words": 2
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        "sites": {
            "TIEOFF_X0Y87": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X0Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y89": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
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        },
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            "TIEOFF_X0Y90": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00000000",
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                "words": 2
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        },
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            "TIEOFF_X0Y91": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
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            "TIEOFF_X0Y92": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
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            "TIEOFF_X0Y93": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00000000",
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            "TIEOFF_X0Y94": "TIEOFF"
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            "CLB_IO_CLK": {
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            "TIEOFF_X0Y95": "TIEOFF"
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            "TIEOFF_X0Y96": "TIEOFF"
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        "bits": {
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            "TIEOFF_X0Y97": "TIEOFF"
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        "bits": {
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            "TIEOFF_X0Y98": "TIEOFF"
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        "bits": {
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            "TIEOFF_X0Y99": "TIEOFF"
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        "bits": {
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            "TIEOFF_X0Y100": "TIEOFF"
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        "bits": {
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            "TIEOFF_X0Y101": "TIEOFF"
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    "INT_L_X0Y102": {
        "bits": {
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            "TIEOFF_X0Y102": "TIEOFF"
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    "INT_L_X0Y103": {
        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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            "TIEOFF_X0Y107": "TIEOFF"
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        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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            "TIEOFF_X0Y115": "TIEOFF"
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        "bits": {
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            "TIEOFF_X0Y116": "TIEOFF"
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    "INT_L_X0Y117": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X0Y117": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y118": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X0Y118": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y119": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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            "TIEOFF_X0Y119": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "offset": 40,
                "words": 2
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        "type": "INT_L"
    },
    "INT_L_X0Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "words": 2
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            "TIEOFF_X0Y121": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "words": 2
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            "TIEOFF_X0Y122": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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            "TIEOFF_X0Y123": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "words": 2
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        "sites": {
            "TIEOFF_X0Y124": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "offset": 51,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y125": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "words": 2
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        "sites": {
            "TIEOFF_X0Y126": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "offset": 55,
                "words": 2
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        "sites": {
            "TIEOFF_X0Y127": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y128": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "offset": 59,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y129": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y130": {
        "bits": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X0Y130": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y131": {
        "bits": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y131": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y132": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y132": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "offset": 67,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y133": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 4,
        "grid_y": 16,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y134": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y135": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y136": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y136": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y137": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y138": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 79,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y139": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 81,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y140": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 83,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y141": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y142": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "offset": 87,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y143": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y144": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "offset": 89,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y144": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y145": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y146": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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        },
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        "sites": {
            "TIEOFF_X0Y146": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y147": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y148": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "offset": 99,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y149": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 0,
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y0": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 2,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y1": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 4,
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y2": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 6,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y3": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 8,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y4": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 10,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X2Y5": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 12,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y6": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X2Y7": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 16,
                "words": 2
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        },
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            "TIEOFF_X2Y8": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X2Y9": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X2Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 137,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y20": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 134,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 133,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y22": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 132,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y23": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 131,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y24": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y25": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 128,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y26": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y27": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y28": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 125,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y29": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y30": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y31": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 122,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y32": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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        "sites": {
            "TIEOFF_X2Y33": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 69,
                "words": 2
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            "TIEOFF_X2Y34": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "words": 2
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            "TIEOFF_X2Y35": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
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                "frames": 28,
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            "TIEOFF_X2Y36": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X2Y37": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00400100",
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            "TIEOFF_X2Y38": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X2Y39": "TIEOFF"
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            "TIEOFF_X2Y40": "TIEOFF"
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            "TIEOFF_X2Y68": "TIEOFF"
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            "TIEOFF_X2Y69": "TIEOFF"
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    "INT_L_X2Y72": {
        "bits": {
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    "INT_L_X2Y74": {
        "bits": {
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    "INT_L_X2Y75": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X2Y76": {
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            "TIEOFF_X2Y76": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        "type": "INT_L"
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        "bits": {
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        "type": "INT_L"
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        "bits": {
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                "words": 2
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X2Y81": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y81": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y82": {
        "bits": {
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        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y82": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 11,
        "grid_y": 69,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y83": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 11,
        "grid_y": 68,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y84": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 11,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y85": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 11,
        "grid_y": 66,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 11,
        "grid_y": 65,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y87": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 11,
        "grid_y": 64,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y89": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y90": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 83,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y91": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 85,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y92": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y93": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 89,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y94": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 91,
                "words": 2
            }
        },
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        "sites": {
            "TIEOFF_X2Y95": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 93,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 97,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y100": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 50,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y101": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 4,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 49,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y102": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 6,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y103": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 8,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y104": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 10,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y105": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 12,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y106": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 14,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y107": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y108": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 18,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 42,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y109": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y110": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 40,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y111": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 39,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y112": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 38,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y113": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 37,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y114": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y115": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 35,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y116": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 34,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y117": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 33,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y118": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 32,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y119": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y120": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 30,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y121": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 29,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y122": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 28,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y123": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 27,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y124": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y125": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 24,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 23,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 22,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 21,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y129": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y130": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y131": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y132": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y133": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y134": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y135": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y136": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y136": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "offset": 75,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X2Y137": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "words": 2
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        },
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            "TIEOFF_X2Y138": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "words": 2
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        },
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            "TIEOFF_X2Y139": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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        },
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            "TIEOFF_X2Y140": "TIEOFF"
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    },
    "INT_L_X2Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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        },
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            "TIEOFF_X2Y141": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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        },
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            "TIEOFF_X2Y142": "TIEOFF"
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    },
    "INT_L_X2Y143": {
        "bits": {
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        },
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            "TIEOFF_X2Y143": "TIEOFF"
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    "INT_L_X2Y144": {
        "bits": {
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            "TIEOFF_X2Y144": "TIEOFF"
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    },
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        "bits": {
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            "TIEOFF_X2Y145": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X2Y146": "TIEOFF"
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    },
    "INT_L_X2Y147": {
        "bits": {
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            "TIEOFF_X2Y147": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X2Y148": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y149": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 99,
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        },
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            "TIEOFF_X2Y149": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y0": {
        "bits": {
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                "baseaddr": "0x00400200",
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            "TIEOFF_X4Y0": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400200",
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            "TIEOFF_X4Y1": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X4Y2": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y3": {
        "bits": {
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                "baseaddr": "0x00400200",
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            "TIEOFF_X4Y3": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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            "TIEOFF_X4Y4": "TIEOFF"
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            "TIEOFF_X4Y5": "TIEOFF"
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    },
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        "bits": {
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                "words": 2
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            "TIEOFF_X4Y6": "TIEOFF"
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            "TIEOFF_X4Y7": "TIEOFF"
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            "TIEOFF_X4Y8": "TIEOFF"
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        "bits": {
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            "TIEOFF_X4Y9": "TIEOFF"
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            "TIEOFF_X4Y10": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X4Y11": "TIEOFF"
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        "bits": {
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            "TIEOFF_X4Y12": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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            "TIEOFF_X4Y13": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X4Y14": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400200",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X4Y15": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400200",
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                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X4Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400200",
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                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400200",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X4Y18": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400200",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X4Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400200",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y20": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400200",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X4Y21": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400200",
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                "offset": 44,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y22": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400200",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y23": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400200",
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                "offset": 48,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y24": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400200",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y25": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400200",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y26": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400200",
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y27": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400200",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y28": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y29": {
        "bits": {
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                "offset": 59,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y29": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y30": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 61,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y30": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400200",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 15,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y31": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "sites": {
            "TIEOFF_X4Y81": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000200",
                "frames": 28,
                "offset": 65,
                "words": 2
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            "TIEOFF_X4Y82": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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            "TIEOFF_X4Y83": "TIEOFF"
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                "words": 2
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            "TIEOFF_X4Y84": "TIEOFF"
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        "bits": {
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            "TIEOFF_X4Y85": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X4Y86": "TIEOFF"
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        "bits": {
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        "bits": {
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        "type": "INT_L"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X4Y128": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X4Y129": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        "type": "INT_L"
    },
    "INT_L_X4Y131": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X4Y131": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020200",
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                "offset": 65,
                "words": 2
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            "TIEOFF_X4Y132": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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            "TIEOFF_X4Y133": "TIEOFF"
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    "INT_L_X4Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020200",
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            "TIEOFF_X4Y134": "TIEOFF"
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    "INT_L_X4Y135": {
        "bits": {
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                "baseaddr": "0x00020200",
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            "TIEOFF_X4Y135": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00020200",
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            "TIEOFF_X4Y136": "TIEOFF"
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            "TIEOFF_X4Y137": "TIEOFF"
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            "TIEOFF_X4Y138": "TIEOFF"
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                "words": 2
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            "TIEOFF_X6Y16": "TIEOFF"
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    "INT_L_X6Y17": {
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                "words": 2
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            "TIEOFF_X6Y17": "TIEOFF"
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            "TIEOFF_X6Y18": "TIEOFF"
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    "INT_L_X6Y26": {
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            "TIEOFF_X6Y26": "TIEOFF"
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        "type": "INT_L"
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    },
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        "bits": {
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                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 63,
                "words": 2
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            "TIEOFF_X6Y81": "TIEOFF"
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    },
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            "TIEOFF_X6Y82": "TIEOFF"
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    },
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                "words": 2
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            "TIEOFF_X6Y83": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        "bits": {
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        },
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            "TIEOFF_X6Y128": "TIEOFF"
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        "type": "INT_L"
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        "type": "INT_L"
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    "INT_L_X6Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
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        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y130": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y131": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y132": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y133": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
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                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y134": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
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                "offset": 71,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y135": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y136": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
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                "offset": 73,
                "words": 2
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        },
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            "TIEOFF_X6Y136": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
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                "offset": 75,
                "words": 2
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        },
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            "TIEOFF_X6Y137": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X6Y138": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
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                "words": 2
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        },
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            "TIEOFF_X6Y139": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
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                "words": 2
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        },
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            "TIEOFF_X6Y140": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
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                "words": 2
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        },
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            "TIEOFF_X6Y141": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
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        },
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            "TIEOFF_X6Y142": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00020300",
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        },
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            "TIEOFF_X6Y143": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y144": {
        "bits": {
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                "baseaddr": "0x00020300",
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                "words": 2
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        },
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            "TIEOFF_X6Y144": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y145": {
        "bits": {
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                "baseaddr": "0x00020300",
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                "words": 2
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        },
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            "TIEOFF_X6Y145": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y146": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X6Y146": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
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                "offset": 95,
                "words": 2
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        },
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            "TIEOFF_X6Y147": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
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                "offset": 97,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X6Y148": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
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                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X6Y149": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X8Y0": {
        "bits": {
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                "baseaddr": "0x00400400",
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        },
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            "TIEOFF_X8Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y1": {
        "bits": {
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                "baseaddr": "0x00400400",
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        },
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            "TIEOFF_X8Y1": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "words": 2
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            "TIEOFF_X8Y2": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00400400",
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                "offset": 6,
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        },
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            "TIEOFF_X8Y3": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X8Y4": {
        "bits": {
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                "baseaddr": "0x00400400",
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                "offset": 8,
                "words": 2
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        },
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            "TIEOFF_X8Y4": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X8Y5": {
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                "offset": 10,
                "words": 2
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            "TIEOFF_X8Y5": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "words": 2
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            "TIEOFF_X8Y6": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X8Y7": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00400400",
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                "words": 2
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        },
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            "TIEOFF_X8Y8": "TIEOFF"
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        "type": "INT_L"
    },
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                "offset": 18,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X8Y9": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00400400",
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                "offset": 20,
                "words": 2
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        },
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            "TIEOFF_X8Y10": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400400",
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                "offset": 22,
                "words": 2
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        },
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            "TIEOFF_X8Y11": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400400",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y12": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400400",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y13": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400400",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y14": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400400",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400400",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400400",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400400",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400400",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400400",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y20": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400400",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400400",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y22": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400400",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y23": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400400",
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                "offset": 48,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y24": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400400",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y25": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400400",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y26": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400400",
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 25,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y27": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400400",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 25,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y28": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400400",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X8Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y129": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y130": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y131": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y132": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 67,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y133": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y134": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 71,
                "words": 2
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        },
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            "TIEOFF_X8Y135": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y136": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "words": 2
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        },
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            "TIEOFF_X8Y136": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "words": 2
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        },
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            "TIEOFF_X8Y137": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "words": 2
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        },
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            "TIEOFF_X8Y138": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "words": 2
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        },
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            "TIEOFF_X8Y139": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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        },
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            "TIEOFF_X8Y140": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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        },
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            "TIEOFF_X8Y141": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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        },
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            "TIEOFF_X8Y142": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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        },
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            "TIEOFF_X8Y143": "TIEOFF"
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    },
    "INT_L_X8Y144": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X8Y144": "TIEOFF"
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    },
    "INT_L_X8Y145": {
        "bits": {
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            "TIEOFF_X8Y145": "TIEOFF"
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    },
    "INT_L_X8Y146": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 93,
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        },
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            "TIEOFF_X8Y146": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 95,
                "words": 2
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        },
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            "TIEOFF_X8Y147": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 97,
                "words": 2
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        },
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            "TIEOFF_X8Y148": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X8Y149": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
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            "TIEOFF_X11Y0": "TIEOFF"
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    "INT_L_X10Y1": {
        "bits": {
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                "baseaddr": "0x00400500",
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                "offset": 2,
                "words": 2
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        },
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            "TIEOFF_X11Y1": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
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                "offset": 4,
                "words": 2
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        },
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            "TIEOFF_X11Y2": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00400500",
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                "offset": 6,
                "words": 2
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            "TIEOFF_X11Y3": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400500",
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                "offset": 8,
                "words": 2
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            "TIEOFF_X11Y4": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400500",
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                "words": 2
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        "clock_region": "X0Y0",
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            "TIEOFF_X11Y5": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00400500",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X11Y6": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400500",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y7": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00400500",
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X11Y8": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00400500",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y10": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y11": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y12": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y13": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y14": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y15": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y17": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y18": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y20": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y22": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y23": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y24": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 31,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y25": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 31,
        "grid_y": 128,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y26": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 31,
        "grid_y": 127,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y27": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y28": {
        "bits": {
            "CLB_IO_CLK": {
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        "bits": {
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                "baseaddr": "0x00400500",
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                "words": 2
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        "type": "INT_L"
    },
    "INT_L_X10Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y78": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y79": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y80": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y81": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y82": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y83": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y85": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y86": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 77,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y88": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 79,
                "words": 2
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        },
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            "TIEOFF_X11Y89": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "words": 2
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        },
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            "TIEOFF_X11Y90": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 83,
                "words": 2
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        },
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            "TIEOFF_X11Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 85,
                "words": 2
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        },
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            "TIEOFF_X11Y92": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 87,
                "words": 2
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        },
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            "TIEOFF_X11Y93": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 89,
                "words": 2
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            "TIEOFF_X11Y94": "TIEOFF"
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    },
    "INT_L_X10Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 91,
                "words": 2
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        },
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            "TIEOFF_X11Y95": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y96": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 95,
                "words": 2
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        },
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            "TIEOFF_X11Y97": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X11Y98": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 99,
                "words": 2
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            "TIEOFF_X11Y99": "TIEOFF"
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    "INT_L_X10Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 0,
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            "TIEOFF_X11Y100": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020500",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y101": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 4,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y102": "TIEOFF"
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    "INT_L_X10Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 6,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y103": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 8,
                "words": 2
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        },
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            "TIEOFF_X11Y104": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y105": {
        "bits": {
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                "baseaddr": "0x00020500",
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                "offset": 10,
                "words": 2
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            "TIEOFF_X11Y105": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 12,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X11Y106": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y107": {
        "bits": {
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                "baseaddr": "0x00020500",
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                "offset": 14,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y107": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 16,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y108": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y109": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y110": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y111": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 39,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y112": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 38,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y113": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "grid_y": 37,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y114": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y115": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 35,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y116": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y117": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y118": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y119": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y120": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y121": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y122": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y123": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y124": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y125": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "sites": {
            "TIEOFF_X11Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 59,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y129": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 61,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y130": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 63,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X11Y131": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 65,
                "words": 2
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        },
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            "TIEOFF_X11Y132": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "words": 2
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        },
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            "TIEOFF_X11Y133": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "words": 2
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        },
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            "TIEOFF_X11Y134": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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        },
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            "TIEOFF_X11Y135": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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            "TIEOFF_X11Y136": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020500",
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00020500",
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        },
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        "bits": {
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                "baseaddr": "0x00020500",
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        "bits": {
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                "baseaddr": "0x00020500",
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        "bits": {
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    "INT_L_X10Y142": {
        "bits": {
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    "INT_L_X10Y147": {
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            "TIEOFF_X11Y148": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y149": {
        "bits": {
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            "TIEOFF_X13Y108": "TIEOFF"
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    "INT_L_X12Y109": {
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            "TIEOFF_X13Y109": "TIEOFF"
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X13Y110": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X13Y111": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 24,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y112": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 26,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X13Y113": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y114": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 30,
                "words": 2
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        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y115": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y116": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y117": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y118": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y119": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 40,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y120": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y121": {
        "bits": {
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                "baseaddr": "0x00020600",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y121": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y122": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y123": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y124": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 51,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y125": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
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        "grid_x": 36,
        "grid_y": 23,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
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        "grid_y": 22,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y129": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
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        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y130": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y131": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 65,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y132": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y133": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y134": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 71,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X13Y135": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y136": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 73,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "sites": {
            "TIEOFF_X13Y136": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y137": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 77,
                "words": 2
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        },
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            "TIEOFF_X13Y138": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 79,
                "words": 2
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        },
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            "TIEOFF_X13Y139": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "words": 2
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        },
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            "TIEOFF_X13Y140": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 83,
                "words": 2
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        },
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            "TIEOFF_X13Y141": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 85,
                "words": 2
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        },
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            "TIEOFF_X13Y142": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 87,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y143": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y144": {
        "bits": {
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                "baseaddr": "0x00020600",
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                "offset": 89,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y144": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 91,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X13Y145": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y146": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 93,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X13Y146": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 95,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y147": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 97,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y148": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y149": {
        "bits": {
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                "baseaddr": "0x00020600",
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                "offset": 99,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X13Y149": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X14Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y100": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X14Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 2,
                "words": 2
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        },
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        "grid_y": 50,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y101": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X14Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y102": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
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                "offset": 6,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y103": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 8,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y104": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 10,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y105": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 12,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y106": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X14Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y107": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 16,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y108": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 18,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 42,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y109": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 40,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y110": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 40,
        "grid_y": 40,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y111": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 40,
        "grid_y": 39,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y112": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 40,
        "grid_y": 38,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y113": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 37,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y114": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 40,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y115": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 40,
        "grid_y": 35,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y116": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 40,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y117": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 40,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y118": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y119": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 40,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y120": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 40,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y121": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 40,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y122": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 40,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y123": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 40,
        "grid_y": 27,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y124": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 40,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y125": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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            "TIEOFF_X15Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
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                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X15Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
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                "offset": 59,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X15Y129": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
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                "words": 2
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        },
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            "TIEOFF_X15Y130": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
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                "words": 2
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        },
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            "TIEOFF_X15Y131": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X14Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
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        },
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            "TIEOFF_X15Y132": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
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        },
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            "TIEOFF_X15Y133": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
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            "TIEOFF_X15Y134": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
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            "TIEOFF_X15Y135": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
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            "TIEOFF_X15Y136": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020700",
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        "bits": {
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                "baseaddr": "0x00020700",
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        "bits": {
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        "bits": {
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            "TIEOFF_X17Y109": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020800",
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                "words": 2
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        },
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            "TIEOFF_X17Y111": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y112": {
        "bits": {
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                "baseaddr": "0x00020800",
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                "offset": 24,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X17Y112": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00020800",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X17Y113": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
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        },
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        "pin_functions": {},
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            "TIEOFF_X17Y114": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y115": {
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                "baseaddr": "0x00020800",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X17Y115": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y116": {
        "bits": {
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                "baseaddr": "0x00020800",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y116": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y117": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y118": {
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                "baseaddr": "0x00020800",
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y118": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X17Y119": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X16Y120": {
        "bits": {
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                "baseaddr": "0x00020800",
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        },
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X16Y121": {
        "bits": {
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                "baseaddr": "0x00020800",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y121": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y122": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y123": {
        "bits": {
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                "baseaddr": "0x00020800",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "sites": {
            "TIEOFF_X17Y123": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y124": {
        "bits": {
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                "baseaddr": "0x00020800",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y124": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y125": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 44,
        "grid_y": 24,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 44,
        "grid_y": 23,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 44,
        "grid_y": 22,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 44,
        "grid_y": 21,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y129": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 44,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y130": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 44,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y131": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 18,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y132": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y133": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 16,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y134": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y135": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y136": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
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                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y136": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 13,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y137": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y138": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
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                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 11,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y139": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y140": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
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                "offset": 83,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y141": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
                "frames": 28,
                "offset": 85,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 8,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y142": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "grid_y": 7,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y143": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y144": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
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                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 6,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y144": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
                "frames": 28,
                "offset": 91,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y145": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y146": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
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                "offset": 93,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "grid_y": 4,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y146": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "grid_y": 3,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y147": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "grid_y": 2,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y148": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X16Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020800",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 1,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y149": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y0": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y1": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 4,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 153,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y2": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 6,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 152,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y3": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 8,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 151,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y4": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 10,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y5": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 12,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 149,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y6": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 14,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y7": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 147,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y8": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 18,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 146,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y9": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 144,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 143,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 142,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 141,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 139,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 137,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y20": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 134,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 133,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y22": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 132,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y23": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 131,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y24": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
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                "words": 2
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    "INT_L_X18Y74": {
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    "INT_L_X18Y75": {
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        "sites": {
            "TIEOFF_X19Y75": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 53,
                "words": 2
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            "TIEOFF_X19Y76": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00000900",
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            "TIEOFF_X19Y77": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y78": {
        "bits": {
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            "TIEOFF_X19Y78": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X19Y79": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X19Y80": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X19Y81": "TIEOFF"
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            "TIEOFF_X19Y111": "TIEOFF"
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            "TIEOFF_X19Y113": "TIEOFF"
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    "INT_L_X18Y116": {
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        "type": "INT_L"
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        "type": "INT_L"
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    "INT_L_X18Y123": {
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        "type": "INT_L"
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    "INT_L_X18Y124": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y124": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y125": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y126": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X19Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X19Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X19Y129": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
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                "words": 2
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        },
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            "TIEOFF_X19Y130": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
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        },
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            "TIEOFF_X19Y131": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
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            "TIEOFF_X19Y132": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
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            "TIEOFF_X19Y133": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
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        },
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            "TIEOFF_X19Y134": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
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            "TIEOFF_X19Y135": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
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            "TIEOFF_X19Y136": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020900",
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            "TIEOFF_X19Y137": "TIEOFF"
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            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
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            "TIEOFF_X19Y138": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
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            "TIEOFF_X19Y139": "TIEOFF"
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        "bits": {
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            "TIEOFF_X19Y140": "TIEOFF"
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    "INT_L_X18Y141": {
        "bits": {
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                "baseaddr": "0x00020900",
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    "INT_L_X18Y142": {
        "bits": {
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    "INT_L_X18Y143": {
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            "TIEOFF_X19Y143": "TIEOFF"
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        "bits": {
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            "TIEOFF_X19Y144": "TIEOFF"
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    "INT_L_X18Y145": {
        "bits": {
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            "TIEOFF_X19Y145": "TIEOFF"
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    "INT_L_X18Y146": {
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            "TIEOFF_X19Y146": "TIEOFF"
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    "INT_L_X18Y147": {
        "bits": {
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            "TIEOFF_X19Y147": "TIEOFF"
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        "bits": {
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            "TIEOFF_X19Y148": "TIEOFF"
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        "bits": {
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            "TIEOFF_X19Y149": "TIEOFF"
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        "bits": {
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            "TIEOFF_X21Y0": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00400A00",
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            "TIEOFF_X21Y1": "TIEOFF"
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        "bits": {
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            "TIEOFF_X21Y2": "TIEOFF"
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                "baseaddr": "0x00400A00",
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            "TIEOFF_X21Y3": "TIEOFF"
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        "bits": {
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            "TIEOFF_X21Y4": "TIEOFF"
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        "bits": {
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            "TIEOFF_X21Y5": "TIEOFF"
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        "bits": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X21Y6": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "offset": 14,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y7": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "offset": 16,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y8": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y9": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X21Y11": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X21Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 53,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 53,
        "grid_y": 139,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 53,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 53,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y20": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 53,
        "grid_y": 134,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 53,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y22": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 53,
        "grid_y": 132,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y23": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y24": {
        "bits": {
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                "baseaddr": "0x00400A00",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X21Y24": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
                "offset": 51,
                "words": 2
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            "TIEOFF_X21Y25": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X21Y26": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "words": 2
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            "TIEOFF_X21Y27": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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            "TIEOFF_X21Y28": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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            "TIEOFF_X21Y29": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X20Y30": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X21Y30": "TIEOFF"
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            "TIEOFF_X21Y31": "TIEOFF"
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        "bits": {
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            "TIEOFF_X21Y32": "TIEOFF"
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        "bits": {
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            "TIEOFF_X21Y43": "TIEOFF"
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        },
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            "TIEOFF_X21Y56": "TIEOFF"
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        "type": "INT_L"
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        },
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            "TIEOFF_X21Y57": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X20Y58": {
        "bits": {
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                "baseaddr": "0x00000A00",
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            "TIEOFF_X21Y58": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X20Y59": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X21Y59": "TIEOFF"
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                "offset": 20,
                "words": 2
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        },
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            "TIEOFF_X21Y60": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        },
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        "pin_functions": {},
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            "TIEOFF_X21Y61": "TIEOFF"
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            "TIEOFF_X21Y62": "TIEOFF"
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        "type": "INT_L"
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X21Y63": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X20Y64": {
        "bits": {
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            "TIEOFF_X21Y64": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "words": 2
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            "TIEOFF_X21Y65": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00000A00",
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        "pin_functions": {},
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            "TIEOFF_X21Y66": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X20Y67": {
        "bits": {
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                "baseaddr": "0x00000A00",
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                "words": 2
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            "TIEOFF_X21Y67": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y68": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X21Y68": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X21Y69": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        "clock_region": "X0Y1",
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            "TIEOFF_X21Y70": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X20Y71": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y71": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y72": {
        "bits": {
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                "baseaddr": "0x00000A00",
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y72": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A00",
                "frames": 28,
                "offset": 46,
                "words": 2
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            "TIEOFF_X21Y73": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A00",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X21Y74": "TIEOFF"
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    "INT_L_X20Y75": {
        "bits": {
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                "baseaddr": "0x00000A00",
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            "TIEOFF_X21Y75": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X21Y76": "TIEOFF"
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    },
    "INT_L_X20Y77": {
        "bits": {
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            "TIEOFF_X21Y77": "TIEOFF"
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    "INT_L_X20Y78": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X21Y78": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00000A00",
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            "TIEOFF_X21Y79": "TIEOFF"
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            "TIEOFF_X21Y80": "TIEOFF"
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        "bits": {
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        "bits": {
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            "TIEOFF_X21Y106": "TIEOFF"
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            "TIEOFF_X21Y108": "TIEOFF"
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    "INT_L_X20Y109": {
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            "TIEOFF_X21Y110": "TIEOFF"
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            "TIEOFF_X21Y111": "TIEOFF"
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            "TIEOFF_X21Y112": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020A00",
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        "bits": {
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    "INT_L_X20Y118": {
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    "INT_L_X20Y119": {
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        "bits": {
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            "TIEOFF_X21Y120": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X20Y121": {
        "bits": {
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            "TIEOFF_X21Y121": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X20Y122": {
        "bits": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y122": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y123": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X21Y124": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
                "frames": 28,
                "offset": 51,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y125": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
                "frames": 28,
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
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        "pin_functions": {},
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            "TIEOFF_X21Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X21Y128": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
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            "TIEOFF_X21Y129": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
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            "TIEOFF_X21Y130": "TIEOFF"
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    },
    "INT_L_X20Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
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            "TIEOFF_X21Y131": "TIEOFF"
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    },
    "INT_L_X20Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
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            "TIEOFF_X21Y132": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
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            "TIEOFF_X21Y133": "TIEOFF"
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    "INT_L_X20Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
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            "TIEOFF_X21Y134": "TIEOFF"
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    "INT_L_X20Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
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            "TIEOFF_X21Y135": "TIEOFF"
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    },
    "INT_L_X20Y136": {
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            "CLB_IO_CLK": {
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            "TIEOFF_X21Y136": "TIEOFF"
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    },
    "INT_L_X20Y137": {
        "bits": {
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            "TIEOFF_X21Y137": "TIEOFF"
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    },
    "INT_L_X20Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
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            "TIEOFF_X21Y138": "TIEOFF"
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    },
    "INT_L_X20Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
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            "TIEOFF_X21Y139": "TIEOFF"
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    },
    "INT_L_X20Y140": {
        "bits": {
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                "baseaddr": "0x00020A00",
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            "TIEOFF_X21Y140": "TIEOFF"
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    "INT_L_X20Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
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            "TIEOFF_X21Y141": "TIEOFF"
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    "INT_L_X20Y142": {
        "bits": {
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            "TIEOFF_X21Y142": "TIEOFF"
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        "bits": {
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            "TIEOFF_X21Y143": "TIEOFF"
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    "INT_L_X20Y144": {
        "bits": {
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            "TIEOFF_X21Y144": "TIEOFF"
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    },
    "INT_L_X20Y145": {
        "bits": {
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            "TIEOFF_X21Y145": "TIEOFF"
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    },
    "INT_L_X20Y146": {
        "bits": {
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                "words": 2
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            "TIEOFF_X21Y146": "TIEOFF"
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    },
    "INT_L_X20Y147": {
        "bits": {
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            "TIEOFF_X21Y147": "TIEOFF"
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    "INT_L_X20Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
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                "offset": 97,
                "words": 2
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            "TIEOFF_X21Y148": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A00",
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            "TIEOFF_X21Y149": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
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                "offset": 0,
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            "TIEOFF_X23Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
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                "words": 2
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        },
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            "TIEOFF_X23Y1": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
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                "offset": 4,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X23Y2": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
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                "offset": 6,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X23Y3": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 8,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X23Y4": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 10,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X23Y5": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 12,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y6": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 14,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y7": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y8": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 18,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 146,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y9": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 57,
        "grid_y": 144,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 57,
        "grid_y": 143,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 57,
        "grid_y": 142,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 57,
        "grid_y": 141,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 57,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 57,
        "grid_y": 139,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 57,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 57,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 57,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 57,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y20": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 57,
        "grid_y": 134,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y22": {
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            "TIEOFF_X23Y120": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020B00",
                "frames": 28,
                "offset": 42,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y121": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020B00",
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                "words": 2
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            "TIEOFF_X23Y122": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020B00",
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            "TIEOFF_X23Y123": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020B00",
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            "TIEOFF_X23Y124": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020B00",
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            "TIEOFF_X23Y125": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020B00",
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            "TIEOFF_X23Y126": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020B00",
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            "TIEOFF_X23Y127": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020B00",
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            "TIEOFF_X23Y128": "TIEOFF"
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        "bits": {
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            "TIEOFF_X23Y129": "TIEOFF"
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        "bits": {
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            "TIEOFF_X23Y130": "TIEOFF"
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            "CLB_IO_CLK": {
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            "TIEOFF_X23Y131": "TIEOFF"
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        "bits": {
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            "TIEOFF_X23Y132": "TIEOFF"
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            "TIEOFF_X23Y134": "TIEOFF"
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            "TIEOFF_X23Y135": "TIEOFF"
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            "TIEOFF_X23Y136": "TIEOFF"
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            "TIEOFF_X23Y137": "TIEOFF"
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            "TIEOFF_X23Y138": "TIEOFF"
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            "TIEOFF_X23Y139": "TIEOFF"
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            "TIEOFF_X23Y140": "TIEOFF"
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            "TIEOFF_X23Y147": "TIEOFF"
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            "TIEOFF_X23Y148": "TIEOFF"
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            "TIEOFF_X25Y0": "TIEOFF"
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            "TIEOFF_X25Y1": "TIEOFF"
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            "TIEOFF_X25Y2": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400C00",
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                "offset": 6,
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        "pin_functions": {},
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            "TIEOFF_X25Y3": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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                "offset": 8,
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            "TIEOFF_X25Y4": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400C00",
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                "offset": 10,
                "words": 2
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            "TIEOFF_X25Y5": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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                "offset": 12,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X25Y6": "TIEOFF"
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    },
    "INT_L_X24Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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                "offset": 14,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X25Y7": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y8": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X25Y8": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X24Y9": {
        "bits": {
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                "baseaddr": "0x00400C00",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X25Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y10": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y11": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y12": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y13": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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                "offset": 32,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 63,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
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                "baseaddr": "0x00400C00",
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        "bits": {
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                "baseaddr": "0x00400C00",
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        "bits": {
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            "TIEOFF_X25Y25": "TIEOFF"
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    "INT_L_X24Y68": {
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    "INT_L_X24Y69": {
        "bits": {
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            "TIEOFF_X25Y69": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
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                "words": 2
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            "TIEOFF_X25Y70": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00000C00",
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            "TIEOFF_X25Y71": "TIEOFF"
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    "INT_L_X24Y72": {
        "bits": {
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            "TIEOFF_X25Y72": "TIEOFF"
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        "bits": {
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            "TIEOFF_X25Y73": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00000C00",
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            "TIEOFF_X25Y74": "TIEOFF"
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        "bits": {
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            "TIEOFF_X25Y75": "TIEOFF"
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        "bits": {
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            "TIEOFF_X25Y76": "TIEOFF"
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            "TIEOFF_X25Y78": "TIEOFF"
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    "INT_L_X24Y108": {
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    "INT_L_X24Y109": {
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        "bits": {
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    "INT_L_X24Y115": {
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    "INT_L_X24Y116": {
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        "type": "INT_L"
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        "bits": {
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        "pin_functions": {},
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        "type": "INT_L"
    },
    "INT_L_X24Y118": {
        "bits": {
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
                "frames": 28,
                "offset": 38,
                "words": 2
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            "TIEOFF_X25Y119": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00020C00",
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            "TIEOFF_X25Y120": "TIEOFF"
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        "bits": {
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            "TIEOFF_X25Y121": "TIEOFF"
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            "TIEOFF_X25Y122": "TIEOFF"
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            "TIEOFF_X25Y123": "TIEOFF"
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            "TIEOFF_X27Y3": "TIEOFF"
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            "TIEOFF_X27Y5": "TIEOFF"
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        "type": "INT_L"
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                "words": 2
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            "TIEOFF_X27Y8": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X27Y9": "TIEOFF"
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        },
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        "pin_functions": {},
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        "bits": {
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00400D00",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X27Y13": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X26Y14": {
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        "pin_functions": {},
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            "TIEOFF_X27Y14": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X26Y15": {
        "bits": {
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                "baseaddr": "0x00400D00",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X27Y15": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y16": {
        "bits": {
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                "baseaddr": "0x00400D00",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y16": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y17": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y17": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00400D00",
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            "TIEOFF_X27Y18": "TIEOFF"
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            "TIEOFF_X27Y19": "TIEOFF"
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    "INT_L_X26Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 68,
        "grid_y": 86,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y67": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 68,
        "grid_y": 85,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y68": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 68,
        "grid_y": 84,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y69": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y70": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 82,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y71": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y72": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y73": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y74": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y75": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y76": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y77": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y78": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y79": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y80": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y81": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
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                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y82": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y83": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y84": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
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                "offset": 71,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y85": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 73,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 66,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 77,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y88": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
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                "offset": 79,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y89": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 81,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y90": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 83,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 60,
        "pin_functions": {},
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            "TIEOFF_X27Y92": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y93": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
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                "offset": 89,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y94": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 91,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y95": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 53,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 68,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y100": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 68,
        "grid_y": 50,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y101": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 4,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 68,
        "grid_y": 49,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y102": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 6,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 48,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y103": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 8,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 47,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y104": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 10,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 68,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y105": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 12,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 68,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y106": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 14,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 68,
        "grid_y": 44,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y107": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 68,
        "grid_y": 43,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y108": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 18,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 68,
        "grid_y": 42,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y109": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 68,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y110": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 68,
        "grid_y": 40,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y111": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 68,
        "grid_y": 39,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y112": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 68,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y113": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 68,
        "grid_y": 37,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y114": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 68,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y115": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
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        "sites": {
            "TIEOFF_X27Y116": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 34,
                "words": 2
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        },
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            "TIEOFF_X27Y117": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
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            "TIEOFF_X27Y118": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y119": {
        "bits": {
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                "baseaddr": "0x00020D00",
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            "TIEOFF_X27Y119": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00020D00",
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            "TIEOFF_X27Y120": "TIEOFF"
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    },
    "INT_L_X26Y121": {
        "bits": {
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                "baseaddr": "0x00020D00",
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            "TIEOFF_X27Y121": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X27Y122": "TIEOFF"
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            "TIEOFF_X27Y123": "TIEOFF"
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            "TIEOFF_X27Y124": "TIEOFF"
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            "TIEOFF_X27Y149": "TIEOFF"
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    "INT_L_X28Y0": {
        "bits": {
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            "TIEOFF_X29Y0": "TIEOFF"
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    "INT_L_X28Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X29Y1": "TIEOFF"
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            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X29Y2": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X29Y3": "TIEOFF"
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                "baseaddr": "0x00400E00",
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        "type": "INT_L"
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                "baseaddr": "0x00400E00",
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        "pin_functions": {},
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            "TIEOFF_X29Y7": "TIEOFF"
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X29Y9": "TIEOFF"
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        "type": "INT_L"
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            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X29Y10": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X29Y11": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y12": {
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                "baseaddr": "0x00400E00",
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        },
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        "pin_functions": {},
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            "TIEOFF_X29Y12": "TIEOFF"
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    "INT_L_X28Y13": {
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                "baseaddr": "0x00400E00",
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X29Y13": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y14": {
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                "baseaddr": "0x00400E00",
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        },
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        "pin_functions": {},
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            "TIEOFF_X29Y14": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 72,
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 30,
                "words": 2
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            "TIEOFF_X29Y65": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "words": 2
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        },
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            "TIEOFF_X29Y66": "TIEOFF"
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    "INT_L_X28Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "words": 2
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            "TIEOFF_X29Y67": "TIEOFF"
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    },
    "INT_L_X28Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "words": 2
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        },
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            "TIEOFF_X29Y68": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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        },
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            "TIEOFF_X29Y69": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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            "TIEOFF_X29Y70": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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                "baseaddr": "0x00000E00",
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    "INT_L_X28Y98": {
        "bits": {
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            "TIEOFF_X29Y98": "TIEOFF"
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    "INT_L_X28Y99": {
        "bits": {
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            "TIEOFF_X29Y99": "TIEOFF"
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    "INT_L_X28Y125": {
        "bits": {
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            "TIEOFF_X29Y125": "TIEOFF"
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    "INT_L_X28Y126": {
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            "TIEOFF_X29Y126": "TIEOFF"
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    "INT_L_X28Y127": {
        "bits": {
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    "INT_L_X28Y128": {
        "bits": {
            "CLB_IO_CLK": {
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    "INT_L_X28Y129": {
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            "TIEOFF_X29Y129": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020E00",
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    "INT_L_X28Y131": {
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            "CLB_IO_CLK": {
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    "INT_L_X28Y132": {
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            "CLB_IO_CLK": {
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    "INT_L_X28Y133": {
        "bits": {
            "CLB_IO_CLK": {
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        "type": "INT_L"
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    "INT_L_X28Y134": {
        "bits": {
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                "baseaddr": "0x00020E00",
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    "INT_L_X28Y135": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X29Y135": "TIEOFF"
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    "INT_L_X28Y136": {
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                "baseaddr": "0x00020E00",
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        "type": "INT_L"
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    "INT_L_X28Y137": {
        "bits": {
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            "TIEOFF_X29Y137": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y138": {
        "bits": {
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        "sites": {
            "TIEOFF_X29Y138": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
                "frames": 28,
                "offset": 79,
                "words": 2
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        "sites": {
            "TIEOFF_X29Y139": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
                "frames": 28,
                "offset": 81,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X29Y140": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X29Y141": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X29Y142": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y143": {
        "bits": {
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                "baseaddr": "0x00020E00",
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            "TIEOFF_X29Y143": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y144": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X29Y144": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y145": {
        "bits": {
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                "baseaddr": "0x00020E00",
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            "TIEOFF_X29Y145": "TIEOFF"
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    "INT_L_X28Y146": {
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            "CLB_IO_CLK": {
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            "TIEOFF_X29Y146": "TIEOFF"
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    "INT_L_X28Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X29Y147": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X29Y148": "TIEOFF"
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                "baseaddr": "0x00020E00",
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            "TIEOFF_X29Y149": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
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            "TIEOFF_X31Y0": "TIEOFF"
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            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
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            "TIEOFF_X31Y1": "TIEOFF"
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            "TIEOFF_X31Y2": "TIEOFF"
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            "TIEOFF_X31Y3": "TIEOFF"
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            "TIEOFF_X31Y4": "TIEOFF"
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            "TIEOFF_X31Y5": "TIEOFF"
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            "TIEOFF_X31Y6": "TIEOFF"
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        "bits": {
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            "TIEOFF_X31Y7": "TIEOFF"
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            "TIEOFF_X31Y8": "TIEOFF"
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            "TIEOFF_X31Y9": "TIEOFF"
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            "TIEOFF_X31Y10": "TIEOFF"
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        "bits": {
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            "TIEOFF_X31Y11": "TIEOFF"
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            "TIEOFF_X31Y19": "TIEOFF"
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            "TIEOFF_X31Y20": "TIEOFF"
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            "TIEOFF_X31Y21": "TIEOFF"
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        "bits": {
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        "pin_functions": {},
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            "TIEOFF_X31Y22": "TIEOFF"
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    "INT_L_X30Y23": {
        "bits": {
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            "TIEOFF_X31Y23": "TIEOFF"
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    "INT_L_X30Y24": {
        "bits": {
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                "baseaddr": "0x00400F00",
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            "TIEOFF_X31Y24": "TIEOFF"
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    "INT_L_X30Y25": {
        "bits": {
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            "TIEOFF_X31Y25": "TIEOFF"
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    "INT_L_X30Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
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            "TIEOFF_X31Y26": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
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            "TIEOFF_X31Y27": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y28": {
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            "TIEOFF_X31Y28": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00400F00",
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        "clock_region": "X1Y0",
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            "TIEOFF_X31Y29": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y30": {
        "bits": {
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        "pin_functions": {},
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            "TIEOFF_X31Y30": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
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            "TIEOFF_X31Y31": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X31Y32": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y33": {
        "bits": {
            "CLB_IO_CLK": {
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        "pin_functions": {},
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            "TIEOFF_X31Y33": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X31Y34": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y35": {
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        },
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        "pin_functions": {},
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            "TIEOFF_X31Y35": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y36": {
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        "pin_functions": {},
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            "TIEOFF_X31Y36": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y37": {
        "bits": {
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        "pin_functions": {},
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            "TIEOFF_X31Y37": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y38": {
        "bits": {
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                "words": 2
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        },
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                "baseaddr": "0x00400F00",
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    "INT_L_X30Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 64,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 63,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y89": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y90": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 83,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 61,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y91": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 85,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 60,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y92": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 87,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y93": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 58,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y94": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 91,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y95": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 95,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X31Y100": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 2,
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        },
        "clock_region": "X1Y2",
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        "grid_y": 50,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y101": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 4,
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y102": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 6,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y103": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 8,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y104": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 10,
                "words": 2
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        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y105": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 12,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y106": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y107": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 16,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y108": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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                "offset": 18,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y109": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X31Y110": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X31Y111": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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                "offset": 24,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X31Y112": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y113": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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                "offset": 28,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y114": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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                "offset": 30,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y115": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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                "offset": 32,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y116": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y117": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y118": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y119": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y120": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 30,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y121": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 29,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y122": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 28,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y123": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 27,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y124": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y125": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 24,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 23,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 22,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 21,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y129": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y130": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 77,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y131": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 18,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y132": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y133": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 16,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y134": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y135": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y136": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 14,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y136": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X31Y137": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 77,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X31Y138": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 79,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y139": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X31Y140": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
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        },
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            "TIEOFF_X31Y141": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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        },
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            "TIEOFF_X31Y142": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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        },
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            "TIEOFF_X31Y143": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y144": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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        },
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            "TIEOFF_X31Y144": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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            "TIEOFF_X31Y145": "TIEOFF"
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    "INT_L_X30Y146": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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            "TIEOFF_X31Y146": "TIEOFF"
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    "INT_L_X30Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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            "TIEOFF_X31Y147": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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            "TIEOFF_X31Y148": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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            "TIEOFF_X31Y149": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401000",
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            "TIEOFF_X33Y0": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401000",
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            "TIEOFF_X33Y1": "TIEOFF"
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                "baseaddr": "0x00401000",
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            "TIEOFF_X33Y2": "TIEOFF"
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        "bits": {
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        },
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            "TIEOFF_X33Y3": "TIEOFF"
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        "bits": {
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            "TIEOFF_X33Y4": "TIEOFF"
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            "TIEOFF_X33Y5": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X33Y6": "TIEOFF"
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        "bits": {
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            "TIEOFF_X33Y7": "TIEOFF"
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        "bits": {
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            "TIEOFF_X33Y8": "TIEOFF"
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            "TIEOFF_X33Y9": "TIEOFF"
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        "bits": {
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        "bits": {
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            "TIEOFF_X33Y13": "TIEOFF"
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            "TIEOFF_X33Y15": "TIEOFF"
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            "TIEOFF_X33Y16": "TIEOFF"
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            "TIEOFF_X33Y17": "TIEOFF"
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        "bits": {
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            "TIEOFF_X33Y18": "TIEOFF"
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        "bits": {
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            "TIEOFF_X33Y19": "TIEOFF"
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        "bits": {
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                "offset": 40,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X33Y20": "TIEOFF"
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    "INT_L_X32Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X33Y21": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "offset": 44,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X33Y22": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X33Y23": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "offset": 48,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X33Y24": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X33Y25": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X33Y26": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X33Y27": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X33Y28": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "offset": 59,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y29": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y30": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y31": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y32": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "offset": 67,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y33": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y34": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y35": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y36": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y37": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00401000",
                "frames": 28,
                "offset": 77,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y38": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X33Y39": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "offset": 81,
                "words": 2
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            "TIEOFF_X33Y40": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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            "TIEOFF_X33Y41": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y42": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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            "TIEOFF_X33Y42": "TIEOFF"
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                "baseaddr": "0x00401000",
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            "TIEOFF_X33Y68": "TIEOFF"
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        "bits": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X33Y69": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "offset": 40,
                "words": 2
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        },
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            "TIEOFF_X33Y70": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y71": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X33Y71": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y72": {
        "bits": {
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                "baseaddr": "0x00001000",
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                "offset": 44,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X33Y72": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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                "offset": 46,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X33Y73": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y74": {
        "bits": {
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                "baseaddr": "0x00001000",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X33Y74": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y75": {
        "bits": {
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                "offset": 51,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y75": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y76": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 53,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y76": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y77": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y77": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y78": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y78": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y79": {
        "bits": {
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                "offset": 59,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y79": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y80": {
        "bits": {
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                "baseaddr": "0x00001000",
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                "words": 2
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        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y80": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y81": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y81": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y82": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y83": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y83": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y84": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y85": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y85": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
                "frames": 28,
                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y87": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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                "offset": 77,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
                "frames": 28,
                "offset": 79,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y89": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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                "offset": 81,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y90": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X33Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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        },
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        "pin_functions": {},
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            "TIEOFF_X33Y92": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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        },
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            "TIEOFF_X33Y93": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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        },
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            "TIEOFF_X33Y94": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X33Y95": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X33Y96": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X33Y97": "TIEOFF"
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        "bits": {
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        "bits": {
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            "TIEOFF_X33Y101": "TIEOFF"
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            "TIEOFF_X33Y102": "TIEOFF"
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        "bits": {
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            "TIEOFF_X33Y103": "TIEOFF"
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        "bits": {
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            "TIEOFF_X33Y106": "TIEOFF"
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            "TIEOFF_X33Y107": "TIEOFF"
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            "TIEOFF_X33Y108": "TIEOFF"
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            "TIEOFF_X33Y112": "TIEOFF"
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            "TIEOFF_X33Y117": "TIEOFF"
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    "INT_L_X32Y118": {
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        },
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            "TIEOFF_X33Y119": "TIEOFF"
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    "INT_L_X32Y120": {
        "bits": {
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            "TIEOFF_X33Y120": "TIEOFF"
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    "INT_L_X32Y121": {
        "bits": {
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                "baseaddr": "0x00021000",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X33Y121": "TIEOFF"
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    "INT_L_X32Y122": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X33Y122": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y123": {
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        },
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            "TIEOFF_X33Y123": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y124": {
        "bits": {
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                "baseaddr": "0x00021000",
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            "TIEOFF_X33Y124": "TIEOFF"
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    },
    "INT_L_X32Y125": {
        "bits": {
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        "pin_functions": {},
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            "TIEOFF_X33Y125": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y126": {
        "bits": {
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            "TIEOFF_X33Y126": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X33Y127": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X33Y128": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y129": {
        "bits": {
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                "baseaddr": "0x00021000",
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            "TIEOFF_X33Y129": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y130": {
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            "TIEOFF_X33Y130": "TIEOFF"
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    "INT_L_X32Y131": {
        "bits": {
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            "TIEOFF_X33Y131": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y132": {
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        "pin_functions": {},
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            "TIEOFF_X33Y132": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y133": {
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        },
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        "sites": {
            "TIEOFF_X33Y133": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y134": {
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        },
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        "pin_functions": {},
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            "TIEOFF_X33Y134": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y135": {
        "bits": {
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y135": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y136": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 82,
        "grid_y": 14,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y136": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 13,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y137": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 82,
        "grid_y": 12,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y138": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y139": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y140": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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                "offset": 83,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y141": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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                "offset": 85,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y142": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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                "offset": 87,
                "words": 2
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        },
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            "TIEOFF_X33Y143": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y144": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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                "offset": 89,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X33Y144": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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                "offset": 91,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X33Y145": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y146": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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                "offset": 93,
                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X33Y146": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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                "offset": 95,
                "words": 2
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        },
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            "TIEOFF_X33Y147": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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                "offset": 97,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X33Y148": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X33Y149": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
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                "offset": 0,
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        },
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        "pin_functions": {},
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            "TIEOFF_X36Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
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                "offset": 2,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X36Y1": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
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                "offset": 4,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y2": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
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                "offset": 6,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y3": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
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                "offset": 8,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y4": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
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                "offset": 10,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X36Y5": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
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                "offset": 12,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X36Y6": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
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                "offset": 14,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X36Y7": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y8": {
        "bits": {
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                "baseaddr": "0x00401100",
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                "offset": 16,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X36Y8": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00401100",
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                "offset": 18,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X36Y9": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00401100",
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                "offset": 20,
                "words": 2
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        },
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            "TIEOFF_X36Y10": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y11": {
        "bits": {
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                "baseaddr": "0x00401100",
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                "offset": 22,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X36Y11": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00401100",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X36Y12": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00401100",
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                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X36Y13": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00401100",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X36Y14": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
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                "offset": 30,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X36Y15": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y16": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X36Y17": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y20": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 134,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y22": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 132,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y23": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 131,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y24": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y25": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 128,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y26": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y27": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y28": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y29": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y30": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y31": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y32": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 88,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y33": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 88,
        "grid_y": 120,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y34": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X36Y36": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X36Y37": "TIEOFF"
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            "TIEOFF_X36Y39": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X34Y85": {
        "bits": {
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y85": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X36Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
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                "offset": 77,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X36Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
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                "offset": 79,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y89": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X36Y90": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
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                "words": 2
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        },
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            "TIEOFF_X36Y91": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X34Y92": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X36Y92": "TIEOFF"
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    "INT_L_X34Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
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        },
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        "bits": {
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        "bits": {
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                "baseaddr": "0x00001100",
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        "bits": {
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                "baseaddr": "0x00001100",
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        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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    "INT_L_X34Y118": {
        "bits": {
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        "pin_functions": {},
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    "INT_L_X34Y119": {
        "bits": {
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        "bits": {
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                "baseaddr": "0x00021100",
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                "words": 2
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    "INT_L_X34Y121": {
        "bits": {
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                "words": 2
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            "TIEOFF_X36Y121": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X34Y122": {
        "bits": {
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    "INT_L_X34Y123": {
        "bits": {
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    "INT_L_X34Y124": {
        "bits": {
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                "words": 2
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    "INT_L_X34Y125": {
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                "baseaddr": "0x00021100",
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                "words": 2
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        "type": "INT_L"
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    "INT_L_X34Y126": {
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        "type": "INT_L"
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        "type": "INT_L"
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        "bits": {
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                "words": 2
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X34Y129": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X34Y130": {
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    "INT_L_X34Y131": {
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    "INT_L_X34Y132": {
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                "words": 2
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        "type": "INT_L"
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    "INT_L_X34Y133": {
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
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    "INT_L_X34Y134": {
        "bits": {
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y134": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021100",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X36Y135": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y136": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021100",
                "frames": 28,
                "offset": 73,
                "words": 2
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        },
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            "TIEOFF_X36Y136": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021100",
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                "offset": 75,
                "words": 2
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        },
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            "TIEOFF_X36Y137": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021100",
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                "words": 2
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        },
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            "TIEOFF_X36Y138": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021100",
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                "offset": 79,
                "words": 2
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        },
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            "TIEOFF_X36Y139": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021100",
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                "words": 2
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        },
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            "TIEOFF_X36Y140": "TIEOFF"
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    "INT_L_X34Y141": {
        "bits": {
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        "bits": {
            "CLB_IO_CLK": {
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        "bits": {
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        "bits": {
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        "bits": {
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            "TIEOFF_X38Y18": "TIEOFF"
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            "TIEOFF_X38Y19": "TIEOFF"
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                "words": 2
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            "TIEOFF_X38Y21": "TIEOFF"
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            "TIEOFF_X38Y22": "TIEOFF"
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    "INT_L_X36Y23": {
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            "TIEOFF_X38Y23": "TIEOFF"
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        "bits": {
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            "TIEOFF_X38Y27": "TIEOFF"
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        "pin_functions": {},
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        "pin_functions": {},
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        "type": "INT_L"
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        },
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        "pin_functions": {},
        "sites": {
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    "INT_L_X36Y34": {
        "bits": {
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        },
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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                "words": 2
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    "INT_L_X36Y84": {
        "bits": {
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            "TIEOFF_X38Y84": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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        "bits": {
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        "type": "INT_L"
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    "INT_L_X36Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021200",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
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            "TIEOFF_X38Y134": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X36Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021200",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X38Y135": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X36Y136": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X38Y136": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X36Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021200",
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                "offset": 75,
                "words": 2
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        },
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            "TIEOFF_X38Y137": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021200",
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                "words": 2
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        },
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            "TIEOFF_X38Y138": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021200",
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                "words": 2
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        },
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        "bits": {
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            "CLB_IO_CLK": {
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            "CLB_IO_CLK": {
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                "words": 2
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        "bits": {
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                "words": 2
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                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "pin_functions": {},
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    "INT_L_X38Y33": {
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                "words": 2
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        "pin_functions": {},
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X40Y34": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00401300",
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                "words": 2
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            "TIEOFF_X40Y35": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X40Y36": "TIEOFF"
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        "bits": {
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            "TIEOFF_X40Y37": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00401300",
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            "TIEOFF_X40Y38": "TIEOFF"
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            "TIEOFF_X40Y39": "TIEOFF"
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    "INT_L_X38Y82": {
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            "TIEOFF_X40Y82": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 98,
        "grid_y": 69,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y83": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 98,
        "grid_y": 68,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y84": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 98,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y85": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 98,
        "grid_y": 66,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 98,
        "grid_y": 65,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y87": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 98,
        "grid_y": 64,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 98,
        "grid_y": 63,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y89": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 98,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y90": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
                "frames": 28,
                "offset": 83,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 98,
        "grid_y": 61,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y91": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
                "frames": 28,
                "offset": 85,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 98,
        "grid_y": 60,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y92": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
                "frames": 28,
                "offset": 87,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y93": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
                "frames": 28,
                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 58,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y94": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
                "frames": 28,
                "offset": 91,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y95": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
                "frames": 28,
                "offset": 93,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 56,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
                "frames": 28,
                "offset": 95,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 55,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
                "frames": 28,
                "offset": 97,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 54,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 98,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y0": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 154,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y1": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 4,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 153,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y2": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 6,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 152,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y3": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 8,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 151,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y4": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 10,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y5": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 12,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 149,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y6": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 14,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y7": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y8": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 18,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 146,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y9": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 144,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 143,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 142,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 141,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 139,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 137,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y20": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 134,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 133,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y22": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 132,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y23": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 131,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y24": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y25": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 128,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y26": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 127,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y27": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 126,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y28": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 125,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y29": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y30": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 102,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y31": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y32": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y33": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 69,
                "words": 2
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        },
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            "TIEOFF_X42Y34": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 71,
                "words": 2
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        },
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            "TIEOFF_X42Y35": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "words": 2
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        },
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            "TIEOFF_X42Y36": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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        },
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            "TIEOFF_X42Y37": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00401400",
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        },
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            "TIEOFF_X42Y38": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401400",
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            "TIEOFF_X42Y39": "TIEOFF"
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    "INT_L_X40Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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            "TIEOFF_X42Y40": "TIEOFF"
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        "bits": {
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            "TIEOFF_X42Y41": "TIEOFF"
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            "TIEOFF_X42Y46": "TIEOFF"
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            "TIEOFF_X42Y65": "TIEOFF"
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            "TIEOFF_X42Y66": "TIEOFF"
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                "words": 2
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            "TIEOFF_X42Y67": "TIEOFF"
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    "INT_L_X40Y68": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X42Y68": "TIEOFF"
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    "INT_L_X40Y69": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X42Y69": "TIEOFF"
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            "TIEOFF_X42Y70": "TIEOFF"
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                "baseaddr": "0x00001400",
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        },
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            "TIEOFF_X42Y71": "TIEOFF"
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    "INT_L_X40Y72": {
        "bits": {
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                "baseaddr": "0x00001400",
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        "clock_region": "X1Y1",
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            "TIEOFF_X42Y72": "TIEOFF"
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    "INT_L_X40Y73": {
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                "baseaddr": "0x00001400",
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X42Y73": "TIEOFF"
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    "INT_L_X40Y74": {
        "bits": {
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    "INT_L_X40Y75": {
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                "baseaddr": "0x00001400",
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    "INT_L_X40Y76": {
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                "baseaddr": "0x00001400",
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            "TIEOFF_X42Y76": "TIEOFF"
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        "type": "INT_L"
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                "words": 2
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        "clock_region": "X1Y1",
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            "TIEOFF_X42Y77": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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        },
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            "TIEOFF_X42Y78": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y79": {
        "bits": {
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        },
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            "TIEOFF_X42Y79": "TIEOFF"
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        "type": "INT_L"
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X42Y80": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y81": {
        "bits": {
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y81": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 102,
        "grid_y": 70,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y82": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 102,
        "grid_y": 69,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y83": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 102,
        "grid_y": 68,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y84": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 102,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y85": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 66,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y87": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 79,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y89": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 81,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y90": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 83,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "sites": {
            "TIEOFF_X42Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 85,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y92": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 87,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "sites": {
            "TIEOFF_X42Y93": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 89,
                "words": 2
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        },
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            "TIEOFF_X42Y94": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 91,
                "words": 2
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        },
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            "TIEOFF_X42Y95": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 93,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X42Y96": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 95,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X42Y97": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 97,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y98": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y99": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 0,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X44Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 2,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X44Y1": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 4,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X44Y2": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 6,
                "words": 2
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        },
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            "TIEOFF_X44Y3": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y4": {
        "bits": {
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                "baseaddr": "0x00401500",
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                "offset": 8,
                "words": 2
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        },
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            "TIEOFF_X44Y4": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 10,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X44Y5": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 12,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X44Y6": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y7": {
        "bits": {
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                "baseaddr": "0x00401500",
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X44Y7": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 16,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X44Y8": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y9": {
        "bits": {
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                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y9": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X42Y10": {
        "bits": {
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                "baseaddr": "0x00401500",
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                "offset": 20,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X44Y10": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X44Y11": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X44Y12": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X44Y13": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y20": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "grid_y": 133,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y22": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "grid_y": 132,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y23": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y24": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y25": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y26": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y27": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y28": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 109,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y29": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 109,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y30": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00401500",
                "frames": 28,
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    "INT_L_X42Y81": {
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        },
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        "sites": {
            "TIEOFF_X44Y81": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
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                "words": 2
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        },
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            "TIEOFF_X44Y82": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
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                "words": 2
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        },
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            "TIEOFF_X44Y83": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
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        },
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            "TIEOFF_X44Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y85": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X44Y85": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y86": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X44Y86": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X42Y87": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X44Y87": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X42Y88": {
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        "type": "INT_L"
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        "bits": {
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        "bits": {
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        "clock_region": "X0Y0",
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            "TIEOFF_X1Y16": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y17": {
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X1Y17": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y18": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X1Y26": {
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        },
        "clock_region": "X0Y0",
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X1Y27": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y28": {
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X1Y28": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y29": {
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X1Y29": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y30": {
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00400080",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X1Y31": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X1Y74": {
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    "INT_R_X1Y75": {
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        "type": "INT_R"
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    "INT_R_X1Y76": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X1Y80": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y80": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000080",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y81": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000080",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y82": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000080",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y83": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y84": {
        "bits": {
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                "baseaddr": "0x00000080",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y84": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000080",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X1Y85": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y86": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y86": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y87": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X1Y87": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000080",
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        },
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            "TIEOFF_X1Y88": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000080",
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                "words": 2
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        },
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            "TIEOFF_X1Y89": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y90": {
        "bits": {
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                "baseaddr": "0x00000080",
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        },
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        "type": "INT_R"
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    "INT_R_X1Y91": {
        "bits": {
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        },
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            "TIEOFF_X1Y91": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y92": {
        "bits": {
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        },
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            "TIEOFF_X1Y92": "TIEOFF"
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    },
    "INT_R_X1Y93": {
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            "CLB_IO_CLK": {
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        "bits": {
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        "type": "INT_R"
    },
    "INT_R_X1Y95": {
        "bits": {
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    },
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        "bits": {
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            "TIEOFF_X1Y96": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y97": {
        "bits": {
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X1Y98": {
        "bits": {
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X1Y99": {
        "bits": {
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                "words": 2
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        },
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        "type": "INT_R"
    },
    "INT_R_X1Y100": {
        "bits": {
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            "TIEOFF_X1Y100": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y101": {
        "bits": {
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        },
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            "TIEOFF_X1Y101": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y102": {
        "bits": {
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        },
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            "TIEOFF_X1Y102": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y103": {
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                "baseaddr": "0x00020080",
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        },
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            "TIEOFF_X1Y103": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y104": {
        "bits": {
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        },
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    "INT_R_X1Y105": {
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            "TIEOFF_X1Y105": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y106": {
        "bits": {
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            "TIEOFF_X1Y106": "TIEOFF"
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        "type": "INT_R"
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        },
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            "TIEOFF_X1Y107": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y108": {
        "bits": {
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            "TIEOFF_X1Y108": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y109": {
        "bits": {
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        },
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            "TIEOFF_X1Y109": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y110": {
        "bits": {
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            "TIEOFF_X1Y110": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y111": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X1Y111": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y112": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X1Y112": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y113": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X1Y113": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y114": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y114": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y115": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y115": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
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                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y116": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 34,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X1Y117": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y118": {
        "bits": {
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                "baseaddr": "0x00020080",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y118": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X1Y119": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y120": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y121": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y122": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y123": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y124": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 5,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y125": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y126": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 5,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y127": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 5,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y128": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 5,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y129": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 5,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y130": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 5,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y131": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 5,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y132": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 5,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y133": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 5,
        "grid_y": 16,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y134": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 5,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y135": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y136": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y136": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 5,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y137": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y138": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 79,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 5,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y139": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
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                "offset": 81,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y140": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
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                "offset": 83,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y141": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
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                "offset": 85,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y142": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y143": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y144": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 89,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y144": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
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                "offset": 91,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y145": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y146": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y146": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y147": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y148": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y149": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 12,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y0": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 2,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y1": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 4,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y2": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 6,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y3": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 8,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y4": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 10,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y5": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 12,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y6": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 14,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y7": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y8": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 18,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y9": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 12,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y10": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 144,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y11": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 12,
        "grid_y": 143,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y12": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 12,
        "grid_y": 142,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y13": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 12,
        "grid_y": 141,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y14": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 12,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y15": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 12,
        "grid_y": 139,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y16": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 12,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y17": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 12,
        "grid_y": 137,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y18": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 12,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y19": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 12,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y20": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 12,
        "grid_y": 134,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y21": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 12,
        "grid_y": 133,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y22": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 12,
        "grid_y": 132,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y23": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 12,
        "grid_y": 131,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y24": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 12,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y25": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 12,
        "grid_y": 128,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y26": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 12,
        "grid_y": 127,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y27": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 12,
        "grid_y": 126,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y28": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00400180",
                "frames": 28,
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X3Y73": {
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    "INT_R_X3Y74": {
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    "INT_R_X3Y75": {
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    "INT_R_X3Y76": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X3Y79": {
        "bits": {
            "CLB_IO_CLK": {
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                "frames": 28,
                "offset": 59,
                "words": 2
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        },
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        "grid_x": 12,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y79": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y80": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y81": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y82": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y83": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y84": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y85": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y86": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y86": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y87": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X3Y87": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
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        },
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            "TIEOFF_X3Y88": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
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                "words": 2
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        },
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            "TIEOFF_X3Y89": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000180",
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        },
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            "TIEOFF_X3Y90": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y91": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X3Y91": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y92": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X3Y92": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y93": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X3Y93": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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            "TIEOFF_X3Y94": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y95": {
        "bits": {
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                "words": 2
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            "TIEOFF_X3Y95": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y96": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X3Y96": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y97": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X3Y97": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y98": {
        "bits": {
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                "baseaddr": "0x00000180",
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                "words": 2
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        },
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            "TIEOFF_X3Y98": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y99": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X3Y99": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y100": {
        "bits": {
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            "TIEOFF_X3Y100": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y101": {
        "bits": {
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                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y101": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y102": {
        "bits": {
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                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y102": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y103": {
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                "baseaddr": "0x00020180",
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            "TIEOFF_X3Y103": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X3Y104": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y105": {
        "bits": {
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        },
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            "TIEOFF_X3Y105": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y106": {
        "bits": {
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            "TIEOFF_X3Y106": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y107": {
        "bits": {
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            "TIEOFF_X3Y107": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y108": {
        "bits": {
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        },
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            "TIEOFF_X3Y108": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y109": {
        "bits": {
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                "baseaddr": "0x00020180",
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            "TIEOFF_X3Y109": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y110": {
        "bits": {
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                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y110": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y111": {
        "bits": {
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                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y111": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y112": {
        "bits": {
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                "baseaddr": "0x00020180",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X3Y112": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y113": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y114": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y115": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y116": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 34,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X3Y117": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y118": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y119": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 12,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y120": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y121": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y122": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 12,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y123": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 12,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y124": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 12,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y125": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 12,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y126": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 12,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y127": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 12,
        "grid_y": 22,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y128": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 12,
        "grid_y": 21,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y129": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y130": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 12,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y131": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y132": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y133": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y134": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "offset": 71,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "sites": {
            "TIEOFF_X3Y135": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y136": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "offset": 73,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y136": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y137": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "offset": 77,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y138": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "offset": 79,
                "words": 2
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X3Y139": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "offset": 81,
                "words": 2
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X3Y140": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "offset": 83,
                "words": 2
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        },
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            "TIEOFF_X3Y141": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "words": 2
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        },
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            "TIEOFF_X3Y142": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "words": 2
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        },
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            "TIEOFF_X3Y143": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y144": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "offset": 89,
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        },
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            "TIEOFF_X3Y144": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "offset": 91,
                "words": 2
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        },
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            "TIEOFF_X3Y145": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y146": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "offset": 93,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "sites": {
            "TIEOFF_X3Y146": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "offset": 95,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "sites": {
            "TIEOFF_X3Y147": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "offset": 97,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "sites": {
            "TIEOFF_X3Y148": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "offset": 99,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "sites": {
            "TIEOFF_X3Y149": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
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                "offset": 0,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y0": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
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                "offset": 2,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X5Y1": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y2": {
        "bits": {
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                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y2": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y3": {
        "bits": {
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                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 6,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X5Y3": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y4": {
        "bits": {
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                "baseaddr": "0x00400280",
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                "offset": 8,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y4": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y5": {
        "bits": {
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                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 10,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y5": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y6": {
        "bits": {
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                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 12,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y6": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y7": {
        "bits": {
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                "baseaddr": "0x00400280",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y7": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y8": {
        "bits": {
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                "baseaddr": "0x00400280",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y8": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y9": {
        "bits": {
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                "baseaddr": "0x00400280",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y9": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y10": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y11": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y12": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
        "grid_y": 142,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y13": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "grid_y": 141,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y14": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y15": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
        "grid_y": 139,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y16": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y17": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
        "grid_y": 137,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y18": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y19": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y20": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
        "grid_y": 134,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y21": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y22": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
        "grid_y": 132,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y23": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y24": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y25": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
        "grid_y": 128,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y26": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
        "grid_y": 127,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y27": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y28": {
        "bits": {
            "CLB_IO_CLK": {
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        "type": "INT_R"
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    "INT_R_X5Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000280",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y78": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000280",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y79": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000280",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y80": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000280",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y81": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000280",
                "frames": 28,
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y82": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000280",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X5Y83": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y84": {
        "bits": {
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                "baseaddr": "0x00000280",
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        },
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            "TIEOFF_X5Y84": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y85": {
        "bits": {
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        },
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            "TIEOFF_X5Y85": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
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            "TIEOFF_X5Y86": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y87": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X5Y87": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00000280",
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        "type": "INT_R"
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        "bits": {
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        },
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        "bits": {
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        "type": "INT_R"
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    "INT_R_X5Y92": {
        "bits": {
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        "type": "INT_R"
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        "bits": {
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        "bits": {
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        "type": "INT_R"
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        "bits": {
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        "type": "INT_R"
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    "INT_R_X5Y97": {
        "bits": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X5Y98": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X5Y99": {
        "bits": {
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                "offset": 99,
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        "bits": {
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        "type": "INT_R"
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    "INT_R_X5Y102": {
        "bits": {
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            "TIEOFF_X5Y103": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y105": {
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        "type": "INT_R"
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    "INT_R_X5Y106": {
        "bits": {
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        },
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            "TIEOFF_X5Y106": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X5Y108": {
        "bits": {
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        },
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        "pin_functions": {},
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            "TIEOFF_X5Y108": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y109": {
        "bits": {
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        },
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            "TIEOFF_X5Y109": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y110": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X5Y110": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y111": {
        "bits": {
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X5Y111": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X5Y112": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
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                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X5Y113": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X5Y114": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y115": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y116": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y116": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y117": {
        "bits": {
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X5Y117": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y118": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y119": {
        "bits": {
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                "baseaddr": "0x00020280",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X5Y119": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y120": {
        "bits": {
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                "baseaddr": "0x00020280",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y120": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
                "frames": 28,
                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y121": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y122": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 16,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y123": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y124": {
        "bits": {
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                "baseaddr": "0x00020280",
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                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 16,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y124": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y125": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y126": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y127": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
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            "TIEOFF_X5Y128": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y129": {
        "bits": {
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                "baseaddr": "0x00020280",
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        "type": "INT_R"
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    "INT_R_X5Y130": {
        "bits": {
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                "baseaddr": "0x00020280",
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        },
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            "TIEOFF_X5Y130": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y131": {
        "bits": {
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        },
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        "type": "INT_R"
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            "TIEOFF_X5Y132": "TIEOFF"
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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                "words": 2
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        },
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            "TIEOFF_X7Y13": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X7Y14": "TIEOFF"
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        "type": "INT_R"
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                "words": 2
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X7Y17": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X7Y18": {
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                "words": 2
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        "type": "INT_R"
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                "words": 2
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        },
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            "TIEOFF_X7Y19": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X7Y20": {
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        "type": "INT_R"
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    "INT_R_X7Y21": {
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X7Y22": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X7Y22": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X7Y23": {
        "bits": {
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X7Y24": {
        "bits": {
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X7Y24": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X7Y25": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "sites": {
            "TIEOFF_X7Y25": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X7Y26": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "sites": {
            "TIEOFF_X7Y26": "TIEOFF"
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        "type": "INT_R"
    },
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                "baseaddr": "0x00020380",
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        "type": "INT_R"
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        },
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        "sites": {
            "TIEOFF_X9Y125": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X9Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
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                "offset": 53,
                "words": 2
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        },
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            "TIEOFF_X9Y126": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00020480",
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                "words": 2
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        },
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            "TIEOFF_X9Y127": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X9Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
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        },
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            "TIEOFF_X9Y128": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X9Y129": {
        "bits": {
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                "baseaddr": "0x00020480",
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        },
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            "TIEOFF_X9Y129": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X9Y130": {
        "bits": {
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                "baseaddr": "0x00020480",
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            "TIEOFF_X9Y130": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X9Y131": {
        "bits": {
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                "baseaddr": "0x00020480",
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        },
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        "bits": {
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                "baseaddr": "0x00020480",
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        "bits": {
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                "baseaddr": "0x00020480",
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        "type": "INT_R"
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        },
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X11Y11": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X12Y11": "TIEOFF"
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        "type": "INT_R"
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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        "clock_region": "X0Y0",
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            "TIEOFF_X12Y13": "TIEOFF"
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        "type": "INT_R"
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                "words": 2
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00400580",
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                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X12Y15": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y16": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X12Y16": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y17": {
        "bits": {
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                "baseaddr": "0x00400580",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X12Y17": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y18": {
        "bits": {
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                "baseaddr": "0x00400580",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X12Y18": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X12Y19": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y20": {
        "bits": {
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                "baseaddr": "0x00400580",
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X12Y20": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y21": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y21": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y22": {
        "bits": {
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                "baseaddr": "0x00400580",
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y22": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y23": {
        "bits": {
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                "baseaddr": "0x00400580",
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                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 32,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y23": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y24": {
        "bits": {
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                "baseaddr": "0x00400580",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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                "baseaddr": "0x00400580",
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    "INT_R_X11Y67": {
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    "INT_R_X11Y73": {
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    "INT_R_X11Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000580",
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00000580",
                "frames": 28,
                "offset": 51,
                "words": 2
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X11Y77": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X11Y109": {
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    "INT_R_X11Y110": {
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        "type": "INT_R"
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    "INT_R_X11Y114": {
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        "type": "INT_R"
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    "INT_R_X11Y115": {
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        "type": "INT_R"
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    "INT_R_X11Y116": {
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            "TIEOFF_X12Y116": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y117": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X11Y118": {
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    "INT_R_X11Y119": {
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        "type": "INT_R"
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    "INT_R_X11Y120": {
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    "INT_R_X11Y121": {
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    "INT_R_X11Y122": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X11Y123": {
        "bits": {
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        },
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        "sites": {
            "TIEOFF_X12Y123": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X12Y124": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X11Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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                "offset": 51,
                "words": 2
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        },
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            "TIEOFF_X12Y125": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X11Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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                "words": 2
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        },
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            "TIEOFF_X12Y126": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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                "words": 2
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        },
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            "TIEOFF_X12Y127": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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                "words": 2
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        },
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            "TIEOFF_X12Y128": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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        },
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            "TIEOFF_X12Y129": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y130": {
        "bits": {
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                "baseaddr": "0x00020580",
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            "TIEOFF_X12Y130": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        "bits": {
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        "bits": {
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        },
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            "TIEOFF_X12Y133": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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        "bits": {
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        "type": "INT_R"
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        },
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    "INT_R_X11Y143": {
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    "INT_R_X11Y145": {
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    "INT_R_X11Y146": {
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    "INT_R_X11Y147": {
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    "INT_R_X11Y149": {
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        "type": "INT_R"
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    "INT_R_X13Y102": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X13Y105": {
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            "TIEOFF_X14Y105": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y106": {
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        },
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        "pin_functions": {},
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            "TIEOFF_X14Y106": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X14Y107": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y108": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y108": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y109": {
        "bits": {
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                "offset": 18,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X14Y109": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y110": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X14Y110": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y111": {
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                "offset": 22,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X14Y111": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y112": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X14Y112": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y113": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X14Y113": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y114": {
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                "baseaddr": "0x00020680",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X13Y115": {
        "bits": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X14Y115": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y116": {
        "bits": {
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                "baseaddr": "0x00020680",
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                "words": 2
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        },
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            "TIEOFF_X14Y116": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y117": {
        "bits": {
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                "baseaddr": "0x00020680",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X14Y117": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y118": {
        "bits": {
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            "TIEOFF_X14Y118": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y119": {
        "bits": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X13Y120": {
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                "baseaddr": "0x00020680",
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                "words": 2
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            "TIEOFF_X14Y120": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y121": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y121": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y122": {
        "bits": {
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        },
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        "type": "INT_R"
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    "INT_R_X13Y123": {
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        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X16Y123": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X15Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020780",
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                "words": 2
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        },
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            "TIEOFF_X16Y124": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X15Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020780",
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                "words": 2
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        },
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            "TIEOFF_X16Y125": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X15Y126": {
        "bits": {
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                "baseaddr": "0x00020780",
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                "words": 2
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            "TIEOFF_X16Y126": "TIEOFF"
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        "type": "INT_R"
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            "CLB_IO_CLK": {
                "baseaddr": "0x00020780",
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        },
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            "TIEOFF_X16Y127": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00020780",
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        },
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            "TIEOFF_X16Y128": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X16Y129": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y105": {
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        "type": "INT_R"
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    "INT_R_X17Y106": {
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        },
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        "type": "INT_R"
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    "INT_R_X17Y107": {
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        "type": "INT_R"
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    "INT_R_X17Y108": {
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        },
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        "type": "INT_R"
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    "INT_R_X17Y109": {
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        "type": "INT_R"
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    "INT_R_X17Y110": {
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        },
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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    "INT_R_X17Y112": {
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        "type": "INT_R"
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    "INT_R_X17Y113": {
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        "type": "INT_R"
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    "INT_R_X17Y114": {
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        "type": "INT_R"
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    "INT_R_X17Y115": {
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        "type": "INT_R"
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    "INT_R_X17Y116": {
        "bits": {
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        },
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        "type": "INT_R"
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    "INT_R_X17Y117": {
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        },
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        "type": "INT_R"
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    "INT_R_X17Y118": {
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        "type": "INT_R"
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    "INT_R_X17Y119": {
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X17Y120": {
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        "type": "INT_R"
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    "INT_R_X17Y121": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X17Y122": {
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                "words": 2
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
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    "INT_R_X17Y124": {
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                "baseaddr": "0x00020880",
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    "INT_R_X17Y126": {
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            "TIEOFF_X18Y126": "TIEOFF"
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            "TIEOFF_X18Y127": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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                "words": 2
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        },
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        },
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X19Y15": {
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                "words": 2
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X19Y16": {
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        "clock_region": "X0Y0",
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            "TIEOFF_X20Y16": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y17": {
        "bits": {
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                "baseaddr": "0x00400980",
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                "words": 2
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        "clock_region": "X0Y0",
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        "sites": {
            "TIEOFF_X20Y17": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y18": {
        "bits": {
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                "baseaddr": "0x00400980",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y18": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y19": {
        "bits": {
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                "baseaddr": "0x00400980",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "sites": {
            "TIEOFF_X20Y19": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y20": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "sites": {
            "TIEOFF_X20Y20": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y21": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y21": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
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    "INT_R_X19Y125": {
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    "INT_R_X19Y126": {
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            "TIEOFF_X20Y126": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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                "words": 2
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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                "words": 2
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X21Y15": {
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                "words": 2
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X21Y16": {
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                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X22Y16": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y17": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X22Y17": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y18": {
        "bits": {
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                "words": 2
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        "clock_region": "X0Y0",
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            "TIEOFF_X22Y18": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y19": {
        "bits": {
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                "baseaddr": "0x00400A80",
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                "words": 2
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        "clock_region": "X0Y0",
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            "TIEOFF_X22Y19": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y20": {
        "bits": {
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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                "baseaddr": "0x00400A80",
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
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                "offset": 40,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y70": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
                "frames": 28,
                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y71": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y72": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y73": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y74": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y75": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
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                "offset": 53,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X22Y76": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
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                "offset": 55,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X22Y77": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
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                "words": 2
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        },
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            "TIEOFF_X22Y78": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
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                "offset": 59,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X22Y79": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
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                "words": 2
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        },
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            "TIEOFF_X22Y80": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
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                "words": 2
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        },
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            "TIEOFF_X22Y81": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
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                "words": 2
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        },
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            "TIEOFF_X22Y82": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y83": {
        "bits": {
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                "baseaddr": "0x00000A80",
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                "words": 2
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        },
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            "TIEOFF_X22Y83": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X22Y84": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y85": {
        "bits": {
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                "baseaddr": "0x00000A80",
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                "words": 2
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        },
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            "TIEOFF_X22Y85": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y86": {
        "bits": {
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                "baseaddr": "0x00000A80",
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                "words": 2
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        },
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            "TIEOFF_X22Y86": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
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                "words": 2
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        },
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            "TIEOFF_X22Y87": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y88": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X22Y88": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
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                "words": 2
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        },
        "clock_region": "X0Y1",
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            "TIEOFF_X22Y89": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y90": {
        "bits": {
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                "baseaddr": "0x00000A80",
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                "words": 2
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        },
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            "TIEOFF_X22Y90": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y91": {
        "bits": {
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                "baseaddr": "0x00000A80",
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                "words": 2
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        },
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            "TIEOFF_X22Y91": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y92": {
        "bits": {
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                "offset": 85,
                "words": 2
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        },
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            "TIEOFF_X22Y92": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y93": {
        "bits": {
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                "offset": 87,
                "words": 2
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        },
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            "TIEOFF_X22Y93": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y94": {
        "bits": {
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                "baseaddr": "0x00000A80",
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                "words": 2
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        },
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            "TIEOFF_X22Y94": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y95": {
        "bits": {
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                "baseaddr": "0x00000A80",
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                "offset": 91,
                "words": 2
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        },
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            "TIEOFF_X22Y95": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y96": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X22Y96": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y97": {
        "bits": {
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                "baseaddr": "0x00000A80",
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                "offset": 95,
                "words": 2
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        },
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            "TIEOFF_X22Y97": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y98": {
        "bits": {
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                "baseaddr": "0x00000A80",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
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            "TIEOFF_X22Y98": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y99": {
        "bits": {
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                "baseaddr": "0x00000A80",
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                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X22Y99": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y100": {
        "bits": {
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                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 0,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X22Y100": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y101": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y102": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 6,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y103": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 8,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y104": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 10,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y105": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 12,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y106": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 54,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y107": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 16,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 54,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y108": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 54,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y109": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 54,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y110": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "grid_y": 40,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y111": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 54,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y112": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 54,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y113": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 54,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y114": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 54,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y115": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 54,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y116": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 34,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 54,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y117": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 54,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y118": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
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            "TIEOFF_X22Y119": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
                "frames": 28,
                "offset": 40,
                "words": 2
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            "TIEOFF_X22Y120": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y121": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X22Y121": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020A80",
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            "TIEOFF_X22Y122": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y123": {
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                "baseaddr": "0x00020A80",
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            "TIEOFF_X22Y123": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y124": {
        "bits": {
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                "baseaddr": "0x00020A80",
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            "TIEOFF_X22Y124": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y125": {
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            "CLB_IO_CLK": {
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            "TIEOFF_X22Y125": "TIEOFF"
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    "INT_R_X21Y126": {
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            "TIEOFF_X22Y126": "TIEOFF"
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            "TIEOFF_X22Y127": "TIEOFF"
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    "INT_R_X21Y130": {
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    "INT_R_X21Y147": {
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    "INT_R_X21Y149": {
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            "TIEOFF_X24Y2": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y3": {
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        "clock_region": "X0Y0",
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            "TIEOFF_X24Y3": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y4": {
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                "words": 2
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        "clock_region": "X0Y0",
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            "TIEOFF_X24Y4": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y5": {
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                "words": 2
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            "TIEOFF_X24Y5": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y6": {
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                "words": 2
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        },
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            "TIEOFF_X24Y6": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y7": {
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                "baseaddr": "0x00400B80",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X24Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y8": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X24Y8": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y9": {
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                "baseaddr": "0x00400B80",
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                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X24Y9": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y10": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X24Y10": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y11": {
        "bits": {
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                "baseaddr": "0x00400B80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "sites": {
            "TIEOFF_X24Y11": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X24Y12": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y13": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00400B80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X24Y13": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X24Y14": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y15": {
        "bits": {
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                "baseaddr": "0x00400B80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X24Y15": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y16": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y17": {
        "bits": {
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                "baseaddr": "0x00400B80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y17": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y18": {
        "bits": {
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                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        },
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            "TIEOFF_X24Y71": "TIEOFF"
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    "INT_R_X23Y72": {
        "bits": {
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            "TIEOFF_X24Y72": "TIEOFF"
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    "INT_R_X23Y102": {
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    "INT_R_X23Y103": {
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    "INT_R_X23Y106": {
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        "type": "INT_R"
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    "INT_R_X23Y108": {
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    "INT_R_X23Y109": {
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    "INT_R_X23Y110": {
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    "INT_R_X23Y112": {
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        "type": "INT_R"
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    "INT_R_X23Y113": {
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    "INT_R_X23Y114": {
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        "type": "INT_R"
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    "INT_R_X23Y115": {
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        "type": "INT_R"
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    "INT_R_X23Y116": {
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        "type": "INT_R"
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    "INT_R_X23Y117": {
        "bits": {
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        "type": "INT_R"
    },
    "INT_R_X23Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020B80",
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            "TIEOFF_X24Y119": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y120": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X23Y121": {
        "bits": {
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            "TIEOFF_X24Y121": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y122": {
        "bits": {
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            "TIEOFF_X24Y122": "TIEOFF"
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            "TIEOFF_X24Y123": "TIEOFF"
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    "INT_R_X23Y149": {
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        "type": "INT_R"
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    "INT_R_X25Y1": {
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    "INT_R_X25Y2": {
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            "TIEOFF_X26Y2": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y3": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X25Y5": {
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        "type": "INT_R"
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X25Y7": {
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                "words": 2
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            "TIEOFF_X26Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y8": {
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        },
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        "type": "INT_R"
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    "INT_R_X25Y9": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X25Y10": {
        "bits": {
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                "baseaddr": "0x00400C80",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X25Y11": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X26Y11": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y12": {
        "bits": {
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                "baseaddr": "0x00400C80",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X26Y12": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y13": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X26Y13": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y14": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X26Y14": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y15": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y15": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y16": {
        "bits": {
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                "words": 2
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        },
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00400C80",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y65": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y66": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
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                "offset": 34,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X26Y67": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
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                "offset": 36,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y68": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y69": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
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                "words": 2
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        },
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            "TIEOFF_X26Y70": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X26Y71": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
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        },
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            "TIEOFF_X26Y72": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
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        },
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            "TIEOFF_X26Y73": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
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                "words": 2
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        },
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            "TIEOFF_X26Y74": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
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        },
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            "TIEOFF_X26Y75": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y76": {
        "bits": {
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                "baseaddr": "0x00000C80",
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        },
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            "TIEOFF_X26Y76": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
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        },
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            "TIEOFF_X26Y77": "TIEOFF"
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    "INT_R_X25Y78": {
        "bits": {
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                "baseaddr": "0x00000C80",
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        },
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            "TIEOFF_X26Y78": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y79": {
        "bits": {
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        },
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            "TIEOFF_X26Y79": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
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        },
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            "TIEOFF_X26Y80": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
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        },
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            "TIEOFF_X26Y81": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y82": {
        "bits": {
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        },
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            "TIEOFF_X26Y82": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y83": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X26Y83": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y84": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X26Y84": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y85": {
        "bits": {
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                "words": 2
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            "TIEOFF_X26Y85": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y86": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X26Y86": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y87": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X26Y87": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y88": {
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                "words": 2
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        },
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            "TIEOFF_X26Y88": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y89": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X26Y89": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y90": {
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            "TIEOFF_X26Y90": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y91": {
        "bits": {
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        },
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            "TIEOFF_X26Y91": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y92": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X25Y93": {
        "bits": {
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        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X25Y94": {
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        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X25Y95": {
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                "words": 2
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            "TIEOFF_X26Y95": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y96": {
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                "words": 2
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        },
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            "TIEOFF_X26Y96": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y97": {
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                "baseaddr": "0x00000C80",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X26Y97": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y98": {
        "bits": {
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                "offset": 97,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X26Y98": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y99": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y100": {
        "bits": {
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                "baseaddr": "0x00020C80",
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X26Y100": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y101": {
        "bits": {
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                "baseaddr": "0x00020C80",
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                "offset": 2,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y101": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X26Y102": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X26Y103": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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                "offset": 8,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X26Y104": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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                "offset": 10,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X26Y105": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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                "offset": 12,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y106": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y107": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y107": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
                "frames": 28,
                "offset": 16,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X26Y108": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y109": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 64,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y110": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y111": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 64,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y112": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 64,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y113": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 64,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y114": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y115": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X26Y116": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X26Y117": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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        },
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            "TIEOFF_X26Y118": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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            "TIEOFF_X26Y119": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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            "TIEOFF_X26Y120": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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            "TIEOFF_X26Y121": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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            "TIEOFF_X26Y122": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y123": {
        "bits": {
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            "TIEOFF_X26Y123": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y124": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X26Y124": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y125": {
        "bits": {
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                "baseaddr": "0x00020C80",
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            "TIEOFF_X26Y125": "TIEOFF"
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    },
    "INT_R_X25Y126": {
        "bits": {
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                "baseaddr": "0x00020C80",
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            "TIEOFF_X26Y126": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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            "TIEOFF_X26Y127": "TIEOFF"
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    },
    "INT_R_X25Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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            "TIEOFF_X26Y128": "TIEOFF"
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    },
    "INT_R_X25Y129": {
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            "CLB_IO_CLK": {
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            "TIEOFF_X26Y129": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y130": {
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        "type": "INT_R"
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    "INT_R_X25Y131": {
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    "INT_R_X25Y132": {
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            "TIEOFF_X26Y132": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y133": {
        "bits": {
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            "TIEOFF_X26Y133": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y134": {
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            "TIEOFF_X26Y134": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y135": {
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        "type": "INT_R"
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    "INT_R_X25Y136": {
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        "type": "INT_R"
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    "INT_R_X25Y137": {
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        "type": "INT_R"
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    "INT_R_X25Y138": {
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            "TIEOFF_X26Y138": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y139": {
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    "INT_R_X25Y140": {
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    "INT_R_X25Y141": {
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    "INT_R_X25Y142": {
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    "INT_R_X25Y143": {
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    "INT_R_X25Y144": {
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    "INT_R_X25Y145": {
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        "type": "INT_R"
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    "INT_R_X25Y146": {
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            "TIEOFF_X26Y146": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y147": {
        "bits": {
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                "words": 2
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            "TIEOFF_X26Y147": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y148": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X26Y148": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y149": {
        "bits": {
            "CLB_IO_CLK": {
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                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "sites": {
            "TIEOFF_X26Y149": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y0": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
                "offset": 2,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y1": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y2": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
                "offset": 6,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y3": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
                "offset": 8,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y4": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
                "offset": 10,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y5": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
                "offset": 12,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y6": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X27Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y7": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
                "offset": 16,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 69,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y8": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 69,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y9": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X27Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 69,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y10": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X27Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 69,
        "grid_y": 144,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y11": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X27Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 69,
        "grid_y": 143,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y12": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X27Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 69,
        "grid_y": 142,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y13": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X27Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
                "offset": 28,
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            "TIEOFF_X28Y63": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D80",
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                "offset": 28,
                "words": 2
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            "TIEOFF_X28Y64": "TIEOFF"
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        "type": "INT_R"
    },
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                "baseaddr": "0x00000D80",
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                "words": 2
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        },
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        "type": "INT_R"
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        },
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            "TIEOFF_X28Y66": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X28Y67": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y68": {
        "bits": {
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                "baseaddr": "0x00000D80",
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            "TIEOFF_X28Y68": "TIEOFF"
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    "INT_R_X27Y69": {
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            "TIEOFF_X28Y69": "TIEOFF"
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    "INT_R_X27Y104": {
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    "INT_R_X27Y106": {
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    "INT_R_X27Y108": {
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    "INT_R_X27Y109": {
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    "INT_R_X27Y110": {
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    "INT_R_X27Y111": {
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        "type": "INT_R"
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    "INT_R_X27Y112": {
        "bits": {
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            "TIEOFF_X28Y112": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y113": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X29Y12": {
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    "INT_R_X29Y136": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 73,
        "grid_y": 14,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y136": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X29Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y137": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X29Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y138": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X29Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y139": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X29Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
                "frames": 28,
                "offset": 81,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y140": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X29Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
                "frames": 28,
                "offset": 83,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y141": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X29Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y142": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X29Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y143": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y144": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
                "frames": 28,
                "offset": 89,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X30Y144": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
                "frames": 28,
                "offset": 91,
                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X30Y145": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X29Y146": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X30Y146": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X29Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X30Y147": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X29Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
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            "TIEOFF_X30Y148": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X30Y149": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 0,
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y0": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 2,
                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y1": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y2": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 6,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y3": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 8,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y4": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 10,
                "words": 2
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        "clock_region": "X1Y0",
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        "sites": {
            "TIEOFF_X32Y5": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 12,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X32Y6": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 14,
                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X32Y7": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y8": {
        "bits": {
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                "baseaddr": "0x00400F80",
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                "offset": 16,
                "words": 2
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        },
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            "TIEOFF_X32Y8": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y9": {
        "bits": {
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                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y9": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X32Y10": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y11": {
        "bits": {
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                "baseaddr": "0x00400F80",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y11": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y12": {
        "bits": {
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                "baseaddr": "0x00400F80",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X32Y12": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y13": {
        "bits": {
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                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y13": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y14": {
        "bits": {
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                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y14": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y15": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y16": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y17": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 78,
        "grid_y": 137,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y18": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 78,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y19": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 78,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y20": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 134,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y21": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 133,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y22": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 78,
        "grid_y": 132,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y23": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 131,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y24": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 78,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y25": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 78,
        "grid_y": 128,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y26": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 78,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y27": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 78,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y28": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 78,
        "grid_y": 125,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y29": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 78,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y30": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 78,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y31": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 78,
        "grid_y": 122,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y32": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 78,
        "grid_y": 121,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y33": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 78,
        "grid_y": 120,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y34": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y35": {
        "bits": {
            "CLB_IO_CLK": {
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        "type": "INT_R"
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            "TIEOFF_X32Y84": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
                "frames": 28,
                "offset": 71,
                "words": 2
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            "TIEOFF_X32Y85": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
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            "TIEOFF_X32Y86": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y87": {
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                "baseaddr": "0x00000F80",
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            "TIEOFF_X32Y87": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y88": {
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                "baseaddr": "0x00000F80",
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            "TIEOFF_X32Y88": "TIEOFF"
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    "INT_R_X31Y89": {
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            "TIEOFF_X32Y89": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        "type": "INT_R"
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    "INT_R_X31Y121": {
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    "INT_R_X31Y128": {
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    "INT_R_X31Y129": {
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    "INT_R_X31Y130": {
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    "INT_R_X31Y131": {
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    "INT_R_X31Y132": {
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        "type": "INT_R"
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    "INT_R_X31Y133": {
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            "TIEOFF_X32Y133": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y134": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X32Y135": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y136": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
                "frames": 28,
                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X32Y136": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X32Y137": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
                "frames": 28,
                "offset": 77,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X32Y138": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X32Y139": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X32Y140": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
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        },
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            "TIEOFF_X32Y141": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
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        },
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            "TIEOFF_X32Y142": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
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        },
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            "TIEOFF_X32Y143": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y144": {
        "bits": {
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                "baseaddr": "0x00020F80",
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        },
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            "TIEOFF_X32Y144": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
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        },
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            "TIEOFF_X32Y145": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y146": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X32Y146": "TIEOFF"
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    },
    "INT_R_X31Y147": {
        "bits": {
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                "baseaddr": "0x00020F80",
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        },
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            "TIEOFF_X32Y147": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
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        },
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            "TIEOFF_X32Y148": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y149": {
        "bits": {
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            "TIEOFF_X32Y149": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y0": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X34Y0": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y1": {
        "bits": {
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                "offset": 2,
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        },
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            "TIEOFF_X34Y1": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y2": {
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                "words": 2
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        },
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            "TIEOFF_X34Y2": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
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            "TIEOFF_X34Y3": "TIEOFF"
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        "type": "INT_R"
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X34Y4": "TIEOFF"
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        "type": "INT_R"
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        "clock_region": "X1Y0",
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            "TIEOFF_X34Y5": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X34Y6": "TIEOFF"
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        "type": "INT_R"
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        "clock_region": "X1Y0",
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            "TIEOFF_X34Y7": "TIEOFF"
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        "type": "INT_R"
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        },
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            "TIEOFF_X34Y8": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X34Y9": "TIEOFF"
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        "type": "INT_R"
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                "words": 2
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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        },
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            "TIEOFF_X34Y11": "TIEOFF"
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        "type": "INT_R"
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                "words": 2
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        },
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        "type": "INT_R"
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X34Y13": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X34Y14": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y15": {
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                "baseaddr": "0x00401080",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X34Y15": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y16": {
        "bits": {
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                "baseaddr": "0x00401080",
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                "offset": 32,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X34Y16": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y17": {
        "bits": {
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                "baseaddr": "0x00401080",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y17": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y18": {
        "bits": {
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                "baseaddr": "0x00401080",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X34Y18": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y19": {
        "bits": {
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                "baseaddr": "0x00401080",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X34Y19": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y20": {
        "bits": {
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                "baseaddr": "0x00401080",
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                "offset": 40,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X34Y20": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y21": {
        "bits": {
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                "baseaddr": "0x00401080",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y21": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y22": {
        "bits": {
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                "baseaddr": "0x00401080",
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                "offset": 44,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y22": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y23": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
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                "offset": 48,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X34Y24": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y25": {
        "bits": {
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                "baseaddr": "0x00401080",
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                "offset": 51,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y25": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y26": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y27": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X33Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
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                "offset": 57,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y28": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X33Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
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                "offset": 59,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y29": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X33Y30": {
        "bits": {
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                "baseaddr": "0x00401080",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y30": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X33Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y31": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X33Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 83,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y32": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X33Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 67,
                "words": 2
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        "bits": {
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                "baseaddr": "0x00021080",
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                "offset": 67,
                "words": 2
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        },
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            "TIEOFF_X34Y133": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y134": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X33Y135": {
        "bits": {
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            "TIEOFF_X34Y135": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y137": {
        "bits": {
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    "INT_R_X35Y23": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X35Y28": {
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        "clock_region": "X1Y0",
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    "INT_R_X35Y30": {
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        "type": "INT_R"
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    "INT_R_X35Y31": {
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        },
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X35Y32": {
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                "words": 2
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00001180",
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            "TIEOFF_X37Y83": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X35Y84": {
        "bits": {
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                "baseaddr": "0x00001180",
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        "type": "INT_R"
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    "INT_R_X35Y85": {
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            "TIEOFF_X37Y85": "TIEOFF"
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            "TIEOFF_X37Y86": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X35Y87": {
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            "TIEOFF_X37Y87": "TIEOFF"
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    "INT_R_X35Y118": {
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    "INT_R_X35Y126": {
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    "INT_R_X35Y130": {
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    "INT_R_X35Y131": {
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        "bits": {
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                "baseaddr": "0x00021180",
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        "type": "INT_R"
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    "INT_R_X37Y30": {
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        "type": "INT_R"
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    "INT_R_X37Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
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                "offset": 63,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X39Y31": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
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                "offset": 65,
                "words": 2
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        },
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            "TIEOFF_X39Y32": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
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                "words": 2
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        },
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X37Y34": {
        "bits": {
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                "words": 2
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            "TIEOFF_X39Y34": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00401280",
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                "words": 2
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        },
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            "TIEOFF_X39Y35": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00401280",
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            "TIEOFF_X39Y36": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y37": {
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                "baseaddr": "0x00401280",
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        },
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            "TIEOFF_X39Y37": "TIEOFF"
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            "TIEOFF_X39Y38": "TIEOFF"
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        "type": "INT_R"
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        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X37Y73": {
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        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X37Y74": {
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    "INT_R_X37Y75": {
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        "type": "INT_R"
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        "type": "INT_R"
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            "TIEOFF_X39Y77": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y78": {
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        "clock_region": "X1Y1",
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            "TIEOFF_X39Y78": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y79": {
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X39Y79": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y80": {
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                "words": 2
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00001280",
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                "words": 2
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    "INT_R_X37Y82": {
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            "TIEOFF_X39Y83": "TIEOFF"
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    "INT_R_X37Y119": {
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    "INT_R_X37Y125": {
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    "INT_R_X37Y126": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X37Y128": {
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            "TIEOFF_X39Y128": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y129": {
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        "type": "INT_R"
    },
    "INT_R_X37Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021280",
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                "offset": 61,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X39Y130": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X37Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021280",
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                "offset": 63,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X39Y131": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021280",
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                "offset": 65,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X39Y132": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021280",
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                "offset": 67,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X39Y133": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021280",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X39Y134": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021280",
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                "offset": 71,
                "words": 2
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        },
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            "TIEOFF_X39Y135": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y136": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021280",
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                "words": 2
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        },
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            "TIEOFF_X39Y136": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y137": {
        "bits": {
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                "baseaddr": "0x00021280",
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                "words": 2
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        },
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            "TIEOFF_X39Y137": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y138": {
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                "baseaddr": "0x00021280",
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                "words": 2
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        },
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            "TIEOFF_X39Y138": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y139": {
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                "baseaddr": "0x00021280",
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                "words": 2
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        },
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            "TIEOFF_X39Y139": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y140": {
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            "TIEOFF_X39Y140": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y141": {
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        },
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            "TIEOFF_X39Y141": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y142": {
        "bits": {
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        },
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            "TIEOFF_X39Y142": "TIEOFF"
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    "INT_R_X37Y143": {
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        },
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    "INT_R_X37Y144": {
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        },
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    "INT_R_X37Y145": {
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        "type": "INT_R"
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    "INT_R_X37Y146": {
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    "INT_R_X37Y147": {
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                "words": 2
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        },
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    "INT_R_X37Y148": {
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        "type": "INT_R"
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    "INT_R_X37Y149": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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                "words": 2
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                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X41Y12": "TIEOFF"
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        "type": "INT_R"
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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                "words": 2
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X39Y15": {
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                "offset": 30,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X41Y15": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y16": {
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                "offset": 32,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X41Y16": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y17": {
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                "baseaddr": "0x00401380",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X41Y17": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y18": {
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                "baseaddr": "0x00401380",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X41Y18": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y19": {
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                "offset": 38,
                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X39Y20": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "words": 2
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X39Y21": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X39Y22": {
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                "baseaddr": "0x00401380",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X41Y22": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y23": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X41Y23": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y24": {
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                "baseaddr": "0x00401380",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y24": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y25": {
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                "baseaddr": "0x00401380",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y25": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y26": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y26": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y27": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y27": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y28": {
        "bits": {
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                "baseaddr": "0x00401380",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y28": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y29": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "offset": 59,
                "words": 2
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        "type": "INT_R"
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                "baseaddr": "0x00401380",
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                "words": 2
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    "INT_R_X39Y75": {
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    },
    "INT_R_X39Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
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        "grid_x": 99,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y79": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X39Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y80": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X39Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y81": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X39Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y82": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X39Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y83": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X39Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y84": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y85": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X41Y86": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
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                "offset": 75,
                "words": 2
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        },
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            "TIEOFF_X41Y87": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X41Y88": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
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                "words": 2
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        },
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            "TIEOFF_X41Y89": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y90": {
        "bits": {
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                "baseaddr": "0x00001380",
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                "words": 2
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        },
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            "TIEOFF_X41Y90": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y91": {
        "bits": {
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                "baseaddr": "0x00001380",
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                "words": 2
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        },
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            "TIEOFF_X41Y91": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y92": {
        "bits": {
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                "baseaddr": "0x00001380",
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                "words": 2
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        },
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            "TIEOFF_X41Y92": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y93": {
        "bits": {
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                "baseaddr": "0x00001380",
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                "words": 2
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        },
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            "TIEOFF_X41Y93": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y94": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X41Y94": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y95": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X41Y95": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
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                "offset": 93,
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        },
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            "TIEOFF_X41Y96": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y97": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 95,
                "words": 2
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        },
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            "TIEOFF_X41Y97": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y98": {
        "bits": {
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                "baseaddr": "0x00001380",
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                "offset": 97,
                "words": 2
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        },
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            "TIEOFF_X41Y98": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y99": {
        "bits": {
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                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X41Y99": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X41Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401480",
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            "TIEOFF_X43Y0": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y1": {
        "bits": {
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                "baseaddr": "0x00401480",
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        },
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            "TIEOFF_X43Y1": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y2": {
        "bits": {
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                "baseaddr": "0x00401480",
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                "words": 2
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        },
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            "TIEOFF_X43Y2": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y3": {
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        },
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            "TIEOFF_X43Y3": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X41Y4": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X43Y4": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X41Y5": {
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                "baseaddr": "0x00401480",
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        "clock_region": "X1Y0",
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            "TIEOFF_X43Y5": "TIEOFF"
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        "type": "INT_R"
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X43Y6": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X41Y7": {
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                "words": 2
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        },
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            "TIEOFF_X43Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X41Y8": {
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        },
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            "TIEOFF_X43Y8": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X43Y9": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X43Y10": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00401480",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X43Y11": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y12": {
        "bits": {
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                "baseaddr": "0x00401480",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X43Y12": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y13": {
        "bits": {
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                "baseaddr": "0x00401480",
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                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y13": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y14": {
        "bits": {
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                "baseaddr": "0x00401480",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y14": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y15": {
        "bits": {
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                "baseaddr": "0x00401480",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X43Y15": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401480",
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                "offset": 32,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y16": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401480",
                "frames": 28,
                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y17": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401480",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X43Y18": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401480",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y19": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401480",
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                "offset": 40,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X43Y20": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401480",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y21": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401480",
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                "offset": 44,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X43Y22": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y23": {
        "bits": {
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                "baseaddr": "0x00401480",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y23": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y24": {
        "bits": {
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                "baseaddr": "0x00401480",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y24": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y25": {
        "bits": {
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                "baseaddr": "0x00401480",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y25": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401480",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 103,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y26": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X41Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401480",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y27": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X41Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401480",
                "frames": 28,
                "offset": 57,
                "words": 2
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        "type": "INT_R"
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                "baseaddr": "0x00401480",
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    },
    "INT_R_X41Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001480",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y78": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X41Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001480",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y79": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X41Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001480",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y80": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X41Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001480",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y81": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001480",
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                "offset": 65,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X43Y82": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001480",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X43Y83": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001480",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X43Y84": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001480",
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                "words": 2
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        },
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            "TIEOFF_X43Y85": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y86": {
        "bits": {
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                "baseaddr": "0x00001480",
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                "words": 2
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        },
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            "TIEOFF_X43Y86": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001480",
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        },
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            "TIEOFF_X43Y87": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X41Y88": {
        "bits": {
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                "baseaddr": "0x00001480",
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        },
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            "TIEOFF_X43Y88": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X41Y89": {
        "bits": {
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                "baseaddr": "0x00001480",
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                "words": 2
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        },
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            "TIEOFF_X43Y89": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X41Y90": {
        "bits": {
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                "baseaddr": "0x00001480",
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        },
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            "TIEOFF_X43Y90": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X41Y91": {
        "bits": {
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        },
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            "TIEOFF_X43Y91": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X41Y92": {
        "bits": {
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                "baseaddr": "0x00001480",
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        },
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        "type": "INT_R"
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    "INT_R_X41Y93": {
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        },
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        "type": "INT_R"
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    "INT_R_X41Y94": {
        "bits": {
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        },
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            "TIEOFF_X43Y94": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X41Y95": {
        "bits": {
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        },
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        "type": "INT_R"
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    "INT_R_X41Y96": {
        "bits": {
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        },
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            "TIEOFF_X43Y96": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X41Y97": {
        "bits": {
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X41Y98": {
        "bits": {
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        },
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        "type": "INT_R"
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    "INT_R_X41Y99": {
        "bits": {
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                "words": 2
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    "INT_R_X43Y0": {
        "bits": {
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            "TIEOFF_X45Y0": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X43Y1": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X43Y3": {
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        "type": "INT_R"
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    "INT_R_X43Y4": {
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            "TIEOFF_X45Y4": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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        "type": "INT_R"
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        },
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            "TIEOFF_X45Y8": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X43Y9": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X45Y9": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X45Y10": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X43Y11": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X45Y11": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X43Y12": {
        "bits": {
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                "baseaddr": "0x00401580",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X45Y12": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X43Y13": {
        "bits": {
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                "baseaddr": "0x00401580",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y13": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X43Y14": {
        "bits": {
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                "baseaddr": "0x00401580",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X45Y14": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X43Y15": {
        "bits": {
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                "baseaddr": "0x00401580",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X45Y15": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X43Y16": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X45Y16": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X43Y17": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y17": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X43Y18": {
        "bits": {
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                "baseaddr": "0x00401580",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X45Y18": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X43Y19": {
        "bits": {
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                "baseaddr": "0x00401580",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X45Y19": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X43Y20": {
        "bits": {
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                "baseaddr": "0x00401580",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X45Y20": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X43Y21": {
        "bits": {
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                "baseaddr": "0x00401580",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X45Y21": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X43Y22": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y22": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X43Y23": {
        "bits": {
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                "baseaddr": "0x00401580",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y23": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X43Y24": {
        "bits": {
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                "baseaddr": "0x00401580",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y24": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X43Y25": {
        "bits": {
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                "baseaddr": "0x00401580",
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                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 110,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y25": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X43Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y26": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X43Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 28,
                "offset": 55,
                "words": 2
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        "bits": {
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                "baseaddr": "0x00401580",
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                "words": 2
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    "INT_R_X43Y74": {
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    "INT_R_X43Y75": {
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    "INT_R_X43Y76": {
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        "type": "INT_R"
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        },
        "sites": {
            "IOB_X0Y0": "IOB33"
        },
        "type": "LIOB33_SING"
    },
    "LIOB33_SING_X0Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "LIOB33"
                },
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 105,
        "pin_functions": {
            "IOB_X0Y49": "IO_0_14"
        },
        "sites": {
            "IOB_X0Y49": "IOB33"
        },
        "type": "LIOB33_SING"
    },
    "LIOB33_SING_X0Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y0"
                    },
                    "start_offset": 2,
                    "type": "LIOB33"
                },
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 103,
        "pin_functions": {
            "IOB_X0Y50": "IO_25_15"
        },
        "sites": {
            "IOB_X0Y50": "IOB33"
        },
        "type": "LIOB33_SING"
    },
    "LIOB33_SING_X0Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "LIOB33"
                },
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 53,
        "pin_functions": {
            "IOB_X0Y99": "IO_0_15"
        },
        "sites": {
            "IOB_X0Y99": "IOB33"
        },
        "type": "LIOB33_SING"
    },
    "LIOB33_SING_X0Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y0"
                    },
                    "start_offset": 2,
                    "type": "LIOB33"
                },
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 51,
        "pin_functions": {
            "IOB_X0Y100": "IO_25_16"
        },
        "sites": {
            "IOB_X0Y100": "IOB33"
        },
        "type": "LIOB33_SING"
    },
    "LIOB33_SING_X0Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "LIOB33"
                },
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 1,
        "pin_functions": {
            "IOB_X0Y149": "IO_0_16"
        },
        "sites": {
            "IOB_X0Y149": "IOB33"
        },
        "type": "LIOB33_SING"
    },
    "LIOB33_X0Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 154,
        "pin_functions": {
            "IOB_X0Y1": "IO_L24N_T3_A00_D16_14",
            "IOB_X0Y2": "IO_L24P_T3_A01_D17_14"
        },
        "sites": {
            "IOB_X0Y1": "IOB33S",
            "IOB_X0Y2": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 152,
        "pin_functions": {
            "IOB_X0Y3": "IO_L23N_T3_A02_D18_14",
            "IOB_X0Y4": "IO_L23P_T3_A03_D19_14"
        },
        "sites": {
            "IOB_X0Y3": "IOB33S",
            "IOB_X0Y4": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 150,
        "pin_functions": {
            "IOB_X0Y5": "IO_L22N_T3_A04_D20_14",
            "IOB_X0Y6": "IO_L22P_T3_A05_D21_14"
        },
        "sites": {
            "IOB_X0Y5": "IOB33S",
            "IOB_X0Y6": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 148,
        "pin_functions": {
            "IOB_X0Y7": "IO_L21N_T3_DQS_A06_D22_14",
            "IOB_X0Y8": "IO_L21P_T3_DQS_14"
        },
        "sites": {
            "IOB_X0Y7": "IOB33S",
            "IOB_X0Y8": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 146,
        "pin_functions": {
            "IOB_X0Y9": "IO_L20N_T3_A07_D23_14",
            "IOB_X0Y10": "IO_L20P_T3_A08_D24_14"
        },
        "sites": {
            "IOB_X0Y9": "IOB33S",
            "IOB_X0Y10": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 144,
        "pin_functions": {
            "IOB_X0Y11": "IO_L19N_T3_A09_D25_VREF_14",
            "IOB_X0Y12": "IO_L19P_T3_A10_D26_14"
        },
        "sites": {
            "IOB_X0Y11": "IOB33S",
            "IOB_X0Y12": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 142,
        "pin_functions": {
            "IOB_X0Y13": "IO_L18N_T2_A11_D27_14",
            "IOB_X0Y14": "IO_L18P_T2_A12_D28_14"
        },
        "sites": {
            "IOB_X0Y13": "IOB33S",
            "IOB_X0Y14": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 140,
        "pin_functions": {
            "IOB_X0Y15": "IO_L17N_T2_A13_D29_14",
            "IOB_X0Y16": "IO_L17P_T2_A14_D30_14"
        },
        "sites": {
            "IOB_X0Y15": "IOB33S",
            "IOB_X0Y16": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 138,
        "pin_functions": {
            "IOB_X0Y17": "IO_L16N_T2_A15_D31_14",
            "IOB_X0Y18": "IO_L16P_T2_CSI_B_14"
        },
        "sites": {
            "IOB_X0Y17": "IOB33S",
            "IOB_X0Y18": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 136,
        "pin_functions": {
            "IOB_X0Y19": "IO_L15N_T2_DQS_DOUT_CSO_B_14",
            "IOB_X0Y20": "IO_L15P_T2_DQS_RDWR_B_14"
        },
        "sites": {
            "IOB_X0Y19": "IOB33S",
            "IOB_X0Y20": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 134,
        "pin_functions": {
            "IOB_X0Y21": "IO_L14N_T2_SRCC_14",
            "IOB_X0Y22": "IO_L14P_T2_SRCC_14"
        },
        "sites": {
            "IOB_X0Y21": "IOB33S",
            "IOB_X0Y22": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 132,
        "pin_functions": {
            "IOB_X0Y23": "IO_L13N_T2_MRCC_14",
            "IOB_X0Y24": "IO_L13P_T2_MRCC_14"
        },
        "sites": {
            "IOB_X0Y23": "IOB33S",
            "IOB_X0Y24": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 129,
        "pin_functions": {
            "IOB_X0Y25": "IO_L12N_T1_MRCC_14",
            "IOB_X0Y26": "IO_L12P_T1_MRCC_14"
        },
        "sites": {
            "IOB_X0Y25": "IOB33S",
            "IOB_X0Y26": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 127,
        "pin_functions": {
            "IOB_X0Y27": "IO_L11N_T1_SRCC_14",
            "IOB_X0Y28": "IO_L11P_T1_SRCC_14"
        },
        "sites": {
            "IOB_X0Y27": "IOB33S",
            "IOB_X0Y28": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 125,
        "pin_functions": {
            "IOB_X0Y29": "IO_L10N_T1_D15_14",
            "IOB_X0Y30": "IO_L10P_T1_D14_14"
        },
        "sites": {
            "IOB_X0Y29": "IOB33S",
            "IOB_X0Y30": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 123,
        "pin_functions": {
            "IOB_X0Y31": "IO_L9N_T1_DQS_D13_14",
            "IOB_X0Y32": "IO_L9P_T1_DQS_14"
        },
        "sites": {
            "IOB_X0Y31": "IOB33S",
            "IOB_X0Y32": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 121,
        "pin_functions": {
            "IOB_X0Y33": "IO_L8N_T1_D12_14",
            "IOB_X0Y34": "IO_L8P_T1_D11_14"
        },
        "sites": {
            "IOB_X0Y33": "IOB33S",
            "IOB_X0Y34": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 119,
        "pin_functions": {
            "IOB_X0Y35": "IO_L7N_T1_D10_14",
            "IOB_X0Y36": "IO_L7P_T1_D09_14"
        },
        "sites": {
            "IOB_X0Y35": "IOB33S",
            "IOB_X0Y36": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 117,
        "pin_functions": {
            "IOB_X0Y37": "IO_L6N_T0_D08_VREF_14",
            "IOB_X0Y38": "IO_L6P_T0_FCS_B_14"
        },
        "sites": {
            "IOB_X0Y37": "IOB33S",
            "IOB_X0Y38": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 115,
        "pin_functions": {
            "IOB_X0Y39": "IO_L5N_T0_D07_14",
            "IOB_X0Y40": "IO_L5P_T0_D06_14"
        },
        "sites": {
            "IOB_X0Y39": "IOB33S",
            "IOB_X0Y40": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 113,
        "pin_functions": {
            "IOB_X0Y41": "IO_L4N_T0_D05_14",
            "IOB_X0Y42": "IO_L4P_T0_D04_14"
        },
        "sites": {
            "IOB_X0Y41": "IOB33S",
            "IOB_X0Y42": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 111,
        "pin_functions": {
            "IOB_X0Y43": "IO_L3N_T0_DQS_EMCCLK_14",
            "IOB_X0Y44": "IO_L3P_T0_DQS_PUDC_B_14"
        },
        "sites": {
            "IOB_X0Y43": "IOB33S",
            "IOB_X0Y44": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 109,
        "pin_functions": {
            "IOB_X0Y45": "IO_L2N_T0_D03_14",
            "IOB_X0Y46": "IO_L2P_T0_D02_14"
        },
        "sites": {
            "IOB_X0Y45": "IOB33S",
            "IOB_X0Y46": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 107,
        "pin_functions": {
            "IOB_X0Y47": "IO_L1N_T0_D01_DIN_14",
            "IOB_X0Y48": "IO_L1P_T0_D00_MOSI_14"
        },
        "sites": {
            "IOB_X0Y47": "IOB33S",
            "IOB_X0Y48": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 102,
        "pin_functions": {
            "IOB_X0Y51": "IO_L24N_T3_RS0_15",
            "IOB_X0Y52": "IO_L24P_T3_RS1_15"
        },
        "sites": {
            "IOB_X0Y51": "IOB33S",
            "IOB_X0Y52": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 100,
        "pin_functions": {
            "IOB_X0Y53": "IO_L23N_T3_FWE_B_15",
            "IOB_X0Y54": "IO_L23P_T3_FOE_B_15"
        },
        "sites": {
            "IOB_X0Y53": "IOB33S",
            "IOB_X0Y54": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 98,
        "pin_functions": {
            "IOB_X0Y55": "IO_L22N_T3_A16_15",
            "IOB_X0Y56": "IO_L22P_T3_A17_15"
        },
        "sites": {
            "IOB_X0Y55": "IOB33S",
            "IOB_X0Y56": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 96,
        "pin_functions": {
            "IOB_X0Y57": "IO_L21N_T3_DQS_A18_15",
            "IOB_X0Y58": "IO_L21P_T3_DQS_15"
        },
        "sites": {
            "IOB_X0Y57": "IOB33S",
            "IOB_X0Y58": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 94,
        "pin_functions": {
            "IOB_X0Y59": "IO_L20N_T3_A19_15",
            "IOB_X0Y60": "IO_L20P_T3_A20_15"
        },
        "sites": {
            "IOB_X0Y59": "IOB33S",
            "IOB_X0Y60": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 92,
        "pin_functions": {
            "IOB_X0Y61": "IO_L19N_T3_A21_VREF_15",
            "IOB_X0Y62": "IO_L19P_T3_A22_15"
        },
        "sites": {
            "IOB_X0Y61": "IOB33S",
            "IOB_X0Y62": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 90,
        "pin_functions": {
            "IOB_X0Y63": "IO_L18N_T2_A23_15",
            "IOB_X0Y64": "IO_L18P_T2_A24_15"
        },
        "sites": {
            "IOB_X0Y63": "IOB33S",
            "IOB_X0Y64": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 88,
        "pin_functions": {
            "IOB_X0Y65": "IO_L17N_T2_A25_15",
            "IOB_X0Y66": "IO_L17P_T2_A26_15"
        },
        "sites": {
            "IOB_X0Y65": "IOB33S",
            "IOB_X0Y66": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 86,
        "pin_functions": {
            "IOB_X0Y67": "IO_L16N_T2_A27_15",
            "IOB_X0Y68": "IO_L16P_T2_A28_15"
        },
        "sites": {
            "IOB_X0Y67": "IOB33S",
            "IOB_X0Y68": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 84,
        "pin_functions": {
            "IOB_X0Y69": "IO_L15N_T2_DQS_ADV_B_15",
            "IOB_X0Y70": "IO_L15P_T2_DQS_15"
        },
        "sites": {
            "IOB_X0Y69": "IOB33S",
            "IOB_X0Y70": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 82,
        "pin_functions": {
            "IOB_X0Y71": "IO_L14N_T2_SRCC_15",
            "IOB_X0Y72": "IO_L14P_T2_SRCC_15"
        },
        "sites": {
            "IOB_X0Y71": "IOB33S",
            "IOB_X0Y72": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 80,
        "pin_functions": {
            "IOB_X0Y73": "IO_L13N_T2_MRCC_15",
            "IOB_X0Y74": "IO_L13P_T2_MRCC_15"
        },
        "sites": {
            "IOB_X0Y73": "IOB33S",
            "IOB_X0Y74": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 77,
        "pin_functions": {
            "IOB_X0Y75": "IO_L12N_T1_MRCC_15",
            "IOB_X0Y76": "IO_L12P_T1_MRCC_15"
        },
        "sites": {
            "IOB_X0Y75": "IOB33S",
            "IOB_X0Y76": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 75,
        "pin_functions": {
            "IOB_X0Y77": "IO_L11N_T1_SRCC_15",
            "IOB_X0Y78": "IO_L11P_T1_SRCC_15"
        },
        "sites": {
            "IOB_X0Y77": "IOB33S",
            "IOB_X0Y78": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 73,
        "pin_functions": {
            "IOB_X0Y79": "IO_L10N_T1_AD11N_15",
            "IOB_X0Y80": "IO_L10P_T1_AD11P_15"
        },
        "sites": {
            "IOB_X0Y79": "IOB33S",
            "IOB_X0Y80": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 71,
        "pin_functions": {
            "IOB_X0Y81": "IO_L9N_T1_DQS_AD3N_15",
            "IOB_X0Y82": "IO_L9P_T1_DQS_AD3P_15"
        },
        "sites": {
            "IOB_X0Y81": "IOB33S",
            "IOB_X0Y82": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 69,
        "pin_functions": {
            "IOB_X0Y83": "IO_L8N_T1_AD10N_15",
            "IOB_X0Y84": "IO_L8P_T1_AD10P_15"
        },
        "sites": {
            "IOB_X0Y83": "IOB33S",
            "IOB_X0Y84": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 67,
        "pin_functions": {
            "IOB_X0Y85": "IO_L7N_T1_AD2N_15",
            "IOB_X0Y86": "IO_L7P_T1_AD2P_15"
        },
        "sites": {
            "IOB_X0Y85": "IOB33S",
            "IOB_X0Y86": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 65,
        "pin_functions": {
            "IOB_X0Y87": "IO_L6N_T0_VREF_15",
            "IOB_X0Y88": "IO_L6P_T0_15"
        },
        "sites": {
            "IOB_X0Y87": "IOB33S",
            "IOB_X0Y88": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 63,
        "pin_functions": {
            "IOB_X0Y89": "IO_L5N_T0_AD9N_15",
            "IOB_X0Y90": "IO_L5P_T0_AD9P_15"
        },
        "sites": {
            "IOB_X0Y89": "IOB33S",
            "IOB_X0Y90": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 61,
        "pin_functions": {
            "IOB_X0Y91": "IO_L4N_T0_15",
            "IOB_X0Y92": "IO_L4P_T0_15"
        },
        "sites": {
            "IOB_X0Y91": "IOB33S",
            "IOB_X0Y92": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 59,
        "pin_functions": {
            "IOB_X0Y93": "IO_L3N_T0_DQS_AD1N_15",
            "IOB_X0Y94": "IO_L3P_T0_DQS_AD1P_15"
        },
        "sites": {
            "IOB_X0Y93": "IOB33S",
            "IOB_X0Y94": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 57,
        "pin_functions": {
            "IOB_X0Y95": "IO_L2N_T0_AD8N_15",
            "IOB_X0Y96": "IO_L2P_T0_AD8P_15"
        },
        "sites": {
            "IOB_X0Y95": "IOB33S",
            "IOB_X0Y96": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 55,
        "pin_functions": {
            "IOB_X0Y97": "IO_L1N_T0_AD0N_15",
            "IOB_X0Y98": "IO_L1P_T0_AD0P_15"
        },
        "sites": {
            "IOB_X0Y97": "IOB33S",
            "IOB_X0Y98": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 50,
        "pin_functions": {
            "IOB_X0Y101": "IO_L24N_T3_16",
            "IOB_X0Y102": "IO_L24P_T3_16"
        },
        "sites": {
            "IOB_X0Y101": "IOB33S",
            "IOB_X0Y102": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 48,
        "pin_functions": {
            "IOB_X0Y103": "IO_L23N_T3_16",
            "IOB_X0Y104": "IO_L23P_T3_16"
        },
        "sites": {
            "IOB_X0Y103": "IOB33S",
            "IOB_X0Y104": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 46,
        "pin_functions": {
            "IOB_X0Y105": "IO_L22N_T3_16",
            "IOB_X0Y106": "IO_L22P_T3_16"
        },
        "sites": {
            "IOB_X0Y105": "IOB33S",
            "IOB_X0Y106": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 44,
        "pin_functions": {
            "IOB_X0Y107": "IO_L21N_T3_DQS_16",
            "IOB_X0Y108": "IO_L21P_T3_DQS_16"
        },
        "sites": {
            "IOB_X0Y107": "IOB33S",
            "IOB_X0Y108": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 42,
        "pin_functions": {
            "IOB_X0Y109": "IO_L20N_T3_16",
            "IOB_X0Y110": "IO_L20P_T3_16"
        },
        "sites": {
            "IOB_X0Y109": "IOB33S",
            "IOB_X0Y110": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 40,
        "pin_functions": {
            "IOB_X0Y111": "IO_L19N_T3_VREF_16",
            "IOB_X0Y112": "IO_L19P_T3_16"
        },
        "sites": {
            "IOB_X0Y111": "IOB33S",
            "IOB_X0Y112": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 38,
        "pin_functions": {
            "IOB_X0Y113": "IO_L18N_T2_16",
            "IOB_X0Y114": "IO_L18P_T2_16"
        },
        "sites": {
            "IOB_X0Y113": "IOB33S",
            "IOB_X0Y114": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 36,
        "pin_functions": {
            "IOB_X0Y115": "IO_L17N_T2_16",
            "IOB_X0Y116": "IO_L17P_T2_16"
        },
        "sites": {
            "IOB_X0Y115": "IOB33S",
            "IOB_X0Y116": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 34,
        "pin_functions": {
            "IOB_X0Y117": "IO_L16N_T2_16",
            "IOB_X0Y118": "IO_L16P_T2_16"
        },
        "sites": {
            "IOB_X0Y117": "IOB33S",
            "IOB_X0Y118": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 32,
        "pin_functions": {
            "IOB_X0Y119": "IO_L15N_T2_DQS_16",
            "IOB_X0Y120": "IO_L15P_T2_DQS_16"
        },
        "sites": {
            "IOB_X0Y119": "IOB33S",
            "IOB_X0Y120": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 30,
        "pin_functions": {
            "IOB_X0Y121": "IO_L14N_T2_SRCC_16",
            "IOB_X0Y122": "IO_L14P_T2_SRCC_16"
        },
        "sites": {
            "IOB_X0Y121": "IOB33S",
            "IOB_X0Y122": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 28,
        "pin_functions": {
            "IOB_X0Y123": "IO_L13N_T2_MRCC_16",
            "IOB_X0Y124": "IO_L13P_T2_MRCC_16"
        },
        "sites": {
            "IOB_X0Y123": "IOB33S",
            "IOB_X0Y124": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 25,
        "pin_functions": {
            "IOB_X0Y125": "IO_L12N_T1_MRCC_16",
            "IOB_X0Y126": "IO_L12P_T1_MRCC_16"
        },
        "sites": {
            "IOB_X0Y125": "IOB33S",
            "IOB_X0Y126": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 23,
        "pin_functions": {
            "IOB_X0Y127": "IO_L11N_T1_SRCC_16",
            "IOB_X0Y128": "IO_L11P_T1_SRCC_16"
        },
        "sites": {
            "IOB_X0Y127": "IOB33S",
            "IOB_X0Y128": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 21,
        "pin_functions": {
            "IOB_X0Y129": "IO_L10N_T1_16",
            "IOB_X0Y130": "IO_L10P_T1_16"
        },
        "sites": {
            "IOB_X0Y129": "IOB33S",
            "IOB_X0Y130": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 19,
        "pin_functions": {
            "IOB_X0Y131": "IO_L9N_T1_DQS_16",
            "IOB_X0Y132": "IO_L9P_T1_DQS_16"
        },
        "sites": {
            "IOB_X0Y131": "IOB33S",
            "IOB_X0Y132": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 17,
        "pin_functions": {
            "IOB_X0Y133": "IO_L8N_T1_16",
            "IOB_X0Y134": "IO_L8P_T1_16"
        },
        "sites": {
            "IOB_X0Y133": "IOB33S",
            "IOB_X0Y134": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 15,
        "pin_functions": {
            "IOB_X0Y135": "IO_L7N_T1_16",
            "IOB_X0Y136": "IO_L7P_T1_16"
        },
        "sites": {
            "IOB_X0Y135": "IOB33S",
            "IOB_X0Y136": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 13,
        "pin_functions": {
            "IOB_X0Y137": "IO_L6N_T0_VREF_16",
            "IOB_X0Y138": "IO_L6P_T0_16"
        },
        "sites": {
            "IOB_X0Y137": "IOB33S",
            "IOB_X0Y138": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 11,
        "pin_functions": {
            "IOB_X0Y139": "IO_L5N_T0_16",
            "IOB_X0Y140": "IO_L5P_T0_16"
        },
        "sites": {
            "IOB_X0Y139": "IOB33S",
            "IOB_X0Y140": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 9,
        "pin_functions": {
            "IOB_X0Y141": "IO_L4N_T0_16",
            "IOB_X0Y142": "IO_L4P_T0_16"
        },
        "sites": {
            "IOB_X0Y141": "IOB33S",
            "IOB_X0Y142": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 7,
        "pin_functions": {
            "IOB_X0Y143": "IO_L3N_T0_DQS_16",
            "IOB_X0Y144": "IO_L3P_T0_DQS_16"
        },
        "sites": {
            "IOB_X0Y143": "IOB33S",
            "IOB_X0Y144": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 5,
        "pin_functions": {
            "IOB_X0Y145": "IO_L2N_T0_16",
            "IOB_X0Y146": "IO_L2P_T0_16"
        },
        "sites": {
            "IOB_X0Y145": "IOB33S",
            "IOB_X0Y146": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 3,
        "pin_functions": {
            "IOB_X0Y147": "IO_L1N_T0_16",
            "IOB_X0Y148": "IO_L1P_T0_16"
        },
        "sites": {
            "IOB_X0Y147": "IOB33S",
            "IOB_X0Y148": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOI3_SING_X0Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y0": "IDELAYE2",
            "ILOGIC_X0Y0": "ILOGICE3",
            "OLOGIC_X0Y0": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y49": "IDELAYE2",
            "ILOGIC_X0Y49": "ILOGICE3",
            "OLOGIC_X0Y49": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y50": "IDELAYE2",
            "ILOGIC_X0Y50": "ILOGICE3",
            "OLOGIC_X0Y50": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y99": "IDELAYE2",
            "ILOGIC_X0Y99": "ILOGICE3",
            "OLOGIC_X0Y99": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y100": "IDELAYE2",
            "ILOGIC_X0Y100": "ILOGICE3",
            "OLOGIC_X0Y100": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 1,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y149": "IDELAYE2",
            "ILOGIC_X0Y149": "ILOGICE3",
            "OLOGIC_X0Y149": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_TBYTESRC_X0Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y7": "IDELAYE2",
            "IDELAY_X0Y8": "IDELAYE2",
            "ILOGIC_X0Y7": "ILOGICE3",
            "ILOGIC_X0Y8": "ILOGICE3",
            "OLOGIC_X0Y7": "OLOGICE3",
            "OLOGIC_X0Y8": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y19": "IDELAYE2",
            "IDELAY_X0Y20": "IDELAYE2",
            "ILOGIC_X0Y19": "ILOGICE3",
            "ILOGIC_X0Y20": "ILOGICE3",
            "OLOGIC_X0Y19": "OLOGICE3",
            "OLOGIC_X0Y20": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y31": "IDELAYE2",
            "IDELAY_X0Y32": "IDELAYE2",
            "ILOGIC_X0Y31": "ILOGICE3",
            "ILOGIC_X0Y32": "ILOGICE3",
            "OLOGIC_X0Y31": "OLOGICE3",
            "OLOGIC_X0Y32": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y43": "IDELAYE2",
            "IDELAY_X0Y44": "IDELAYE2",
            "ILOGIC_X0Y43": "ILOGICE3",
            "ILOGIC_X0Y44": "ILOGICE3",
            "OLOGIC_X0Y43": "OLOGICE3",
            "OLOGIC_X0Y44": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 96,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y57": "IDELAYE2",
            "IDELAY_X0Y58": "IDELAYE2",
            "ILOGIC_X0Y57": "ILOGICE3",
            "ILOGIC_X0Y58": "ILOGICE3",
            "OLOGIC_X0Y57": "OLOGICE3",
            "OLOGIC_X0Y58": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 84,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y69": "IDELAYE2",
            "IDELAY_X0Y70": "IDELAYE2",
            "ILOGIC_X0Y69": "ILOGICE3",
            "ILOGIC_X0Y70": "ILOGICE3",
            "OLOGIC_X0Y69": "OLOGICE3",
            "OLOGIC_X0Y70": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 71,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y81": "IDELAYE2",
            "IDELAY_X0Y82": "IDELAYE2",
            "ILOGIC_X0Y81": "ILOGICE3",
            "ILOGIC_X0Y82": "ILOGICE3",
            "OLOGIC_X0Y81": "OLOGICE3",
            "OLOGIC_X0Y82": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 59,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y93": "IDELAYE2",
            "IDELAY_X0Y94": "IDELAYE2",
            "ILOGIC_X0Y93": "ILOGICE3",
            "ILOGIC_X0Y94": "ILOGICE3",
            "OLOGIC_X0Y93": "OLOGICE3",
            "OLOGIC_X0Y94": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 44,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y107": "IDELAYE2",
            "IDELAY_X0Y108": "IDELAYE2",
            "ILOGIC_X0Y107": "ILOGICE3",
            "ILOGIC_X0Y108": "ILOGICE3",
            "OLOGIC_X0Y107": "OLOGICE3",
            "OLOGIC_X0Y108": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 32,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y119": "IDELAYE2",
            "IDELAY_X0Y120": "IDELAYE2",
            "ILOGIC_X0Y119": "ILOGICE3",
            "ILOGIC_X0Y120": "ILOGICE3",
            "OLOGIC_X0Y119": "OLOGICE3",
            "OLOGIC_X0Y120": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y131": "IDELAYE2",
            "IDELAY_X0Y132": "IDELAYE2",
            "ILOGIC_X0Y131": "ILOGICE3",
            "ILOGIC_X0Y132": "ILOGICE3",
            "OLOGIC_X0Y131": "OLOGICE3",
            "OLOGIC_X0Y132": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 7,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y143": "IDELAYE2",
            "IDELAY_X0Y144": "IDELAYE2",
            "ILOGIC_X0Y143": "ILOGICE3",
            "ILOGIC_X0Y144": "ILOGICE3",
            "OLOGIC_X0Y143": "OLOGICE3",
            "OLOGIC_X0Y144": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTETERM_X0Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 142,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y13": "IDELAYE2",
            "IDELAY_X0Y14": "IDELAYE2",
            "ILOGIC_X0Y13": "ILOGICE3",
            "ILOGIC_X0Y14": "ILOGICE3",
            "OLOGIC_X0Y13": "OLOGICE3",
            "OLOGIC_X0Y14": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 117,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y37": "IDELAYE2",
            "IDELAY_X0Y38": "IDELAYE2",
            "ILOGIC_X0Y37": "ILOGICE3",
            "ILOGIC_X0Y38": "ILOGICE3",
            "OLOGIC_X0Y37": "OLOGICE3",
            "OLOGIC_X0Y38": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 90,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y63": "IDELAYE2",
            "IDELAY_X0Y64": "IDELAYE2",
            "ILOGIC_X0Y63": "ILOGICE3",
            "ILOGIC_X0Y64": "ILOGICE3",
            "OLOGIC_X0Y63": "OLOGICE3",
            "OLOGIC_X0Y64": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 65,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y87": "IDELAYE2",
            "IDELAY_X0Y88": "IDELAYE2",
            "ILOGIC_X0Y87": "ILOGICE3",
            "ILOGIC_X0Y88": "ILOGICE3",
            "OLOGIC_X0Y87": "OLOGICE3",
            "OLOGIC_X0Y88": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 38,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y113": "IDELAYE2",
            "IDELAY_X0Y114": "IDELAYE2",
            "ILOGIC_X0Y113": "ILOGICE3",
            "ILOGIC_X0Y114": "ILOGICE3",
            "OLOGIC_X0Y113": "OLOGICE3",
            "OLOGIC_X0Y114": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 13,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y137": "IDELAYE2",
            "IDELAY_X0Y138": "IDELAYE2",
            "ILOGIC_X0Y137": "ILOGICE3",
            "ILOGIC_X0Y138": "ILOGICE3",
            "OLOGIC_X0Y137": "OLOGICE3",
            "OLOGIC_X0Y138": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_X0Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 154,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y1": "IDELAYE2",
            "IDELAY_X0Y2": "IDELAYE2",
            "ILOGIC_X0Y1": "ILOGICE3",
            "ILOGIC_X0Y2": "ILOGICE3",
            "OLOGIC_X0Y1": "OLOGICE3",
            "OLOGIC_X0Y2": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 152,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y3": "IDELAYE2",
            "IDELAY_X0Y4": "IDELAYE2",
            "ILOGIC_X0Y3": "ILOGICE3",
            "ILOGIC_X0Y4": "ILOGICE3",
            "OLOGIC_X0Y3": "OLOGICE3",
            "OLOGIC_X0Y4": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y5": "IDELAYE2",
            "IDELAY_X0Y6": "IDELAYE2",
            "ILOGIC_X0Y5": "ILOGICE3",
            "ILOGIC_X0Y6": "ILOGICE3",
            "OLOGIC_X0Y5": "OLOGICE3",
            "OLOGIC_X0Y6": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 146,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y9": "IDELAYE2",
            "IDELAY_X0Y10": "IDELAYE2",
            "ILOGIC_X0Y9": "ILOGICE3",
            "ILOGIC_X0Y10": "ILOGICE3",
            "OLOGIC_X0Y9": "OLOGICE3",
            "OLOGIC_X0Y10": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 144,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y11": "IDELAYE2",
            "IDELAY_X0Y12": "IDELAYE2",
            "ILOGIC_X0Y11": "ILOGICE3",
            "ILOGIC_X0Y12": "ILOGICE3",
            "OLOGIC_X0Y11": "OLOGICE3",
            "OLOGIC_X0Y12": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y15": "IDELAYE2",
            "IDELAY_X0Y16": "IDELAYE2",
            "ILOGIC_X0Y15": "ILOGICE3",
            "ILOGIC_X0Y16": "ILOGICE3",
            "OLOGIC_X0Y15": "OLOGICE3",
            "OLOGIC_X0Y16": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y17": "IDELAYE2",
            "IDELAY_X0Y18": "IDELAYE2",
            "ILOGIC_X0Y17": "ILOGICE3",
            "ILOGIC_X0Y18": "ILOGICE3",
            "OLOGIC_X0Y17": "OLOGICE3",
            "OLOGIC_X0Y18": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 134,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y21": "IDELAYE2",
            "IDELAY_X0Y22": "IDELAYE2",
            "ILOGIC_X0Y21": "ILOGICE3",
            "ILOGIC_X0Y22": "ILOGICE3",
            "OLOGIC_X0Y21": "OLOGICE3",
            "OLOGIC_X0Y22": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 132,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y23": "IDELAYE2",
            "IDELAY_X0Y24": "IDELAYE2",
            "ILOGIC_X0Y23": "ILOGICE3",
            "ILOGIC_X0Y24": "ILOGICE3",
            "OLOGIC_X0Y23": "OLOGICE3",
            "OLOGIC_X0Y24": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y25": "IDELAYE2",
            "IDELAY_X0Y26": "IDELAYE2",
            "ILOGIC_X0Y25": "ILOGICE3",
            "ILOGIC_X0Y26": "ILOGICE3",
            "OLOGIC_X0Y25": "OLOGICE3",
            "OLOGIC_X0Y26": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 127,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y27": "IDELAYE2",
            "IDELAY_X0Y28": "IDELAYE2",
            "ILOGIC_X0Y27": "ILOGICE3",
            "ILOGIC_X0Y28": "ILOGICE3",
            "OLOGIC_X0Y27": "OLOGICE3",
            "OLOGIC_X0Y28": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 125,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y29": "IDELAYE2",
            "IDELAY_X0Y30": "IDELAYE2",
            "ILOGIC_X0Y29": "ILOGICE3",
            "ILOGIC_X0Y30": "ILOGICE3",
            "OLOGIC_X0Y29": "OLOGICE3",
            "OLOGIC_X0Y30": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 121,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y33": "IDELAYE2",
            "IDELAY_X0Y34": "IDELAYE2",
            "ILOGIC_X0Y33": "ILOGICE3",
            "ILOGIC_X0Y34": "ILOGICE3",
            "OLOGIC_X0Y33": "OLOGICE3",
            "OLOGIC_X0Y34": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y35": "IDELAYE2",
            "IDELAY_X0Y36": "IDELAYE2",
            "ILOGIC_X0Y35": "ILOGICE3",
            "ILOGIC_X0Y36": "ILOGICE3",
            "OLOGIC_X0Y35": "OLOGICE3",
            "OLOGIC_X0Y36": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 115,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y39": "IDELAYE2",
            "IDELAY_X0Y40": "IDELAYE2",
            "ILOGIC_X0Y39": "ILOGICE3",
            "ILOGIC_X0Y40": "ILOGICE3",
            "OLOGIC_X0Y39": "OLOGICE3",
            "OLOGIC_X0Y40": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 113,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y41": "IDELAYE2",
            "IDELAY_X0Y42": "IDELAYE2",
            "ILOGIC_X0Y41": "ILOGICE3",
            "ILOGIC_X0Y42": "ILOGICE3",
            "OLOGIC_X0Y41": "OLOGICE3",
            "OLOGIC_X0Y42": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y45": "IDELAYE2",
            "IDELAY_X0Y46": "IDELAYE2",
            "ILOGIC_X0Y45": "ILOGICE3",
            "ILOGIC_X0Y46": "ILOGICE3",
            "OLOGIC_X0Y45": "OLOGICE3",
            "OLOGIC_X0Y46": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 107,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y47": "IDELAYE2",
            "IDELAY_X0Y48": "IDELAYE2",
            "ILOGIC_X0Y47": "ILOGICE3",
            "ILOGIC_X0Y48": "ILOGICE3",
            "OLOGIC_X0Y47": "OLOGICE3",
            "OLOGIC_X0Y48": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 102,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y51": "IDELAYE2",
            "IDELAY_X0Y52": "IDELAYE2",
            "ILOGIC_X0Y51": "ILOGICE3",
            "ILOGIC_X0Y52": "ILOGICE3",
            "OLOGIC_X0Y51": "OLOGICE3",
            "OLOGIC_X0Y52": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 100,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y53": "IDELAYE2",
            "IDELAY_X0Y54": "IDELAYE2",
            "ILOGIC_X0Y53": "ILOGICE3",
            "ILOGIC_X0Y54": "ILOGICE3",
            "OLOGIC_X0Y53": "OLOGICE3",
            "OLOGIC_X0Y54": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y55": "IDELAYE2",
            "IDELAY_X0Y56": "IDELAYE2",
            "ILOGIC_X0Y55": "ILOGICE3",
            "ILOGIC_X0Y56": "ILOGICE3",
            "OLOGIC_X0Y55": "OLOGICE3",
            "OLOGIC_X0Y56": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 94,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y59": "IDELAYE2",
            "IDELAY_X0Y60": "IDELAYE2",
            "ILOGIC_X0Y59": "ILOGICE3",
            "ILOGIC_X0Y60": "ILOGICE3",
            "OLOGIC_X0Y59": "OLOGICE3",
            "OLOGIC_X0Y60": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 92,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y61": "IDELAYE2",
            "IDELAY_X0Y62": "IDELAYE2",
            "ILOGIC_X0Y61": "ILOGICE3",
            "ILOGIC_X0Y62": "ILOGICE3",
            "OLOGIC_X0Y61": "OLOGICE3",
            "OLOGIC_X0Y62": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y65": "IDELAYE2",
            "IDELAY_X0Y66": "IDELAYE2",
            "ILOGIC_X0Y65": "ILOGICE3",
            "ILOGIC_X0Y66": "ILOGICE3",
            "OLOGIC_X0Y65": "OLOGICE3",
            "OLOGIC_X0Y66": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 86,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y67": "IDELAYE2",
            "IDELAY_X0Y68": "IDELAYE2",
            "ILOGIC_X0Y67": "ILOGICE3",
            "ILOGIC_X0Y68": "ILOGICE3",
            "OLOGIC_X0Y67": "OLOGICE3",
            "OLOGIC_X0Y68": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 82,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y71": "IDELAYE2",
            "IDELAY_X0Y72": "IDELAYE2",
            "ILOGIC_X0Y71": "ILOGICE3",
            "ILOGIC_X0Y72": "ILOGICE3",
            "OLOGIC_X0Y71": "OLOGICE3",
            "OLOGIC_X0Y72": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 80,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y73": "IDELAYE2",
            "IDELAY_X0Y74": "IDELAYE2",
            "ILOGIC_X0Y73": "ILOGICE3",
            "ILOGIC_X0Y74": "ILOGICE3",
            "OLOGIC_X0Y73": "OLOGICE3",
            "OLOGIC_X0Y74": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y75": "IDELAYE2",
            "IDELAY_X0Y76": "IDELAYE2",
            "ILOGIC_X0Y75": "ILOGICE3",
            "ILOGIC_X0Y76": "ILOGICE3",
            "OLOGIC_X0Y75": "OLOGICE3",
            "OLOGIC_X0Y76": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 75,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y77": "IDELAYE2",
            "IDELAY_X0Y78": "IDELAYE2",
            "ILOGIC_X0Y77": "ILOGICE3",
            "ILOGIC_X0Y78": "ILOGICE3",
            "OLOGIC_X0Y77": "OLOGICE3",
            "OLOGIC_X0Y78": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 59,
                "words": 4
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        },
        "clock_region": "X0Y1",
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            "IDELAY_X0Y79": "IDELAYE2",
            "IDELAY_X0Y80": "IDELAYE2",
            "ILOGIC_X0Y79": "ILOGICE3",
            "ILOGIC_X0Y80": "ILOGICE3",
            "OLOGIC_X0Y79": "OLOGICE3",
            "OLOGIC_X0Y80": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
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                "words": 4
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        },
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        "sites": {
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            "IDELAY_X0Y84": "IDELAYE2",
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            "ILOGIC_X0Y84": "ILOGICE3",
            "OLOGIC_X0Y83": "OLOGICE3",
            "OLOGIC_X0Y84": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
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                "words": 4
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        },
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            "ILOGIC_X0Y86": "ILOGICE3",
            "OLOGIC_X0Y85": "OLOGICE3",
            "OLOGIC_X0Y86": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
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                "words": 4
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        },
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            "ILOGIC_X0Y90": "ILOGICE3",
            "OLOGIC_X0Y89": "OLOGICE3",
            "OLOGIC_X0Y90": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
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        },
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            "ILOGIC_X0Y92": "ILOGICE3",
            "OLOGIC_X0Y91": "OLOGICE3",
            "OLOGIC_X0Y92": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y95": {
        "bits": {
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        },
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            "OLOGIC_X0Y96": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y97": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "OLOGIC_X0Y97": "OLOGICE3",
            "OLOGIC_X0Y98": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y101": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "OLOGIC_X0Y102": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y103": {
        "bits": {
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        },
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            "OLOGIC_X0Y103": "OLOGICE3",
            "OLOGIC_X0Y104": "OLOGICE3"
        },
        "type": "LIOI3"
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    "LIOI3_X0Y105": {
        "bits": {
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        },
        "type": "LIOI3"
    },
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        "bits": {
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        },
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            "OLOGIC_X0Y109": "OLOGICE3",
            "OLOGIC_X0Y110": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y111": {
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        },
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            "OLOGIC_X0Y111": "OLOGICE3",
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        },
        "type": "LIOI3"
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    "LIOI3_X0Y115": {
        "bits": {
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        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y117": {
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        },
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        },
        "type": "LIOI3"
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        },
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        },
        "type": "LIOI3"
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                "words": 4
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        },
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        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y125": {
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                "words": 4
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        },
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        },
        "type": "LIOI3"
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                "words": 4
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        },
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            "OLOGIC_X0Y128": "OLOGICE3"
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        "type": "LIOI3"
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                "words": 4
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        },
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        "type": "LIOI3"
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                "words": 4
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        },
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        "type": "LIOI3"
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                "offset": 71,
                "words": 4
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        },
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        "type": "LIOI3"
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    "LIOI3_X0Y139": {
        "bits": {
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                "offset": 79,
                "words": 4
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        },
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        "type": "LIOI3"
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    "LIOI3_X0Y141": {
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                "offset": 83,
                "words": 4
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        },
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        "type": "LIOI3"
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                "offset": 91,
                "words": 4
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        },
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        "type": "LIOI3"
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    "LIOI3_X0Y147": {
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                "offset": 95,
                "words": 4
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        },
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            "OLOGIC_X0Y147": "OLOGICE3",
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        "type": "LIOI3"
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        "bits": {},
        "grid_x": 2,
        "grid_y": 155,
        "pin_functions": {},
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        "type": "L_TERM_INT"
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        "bits": {},
        "grid_x": 2,
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        "pin_functions": {},
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        "type": "L_TERM_INT"
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        "bits": {},
        "grid_x": 2,
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        "pin_functions": {},
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        "type": "L_TERM_INT"
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        "bits": {},
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        "pin_functions": {},
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        "type": "L_TERM_INT"
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        "bits": {},
        "grid_x": 2,
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        "pin_functions": {},
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        "type": "L_TERM_INT"
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        "bits": {},
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        "pin_functions": {},
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        "type": "L_TERM_INT"
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        "bits": {},
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        "pin_functions": {},
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        "type": "L_TERM_INT"
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        "bits": {},
        "grid_x": 2,
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        "pin_functions": {},
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        "type": "L_TERM_INT"
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        "type": "L_TERM_INT"
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        "type": "L_TERM_INT"
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        "pin_functions": {},
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        "type": "L_TERM_INT"
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        "bits": {},
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        "pin_functions": {},
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        "type": "L_TERM_INT"
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        "type": "L_TERM_INT"
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        "bits": {},
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        "type": "L_TERM_INT"
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        "bits": {},
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        "pin_functions": {},
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        "type": "L_TERM_INT"
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        "pin_functions": {},
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        "type": "L_TERM_INT"
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        "type": "L_TERM_INT"
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        "type": "L_TERM_INT"
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        "bits": {},
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        "type": "L_TERM_INT"
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        "type": "L_TERM_INT"
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        "pin_functions": {},
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        "type": "L_TERM_INT"
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    "RIOB33_SING_X43Y50": {
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    "RIOB33_X43Y11": {
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    "RIOB33_X43Y13": {
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        "type": "RIOB33"
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    "RIOB33_X43Y15": {
        "bits": {
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                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 114,
        "grid_y": 140,
        "pin_functions": {
            "IOB_X1Y15": "IO_L17N_T2_34",
            "IOB_X1Y16": "IO_L17P_T2_34"
        },
        "sites": {
            "IOB_X1Y15": "IOB33S",
            "IOB_X1Y16": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 114,
        "grid_y": 138,
        "pin_functions": {
            "IOB_X1Y17": "IO_L16N_T2_34",
            "IOB_X1Y18": "IO_L16P_T2_34"
        },
        "sites": {
            "IOB_X1Y17": "IOB33S",
            "IOB_X1Y18": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 114,
        "grid_y": 136,
        "pin_functions": {
            "IOB_X1Y19": "IO_L15N_T2_DQS_34",
            "IOB_X1Y20": "IO_L15P_T2_DQS_34"
        },
        "sites": {
            "IOB_X1Y19": "IOB33S",
            "IOB_X1Y20": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 114,
        "grid_y": 134,
        "pin_functions": {
            "IOB_X1Y21": "IO_L14N_T2_SRCC_34",
            "IOB_X1Y22": "IO_L14P_T2_SRCC_34"
        },
        "sites": {
            "IOB_X1Y21": "IOB33S",
            "IOB_X1Y22": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 114,
        "grid_y": 132,
        "pin_functions": {
            "IOB_X1Y23": "IO_L13N_T2_MRCC_34",
            "IOB_X1Y24": "IO_L13P_T2_MRCC_34"
        },
        "sites": {
            "IOB_X1Y23": "IOB33S",
            "IOB_X1Y24": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 114,
        "grid_y": 129,
        "pin_functions": {
            "IOB_X1Y25": "IO_L12N_T1_MRCC_34",
            "IOB_X1Y26": "IO_L12P_T1_MRCC_34"
        },
        "sites": {
            "IOB_X1Y25": "IOB33S",
            "IOB_X1Y26": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 114,
        "grid_y": 127,
        "pin_functions": {
            "IOB_X1Y27": "IO_L11N_T1_SRCC_34",
            "IOB_X1Y28": "IO_L11P_T1_SRCC_34"
        },
        "sites": {
            "IOB_X1Y27": "IOB33S",
            "IOB_X1Y28": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 114,
        "grid_y": 125,
        "pin_functions": {
            "IOB_X1Y29": "IO_L10N_T1_34",
            "IOB_X1Y30": "IO_L10P_T1_34"
        },
        "sites": {
            "IOB_X1Y29": "IOB33S",
            "IOB_X1Y30": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 114,
        "grid_y": 123,
        "pin_functions": {
            "IOB_X1Y31": "IO_L9N_T1_DQS_34",
            "IOB_X1Y32": "IO_L9P_T1_DQS_34"
        },
        "sites": {
            "IOB_X1Y31": "IOB33S",
            "IOB_X1Y32": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 114,
        "grid_y": 121,
        "pin_functions": {
            "IOB_X1Y33": "IO_L8N_T1_34",
            "IOB_X1Y34": "IO_L8P_T1_34"
        },
        "sites": {
            "IOB_X1Y33": "IOB33S",
            "IOB_X1Y34": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 114,
        "grid_y": 119,
        "pin_functions": {
            "IOB_X1Y35": "IO_L7N_T1_34",
            "IOB_X1Y36": "IO_L7P_T1_34"
        },
        "sites": {
            "IOB_X1Y35": "IOB33S",
            "IOB_X1Y36": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 114,
        "grid_y": 117,
        "pin_functions": {
            "IOB_X1Y37": "IO_L6N_T0_VREF_34",
            "IOB_X1Y38": "IO_L6P_T0_34"
        },
        "sites": {
            "IOB_X1Y37": "IOB33S",
            "IOB_X1Y38": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 114,
        "grid_y": 115,
        "pin_functions": {
            "IOB_X1Y39": "IO_L5N_T0_34",
            "IOB_X1Y40": "IO_L5P_T0_34"
        },
        "sites": {
            "IOB_X1Y39": "IOB33S",
            "IOB_X1Y40": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 114,
        "grid_y": 113,
        "pin_functions": {
            "IOB_X1Y41": "IO_L4N_T0_34",
            "IOB_X1Y42": "IO_L4P_T0_34"
        },
        "sites": {
            "IOB_X1Y41": "IOB33S",
            "IOB_X1Y42": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 114,
        "grid_y": 111,
        "pin_functions": {
            "IOB_X1Y43": "IO_L3N_T0_DQS_34",
            "IOB_X1Y44": "IO_L3P_T0_DQS_34"
        },
        "sites": {
            "IOB_X1Y43": "IOB33S",
            "IOB_X1Y44": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 114,
        "grid_y": 109,
        "pin_functions": {
            "IOB_X1Y45": "IO_L2N_T0_34",
            "IOB_X1Y46": "IO_L2P_T0_34"
        },
        "sites": {
            "IOB_X1Y45": "IOB33S",
            "IOB_X1Y46": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 114,
        "grid_y": 107,
        "pin_functions": {
            "IOB_X1Y47": "IO_L1N_T0_34",
            "IOB_X1Y48": "IO_L1P_T0_34"
        },
        "sites": {
            "IOB_X1Y47": "IOB33S",
            "IOB_X1Y48": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 102,
        "pin_functions": {
            "IOB_X1Y51": "IO_L24N_T3_35",
            "IOB_X1Y52": "IO_L24P_T3_35"
        },
        "sites": {
            "IOB_X1Y51": "IOB33S",
            "IOB_X1Y52": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 100,
        "pin_functions": {
            "IOB_X1Y53": "IO_L23N_T3_35",
            "IOB_X1Y54": "IO_L23P_T3_35"
        },
        "sites": {
            "IOB_X1Y53": "IOB33S",
            "IOB_X1Y54": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 98,
        "pin_functions": {
            "IOB_X1Y55": "IO_L22N_T3_35",
            "IOB_X1Y56": "IO_L22P_T3_35"
        },
        "sites": {
            "IOB_X1Y55": "IOB33S",
            "IOB_X1Y56": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 96,
        "pin_functions": {
            "IOB_X1Y57": "IO_L21N_T3_DQS_35",
            "IOB_X1Y58": "IO_L21P_T3_DQS_35"
        },
        "sites": {
            "IOB_X1Y57": "IOB33S",
            "IOB_X1Y58": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 94,
        "pin_functions": {
            "IOB_X1Y59": "IO_L20N_T3_35",
            "IOB_X1Y60": "IO_L20P_T3_35"
        },
        "sites": {
            "IOB_X1Y59": "IOB33S",
            "IOB_X1Y60": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 92,
        "pin_functions": {
            "IOB_X1Y61": "IO_L19N_T3_VREF_35",
            "IOB_X1Y62": "IO_L19P_T3_35"
        },
        "sites": {
            "IOB_X1Y61": "IOB33S",
            "IOB_X1Y62": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 90,
        "pin_functions": {
            "IOB_X1Y63": "IO_L18N_T2_35",
            "IOB_X1Y64": "IO_L18P_T2_35"
        },
        "sites": {
            "IOB_X1Y63": "IOB33S",
            "IOB_X1Y64": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 88,
        "pin_functions": {
            "IOB_X1Y65": "IO_L17N_T2_35",
            "IOB_X1Y66": "IO_L17P_T2_35"
        },
        "sites": {
            "IOB_X1Y65": "IOB33S",
            "IOB_X1Y66": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 86,
        "pin_functions": {
            "IOB_X1Y67": "IO_L16N_T2_35",
            "IOB_X1Y68": "IO_L16P_T2_35"
        },
        "sites": {
            "IOB_X1Y67": "IOB33S",
            "IOB_X1Y68": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 84,
        "pin_functions": {
            "IOB_X1Y69": "IO_L15N_T2_DQS_35",
            "IOB_X1Y70": "IO_L15P_T2_DQS_35"
        },
        "sites": {
            "IOB_X1Y69": "IOB33S",
            "IOB_X1Y70": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 82,
        "pin_functions": {
            "IOB_X1Y71": "IO_L14N_T2_SRCC_35",
            "IOB_X1Y72": "IO_L14P_T2_SRCC_35"
        },
        "sites": {
            "IOB_X1Y71": "IOB33S",
            "IOB_X1Y72": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 80,
        "pin_functions": {
            "IOB_X1Y73": "IO_L13N_T2_MRCC_35",
            "IOB_X1Y74": "IO_L13P_T2_MRCC_35"
        },
        "sites": {
            "IOB_X1Y73": "IOB33S",
            "IOB_X1Y74": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 77,
        "pin_functions": {
            "IOB_X1Y75": "IO_L12N_T1_MRCC_35",
            "IOB_X1Y76": "IO_L12P_T1_MRCC_35"
        },
        "sites": {
            "IOB_X1Y75": "IOB33S",
            "IOB_X1Y76": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 75,
        "pin_functions": {
            "IOB_X1Y77": "IO_L11N_T1_SRCC_35",
            "IOB_X1Y78": "IO_L11P_T1_SRCC_35"
        },
        "sites": {
            "IOB_X1Y77": "IOB33S",
            "IOB_X1Y78": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 73,
        "pin_functions": {
            "IOB_X1Y79": "IO_L10N_T1_AD15N_35",
            "IOB_X1Y80": "IO_L10P_T1_AD15P_35"
        },
        "sites": {
            "IOB_X1Y79": "IOB33S",
            "IOB_X1Y80": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 71,
        "pin_functions": {
            "IOB_X1Y81": "IO_L9N_T1_DQS_AD7N_35",
            "IOB_X1Y82": "IO_L9P_T1_DQS_AD7P_35"
        },
        "sites": {
            "IOB_X1Y81": "IOB33S",
            "IOB_X1Y82": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 69,
        "pin_functions": {
            "IOB_X1Y83": "IO_L8N_T1_AD14N_35",
            "IOB_X1Y84": "IO_L8P_T1_AD14P_35"
        },
        "sites": {
            "IOB_X1Y83": "IOB33S",
            "IOB_X1Y84": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 67,
        "pin_functions": {
            "IOB_X1Y85": "IO_L7N_T1_AD6N_35",
            "IOB_X1Y86": "IO_L7P_T1_AD6P_35"
        },
        "sites": {
            "IOB_X1Y85": "IOB33S",
            "IOB_X1Y86": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 65,
        "pin_functions": {
            "IOB_X1Y87": "IO_L6N_T0_VREF_35",
            "IOB_X1Y88": "IO_L6P_T0_35"
        },
        "sites": {
            "IOB_X1Y87": "IOB33S",
            "IOB_X1Y88": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 63,
        "pin_functions": {
            "IOB_X1Y89": "IO_L5N_T0_AD13N_35",
            "IOB_X1Y90": "IO_L5P_T0_AD13P_35"
        },
        "sites": {
            "IOB_X1Y89": "IOB33S",
            "IOB_X1Y90": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 61,
        "pin_functions": {
            "IOB_X1Y91": "IO_L4N_T0_35",
            "IOB_X1Y92": "IO_L4P_T0_35"
        },
        "sites": {
            "IOB_X1Y91": "IOB33S",
            "IOB_X1Y92": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 59,
        "pin_functions": {
            "IOB_X1Y93": "IO_L3N_T0_DQS_AD5N_35",
            "IOB_X1Y94": "IO_L3P_T0_DQS_AD5P_35"
        },
        "sites": {
            "IOB_X1Y93": "IOB33S",
            "IOB_X1Y94": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 57,
        "pin_functions": {
            "IOB_X1Y95": "IO_L2N_T0_AD12N_35",
            "IOB_X1Y96": "IO_L2P_T0_AD12P_35"
        },
        "sites": {
            "IOB_X1Y95": "IOB33S",
            "IOB_X1Y96": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X43Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 114,
        "grid_y": 55,
        "pin_functions": {
            "IOB_X1Y97": "IO_L1N_T0_AD4N_35",
            "IOB_X1Y98": "IO_L1P_T0_AD4P_35"
        },
        "sites": {
            "IOB_X1Y97": "IOB33S",
            "IOB_X1Y98": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOI3_SING_X43Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 113,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y0": "IDELAYE2",
            "ILOGIC_X1Y0": "ILOGICE3",
            "OLOGIC_X1Y0": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X43Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 113,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y49": "IDELAYE2",
            "ILOGIC_X1Y49": "ILOGICE3",
            "OLOGIC_X1Y49": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X43Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 113,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y50": "IDELAYE2",
            "ILOGIC_X1Y50": "ILOGICE3",
            "OLOGIC_X1Y50": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X43Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 113,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y99": "IDELAYE2",
            "ILOGIC_X1Y99": "ILOGICE3",
            "OLOGIC_X1Y99": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_TBYTESRC_X43Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 113,
        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y7": "IDELAYE2",
            "IDELAY_X1Y8": "IDELAYE2",
            "ILOGIC_X1Y7": "ILOGICE3",
            "ILOGIC_X1Y8": "ILOGICE3",
            "OLOGIC_X1Y7": "OLOGICE3",
            "OLOGIC_X1Y8": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X43Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 113,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y19": "IDELAYE2",
            "IDELAY_X1Y20": "IDELAYE2",
            "ILOGIC_X1Y19": "ILOGICE3",
            "ILOGIC_X1Y20": "ILOGICE3",
            "OLOGIC_X1Y19": "OLOGICE3",
            "OLOGIC_X1Y20": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X43Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 113,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y31": "IDELAYE2",
            "IDELAY_X1Y32": "IDELAYE2",
            "ILOGIC_X1Y31": "ILOGICE3",
            "ILOGIC_X1Y32": "ILOGICE3",
            "OLOGIC_X1Y31": "OLOGICE3",
            "OLOGIC_X1Y32": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X43Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 113,
        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y43": "IDELAYE2",
            "IDELAY_X1Y44": "IDELAYE2",
            "ILOGIC_X1Y43": "ILOGICE3",
            "ILOGIC_X1Y44": "ILOGICE3",
            "OLOGIC_X1Y43": "OLOGICE3",
            "OLOGIC_X1Y44": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X43Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 113,
        "grid_y": 96,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y57": "IDELAYE2",
            "IDELAY_X1Y58": "IDELAYE2",
            "ILOGIC_X1Y57": "ILOGICE3",
            "ILOGIC_X1Y58": "ILOGICE3",
            "OLOGIC_X1Y57": "OLOGICE3",
            "OLOGIC_X1Y58": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X43Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 113,
        "grid_y": 84,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y69": "IDELAYE2",
            "IDELAY_X1Y70": "IDELAYE2",
            "ILOGIC_X1Y69": "ILOGICE3",
            "ILOGIC_X1Y70": "ILOGICE3",
            "OLOGIC_X1Y69": "OLOGICE3",
            "OLOGIC_X1Y70": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X43Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 113,
        "grid_y": 71,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y81": "IDELAYE2",
            "IDELAY_X1Y82": "IDELAYE2",
            "ILOGIC_X1Y81": "ILOGICE3",
            "ILOGIC_X1Y82": "ILOGICE3",
            "OLOGIC_X1Y81": "OLOGICE3",
            "OLOGIC_X1Y82": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X43Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 113,
        "grid_y": 59,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y93": "IDELAYE2",
            "IDELAY_X1Y94": "IDELAYE2",
            "ILOGIC_X1Y93": "ILOGICE3",
            "ILOGIC_X1Y94": "ILOGICE3",
            "OLOGIC_X1Y93": "OLOGICE3",
            "OLOGIC_X1Y94": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTETERM_X43Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 113,
        "grid_y": 142,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y13": "IDELAYE2",
            "IDELAY_X1Y14": "IDELAYE2",
            "ILOGIC_X1Y13": "ILOGICE3",
            "ILOGIC_X1Y14": "ILOGICE3",
            "OLOGIC_X1Y13": "OLOGICE3",
            "OLOGIC_X1Y14": "OLOGICE3"
        },
        "type": "RIOI3_TBYTETERM"
    },
    "RIOI3_TBYTETERM_X43Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 113,
        "grid_y": 117,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y37": "IDELAYE2",
            "IDELAY_X1Y38": "IDELAYE2",
            "ILOGIC_X1Y37": "ILOGICE3",
            "ILOGIC_X1Y38": "ILOGICE3",
            "OLOGIC_X1Y37": "OLOGICE3",
            "OLOGIC_X1Y38": "OLOGICE3"
        },
        "type": "RIOI3_TBYTETERM"
    },
    "RIOI3_TBYTETERM_X43Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 113,
        "grid_y": 90,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y63": "IDELAYE2",
            "IDELAY_X1Y64": "IDELAYE2",
            "ILOGIC_X1Y63": "ILOGICE3",
            "ILOGIC_X1Y64": "ILOGICE3",
            "OLOGIC_X1Y63": "OLOGICE3",
            "OLOGIC_X1Y64": "OLOGICE3"
        },
        "type": "RIOI3_TBYTETERM"
    },
    "RIOI3_TBYTETERM_X43Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 113,
        "grid_y": 65,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y87": "IDELAYE2",
            "IDELAY_X1Y88": "IDELAYE2",
            "ILOGIC_X1Y87": "ILOGICE3",
            "ILOGIC_X1Y88": "ILOGICE3",
            "OLOGIC_X1Y87": "OLOGICE3",
            "OLOGIC_X1Y88": "OLOGICE3"
        },
        "type": "RIOI3_TBYTETERM"
    },
    "RIOI3_X43Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 113,
        "grid_y": 154,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y1": "IDELAYE2",
            "IDELAY_X1Y2": "IDELAYE2",
            "ILOGIC_X1Y1": "ILOGICE3",
            "ILOGIC_X1Y2": "ILOGICE3",
            "OLOGIC_X1Y1": "OLOGICE3",
            "OLOGIC_X1Y2": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X43Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 113,
        "grid_y": 152,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y3": "IDELAYE2",
            "IDELAY_X1Y4": "IDELAYE2",
            "ILOGIC_X1Y3": "ILOGICE3",
            "ILOGIC_X1Y4": "ILOGICE3",
            "OLOGIC_X1Y3": "OLOGICE3",
            "OLOGIC_X1Y4": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X43Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 113,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y5": "IDELAYE2",
            "IDELAY_X1Y6": "IDELAYE2",
            "ILOGIC_X1Y5": "ILOGICE3",
            "ILOGIC_X1Y6": "ILOGICE3",
            "OLOGIC_X1Y5": "OLOGICE3",
            "OLOGIC_X1Y6": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X43Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 113,
        "grid_y": 146,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y9": "IDELAYE2",
            "IDELAY_X1Y10": "IDELAYE2",
            "ILOGIC_X1Y9": "ILOGICE3",
            "ILOGIC_X1Y10": "ILOGICE3",
            "OLOGIC_X1Y9": "OLOGICE3",
            "OLOGIC_X1Y10": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X43Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 113,
        "grid_y": 144,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y11": "IDELAYE2",
            "IDELAY_X1Y12": "IDELAYE2",
            "ILOGIC_X1Y11": "ILOGICE3",
            "ILOGIC_X1Y12": "ILOGICE3",
            "OLOGIC_X1Y11": "OLOGICE3",
            "OLOGIC_X1Y12": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X43Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 113,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y15": "IDELAYE2",
            "IDELAY_X1Y16": "IDELAYE2",
            "ILOGIC_X1Y15": "ILOGICE3",
            "ILOGIC_X1Y16": "ILOGICE3",
            "OLOGIC_X1Y15": "OLOGICE3",
            "OLOGIC_X1Y16": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X43Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 113,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y17": "IDELAYE2",
            "IDELAY_X1Y18": "IDELAYE2",
            "ILOGIC_X1Y17": "ILOGICE3",
            "ILOGIC_X1Y18": "ILOGICE3",
            "OLOGIC_X1Y17": "OLOGICE3",
            "OLOGIC_X1Y18": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X43Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 113,
        "grid_y": 134,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y21": "IDELAYE2",
            "IDELAY_X1Y22": "IDELAYE2",
            "ILOGIC_X1Y21": "ILOGICE3",
            "ILOGIC_X1Y22": "ILOGICE3",
            "OLOGIC_X1Y21": "OLOGICE3",
            "OLOGIC_X1Y22": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X43Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 113,
        "grid_y": 132,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y23": "IDELAYE2",
            "IDELAY_X1Y24": "IDELAYE2",
            "ILOGIC_X1Y23": "ILOGICE3",
            "ILOGIC_X1Y24": "ILOGICE3",
            "OLOGIC_X1Y23": "OLOGICE3",
            "OLOGIC_X1Y24": "OLOGICE3"
        },
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