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        "type": "BRAM_L"
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        "type": "BRAM_L"
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        "sites": {
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            "RAMB18_X2Y29": "RAMB18E1",
            "RAMB36_X2Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X22Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 59,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y30": "FIFO18E1",
            "RAMB18_X2Y31": "RAMB18E1",
            "RAMB36_X2Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X22Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 59,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y32": "FIFO18E1",
            "RAMB18_X2Y33": "RAMB18E1",
            "RAMB36_X2Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X22Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 59,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y34": "FIFO18E1",
            "RAMB18_X2Y35": "RAMB18E1",
            "RAMB36_X2Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X22Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 59,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y36": "FIFO18E1",
            "RAMB18_X2Y37": "RAMB18E1",
            "RAMB36_X2Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X22Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400B00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 59,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y38": "FIFO18E1",
            "RAMB18_X2Y39": "RAMB18E1",
            "RAMB36_X2Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X22Y100": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 59,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y40": "FIFO18E1",
            "RAMB18_X2Y41": "RAMB18E1",
            "RAMB36_X2Y20": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X22Y105": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 59,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y42": "FIFO18E1",
            "RAMB18_X2Y43": "RAMB18E1",
            "RAMB36_X2Y21": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X22Y110": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 59,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y44": "FIFO18E1",
            "RAMB18_X2Y45": "RAMB18E1",
            "RAMB36_X2Y22": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X22Y115": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 59,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y46": "FIFO18E1",
            "RAMB18_X2Y47": "RAMB18E1",
            "RAMB36_X2Y23": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X22Y120": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 59,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y48": "FIFO18E1",
            "RAMB18_X2Y49": "RAMB18E1",
            "RAMB36_X2Y24": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X22Y125": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 59,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y50": "FIFO18E1",
            "RAMB18_X2Y51": "RAMB18E1",
            "RAMB36_X2Y25": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X22Y130": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 59,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y52": "FIFO18E1",
            "RAMB18_X2Y53": "RAMB18E1",
            "RAMB36_X2Y26": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X22Y135": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 59,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y54": "FIFO18E1",
            "RAMB18_X2Y55": "RAMB18E1",
            "RAMB36_X2Y27": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X22Y140": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 59,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y56": "FIFO18E1",
            "RAMB18_X2Y57": "RAMB18E1",
            "RAMB36_X2Y28": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X22Y145": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 59,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y58": "FIFO18E1",
            "RAMB18_X2Y59": "RAMB18E1",
            "RAMB36_X2Y29": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421200",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 93,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y0": "FIFO18E1",
            "RAMB18_X3Y1": "RAMB18E1",
            "RAMB36_X3Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421200",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 93,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y2": "FIFO18E1",
            "RAMB18_X3Y3": "RAMB18E1",
            "RAMB36_X3Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421200",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 93,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y4": "FIFO18E1",
            "RAMB18_X3Y5": "RAMB18E1",
            "RAMB36_X3Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421200",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 93,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y6": "FIFO18E1",
            "RAMB18_X3Y7": "RAMB18E1",
            "RAMB36_X3Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421200",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 93,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y8": "FIFO18E1",
            "RAMB18_X3Y9": "RAMB18E1",
            "RAMB36_X3Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421200",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 93,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y10": "FIFO18E1",
            "RAMB18_X3Y11": "RAMB18E1",
            "RAMB36_X3Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421200",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 93,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y12": "FIFO18E1",
            "RAMB18_X3Y13": "RAMB18E1",
            "RAMB36_X3Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421200",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 93,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y14": "FIFO18E1",
            "RAMB18_X3Y15": "RAMB18E1",
            "RAMB36_X3Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421200",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 93,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y16": "FIFO18E1",
            "RAMB18_X3Y17": "RAMB18E1",
            "RAMB36_X3Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421200",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 93,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y18": "FIFO18E1",
            "RAMB18_X3Y19": "RAMB18E1",
            "RAMB36_X3Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 93,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y20": "FIFO18E1",
            "RAMB18_X3Y21": "RAMB18E1",
            "RAMB36_X3Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 93,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y22": "FIFO18E1",
            "RAMB18_X3Y23": "RAMB18E1",
            "RAMB36_X3Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 93,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y24": "FIFO18E1",
            "RAMB18_X3Y25": "RAMB18E1",
            "RAMB36_X3Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 93,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y26": "FIFO18E1",
            "RAMB18_X3Y27": "RAMB18E1",
            "RAMB36_X3Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 93,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y28": "FIFO18E1",
            "RAMB18_X3Y29": "RAMB18E1",
            "RAMB36_X3Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 93,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y30": "FIFO18E1",
            "RAMB18_X3Y31": "RAMB18E1",
            "RAMB36_X3Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 93,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y32": "FIFO18E1",
            "RAMB18_X3Y33": "RAMB18E1",
            "RAMB36_X3Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 93,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y34": "FIFO18E1",
            "RAMB18_X3Y35": "RAMB18E1",
            "RAMB36_X3Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 93,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y36": "FIFO18E1",
            "RAMB18_X3Y37": "RAMB18E1",
            "RAMB36_X3Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 93,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y38": "FIFO18E1",
            "RAMB18_X3Y39": "RAMB18E1",
            "RAMB36_X3Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y100": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 93,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y40": "FIFO18E1",
            "RAMB18_X3Y41": "RAMB18E1",
            "RAMB36_X3Y20": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y105": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 93,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y42": "FIFO18E1",
            "RAMB18_X3Y43": "RAMB18E1",
            "RAMB36_X3Y21": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y110": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 93,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y44": "FIFO18E1",
            "RAMB18_X3Y45": "RAMB18E1",
            "RAMB36_X3Y22": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y115": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 93,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y46": "FIFO18E1",
            "RAMB18_X3Y47": "RAMB18E1",
            "RAMB36_X3Y23": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y120": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 93,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y48": "FIFO18E1",
            "RAMB18_X3Y49": "RAMB18E1",
            "RAMB36_X3Y24": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y125": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 93,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y50": "FIFO18E1",
            "RAMB18_X3Y51": "RAMB18E1",
            "RAMB36_X3Y25": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y130": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 93,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y52": "FIFO18E1",
            "RAMB18_X3Y53": "RAMB18E1",
            "RAMB36_X3Y26": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y135": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 93,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y54": "FIFO18E1",
            "RAMB18_X3Y55": "RAMB18E1",
            "RAMB36_X3Y27": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y140": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 93,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y56": "FIFO18E1",
            "RAMB18_X3Y57": "RAMB18E1",
            "RAMB36_X3Y28": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X36Y145": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 93,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y58": "FIFO18E1",
            "RAMB18_X3Y59": "RAMB18E1",
            "RAMB36_X3Y29": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20200",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421C00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 138,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y0": "FIFO18E1",
            "RAMB18_X4Y1": "RAMB18E1",
            "RAMB36_X4Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20200",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421C00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 138,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y2": "FIFO18E1",
            "RAMB18_X4Y3": "RAMB18E1",
            "RAMB36_X4Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20200",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421C00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 138,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y4": "FIFO18E1",
            "RAMB18_X4Y5": "RAMB18E1",
            "RAMB36_X4Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20200",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421C00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 138,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y6": "FIFO18E1",
            "RAMB18_X4Y7": "RAMB18E1",
            "RAMB36_X4Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20200",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421C00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 138,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y8": "FIFO18E1",
            "RAMB18_X4Y9": "RAMB18E1",
            "RAMB36_X4Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20200",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421C00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 138,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y10": "FIFO18E1",
            "RAMB18_X4Y11": "RAMB18E1",
            "RAMB36_X4Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20200",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421C00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 138,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y12": "FIFO18E1",
            "RAMB18_X4Y13": "RAMB18E1",
            "RAMB36_X4Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20200",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421C00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 138,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y14": "FIFO18E1",
            "RAMB18_X4Y15": "RAMB18E1",
            "RAMB36_X4Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20200",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421C00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 138,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y16": "FIFO18E1",
            "RAMB18_X4Y17": "RAMB18E1",
            "RAMB36_X4Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20200",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421C00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 138,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y18": "FIFO18E1",
            "RAMB18_X4Y19": "RAMB18E1",
            "RAMB36_X4Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401C00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 138,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y20": "FIFO18E1",
            "RAMB18_X4Y21": "RAMB18E1",
            "RAMB36_X4Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401C00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 138,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y22": "FIFO18E1",
            "RAMB18_X4Y23": "RAMB18E1",
            "RAMB36_X4Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401C00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 138,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y24": "FIFO18E1",
            "RAMB18_X4Y25": "RAMB18E1",
            "RAMB36_X4Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401C00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 138,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y26": "FIFO18E1",
            "RAMB18_X4Y27": "RAMB18E1",
            "RAMB36_X4Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401C00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 138,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y28": "FIFO18E1",
            "RAMB18_X4Y29": "RAMB18E1",
            "RAMB36_X4Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401C00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 138,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y30": "FIFO18E1",
            "RAMB18_X4Y31": "RAMB18E1",
            "RAMB36_X4Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401C00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 138,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y32": "FIFO18E1",
            "RAMB18_X4Y33": "RAMB18E1",
            "RAMB36_X4Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401C00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 138,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y34": "FIFO18E1",
            "RAMB18_X4Y35": "RAMB18E1",
            "RAMB36_X4Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401C00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 138,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y36": "FIFO18E1",
            "RAMB18_X4Y37": "RAMB18E1",
            "RAMB36_X4Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401C00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 138,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y38": "FIFO18E1",
            "RAMB18_X4Y39": "RAMB18E1",
            "RAMB36_X4Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y100": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 138,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y40": "FIFO18E1",
            "RAMB18_X4Y41": "RAMB18E1",
            "RAMB36_X4Y20": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y105": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 138,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y42": "FIFO18E1",
            "RAMB18_X4Y43": "RAMB18E1",
            "RAMB36_X4Y21": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y110": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 138,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y44": "FIFO18E1",
            "RAMB18_X4Y45": "RAMB18E1",
            "RAMB36_X4Y22": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y115": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 138,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y46": "FIFO18E1",
            "RAMB18_X4Y47": "RAMB18E1",
            "RAMB36_X4Y23": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y120": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 138,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y48": "FIFO18E1",
            "RAMB18_X4Y49": "RAMB18E1",
            "RAMB36_X4Y24": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y125": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 138,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y50": "FIFO18E1",
            "RAMB18_X4Y51": "RAMB18E1",
            "RAMB36_X4Y25": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y130": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 138,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y52": "FIFO18E1",
            "RAMB18_X4Y53": "RAMB18E1",
            "RAMB36_X4Y26": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y135": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 138,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y54": "FIFO18E1",
            "RAMB18_X4Y55": "RAMB18E1",
            "RAMB36_X4Y27": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y140": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 138,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y56": "FIFO18E1",
            "RAMB18_X4Y57": "RAMB18E1",
            "RAMB36_X4Y28": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X56Y145": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800200",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 138,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y58": "FIFO18E1",
            "RAMB18_X4Y59": "RAMB18E1",
            "RAMB36_X4Y29": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_R_X17Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y0": "FIFO18E1",
            "RAMB18_X1Y1": "RAMB18E1",
            "RAMB36_X1Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y2": "FIFO18E1",
            "RAMB18_X1Y3": "RAMB18E1",
            "RAMB36_X1Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
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                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y4": "FIFO18E1",
            "RAMB18_X1Y5": "RAMB18E1",
            "RAMB36_X1Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
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                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y6": "FIFO18E1",
            "RAMB18_X1Y7": "RAMB18E1",
            "RAMB36_X1Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y8": "FIFO18E1",
            "RAMB18_X1Y9": "RAMB18E1",
            "RAMB36_X1Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y10": "FIFO18E1",
            "RAMB18_X1Y11": "RAMB18E1",
            "RAMB36_X1Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y12": "FIFO18E1",
            "RAMB18_X1Y13": "RAMB18E1",
            "RAMB36_X1Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y14": "FIFO18E1",
            "RAMB18_X1Y15": "RAMB18E1",
            "RAMB36_X1Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y16": "FIFO18E1",
            "RAMB18_X1Y17": "RAMB18E1",
            "RAMB36_X1Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y18": "FIFO18E1",
            "RAMB18_X1Y19": "RAMB18E1",
            "RAMB36_X1Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X67Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20280",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422180",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 167,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y0": "FIFO18E1",
            "RAMB18_X5Y1": "RAMB18E1",
            "RAMB36_X5Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X67Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20280",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422180",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 167,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y2": "FIFO18E1",
            "RAMB18_X5Y3": "RAMB18E1",
            "RAMB36_X5Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X67Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20280",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422180",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 167,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y4": "FIFO18E1",
            "RAMB18_X5Y5": "RAMB18E1",
            "RAMB36_X5Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X67Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20280",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422180",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 167,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y6": "FIFO18E1",
            "RAMB18_X5Y7": "RAMB18E1",
            "RAMB36_X5Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X67Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20280",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422180",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 167,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y8": "FIFO18E1",
            "RAMB18_X5Y9": "RAMB18E1",
            "RAMB36_X5Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X67Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20280",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422180",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 167,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y10": "FIFO18E1",
            "RAMB18_X5Y11": "RAMB18E1",
            "RAMB36_X5Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X67Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20280",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422180",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 167,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y12": "FIFO18E1",
            "RAMB18_X5Y13": "RAMB18E1",
            "RAMB36_X5Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X67Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20280",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422180",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 167,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y14": "FIFO18E1",
            "RAMB18_X5Y15": "RAMB18E1",
            "RAMB36_X5Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X67Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20280",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
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            "BUFHCE_X1Y24": "BUFHCE",
            "BUFHCE_X1Y25": "BUFHCE",
            "BUFHCE_X1Y26": "BUFHCE",
            "BUFHCE_X1Y27": "BUFHCE",
            "BUFHCE_X1Y28": "BUFHCE",
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            "BUFHCE_X1Y30": "BUFHCE",
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        "bits": {},
        "grid_x": 87,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_PMVIOB"
    },
    "CLK_PMV_X87Y2": {
        "bits": {},
        "grid_x": 87,
        "grid_y": 154,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_PMV"
    },
    "CLK_TERM_X87Y0": {
        "bits": {},
        "grid_x": 87,
        "grid_y": 156,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_TERM"
    },
    "CLK_TERM_X87Y156": {
        "bits": {},
        "grid_x": 87,
        "grid_y": 0,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_TERM"
    },
    "CMT_FIFO_L_X179Y8": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 179,
        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y0": "IN_FIFO",
            "OUT_FIFO_X1Y0": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X179Y20": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 179,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y1": "IN_FIFO",
            "OUT_FIFO_X1Y1": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X179Y33": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 179,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y2": "IN_FIFO",
            "OUT_FIFO_X1Y2": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X179Y45": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 179,
        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y3": "IN_FIFO",
            "OUT_FIFO_X1Y3": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X179Y60": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 179,
        "grid_y": 96,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y4": "IN_FIFO",
            "OUT_FIFO_X1Y4": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X179Y72": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 179,
        "grid_y": 84,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y5": "IN_FIFO",
            "OUT_FIFO_X1Y5": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X179Y85": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 179,
        "grid_y": 71,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y6": "IN_FIFO",
            "OUT_FIFO_X1Y6": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X179Y97": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 179,
        "grid_y": 59,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y7": "IN_FIFO",
            "OUT_FIFO_X1Y7": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X179Y112": {
        "bits": {},
        "clock_region": "X1Y2",
        "grid_x": 179,
        "grid_y": 44,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y8": "IN_FIFO",
            "OUT_FIFO_X1Y8": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X179Y124": {
        "bits": {},
        "clock_region": "X1Y2",
        "grid_x": 179,
        "grid_y": 32,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y9": "IN_FIFO",
            "OUT_FIFO_X1Y9": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X179Y137": {
        "bits": {},
        "clock_region": "X1Y2",
        "grid_x": 179,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y10": "IN_FIFO",
            "OUT_FIFO_X1Y10": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X179Y149": {
        "bits": {},
        "clock_region": "X1Y2",
        "grid_x": 179,
        "grid_y": 7,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y11": "IN_FIFO",
            "OUT_FIFO_X1Y11": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_R_X7Y8": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y0": "IN_FIFO",
            "OUT_FIFO_X0Y0": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y20": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y1": "IN_FIFO",
            "OUT_FIFO_X0Y1": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y33": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y2": "IN_FIFO",
            "OUT_FIFO_X0Y2": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y45": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y3": "IN_FIFO",
            "OUT_FIFO_X0Y3": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_PMV_L_X179Y1": {
        "bits": {},
        "grid_x": 179,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X179Y51": {
        "bits": {},
        "grid_x": 179,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X179Y53": {
        "bits": {},
        "grid_x": 179,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X179Y103": {
        "bits": {},
        "grid_x": 179,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X179Y105": {
        "bits": {},
        "grid_x": 179,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X179Y155": {
        "bits": {},
        "grid_x": 179,
        "grid_y": 1,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_X7Y1": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y51": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_TOP_L_LOWER_B_X178Y9": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 178,
        "grid_y": 147,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X1Y0": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_B_X178Y61": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 178,
        "grid_y": 95,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X1Y1": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_B_X178Y113": {
        "bits": {},
        "clock_region": "X1Y2",
        "grid_x": 178,
        "grid_y": 43,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X1Y2": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_T_X178Y18": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 178,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y0": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y1": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y0": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y1": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_LOWER_T_X178Y70": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 178,
        "grid_y": 86,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y4": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y5": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y4": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y5": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_LOWER_T_X178Y122": {
        "bits": {},
        "clock_region": "X1Y2",
        "grid_x": 178,
        "grid_y": 34,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y8": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y9": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y8": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y9": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_UPPER_B_X178Y31": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 178,
        "grid_y": 125,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y2": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y3": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y2": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y3": "PHASER_OUT_PHY",
            "PHASER_REF_X1Y0": "PHASER_REF",
            "PHY_CONTROL_X1Y0": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_B_X178Y83": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 178,
        "grid_y": 73,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y6": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y7": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y6": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y7": "PHASER_OUT_PHY",
            "PHASER_REF_X1Y1": "PHASER_REF",
            "PHY_CONTROL_X1Y1": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_B_X178Y135": {
        "bits": {},
        "clock_region": "X1Y2",
        "grid_x": 178,
        "grid_y": 21,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y10": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y11": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y10": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y11": "PHASER_OUT_PHY",
            "PHASER_REF_X1Y2": "PHASER_REF",
            "PHY_CONTROL_X1Y2": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_T_X178Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422400",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 178,
        "grid_y": 112,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X1Y0": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "CMT_TOP_L_UPPER_T_X178Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402400",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 178,
        "grid_y": 60,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X1Y1": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "CMT_TOP_L_UPPER_T_X178Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002400",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 178,
        "grid_y": 8,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X1Y2": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "CMT_TOP_R_LOWER_B_X8Y9": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 147,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X0Y0": "MMCME2_ADV"
        },
        "type": "CMT_TOP_R_LOWER_B"
    },
    "CMT_TOP_R_LOWER_T_X8Y18": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y0": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y1": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y0": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y1": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_R_LOWER_T"
    },
    "CMT_TOP_R_UPPER_B_X8Y31": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 125,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y2": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y3": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y2": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y3": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y0": "PHASER_REF",
            "PHY_CONTROL_X0Y0": "PHY_CONTROL"
        },
        "type": "CMT_TOP_R_UPPER_B"
    },
    "CMT_TOP_R_UPPER_T_X8Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 112,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X0Y0": "PLLE2_ADV"
        },
        "type": "CMT_TOP_R_UPPER_T"
    },
    "DSP_L_X14Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y0": "DSP48E1",
            "DSP48_X1Y1": "DSP48E1",
            "TIEOFF_X15Y0": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y2": "DSP48E1",
            "DSP48_X1Y3": "DSP48E1",
            "TIEOFF_X15Y5": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y4": "DSP48E1",
            "DSP48_X1Y5": "DSP48E1",
            "TIEOFF_X15Y10": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y6": "DSP48E1",
            "DSP48_X1Y7": "DSP48E1",
            "TIEOFF_X15Y15": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y8": "DSP48E1",
            "DSP48_X1Y9": "DSP48E1",
            "TIEOFF_X15Y20": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y10": "DSP48E1",
            "DSP48_X1Y11": "DSP48E1",
            "TIEOFF_X15Y25": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y12": "DSP48E1",
            "DSP48_X1Y13": "DSP48E1",
            "TIEOFF_X15Y30": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y14": "DSP48E1",
            "DSP48_X1Y15": "DSP48E1",
            "TIEOFF_X15Y35": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y16": "DSP48E1",
            "DSP48_X1Y17": "DSP48E1",
            "TIEOFF_X15Y40": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y18": "DSP48E1",
            "DSP48_X1Y19": "DSP48E1",
            "TIEOFF_X15Y45": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 158,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y0": "DSP48E1",
            "DSP48_X4Y1": "DSP48E1",
            "TIEOFF_X68Y0": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 158,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y2": "DSP48E1",
            "DSP48_X4Y3": "DSP48E1",
            "TIEOFF_X68Y5": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 158,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y4": "DSP48E1",
            "DSP48_X4Y5": "DSP48E1",
            "TIEOFF_X68Y10": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 158,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y6": "DSP48E1",
            "DSP48_X4Y7": "DSP48E1",
            "TIEOFF_X68Y15": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 158,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y8": "DSP48E1",
            "DSP48_X4Y9": "DSP48E1",
            "TIEOFF_X68Y20": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 158,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y10": "DSP48E1",
            "DSP48_X4Y11": "DSP48E1",
            "TIEOFF_X68Y25": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 158,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y12": "DSP48E1",
            "DSP48_X4Y13": "DSP48E1",
            "TIEOFF_X68Y30": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 158,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y14": "DSP48E1",
            "DSP48_X4Y15": "DSP48E1",
            "TIEOFF_X68Y35": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 158,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y16": "DSP48E1",
            "DSP48_X4Y17": "DSP48E1",
            "TIEOFF_X68Y40": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 158,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y18": "DSP48E1",
            "DSP48_X4Y19": "DSP48E1",
            "TIEOFF_X68Y45": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 158,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y20": "DSP48E1",
            "DSP48_X4Y21": "DSP48E1",
            "TIEOFF_X68Y50": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 158,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y22": "DSP48E1",
            "DSP48_X4Y23": "DSP48E1",
            "TIEOFF_X68Y55": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 158,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y24": "DSP48E1",
            "DSP48_X4Y25": "DSP48E1",
            "TIEOFF_X68Y60": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 158,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y26": "DSP48E1",
            "DSP48_X4Y27": "DSP48E1",
            "TIEOFF_X68Y65": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 158,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y28": "DSP48E1",
            "DSP48_X4Y29": "DSP48E1",
            "TIEOFF_X68Y70": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 158,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y30": "DSP48E1",
            "DSP48_X4Y31": "DSP48E1",
            "TIEOFF_X68Y75": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 158,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y32": "DSP48E1",
            "DSP48_X4Y33": "DSP48E1",
            "TIEOFF_X68Y80": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 158,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y34": "DSP48E1",
            "DSP48_X4Y35": "DSP48E1",
            "TIEOFF_X68Y85": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 158,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y36": "DSP48E1",
            "DSP48_X4Y37": "DSP48E1",
            "TIEOFF_X68Y90": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 158,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y38": "DSP48E1",
            "DSP48_X4Y39": "DSP48E1",
            "TIEOFF_X68Y95": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002000",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 158,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y40": "DSP48E1",
            "DSP48_X4Y41": "DSP48E1",
            "TIEOFF_X68Y100": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002000",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 158,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y42": "DSP48E1",
            "DSP48_X4Y43": "DSP48E1",
            "TIEOFF_X68Y105": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002000",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 158,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y44": "DSP48E1",
            "DSP48_X4Y45": "DSP48E1",
            "TIEOFF_X68Y110": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002000",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 158,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y46": "DSP48E1",
            "DSP48_X4Y47": "DSP48E1",
            "TIEOFF_X68Y115": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002000",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 158,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y48": "DSP48E1",
            "DSP48_X4Y49": "DSP48E1",
            "TIEOFF_X68Y120": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002000",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 158,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y50": "DSP48E1",
            "DSP48_X4Y51": "DSP48E1",
            "TIEOFF_X68Y125": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002000",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 158,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y52": "DSP48E1",
            "DSP48_X4Y53": "DSP48E1",
            "TIEOFF_X68Y130": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002000",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 158,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y54": "DSP48E1",
            "DSP48_X4Y55": "DSP48E1",
            "TIEOFF_X68Y135": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002000",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 158,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y56": "DSP48E1",
            "DSP48_X4Y57": "DSP48E1",
            "TIEOFF_X68Y140": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X64Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002000",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 158,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y58": "DSP48E1",
            "DSP48_X4Y59": "DSP48E1",
            "TIEOFF_X68Y145": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_R_X9Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y0": "DSP48E1",
            "DSP48_X0Y1": "DSP48E1",
            "TIEOFF_X10Y0": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y2": "DSP48E1",
            "DSP48_X0Y3": "DSP48E1",
            "TIEOFF_X10Y5": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y4": "DSP48E1",
            "DSP48_X0Y5": "DSP48E1",
            "TIEOFF_X10Y10": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y6": "DSP48E1",
            "DSP48_X0Y7": "DSP48E1",
            "TIEOFF_X10Y15": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y8": "DSP48E1",
            "DSP48_X0Y9": "DSP48E1",
            "TIEOFF_X10Y20": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y10": "DSP48E1",
            "DSP48_X0Y11": "DSP48E1",
            "TIEOFF_X10Y25": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y12": "DSP48E1",
            "DSP48_X0Y13": "DSP48E1",
            "TIEOFF_X10Y30": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y14": "DSP48E1",
            "DSP48_X0Y15": "DSP48E1",
            "TIEOFF_X10Y35": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y16": "DSP48E1",
            "DSP48_X0Y17": "DSP48E1",
            "TIEOFF_X10Y40": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y18": "DSP48E1",
            "DSP48_X0Y19": "DSP48E1",
            "TIEOFF_X10Y45": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C80",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 68,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y0": "DSP48E1",
            "DSP48_X2Y1": "DSP48E1",
            "TIEOFF_X28Y0": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C80",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 68,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y2": "DSP48E1",
            "DSP48_X2Y3": "DSP48E1",
            "TIEOFF_X28Y5": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C80",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 68,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y4": "DSP48E1",
            "DSP48_X2Y5": "DSP48E1",
            "TIEOFF_X28Y10": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C80",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 68,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y6": "DSP48E1",
            "DSP48_X2Y7": "DSP48E1",
            "TIEOFF_X28Y15": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C80",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 68,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y8": "DSP48E1",
            "DSP48_X2Y9": "DSP48E1",
            "TIEOFF_X28Y20": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C80",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 68,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y10": "DSP48E1",
            "DSP48_X2Y11": "DSP48E1",
            "TIEOFF_X28Y25": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C80",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 68,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y12": "DSP48E1",
            "DSP48_X2Y13": "DSP48E1",
            "TIEOFF_X28Y30": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C80",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 68,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y14": "DSP48E1",
            "DSP48_X2Y15": "DSP48E1",
            "TIEOFF_X28Y35": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C80",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 68,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y16": "DSP48E1",
            "DSP48_X2Y17": "DSP48E1",
            "TIEOFF_X28Y40": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C80",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 68,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y18": "DSP48E1",
            "DSP48_X2Y19": "DSP48E1",
            "TIEOFF_X28Y45": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 68,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y20": "DSP48E1",
            "DSP48_X2Y21": "DSP48E1",
            "TIEOFF_X28Y50": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 68,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y22": "DSP48E1",
            "DSP48_X2Y23": "DSP48E1",
            "TIEOFF_X28Y55": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 68,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y24": "DSP48E1",
            "DSP48_X2Y25": "DSP48E1",
            "TIEOFF_X28Y60": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 68,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y26": "DSP48E1",
            "DSP48_X2Y27": "DSP48E1",
            "TIEOFF_X28Y65": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 68,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y28": "DSP48E1",
            "DSP48_X2Y29": "DSP48E1",
            "TIEOFF_X28Y70": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 68,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y30": "DSP48E1",
            "DSP48_X2Y31": "DSP48E1",
            "TIEOFF_X28Y75": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 68,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y32": "DSP48E1",
            "DSP48_X2Y33": "DSP48E1",
            "TIEOFF_X28Y80": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 68,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y34": "DSP48E1",
            "DSP48_X2Y35": "DSP48E1",
            "TIEOFF_X28Y85": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 68,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y36": "DSP48E1",
            "DSP48_X2Y37": "DSP48E1",
            "TIEOFF_X28Y90": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 68,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y38": "DSP48E1",
            "DSP48_X2Y39": "DSP48E1",
            "TIEOFF_X28Y95": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 68,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y40": "DSP48E1",
            "DSP48_X2Y41": "DSP48E1",
            "TIEOFF_X28Y100": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 68,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y42": "DSP48E1",
            "DSP48_X2Y43": "DSP48E1",
            "TIEOFF_X28Y105": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 68,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y44": "DSP48E1",
            "DSP48_X2Y45": "DSP48E1",
            "TIEOFF_X28Y110": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 68,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y46": "DSP48E1",
            "DSP48_X2Y47": "DSP48E1",
            "TIEOFF_X28Y115": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 68,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y48": "DSP48E1",
            "DSP48_X2Y49": "DSP48E1",
            "TIEOFF_X28Y120": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 68,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y50": "DSP48E1",
            "DSP48_X2Y51": "DSP48E1",
            "TIEOFF_X28Y125": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 68,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y52": "DSP48E1",
            "DSP48_X2Y53": "DSP48E1",
            "TIEOFF_X28Y130": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 68,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y54": "DSP48E1",
            "DSP48_X2Y55": "DSP48E1",
            "TIEOFF_X28Y135": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 68,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y56": "DSP48E1",
            "DSP48_X2Y57": "DSP48E1",
            "TIEOFF_X28Y140": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X25Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 68,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y58": "DSP48E1",
            "DSP48_X2Y59": "DSP48E1",
            "TIEOFF_X28Y145": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X59Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D80",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 147,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y0": "DSP48E1",
            "DSP48_X3Y1": "DSP48E1",
            "TIEOFF_X63Y0": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X59Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D80",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 147,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y2": "DSP48E1",
            "DSP48_X3Y3": "DSP48E1",
            "TIEOFF_X63Y5": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X59Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D80",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 147,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y4": "DSP48E1",
            "DSP48_X3Y5": "DSP48E1",
            "TIEOFF_X63Y10": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X59Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D80",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 147,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y6": "DSP48E1",
            "DSP48_X3Y7": "DSP48E1",
            "TIEOFF_X63Y15": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X59Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D80",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 147,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y8": "DSP48E1",
            "DSP48_X3Y9": "DSP48E1",
            "TIEOFF_X63Y20": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X59Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D80",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 147,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y10": "DSP48E1",
            "DSP48_X3Y11": "DSP48E1",
            "TIEOFF_X63Y25": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X59Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D80",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 147,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y12": "DSP48E1",
            "DSP48_X3Y13": "DSP48E1",
            "TIEOFF_X63Y30": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X59Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D80",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 147,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y14": "DSP48E1",
            "DSP48_X3Y15": "DSP48E1",
            "TIEOFF_X63Y35": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X59Y40": {
        "bits": {
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                "baseaddr": "0x00421D80",
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            "BUFR_X0Y0": "BUFR",
            "BUFR_X0Y1": "BUFR",
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            "BUFR_X1Y9": "BUFR",
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    },
    "INT_L_X0Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
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        "grid_x": 4,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y35": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y36": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y37": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y38": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y38": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y39": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y40": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
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                "offset": 83,
                "words": 2
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        },
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            "TIEOFF_X0Y41": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y42": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
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                "offset": 85,
                "words": 2
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        },
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            "TIEOFF_X0Y42": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
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                "offset": 87,
                "words": 2
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        },
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            "TIEOFF_X0Y43": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
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        },
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            "TIEOFF_X0Y44": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y45": {
        "bits": {
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                "baseaddr": "0x00420000",
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        },
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            "TIEOFF_X0Y45": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y46": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
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            "TIEOFF_X0Y46": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y47": {
        "bits": {
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                "baseaddr": "0x00420000",
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            "TIEOFF_X0Y47": "TIEOFF"
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    },
    "INT_L_X0Y48": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
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                "offset": 97,
                "words": 2
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            "TIEOFF_X0Y48": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
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                "offset": 99,
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        },
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            "TIEOFF_X0Y49": "TIEOFF"
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    },
    "INT_L_X2Y0": {
        "bits": {
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                "baseaddr": "0x00420100",
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                "offset": 0,
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            "TIEOFF_X2Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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        },
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            "TIEOFF_X2Y1": "TIEOFF"
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    },
    "INT_L_X2Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "offset": 4,
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        },
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            "TIEOFF_X2Y2": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "offset": 6,
                "words": 2
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        },
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            "TIEOFF_X2Y3": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "offset": 8,
                "words": 2
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        },
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            "TIEOFF_X2Y4": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y5": {
        "bits": {
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                "baseaddr": "0x00420100",
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                "offset": 10,
                "words": 2
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            "TIEOFF_X2Y5": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y6": {
        "bits": {
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                "baseaddr": "0x00420100",
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                "offset": 12,
                "words": 2
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        },
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            "TIEOFF_X2Y6": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y7": {
        "bits": {
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                "offset": 14,
                "words": 2
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        },
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            "TIEOFF_X2Y7": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y8": {
        "bits": {
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                "baseaddr": "0x00420100",
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                "offset": 16,
                "words": 2
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        },
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            "TIEOFF_X2Y8": "TIEOFF"
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    },
    "INT_L_X2Y9": {
        "bits": {
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                "baseaddr": "0x00420100",
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                "offset": 18,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y10": {
        "bits": {
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                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
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            "TIEOFF_X2Y10": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y11": {
        "bits": {
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                "baseaddr": "0x00420100",
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                "offset": 22,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y11": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00420100",
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                "offset": 24,
                "words": 2
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        },
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            "TIEOFF_X2Y12": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y13": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y14": {
        "bits": {
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                "baseaddr": "0x00420100",
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            "TIEOFF_X2Y14": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X2Y15": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y16": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y20": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y22": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y23": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y24": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y25": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y26": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y27": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y28": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y29": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y30": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y31": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y32": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y33": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
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            "TIEOFF_X2Y34": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y35": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y36": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "offset": 75,
                "words": 2
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        },
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            "TIEOFF_X2Y37": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "words": 2
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        },
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            "TIEOFF_X2Y38": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "words": 2
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        },
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            "TIEOFF_X2Y39": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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            "TIEOFF_X2Y40": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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            "TIEOFF_X2Y41": "TIEOFF"
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    "INT_L_X2Y42": {
        "bits": {
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            "TIEOFF_X2Y42": "TIEOFF"
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        "bits": {
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            "TIEOFF_X2Y46": "TIEOFF"
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            "TIEOFF_X4Y3": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X4Y18": {
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                "words": 2
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            "TIEOFF_X4Y18": "TIEOFF"
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                "offset": 38,
                "words": 2
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            "TIEOFF_X4Y19": "TIEOFF"
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                "offset": 40,
                "words": 2
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        },
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            "TIEOFF_X4Y20": "TIEOFF"
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        },
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            "TIEOFF_X4Y21": "TIEOFF"
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            "TIEOFF_X4Y22": "TIEOFF"
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    "INT_L_X4Y23": {
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            "TIEOFF_X4Y23": "TIEOFF"
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    "INT_L_X4Y24": {
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            "TIEOFF_X4Y24": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X4Y25": "TIEOFF"
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                "baseaddr": "0x00420200",
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                "offset": 53,
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            "TIEOFF_X4Y26": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X4Y27": "TIEOFF"
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        "type": "INT_L"
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        "type": "INT_L"
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X4Y29": "TIEOFF"
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        "type": "INT_L"
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X4Y32": {
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y32": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y33": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y33": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420200",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
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            "TIEOFF_X4Y34": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420200",
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                "offset": 71,
                "words": 2
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        },
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            "TIEOFF_X4Y35": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420200",
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                "offset": 73,
                "words": 2
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        },
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            "TIEOFF_X4Y36": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420200",
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                "words": 2
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        },
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            "TIEOFF_X4Y37": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420200",
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                "offset": 77,
                "words": 2
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        },
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            "TIEOFF_X4Y38": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420200",
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        },
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            "TIEOFF_X4Y39": "TIEOFF"
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        "bits": {
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        "bits": {
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        "bits": {
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                "baseaddr": "0x00420200",
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            "TIEOFF_X4Y42": "TIEOFF"
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            "TIEOFF_X6Y16": "TIEOFF"
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    "INT_L_X6Y17": {
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                "baseaddr": "0x00420300",
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                "words": 2
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            "TIEOFF_X6Y17": "TIEOFF"
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    "INT_L_X6Y18": {
        "bits": {
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                "baseaddr": "0x00420300",
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                "offset": 36,
                "words": 2
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            "TIEOFF_X6Y18": "TIEOFF"
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    "INT_L_X6Y19": {
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                "baseaddr": "0x00420300",
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                "offset": 38,
                "words": 2
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            "TIEOFF_X6Y19": "TIEOFF"
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                "offset": 40,
                "words": 2
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            "TIEOFF_X6Y20": "TIEOFF"
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    "INT_L_X6Y21": {
        "bits": {
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                "baseaddr": "0x00420300",
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                "words": 2
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        },
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            "TIEOFF_X6Y21": "TIEOFF"
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    "INT_L_X6Y22": {
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                "baseaddr": "0x00420300",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X6Y22": "TIEOFF"
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    "INT_L_X6Y23": {
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                "offset": 46,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X6Y23": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X6Y24": {
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                "baseaddr": "0x00420300",
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                "offset": 48,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X6Y24": "TIEOFF"
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        "type": "INT_L"
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                "offset": 51,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X6Y25": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00420300",
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                "offset": 53,
                "words": 2
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            "TIEOFF_X6Y26": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00420300",
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                "offset": 55,
                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X6Y27": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y28": {
        "bits": {
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            "TIEOFF_X6Y28": "TIEOFF"
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        "type": "INT_L"
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                "words": 2
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        },
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        "pin_functions": {},
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        "type": "INT_L"
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                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X6Y31": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X6Y31": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y32": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y32": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 67,
                "words": 2
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        "type": "INT_L"
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    "INT_L_X8Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420400",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y33": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420400",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X8Y34": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420400",
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                "offset": 71,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X8Y35": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420400",
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                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X8Y36": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420400",
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                "offset": 75,
                "words": 2
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        },
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            "TIEOFF_X8Y37": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y38": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420400",
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                "offset": 77,
                "words": 2
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        },
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            "TIEOFF_X8Y38": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X8Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420400",
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                "words": 2
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        },
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            "TIEOFF_X8Y39": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420400",
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        },
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            "TIEOFF_X8Y40": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X8Y41": {
        "bits": {
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                "baseaddr": "0x00420400",
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        },
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            "TIEOFF_X8Y41": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X8Y42": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420400",
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                "words": 2
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        },
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            "TIEOFF_X8Y42": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X8Y43": {
        "bits": {
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                "baseaddr": "0x00420400",
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            "TIEOFF_X8Y43": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X8Y44": {
        "bits": {
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                "baseaddr": "0x00420400",
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            "TIEOFF_X8Y44": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420400",
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            "TIEOFF_X8Y45": "TIEOFF"
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    "INT_L_X8Y46": {
        "bits": {
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            "TIEOFF_X8Y46": "TIEOFF"
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    "INT_L_X8Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420400",
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        },
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        "bits": {
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                "baseaddr": "0x00420400",
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            "TIEOFF_X8Y48": "TIEOFF"
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    "INT_L_X8Y49": {
        "bits": {
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                "offset": 99,
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            "TIEOFF_X8Y49": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420500",
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            "TIEOFF_X11Y0": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420500",
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            "TIEOFF_X11Y1": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420500",
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                "offset": 4,
                "words": 2
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            "TIEOFF_X11Y2": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420500",
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                "offset": 6,
                "words": 2
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            "TIEOFF_X11Y3": "TIEOFF"
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            "TIEOFF_X11Y4": "TIEOFF"
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        "bits": {
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                "words": 2
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            "TIEOFF_X11Y7": "TIEOFF"
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                "words": 2
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            "TIEOFF_X11Y8": "TIEOFF"
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            "TIEOFF_X11Y9": "TIEOFF"
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                "baseaddr": "0x00420500",
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            "TIEOFF_X11Y11": "TIEOFF"
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                "baseaddr": "0x00420500",
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            "TIEOFF_X11Y12": "TIEOFF"
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                "baseaddr": "0x00420500",
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                "words": 2
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            "TIEOFF_X11Y13": "TIEOFF"
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        "bits": {
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            "TIEOFF_X11Y14": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420500",
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                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X11Y15": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X11Y16": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y17": {
        "bits": {
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                "baseaddr": "0x00420500",
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                "offset": 34,
                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y17": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y18": {
        "bits": {
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                "baseaddr": "0x00420500",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X11Y18": "TIEOFF"
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    "INT_L_X10Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y19": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y20": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y21": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 44,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y22": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X11Y23": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y24": {
        "bits": {
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                "baseaddr": "0x00420500",
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                "offset": 48,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X11Y24": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y25": {
        "bits": {
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                "baseaddr": "0x00420500",
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                "offset": 51,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y25": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y26": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y27": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y28": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y29": {
        "bits": {
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                "baseaddr": "0x00420500",
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                "offset": 59,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y29": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y30": {
        "bits": {
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                "baseaddr": "0x00420500",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y30": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y31": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X11Y32": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y33": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y34": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 71,
                "words": 2
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        },
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            "TIEOFF_X11Y35": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y36": {
        "bits": {
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                "baseaddr": "0x00420500",
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                "offset": 73,
                "words": 2
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        },
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            "TIEOFF_X11Y36": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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        },
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            "TIEOFF_X11Y37": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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        },
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            "TIEOFF_X11Y38": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420500",
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            "TIEOFF_X11Y39": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420500",
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            "TIEOFF_X11Y40": "TIEOFF"
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        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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            "TIEOFF_X13Y15": "TIEOFF"
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        "bits": {
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            "TIEOFF_X13Y16": "TIEOFF"
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    "INT_L_X12Y17": {
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                "offset": 34,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X13Y17": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y18": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X13Y18": "TIEOFF"
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        "bits": {
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                "offset": 38,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X13Y19": "TIEOFF"
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    "INT_L_X12Y20": {
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                "words": 2
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            "TIEOFF_X13Y20": "TIEOFF"
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    "INT_L_X12Y21": {
        "bits": {
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                "baseaddr": "0x00420600",
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                "words": 2
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        },
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            "TIEOFF_X13Y21": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y22": {
        "bits": {
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                "baseaddr": "0x00420600",
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                "offset": 44,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y22": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y23": {
        "bits": {
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                "baseaddr": "0x00420600",
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                "offset": 46,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X13Y23": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y24": {
        "bits": {
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                "baseaddr": "0x00420600",
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                "offset": 48,
                "words": 2
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            "TIEOFF_X13Y24": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y25": {
        "bits": {
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                "baseaddr": "0x00420600",
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                "offset": 51,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y25": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y26": {
        "bits": {
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                "words": 2
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        "clock_region": "X0Y0",
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            "TIEOFF_X13Y26": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y27": {
        "bits": {
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                "offset": 55,
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X13Y27": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y28": {
        "bits": {
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X13Y28": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y29": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X13Y29": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y30": {
        "bits": {
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y30": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y31": {
        "bits": {
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                "baseaddr": "0x00420600",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y31": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
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                "offset": 65,
                "words": 2
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            "TIEOFF_X13Y32": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y33": {
        "bits": {
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                "baseaddr": "0x00420600",
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                "words": 2
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    "INT_L_X12Y34": {
        "bits": {
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                "baseaddr": "0x00420600",
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                "words": 2
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            "TIEOFF_X13Y34": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420600",
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                "words": 2
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            "TIEOFF_X13Y35": "TIEOFF"
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                "baseaddr": "0x00420600",
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                "words": 2
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                "baseaddr": "0x00420600",
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            "TIEOFF_X16Y15": "TIEOFF"
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                "baseaddr": "0x00420700",
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            "TIEOFF_X16Y16": "TIEOFF"
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    "INT_L_X14Y17": {
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                "words": 2
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            "TIEOFF_X16Y17": "TIEOFF"
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                "baseaddr": "0x00420700",
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                "words": 2
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                "words": 2
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                "baseaddr": "0x00420700",
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                "words": 2
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                "baseaddr": "0x00420700",
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            "TIEOFF_X16Y23": "TIEOFF"
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    "INT_L_X14Y26": {
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    "INT_L_X14Y28": {
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        "type": "INT_L"
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X14Y31": {
        "bits": {
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                "baseaddr": "0x00420700",
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                "offset": 63,
                "words": 2
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    },
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        "bits": {
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                "baseaddr": "0x00420700",
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                "offset": 65,
                "words": 2
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        "bits": {
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                "baseaddr": "0x00420800",
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                "offset": 63,
                "words": 2
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            "TIEOFF_X18Y31": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420800",
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                "words": 2
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        },
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            "TIEOFF_X18Y32": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420800",
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                "words": 2
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            "TIEOFF_X18Y33": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y34": {
        "bits": {
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                "baseaddr": "0x00420800",
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                "offset": 69,
                "words": 2
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        },
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            "TIEOFF_X18Y34": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420800",
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                "words": 2
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            "TIEOFF_X18Y35": "TIEOFF"
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                "baseaddr": "0x00420800",
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            "TIEOFF_X18Y36": "TIEOFF"
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        "bits": {
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                "offset": 30,
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            "TIEOFF_X20Y15": "TIEOFF"
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        "bits": {
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                "words": 2
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            "TIEOFF_X20Y16": "TIEOFF"
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    "INT_L_X18Y17": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X20Y17": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420900",
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                "offset": 36,
                "words": 2
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        },
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            "TIEOFF_X20Y18": "TIEOFF"
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                "baseaddr": "0x00420900",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X20Y19": "TIEOFF"
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    "INT_L_X18Y20": {
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                "baseaddr": "0x00420900",
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                "offset": 40,
                "words": 2
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        "clock_region": "X0Y0",
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            "TIEOFF_X20Y20": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00420900",
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                "offset": 42,
                "words": 2
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            "TIEOFF_X20Y21": "TIEOFF"
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    "INT_L_X18Y22": {
        "bits": {
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                "baseaddr": "0x00420900",
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        "pin_functions": {},
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            "TIEOFF_X20Y22": "TIEOFF"
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    "INT_L_X18Y23": {
        "bits": {
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X18Y24": {
        "bits": {
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                "baseaddr": "0x00420900",
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        "type": "INT_L"
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    "INT_L_X18Y25": {
        "bits": {
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        "clock_region": "X0Y0",
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            "TIEOFF_X20Y25": "TIEOFF"
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    "INT_L_X18Y26": {
        "bits": {
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                "baseaddr": "0x00420900",
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        },
        "clock_region": "X0Y0",
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        "bits": {
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                "baseaddr": "0x00420900",
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X20Y27": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y28": {
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                "baseaddr": "0x00420900",
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X20Y28": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y29": {
        "bits": {
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                "baseaddr": "0x00420900",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y29": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420900",
                "frames": 28,
                "offset": 61,
                "words": 2
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                "baseaddr": "0x00420900",
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y80": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y81": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X20Y82": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y83": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
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                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X20Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
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                "words": 2
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        },
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            "TIEOFF_X20Y85": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
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                "offset": 73,
                "words": 2
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        },
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            "TIEOFF_X20Y86": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y87": {
        "bits": {
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                "baseaddr": "0x00400900",
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                "words": 2
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        },
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            "TIEOFF_X20Y87": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y88": {
        "bits": {
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                "baseaddr": "0x00400900",
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                "words": 2
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        },
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00400900",
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                "words": 2
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        },
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            "TIEOFF_X20Y89": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400900",
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        "bits": {
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                "baseaddr": "0x00400900",
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                "words": 2
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        },
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        "bits": {
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        "bits": {
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                "words": 2
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        },
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        "bits": {
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                "words": 2
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    "INT_L_X18Y97": {
        "bits": {
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                "offset": 95,
                "words": 2
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        },
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    "INT_L_X18Y98": {
        "bits": {
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                "baseaddr": "0x00400900",
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                "offset": 97,
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        },
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        "type": "INT_L"
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    "INT_L_X18Y99": {
        "bits": {
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                "offset": 99,
                "words": 2
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        "bits": {
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                "words": 2
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        "bits": {
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                "baseaddr": "0x00000900",
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                "words": 2
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        "bits": {
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        "bits": {
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        "bits": {
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                "words": 2
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    "INT_L_X18Y106": {
        "bits": {
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                "words": 2
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        "bits": {
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                "offset": 14,
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        "type": "INT_L"
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    "INT_L_X18Y108": {
        "bits": {
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            "TIEOFF_X20Y108": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y109": {
        "bits": {
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                "words": 2
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        "type": "INT_L"
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    "INT_L_X18Y110": {
        "bits": {
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                "words": 2
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            "TIEOFF_X20Y110": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y111": {
        "bits": {
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                "baseaddr": "0x00000900",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X20Y111": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y112": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y113": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 28,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X20Y114": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X20Y115": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y116": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y117": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y118": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y119": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y120": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y121": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y122": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y123": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 48,
                "words": 2
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        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y124": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 51,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y125": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y126": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y126": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 51,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y128": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
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                "offset": 59,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "bits": {
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                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
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            "TIEOFF_X20Y130": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00000900",
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            "TIEOFF_X20Y131": "TIEOFF"
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        "bits": {
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            "TIEOFF_X20Y132": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X20Y133": "TIEOFF"
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            "TIEOFF_X20Y134": "TIEOFF"
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            "TIEOFF_X22Y13": "TIEOFF"
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            "TIEOFF_X22Y14": "TIEOFF"
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            "TIEOFF_X22Y15": "TIEOFF"
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            "TIEOFF_X22Y16": "TIEOFF"
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            "TIEOFF_X22Y17": "TIEOFF"
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            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
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                "words": 2
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            "TIEOFF_X22Y18": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00420A00",
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        "type": "INT_L"
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            "TIEOFF_X22Y21": "TIEOFF"
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        "type": "INT_L"
    },
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            "TIEOFF_X22Y22": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X22Y23": "TIEOFF"
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        "type": "INT_L"
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                "words": 2
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            "TIEOFF_X22Y24": "TIEOFF"
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    "INT_L_X20Y25": {
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        "type": "INT_L"
    },
    "INT_L_X20Y26": {
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        "clock_region": "X0Y0",
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            "TIEOFF_X22Y26": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        },
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        "pin_functions": {},
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        "type": "INT_L"
    },
    "INT_L_X20Y28": {
        "bits": {
            "CLB_IO_CLK": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y28": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
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                "offset": 59,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y29": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X22Y30": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X22Y31": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
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            "TIEOFF_X22Y32": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A00",
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            "TIEOFF_X22Y33": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00420A00",
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            "TIEOFF_X22Y34": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X22Y35": "TIEOFF"
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            "TIEOFF_X22Y37": "TIEOFF"
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            "TIEOFF_X22Y38": "TIEOFF"
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            "TIEOFF_X22Y62": "TIEOFF"
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            "TIEOFF_X22Y63": "TIEOFF"
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    "INT_L_X20Y64": {
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            "TIEOFF_X22Y64": "TIEOFF"
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            "TIEOFF_X22Y65": "TIEOFF"
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            "TIEOFF_X22Y66": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X20Y67": {
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            "TIEOFF_X22Y67": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X22Y68": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X22Y69": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X22Y70": "TIEOFF"
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            "TIEOFF_X22Y71": "TIEOFF"
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    "INT_L_X20Y72": {
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            "TIEOFF_X22Y72": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X20Y73": {
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            "TIEOFF_X22Y73": "TIEOFF"
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    "INT_L_X20Y74": {
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            "TIEOFF_X22Y74": "TIEOFF"
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    "INT_L_X20Y75": {
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            "TIEOFF_X22Y75": "TIEOFF"
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    "INT_L_X20Y76": {
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            "TIEOFF_X22Y76": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y77": {
        "bits": {
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        "pin_functions": {},
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            "TIEOFF_X22Y77": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y78": {
        "bits": {
            "CLB_IO_CLK": {
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        "bits": {
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                "baseaddr": "0x00400A00",
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            "TIEOFF_X22Y80": "TIEOFF"
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            "TIEOFF_X22Y81": "TIEOFF"
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                "baseaddr": "0x00000A00",
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        "type": "INT_L"
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    "INT_L_X22Y23": {
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    "INT_L_X22Y24": {
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        "type": "INT_L"
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    "INT_L_X22Y26": {
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        "sites": {
            "TIEOFF_X24Y26": "TIEOFF"
        },
        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00420B00",
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            "TIEOFF_X24Y27": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B00",
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                "words": 2
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            "TIEOFF_X24Y28": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00420B00",
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B00",
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            "TIEOFF_X24Y30": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420B00",
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            "CLB_IO_CLK": {
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            "TIEOFF_X24Y32": "TIEOFF"
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        "bits": {
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            "TIEOFF_X24Y67": "TIEOFF"
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            "TIEOFF_X24Y69": "TIEOFF"
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            "TIEOFF_X24Y71": "TIEOFF"
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    "INT_L_X22Y72": {
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    "INT_L_X22Y73": {
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            "TIEOFF_X24Y73": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X22Y74": {
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            "TIEOFF_X24Y74": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X22Y75": {
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            "TIEOFF_X24Y75": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y76": {
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            "TIEOFF_X24Y76": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00000B00",
                "frames": 28,
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            "TIEOFF_X24Y126": "TIEOFF"
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            "TIEOFF_X24Y129": "TIEOFF"
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    "INT_L_X24Y24": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y24": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C00",
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            "TIEOFF_X26Y25": "TIEOFF"
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    },
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                "baseaddr": "0x00420C00",
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            "TIEOFF_X26Y26": "TIEOFF"
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        "bits": {
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        "bits": {
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                "baseaddr": "0x00420C00",
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            "TIEOFF_X26Y28": "TIEOFF"
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    "INT_L_X24Y73": {
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        "type": "INT_L"
    },
    "INT_L_X24Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 65,
        "grid_y": 79,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y74": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X26Y75": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y76": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
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        "grid_y": 75,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y77": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y78": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y79": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X26Y80": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X26Y81": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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        },
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            "TIEOFF_X26Y82": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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        },
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            "TIEOFF_X26Y83": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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                "words": 2
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        },
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            "TIEOFF_X26Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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            "TIEOFF_X26Y85": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X26Y86": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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                "offset": 75,
                "words": 2
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            "TIEOFF_X26Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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            "TIEOFF_X26Y88": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X24Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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                "words": 2
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        },
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            "TIEOFF_X26Y89": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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                "words": 2
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            "TIEOFF_X26Y90": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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                "words": 2
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        },
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            "TIEOFF_X26Y91": "TIEOFF"
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    },
    "INT_L_X24Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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                "words": 2
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            "TIEOFF_X26Y92": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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                "offset": 87,
                "words": 2
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            "TIEOFF_X26Y93": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X24Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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                "words": 2
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        },
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            "TIEOFF_X26Y94": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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                "words": 2
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            "TIEOFF_X26Y95": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y96": {
        "bits": {
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                "baseaddr": "0x00400C00",
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            "TIEOFF_X26Y96": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X26Y97": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X26Y98": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X24Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X26Y99": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y100": {
        "bits": {
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                "baseaddr": "0x00000C00",
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                "offset": 0,
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        },
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            "TIEOFF_X26Y100": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X24Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
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                "words": 2
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        },
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        "grid_y": 50,
        "pin_functions": {},
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            "TIEOFF_X26Y101": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X24Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y102": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
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        },
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        "pin_functions": {},
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            "TIEOFF_X26Y103": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
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                "words": 2
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        },
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            "TIEOFF_X26Y104": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
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                "offset": 10,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y105": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
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                "offset": 12,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y106": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "grid_y": 44,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y107": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
                "offset": 16,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "grid_y": 43,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y108": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
                "offset": 18,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 42,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y109": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y110": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 40,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y111": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "grid_y": 39,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y112": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y113": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "grid_y": 37,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y114": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y115": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y116": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y117": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y118": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y119": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y120": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y121": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 65,
        "grid_y": 29,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y122": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C00",
                "frames": 28,
                "offset": 46,
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            "TIEOFF_X29Y22": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00420D00",
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        "bits": {
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                "baseaddr": "0x00400D00",
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            "TIEOFF_X29Y72": "TIEOFF"
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    },
    "INT_L_X26Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
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            "TIEOFF_X29Y73": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
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            "TIEOFF_X29Y74": "TIEOFF"
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    "INT_L_X26Y75": {
        "bits": {
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                "baseaddr": "0x00400D00",
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            "TIEOFF_X29Y75": "TIEOFF"
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    "INT_L_X26Y76": {
        "bits": {
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                "baseaddr": "0x00400D00",
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    "INT_L_X26Y77": {
        "bits": {
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                "baseaddr": "0x00400D00",
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            "TIEOFF_X29Y77": "TIEOFF"
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        "bits": {
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            "TIEOFF_X29Y78": "TIEOFF"
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            "TIEOFF_X29Y105": "TIEOFF"
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            "TIEOFF_X29Y106": "TIEOFF"
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                "words": 2
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        "bits": {
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            "TIEOFF_X29Y109": "TIEOFF"
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            "TIEOFF_X29Y110": "TIEOFF"
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        "bits": {
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            "TIEOFF_X29Y111": "TIEOFF"
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    "INT_L_X26Y112": {
        "bits": {
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                "baseaddr": "0x00000D00",
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        "bits": {
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                "baseaddr": "0x00000D00",
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            "TIEOFF_X29Y113": "TIEOFF"
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            "TIEOFF_X29Y114": "TIEOFF"
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    "INT_L_X26Y115": {
        "bits": {
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    "INT_L_X26Y116": {
        "bits": {
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            "TIEOFF_X29Y116": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X26Y117": {
        "bits": {
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    "INT_L_X26Y118": {
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        "pin_functions": {},
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    "INT_L_X26Y119": {
        "bits": {
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        "pin_functions": {},
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            "TIEOFF_X29Y119": "TIEOFF"
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    "INT_L_X26Y120": {
        "bits": {
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        "pin_functions": {},
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    "INT_L_X26Y121": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X29Y125": "TIEOFF"
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            "TIEOFF_X29Y126": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
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                "offset": 42,
                "words": 2
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            "TIEOFF_X31Y21": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420E00",
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                "baseaddr": "0x00420E00",
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            "TIEOFF_X31Y24": "TIEOFF"
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y69": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y70": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X31Y71": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
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        "pin_functions": {},
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            "TIEOFF_X31Y72": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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        },
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        "pin_functions": {},
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            "TIEOFF_X31Y73": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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        },
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            "TIEOFF_X31Y74": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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        },
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            "TIEOFF_X31Y75": "TIEOFF"
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    },
    "INT_L_X28Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X31Y76": "TIEOFF"
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    "INT_L_X28Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X31Y77": "TIEOFF"
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    },
    "INT_L_X28Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X31Y78": "TIEOFF"
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    "INT_L_X28Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X31Y79": "TIEOFF"
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    "INT_L_X28Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X31Y80": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X31Y81": "TIEOFF"
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    "INT_L_X28Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X31Y82": "TIEOFF"
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        "bits": {
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            "TIEOFF_X31Y83": "TIEOFF"
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    "INT_L_X28Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X31Y84": "TIEOFF"
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X31Y85": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X31Y86": "TIEOFF"
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    "INT_L_X28Y87": {
        "bits": {
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            "TIEOFF_X31Y87": "TIEOFF"
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    "INT_L_X28Y88": {
        "bits": {
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            "TIEOFF_X31Y88": "TIEOFF"
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    "INT_L_X28Y89": {
        "bits": {
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X31Y89": "TIEOFF"
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        "bits": {
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            "TIEOFF_X31Y90": "TIEOFF"
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    "INT_L_X28Y91": {
        "bits": {
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                "baseaddr": "0x00400E00",
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                "baseaddr": "0x00400E00",
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        "bits": {
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X31Y93": "TIEOFF"
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            "TIEOFF_X31Y94": "TIEOFF"
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X31Y95": "TIEOFF"
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X31Y96": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X31Y97": "TIEOFF"
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    "INT_L_X28Y98": {
        "bits": {
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                "baseaddr": "0x00400E00",
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                "offset": 97,
                "words": 2
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            "TIEOFF_X31Y98": "TIEOFF"
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    "INT_L_X28Y99": {
        "bits": {
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                "baseaddr": "0x00400E00",
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                "words": 2
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            "TIEOFF_X31Y99": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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            "TIEOFF_X31Y100": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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        },
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            "TIEOFF_X31Y101": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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        },
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        "pin_functions": {},
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            "TIEOFF_X31Y102": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 6,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X31Y103": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 8,
                "words": 2
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X31Y104": "TIEOFF"
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    },
    "INT_L_X28Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 10,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X31Y105": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 12,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y106": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 14,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y107": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 16,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y108": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y109": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y110": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y111": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y112": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y113": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y114": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 30,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y115": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y116": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 34,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 75,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y117": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y118": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 75,
        "grid_y": 32,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y119": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y120": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 42,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y121": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y122": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y123": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y124": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 51,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y125": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 53,
                "words": 2
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        },
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            "TIEOFF_X31Y126": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "words": 2
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        },
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            "TIEOFF_X31Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 57,
                "words": 2
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        },
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            "TIEOFF_X31Y128": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "words": 2
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            "TIEOFF_X31Y129": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "words": 2
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        },
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            "TIEOFF_X31Y130": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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        },
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            "TIEOFF_X31Y131": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "words": 2
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        },
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            "TIEOFF_X31Y132": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "words": 2
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        },
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            "TIEOFF_X31Y133": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 69,
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        },
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            "TIEOFF_X31Y134": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 71,
                "words": 2
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        },
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            "TIEOFF_X31Y135": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y136": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X31Y136": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 75,
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        },
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            "TIEOFF_X31Y137": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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        },
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            "TIEOFF_X31Y138": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 79,
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        },
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            "TIEOFF_X31Y139": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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        },
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            "TIEOFF_X31Y140": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y141": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X31Y141": "TIEOFF"
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    "INT_L_X28Y142": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X31Y142": "TIEOFF"
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    },
    "INT_L_X28Y143": {
        "bits": {
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            "TIEOFF_X31Y143": "TIEOFF"
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    },
    "INT_L_X28Y144": {
        "bits": {
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        },
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            "TIEOFF_X31Y144": "TIEOFF"
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    },
    "INT_L_X28Y145": {
        "bits": {
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                "words": 2
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            "TIEOFF_X31Y145": "TIEOFF"
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    "INT_L_X28Y146": {
        "bits": {
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                "baseaddr": "0x00000E00",
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        },
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            "TIEOFF_X31Y146": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 95,
                "words": 2
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        },
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            "TIEOFF_X31Y147": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y148": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 97,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X31Y148": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 99,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X31Y149": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 0,
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y0": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y1": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 4,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y2": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 6,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 152,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y3": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 8,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 151,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y4": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 10,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y5": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 12,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 149,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y6": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 14,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y7": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 79,
        "grid_y": 147,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y8": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 18,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 79,
        "grid_y": 146,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y9": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 79,
        "grid_y": 144,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 79,
        "grid_y": 143,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 79,
        "grid_y": 142,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 79,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 79,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 79,
        "grid_y": 139,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 79,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 36,
                "words": 2
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            "TIEOFF_X35Y2": "TIEOFF"
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            "TIEOFF_X35Y10": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X35Y12": "TIEOFF"
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        "type": "INT_L"
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        "type": "INT_L"
    },
    "INT_L_X32Y15": {
        "bits": {
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                "baseaddr": "0x00421000",
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        },
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        "pin_functions": {},
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            "TIEOFF_X35Y15": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421000",
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                "offset": 32,
                "words": 2
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421000",
                "frames": 28,
                "offset": 34,
                "words": 2
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            "TIEOFF_X35Y17": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421000",
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            "TIEOFF_X35Y18": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421000",
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            "TIEOFF_X35Y19": "TIEOFF"
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        "bits": {
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            "TIEOFF_X35Y20": "TIEOFF"
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        "bits": {
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            "TIEOFF_X35Y21": "TIEOFF"
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y65": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y66": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "offset": 34,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X35Y67": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "offset": 36,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X35Y68": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "offset": 38,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X35Y69": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "offset": 40,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X35Y70": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "words": 2
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        },
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            "TIEOFF_X35Y71": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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        },
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            "TIEOFF_X35Y72": "TIEOFF"
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    "INT_L_X32Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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            "TIEOFF_X35Y73": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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        },
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            "TIEOFF_X35Y74": "TIEOFF"
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    "INT_L_X32Y75": {
        "bits": {
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                "baseaddr": "0x00401000",
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            "TIEOFF_X35Y75": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X35Y76": "TIEOFF"
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                "baseaddr": "0x00401000",
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            "TIEOFF_X35Y77": "TIEOFF"
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        "bits": {
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            "TIEOFF_X35Y78": "TIEOFF"
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        "bits": {
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        "bits": {
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            "TIEOFF_X35Y81": "TIEOFF"
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        "bits": {
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        "bits": {
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        },
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            "TIEOFF_X35Y83": "TIEOFF"
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        "bits": {
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            "TIEOFF_X35Y84": "TIEOFF"
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            "TIEOFF_X35Y85": "TIEOFF"
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            "TIEOFF_X35Y86": "TIEOFF"
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        "bits": {
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            "TIEOFF_X35Y89": "TIEOFF"
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        "bits": {
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            "TIEOFF_X35Y91": "TIEOFF"
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            "TIEOFF_X35Y92": "TIEOFF"
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        "bits": {
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                "offset": 87,
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            "TIEOFF_X35Y93": "TIEOFF"
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            "TIEOFF_X35Y94": "TIEOFF"
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                "words": 2
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            "TIEOFF_X35Y95": "TIEOFF"
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        "bits": {
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                "words": 2
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            "TIEOFF_X35Y96": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "words": 2
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            "TIEOFF_X35Y97": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "offset": 97,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y98": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y99": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X35Y100": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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                "offset": 2,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "grid_y": 50,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y101": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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                "offset": 4,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y102": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
                "frames": 28,
                "offset": 6,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y103": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
                "frames": 28,
                "offset": 8,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y104": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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                "offset": 10,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y105": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
                "frames": 28,
                "offset": 12,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y106": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y107": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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                "offset": 16,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y108": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y109": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y110": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y111": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y112": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y113": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 84,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y114": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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                "offset": 30,
                "words": 2
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        },
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            "TIEOFF_X35Y115": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X35Y116": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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        },
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            "TIEOFF_X35Y117": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y118": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X35Y118": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y119": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X35Y119": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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            "TIEOFF_X35Y120": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y121": {
        "bits": {
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            "TIEOFF_X35Y121": "TIEOFF"
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        "bits": {
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X35Y123": "TIEOFF"
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        "bits": {
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            "TIEOFF_X35Y124": "TIEOFF"
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        "bits": {
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            "TIEOFF_X35Y126": "TIEOFF"
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            "TIEOFF_X35Y146": "TIEOFF"
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    "INT_L_X32Y147": {
        "bits": {
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            "TIEOFF_X35Y147": "TIEOFF"
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        "bits": {
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            "TIEOFF_X35Y148": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y149": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 99,
                "words": 2
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            "TIEOFF_X35Y149": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y0": {
        "bits": {
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                "baseaddr": "0x00421100",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X37Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X37Y1": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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                "offset": 4,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X37Y2": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y3": {
        "bits": {
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                "baseaddr": "0x00421100",
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                "offset": 6,
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        },
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        "pin_functions": {},
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            "TIEOFF_X37Y3": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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                "offset": 8,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X37Y4": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y5": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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                "offset": 10,
                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X37Y5": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00421100",
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                "offset": 12,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y6": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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                "offset": 14,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y7": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y8": {
        "bits": {
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                "baseaddr": "0x00421100",
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                "offset": 16,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X37Y8": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y9": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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                "offset": 20,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y10": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y11": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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                "offset": 28,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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            "TIEOFF_X37Y15": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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                "words": 2
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            "TIEOFF_X37Y16": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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            "TIEOFF_X37Y17": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421100",
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                "words": 2
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            "TIEOFF_X37Y18": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421100",
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            "TIEOFF_X37Y19": "TIEOFF"
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                "baseaddr": "0x00421100",
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            "TIEOFF_X37Y20": "TIEOFF"
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            "TIEOFF_X37Y21": "TIEOFF"
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                "baseaddr": "0x00401100",
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        "bits": {
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        "sites": {
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        "type": "INT_L"
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    "INT_L_X34Y114": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X37Y114": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 30,
                "words": 2
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            "TIEOFF_X37Y115": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
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            "TIEOFF_X37Y116": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y117": {
        "bits": {
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        },
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            "TIEOFF_X37Y117": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X34Y118": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X37Y118": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X37Y119": "TIEOFF"
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        "bits": {
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                "words": 2
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            "TIEOFF_X39Y0": "TIEOFF"
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    },
    "INT_L_X36Y1": {
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                "baseaddr": "0x00421200",
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            "TIEOFF_X39Y1": "TIEOFF"
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            "TIEOFF_X39Y2": "TIEOFF"
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            "TIEOFF_X39Y3": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00421200",
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        "type": "INT_L"
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            "TIEOFF_X39Y6": "TIEOFF"
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        "pin_functions": {},
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            "TIEOFF_X39Y7": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X39Y8": "TIEOFF"
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        "type": "INT_L"
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        "pin_functions": {},
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            "TIEOFF_X39Y9": "TIEOFF"
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        "type": "INT_L"
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        "pin_functions": {},
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            "TIEOFF_X39Y10": "TIEOFF"
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        "type": "INT_L"
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X39Y12": "TIEOFF"
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        "type": "INT_L"
    },
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X39Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
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                "baseaddr": "0x00421200",
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        "bits": {
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                "baseaddr": "0x00421200",
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        "bits": {
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                "baseaddr": "0x00421200",
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        "bits": {
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                "baseaddr": "0x00421200",
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                "baseaddr": "0x00421200",
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            "TIEOFF_X39Y63": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
                "offset": 28,
                "words": 2
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            "TIEOFF_X39Y64": "TIEOFF"
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            "TIEOFF_X39Y65": "TIEOFF"
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    },
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            "TIEOFF_X39Y66": "TIEOFF"
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        "bits": {
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            "TIEOFF_X39Y67": "TIEOFF"
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        "bits": {
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            "TIEOFF_X39Y69": "TIEOFF"
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    "INT_L_X36Y109": {
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        "sites": {
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        "type": "INT_L"
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        "bits": {
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X39Y113": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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                "words": 2
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            "TIEOFF_X39Y114": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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        },
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            "TIEOFF_X39Y115": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X36Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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        },
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            "TIEOFF_X39Y116": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X36Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001200",
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        },
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            "TIEOFF_X39Y117": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X39Y118": "TIEOFF"
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        "bits": {
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        "bits": {
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        "bits": {
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    "INT_L_X36Y147": {
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                "words": 2
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                "words": 2
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    },
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    },
    "INT_L_X38Y1": {
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    },
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            "TIEOFF_X41Y2": "TIEOFF"
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            "TIEOFF_X41Y3": "TIEOFF"
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        "type": "INT_L"
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        "type": "INT_L"
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            "TIEOFF_X41Y6": "TIEOFF"
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            "TIEOFF_X41Y8": "TIEOFF"
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        "sites": {
            "TIEOFF_X41Y11": "TIEOFF"
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    },
    "INT_L_X38Y12": {
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        "pin_functions": {},
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            "TIEOFF_X41Y12": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 26,
                "words": 2
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            "TIEOFF_X41Y13": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00421300",
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            "TIEOFF_X41Y14": "TIEOFF"
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            "TIEOFF_X41Y15": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        "bits": {
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        "type": "INT_L"
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    "INT_L_X38Y62": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
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                "offset": 24,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y62": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y63": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y64": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X41Y64": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
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                "offset": 30,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y65": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X41Y66": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
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                "words": 2
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        },
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            "TIEOFF_X41Y67": "TIEOFF"
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    },
    "INT_L_X38Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
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        },
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            "TIEOFF_X41Y68": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00401300",
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            "TIEOFF_X41Y69": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401300",
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            "TIEOFF_X41Y70": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401300",
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            "TIEOFF_X41Y71": "TIEOFF"
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    "INT_L_X38Y72": {
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            "TIEOFF_X41Y72": "TIEOFF"
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            "TIEOFF_X41Y73": "TIEOFF"
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            "TIEOFF_X41Y75": "TIEOFF"
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            "TIEOFF_X41Y77": "TIEOFF"
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            "TIEOFF_X41Y78": "TIEOFF"
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            "TIEOFF_X41Y94": "TIEOFF"
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    "INT_L_X38Y95": {
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                "baseaddr": "0x00401300",
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                "words": 2
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            "TIEOFF_X41Y95": "TIEOFF"
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    "INT_L_X38Y96": {
        "bits": {
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                "words": 2
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            "TIEOFF_X41Y96": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y97": {
        "bits": {
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                "offset": 95,
                "words": 2
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            "TIEOFF_X41Y97": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401300",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X41Y98": "TIEOFF"
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        "bits": {
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                "offset": 99,
                "words": 2
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            "TIEOFF_X41Y99": "TIEOFF"
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            "TIEOFF_X41Y100": "TIEOFF"
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    "INT_L_X38Y102": {
        "bits": {
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                "baseaddr": "0x00001300",
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        "pin_functions": {},
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            "TIEOFF_X41Y102": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00001300",
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            "TIEOFF_X41Y103": "TIEOFF"
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                "baseaddr": "0x00001300",
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    "INT_L_X38Y105": {
        "bits": {
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            "TIEOFF_X41Y105": "TIEOFF"
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    "INT_L_X38Y106": {
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        "type": "INT_L"
    },
    "INT_L_X38Y107": {
        "bits": {
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                "words": 2
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        },
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    "INT_L_X38Y108": {
        "bits": {
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        },
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        "pin_functions": {},
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            "TIEOFF_X41Y108": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X38Y109": {
        "bits": {
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        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y109": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X38Y110": {
        "bits": {
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y110": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y111": {
        "bits": {
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                "words": 2
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            "TIEOFF_X41Y111": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X41Y112": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
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            "TIEOFF_X41Y113": "TIEOFF"
        },
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    },
    "INT_L_X38Y114": {
        "bits": {
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                "baseaddr": "0x00001300",
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            "TIEOFF_X41Y114": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00001300",
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            "TIEOFF_X41Y115": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X38Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
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            "TIEOFF_X41Y116": "TIEOFF"
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    "INT_L_X38Y117": {
        "bits": {
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            "TIEOFF_X41Y117": "TIEOFF"
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            "TIEOFF_X41Y118": "TIEOFF"
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        "bits": {
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            "TIEOFF_X41Y128": "TIEOFF"
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    "INT_L_X38Y145": {
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    "INT_L_X38Y146": {
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            "TIEOFF_X41Y146": "TIEOFF"
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    "INT_L_X38Y147": {
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            "TIEOFF_X41Y147": "TIEOFF"
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    },
    "INT_L_X38Y148": {
        "bits": {
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        },
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            "TIEOFF_X41Y148": "TIEOFF"
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    "INT_L_X38Y149": {
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            "TIEOFF_X41Y149": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y0": {
        "bits": {
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                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y0": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y1": {
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                "baseaddr": "0x00421400",
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        "pin_functions": {},
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            "TIEOFF_X43Y1": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        "pin_functions": {},
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            "TIEOFF_X43Y2": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X43Y3": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y4": {
        "bits": {
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                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y4": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X43Y5": "TIEOFF"
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        "type": "INT_L"
    },
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                "baseaddr": "0x00421400",
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        "pin_functions": {},
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            "TIEOFF_X43Y6": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y7": {
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        "pin_functions": {},
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            "TIEOFF_X43Y7": "TIEOFF"
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        "type": "INT_L"
    },
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        "pin_functions": {},
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            "TIEOFF_X43Y8": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y9": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y10": {
        "bits": {
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                "baseaddr": "0x00421400",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 144,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
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            "TIEOFF_X43Y12": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X43Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
                "frames": 28,
                "offset": 28,
                "words": 2
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            "TIEOFF_X43Y14": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
                "frames": 28,
                "offset": 30,
                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X43Y15": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y16": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y17": "TIEOFF"
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    },
    "INT_L_X40Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y18": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y19": "TIEOFF"
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    "INT_L_X40Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y20": "TIEOFF"
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    "INT_L_X40Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y21": "TIEOFF"
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    },
    "INT_L_X40Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y22": "TIEOFF"
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    "INT_L_X40Y23": {
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            "TIEOFF_X43Y24": "TIEOFF"
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            "CLB_IO_CLK": {
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            "TIEOFF_X43Y25": "TIEOFF"
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    "INT_L_X40Y32": {
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            "TIEOFF_X43Y40": "TIEOFF"
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            "TIEOFF_X43Y41": "TIEOFF"
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    "INT_L_X40Y42": {
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            "TIEOFF_X43Y42": "TIEOFF"
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    "INT_L_X40Y43": {
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            "TIEOFF_X43Y43": "TIEOFF"
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    "INT_L_X40Y44": {
        "bits": {
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            "TIEOFF_X43Y44": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y45": {
        "bits": {
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                "baseaddr": "0x00421400",
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                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X43Y45": "TIEOFF"
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    "INT_L_X40Y46": {
        "bits": {
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                "baseaddr": "0x00421400",
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        "clock_region": "X1Y0",
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            "TIEOFF_X43Y46": "TIEOFF"
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    "INT_L_X40Y47": {
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                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X43Y47": "TIEOFF"
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    "INT_L_X40Y48": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
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                "offset": 97,
                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X43Y48": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
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                "offset": 99,
                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X43Y49": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y50": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X43Y50": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y51": {
        "bits": {
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                "baseaddr": "0x00401400",
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                "words": 2
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X43Y51": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y52": {
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X43Y52": "TIEOFF"
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    "INT_L_X40Y53": {
        "bits": {
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X43Y53": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y54": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "words": 2
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        "clock_region": "X1Y1",
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            "TIEOFF_X43Y54": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y55": {
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                "baseaddr": "0x00401400",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X43Y55": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y56": {
        "bits": {
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X43Y56": "TIEOFF"
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    },
    "INT_L_X40Y57": {
        "bits": {
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y57": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y58": {
        "bits": {
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y58": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y59": {
        "bits": {
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                "baseaddr": "0x00401400",
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y59": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y60": {
        "bits": {
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                "baseaddr": "0x00401400",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y60": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y61": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y62": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "words": 2
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        },
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            "TIEOFF_X43Y62": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 26,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X43Y63": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y64": {
        "bits": {
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                "baseaddr": "0x00401400",
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        },
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            "TIEOFF_X43Y64": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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        },
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            "TIEOFF_X43Y65": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401400",
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            "TIEOFF_X43Y66": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X43Y67": "TIEOFF"
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    "INT_L_X40Y95": {
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                "baseaddr": "0x00401400",
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                "words": 2
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            "TIEOFF_X43Y96": "TIEOFF"
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    "INT_L_X40Y97": {
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            "TIEOFF_X43Y97": "TIEOFF"
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    "INT_L_X40Y98": {
        "bits": {
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                "words": 2
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            "TIEOFF_X43Y98": "TIEOFF"
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    "INT_L_X40Y99": {
        "bits": {
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    "INT_L_X40Y100": {
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        "clock_region": "X1Y2",
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    "INT_L_X40Y102": {
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    "INT_L_X40Y105": {
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    "INT_L_X40Y106": {
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        "type": "INT_L"
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    "INT_L_X40Y108": {
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        "pin_functions": {},
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            "TIEOFF_X43Y108": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y109": {
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y109": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X43Y110": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "words": 2
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            "TIEOFF_X43Y111": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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        },
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            "TIEOFF_X43Y112": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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            "TIEOFF_X43Y113": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00001400",
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            "TIEOFF_X43Y114": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y115": {
        "bits": {
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            "TIEOFF_X43Y115": "TIEOFF"
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            "TIEOFF_X43Y116": "TIEOFF"
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        "bits": {
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        "bits": {
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    "INT_L_X40Y145": {
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    "INT_L_X40Y146": {
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    "INT_L_X40Y147": {
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            "TIEOFF_X43Y147": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y148": {
        "bits": {
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        },
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            "TIEOFF_X43Y148": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y149": {
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        "type": "INT_L"
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    "INT_L_X42Y0": {
        "bits": {
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                "baseaddr": "0x00421500",
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        "clock_region": "X1Y0",
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            "TIEOFF_X45Y0": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X42Y1": {
        "bits": {
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                "baseaddr": "0x00421500",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X45Y1": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00421500",
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        "pin_functions": {},
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            "TIEOFF_X45Y2": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X45Y3": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X42Y4": {
        "bits": {
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                "baseaddr": "0x00421500",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y4": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y5": {
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                "baseaddr": "0x00421500",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X45Y5": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00421500",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y6": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y7": {
        "bits": {
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                "baseaddr": "0x00421500",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y7": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y8": {
        "bits": {
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                "baseaddr": "0x00421500",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y8": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y9": {
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        "sites": {
            "TIEOFF_X45Y9": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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                "words": 2
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            "TIEOFF_X45Y10": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00421500",
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            "TIEOFF_X45Y11": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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        "type": "INT_L"
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            "TIEOFF_X45Y13": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X45Y14": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401500",
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                "words": 2
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    "INT_L_X42Y106": {
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        "type": "INT_L"
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    "INT_L_X42Y108": {
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            "TIEOFF_X45Y108": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
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            "TIEOFF_X45Y109": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X45Y110": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y111": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X45Y111": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X42Y112": {
        "bits": {
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            "TIEOFF_X45Y112": "TIEOFF"
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        "bits": {
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    "INT_L_X42Y147": {
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        "type": "INT_L"
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        "type": "INT_L"
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X47Y7": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421600",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X47Y8": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421600",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X47Y9": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421600",
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                "offset": 20,
                "words": 2
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        },
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            "TIEOFF_X47Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421600",
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                "offset": 22,
                "words": 2
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        },
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            "TIEOFF_X47Y11": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421600",
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                "words": 2
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        },
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            "TIEOFF_X47Y12": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421600",
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            "TIEOFF_X47Y13": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421600",
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        "bits": {
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                "baseaddr": "0x00421600",
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        "bits": {
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                "baseaddr": "0x00421600",
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        "bits": {
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    "INT_L_X44Y42": {
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    "INT_L_X44Y43": {
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    "INT_L_X44Y44": {
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            "TIEOFF_X47Y44": "TIEOFF"
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                "baseaddr": "0x00421600",
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            "TIEOFF_X47Y46": "TIEOFF"
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    "INT_L_X44Y47": {
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            "TIEOFF_X47Y47": "TIEOFF"
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            "TIEOFF_X47Y48": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00421600",
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            "TIEOFF_X47Y49": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00421700",
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        "type": "INT_L"
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    "INT_L_X46Y1": {
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        "pin_functions": {},
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    },
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        "type": "INT_L"
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        "type": "INT_L"
    },
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        },
        "clock_region": "X1Y0",
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        "type": "INT_L"
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    "INT_L_X46Y7": {
        "bits": {
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                "frames": 28,
                "offset": 14,
                "words": 2
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421700",
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            "TIEOFF_X49Y9": "TIEOFF"
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                "baseaddr": "0x00421700",
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            "TIEOFF_X51Y6": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X48Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421800",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
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            "TIEOFF_X51Y7": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X48Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421800",
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                "words": 2
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        },
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            "TIEOFF_X51Y8": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421800",
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                "offset": 18,
                "words": 2
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        },
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            "TIEOFF_X51Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X48Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421800",
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                "words": 2
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            "TIEOFF_X51Y10": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421800",
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                "words": 2
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        },
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            "TIEOFF_X51Y11": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421800",
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            "TIEOFF_X51Y12": "TIEOFF"
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                "baseaddr": "0x00421800",
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        "bits": {
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            "TIEOFF_X51Y42": "TIEOFF"
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    "INT_L_X48Y45": {
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    "INT_L_X48Y47": {
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                "baseaddr": "0x00421800",
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                "baseaddr": "0x00421800",
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            "TIEOFF_X51Y48": "TIEOFF"
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        "bits": {
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            "TIEOFF_X51Y49": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00421900",
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        "clock_region": "X1Y0",
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            "TIEOFF_X53Y0": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X50Y1": {
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            "TIEOFF_X53Y1": "TIEOFF"
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        "type": "INT_L"
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X53Y2": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00421900",
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        "clock_region": "X1Y0",
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            "TIEOFF_X53Y3": "TIEOFF"
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        "type": "INT_L"
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X53Y4": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00421900",
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        },
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        "pin_functions": {},
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            "TIEOFF_X53Y5": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421900",
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        },
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        "grid_x": 126,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X53Y6": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X50Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421900",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X53Y7": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X50Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421900",
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                "offset": 16,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X53Y8": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X50Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421900",
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                "offset": 18,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X53Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421900",
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                "offset": 20,
                "words": 2
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        },
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            "TIEOFF_X53Y10": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421900",
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                "words": 2
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        },
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            "TIEOFF_X53Y11": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421900",
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        },
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            "TIEOFF_X53Y12": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421900",
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            "TIEOFF_X53Y13": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00421900",
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            "TIEOFF_X53Y14": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421900",
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            "TIEOFF_X53Y15": "TIEOFF"
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                "baseaddr": "0x00421900",
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            "TIEOFF_X53Y16": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421900",
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            "TIEOFF_X53Y17": "TIEOFF"
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                "baseaddr": "0x00421900",
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                "baseaddr": "0x00421900",
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            "TIEOFF_X53Y22": "TIEOFF"
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            "TIEOFF_X53Y23": "TIEOFF"
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            "TIEOFF_X53Y25": "TIEOFF"
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            "TIEOFF_X53Y26": "TIEOFF"
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    "INT_L_X50Y42": {
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                "words": 2
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            "TIEOFF_X53Y42": "TIEOFF"
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    "INT_L_X50Y43": {
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    "INT_L_X50Y44": {
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    "INT_L_X50Y45": {
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    "INT_L_X50Y46": {
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        "type": "INT_L"
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    "INT_L_X50Y50": {
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                "baseaddr": "0x00401900",
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            "TIEOFF_X53Y50": "TIEOFF"
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        },
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        "type": "INT_L"
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        },
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        "type": "INT_L"
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        },
        "clock_region": "X1Y1",
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    "INT_L_X50Y105": {
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        },
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        "sites": {
            "TIEOFF_X53Y105": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X50Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 12,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X53Y106": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "words": 2
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        },
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            "TIEOFF_X53Y107": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X53Y108": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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        },
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            "TIEOFF_X53Y109": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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        },
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            "TIEOFF_X53Y110": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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        },
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            "TIEOFF_X53Y111": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X53Y112": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X53Y113": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X53Y114": "TIEOFF"
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        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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                "words": 2
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    "INT_L_X50Y145": {
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    "INT_L_X50Y146": {
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                "words": 2
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                "words": 2
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        "type": "INT_L"
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        "bits": {
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                "words": 2
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        },
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        "sites": {
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        "type": "INT_L"
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        "type": "INT_L"
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        "clock_region": "X1Y0",
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            "TIEOFF_X55Y0": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X52Y1": {
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                "words": 2
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        "clock_region": "X1Y0",
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        "type": "INT_L"
    },
    "INT_L_X52Y2": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X55Y2": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X52Y3": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X55Y3": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X52Y4": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X55Y4": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421A00",
                "frames": 28,
                "offset": 10,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X55Y5": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421A00",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X55Y6": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421A00",
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                "words": 2
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            "TIEOFF_X55Y7": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421A00",
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                "words": 2
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            "TIEOFF_X55Y8": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421A00",
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            "TIEOFF_X55Y9": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421A00",
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            "TIEOFF_X55Y10": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421A00",
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            "TIEOFF_X55Y11": "TIEOFF"
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    "INT_L_X52Y42": {
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            "TIEOFF_X55Y48": "TIEOFF"
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            "TIEOFF_X55Y49": "TIEOFF"
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    "INT_L_X52Y50": {
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        "pin_functions": {},
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            "TIEOFF_X55Y50": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X52Y51": {
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            "TIEOFF_X55Y51": "TIEOFF"
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    "INT_L_X52Y52": {
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        "pin_functions": {},
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            "TIEOFF_X55Y52": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X52Y53": {
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        "pin_functions": {},
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            "TIEOFF_X55Y53": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X52Y54": {
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            "TIEOFF_X57Y2": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421B00",
                "frames": 28,
                "offset": 6,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 152,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X57Y3": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X54Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421B00",
                "frames": 28,
                "offset": 8,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X57Y4": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X54Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421B00",
                "frames": 28,
                "offset": 10,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X57Y5": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X54Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421B00",
                "frames": 28,
                "offset": 12,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X57Y6": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421B00",
                "frames": 28,
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        "pin_functions": {},
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            "TIEOFF_X57Y7": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421B00",
                "frames": 28,
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            "TIEOFF_X57Y8": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421B00",
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            "TIEOFF_X57Y9": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421B00",
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            "TIEOFF_X57Y10": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421B00",
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            "TIEOFF_X57Y11": "TIEOFF"
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    },
    "INT_L_X54Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421B00",
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            "TIEOFF_X57Y12": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421B00",
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            "TIEOFF_X57Y13": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421B00",
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            "TIEOFF_X57Y14": "TIEOFF"
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            "TIEOFF_X57Y15": "TIEOFF"
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        "bits": {
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            "TIEOFF_X57Y16": "TIEOFF"
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            "TIEOFF_X57Y18": "TIEOFF"
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            "TIEOFF_X57Y20": "TIEOFF"
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            "TIEOFF_X57Y21": "TIEOFF"
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            "TIEOFF_X57Y23": "TIEOFF"
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    "INT_L_X54Y37": {
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            "TIEOFF_X57Y37": "TIEOFF"
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            "TIEOFF_X57Y38": "TIEOFF"
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    "INT_L_X54Y39": {
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                "baseaddr": "0x00421B00",
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            "TIEOFF_X57Y39": "TIEOFF"
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            "TIEOFF_X57Y40": "TIEOFF"
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                "baseaddr": "0x00421B00",
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            "TIEOFF_X57Y41": "TIEOFF"
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    "INT_L_X54Y42": {
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                "baseaddr": "0x00421B00",
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            "TIEOFF_X57Y42": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X54Y43": {
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                "baseaddr": "0x00421B00",
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        "clock_region": "X1Y0",
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            "TIEOFF_X57Y43": "TIEOFF"
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    "INT_L_X54Y44": {
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        "clock_region": "X1Y0",
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            "TIEOFF_X57Y44": "TIEOFF"
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    "INT_L_X54Y45": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X57Y45": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X54Y46": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X57Y46": "TIEOFF"
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    "INT_L_X54Y47": {
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        },
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            "TIEOFF_X57Y47": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X54Y48": {
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                "words": 2
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        },
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            "TIEOFF_X57Y48": "TIEOFF"
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        "type": "INT_L"
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                "offset": 99,
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X57Y49": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X54Y50": {
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        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X57Y50": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X54Y51": {
        "bits": {
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                "baseaddr": "0x00401B00",
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X57Y51": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X54Y52": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
                "frames": 28,
                "offset": 4,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 101,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X57Y52": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X54Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
                "frames": 28,
                "offset": 6,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 100,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X57Y53": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X54Y54": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
                "frames": 28,
                "offset": 8,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X57Y54": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X54Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
                "frames": 28,
                "offset": 10,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X57Y55": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X54Y56": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X57Y56": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X54Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
                "frames": 28,
                "offset": 14,
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X57Y57": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y58": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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            "TIEOFF_X57Y58": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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            "TIEOFF_X57Y59": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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            "TIEOFF_X57Y60": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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            "TIEOFF_X57Y61": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y62": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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            "TIEOFF_X57Y62": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y63": {
        "bits": {
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                "baseaddr": "0x00401B00",
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            "TIEOFF_X57Y63": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y64": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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            "TIEOFF_X57Y64": "TIEOFF"
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    "INT_L_X54Y65": {
        "bits": {
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                "baseaddr": "0x00401B00",
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            "TIEOFF_X57Y65": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X54Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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            "TIEOFF_X57Y66": "TIEOFF"
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    },
    "INT_L_X54Y67": {
        "bits": {
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            "TIEOFF_X57Y67": "TIEOFF"
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    },
    "INT_L_X54Y68": {
        "bits": {
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                "baseaddr": "0x00401B00",
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            "TIEOFF_X57Y68": "TIEOFF"
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    "INT_L_X54Y69": {
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            "TIEOFF_X57Y69": "TIEOFF"
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    },
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        "bits": {
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            "TIEOFF_X57Y70": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X54Y71": {
        "bits": {
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                "baseaddr": "0x00401B00",
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            "TIEOFF_X57Y71": "TIEOFF"
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    "INT_L_X54Y72": {
        "bits": {
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                "baseaddr": "0x00401B00",
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            "TIEOFF_X57Y72": "TIEOFF"
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        "bits": {
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            "TIEOFF_X57Y73": "TIEOFF"
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        "bits": {
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    "INT_L_X54Y75": {
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            "TIEOFF_X57Y75": "TIEOFF"
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            "TIEOFF_X57Y76": "TIEOFF"
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            "TIEOFF_X57Y77": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00401B00",
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        "bits": {
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        "bits": {
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            "TIEOFF_X57Y80": "TIEOFF"
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        "bits": {
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            "TIEOFF_X57Y81": "TIEOFF"
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    "INT_L_X54Y82": {
        "bits": {
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            "TIEOFF_X57Y82": "TIEOFF"
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    "INT_L_X54Y83": {
        "bits": {
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                "baseaddr": "0x00401B00",
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            "TIEOFF_X57Y83": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X54Y84": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X57Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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                "offset": 71,
                "words": 2
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        "clock_region": "X1Y1",
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            "TIEOFF_X57Y85": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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                "offset": 73,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X57Y86": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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                "offset": 75,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X57Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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                "offset": 77,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X57Y88": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y89": {
        "bits": {
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                "baseaddr": "0x00401B00",
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                "offset": 79,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X57Y89": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X57Y90": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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                "offset": 83,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X57Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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                "offset": 85,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X57Y92": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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                "offset": 87,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X57Y93": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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                "offset": 89,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X57Y94": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X57Y95": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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                "offset": 93,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X57Y96": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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                "offset": 95,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X57Y97": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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                "offset": 97,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X57Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X54Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X57Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X54Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 134,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X57Y100": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X54Y101": {
        "bits": {
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    },
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        "bits": {
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                "baseaddr": "0x00001B00",
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            "TIEOFF_X57Y105": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421C00",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X59Y3": "TIEOFF"
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            "TIEOFF_X59Y49": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401C00",
                "frames": 28,
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            "TIEOFF_X59Y50": "TIEOFF"
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    },
    "INT_L_X56Y51": {
        "bits": {
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                "baseaddr": "0x00401C00",
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    },
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        "bits": {
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                "baseaddr": "0x00401C00",
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        "bits": {
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                "baseaddr": "0x00401C00",
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    "INT_L_X56Y54": {
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    "INT_L_X56Y97": {
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    "INT_L_X56Y98": {
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            "TIEOFF_X59Y98": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401C00",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 140,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X59Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X56Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
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        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X59Y100": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X56Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
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        "grid_y": 50,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X59Y101": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X56Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X59Y102": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X56Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
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                "offset": 6,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X59Y103": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X56Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
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                "offset": 8,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X59Y104": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X59Y105": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
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                "words": 2
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        },
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            "TIEOFF_X59Y106": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X56Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
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        },
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            "TIEOFF_X59Y107": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X59Y108": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
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        },
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            "TIEOFF_X59Y109": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
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        },
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            "TIEOFF_X59Y110": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
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            "TIEOFF_X59Y111": "TIEOFF"
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    "INT_L_X56Y112": {
        "bits": {
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                "baseaddr": "0x00001C00",
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        },
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            "TIEOFF_X59Y112": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y113": {
        "bits": {
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                "baseaddr": "0x00001C00",
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        },
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            "TIEOFF_X59Y113": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y114": {
        "bits": {
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        },
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            "TIEOFF_X59Y114": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y115": {
        "bits": {
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                "baseaddr": "0x00001C00",
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        },
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            "TIEOFF_X59Y115": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y116": {
        "bits": {
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                "baseaddr": "0x00001C00",
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        },
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            "TIEOFF_X59Y116": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y117": {
        "bits": {
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                "baseaddr": "0x00001C00",
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        },
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            "TIEOFF_X59Y117": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y118": {
        "bits": {
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                "baseaddr": "0x00001C00",
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            "TIEOFF_X59Y118": "TIEOFF"
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    "INT_L_X56Y119": {
        "bits": {
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                "baseaddr": "0x00001C00",
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            "TIEOFF_X59Y119": "TIEOFF"
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    "INT_L_X56Y120": {
        "bits": {
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                "baseaddr": "0x00001C00",
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            "TIEOFF_X59Y120": "TIEOFF"
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    "INT_L_X56Y121": {
        "bits": {
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    "INT_L_X56Y122": {
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    "INT_L_X56Y123": {
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            "TIEOFF_X59Y123": "TIEOFF"
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    "INT_L_X56Y124": {
        "bits": {
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    "INT_L_X56Y125": {
        "bits": {
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                "baseaddr": "0x00001C00",
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    "INT_L_X56Y126": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X56Y127": {
        "bits": {
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                "baseaddr": "0x00001C00",
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    "INT_L_X56Y128": {
        "bits": {
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                "baseaddr": "0x00001C00",
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        },
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            "TIEOFF_X59Y128": "TIEOFF"
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    "INT_L_X56Y129": {
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            "TIEOFF_X59Y129": "TIEOFF"
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    },
    "INT_L_X56Y130": {
        "bits": {
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            "TIEOFF_X59Y130": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y131": {
        "bits": {
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X59Y131": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X56Y132": {
        "bits": {
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                "baseaddr": "0x00001C00",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X59Y132": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X56Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
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                "offset": 67,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "sites": {
            "TIEOFF_X59Y133": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X56Y134": {
        "bits": {
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                "baseaddr": "0x00001C00",
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                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "sites": {
            "TIEOFF_X59Y134": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y135": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 71,
                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X59Y135": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X56Y136": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 73,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X59Y136": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
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                "offset": 75,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X59Y137": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X56Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
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                "offset": 77,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X59Y138": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X56Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
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                "offset": 79,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X59Y139": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X56Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
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                "offset": 81,
                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X59Y140": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X56Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X59Y141": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X56Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
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                "words": 2
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        },
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            "TIEOFF_X59Y142": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X56Y143": {
        "bits": {
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                "baseaddr": "0x00001C00",
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                "offset": 87,
                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X59Y143": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X56Y144": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "sites": {
            "TIEOFF_X59Y144": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X56Y145": {
        "bits": {
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                "baseaddr": "0x00001C00",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X59Y145": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y146": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "sites": {
            "TIEOFF_X59Y146": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "sites": {
            "TIEOFF_X59Y147": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y148": {
        "bits": {
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                "baseaddr": "0x00001C00",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X59Y148": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X56Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X59Y149": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
                "frames": 28,
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            "TIEOFF_X61Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X58Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
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                "words": 2
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            "TIEOFF_X61Y1": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
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            "TIEOFF_X61Y2": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
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            "TIEOFF_X61Y3": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
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            "TIEOFF_X61Y4": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
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            "TIEOFF_X61Y5": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
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            "TIEOFF_X61Y6": "TIEOFF"
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                "baseaddr": "0x00421D00",
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            "TIEOFF_X61Y7": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
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            "TIEOFF_X61Y8": "TIEOFF"
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            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
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            "TIEOFF_X61Y9": "TIEOFF"
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            "TIEOFF_X61Y10": "TIEOFF"
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                "baseaddr": "0x00421D00",
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    "INT_L_X58Y32": {
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            "TIEOFF_X61Y33": "TIEOFF"
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    "INT_L_X58Y34": {
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    "INT_L_X58Y41": {
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    "INT_L_X58Y42": {
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    "INT_L_X58Y44": {
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            "TIEOFF_X61Y45": "TIEOFF"
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    "INT_L_X58Y46": {
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    "INT_L_X58Y47": {
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            "TIEOFF_X61Y47": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
                "frames": 28,
                "offset": 97,
                "words": 2
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            "TIEOFF_X61Y48": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
                "frames": 28,
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            "TIEOFF_X61Y49": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00401D00",
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            "TIEOFF_X61Y50": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401D00",
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            "TIEOFF_X61Y51": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401D00",
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                "baseaddr": "0x00401D00",
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    "INT_L_X58Y82": {
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            "TIEOFF_X61Y86": "TIEOFF"
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                "baseaddr": "0x00401D00",
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            "TIEOFF_X61Y87": "TIEOFF"
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    "INT_L_X58Y88": {
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            "TIEOFF_X61Y88": "TIEOFF"
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            "TIEOFF_X61Y90": "TIEOFF"
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    "INT_L_X58Y93": {
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            "TIEOFF_X61Y93": "TIEOFF"
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    "INT_L_X58Y95": {
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    "INT_L_X58Y96": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X61Y96": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401D00",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X61Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X58Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401D00",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X61Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X58Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401D00",
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                "offset": 99,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X61Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X58Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
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                "offset": 0,
                "words": 2
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        },
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            "TIEOFF_X61Y100": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X58Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
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        },
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            "TIEOFF_X61Y101": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X58Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
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        },
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            "TIEOFF_X61Y102": "TIEOFF"
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    },
    "INT_L_X58Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
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        },
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            "TIEOFF_X61Y103": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00001D00",
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        },
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                "baseaddr": "0x00001D00",
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            "TIEOFF_X61Y105": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00001D00",
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                "baseaddr": "0x00001D00",
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                "baseaddr": "0x00001D00",
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    "INT_L_X58Y116": {
        "bits": {
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    "INT_L_X58Y118": {
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            "TIEOFF_X61Y126": "TIEOFF"
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        "bits": {
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            "TIEOFF_X61Y128": "TIEOFF"
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    "INT_L_X58Y129": {
        "bits": {
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                "baseaddr": "0x00001D00",
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            "TIEOFF_X61Y129": "TIEOFF"
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    "INT_L_X58Y130": {
        "bits": {
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                "baseaddr": "0x00001D00",
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                "words": 2
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        "type": "INT_L"
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    "INT_L_X58Y131": {
        "bits": {
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                "baseaddr": "0x00001D00",
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            "TIEOFF_X61Y131": "TIEOFF"
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    "INT_L_X58Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
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                "words": 2
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        },
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            "TIEOFF_X61Y132": "TIEOFF"
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    "INT_L_X58Y133": {
        "bits": {
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                "baseaddr": "0x00001D00",
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                "words": 2
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        },
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            "TIEOFF_X61Y133": "TIEOFF"
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    "INT_L_X58Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
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                "offset": 69,
                "words": 2
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        },
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    "INT_L_X58Y135": {
        "bits": {
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                "baseaddr": "0x00001D00",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X61Y135": "TIEOFF"
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    "INT_L_X58Y136": {
        "bits": {
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        },
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        "pin_functions": {},
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            "TIEOFF_X61Y136": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X58Y137": {
        "bits": {
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                "baseaddr": "0x00001D00",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X61Y137": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X58Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X61Y138": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X58Y139": {
        "bits": {
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                "baseaddr": "0x00001D00",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X61Y139": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X58Y140": {
        "bits": {
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                "baseaddr": "0x00001D00",
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                "words": 2
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        "clock_region": "X1Y2",
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            "TIEOFF_X61Y140": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X58Y141": {
        "bits": {
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                "baseaddr": "0x00001D00",
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        },
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        "sites": {
            "TIEOFF_X61Y141": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X58Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X61Y142": "TIEOFF"
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    "INT_L_X58Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
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                "words": 2
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        },
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            "TIEOFF_X61Y143": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X58Y144": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
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                "words": 2
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        },
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            "TIEOFF_X61Y144": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X58Y145": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "sites": {
            "TIEOFF_X61Y145": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X58Y146": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
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        "grid_y": 4,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X61Y146": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X58Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
                "frames": 28,
                "offset": 95,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 3,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X61Y147": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X58Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X61Y148": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X58Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
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        "grid_y": 1,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X61Y149": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X60Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
                "frames": 28,
                "offset": 0,
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        },
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        "pin_functions": {},
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            "TIEOFF_X64Y0": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X60Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
                "frames": 28,
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X64Y1": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X60Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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        "pin_functions": {},
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            "TIEOFF_X64Y2": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
                "frames": 28,
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        "pin_functions": {},
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            "TIEOFF_X64Y3": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
                "frames": 28,
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            "TIEOFF_X64Y4": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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            "TIEOFF_X64Y5": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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            "TIEOFF_X64Y6": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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            "TIEOFF_X64Y7": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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            "TIEOFF_X64Y8": "TIEOFF"
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    },
    "INT_L_X60Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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            "TIEOFF_X64Y9": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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            "TIEOFF_X64Y10": "TIEOFF"
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    "INT_L_X60Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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            "TIEOFF_X64Y11": "TIEOFF"
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    "INT_L_X60Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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            "TIEOFF_X64Y12": "TIEOFF"
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    },
    "INT_L_X60Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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            "TIEOFF_X64Y13": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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            "TIEOFF_X64Y14": "TIEOFF"
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    },
    "INT_L_X60Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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                "offset": 30,
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            "TIEOFF_X64Y15": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X60Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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            "TIEOFF_X64Y16": "TIEOFF"
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    "INT_L_X60Y17": {
        "bits": {
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            "TIEOFF_X64Y17": "TIEOFF"
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    },
    "INT_L_X60Y18": {
        "bits": {
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                "baseaddr": "0x00421E00",
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            "TIEOFF_X64Y18": "TIEOFF"
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    "INT_L_X60Y19": {
        "bits": {
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                "baseaddr": "0x00421E00",
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            "TIEOFF_X64Y19": "TIEOFF"
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    "INT_L_X60Y20": {
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                "baseaddr": "0x00421E00",
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            "TIEOFF_X64Y20": "TIEOFF"
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            "TIEOFF_X64Y21": "TIEOFF"
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    "INT_L_X60Y22": {
        "bits": {
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                "baseaddr": "0x00421E00",
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            "TIEOFF_X64Y22": "TIEOFF"
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    "INT_L_X60Y23": {
        "bits": {
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            "TIEOFF_X64Y23": "TIEOFF"
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            "TIEOFF_X64Y24": "TIEOFF"
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            "TIEOFF_X64Y25": "TIEOFF"
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    "INT_L_X60Y26": {
        "bits": {
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            "TIEOFF_X64Y26": "TIEOFF"
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    "INT_L_X60Y27": {
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            "TIEOFF_X64Y27": "TIEOFF"
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    "INT_L_X60Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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            "TIEOFF_X64Y28": "TIEOFF"
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    "INT_L_X60Y29": {
        "bits": {
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                "baseaddr": "0x00421E00",
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                "words": 2
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            "TIEOFF_X64Y29": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y30": {
        "bits": {
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                "baseaddr": "0x00421E00",
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                "words": 2
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            "TIEOFF_X64Y30": "TIEOFF"
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    },
    "INT_L_X60Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X64Y31": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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                "offset": 65,
                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X64Y32": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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                "offset": 67,
                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X64Y33": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X64Y34": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X64Y35": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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                "offset": 73,
                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X64Y36": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X60Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X64Y37": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y38": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X64Y38": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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                "offset": 79,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X64Y39": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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                "offset": 81,
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X64Y40": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X64Y41": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y42": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X64Y42": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y43": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X64Y43": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y44": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 150,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X64Y44": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y45": {
        "bits": {
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                "baseaddr": "0x00421E00",
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        },
        "clock_region": "X1Y0",
        "grid_x": 150,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X64Y45": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
                "frames": 28,
                "offset": 93,
                "words": 2
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            "TIEOFF_X64Y46": "TIEOFF"
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    "INT_L_X60Y47": {
        "bits": {
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                "baseaddr": "0x00421E00",
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            "TIEOFF_X64Y47": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00421E00",
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            "TIEOFF_X64Y48": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00421E00",
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            "TIEOFF_X64Y49": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401E00",
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            "TIEOFF_X64Y50": "TIEOFF"
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            "TIEOFF_X64Y81": "TIEOFF"
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    "INT_L_X60Y82": {
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            "TIEOFF_X64Y82": "TIEOFF"
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    "INT_L_X60Y83": {
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            "TIEOFF_X64Y83": "TIEOFF"
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    "INT_L_X60Y85": {
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            "TIEOFF_X64Y87": "TIEOFF"
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    "INT_L_X60Y88": {
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    "INT_L_X60Y89": {
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    "INT_L_X60Y91": {
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    "INT_L_X60Y92": {
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    "INT_L_X60Y93": {
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            "TIEOFF_X64Y93": "TIEOFF"
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    "INT_L_X60Y94": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X64Y94": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401E00",
                "frames": 28,
                "offset": 91,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X64Y95": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X60Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401E00",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
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            "TIEOFF_X64Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X60Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401E00",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
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            "TIEOFF_X64Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X60Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401E00",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
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            "TIEOFF_X64Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X60Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401E00",
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                "words": 2
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        },
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            "TIEOFF_X64Y99": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E00",
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            "TIEOFF_X64Y100": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E00",
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        },
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            "TIEOFF_X64Y101": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X64Y102": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E00",
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        },
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            "TIEOFF_X64Y103": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E00",
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        "bits": {
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        "bits": {
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        "bits": {
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            "TIEOFF_X64Y108": "TIEOFF"
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            "TIEOFF_X64Y113": "TIEOFF"
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            "TIEOFF_X64Y115": "TIEOFF"
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            "TIEOFF_X64Y123": "TIEOFF"
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            "TIEOFF_X64Y124": "TIEOFF"
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            "TIEOFF_X64Y125": "TIEOFF"
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    "INT_L_X60Y126": {
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            "TIEOFF_X64Y126": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X64Y127": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E00",
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                "words": 2
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        },
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            "TIEOFF_X64Y128": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y129": {
        "bits": {
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                "baseaddr": "0x00001E00",
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            "TIEOFF_X64Y129": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y130": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X64Y130": "TIEOFF"
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    },
    "INT_L_X60Y131": {
        "bits": {
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                "baseaddr": "0x00001E00",
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                "words": 2
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            "TIEOFF_X64Y131": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X60Y132": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X64Y132": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E00",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X64Y133": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y134": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X64Y134": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E00",
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                "words": 2
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        },
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            "TIEOFF_X64Y135": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y136": {
        "bits": {
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                "words": 2
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            "TIEOFF_X64Y136": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y137": {
        "bits": {
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                "baseaddr": "0x00001E00",
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        },
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            "TIEOFF_X64Y137": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E00",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X64Y138": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X60Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E00",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X64Y139": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X60Y140": {
        "bits": {
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                "baseaddr": "0x00001E00",
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                "words": 2
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            "TIEOFF_X64Y140": "TIEOFF"
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    "INT_L_X60Y141": {
        "bits": {
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        },
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            "TIEOFF_X64Y141": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y142": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X64Y142": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y143": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X64Y143": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y144": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E00",
                "frames": 28,
                "offset": 89,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X64Y144": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X60Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E00",
                "frames": 28,
                "offset": 91,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X64Y145": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X60Y146": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E00",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X64Y146": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X60Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E00",
                "frames": 28,
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        },
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            "TIEOFF_X64Y147": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E00",
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        },
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            "TIEOFF_X64Y148": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E00",
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            "TIEOFF_X64Y149": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X62Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421F00",
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            "TIEOFF_X66Y0": "TIEOFF"
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    },
    "INT_L_X62Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421F00",
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            "TIEOFF_X66Y1": "TIEOFF"
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    },
    "INT_L_X62Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421F00",
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            "TIEOFF_X66Y2": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421F00",
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            "TIEOFF_X66Y3": "TIEOFF"
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            "CLB_IO_CLK": {
                "baseaddr": "0x00421F00",
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            "TIEOFF_X66Y4": "TIEOFF"
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                "baseaddr": "0x00421F00",
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            "TIEOFF_X66Y6": "TIEOFF"
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            "TIEOFF_X66Y7": "TIEOFF"
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            "TIEOFF_X66Y8": "TIEOFF"
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            "TIEOFF_X66Y9": "TIEOFF"
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    "INT_L_X62Y31": {
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    "INT_L_X62Y32": {
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    "INT_L_X62Y33": {
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    "INT_L_X62Y34": {
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    "INT_L_X62Y37": {
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    "INT_L_X62Y39": {
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    "INT_L_X62Y42": {
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    "INT_L_X62Y43": {
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421F00",
                "frames": 28,
                "offset": 89,
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            "TIEOFF_X66Y44": "TIEOFF"
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    "INT_L_X62Y45": {
        "bits": {
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                "baseaddr": "0x00421F00",
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            "TIEOFF_X66Y45": "TIEOFF"
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                "baseaddr": "0x00421F00",
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        "type": "INT_L"
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        "bits": {
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        "bits": {
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    "INT_L_X62Y82": {
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    "INT_L_X62Y87": {
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    "INT_L_X62Y88": {
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    "INT_L_X62Y89": {
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    "INT_L_X62Y90": {
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    "INT_L_X62Y91": {
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        "type": "INT_L"
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    "INT_L_X62Y92": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X66Y92": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X62Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401F00",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X66Y93": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X62Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401F00",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X66Y94": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X62Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401F00",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X66Y95": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X62Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401F00",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X66Y96": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X62Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401F00",
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        },
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            "TIEOFF_X66Y97": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X62Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401F00",
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        },
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            "TIEOFF_X66Y98": "TIEOFF"
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    "INT_L_X62Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401F00",
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            "TIEOFF_X66Y99": "TIEOFF"
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                "baseaddr": "0x00001F00",
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            "TIEOFF_X66Y100": "TIEOFF"
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        "bits": {
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            "TIEOFF_X66Y101": "TIEOFF"
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    "INT_L_X62Y102": {
        "bits": {
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                "baseaddr": "0x00001F00",
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            "TIEOFF_X66Y103": "TIEOFF"
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    "INT_L_X62Y124": {
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    "INT_L_X62Y125": {
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            "TIEOFF_X66Y125": "TIEOFF"
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    "INT_L_X62Y126": {
        "bits": {
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        },
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            "TIEOFF_X66Y126": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00001F00",
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        },
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            "TIEOFF_X66Y127": "TIEOFF"
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    "INT_L_X62Y128": {
        "bits": {
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                "baseaddr": "0x00001F00",
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        },
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            "TIEOFF_X66Y128": "TIEOFF"
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    "INT_L_X62Y129": {
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        },
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    "INT_L_X62Y130": {
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    "INT_L_X62Y131": {
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    "INT_L_X62Y132": {
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        },
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    "INT_L_X62Y134": {
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    "INT_L_X62Y135": {
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    "INT_L_X62Y136": {
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    "INT_L_X62Y137": {
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        "type": "INT_L"
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    "INT_L_X62Y138": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X62Y139": {
        "bits": {
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        },
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        "type": "INT_L"
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    "INT_L_X62Y140": {
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        "type": "INT_L"
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    "INT_L_X62Y141": {
        "bits": {
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        },
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        "type": "INT_L"
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    "INT_L_X62Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001F00",
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                "offset": 85,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X66Y142": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X62Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001F00",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X66Y143": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X62Y144": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001F00",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X66Y144": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X62Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001F00",
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                "words": 2
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        },
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            "TIEOFF_X66Y145": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X62Y146": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001F00",
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        },
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        "sites": {
            "TIEOFF_X66Y146": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X62Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001F00",
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        },
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        "sites": {
            "TIEOFF_X66Y147": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X62Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001F00",
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                "words": 2
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        },
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            "TIEOFF_X66Y148": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X62Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001F00",
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        },
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            "TIEOFF_X66Y149": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
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            "TIEOFF_X69Y0": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
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            "TIEOFF_X69Y1": "TIEOFF"
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                "baseaddr": "0x00422000",
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            "TIEOFF_X69Y2": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
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            "TIEOFF_X69Y3": "TIEOFF"
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        "bits": {
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            "TIEOFF_X69Y4": "TIEOFF"
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            "TIEOFF_X69Y5": "TIEOFF"
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            "TIEOFF_X69Y6": "TIEOFF"
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            "TIEOFF_X69Y7": "TIEOFF"
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            "TIEOFF_X69Y8": "TIEOFF"
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            "TIEOFF_X69Y9": "TIEOFF"
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            "TIEOFF_X69Y10": "TIEOFF"
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            "TIEOFF_X69Y11": "TIEOFF"
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            "TIEOFF_X69Y12": "TIEOFF"
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            "TIEOFF_X69Y22": "TIEOFF"
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            "TIEOFF_X69Y23": "TIEOFF"
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            "TIEOFF_X69Y24": "TIEOFF"
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            "TIEOFF_X69Y25": "TIEOFF"
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    "INT_L_X64Y26": {
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            "TIEOFF_X69Y26": "TIEOFF"
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    "INT_L_X64Y27": {
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            "TIEOFF_X69Y27": "TIEOFF"
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    "INT_L_X64Y28": {
        "bits": {
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                "words": 2
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            "TIEOFF_X69Y28": "TIEOFF"
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    "INT_L_X64Y29": {
        "bits": {
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            "TIEOFF_X69Y29": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X64Y30": {
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                "baseaddr": "0x00422000",
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            "TIEOFF_X69Y30": "TIEOFF"
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    "INT_L_X64Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
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            "TIEOFF_X69Y31": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y32": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X69Y32": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y33": {
        "bits": {
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                "baseaddr": "0x00422000",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X69Y33": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y34": {
        "bits": {
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                "baseaddr": "0x00422000",
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                "words": 2
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            "TIEOFF_X69Y34": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y35": {
        "bits": {
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                "baseaddr": "0x00422000",
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        },
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            "TIEOFF_X69Y35": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y37": {
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        },
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        "type": "INT_L"
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    "INT_L_X64Y38": {
        "bits": {
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                "baseaddr": "0x00422000",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X64Y39": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X69Y39": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y40": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X69Y40": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X64Y41": {
        "bits": {
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                "baseaddr": "0x00422000",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X69Y41": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X69Y42": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X64Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X69Y43": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X64Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
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                "offset": 89,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X69Y44": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X64Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
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                "offset": 91,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X69Y45": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X64Y46": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
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                "offset": 93,
                "words": 2
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        },
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            "TIEOFF_X69Y46": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X64Y47": {
        "bits": {
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                "baseaddr": "0x00422000",
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                "words": 2
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        },
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            "TIEOFF_X69Y47": "TIEOFF"
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    "INT_L_X64Y48": {
        "bits": {
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                "baseaddr": "0x00422000",
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        },
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            "TIEOFF_X69Y48": "TIEOFF"
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                "baseaddr": "0x00402000",
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                "words": 2
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    "INT_L_X64Y75": {
        "bits": {
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                "words": 2
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            "TIEOFF_X69Y75": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y76": {
        "bits": {
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                "baseaddr": "0x00402000",
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                "offset": 53,
                "words": 2
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        },
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            "TIEOFF_X69Y76": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y77": {
        "bits": {
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                "baseaddr": "0x00402000",
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                "offset": 55,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X69Y77": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X64Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X69Y78": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
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                "offset": 59,
                "words": 2
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        "sites": {
            "TIEOFF_X69Y79": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00402000",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X69Y80": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00402000",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X69Y81": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y82": {
        "bits": {
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                "baseaddr": "0x00402000",
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                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X69Y82": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y83": {
        "bits": {
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                "baseaddr": "0x00402000",
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                "offset": 67,
                "words": 2
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X69Y83": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X69Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X64Y85": {
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                "baseaddr": "0x00402000",
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X69Y85": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00402000",
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X69Y86": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X64Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X69Y87": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y88": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X64Y89": {
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                "baseaddr": "0x00402000",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
    },
    "INT_L_X64Y90": {
        "bits": {
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                "baseaddr": "0x00402000",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
    },
    "INT_L_X64Y91": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X69Y91": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X64Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X69Y92": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X64Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X69Y93": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X64Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
                "frames": 28,
                "offset": 89,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X69Y94": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X64Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
                "frames": 28,
                "offset": 91,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X69Y95": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X64Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
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            "TIEOFF_X69Y96": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
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                "words": 2
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        },
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            "TIEOFF_X69Y97": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
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        },
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            "TIEOFF_X69Y98": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
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                "baseaddr": "0x00002000",
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            "CLB_IO_CLK": {
                "baseaddr": "0x00002000",
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        "bits": {
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            "TIEOFF_X69Y103": "TIEOFF"
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        "bits": {
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        "bits": {
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            "TIEOFF_X69Y125": "TIEOFF"
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    "INT_L_X64Y126": {
        "bits": {
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                "baseaddr": "0x00002000",
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            "TIEOFF_X69Y126": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002000",
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                "words": 2
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            "TIEOFF_X69Y127": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002000",
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                "words": 2
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            "TIEOFF_X69Y128": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X69Y129": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y130": {
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            "TIEOFF_X69Y130": "TIEOFF"
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    "INT_L_X64Y131": {
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        "type": "INT_L"
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    "INT_L_X64Y132": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X69Y132": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y133": {
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
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    "INT_L_X64Y134": {
        "bits": {
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                "words": 2
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        "type": "INT_L"
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    "INT_L_X64Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002000",
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                "words": 2
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        "clock_region": "X1Y2",
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        "sites": {
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        "type": "INT_L"
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    "INT_L_X64Y136": {
        "bits": {
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                "words": 2
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        "type": "INT_L"
    },
    "INT_L_X64Y137": {
        "bits": {
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X69Y137": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y138": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X69Y138": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y139": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
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    "INT_L_X64Y140": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "sites": {
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        "type": "INT_L"
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    "INT_L_X64Y141": {
        "bits": {
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                "words": 2
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002000",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
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            "TIEOFF_X69Y142": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        "type": "INT_L"
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    "INT_L_X64Y144": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X64Y145": {
        "bits": {
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        "bits": {
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    "INT_L_X64Y147": {
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        "bits": {
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    "INT_L_X66Y32": {
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    "INT_L_X66Y34": {
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    "INT_L_X66Y39": {
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        "type": "INT_L"
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    "INT_L_X66Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
                "frames": 28,
                "offset": 83,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X71Y41": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X66Y42": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
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                "offset": 85,
                "words": 2
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        },
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            "TIEOFF_X71Y42": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
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            "TIEOFF_X71Y43": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
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                "words": 2
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            "TIEOFF_X71Y44": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
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                "words": 2
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        },
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            "TIEOFF_X71Y45": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y46": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
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                "words": 2
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            "TIEOFF_X71Y46": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X66Y47": {
        "bits": {
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        },
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            "TIEOFF_X71Y47": "TIEOFF"
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        "bits": {
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        },
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                "baseaddr": "0x00422100",
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        "bits": {
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        "pin_functions": {},
        "sites": {
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        "bits": {
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                "baseaddr": "0x00402100",
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                "words": 2
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X66Y75": {
        "bits": {
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                "baseaddr": "0x00402100",
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                "words": 2
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            "TIEOFF_X71Y75": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X66Y76": {
        "bits": {
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                "baseaddr": "0x00402100",
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                "words": 2
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        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
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    "INT_L_X66Y77": {
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                "baseaddr": "0x00402100",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X71Y77": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X66Y78": {
        "bits": {
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                "baseaddr": "0x00402100",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X71Y78": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X66Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
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                "words": 2
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        "sites": {
            "TIEOFF_X71Y79": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00402100",
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                "words": 2
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        "sites": {
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        "type": "INT_L"
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    "INT_L_X66Y81": {
        "bits": {
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                "baseaddr": "0x00402100",
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X71Y81": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X66Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
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                "words": 2
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X66Y83": {
        "bits": {
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                "baseaddr": "0x00402100",
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                "words": 2
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        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
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    "INT_L_X66Y84": {
        "bits": {
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                "words": 2
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        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X71Y84": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X66Y85": {
        "bits": {
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X71Y85": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X66Y86": {
        "bits": {
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                "baseaddr": "0x00402100",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X71Y86": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X66Y87": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
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    "INT_L_X66Y88": {
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                "words": 2
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        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
    },
    "INT_L_X66Y89": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X71Y89": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X66Y90": {
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                "words": 2
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        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X71Y90": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
                "frames": 28,
                "offset": 83,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X71Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y92": {
        "bits": {
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                "baseaddr": "0x00402100",
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                "offset": 85,
                "words": 2
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            "TIEOFF_X71Y92": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X66Y93": {
        "bits": {
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                "baseaddr": "0x00402100",
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                "words": 2
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            "TIEOFF_X71Y93": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
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                "words": 2
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            "TIEOFF_X71Y94": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X66Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
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        },
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            "TIEOFF_X71Y95": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X66Y96": {
        "bits": {
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                "baseaddr": "0x00402100",
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        "bits": {
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        "bits": {
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                "baseaddr": "0x00402100",
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        "bits": {
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                "baseaddr": "0x00402100",
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        "bits": {
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    "INT_L_X66Y137": {
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        "sites": {
            "TIEOFF_X71Y140": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X66Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
                "frames": 28,
                "offset": 83,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X71Y141": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X66Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X71Y142": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X66Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X71Y143": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X66Y144": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
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                "offset": 89,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X71Y144": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X66Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X71Y145": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y146": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
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        },
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            "TIEOFF_X71Y146": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X66Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
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        },
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            "TIEOFF_X71Y147": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
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                "words": 2
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        },
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            "TIEOFF_X71Y148": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
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        },
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            "TIEOFF_X71Y149": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422200",
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            "TIEOFF_X73Y0": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422200",
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        },
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            "TIEOFF_X73Y1": "TIEOFF"
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                "baseaddr": "0x00422200",
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        },
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            "TIEOFF_X73Y2": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00422200",
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        },
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            "TIEOFF_X73Y3": "TIEOFF"
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        },
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            "TIEOFF_X73Y4": "TIEOFF"
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        "type": "INT_L"
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        },
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            "TIEOFF_X73Y5": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00422200",
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        },
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            "TIEOFF_X73Y6": "TIEOFF"
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                "baseaddr": "0x00422200",
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        },
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            "TIEOFF_X73Y7": "TIEOFF"
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                "baseaddr": "0x00422200",
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        },
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            "TIEOFF_X73Y8": "TIEOFF"
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                "baseaddr": "0x00422200",
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        },
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            "TIEOFF_X73Y9": "TIEOFF"
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                "baseaddr": "0x00422200",
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            "TIEOFF_X73Y10": "TIEOFF"
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        "bits": {
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            "TIEOFF_X73Y11": "TIEOFF"
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            "TIEOFF_X73Y16": "TIEOFF"
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            "TIEOFF_X73Y21": "TIEOFF"
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            "TIEOFF_X73Y23": "TIEOFF"
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        "bits": {
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        },
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            "TIEOFF_X73Y24": "TIEOFF"
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                "baseaddr": "0x00422200",
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                "words": 2
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        },
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            "TIEOFF_X73Y25": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00422200",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X73Y26": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00422200",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X73Y27": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y28": {
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                "baseaddr": "0x00422200",
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        },
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        "pin_functions": {},
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            "TIEOFF_X73Y28": "TIEOFF"
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    "INT_L_X68Y29": {
        "bits": {
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                "baseaddr": "0x00422200",
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X73Y29": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00422200",
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                "words": 2
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            "TIEOFF_X73Y30": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X68Y31": {
        "bits": {
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                "baseaddr": "0x00422200",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X73Y31": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X68Y32": {
        "bits": {
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                "baseaddr": "0x00422200",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X73Y32": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422200",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X73Y33": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y34": {
        "bits": {
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                "baseaddr": "0x00422200",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X73Y34": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y35": {
        "bits": {
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                "baseaddr": "0x00422200",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y35": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422200",
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                "offset": 73,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y36": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422200",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X73Y37": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y38": {
        "bits": {
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                "baseaddr": "0x00422200",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y38": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422200",
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                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 170,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y39": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422200",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 170,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y40": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422200",
                "frames": 28,
                "offset": 83,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y41": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y42": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422200",
                "frames": 28,
                "offset": 85,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y42": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422200",
                "frames": 28,
                "offset": 87,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 170,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y43": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422200",
                "frames": 28,
                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y44": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422200",
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                "offset": 91,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y45": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y46": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422200",
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                "offset": 93,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X73Y46": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422200",
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                "offset": 95,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X73Y47": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y48": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422200",
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                "offset": 97,
                "words": 2
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        },
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            "TIEOFF_X73Y48": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422200",
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                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X73Y49": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 0,
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        },
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            "TIEOFF_X73Y50": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 2,
                "words": 2
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        },
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            "TIEOFF_X73Y51": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y52": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 4,
                "words": 2
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        },
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            "TIEOFF_X73Y52": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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        },
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            "TIEOFF_X73Y53": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y54": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 8,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X73Y54": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 10,
                "words": 2
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        },
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            "TIEOFF_X73Y55": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y56": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 12,
                "words": 2
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        },
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            "TIEOFF_X73Y56": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 14,
                "words": 2
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        },
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            "TIEOFF_X73Y57": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y58": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 16,
                "words": 2
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        },
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            "TIEOFF_X73Y58": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X73Y59": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X68Y60": {
        "bits": {
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                "baseaddr": "0x00402200",
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                "offset": 20,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X73Y60": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y61": {
        "bits": {
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                "baseaddr": "0x00402200",
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                "offset": 22,
                "words": 2
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        },
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            "TIEOFF_X73Y61": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y62": {
        "bits": {
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                "baseaddr": "0x00402200",
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                "offset": 24,
                "words": 2
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        },
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            "TIEOFF_X73Y62": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X68Y63": {
        "bits": {
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                "baseaddr": "0x00402200",
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                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X73Y63": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y64": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "words": 2
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        },
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            "TIEOFF_X73Y64": "TIEOFF"
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    },
    "INT_L_X68Y65": {
        "bits": {
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                "baseaddr": "0x00402200",
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                "offset": 30,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X73Y65": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y66": {
        "bits": {
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                "baseaddr": "0x00402200",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X73Y66": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y67": {
        "bits": {
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                "baseaddr": "0x00402200",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X73Y67": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y68": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 38,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y69": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 40,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X73Y70": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y71": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 44,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y72": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 170,
        "grid_y": 80,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y73": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y74": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y75": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 76,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y76": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 170,
        "grid_y": 75,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y77": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 74,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y78": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 73,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y79": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 170,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y80": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y81": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 170,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y82": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 170,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y83": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 170,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y84": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 170,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y85": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 170,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 170,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y87": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 170,
        "grid_y": 64,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 170,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y89": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y90": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 83,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y91": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 60,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y92": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 87,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y93": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 89,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y94": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 91,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X73Y95": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "words": 2
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        },
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            "TIEOFF_X73Y96": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 95,
                "words": 2
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        },
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            "TIEOFF_X73Y97": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 97,
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        },
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            "TIEOFF_X73Y98": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402200",
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                "offset": 99,
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        },
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            "TIEOFF_X73Y99": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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        },
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            "TIEOFF_X73Y100": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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        },
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            "TIEOFF_X73Y101": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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        },
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            "TIEOFF_X73Y102": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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        },
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            "TIEOFF_X73Y103": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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        },
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            "TIEOFF_X73Y104": "TIEOFF"
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    "INT_L_X68Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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        },
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            "TIEOFF_X73Y105": "TIEOFF"
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    },
    "INT_L_X68Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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            "TIEOFF_X73Y106": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X68Y107": {
        "bits": {
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            "TIEOFF_X73Y107": "TIEOFF"
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    "INT_L_X68Y108": {
        "bits": {
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                "baseaddr": "0x00002200",
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        },
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            "TIEOFF_X73Y108": "TIEOFF"
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    "INT_L_X68Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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            "TIEOFF_X73Y109": "TIEOFF"
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    "INT_L_X68Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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            "TIEOFF_X73Y110": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00002200",
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            "TIEOFF_X73Y111": "TIEOFF"
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    "INT_L_X68Y112": {
        "bits": {
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        },
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            "TIEOFF_X73Y112": "TIEOFF"
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    "INT_L_X68Y113": {
        "bits": {
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        },
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            "TIEOFF_X73Y113": "TIEOFF"
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        "bits": {
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            "TIEOFF_X73Y114": "TIEOFF"
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    "INT_L_X68Y115": {
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            "TIEOFF_X73Y115": "TIEOFF"
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    "INT_L_X68Y116": {
        "bits": {
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                "baseaddr": "0x00002200",
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            "TIEOFF_X73Y116": "TIEOFF"
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        "bits": {
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            "TIEOFF_X73Y117": "TIEOFF"
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    "INT_L_X68Y118": {
        "bits": {
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                "baseaddr": "0x00002200",
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            "TIEOFF_X73Y118": "TIEOFF"
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    "INT_L_X68Y119": {
        "bits": {
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            "TIEOFF_X73Y119": "TIEOFF"
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    "INT_L_X68Y120": {
        "bits": {
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                "baseaddr": "0x00002200",
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        },
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            "TIEOFF_X73Y120": "TIEOFF"
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    "INT_L_X68Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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        },
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            "TIEOFF_X73Y121": "TIEOFF"
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    "INT_L_X68Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X73Y122": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X68Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X73Y123": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "offset": 48,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y124": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "offset": 51,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y125": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y126": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y127": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "grid_y": 22,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y128": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y129": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "offset": 61,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y130": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y131": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y132": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y133": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 170,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y134": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 170,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y135": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y136": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y136": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 170,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y137": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
                "frames": 28,
                "offset": 77,
                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 170,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y138": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 170,
        "grid_y": 11,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y139": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 170,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y140": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
                "frames": 28,
                "offset": 83,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y141": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y142": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
                "frames": 28,
                "offset": 87,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y143": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y144": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "offset": 89,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y144": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "offset": 91,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y145": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y146": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "sites": {
            "TIEOFF_X73Y146": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "offset": 95,
                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X73Y147": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "offset": 97,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "sites": {
            "TIEOFF_X73Y148": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "offset": 99,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X73Y149": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X70Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 0,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X75Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 2,
                "words": 2
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        },
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            "TIEOFF_X75Y1": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 4,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y2": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X70Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 6,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y3": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 8,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y4": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 10,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X75Y5": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 12,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y6": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y7": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 16,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X75Y8": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 18,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 20,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X75Y10": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X70Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 22,
                "words": 2
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        },
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            "TIEOFF_X75Y11": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y12": {
        "bits": {
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                "baseaddr": "0x00422300",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X75Y12": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y13": {
        "bits": {
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                "baseaddr": "0x00422300",
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                "offset": 26,
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X75Y13": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X70Y14": {
        "bits": {
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                "baseaddr": "0x00422300",
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        },
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        "pin_functions": {},
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            "TIEOFF_X75Y14": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X70Y15": {
        "bits": {
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                "baseaddr": "0x00422300",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X75Y15": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X70Y16": {
        "bits": {
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                "baseaddr": "0x00422300",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X75Y16": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y17": {
        "bits": {
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                "baseaddr": "0x00422300",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X75Y17": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y18": {
        "bits": {
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                "baseaddr": "0x00422300",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X75Y18": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y19": {
        "bits": {
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                "baseaddr": "0x00422300",
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                "offset": 38,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X75Y19": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 40,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X75Y20": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y21": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y22": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X70Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y23": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X70Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 48,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y24": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 51,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y25": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y26": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X70Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y27": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X70Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 57,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y28": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 59,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y29": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 61,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y30": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y31": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y32": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 67,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y33": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X70Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y34": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y35": {
        "bits": {
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                "baseaddr": "0x00422300",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y35": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y36": {
        "bits": {
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                "baseaddr": "0x00422300",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y36": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X70Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y37": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y38": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
                "frames": 28,
                "offset": 77,
                "words": 2
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                "baseaddr": "0x00402300",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X70Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402300",
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                "words": 2
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        },
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            "TIEOFF_X75Y89": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y90": {
        "bits": {
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                "baseaddr": "0x00402300",
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                "words": 2
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        },
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            "TIEOFF_X75Y90": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X70Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402300",
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                "words": 2
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        },
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            "TIEOFF_X75Y91": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X70Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402300",
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                "words": 2
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        },
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            "TIEOFF_X75Y92": "TIEOFF"
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    "INT_L_X70Y93": {
        "bits": {
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                "baseaddr": "0x00402300",
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        },
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            "TIEOFF_X75Y93": "TIEOFF"
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                "baseaddr": "0x00402300",
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            "TIEOFF_X75Y94": "TIEOFF"
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            "TIEOFF_X75Y95": "TIEOFF"
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                "baseaddr": "0x00402300",
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                "baseaddr": "0x00402300",
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                "baseaddr": "0x00402300",
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            "TIEOFF_X75Y101": "TIEOFF"
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            "TIEOFF_X75Y123": "TIEOFF"
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                "baseaddr": "0x00002300",
                "frames": 28,
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            "TIEOFF_X75Y138": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X75Y140": "TIEOFF"
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            "TIEOFF_X75Y141": "TIEOFF"
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            "TIEOFF_X75Y142": "TIEOFF"
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    "INT_L_X72Y34": {
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            "TIEOFF_X77Y36": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422400",
                "frames": 28,
                "offset": 75,
                "words": 2
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            "TIEOFF_X77Y37": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422400",
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                "words": 2
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            "TIEOFF_X77Y38": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422400",
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            "TIEOFF_X77Y39": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00422400",
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            "TIEOFF_X77Y40": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00422400",
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            "TIEOFF_X77Y41": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422400",
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            "TIEOFF_X77Y42": "TIEOFF"
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            "TIEOFF_X77Y69": "TIEOFF"
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            "TIEOFF_X77Y71": "TIEOFF"
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    "INT_L_X72Y72": {
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                "baseaddr": "0x00402400",
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                "words": 2
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        },
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            "TIEOFF_X77Y72": "TIEOFF"
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                "baseaddr": "0x00402400",
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            "TIEOFF_X77Y73": "TIEOFF"
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    "INT_L_X72Y74": {
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        },
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            "TIEOFF_X77Y74": "TIEOFF"
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    "INT_L_X72Y75": {
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                "baseaddr": "0x00402400",
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X77Y75": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X72Y76": {
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                "baseaddr": "0x00402400",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X77Y76": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X72Y77": {
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                "baseaddr": "0x00402400",
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        },
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        "pin_functions": {},
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            "TIEOFF_X77Y77": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00402400",
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        "pin_functions": {},
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            "TIEOFF_X77Y78": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00402400",
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                "baseaddr": "0x00402400",
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        "clock_region": "X1Y1",
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            "TIEOFF_X77Y80": "TIEOFF"
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        },
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        "pin_functions": {},
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            "TIEOFF_X77Y81": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X72Y82": {
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                "baseaddr": "0x00402400",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X77Y82": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X72Y83": {
        "bits": {
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                "baseaddr": "0x00402400",
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        },
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X72Y84": {
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        },
        "clock_region": "X1Y1",
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        "sites": {
            "TIEOFF_X77Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X72Y85": {
        "bits": {
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X77Y85": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X72Y86": {
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        "type": "INT_L"
    },
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                "baseaddr": "0x00402400",
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        "bits": {
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                "baseaddr": "0x00002400",
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                "offset": 73,
                "words": 2
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        },
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    "INT_L_X72Y137": {
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            "TIEOFF_X77Y138": "TIEOFF"
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            "TIEOFF_X77Y139": "TIEOFF"
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            "TIEOFF_X77Y140": "TIEOFF"
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            "TIEOFF_X1Y22": "TIEOFF"
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        "type": "INT_R"
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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        "type": "INT_R"
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X1Y33": {
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X1Y34": {
        "bits": {
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
    },
    "INT_R_X1Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
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        "grid_x": 5,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y35": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y36": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y37": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y38": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
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                "offset": 77,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y38": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X1Y39": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
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                "offset": 81,
                "words": 2
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        },
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            "TIEOFF_X1Y40": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
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                "words": 2
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        },
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            "TIEOFF_X1Y41": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y42": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
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                "words": 2
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        },
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            "TIEOFF_X1Y42": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
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        },
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            "TIEOFF_X1Y43": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y44": {
        "bits": {
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                "baseaddr": "0x00420080",
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        },
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            "TIEOFF_X1Y44": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y45": {
        "bits": {
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                "baseaddr": "0x00420080",
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        },
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            "TIEOFF_X1Y45": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y46": {
        "bits": {
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                "baseaddr": "0x00420080",
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        },
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            "TIEOFF_X1Y46": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y47": {
        "bits": {
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        },
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            "TIEOFF_X1Y47": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
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            "TIEOFF_X1Y48": "TIEOFF"
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        "type": "INT_R"
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        },
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            "TIEOFF_X1Y49": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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            "TIEOFF_X3Y0": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y1": {
        "bits": {
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        },
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        "type": "INT_R"
    },
    "INT_R_X3Y2": {
        "bits": {
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        },
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        "type": "INT_R"
    },
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        },
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            "TIEOFF_X3Y3": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X3Y16": {
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        },
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        "pin_functions": {},
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            "TIEOFF_X3Y16": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y17": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X3Y17": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y18": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X3Y18": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y19": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y19": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y20": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X3Y20": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y21": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X3Y21": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X3Y22": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y23": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X3Y23": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y24": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X3Y24": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y25": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "offset": 51,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y25": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y26": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X3Y26": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y27": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y27": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y28": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "offset": 57,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X3Y28": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y29": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y29": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y30": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y30": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y31": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y31": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y32": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y32": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y33": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y33": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y34": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
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            "TIEOFF_X3Y34": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
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            "TIEOFF_X3Y35": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y36": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X3Y36": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
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                "words": 2
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        },
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            "TIEOFF_X3Y37": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00420180",
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        },
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            "TIEOFF_X3Y38": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
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        },
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            "TIEOFF_X3Y39": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00420180",
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            "TIEOFF_X3Y40": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y41": {
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            "TIEOFF_X3Y41": "TIEOFF"
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    "INT_R_X3Y42": {
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                "baseaddr": "0x00420180",
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        },
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            "TIEOFF_X3Y42": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X3Y43": "TIEOFF"
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    "INT_R_X3Y44": {
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        "type": "INT_R"
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X5Y20": {
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                "words": 2
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            "TIEOFF_X5Y20": "TIEOFF"
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                "words": 2
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            "TIEOFF_X5Y21": "TIEOFF"
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                "words": 2
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            "TIEOFF_X5Y22": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y23": {
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X5Y24": {
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        "clock_region": "X0Y0",
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    "INT_R_X5Y25": {
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        "type": "INT_R"
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    "INT_R_X5Y26": {
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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        "type": "INT_R"
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
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        "type": "INT_R"
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    "INT_R_X5Y30": {
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X5Y31": {
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X5Y32": {
        "bits": {
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y32": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y33": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y33": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
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                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y34": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X5Y35": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
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                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X5Y36": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y37": {
        "bits": {
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                "baseaddr": "0x00420280",
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                "words": 2
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        },
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            "TIEOFF_X5Y37": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
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                "words": 2
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        },
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            "TIEOFF_X5Y38": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y39": {
        "bits": {
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                "baseaddr": "0x00420280",
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                "words": 2
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        },
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            "TIEOFF_X5Y39": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X5Y40": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y41": {
        "bits": {
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            "TIEOFF_X5Y41": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y42": {
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        "type": "INT_R"
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    "INT_R_X5Y43": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X5Y45": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X7Y17": {
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X7Y18": {
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            "TIEOFF_X7Y18": "TIEOFF"
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                "words": 2
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        },
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            "TIEOFF_X7Y19": "TIEOFF"
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                "words": 2
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        },
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    "INT_R_X7Y21": {
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            "TIEOFF_X7Y21": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X7Y22": "TIEOFF"
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    "INT_R_X7Y23": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X7Y28": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X7Y30": {
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    "INT_R_X7Y31": {
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        "type": "INT_R"
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    "INT_R_X7Y32": {
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X7Y33": {
        "bits": {
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                "words": 2
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X9Y33": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X9Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X9Y34": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X9Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
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                "offset": 71,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X9Y35": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X9Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
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                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X9Y36": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X9Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X9Y37": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X9Y38": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
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                "offset": 77,
                "words": 2
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        },
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            "TIEOFF_X9Y38": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X9Y39": {
        "bits": {
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                "baseaddr": "0x00420480",
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                "words": 2
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        },
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            "TIEOFF_X9Y39": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X9Y40": {
        "bits": {
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                "baseaddr": "0x00420480",
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        },
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            "TIEOFF_X9Y40": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X9Y41": {
        "bits": {
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                "baseaddr": "0x00420480",
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        },
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            "TIEOFF_X9Y41": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X9Y42": {
        "bits": {
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                "baseaddr": "0x00420480",
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        },
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            "TIEOFF_X9Y42": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X9Y43": {
        "bits": {
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                "baseaddr": "0x00420480",
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        },
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            "TIEOFF_X9Y43": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X9Y44": {
        "bits": {
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                "baseaddr": "0x00420480",
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        },
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        "type": "INT_R"
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    "INT_R_X9Y45": {
        "bits": {
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        },
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        "type": "INT_R"
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    "INT_R_X9Y46": {
        "bits": {
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        },
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        "type": "INT_R"
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    "INT_R_X9Y47": {
        "bits": {
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        },
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            "TIEOFF_X9Y47": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X9Y48": {
        "bits": {
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        },
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        "type": "INT_R"
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    "INT_R_X9Y49": {
        "bits": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X11Y0": {
        "bits": {
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            "TIEOFF_X12Y0": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y1": {
        "bits": {
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                "baseaddr": "0x00420580",
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        },
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        "type": "INT_R"
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    "INT_R_X11Y2": {
        "bits": {
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                "baseaddr": "0x00420580",
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        },
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            "TIEOFF_X12Y2": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y3": {
        "bits": {
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            "TIEOFF_X12Y3": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y4": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X11Y16": {
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                "baseaddr": "0x00420580",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X12Y16": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y17": {
        "bits": {
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                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X12Y17": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y18": {
        "bits": {
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                "baseaddr": "0x00420580",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X12Y18": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y19": {
        "bits": {
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                "baseaddr": "0x00420580",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X12Y19": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y20": {
        "bits": {
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                "baseaddr": "0x00420580",
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                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X12Y20": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y21": {
        "bits": {
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                "baseaddr": "0x00420580",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X12Y21": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y22": {
        "bits": {
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                "baseaddr": "0x00420580",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X12Y22": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y23": {
        "bits": {
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                "baseaddr": "0x00420580",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X12Y23": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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                "words": 2
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        "clock_region": "X0Y0",
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            "TIEOFF_X12Y24": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y25": {
        "bits": {
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                "baseaddr": "0x00420580",
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                "offset": 51,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X12Y25": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y26": {
        "bits": {
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                "baseaddr": "0x00420580",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X12Y26": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y27": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y28": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y29": {
        "bits": {
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                "baseaddr": "0x00420580",
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                "offset": 59,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y29": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y30": {
        "bits": {
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                "baseaddr": "0x00420580",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y30": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 32,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y31": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y32": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X11Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y33": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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                "words": 2
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        },
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            "TIEOFF_X12Y34": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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                "words": 2
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        },
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            "TIEOFF_X12Y35": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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        },
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            "TIEOFF_X12Y36": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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                "words": 2
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        },
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            "TIEOFF_X12Y37": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y38": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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        },
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            "TIEOFF_X12Y38": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y39": {
        "bits": {
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                "baseaddr": "0x00420580",
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        },
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            "TIEOFF_X12Y39": "TIEOFF"
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        "bits": {
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            "TIEOFF_X12Y40": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X12Y41": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y42": {
        "bits": {
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                "baseaddr": "0x00420580",
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            "TIEOFF_X12Y42": "TIEOFF"
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    "INT_R_X11Y43": {
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        },
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        "type": "INT_R"
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        "bits": {
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        "bits": {
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X13Y17": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X13Y18": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X14Y18": "TIEOFF"
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    "INT_R_X13Y19": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X14Y19": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y20": {
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                "words": 2
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        "clock_region": "X0Y0",
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            "TIEOFF_X14Y20": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y21": {
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                "baseaddr": "0x00420680",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X14Y21": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y22": {
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                "baseaddr": "0x00420680",
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X13Y23": {
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        "clock_region": "X0Y0",
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            "TIEOFF_X14Y23": "TIEOFF"
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    "INT_R_X13Y24": {
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                "baseaddr": "0x00420680",
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X13Y25": {
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X13Y26": {
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                "baseaddr": "0x00420680",
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X13Y27": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X14Y27": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y28": {
        "bits": {
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                "baseaddr": "0x00420680",
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X13Y29": {
        "bits": {
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y29": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y30": {
        "bits": {
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y30": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y31": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y31": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420680",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y32": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X13Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420680",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y33": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420680",
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                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X14Y34": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420680",
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                "offset": 71,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X14Y35": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420680",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X14Y36": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y37": {
        "bits": {
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                "baseaddr": "0x00420680",
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                "words": 2
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        },
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            "TIEOFF_X14Y37": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y38": {
        "bits": {
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                "baseaddr": "0x00420680",
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        },
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            "TIEOFF_X14Y38": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00420680",
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        },
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            "TIEOFF_X14Y39": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00420680",
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            "TIEOFF_X14Y40": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y41": {
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                "baseaddr": "0x00420680",
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        "type": "INT_R"
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    "INT_R_X13Y42": {
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        },
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    "INT_R_X13Y43": {
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    "INT_R_X13Y44": {
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        },
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        },
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    "INT_R_X13Y48": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X15Y17": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X15Y18": {
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                "words": 2
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    "INT_R_X15Y19": {
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                "words": 2
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            "TIEOFF_X17Y19": "TIEOFF"
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X15Y23": {
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        "type": "INT_R"
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    "INT_R_X15Y24": {
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        "type": "INT_R"
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    "INT_R_X15Y25": {
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    "INT_R_X15Y26": {
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X15Y28": {
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X15Y29": {
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X15Y30": {
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
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        "type": "INT_R"
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    "INT_R_X15Y31": {
        "bits": {
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                "baseaddr": "0x00420780",
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                "words": 2
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                "baseaddr": "0x00420780",
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    "INT_R_X17Y30": {
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
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                "offset": 63,
                "words": 2
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        },
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            "TIEOFF_X19Y31": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X17Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
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                "words": 2
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        },
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            "TIEOFF_X19Y32": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
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                "words": 2
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        },
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            "TIEOFF_X19Y33": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y34": {
        "bits": {
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                "baseaddr": "0x00420880",
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                "words": 2
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        },
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            "TIEOFF_X19Y34": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00420880",
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        },
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            "TIEOFF_X19Y35": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        "type": "INT_R"
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    "INT_R_X19Y16": {
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    "INT_R_X19Y19": {
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                "words": 2
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        "clock_region": "X0Y0",
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    "INT_R_X19Y25": {
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    "INT_R_X19Y26": {
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X19Y27": {
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X19Y28": {
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X19Y29": {
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X19Y30": {
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                "words": 2
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400980",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X21Y80": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X19Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400980",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X21Y81": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400980",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X21Y82": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X19Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400980",
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                "words": 2
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        },
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            "TIEOFF_X21Y83": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X19Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400980",
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                "words": 2
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        },
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            "TIEOFF_X21Y84": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X19Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400980",
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                "words": 2
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        },
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            "TIEOFF_X21Y85": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y86": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X21Y86": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y87": {
        "bits": {
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                "baseaddr": "0x00400980",
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                "words": 2
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        },
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            "TIEOFF_X21Y87": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y88": {
        "bits": {
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                "baseaddr": "0x00400980",
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                "words": 2
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        },
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            "TIEOFF_X21Y88": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400980",
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                "words": 2
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        },
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            "TIEOFF_X21Y89": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y90": {
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                "baseaddr": "0x00400980",
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X19Y91": {
        "bits": {
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                "baseaddr": "0x00400980",
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        },
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        "type": "INT_R"
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    "INT_R_X19Y92": {
        "bits": {
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X19Y93": {
        "bits": {
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        },
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        "type": "INT_R"
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    "INT_R_X19Y96": {
        "bits": {
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X19Y97": {
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                "words": 2
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    "INT_R_X19Y98": {
        "bits": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X19Y99": {
        "bits": {
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                "baseaddr": "0x00400980",
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                "offset": 99,
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        },
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        "bits": {
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    "INT_R_X19Y105": {
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    "INT_R_X19Y106": {
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        "type": "INT_R"
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    "INT_R_X19Y108": {
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        "type": "INT_R"
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    "INT_R_X19Y109": {
        "bits": {
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    "INT_R_X19Y110": {
        "bits": {
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    "INT_R_X19Y111": {
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    "INT_R_X19Y112": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X19Y113": {
        "bits": {
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X19Y114": {
        "bits": {
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            "TIEOFF_X21Y114": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y115": {
        "bits": {
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                "baseaddr": "0x00000980",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X21Y115": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y116": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X19Y117": {
        "bits": {
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                "baseaddr": "0x00000980",
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X19Y118": {
        "bits": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X19Y119": {
        "bits": {
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                "words": 2
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        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X19Y120": {
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                "words": 2
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        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X19Y121": {
        "bits": {
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        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X19Y122": {
        "bits": {
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                "baseaddr": "0x00000980",
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                "words": 2
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        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X19Y123": {
        "bits": {
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                "baseaddr": "0x00000980",
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                "words": 2
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            "TIEOFF_X21Y123": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y124": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X19Y125": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X19Y126": {
        "bits": {
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X19Y127": {
        "bits": {
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                "baseaddr": "0x00000980",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
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        "type": "INT_R"
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    "INT_R_X19Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000980",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y128": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X19Y129": {
        "bits": {
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                "baseaddr": "0x00000980",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y129": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X19Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000980",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X21Y130": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X19Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000980",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X21Y131": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X19Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000980",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X21Y132": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X19Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000980",
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                "words": 2
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        },
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            "TIEOFF_X21Y133": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y134": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X21Y134": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000980",
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                "words": 2
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        },
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            "TIEOFF_X21Y135": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
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            "TIEOFF_X21Y136": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000980",
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        },
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            "TIEOFF_X21Y137": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00000980",
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            "TIEOFF_X21Y138": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y139": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X21Y139": "TIEOFF"
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        "bits": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X19Y149": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X21Y1": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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            "TIEOFF_X23Y11": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X23Y12": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y13": {
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                "baseaddr": "0x00420A80",
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X23Y13": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y14": {
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X23Y14": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y15": {
        "bits": {
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                "baseaddr": "0x00420A80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X23Y15": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y16": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y16": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y17": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X23Y18": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y19": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X23Y20": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y21": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X23Y22": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y23": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X23Y24": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y25": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 56,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y26": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 56,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y27": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420A80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y28": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y29": {
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            "TIEOFF_X23Y78": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A80",
                "frames": 28,
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                "words": 2
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        "type": "INT_R"
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                "baseaddr": "0x00400A80",
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            "TIEOFF_X23Y80": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y81": {
        "bits": {
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            "TIEOFF_X23Y81": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y82": {
        "bits": {
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            "TIEOFF_X23Y82": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        "type": "INT_R"
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            "TIEOFF_X23Y84": "TIEOFF"
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    "INT_R_X21Y85": {
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            "TIEOFF_X23Y85": "TIEOFF"
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            "TIEOFF_X23Y86": "TIEOFF"
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    "INT_R_X21Y113": {
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    "INT_R_X21Y117": {
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    "INT_R_X21Y118": {
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        "type": "INT_R"
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    "INT_R_X21Y119": {
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    "INT_R_X21Y121": {
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    "INT_R_X21Y122": {
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        "type": "INT_R"
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    "INT_R_X21Y123": {
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    "INT_R_X21Y124": {
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    "INT_R_X21Y125": {
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    "INT_R_X21Y126": {
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        "type": "INT_R"
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            "TIEOFF_X23Y127": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X21Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X23Y128": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X21Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X23Y129": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
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                "words": 2
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        },
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            "TIEOFF_X23Y130": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
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        },
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            "TIEOFF_X23Y131": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
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                "words": 2
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        },
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            "TIEOFF_X23Y132": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
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        },
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            "TIEOFF_X23Y133": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y134": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00000A80",
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        },
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            "TIEOFF_X23Y134": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y135": {
        "bits": {
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                "baseaddr": "0x00000A80",
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        },
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            "TIEOFF_X23Y135": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
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            "TIEOFF_X23Y136": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y137": {
        "bits": {
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                "baseaddr": "0x00000A80",
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        },
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            "TIEOFF_X23Y137": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00000A80",
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        },
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            "TIEOFF_X23Y138": "TIEOFF"
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        "type": "INT_R"
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        },
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            "TIEOFF_X23Y139": "TIEOFF"
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            "TIEOFF_X23Y141": "TIEOFF"
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    "INT_R_X21Y142": {
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            "TIEOFF_X23Y142": "TIEOFF"
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            "TIEOFF_X23Y143": "TIEOFF"
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    "INT_R_X21Y144": {
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    "INT_R_X21Y145": {
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            "TIEOFF_X23Y145": "TIEOFF"
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    "INT_R_X21Y146": {
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            "TIEOFF_X23Y146": "TIEOFF"
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    "INT_R_X21Y147": {
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    "INT_R_X21Y148": {
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            "TIEOFF_X23Y148": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y149": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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            "TIEOFF_X25Y9": "TIEOFF"
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            "TIEOFF_X25Y10": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y11": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X25Y11": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y12": {
        "bits": {
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                "baseaddr": "0x00420B80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X25Y12": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y13": {
        "bits": {
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                "baseaddr": "0x00420B80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y13": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y14": {
        "bits": {
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                "baseaddr": "0x00420B80",
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                "words": 2
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        "clock_region": "X0Y0",
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            "TIEOFF_X25Y14": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y15": {
        "bits": {
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                "baseaddr": "0x00420B80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y15": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y16": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y17": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y18": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y19": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y20": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
                "frames": 28,
                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y21": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y22": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y23": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y24": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
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                "offset": 51,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y25": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 62,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y26": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X23Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
                "frames": 28,
                "offset": 55,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y27": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
                "frames": 28,
                "offset": 57,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X25Y28": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
                "frames": 28,
                "offset": 59,
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            "TIEOFF_X25Y29": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
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            "TIEOFF_X25Y30": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
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            "TIEOFF_X25Y31": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
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            "TIEOFF_X25Y32": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
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            "TIEOFF_X25Y33": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y34": {
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            "TIEOFF_X25Y34": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X25Y35": "TIEOFF"
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            "TIEOFF_X25Y36": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X23Y59": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X23Y61": {
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        "type": "INT_R"
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    "INT_R_X23Y62": {
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                "words": 2
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            "TIEOFF_X25Y62": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y63": {
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                "words": 2
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        "clock_region": "X0Y1",
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            "TIEOFF_X25Y63": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y64": {
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            "TIEOFF_X25Y64": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y65": {
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                "words": 2
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            "TIEOFF_X25Y65": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y66": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X23Y67": {
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                "words": 2
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        "clock_region": "X0Y1",
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        "type": "INT_R"
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    "INT_R_X23Y68": {
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                "words": 2
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            "TIEOFF_X25Y68": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y69": {
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                "words": 2
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            "TIEOFF_X25Y69": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y70": {
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                "words": 2
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        "clock_region": "X0Y1",
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        "type": "INT_R"
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    "INT_R_X23Y71": {
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X25Y71": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y72": {
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                "baseaddr": "0x00400B80",
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                "words": 2
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        "clock_region": "X0Y1",
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            "TIEOFF_X25Y72": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y73": {
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        },
        "clock_region": "X0Y1",
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            "TIEOFF_X25Y73": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y74": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X25Y74": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y75": {
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                "baseaddr": "0x00400B80",
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X25Y75": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y76": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X25Y76": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00400B80",
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        "type": "INT_R"
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            "TIEOFF_X25Y79": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y80": {
        "bits": {
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            "TIEOFF_X25Y80": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X25Y81": "TIEOFF"
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    "INT_R_X23Y82": {
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    "INT_R_X23Y116": {
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    "INT_R_X23Y117": {
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    "INT_R_X23Y118": {
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    "INT_R_X23Y119": {
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    "INT_R_X23Y120": {
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    "INT_R_X23Y121": {
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    "INT_R_X23Y122": {
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    "INT_R_X23Y123": {
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    "INT_R_X23Y124": {
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        "type": "INT_R"
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    "INT_R_X23Y125": {
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        "bits": {
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                "baseaddr": "0x00000B80",
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            "TIEOFF_X25Y126": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00000B80",
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        "type": "INT_R"
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                "baseaddr": "0x00000B80",
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X25Y18": {
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    "INT_R_X25Y20": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X25Y24": {
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        "pin_functions": {},
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            "TIEOFF_X27Y24": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X27Y25": "TIEOFF"
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                "baseaddr": "0x00420C80",
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        "type": "INT_R"
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    "INT_R_X25Y74": {
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            "TIEOFF_X27Y74": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y75": {
        "bits": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X25Y116": {
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    "INT_R_X25Y118": {
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    "INT_R_X25Y119": {
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    "INT_R_X25Y121": {
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    "INT_R_X25Y122": {
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        "type": "INT_R"
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    "INT_R_X25Y123": {
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            "TIEOFF_X27Y123": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
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            "TIEOFF_X27Y124": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y125": {
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                "baseaddr": "0x00000C80",
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            "TIEOFF_X27Y125": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y126": {
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            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X27Y126": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y127": {
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        },
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            "TIEOFF_X27Y127": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000C80",
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        },
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            "TIEOFF_X27Y128": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y129": {
        "bits": {
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            "TIEOFF_X27Y129": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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            "TIEOFF_X30Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y8": {
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X27Y9": {
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        "clock_region": "X0Y0",
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            "TIEOFF_X30Y9": "TIEOFF"
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        "type": "INT_R"
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                "words": 2
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        "type": "INT_R"
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                "baseaddr": "0x00420D80",
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X27Y13": {
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                "baseaddr": "0x00420D80",
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                "words": 2
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        "clock_region": "X0Y0",
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            "TIEOFF_X30Y13": "TIEOFF"
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        "type": "INT_R"
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                "words": 2
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00420D80",
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                "words": 2
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        "clock_region": "X0Y0",
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            "TIEOFF_X30Y15": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y16": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X30Y17": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y18": {
        "bits": {
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                "baseaddr": "0x00420D80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X30Y18": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X30Y19": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X30Y20": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y21": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 72,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y22": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00420D80",
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    "INT_R_X27Y71": {
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    "INT_R_X27Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
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        "grid_y": 81,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y72": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
                "offset": 46,
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        },
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        "pin_functions": {},
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            "TIEOFF_X30Y73": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X30Y74": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X30Y75": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X30Y76": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X30Y77": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
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                "words": 2
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        },
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            "TIEOFF_X30Y78": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
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                "words": 2
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            "TIEOFF_X30Y79": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D80",
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                "words": 2
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        },
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            "TIEOFF_X30Y80": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y81": {
        "bits": {
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                "baseaddr": "0x00400D80",
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                "words": 2
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            "TIEOFF_X30Y81": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y82": {
        "bits": {
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                "baseaddr": "0x00400D80",
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        },
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            "TIEOFF_X30Y82": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y83": {
        "bits": {
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                "baseaddr": "0x00400D80",
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        },
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        "type": "INT_R"
    },
    "INT_R_X27Y84": {
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                "baseaddr": "0x00400D80",
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            "TIEOFF_X30Y84": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y85": {
        "bits": {
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            "TIEOFF_X30Y85": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y86": {
        "bits": {
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                "baseaddr": "0x00400D80",
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            "TIEOFF_X30Y86": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y87": {
        "bits": {
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            "TIEOFF_X30Y87": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y88": {
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            "TIEOFF_X30Y88": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y89": {
        "bits": {
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                "baseaddr": "0x00400D80",
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            "TIEOFF_X30Y89": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y90": {
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                "words": 2
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            "TIEOFF_X30Y90": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y91": {
        "bits": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X27Y92": {
        "bits": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X27Y93": {
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    "INT_R_X27Y95": {
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                "words": 2
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        "type": "INT_R"
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X27Y98": {
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        "type": "INT_R"
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    "INT_R_X27Y99": {
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        "type": "INT_R"
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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    "INT_R_X27Y102": {
        "bits": {
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                "baseaddr": "0x00000D80",
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            "TIEOFF_X30Y102": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y103": {
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        },
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            "TIEOFF_X30Y103": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y104": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X30Y104": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D80",
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                "offset": 10,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X30Y105": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D80",
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                "offset": 12,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y106": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y107": {
        "bits": {
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                "baseaddr": "0x00000D80",
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y107": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y108": {
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                "baseaddr": "0x00000D80",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X30Y108": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y109": {
        "bits": {
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                "baseaddr": "0x00000D80",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X30Y109": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D80",
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                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X30Y110": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y111": {
        "bits": {
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                "baseaddr": "0x00000D80",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X30Y111": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y112": {
        "bits": {
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                "baseaddr": "0x00000D80",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y112": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D80",
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                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X30Y113": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D80",
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                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X30Y114": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D80",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X30Y115": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y116": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D80",
                "frames": 28,
                "offset": 34,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y117": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D80",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y118": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D80",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y119": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D80",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y120": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D80",
                "frames": 28,
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        "type": "INT_R"
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                "baseaddr": "0x00400E80",
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                "baseaddr": "0x00400E80",
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        "type": "INT_R"
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    "INT_R_X29Y108": {
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    "INT_R_X29Y109": {
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    "INT_R_X29Y110": {
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    "INT_R_X29Y113": {
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    "INT_R_X29Y114": {
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    "INT_R_X29Y115": {
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    "INT_R_X29Y116": {
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            "TIEOFF_X32Y116": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y117": {
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        "type": "INT_R"
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    "INT_R_X29Y118": {
        "bits": {
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        },
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        "type": "INT_R"
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    "INT_R_X29Y119": {
        "bits": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X31Y17": {
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
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    "INT_R_X31Y67": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y67": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
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            "TIEOFF_X34Y68": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
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            "TIEOFF_X34Y69": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00400F80",
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        "type": "INT_R"
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    "INT_R_X31Y71": {
        "bits": {
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                "baseaddr": "0x00400F80",
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            "TIEOFF_X34Y71": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y72": {
        "bits": {
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                "baseaddr": "0x00400F80",
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            "TIEOFF_X34Y72": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y73": {
        "bits": {
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            "TIEOFF_X34Y73": "TIEOFF"
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    "INT_R_X31Y74": {
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    "INT_R_X31Y75": {
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            "TIEOFF_X34Y76": "TIEOFF"
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            "TIEOFF_X34Y77": "TIEOFF"
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            "TIEOFF_X34Y78": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y102": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X34Y102": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y103": {
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                "baseaddr": "0x00000F80",
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                "words": 2
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            "TIEOFF_X34Y103": "TIEOFF"
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    "INT_R_X31Y104": {
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                "words": 2
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    "INT_R_X31Y105": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X31Y106": {
        "bits": {
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                "words": 2
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            "TIEOFF_X34Y106": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y107": {
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            "TIEOFF_X34Y107": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y108": {
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                "words": 2
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            "TIEOFF_X34Y108": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y109": {
        "bits": {
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                "baseaddr": "0x00000F80",
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                "words": 2
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            "TIEOFF_X34Y109": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y110": {
        "bits": {
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                "baseaddr": "0x00000F80",
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            "TIEOFF_X34Y110": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y111": {
        "bits": {
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                "baseaddr": "0x00000F80",
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        "clock_region": "X0Y2",
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            "TIEOFF_X34Y111": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y112": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y112": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y113": {
        "bits": {
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y113": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X34Y114": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y115": {
        "bits": {
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y115": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y116": {
        "bits": {
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y116": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X34Y117": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
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                "words": 2
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        },
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            "TIEOFF_X34Y118": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y119": {
        "bits": {
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                "baseaddr": "0x00000F80",
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                "words": 2
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            "TIEOFF_X34Y119": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
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                "words": 2
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            "TIEOFF_X34Y120": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y121": {
        "bits": {
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                "baseaddr": "0x00000F80",
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            "TIEOFF_X34Y121": "TIEOFF"
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    "INT_R_X31Y122": {
        "bits": {
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                "baseaddr": "0x00000F80",
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            "TIEOFF_X34Y122": "TIEOFF"
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    "INT_R_X31Y123": {
        "bits": {
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            "TIEOFF_X34Y123": "TIEOFF"
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            "TIEOFF_X34Y124": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X31Y142": {
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    "INT_R_X31Y147": {
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    "INT_R_X31Y148": {
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            "TIEOFF_X34Y148": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y149": {
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                "words": 2
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        "type": "INT_R"
    },
    "INT_R_X33Y0": {
        "bits": {
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                "baseaddr": "0x00421080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X36Y0": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y1": {
        "bits": {
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                "baseaddr": "0x00421080",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X36Y1": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y2": {
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                "baseaddr": "0x00421080",
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                "offset": 4,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y2": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y3": {
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                "baseaddr": "0x00421080",
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                "offset": 6,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X36Y3": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y4": {
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                "baseaddr": "0x00421080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X36Y4": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y5": {
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                "baseaddr": "0x00421080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X36Y5": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y6": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y6": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y7": {
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                "baseaddr": "0x00421080",
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X36Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y8": {
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                "baseaddr": "0x00421080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y8": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y9": {
        "bits": {
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                "baseaddr": "0x00421080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y9": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y10": {
        "bits": {
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                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y10": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y11": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y12": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y13": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y14": {
        "bits": {
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                "baseaddr": "0x00421080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y14": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y15": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
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                "baseaddr": "0x00421080",
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        "bits": {
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                "baseaddr": "0x00401080",
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                "words": 2
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        },
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            "TIEOFF_X36Y66": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
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                "words": 2
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        },
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            "TIEOFF_X36Y67": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
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                "words": 2
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        },
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            "TIEOFF_X36Y68": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y69": {
        "bits": {
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        },
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            "TIEOFF_X36Y69": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X36Y70": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y71": {
        "bits": {
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                "baseaddr": "0x00401080",
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            "TIEOFF_X36Y71": "TIEOFF"
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    "INT_R_X33Y72": {
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    "INT_R_X33Y73": {
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    "INT_R_X33Y98": {
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    "INT_R_X33Y100": {
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                "words": 2
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                "words": 2
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    "INT_R_X33Y106": {
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    "INT_R_X33Y107": {
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    "INT_R_X33Y108": {
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        "type": "INT_R"
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    "INT_R_X33Y109": {
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    "INT_R_X33Y110": {
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    "INT_R_X33Y111": {
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    "INT_R_X33Y112": {
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    "INT_R_X33Y113": {
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        "type": "INT_R"
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    "INT_R_X33Y114": {
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        "type": "INT_R"
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    "INT_R_X33Y115": {
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                "words": 2
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    "INT_R_X35Y15": {
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00401180",
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        },
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    "INT_R_X35Y109": {
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    "INT_R_X35Y110": {
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    "INT_R_X35Y113": {
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        "sites": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X35Y116": {
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        "type": "INT_R"
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    "INT_R_X35Y117": {
        "bits": {
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        },
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            "TIEOFF_X38Y117": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X35Y118": {
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        },
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    "INT_R_X35Y119": {
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    "INT_R_X35Y145": {
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    "INT_R_X35Y146": {
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    "INT_R_X35Y147": {
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    "INT_R_X35Y148": {
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        "type": "INT_R"
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    "INT_R_X35Y149": {
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        },
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    "INT_R_X37Y0": {
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        "type": "INT_R"
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    "INT_R_X37Y1": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X37Y7": {
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            "TIEOFF_X40Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y8": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X37Y9": {
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X40Y9": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y10": {
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                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X40Y10": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y11": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X40Y11": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y12": {
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        "clock_region": "X1Y0",
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            "TIEOFF_X40Y12": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
                "frames": 28,
                "offset": 26,
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                "baseaddr": "0x00421280",
                "frames": 28,
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            "TIEOFF_X40Y62": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X37Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y63": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X37Y64": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X40Y64": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
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                "offset": 30,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y65": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
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                "offset": 32,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X40Y66": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
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                "offset": 34,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X40Y67": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
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                "words": 2
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        },
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            "TIEOFF_X40Y68": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y69": {
        "bits": {
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                "baseaddr": "0x00401280",
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                "words": 2
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        },
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            "TIEOFF_X40Y69": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
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        },
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            "TIEOFF_X40Y70": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00401280",
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        },
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            "TIEOFF_X40Y71": "TIEOFF"
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    "INT_R_X37Y72": {
        "bits": {
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                "baseaddr": "0x00401280",
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        },
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            "TIEOFF_X40Y72": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401280",
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        },
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            "TIEOFF_X40Y73": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401280",
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            "TIEOFF_X40Y74": "TIEOFF"
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    "INT_R_X37Y75": {
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            "TIEOFF_X40Y75": "TIEOFF"
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            "TIEOFF_X40Y76": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y77": {
        "bits": {
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            "TIEOFF_X40Y77": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00401280",
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            "TIEOFF_X40Y78": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X40Y79": "TIEOFF"
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                "baseaddr": "0x00401280",
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                "baseaddr": "0x00401280",
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            "TIEOFF_X40Y81": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y82": {
        "bits": {
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            "TIEOFF_X40Y83": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y84": {
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            "TIEOFF_X40Y84": "TIEOFF"
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            "TIEOFF_X40Y85": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X40Y92": "TIEOFF"
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                "words": 2
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            "TIEOFF_X40Y93": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X40Y94": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y95": {
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        },
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            "TIEOFF_X40Y95": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y96": {
        "bits": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X40Y96": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y97": {
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                "baseaddr": "0x00401280",
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                "offset": 95,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X40Y97": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y98": {
        "bits": {
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                "baseaddr": "0x00401280",
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                "offset": 97,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X40Y98": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y99": {
        "bits": {
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                "baseaddr": "0x00401280",
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                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X40Y99": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y100": {
        "bits": {
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                "baseaddr": "0x00001280",
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X40Y100": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X40Y101": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X40Y102": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
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                "offset": 6,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X40Y103": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X37Y105": {
        "bits": {
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                "baseaddr": "0x00001280",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X40Y105": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y106": {
        "bits": {
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                "baseaddr": "0x00001280",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y106": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y107": {
        "bits": {
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                "baseaddr": "0x00001280",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y107": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y108": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y109": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y110": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 96,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X40Y111": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y112": {
        "bits": {
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                "baseaddr": "0x00001280",
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        },
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        "sites": {
            "TIEOFF_X40Y112": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
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        },
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            "TIEOFF_X40Y113": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
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        },
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            "TIEOFF_X40Y114": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X37Y115": {
        "bits": {
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        },
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            "TIEOFF_X40Y115": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y116": {
        "bits": {
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        },
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            "TIEOFF_X40Y116": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001280",
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        },
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            "TIEOFF_X40Y117": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y118": {
        "bits": {
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            "TIEOFF_X40Y118": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X37Y119": {
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            "TIEOFF_X40Y119": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X40Y120": "TIEOFF"
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            "TIEOFF_X40Y121": "TIEOFF"
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    "INT_R_X37Y122": {
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    "INT_R_X37Y145": {
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    "INT_R_X37Y146": {
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    "INT_R_X37Y147": {
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            "TIEOFF_X40Y147": "TIEOFF"
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    "INT_R_X37Y148": {
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        },
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    "INT_R_X37Y149": {
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        "type": "INT_R"
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    "INT_R_X39Y0": {
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        "type": "INT_R"
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    "INT_R_X39Y1": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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        "clock_region": "X1Y0",
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            "TIEOFF_X42Y2": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y3": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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                "baseaddr": "0x00421380",
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            "TIEOFF_X42Y4": "TIEOFF"
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        "type": "INT_R"
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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        "clock_region": "X1Y0",
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            "TIEOFF_X42Y6": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y7": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X42Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y8": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X42Y8": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y9": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X42Y9": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y10": {
        "bits": {
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        },
        "clock_region": "X1Y0",
        "grid_x": 101,
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        "pin_functions": {},
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            "TIEOFF_X42Y10": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y11": {
        "bits": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421380",
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                "words": 2
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            "TIEOFF_X42Y12": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00421380",
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            "TIEOFF_X42Y13": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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                "baseaddr": "0x00421380",
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    "INT_R_X39Y54": {
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    "INT_R_X39Y60": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y60": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y1",
        "grid_x": 101,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y61": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X39Y62": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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                "offset": 24,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y62": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X39Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y63": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y64": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X42Y64": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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                "offset": 30,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X42Y65": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X42Y66": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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                "words": 2
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        },
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            "TIEOFF_X42Y67": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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        },
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            "TIEOFF_X42Y68": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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        },
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            "TIEOFF_X42Y69": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y70": {
        "bits": {
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                "baseaddr": "0x00401380",
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        },
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            "TIEOFF_X42Y70": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y71": {
        "bits": {
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                "baseaddr": "0x00401380",
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        },
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            "TIEOFF_X42Y71": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y72": {
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                "baseaddr": "0x00401380",
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        },
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            "TIEOFF_X42Y72": "TIEOFF"
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    "INT_R_X39Y73": {
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        },
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            "TIEOFF_X42Y73": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y74": {
        "bits": {
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                "baseaddr": "0x00401380",
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        },
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            "TIEOFF_X42Y74": "TIEOFF"
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    "INT_R_X39Y75": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X42Y75": "TIEOFF"
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    "INT_R_X39Y76": {
        "bits": {
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        },
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            "TIEOFF_X42Y76": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y77": {
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            "TIEOFF_X42Y77": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y78": {
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                "baseaddr": "0x00401380",
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        },
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            "TIEOFF_X42Y78": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y79": {
        "bits": {
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                "baseaddr": "0x00401380",
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            "TIEOFF_X42Y79": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y80": {
        "bits": {
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                "baseaddr": "0x00401380",
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        },
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            "TIEOFF_X42Y80": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y81": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X39Y82": {
        "bits": {
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            "TIEOFF_X42Y82": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y83": {
        "bits": {
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        },
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        "type": "INT_R"
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    "INT_R_X39Y84": {
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            "TIEOFF_X42Y84": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y85": {
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            "TIEOFF_X42Y85": "TIEOFF"
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        },
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            "TIEOFF_X42Y86": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y87": {
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        "type": "INT_R"
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    "INT_R_X39Y88": {
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        "type": "INT_R"
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    "INT_R_X39Y89": {
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        },
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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    "INT_R_X39Y91": {
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        "type": "INT_R"
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    "INT_R_X39Y92": {
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X42Y92": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y93": {
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                "baseaddr": "0x00401380",
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X42Y93": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y94": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X42Y94": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y95": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X42Y95": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y96": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X42Y96": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y97": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "offset": 95,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X42Y97": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X42Y98": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y99": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y99": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X42Y100": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
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                "offset": 2,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X42Y101": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y102": {
        "bits": {
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                "baseaddr": "0x00001380",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y102": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y103": {
        "bits": {
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                "baseaddr": "0x00001380",
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                "offset": 6,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X42Y103": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X42Y104": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y105": {
        "bits": {
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                "baseaddr": "0x00001380",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y105": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y106": {
        "bits": {
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                "baseaddr": "0x00001380",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X42Y106": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y107": {
        "bits": {
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                "baseaddr": "0x00001380",
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y107": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y108": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y108": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y109": {
        "bits": {
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                "baseaddr": "0x00001380",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 101,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y109": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
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        },
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        "sites": {
            "TIEOFF_X42Y110": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
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                "words": 2
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        },
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            "TIEOFF_X42Y111": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
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        },
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            "TIEOFF_X42Y112": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
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        },
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            "TIEOFF_X42Y113": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y114": {
        "bits": {
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        },
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            "TIEOFF_X42Y114": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y115": {
        "bits": {
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                "baseaddr": "0x00001380",
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            "TIEOFF_X42Y115": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y116": {
        "bits": {
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                "baseaddr": "0x00001380",
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            "TIEOFF_X42Y116": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y117": {
        "bits": {
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        },
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            "TIEOFF_X42Y117": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y118": {
        "bits": {
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            "TIEOFF_X42Y118": "TIEOFF"
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    "INT_R_X39Y130": {
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    "INT_R_X39Y142": {
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    "INT_R_X39Y143": {
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    "INT_R_X39Y144": {
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    "INT_R_X39Y145": {
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        "type": "INT_R"
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    "INT_R_X39Y146": {
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    "INT_R_X39Y147": {
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        },
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        "type": "INT_R"
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    "INT_R_X39Y148": {
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        },
        "clock_region": "X1Y2",
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        "type": "INT_R"
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    "INT_R_X39Y149": {
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        "type": "INT_R"
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    "INT_R_X41Y0": {
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                "baseaddr": "0x00421480",
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X41Y1": {
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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    "INT_R_X41Y3": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X44Y3": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X41Y4": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X41Y5": {
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                "baseaddr": "0x00421480",
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_R"
    },
    "INT_R_X41Y7": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X44Y7": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y8": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y8": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y9": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y9": "TIEOFF"
        },
        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
                "frames": 28,
                "offset": 20,
                "words": 2
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            "TIEOFF_X44Y10": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00421480",
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            "TIEOFF_X44Y11": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
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            "TIEOFF_X44Y12": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
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            "TIEOFF_X44Y13": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X41Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
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            "TIEOFF_X44Y14": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X44Y15": "TIEOFF"
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    "INT_R_X41Y17": {
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    "INT_R_X41Y45": {
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    "INT_R_X41Y52": {
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    "INT_R_X41Y53": {
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    "INT_R_X41Y54": {
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        "clock_region": "X1Y1",
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    "INT_R_X41Y55": {
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        "type": "INT_R"
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    "INT_R_X41Y57": {
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        "type": "INT_R"
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    "INT_R_X41Y58": {
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        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X44Y58": "TIEOFF"
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        "type": "INT_R"
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        },
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    },
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                "baseaddr": "0x00401480",
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        },
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        },
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        },
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        "type": "INT_R"
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    "INT_R_X41Y102": {
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    "INT_R_X41Y103": {
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    "INT_R_X41Y105": {
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        "type": "INT_R"
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    "INT_R_X41Y106": {
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        "type": "INT_R"
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        "clock_region": "X1Y2",
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        "type": "INT_R"
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    "INT_R_X41Y108": {
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                "offset": 16,
                "words": 2
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    },
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        "bits": {
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                "baseaddr": "0x00001480",
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        "type": "INT_R"
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            "TIEOFF_X44Y111": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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        "pin_functions": {},
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            "TIEOFF_X46Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X43Y57": {
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        "type": "INT_R"
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    "INT_R_X45Y6": {
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            "TIEOFF_X48Y6": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00421680",
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            "TIEOFF_X48Y7": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X48Y8": "TIEOFF"
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        "type": "INT_R"
    },
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            "TIEOFF_X48Y9": "TIEOFF"
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    "INT_R_X47Y1": {
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        "type": "INT_R"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421780",
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421880",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X52Y5": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X52Y6": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X52Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X51Y2": {
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        "type": "INT_R"
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    "INT_R_X51Y3": {
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00421980",
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        "type": "INT_R"
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    "INT_R_X51Y102": {
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00001980",
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        "type": "INT_R"
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                "baseaddr": "0x00421A80",
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        "type": "INT_R"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421B80",
                "frames": 28,
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        "type": "INT_R"
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        "type": "INT_R"
    },
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        "bits": {
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        "type": "INT_R"
    },
    "INT_R_X55Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 28,
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X61Y42": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00001E80",
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                "offset": 85,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X65Y142": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X61Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E80",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X65Y143": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X61Y144": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E80",
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                "words": 2
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        },
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            "TIEOFF_X65Y144": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X61Y145": {
        "bits": {
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                "baseaddr": "0x00001E80",
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                "words": 2
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        },
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            "TIEOFF_X65Y145": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X61Y146": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E80",
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                "offset": 93,
                "words": 2
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        },
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            "TIEOFF_X65Y146": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X61Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E80",
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                "offset": 95,
                "words": 2
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        },
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            "TIEOFF_X65Y147": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X61Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E80",
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        },
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            "TIEOFF_X65Y148": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X61Y149": {
        "bits": {
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                "baseaddr": "0x00001E80",
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        },
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            "TIEOFF_X65Y149": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00421F80",
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        "type": "INT_R"
    },
    "INT_R_X63Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421F80",
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            "TIEOFF_X67Y1": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X63Y2": {
        "bits": {
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                "baseaddr": "0x00421F80",
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            "TIEOFF_X67Y2": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X63Y3": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00421F80",
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            "TIEOFF_X67Y3": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X63Y4": {
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            "CLB_IO_CLK": {
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            "TIEOFF_X67Y4": "TIEOFF"
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    },
    "INT_R_X63Y5": {
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                "baseaddr": "0x00421F80",
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            "TIEOFF_X67Y5": "TIEOFF"
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        "type": "INT_R"
    },
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                "baseaddr": "0x00421F80",
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            "TIEOFF_X67Y6": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X63Y7": {
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            "TIEOFF_X67Y7": "TIEOFF"
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        "type": "INT_R"
    },
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            "TIEOFF_X67Y8": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X63Y23": {
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        "type": "INT_R"
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    "INT_R_X63Y24": {
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        "type": "INT_R"
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    "INT_R_X63Y25": {
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        "clock_region": "X1Y0",
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            "TIEOFF_X67Y25": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X63Y26": {
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                "baseaddr": "0x00421F80",
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        "clock_region": "X1Y0",
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            "TIEOFF_X67Y26": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X63Y27": {
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                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X67Y27": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X63Y28": {
        "bits": {
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                "baseaddr": "0x00421F80",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X67Y28": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X63Y29": {
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                "baseaddr": "0x00421F80",
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X67Y29": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X63Y30": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X67Y30": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X63Y31": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X67Y31": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X63Y32": {
        "bits": {
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                "baseaddr": "0x00421F80",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X67Y32": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X63Y33": {
        "bits": {
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                "baseaddr": "0x00421F80",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X67Y33": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X63Y34": {
        "bits": {
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                "baseaddr": "0x00421F80",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X67Y34": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X63Y35": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X67Y35": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X63Y36": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X67Y36": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X63Y37": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X67Y37": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X63Y38": {
        "bits": {
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                "baseaddr": "0x00421F80",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X67Y38": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X63Y39": {
        "bits": {
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                "baseaddr": "0x00421F80",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X67Y39": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X63Y40": {
        "bits": {
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                "baseaddr": "0x00421F80",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X67Y40": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X63Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421F80",
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        "type": "INT_R"
    },
    "INT_R_X63Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401F80",
                "frames": 28,
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                "words": 2
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    "INT_R_X63Y92": {
        "bits": {
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    "INT_R_X63Y93": {
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            "TIEOFF_X67Y94": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X63Y126": {
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    "INT_R_X63Y134": {
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    "INT_R_X63Y135": {
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    "INT_R_X63Y137": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00001F80",
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                "words": 2
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        },
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            "TIEOFF_X67Y140": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X63Y141": {
        "bits": {
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        },
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        "type": "INT_R"
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    "INT_R_X63Y142": {
        "bits": {
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                "baseaddr": "0x00001F80",
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        },
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        "type": "INT_R"
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    "INT_R_X63Y143": {
        "bits": {
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            "TIEOFF_X67Y143": "TIEOFF"
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    "INT_R_X63Y144": {
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                "baseaddr": "0x00001F80",
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    "INT_R_X63Y145": {
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        },
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            "TIEOFF_X67Y145": "TIEOFF"
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    "INT_R_X63Y146": {
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    "INT_R_X63Y147": {
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    "INT_R_X65Y27": {
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        "type": "INT_R"
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    "INT_R_X65Y28": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X65Y31": {
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        "type": "INT_R"
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    "INT_R_X65Y32": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X65Y33": {
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        "type": "INT_R"
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    "INT_R_X65Y34": {
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        "clock_region": "X1Y0",
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    "INT_R_X65Y35": {
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    "INT_R_X65Y36": {
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        "type": "INT_R"
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    "INT_R_X65Y37": {
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        "clock_region": "X1Y0",
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            "TIEOFF_X70Y37": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X65Y38": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X65Y39": {
        "bits": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00002080",
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                "offset": 77,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X70Y138": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X65Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002080",
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                "offset": 79,
                "words": 2
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        },
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            "TIEOFF_X70Y139": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X65Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002080",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X70Y140": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X65Y141": {
        "bits": {
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                "baseaddr": "0x00002080",
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                "offset": 83,
                "words": 2
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        },
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            "TIEOFF_X70Y141": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X65Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002080",
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                "words": 2
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        },
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            "TIEOFF_X70Y142": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X65Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002080",
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        },
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            "TIEOFF_X70Y143": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X65Y144": {
        "bits": {
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                "baseaddr": "0x00002080",
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                "words": 2
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        },
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            "TIEOFF_X70Y144": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X65Y145": {
        "bits": {
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                "baseaddr": "0x00002080",
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        },
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            "TIEOFF_X70Y145": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X65Y146": {
        "bits": {
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        },
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            "TIEOFF_X70Y146": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X65Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002080",
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                "words": 2
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        },
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            "TIEOFF_X70Y147": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X65Y148": {
        "bits": {
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                "baseaddr": "0x00002080",
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        },
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        "type": "INT_R"
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    "INT_R_X65Y149": {
        "bits": {
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                "baseaddr": "0x00002080",
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                "words": 2
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        },
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            "TIEOFF_X70Y149": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00422180",
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            "TIEOFF_X72Y0": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00422180",
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        },
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            "TIEOFF_X72Y1": "TIEOFF"
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        "type": "INT_R"
    },
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                "baseaddr": "0x00422180",
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        },
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            "TIEOFF_X72Y2": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y3": {
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        },
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            "TIEOFF_X72Y3": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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        },
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            "TIEOFF_X72Y4": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00422180",
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                "words": 2
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        },
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            "TIEOFF_X72Y5": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
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            "TIEOFF_X72Y6": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y7": {
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        },
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            "TIEOFF_X72Y7": "TIEOFF"
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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    "INT_R_X67Y9": {
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            "TIEOFF_X72Y9": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X67Y17": {
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        },
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        "type": "INT_R"
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    "INT_R_X67Y18": {
        "bits": {
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        "type": "INT_R"
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        },
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            "TIEOFF_X72Y19": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y20": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X72Y20": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X67Y21": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X72Y21": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y22": {
        "bits": {
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                "baseaddr": "0x00422180",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X72Y22": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y23": {
        "bits": {
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                "baseaddr": "0x00422180",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X72Y23": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y24": {
        "bits": {
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                "baseaddr": "0x00422180",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X72Y24": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y25": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X72Y25": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X67Y26": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X72Y26": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y27": {
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                "baseaddr": "0x00422180",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X72Y27": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y28": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X72Y28": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y29": {
        "bits": {
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                "baseaddr": "0x00422180",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X72Y29": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y30": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X72Y30": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y31": {
        "bits": {
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                "baseaddr": "0x00422180",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X72Y31": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y32": {
        "bits": {
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                "baseaddr": "0x00422180",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X72Y32": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X67Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422180",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X72Y33": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y34": {
        "bits": {
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                "baseaddr": "0x00422180",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X72Y34": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y35": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "sites": {
            "TIEOFF_X72Y35": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y36": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X72Y36": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y37": {
        "bits": {
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                "words": 2
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        },
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                "baseaddr": "0x00422180",
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    "INT_R_X67Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402180",
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                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X72Y87": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X67Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402180",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X72Y88": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X67Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402180",
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                "offset": 79,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X72Y89": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X67Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402180",
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                "words": 2
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        },
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            "TIEOFF_X72Y90": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X67Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402180",
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                "words": 2
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        },
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            "TIEOFF_X72Y91": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X67Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402180",
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                "words": 2
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        },
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            "TIEOFF_X72Y92": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402180",
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                "words": 2
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        },
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            "TIEOFF_X72Y93": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y94": {
        "bits": {
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                "baseaddr": "0x00402180",
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            "TIEOFF_X72Y94": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X67Y95": {
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                "baseaddr": "0x00402180",
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        "type": "INT_R"
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    "INT_R_X67Y96": {
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                "baseaddr": "0x00402180",
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        },
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                "baseaddr": "0x00402180",
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                "baseaddr": "0x00402180",
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                "baseaddr": "0x00402180",
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        },
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        "type": "INT_R"
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    "INT_R_X67Y106": {
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    "INT_R_X67Y108": {
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    "INT_R_X67Y109": {
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    "INT_R_X67Y113": {
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    "INT_R_X67Y116": {
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    "INT_R_X67Y117": {
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    "INT_R_X67Y118": {
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    "INT_R_X67Y119": {
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    "INT_R_X67Y120": {
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        "type": "INT_R"
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    "INT_R_X67Y121": {
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    "INT_R_X67Y122": {
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            "TIEOFF_X72Y122": "TIEOFF"
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    "INT_R_X67Y123": {
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    "INT_R_X67Y124": {
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    "INT_R_X67Y125": {
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            "TIEOFF_X72Y125": "TIEOFF"
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    "INT_R_X67Y126": {
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        "type": "INT_R"
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    "INT_R_X67Y127": {
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        "type": "INT_R"
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    "INT_R_X67Y128": {
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        "type": "INT_R"
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    "INT_R_X67Y129": {
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    "INT_R_X67Y130": {
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        "type": "INT_R"
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    "INT_R_X67Y131": {
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    "INT_R_X67Y132": {
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    "INT_R_X67Y133": {
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        "type": "INT_R"
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    "INT_R_X67Y134": {
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        "clock_region": "X1Y2",
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        "type": "INT_R"
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    "INT_R_X67Y135": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X67Y136": {
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                "words": 2
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                "baseaddr": "0x00002180",
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    "INT_R_X69Y31": {
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    "INT_R_X69Y32": {
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    "INT_R_X69Y33": {
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    "INT_R_X69Y34": {
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    "INT_R_X69Y35": {
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        "type": "INT_R"
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    "INT_R_X69Y36": {
        "bits": {
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                "baseaddr": "0x00422280",
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                "offset": 73,
                "words": 2
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        },
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            "TIEOFF_X74Y36": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X69Y37": {
        "bits": {
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                "baseaddr": "0x00422280",
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        },
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            "TIEOFF_X74Y37": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00422280",
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        },
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            "TIEOFF_X74Y38": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X69Y39": {
        "bits": {
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            "TIEOFF_X74Y39": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00422280",
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            "TIEOFF_X74Y40": "TIEOFF"
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    "INT_R_X69Y41": {
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                "baseaddr": "0x00422280",
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    "INT_R_X69Y42": {
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    "INT_R_X69Y43": {
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    "INT_R_X69Y69": {
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    "INT_R_X69Y73": {
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        "type": "INT_R"
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    "INT_R_X69Y74": {
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    "INT_R_X69Y79": {
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        "type": "INT_R"
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    "INT_R_X69Y82": {
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        "type": "INT_R"
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    "INT_R_X69Y83": {
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        "type": "INT_R"
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    "INT_R_X69Y84": {
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        },
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        "type": "INT_R"
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    "INT_R_X69Y85": {
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                "words": 2
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00402280",
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    "INT_R_X69Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 171,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X74Y135": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X69Y136": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 171,
        "grid_y": 14,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X74Y136": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X69Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 171,
        "grid_y": 13,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X74Y137": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X69Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 12,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X74Y138": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X69Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 171,
        "grid_y": 11,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X74Y139": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X69Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X74Y140": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X69Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
                "frames": 28,
                "offset": 83,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X74Y141": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X69Y142": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X74Y142": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X69Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
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                "offset": 87,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X74Y143": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X69Y144": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
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                "offset": 89,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X74Y144": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X69Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
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                "offset": 91,
                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X74Y145": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X69Y146": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
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                "offset": 93,
                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X74Y146": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X69Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
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                "offset": 95,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X74Y147": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X69Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
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                "offset": 97,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X74Y148": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X69Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
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                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "sites": {
            "TIEOFF_X74Y149": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
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                "offset": 0,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y0": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 2,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y1": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y2": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
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                "offset": 6,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y3": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
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                "offset": 8,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X76Y4": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
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                "offset": 10,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y5": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y6": {
        "bits": {
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                "baseaddr": "0x00422380",
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                "offset": 12,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y6": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y7": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y8": {
        "bits": {
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                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 16,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y8": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y9": {
        "bits": {
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                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X76Y9": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y10": {
        "bits": {
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                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X76Y10": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y11": {
        "bits": {
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                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X76Y11": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y12": {
        "bits": {
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                "baseaddr": "0x00422380",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X76Y12": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y13": {
        "bits": {
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                "baseaddr": "0x00422380",
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                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X76Y13": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y14": {
        "bits": {
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                "baseaddr": "0x00422380",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X76Y14": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
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                "offset": 30,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X76Y15": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y16": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y17": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X71Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 137,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y18": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X71Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y19": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X71Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 175,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y20": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X71Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 175,
        "grid_y": 134,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y21": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X71Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y22": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "grid_y": 132,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y23": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X71Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y24": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 175,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y25": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 175,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y26": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 175,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y27": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X71Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 175,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y28": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 175,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y29": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X71Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 175,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y30": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X71Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 175,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y31": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X71Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 175,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y32": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X71Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 175,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y33": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X71Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "sites": {
            "TIEOFF_X76Y34": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X76Y35": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
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                "words": 2
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        },
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            "TIEOFF_X76Y36": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y37": {
        "bits": {
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                "baseaddr": "0x00422380",
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                "words": 2
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        },
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            "TIEOFF_X76Y37": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y38": {
        "bits": {
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                "baseaddr": "0x00422380",
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        },
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            "TIEOFF_X76Y38": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y39": {
        "bits": {
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                "baseaddr": "0x00422380",
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        },
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            "TIEOFF_X76Y39": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00422380",
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            "TIEOFF_X76Y40": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y41": {
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                "baseaddr": "0x00422380",
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            "TIEOFF_X76Y41": "TIEOFF"
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                "baseaddr": "0x00422380",
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        "clock_region": "X1Y1",
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            "TIEOFF_X76Y67": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y68": {
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        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X71Y69": {
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X76Y69": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y70": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X76Y70": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y71": {
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                "baseaddr": "0x00402380",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X76Y71": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y72": {
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X76Y72": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y73": {
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        },
        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X71Y74": {
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            "TIEOFF_X76Y74": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y75": {
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X76Y75": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y76": {
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                "baseaddr": "0x00402380",
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X76Y76": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y77": {
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                "baseaddr": "0x00402380",
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X76Y77": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y78": {
        "bits": {
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                "baseaddr": "0x00402380",
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        "clock_region": "X1Y1",
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            "TIEOFF_X76Y78": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y79": {
        "bits": {
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                "baseaddr": "0x00402380",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X76Y79": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y80": {
        "bits": {
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                "baseaddr": "0x00402380",
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X76Y80": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y81": {
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        },
        "clock_region": "X1Y1",
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        "sites": {
            "TIEOFF_X76Y81": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y82": {
        "bits": {
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                "baseaddr": "0x00402380",
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X76Y82": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y83": {
        "bits": {
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                "baseaddr": "0x00402380",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y83": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402380",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y1",
        "grid_x": 175,
        "grid_y": 68,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y84": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X71Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402380",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y85": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X71Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402380",
                "frames": 28,
                "offset": 73,
                "words": 2
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        },
        "clock_region": "X1Y1",
        "grid_x": 175,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y86": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X71Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402380",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
        "clock_region": "X1Y1",
        "grid_x": 175,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y87": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X71Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402380",
                "frames": 28,
                "offset": 77,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y88": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X71Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402380",
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                "offset": 79,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y89": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X71Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402380",
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                "offset": 81,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X76Y90": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402380",
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                "offset": 83,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X76Y91": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402380",
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                "offset": 85,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "sites": {
            "TIEOFF_X76Y92": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402380",
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                "offset": 87,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X76Y93": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402380",
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                "offset": 89,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X76Y94": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402380",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X76Y95": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402380",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X76Y96": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402380",
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                "offset": 95,
                "words": 2
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        },
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            "TIEOFF_X76Y97": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402380",
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                "offset": 97,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X76Y98": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402380",
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                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X76Y99": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y100": {
        "bits": {
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                "baseaddr": "0x00002380",
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                "offset": 0,
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        },
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            "TIEOFF_X76Y100": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y101": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y102": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y103": {
        "bits": {
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                "baseaddr": "0x00002380",
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                "offset": 6,
                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X76Y103": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y104": {
        "bits": {
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                "baseaddr": "0x00002380",
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                "offset": 8,
                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X76Y104": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y105": {
        "bits": {
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                "baseaddr": "0x00002380",
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                "words": 2
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        },
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            "TIEOFF_X76Y105": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y106": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X76Y106": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y107": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X76Y107": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y108": {
        "bits": {
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                "baseaddr": "0x00002380",
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X76Y108": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y109": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X76Y109": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y110": {
        "bits": {
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                "baseaddr": "0x00002380",
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        },
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            "TIEOFF_X76Y110": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y111": {
        "bits": {
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        },
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            "TIEOFF_X76Y111": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y112": {
        "bits": {
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                "baseaddr": "0x00002380",
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                "words": 2
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        },
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            "TIEOFF_X76Y112": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y113": {
        "bits": {
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                "baseaddr": "0x00002380",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X76Y113": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y114": {
        "bits": {
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                "baseaddr": "0x00002380",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X76Y114": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y115": {
        "bits": {
            "CLB_IO_CLK": {
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X76Y115": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y116": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y117": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y118": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y119": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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                "offset": 40,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y120": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X76Y121": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y122": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X76Y123": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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                "offset": 48,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y124": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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                "offset": 51,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y125": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y126": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X76Y127": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y128": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y129": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y130": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y131": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X76Y132": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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                "offset": 67,
                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X71Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X71Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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            "TIEOFF_X76Y135": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y136": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002380",
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        },
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            "TIEOFF_X76Y136": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y137": {
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                "baseaddr": "0x00002380",
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            "TIEOFF_X76Y137": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00002380",
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        },
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            "TIEOFF_X76Y138": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y139": {
        "bits": {
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            "TIEOFF_X76Y139": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y140": {
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        },
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            "TIEOFF_X78Y1": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X73Y17": {
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        "clock_region": "X1Y0",
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    "INT_R_X73Y18": {
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        "clock_region": "X1Y0",
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            "TIEOFF_X78Y18": "TIEOFF"
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    "INT_R_X73Y19": {
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                "words": 2
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        "clock_region": "X1Y0",
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        "clock_region": "X1Y0",
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            "TIEOFF_X78Y20": "TIEOFF"
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    "INT_R_X73Y21": {
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                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X78Y21": "TIEOFF"
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                "words": 2
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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                "baseaddr": "0x00422480",
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                "words": 2
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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                "words": 2
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X73Y25": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X73Y26": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X73Y27": {
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                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X78Y27": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X73Y28": {
        "bits": {
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                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X78Y28": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X73Y29": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X78Y29": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X73Y30": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X78Y30": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X73Y31": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X78Y31": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X73Y32": {
        "bits": {
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        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X78Y32": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
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    "INT_R_X73Y72": {
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    "INT_R_X73Y73": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X73Y82": {
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    "IO_INT_INTERFACE_R_X73Y113": {
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    "IO_INT_INTERFACE_R_X73Y114": {
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    "IO_INT_INTERFACE_R_X73Y115": {
        "bits": {},
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    "IO_INT_INTERFACE_R_X73Y116": {
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    "IO_INT_INTERFACE_R_X73Y117": {
        "bits": {},
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    "IO_INT_INTERFACE_R_X73Y118": {
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        "pin_functions": {},
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    "IO_INT_INTERFACE_R_X73Y119": {
        "bits": {},
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    "IO_INT_INTERFACE_R_X73Y120": {
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    "IO_INT_INTERFACE_R_X73Y121": {
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    "IO_INT_INTERFACE_R_X73Y122": {
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    "IO_INT_INTERFACE_R_X73Y123": {
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    "IO_INT_INTERFACE_R_X73Y124": {
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    "IO_INT_INTERFACE_R_X73Y125": {
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    "IO_INT_INTERFACE_R_X73Y126": {
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    "IO_INT_INTERFACE_R_X73Y127": {
        "bits": {},
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    "IO_INT_INTERFACE_R_X73Y128": {
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    "IO_INT_INTERFACE_R_X73Y129": {
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    "IO_INT_INTERFACE_R_X73Y130": {
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    "IO_INT_INTERFACE_R_X73Y131": {
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    "IO_INT_INTERFACE_R_X73Y132": {
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        "type": "IO_INT_INTERFACE_R"
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    "IO_INT_INTERFACE_R_X73Y133": {
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    "IO_INT_INTERFACE_R_X73Y134": {
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        "grid_y": 16,
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    "IO_INT_INTERFACE_R_X73Y135": {
        "bits": {},
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        "grid_y": 15,
        "pin_functions": {},
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        "type": "IO_INT_INTERFACE_R"
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    "IO_INT_INTERFACE_R_X73Y136": {
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        "type": "IO_INT_INTERFACE_R"
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    "IO_INT_INTERFACE_R_X73Y137": {
        "bits": {},
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        "grid_y": 13,
        "pin_functions": {},
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        "type": "IO_INT_INTERFACE_R"
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    "IO_INT_INTERFACE_R_X73Y138": {
        "bits": {},
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        "pin_functions": {},
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        "type": "IO_INT_INTERFACE_R"
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    "IO_INT_INTERFACE_R_X73Y139": {
        "bits": {},
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        "pin_functions": {},
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        "type": "IO_INT_INTERFACE_R"
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    "IO_INT_INTERFACE_R_X73Y140": {
        "bits": {},
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        "grid_y": 10,
        "pin_functions": {},
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        "type": "IO_INT_INTERFACE_R"
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    "IO_INT_INTERFACE_R_X73Y141": {
        "bits": {},
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        "pin_functions": {},
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        "type": "IO_INT_INTERFACE_R"
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    "IO_INT_INTERFACE_R_X73Y142": {
        "bits": {},
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        "type": "IO_INT_INTERFACE_R"
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    "IO_INT_INTERFACE_R_X73Y143": {
        "bits": {},
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        "type": "IO_INT_INTERFACE_R"
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    "IO_INT_INTERFACE_R_X73Y144": {
        "bits": {},
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        "type": "IO_INT_INTERFACE_R"
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    "IO_INT_INTERFACE_R_X73Y145": {
        "bits": {},
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    "IO_INT_INTERFACE_R_X73Y146": {
        "bits": {},
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        "type": "IO_INT_INTERFACE_R"
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    "IO_INT_INTERFACE_R_X73Y147": {
        "bits": {},
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        "grid_y": 3,
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    "IO_INT_INTERFACE_R_X73Y148": {
        "bits": {},
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        "grid_y": 2,
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    "IO_INT_INTERFACE_R_X73Y149": {
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        "grid_y": 1,
        "pin_functions": {},
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        "type": "IO_INT_INTERFACE_R"
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    "LIOB33_SING_X0Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y0"
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                    "start_offset": 2,
                    "type": "LIOB33"
                },
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 0,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 155,
        "pin_functions": {
            "IOB_X0Y0": "IO_25_13"
        },
        "sites": {
            "IOB_X0Y0": "IOB33"
        },
        "type": "LIOB33_SING"
    },
    "LIOB33_SING_X0Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "LIOB33"
                },
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 99,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 105,
        "pin_functions": {
            "IOB_X0Y49": "IO_0_13"
        },
        "sites": {
            "IOB_X0Y49": "IOB33"
        },
        "type": "LIOB33_SING"
    },
    "LIOB33_X0Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 154,
        "pin_functions": {
            "IOB_X0Y1": "IO_L24N_T3_13",
            "IOB_X0Y2": "IO_L24P_T3_13"
        },
        "sites": {
            "IOB_X0Y1": "IOB33S",
            "IOB_X0Y2": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 152,
        "pin_functions": {
            "IOB_X0Y3": "IO_L23N_T3_13",
            "IOB_X0Y4": "IO_L23P_T3_13"
        },
        "sites": {
            "IOB_X0Y3": "IOB33S",
            "IOB_X0Y4": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 150,
        "pin_functions": {
            "IOB_X0Y5": "IO_L22N_T3_13",
            "IOB_X0Y6": "IO_L22P_T3_13"
        },
        "sites": {
            "IOB_X0Y5": "IOB33S",
            "IOB_X0Y6": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 148,
        "pin_functions": {
            "IOB_X0Y7": "IO_L21N_T3_DQS_13",
            "IOB_X0Y8": "IO_L21P_T3_DQS_13"
        },
        "sites": {
            "IOB_X0Y7": "IOB33S",
            "IOB_X0Y8": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 146,
        "pin_functions": {
            "IOB_X0Y9": "IO_L20N_T3_13",
            "IOB_X0Y10": "IO_L20P_T3_13"
        },
        "sites": {
            "IOB_X0Y9": "IOB33S",
            "IOB_X0Y10": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 144,
        "pin_functions": {
            "IOB_X0Y11": "IO_L19N_T3_VREF_13",
            "IOB_X0Y12": "IO_L19P_T3_13"
        },
        "sites": {
            "IOB_X0Y11": "IOB33S",
            "IOB_X0Y12": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 142,
        "pin_functions": {
            "IOB_X0Y13": "IO_L18N_T2_13",
            "IOB_X0Y14": "IO_L18P_T2_13"
        },
        "sites": {
            "IOB_X0Y13": "IOB33S",
            "IOB_X0Y14": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 30,
                "words": 4
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        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 140,
        "pin_functions": {
            "IOB_X0Y15": "IO_L17N_T2_13",
            "IOB_X0Y16": "IO_L17P_T2_13"
        },
        "sites": {
            "IOB_X0Y15": "IOB33S",
            "IOB_X0Y16": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 34,
                "words": 4
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        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 138,
        "pin_functions": {
            "IOB_X0Y17": "IO_L16N_T2_13",
            "IOB_X0Y18": "IO_L16P_T2_13"
        },
        "sites": {
            "IOB_X0Y17": "IOB33S",
            "IOB_X0Y18": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 38,
                "words": 4
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        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 136,
        "pin_functions": {
            "IOB_X0Y19": "IO_L15N_T2_DQS_13",
            "IOB_X0Y20": "IO_L15P_T2_DQS_13"
        },
        "sites": {
            "IOB_X0Y19": "IOB33S",
            "IOB_X0Y20": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 42,
                "words": 4
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        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 134,
        "pin_functions": {
            "IOB_X0Y21": "IO_L14N_T2_SRCC_13",
            "IOB_X0Y22": "IO_L14P_T2_SRCC_13"
        },
        "sites": {
            "IOB_X0Y21": "IOB33S",
            "IOB_X0Y22": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 46,
                "words": 4
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        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 132,
        "pin_functions": {
            "IOB_X0Y23": "IO_L13N_T2_MRCC_13",
            "IOB_X0Y24": "IO_L13P_T2_MRCC_13"
        },
        "sites": {
            "IOB_X0Y23": "IOB33S",
            "IOB_X0Y24": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 51,
                "words": 4
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        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 129,
        "pin_functions": {
            "IOB_X0Y25": "IO_L12N_T1_MRCC_13",
            "IOB_X0Y26": "IO_L12P_T1_MRCC_13"
        },
        "sites": {
            "IOB_X0Y25": "IOB33S",
            "IOB_X0Y26": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 55,
                "words": 4
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        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 127,
        "pin_functions": {
            "IOB_X0Y27": "IO_L11N_T1_SRCC_13",
            "IOB_X0Y28": "IO_L11P_T1_SRCC_13"
        },
        "sites": {
            "IOB_X0Y27": "IOB33S",
            "IOB_X0Y28": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 59,
                "words": 4
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        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 125,
        "pin_functions": {
            "IOB_X0Y29": "IO_L10N_T1_13",
            "IOB_X0Y30": "IO_L10P_T1_13"
        },
        "sites": {
            "IOB_X0Y29": "IOB33S",
            "IOB_X0Y30": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 123,
        "pin_functions": {
            "IOB_X0Y31": "IO_L9N_T1_DQS_13",
            "IOB_X0Y32": "IO_L9P_T1_DQS_13"
        },
        "sites": {
            "IOB_X0Y31": "IOB33S",
            "IOB_X0Y32": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 121,
        "pin_functions": {
            "IOB_X0Y33": "IO_L8N_T1_13",
            "IOB_X0Y34": "IO_L8P_T1_13"
        },
        "sites": {
            "IOB_X0Y33": "IOB33S",
            "IOB_X0Y34": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 71,
                "words": 4
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        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 119,
        "pin_functions": {
            "IOB_X0Y35": "IO_L7N_T1_13",
            "IOB_X0Y36": "IO_L7P_T1_13"
        },
        "sites": {
            "IOB_X0Y35": "IOB33S",
            "IOB_X0Y36": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 117,
        "pin_functions": {
            "IOB_X0Y37": "IO_L6N_T0_VREF_13",
            "IOB_X0Y38": "IO_L6P_T0_13"
        },
        "sites": {
            "IOB_X0Y37": "IOB33S",
            "IOB_X0Y38": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 115,
        "pin_functions": {
            "IOB_X0Y39": "IO_L5N_T0_13",
            "IOB_X0Y40": "IO_L5P_T0_13"
        },
        "sites": {
            "IOB_X0Y39": "IOB33S",
            "IOB_X0Y40": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 113,
        "pin_functions": {
            "IOB_X0Y41": "IO_L4N_T0_13",
            "IOB_X0Y42": "IO_L4P_T0_13"
        },
        "sites": {
            "IOB_X0Y41": "IOB33S",
            "IOB_X0Y42": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 111,
        "pin_functions": {
            "IOB_X0Y43": "IO_L3N_T0_DQS_13",
            "IOB_X0Y44": "IO_L3P_T0_DQS_13"
        },
        "sites": {
            "IOB_X0Y43": "IOB33S",
            "IOB_X0Y44": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 109,
        "pin_functions": {
            "IOB_X0Y45": "IO_L2N_T0_13",
            "IOB_X0Y46": "IO_L2P_T0_13"
        },
        "sites": {
            "IOB_X0Y45": "IOB33S",
            "IOB_X0Y46": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 107,
        "pin_functions": {
            "IOB_X0Y47": "IO_L1N_T0_13",
            "IOB_X0Y48": "IO_L1P_T0_13"
        },
        "sites": {
            "IOB_X0Y47": "IOB33S",
            "IOB_X0Y48": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOI3_SING_X0Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y0": "IDELAYE2",
            "ILOGIC_X0Y0": "ILOGICE3",
            "OLOGIC_X0Y0": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y49": "IDELAYE2",
            "ILOGIC_X0Y49": "ILOGICE3",
            "OLOGIC_X0Y49": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_TBYTESRC_X0Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y7": "IDELAYE2",
            "IDELAY_X0Y8": "IDELAYE2",
            "ILOGIC_X0Y7": "ILOGICE3",
            "ILOGIC_X0Y8": "ILOGICE3",
            "OLOGIC_X0Y7": "OLOGICE3",
            "OLOGIC_X0Y8": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y19": "IDELAYE2",
            "IDELAY_X0Y20": "IDELAYE2",
            "ILOGIC_X0Y19": "ILOGICE3",
            "ILOGIC_X0Y20": "ILOGICE3",
            "OLOGIC_X0Y19": "OLOGICE3",
            "OLOGIC_X0Y20": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y31": "IDELAYE2",
            "IDELAY_X0Y32": "IDELAYE2",
            "ILOGIC_X0Y31": "ILOGICE3",
            "ILOGIC_X0Y32": "ILOGICE3",
            "OLOGIC_X0Y31": "OLOGICE3",
            "OLOGIC_X0Y32": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y43": "IDELAYE2",
            "IDELAY_X0Y44": "IDELAYE2",
            "ILOGIC_X0Y43": "ILOGICE3",
            "ILOGIC_X0Y44": "ILOGICE3",
            "OLOGIC_X0Y43": "OLOGICE3",
            "OLOGIC_X0Y44": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTETERM_X0Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 142,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y13": "IDELAYE2",
            "IDELAY_X0Y14": "IDELAYE2",
            "ILOGIC_X0Y13": "ILOGICE3",
            "ILOGIC_X0Y14": "ILOGICE3",
            "OLOGIC_X0Y13": "OLOGICE3",
            "OLOGIC_X0Y14": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 117,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y37": "IDELAYE2",
            "IDELAY_X0Y38": "IDELAYE2",
            "ILOGIC_X0Y37": "ILOGICE3",
            "ILOGIC_X0Y38": "ILOGICE3",
            "OLOGIC_X0Y37": "OLOGICE3",
            "OLOGIC_X0Y38": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_X0Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 154,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y1": "IDELAYE2",
            "IDELAY_X0Y2": "IDELAYE2",
            "ILOGIC_X0Y1": "ILOGICE3",
            "ILOGIC_X0Y2": "ILOGICE3",
            "OLOGIC_X0Y1": "OLOGICE3",
            "OLOGIC_X0Y2": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 152,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y3": "IDELAYE2",
            "IDELAY_X0Y4": "IDELAYE2",
            "ILOGIC_X0Y3": "ILOGICE3",
            "ILOGIC_X0Y4": "ILOGICE3",
            "OLOGIC_X0Y3": "OLOGICE3",
            "OLOGIC_X0Y4": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y5": "IDELAYE2",
            "IDELAY_X0Y6": "IDELAYE2",
            "ILOGIC_X0Y5": "ILOGICE3",
            "ILOGIC_X0Y6": "ILOGICE3",
            "OLOGIC_X0Y5": "OLOGICE3",
            "OLOGIC_X0Y6": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 146,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y9": "IDELAYE2",
            "IDELAY_X0Y10": "IDELAYE2",
            "ILOGIC_X0Y9": "ILOGICE3",
            "ILOGIC_X0Y10": "ILOGICE3",
            "OLOGIC_X0Y9": "OLOGICE3",
            "OLOGIC_X0Y10": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 144,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y11": "IDELAYE2",
            "IDELAY_X0Y12": "IDELAYE2",
            "ILOGIC_X0Y11": "ILOGICE3",
            "ILOGIC_X0Y12": "ILOGICE3",
            "OLOGIC_X0Y11": "OLOGICE3",
            "OLOGIC_X0Y12": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y15": "IDELAYE2",
            "IDELAY_X0Y16": "IDELAYE2",
            "ILOGIC_X0Y15": "ILOGICE3",
            "ILOGIC_X0Y16": "ILOGICE3",
            "OLOGIC_X0Y15": "OLOGICE3",
            "OLOGIC_X0Y16": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y17": "IDELAYE2",
            "IDELAY_X0Y18": "IDELAYE2",
            "ILOGIC_X0Y17": "ILOGICE3",
            "ILOGIC_X0Y18": "ILOGICE3",
            "OLOGIC_X0Y17": "OLOGICE3",
            "OLOGIC_X0Y18": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 134,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y21": "IDELAYE2",
            "IDELAY_X0Y22": "IDELAYE2",
            "ILOGIC_X0Y21": "ILOGICE3",
            "ILOGIC_X0Y22": "ILOGICE3",
            "OLOGIC_X0Y21": "OLOGICE3",
            "OLOGIC_X0Y22": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 132,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y23": "IDELAYE2",
            "IDELAY_X0Y24": "IDELAYE2",
            "ILOGIC_X0Y23": "ILOGICE3",
            "ILOGIC_X0Y24": "ILOGICE3",
            "OLOGIC_X0Y23": "OLOGICE3",
            "OLOGIC_X0Y24": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y25": "IDELAYE2",
            "IDELAY_X0Y26": "IDELAYE2",
            "ILOGIC_X0Y25": "ILOGICE3",
            "ILOGIC_X0Y26": "ILOGICE3",
            "OLOGIC_X0Y25": "OLOGICE3",
            "OLOGIC_X0Y26": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 127,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y27": "IDELAYE2",
            "IDELAY_X0Y28": "IDELAYE2",
            "ILOGIC_X0Y27": "ILOGICE3",
            "ILOGIC_X0Y28": "ILOGICE3",
            "OLOGIC_X0Y27": "OLOGICE3",
            "OLOGIC_X0Y28": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 125,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y29": "IDELAYE2",
            "IDELAY_X0Y30": "IDELAYE2",
            "ILOGIC_X0Y29": "ILOGICE3",
            "ILOGIC_X0Y30": "ILOGICE3",
            "OLOGIC_X0Y29": "OLOGICE3",
            "OLOGIC_X0Y30": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 121,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y33": "IDELAYE2",
            "IDELAY_X0Y34": "IDELAYE2",
            "ILOGIC_X0Y33": "ILOGICE3",
            "ILOGIC_X0Y34": "ILOGICE3",
            "OLOGIC_X0Y33": "OLOGICE3",
            "OLOGIC_X0Y34": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y35": "IDELAYE2",
            "IDELAY_X0Y36": "IDELAYE2",
            "ILOGIC_X0Y35": "ILOGICE3",
            "ILOGIC_X0Y36": "ILOGICE3",
            "OLOGIC_X0Y35": "OLOGICE3",
            "OLOGIC_X0Y36": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 115,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y39": "IDELAYE2",
            "IDELAY_X0Y40": "IDELAYE2",
            "ILOGIC_X0Y39": "ILOGICE3",
            "ILOGIC_X0Y40": "ILOGICE3",
            "OLOGIC_X0Y39": "OLOGICE3",
            "OLOGIC_X0Y40": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 113,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y41": "IDELAYE2",
            "IDELAY_X0Y42": "IDELAYE2",
            "ILOGIC_X0Y41": "ILOGICE3",
            "ILOGIC_X0Y42": "ILOGICE3",
            "OLOGIC_X0Y41": "OLOGICE3",
            "OLOGIC_X0Y42": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y45": "IDELAYE2",
            "IDELAY_X0Y46": "IDELAYE2",
            "ILOGIC_X0Y45": "ILOGICE3",
            "ILOGIC_X0Y46": "ILOGICE3",
            "OLOGIC_X0Y45": "OLOGICE3",
            "OLOGIC_X0Y46": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 107,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y47": "IDELAYE2",
            "IDELAY_X0Y48": "IDELAYE2",
            "ILOGIC_X0Y47": "ILOGICE3",
            "ILOGIC_X0Y48": "ILOGICE3",
            "OLOGIC_X0Y47": "OLOGICE3",
            "OLOGIC_X0Y48": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "L_TERM_INT_X2Y1": {
        "bits": {},
        "grid_x": 2,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {},
        "type": "L_TERM_INT"
    },
    "L_TERM_INT_X2Y2": {
        "bits": {},
        "grid_x": 2,
        "grid_y": 154,
        "pin_functions": {},
        "sites": {},
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        "grid_x": 49,
        "grid_y": 76,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y81": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 75,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y82": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 74,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y83": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 73,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y84": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y85": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 71,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y86": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 70,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y87": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 69,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y88": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 68,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y89": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y90": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 66,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y91": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 65,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y92": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 64,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y93": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 63,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y94": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y95": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 61,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y96": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 60,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y97": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 59,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y98": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 58,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y99": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y100": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 56,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y101": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 55,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y102": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 54,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y103": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y105": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y106": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 50,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y107": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 49,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y108": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 48,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y109": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 47,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y110": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y111": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 45,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y112": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 44,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y113": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 43,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y114": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 42,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y115": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y116": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 40,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y117": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 39,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y118": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 38,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y119": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 37,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y120": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y121": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 35,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y122": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 34,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y123": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 33,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y124": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 32,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y125": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y126": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 30,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y127": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 29,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y128": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 28,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y129": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 27,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y131": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y132": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 24,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y133": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 23,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y134": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 22,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y135": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 21,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y136": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y137": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y138": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 18,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y139": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 17,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y140": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 16,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y141": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y142": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 14,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y143": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 13,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y144": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 12,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y145": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 11,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y146": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y147": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 9,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y148": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 8,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y149": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 7,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y150": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 6,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y151": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y152": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 4,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y153": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 3,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y154": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 2,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X49Y155": {
        "bits": {},
        "grid_x": 49,
        "grid_y": 1,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PSS0_X32Y63": {
        "bits": {},
        "grid_x": 32,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {},
        "type": "PSS0"
    },
    "PSS1_X32Y84": {
        "bits": {},
        "grid_x": 32,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {},
        "type": "PSS1"
    },
    "PSS2_X32Y105": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 32,
        "grid_y": 51,
        "pin_functions": {
            "IOPAD_X1Y1": "PS_DDR_WE_B_502",
            "IOPAD_X1Y2": "PS_DDR_VRN_502",
            "IOPAD_X1Y3": "PS_DDR_VRP_502",
            "IOPAD_X1Y4": "PS_DDR_A0_502",
            "IOPAD_X1Y5": "PS_DDR_A1_502",
            "IOPAD_X1Y6": "PS_DDR_A2_502",
            "IOPAD_X1Y7": "PS_DDR_A3_502",
            "IOPAD_X1Y8": "PS_DDR_A4_502",
            "IOPAD_X1Y9": "PS_DDR_A5_502",
            "IOPAD_X1Y10": "PS_DDR_A6_502",
            "IOPAD_X1Y11": "PS_DDR_A7_502",
            "IOPAD_X1Y12": "PS_DDR_A8_502",
            "IOPAD_X1Y13": "PS_DDR_A9_502",
            "IOPAD_X1Y14": "PS_DDR_A10_502",
            "IOPAD_X1Y15": "PS_DDR_A11_502",
            "IOPAD_X1Y16": "PS_DDR_A12_502",
            "IOPAD_X1Y17": "PS_DDR_A14_502",
            "IOPAD_X1Y18": "PS_DDR_A13_502",
            "IOPAD_X1Y19": "PS_DDR_BA0_502",
            "IOPAD_X1Y20": "PS_DDR_BA1_502",
            "IOPAD_X1Y21": "PS_DDR_BA2_502",
            "IOPAD_X1Y22": "PS_DDR_CAS_B_502",
            "IOPAD_X1Y23": "PS_DDR_CKE_502",
            "IOPAD_X1Y24": "PS_DDR_CKN_502",
            "IOPAD_X1Y25": "PS_DDR_CKP_502",
            "IOPAD_X1Y26": "PS_CLK_500",
            "IOPAD_X1Y27": "PS_DDR_CS_B_502",
            "IOPAD_X1Y28": "PS_DDR_DM0_502",
            "IOPAD_X1Y29": "PS_DDR_DM1_502",
            "IOPAD_X1Y30": "PS_DDR_DM2_502",
            "IOPAD_X1Y31": "PS_DDR_DM3_502",
            "IOPAD_X1Y32": "PS_DDR_DQ0_502",
            "IOPAD_X1Y33": "PS_DDR_DQ1_502",
            "IOPAD_X1Y34": "PS_DDR_DQ2_502",
            "IOPAD_X1Y35": "PS_DDR_DQ3_502",
            "IOPAD_X1Y36": "PS_DDR_DQ4_502",
            "IOPAD_X1Y37": "PS_DDR_DQ5_502",
            "IOPAD_X1Y38": "PS_DDR_DQ6_502",
            "IOPAD_X1Y39": "PS_DDR_DQ7_502",
            "IOPAD_X1Y40": "PS_DDR_DQ8_502",
            "IOPAD_X1Y41": "PS_DDR_DQ9_502",
            "IOPAD_X1Y42": "PS_DDR_DQ10_502",
            "IOPAD_X1Y43": "PS_DDR_DQ11_502",
            "IOPAD_X1Y44": "PS_DDR_DQ12_502",
            "IOPAD_X1Y45": "PS_DDR_DQ13_502",
            "IOPAD_X1Y46": "PS_DDR_DQ14_502",
            "IOPAD_X1Y47": "PS_DDR_DQ15_502",
            "IOPAD_X1Y48": "PS_DDR_DQ16_502",
            "IOPAD_X1Y49": "PS_DDR_DQ17_502",
            "IOPAD_X1Y50": "PS_DDR_DQ18_502",
            "IOPAD_X1Y51": "PS_DDR_DQ19_502",
            "IOPAD_X1Y52": "PS_DDR_DQ20_502",
            "IOPAD_X1Y53": "PS_DDR_DQ21_502",
            "IOPAD_X1Y54": "PS_DDR_DQ22_502",
            "IOPAD_X1Y55": "PS_DDR_DQ23_502",
            "IOPAD_X1Y56": "PS_DDR_DQ24_502",
            "IOPAD_X1Y57": "PS_DDR_DQ25_502",
            "IOPAD_X1Y58": "PS_DDR_DQ26_502",
            "IOPAD_X1Y59": "PS_DDR_DQ27_502",
            "IOPAD_X1Y60": "PS_DDR_DQ28_502",
            "IOPAD_X1Y61": "PS_DDR_DQ29_502",
            "IOPAD_X1Y62": "PS_DDR_DQ30_502",
            "IOPAD_X1Y63": "PS_DDR_DQ31_502",
            "IOPAD_X1Y64": "PS_DDR_DQS_N0_502",
            "IOPAD_X1Y65": "PS_DDR_DQS_N1_502",
            "IOPAD_X1Y66": "PS_DDR_DQS_N2_502",
            "IOPAD_X1Y67": "PS_DDR_DQS_N3_502",
            "IOPAD_X1Y68": "PS_DDR_DQS_P0_502",
            "IOPAD_X1Y69": "PS_DDR_DQS_P1_502",
            "IOPAD_X1Y70": "PS_DDR_DQS_P2_502",
            "IOPAD_X1Y71": "PS_DDR_DQS_P3_502",
            "IOPAD_X1Y72": "PS_DDR_DRST_B_502",
            "IOPAD_X1Y77": "PS_MIO0_500",
            "IOPAD_X1Y78": "PS_MIO1_500",
            "IOPAD_X1Y79": "PS_MIO2_500",
            "IOPAD_X1Y80": "PS_MIO3_500",
            "IOPAD_X1Y81": "PS_MIO4_500",
            "IOPAD_X1Y82": "PS_MIO5_500",
            "IOPAD_X1Y83": "PS_MIO6_500",
            "IOPAD_X1Y84": "PS_MIO7_500",
            "IOPAD_X1Y85": "PS_MIO8_500",
            "IOPAD_X1Y86": "PS_MIO9_500",
            "IOPAD_X1Y87": "PS_MIO10_500",
            "IOPAD_X1Y88": "PS_MIO11_500",
            "IOPAD_X1Y89": "PS_MIO12_500",
            "IOPAD_X1Y90": "PS_MIO13_500",
            "IOPAD_X1Y91": "PS_MIO14_500",
            "IOPAD_X1Y92": "PS_MIO15_500",
            "IOPAD_X1Y93": "PS_MIO16_501",
            "IOPAD_X1Y94": "PS_MIO17_501",
            "IOPAD_X1Y95": "PS_MIO18_501",
            "IOPAD_X1Y96": "PS_MIO19_501",
            "IOPAD_X1Y97": "PS_MIO20_501",
            "IOPAD_X1Y98": "PS_MIO21_501",
            "IOPAD_X1Y99": "PS_MIO22_501",
            "IOPAD_X1Y100": "PS_MIO23_501",
            "IOPAD_X1Y101": "PS_MIO24_501",
            "IOPAD_X1Y102": "PS_MIO25_501",
            "IOPAD_X1Y103": "PS_MIO26_501",
            "IOPAD_X1Y104": "PS_MIO27_501",
            "IOPAD_X1Y105": "PS_MIO28_501",
            "IOPAD_X1Y106": "PS_MIO29_501",
            "IOPAD_X1Y107": "PS_MIO30_501",
            "IOPAD_X1Y108": "PS_MIO31_501",
            "IOPAD_X1Y109": "PS_MIO32_501",
            "IOPAD_X1Y110": "PS_MIO33_501",
            "IOPAD_X1Y111": "PS_MIO34_501",
            "IOPAD_X1Y112": "PS_MIO35_501",
            "IOPAD_X1Y113": "PS_MIO36_501",
            "IOPAD_X1Y114": "PS_MIO37_501",
            "IOPAD_X1Y115": "PS_MIO38_501",
            "IOPAD_X1Y116": "PS_MIO39_501",
            "IOPAD_X1Y117": "PS_MIO40_501",
            "IOPAD_X1Y118": "PS_MIO41_501",
            "IOPAD_X1Y119": "PS_MIO42_501",
            "IOPAD_X1Y120": "PS_MIO43_501",
            "IOPAD_X1Y121": "PS_MIO44_501",
            "IOPAD_X1Y122": "PS_MIO45_501",
            "IOPAD_X1Y123": "PS_MIO46_501",
            "IOPAD_X1Y124": "PS_MIO47_501",
            "IOPAD_X1Y125": "PS_MIO48_501",
            "IOPAD_X1Y126": "PS_MIO49_501",
            "IOPAD_X1Y127": "PS_MIO50_501",
            "IOPAD_X1Y128": "PS_MIO51_501",
            "IOPAD_X1Y129": "PS_MIO52_501",
            "IOPAD_X1Y130": "PS_MIO53_501",
            "IOPAD_X1Y131": "PS_DDR_ODT_502",
            "IOPAD_X1Y132": "PS_POR_B_500",
            "IOPAD_X1Y133": "PS_DDR_RAS_B_502",
            "IOPAD_X1Y134": "PS_SRST_B_501"
        },
        "sites": {
            "IOPAD_X1Y1": "IOPAD",
            "IOPAD_X1Y2": "IOPAD",
            "IOPAD_X1Y3": "IOPAD",
            "IOPAD_X1Y4": "IOPAD",
            "IOPAD_X1Y5": "IOPAD",
            "IOPAD_X1Y6": "IOPAD",
            "IOPAD_X1Y7": "IOPAD",
            "IOPAD_X1Y8": "IOPAD",
            "IOPAD_X1Y9": "IOPAD",
            "IOPAD_X1Y10": "IOPAD",
            "IOPAD_X1Y11": "IOPAD",
            "IOPAD_X1Y12": "IOPAD",
            "IOPAD_X1Y13": "IOPAD",
            "IOPAD_X1Y14": "IOPAD",
            "IOPAD_X1Y15": "IOPAD",
            "IOPAD_X1Y16": "IOPAD",
            "IOPAD_X1Y17": "IOPAD",
            "IOPAD_X1Y18": "IOPAD",
            "IOPAD_X1Y19": "IOPAD",
            "IOPAD_X1Y20": "IOPAD",
            "IOPAD_X1Y21": "IOPAD",
            "IOPAD_X1Y22": "IOPAD",
            "IOPAD_X1Y23": "IOPAD",
            "IOPAD_X1Y24": "IOPAD",
            "IOPAD_X1Y25": "IOPAD",
            "IOPAD_X1Y26": "IOPAD",
            "IOPAD_X1Y27": "IOPAD",
            "IOPAD_X1Y28": "IOPAD",
            "IOPAD_X1Y29": "IOPAD",
            "IOPAD_X1Y30": "IOPAD",
            "IOPAD_X1Y31": "IOPAD",
            "IOPAD_X1Y32": "IOPAD",
            "IOPAD_X1Y33": "IOPAD",
            "IOPAD_X1Y34": "IOPAD",
            "IOPAD_X1Y35": "IOPAD",
            "IOPAD_X1Y36": "IOPAD",
            "IOPAD_X1Y37": "IOPAD",
            "IOPAD_X1Y38": "IOPAD",
            "IOPAD_X1Y39": "IOPAD",
            "IOPAD_X1Y40": "IOPAD",
            "IOPAD_X1Y41": "IOPAD",
            "IOPAD_X1Y42": "IOPAD",
            "IOPAD_X1Y43": "IOPAD",
            "IOPAD_X1Y44": "IOPAD",
            "IOPAD_X1Y45": "IOPAD",
            "IOPAD_X1Y46": "IOPAD",
            "IOPAD_X1Y47": "IOPAD",
            "IOPAD_X1Y48": "IOPAD",
            "IOPAD_X1Y49": "IOPAD",
            "IOPAD_X1Y50": "IOPAD",
            "IOPAD_X1Y51": "IOPAD",
            "IOPAD_X1Y52": "IOPAD",
            "IOPAD_X1Y53": "IOPAD",
            "IOPAD_X1Y54": "IOPAD",
            "IOPAD_X1Y55": "IOPAD",
            "IOPAD_X1Y56": "IOPAD",
            "IOPAD_X1Y57": "IOPAD",
            "IOPAD_X1Y58": "IOPAD",
            "IOPAD_X1Y59": "IOPAD",
            "IOPAD_X1Y60": "IOPAD",
            "IOPAD_X1Y61": "IOPAD",
            "IOPAD_X1Y62": "IOPAD",
            "IOPAD_X1Y63": "IOPAD",
            "IOPAD_X1Y64": "IOPAD",
            "IOPAD_X1Y65": "IOPAD",
            "IOPAD_X1Y66": "IOPAD",
            "IOPAD_X1Y67": "IOPAD",
            "IOPAD_X1Y68": "IOPAD",
            "IOPAD_X1Y69": "IOPAD",
            "IOPAD_X1Y70": "IOPAD",
            "IOPAD_X1Y71": "IOPAD",
            "IOPAD_X1Y72": "IOPAD",
            "IOPAD_X1Y77": "IOPAD",
            "IOPAD_X1Y78": "IOPAD",
            "IOPAD_X1Y79": "IOPAD",
            "IOPAD_X1Y80": "IOPAD",
            "IOPAD_X1Y81": "IOPAD",
            "IOPAD_X1Y82": "IOPAD",
            "IOPAD_X1Y83": "IOPAD",
            "IOPAD_X1Y84": "IOPAD",
            "IOPAD_X1Y85": "IOPAD",
            "IOPAD_X1Y86": "IOPAD",
            "IOPAD_X1Y87": "IOPAD",
            "IOPAD_X1Y88": "IOPAD",
            "IOPAD_X1Y89": "IOPAD",
            "IOPAD_X1Y90": "IOPAD",
            "IOPAD_X1Y91": "IOPAD",
            "IOPAD_X1Y92": "IOPAD",
            "IOPAD_X1Y93": "IOPAD",
            "IOPAD_X1Y94": "IOPAD",
            "IOPAD_X1Y95": "IOPAD",
            "IOPAD_X1Y96": "IOPAD",
            "IOPAD_X1Y97": "IOPAD",
            "IOPAD_X1Y98": "IOPAD",
            "IOPAD_X1Y99": "IOPAD",
            "IOPAD_X1Y100": "IOPAD",
            "IOPAD_X1Y101": "IOPAD",
            "IOPAD_X1Y102": "IOPAD",
            "IOPAD_X1Y103": "IOPAD",
            "IOPAD_X1Y104": "IOPAD",
            "IOPAD_X1Y105": "IOPAD",
            "IOPAD_X1Y106": "IOPAD",
            "IOPAD_X1Y107": "IOPAD",
            "IOPAD_X1Y108": "IOPAD",
            "IOPAD_X1Y109": "IOPAD",
            "IOPAD_X1Y110": "IOPAD",
            "IOPAD_X1Y111": "IOPAD",
            "IOPAD_X1Y112": "IOPAD",
            "IOPAD_X1Y113": "IOPAD",
            "IOPAD_X1Y114": "IOPAD",
            "IOPAD_X1Y115": "IOPAD",
            "IOPAD_X1Y116": "IOPAD",
            "IOPAD_X1Y117": "IOPAD",
            "IOPAD_X1Y118": "IOPAD",
            "IOPAD_X1Y119": "IOPAD",
            "IOPAD_X1Y120": "IOPAD",
            "IOPAD_X1Y121": "IOPAD",
            "IOPAD_X1Y122": "IOPAD",
            "IOPAD_X1Y123": "IOPAD",
            "IOPAD_X1Y124": "IOPAD",
            "IOPAD_X1Y125": "IOPAD",
            "IOPAD_X1Y126": "IOPAD",
            "IOPAD_X1Y127": "IOPAD",
            "IOPAD_X1Y128": "IOPAD",
            "IOPAD_X1Y129": "IOPAD",
            "IOPAD_X1Y130": "IOPAD",
            "IOPAD_X1Y131": "IOPAD",
            "IOPAD_X1Y132": "IOPAD",
            "IOPAD_X1Y133": "IOPAD",
            "IOPAD_X1Y134": "IOPAD",
            "PS7_X0Y0": "PS7"
        },
        "type": "PSS2"
    },
    "PSS3_X32Y125": {
        "bits": {},
        "grid_x": 32,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {},
        "type": "PSS3"
    },
    "PSS4_X32Y146": {
        "bits": {},
        "grid_x": 32,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {},
        "type": "PSS4"
    },
    "RIOB33_SING_X73Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y0"
                    },
                    "start_offset": 2,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 155,
        "pin_functions": {
            "IOB_X1Y0": "IO_25_33"
        },
        "sites": {
            "IOB_X1Y0": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X73Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 105,
        "pin_functions": {
            "IOB_X1Y49": "IO_0_33"
        },
        "sites": {
            "IOB_X1Y49": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X73Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y0"
                    },
                    "start_offset": 2,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 103,
        "pin_functions": {
            "IOB_X1Y50": "IO_25_34"
        },
        "sites": {
            "IOB_X1Y50": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X73Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 53,
        "pin_functions": {
            "IOB_X1Y99": "IO_0_34"
        },
        "sites": {
            "IOB_X1Y99": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X73Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y0"
                    },
                    "start_offset": 2,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 51,
        "pin_functions": {
            "IOB_X1Y100": "IO_25_35"
        },
        "sites": {
            "IOB_X1Y100": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X73Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 1,
        "pin_functions": {
            "IOB_X1Y149": "IO_0_35"
        },
        "sites": {
            "IOB_X1Y149": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_X73Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 154,
        "pin_functions": {
            "IOB_X1Y1": "IO_L24N_T3_33",
            "IOB_X1Y2": "IO_L24P_T3_33"
        },
        "sites": {
            "IOB_X1Y1": "IOB33S",
            "IOB_X1Y2": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 152,
        "pin_functions": {
            "IOB_X1Y3": "IO_L23N_T3_33",
            "IOB_X1Y4": "IO_L23P_T3_33"
        },
        "sites": {
            "IOB_X1Y3": "IOB33S",
            "IOB_X1Y4": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 150,
        "pin_functions": {
            "IOB_X1Y5": "IO_L22N_T3_33",
            "IOB_X1Y6": "IO_L22P_T3_33"
        },
        "sites": {
            "IOB_X1Y5": "IOB33S",
            "IOB_X1Y6": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 148,
        "pin_functions": {
            "IOB_X1Y7": "IO_L21N_T3_DQS_33",
            "IOB_X1Y8": "IO_L21P_T3_DQS_33"
        },
        "sites": {
            "IOB_X1Y7": "IOB33S",
            "IOB_X1Y8": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 146,
        "pin_functions": {
            "IOB_X1Y9": "IO_L20N_T3_33",
            "IOB_X1Y10": "IO_L20P_T3_33"
        },
        "sites": {
            "IOB_X1Y9": "IOB33S",
            "IOB_X1Y10": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 144,
        "pin_functions": {
            "IOB_X1Y11": "IO_L19N_T3_VREF_33",
            "IOB_X1Y12": "IO_L19P_T3_33"
        },
        "sites": {
            "IOB_X1Y11": "IOB33S",
            "IOB_X1Y12": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 142,
        "pin_functions": {
            "IOB_X1Y13": "IO_L18N_T2_33",
            "IOB_X1Y14": "IO_L18P_T2_33"
        },
        "sites": {
            "IOB_X1Y13": "IOB33S",
            "IOB_X1Y14": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 140,
        "pin_functions": {
            "IOB_X1Y15": "IO_L17N_T2_33",
            "IOB_X1Y16": "IO_L17P_T2_33"
        },
        "sites": {
            "IOB_X1Y15": "IOB33S",
            "IOB_X1Y16": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 138,
        "pin_functions": {
            "IOB_X1Y17": "IO_L16N_T2_33",
            "IOB_X1Y18": "IO_L16P_T2_33"
        },
        "sites": {
            "IOB_X1Y17": "IOB33S",
            "IOB_X1Y18": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 136,
        "pin_functions": {
            "IOB_X1Y19": "IO_L15N_T2_DQS_33",
            "IOB_X1Y20": "IO_L15P_T2_DQS_33"
        },
        "sites": {
            "IOB_X1Y19": "IOB33S",
            "IOB_X1Y20": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 134,
        "pin_functions": {
            "IOB_X1Y21": "IO_L14N_T2_SRCC_33",
            "IOB_X1Y22": "IO_L14P_T2_SRCC_33"
        },
        "sites": {
            "IOB_X1Y21": "IOB33S",
            "IOB_X1Y22": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 132,
        "pin_functions": {
            "IOB_X1Y23": "IO_L13N_T2_MRCC_33",
            "IOB_X1Y24": "IO_L13P_T2_MRCC_33"
        },
        "sites": {
            "IOB_X1Y23": "IOB33S",
            "IOB_X1Y24": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 129,
        "pin_functions": {
            "IOB_X1Y25": "IO_L12N_T1_MRCC_33",
            "IOB_X1Y26": "IO_L12P_T1_MRCC_33"
        },
        "sites": {
            "IOB_X1Y25": "IOB33S",
            "IOB_X1Y26": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 127,
        "pin_functions": {
            "IOB_X1Y27": "IO_L11N_T1_SRCC_33",
            "IOB_X1Y28": "IO_L11P_T1_SRCC_33"
        },
        "sites": {
            "IOB_X1Y27": "IOB33S",
            "IOB_X1Y28": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 125,
        "pin_functions": {
            "IOB_X1Y29": "IO_L10N_T1_33",
            "IOB_X1Y30": "IO_L10P_T1_33"
        },
        "sites": {
            "IOB_X1Y29": "IOB33S",
            "IOB_X1Y30": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 123,
        "pin_functions": {
            "IOB_X1Y31": "IO_L9N_T1_DQS_33",
            "IOB_X1Y32": "IO_L9P_T1_DQS_33"
        },
        "sites": {
            "IOB_X1Y31": "IOB33S",
            "IOB_X1Y32": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 121,
        "pin_functions": {
            "IOB_X1Y33": "IO_L8N_T1_33",
            "IOB_X1Y34": "IO_L8P_T1_33"
        },
        "sites": {
            "IOB_X1Y33": "IOB33S",
            "IOB_X1Y34": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 119,
        "pin_functions": {
            "IOB_X1Y35": "IO_L7N_T1_33",
            "IOB_X1Y36": "IO_L7P_T1_33"
        },
        "sites": {
            "IOB_X1Y35": "IOB33S",
            "IOB_X1Y36": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 117,
        "pin_functions": {
            "IOB_X1Y37": "IO_L6N_T0_VREF_33",
            "IOB_X1Y38": "IO_L6P_T0_33"
        },
        "sites": {
            "IOB_X1Y37": "IOB33S",
            "IOB_X1Y38": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 115,
        "pin_functions": {
            "IOB_X1Y39": "IO_L5N_T0_33",
            "IOB_X1Y40": "IO_L5P_T0_33"
        },
        "sites": {
            "IOB_X1Y39": "IOB33S",
            "IOB_X1Y40": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 113,
        "pin_functions": {
            "IOB_X1Y41": "IO_L4N_T0_33",
            "IOB_X1Y42": "IO_L4P_T0_33"
        },
        "sites": {
            "IOB_X1Y41": "IOB33S",
            "IOB_X1Y42": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 111,
        "pin_functions": {
            "IOB_X1Y43": "IO_L3N_T0_DQS_33",
            "IOB_X1Y44": "IO_L3P_T0_DQS_33"
        },
        "sites": {
            "IOB_X1Y43": "IOB33S",
            "IOB_X1Y44": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 109,
        "pin_functions": {
            "IOB_X1Y45": "IO_L2N_T0_33",
            "IOB_X1Y46": "IO_L2P_T0_33"
        },
        "sites": {
            "IOB_X1Y45": "IOB33S",
            "IOB_X1Y46": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 186,
        "grid_y": 107,
        "pin_functions": {
            "IOB_X1Y47": "IO_L1N_T0_33",
            "IOB_X1Y48": "IO_L1P_T0_33"
        },
        "sites": {
            "IOB_X1Y47": "IOB33S",
            "IOB_X1Y48": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 102,
        "pin_functions": {
            "IOB_X1Y51": "IO_L24N_T3_34",
            "IOB_X1Y52": "IO_L24P_T3_34"
        },
        "sites": {
            "IOB_X1Y51": "IOB33S",
            "IOB_X1Y52": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 100,
        "pin_functions": {
            "IOB_X1Y53": "IO_L23N_T3_34",
            "IOB_X1Y54": "IO_L23P_T3_34"
        },
        "sites": {
            "IOB_X1Y53": "IOB33S",
            "IOB_X1Y54": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 98,
        "pin_functions": {
            "IOB_X1Y55": "IO_L22N_T3_34",
            "IOB_X1Y56": "IO_L22P_T3_34"
        },
        "sites": {
            "IOB_X1Y55": "IOB33S",
            "IOB_X1Y56": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 96,
        "pin_functions": {
            "IOB_X1Y57": "IO_L21N_T3_DQS_34",
            "IOB_X1Y58": "IO_L21P_T3_DQS_34"
        },
        "sites": {
            "IOB_X1Y57": "IOB33S",
            "IOB_X1Y58": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 94,
        "pin_functions": {
            "IOB_X1Y59": "IO_L20N_T3_34",
            "IOB_X1Y60": "IO_L20P_T3_34"
        },
        "sites": {
            "IOB_X1Y59": "IOB33S",
            "IOB_X1Y60": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 92,
        "pin_functions": {
            "IOB_X1Y61": "IO_L19N_T3_VREF_34",
            "IOB_X1Y62": "IO_L19P_T3_34"
        },
        "sites": {
            "IOB_X1Y61": "IOB33S",
            "IOB_X1Y62": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 90,
        "pin_functions": {
            "IOB_X1Y63": "IO_L18N_T2_34",
            "IOB_X1Y64": "IO_L18P_T2_34"
        },
        "sites": {
            "IOB_X1Y63": "IOB33S",
            "IOB_X1Y64": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 88,
        "pin_functions": {
            "IOB_X1Y65": "IO_L17N_T2_34",
            "IOB_X1Y66": "IO_L17P_T2_34"
        },
        "sites": {
            "IOB_X1Y65": "IOB33S",
            "IOB_X1Y66": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 86,
        "pin_functions": {
            "IOB_X1Y67": "IO_L16N_T2_34",
            "IOB_X1Y68": "IO_L16P_T2_34"
        },
        "sites": {
            "IOB_X1Y67": "IOB33S",
            "IOB_X1Y68": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 84,
        "pin_functions": {
            "IOB_X1Y69": "IO_L15N_T2_DQS_34",
            "IOB_X1Y70": "IO_L15P_T2_DQS_34"
        },
        "sites": {
            "IOB_X1Y69": "IOB33S",
            "IOB_X1Y70": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 82,
        "pin_functions": {
            "IOB_X1Y71": "IO_L14N_T2_SRCC_34",
            "IOB_X1Y72": "IO_L14P_T2_SRCC_34"
        },
        "sites": {
            "IOB_X1Y71": "IOB33S",
            "IOB_X1Y72": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 80,
        "pin_functions": {
            "IOB_X1Y73": "IO_L13N_T2_MRCC_34",
            "IOB_X1Y74": "IO_L13P_T2_MRCC_34"
        },
        "sites": {
            "IOB_X1Y73": "IOB33S",
            "IOB_X1Y74": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 77,
        "pin_functions": {
            "IOB_X1Y75": "IO_L12N_T1_MRCC_34",
            "IOB_X1Y76": "IO_L12P_T1_MRCC_34"
        },
        "sites": {
            "IOB_X1Y75": "IOB33S",
            "IOB_X1Y76": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 75,
        "pin_functions": {
            "IOB_X1Y77": "IO_L11N_T1_SRCC_34",
            "IOB_X1Y78": "IO_L11P_T1_SRCC_34"
        },
        "sites": {
            "IOB_X1Y77": "IOB33S",
            "IOB_X1Y78": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 73,
        "pin_functions": {
            "IOB_X1Y79": "IO_L10N_T1_34",
            "IOB_X1Y80": "IO_L10P_T1_34"
        },
        "sites": {
            "IOB_X1Y79": "IOB33S",
            "IOB_X1Y80": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 71,
        "pin_functions": {
            "IOB_X1Y81": "IO_L9N_T1_DQS_34",
            "IOB_X1Y82": "IO_L9P_T1_DQS_34"
        },
        "sites": {
            "IOB_X1Y81": "IOB33S",
            "IOB_X1Y82": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 69,
        "pin_functions": {
            "IOB_X1Y83": "IO_L8N_T1_34",
            "IOB_X1Y84": "IO_L8P_T1_34"
        },
        "sites": {
            "IOB_X1Y83": "IOB33S",
            "IOB_X1Y84": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 67,
        "pin_functions": {
            "IOB_X1Y85": "IO_L7N_T1_34",
            "IOB_X1Y86": "IO_L7P_T1_34"
        },
        "sites": {
            "IOB_X1Y85": "IOB33S",
            "IOB_X1Y86": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 65,
        "pin_functions": {
            "IOB_X1Y87": "IO_L6N_T0_VREF_34",
            "IOB_X1Y88": "IO_L6P_T0_34"
        },
        "sites": {
            "IOB_X1Y87": "IOB33S",
            "IOB_X1Y88": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 63,
        "pin_functions": {
            "IOB_X1Y89": "IO_L5N_T0_34",
            "IOB_X1Y90": "IO_L5P_T0_34"
        },
        "sites": {
            "IOB_X1Y89": "IOB33S",
            "IOB_X1Y90": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 61,
        "pin_functions": {
            "IOB_X1Y91": "IO_L4N_T0_34",
            "IOB_X1Y92": "IO_L4P_T0_34"
        },
        "sites": {
            "IOB_X1Y91": "IOB33S",
            "IOB_X1Y92": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 59,
        "pin_functions": {
            "IOB_X1Y93": "IO_L3N_T0_DQS_34",
            "IOB_X1Y94": "IO_L3P_T0_DQS_PUDC_B_34"
        },
        "sites": {
            "IOB_X1Y93": "IOB33S",
            "IOB_X1Y94": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 57,
        "pin_functions": {
            "IOB_X1Y95": "IO_L2N_T0_34",
            "IOB_X1Y96": "IO_L2P_T0_34"
        },
        "sites": {
            "IOB_X1Y95": "IOB33S",
            "IOB_X1Y96": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 55,
        "pin_functions": {
            "IOB_X1Y97": "IO_L1N_T0_34",
            "IOB_X1Y98": "IO_L1P_T0_34"
        },
        "sites": {
            "IOB_X1Y97": "IOB33S",
            "IOB_X1Y98": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 50,
        "pin_functions": {
            "IOB_X1Y101": "IO_L24N_T3_AD15N_35",
            "IOB_X1Y102": "IO_L24P_T3_AD15P_35"
        },
        "sites": {
            "IOB_X1Y101": "IOB33S",
            "IOB_X1Y102": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 48,
        "pin_functions": {
            "IOB_X1Y103": "IO_L23N_T3_35",
            "IOB_X1Y104": "IO_L23P_T3_35"
        },
        "sites": {
            "IOB_X1Y103": "IOB33S",
            "IOB_X1Y104": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 46,
        "pin_functions": {
            "IOB_X1Y105": "IO_L22N_T3_AD7N_35",
            "IOB_X1Y106": "IO_L22P_T3_AD7P_35"
        },
        "sites": {
            "IOB_X1Y105": "IOB33S",
            "IOB_X1Y106": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 44,
        "pin_functions": {
            "IOB_X1Y107": "IO_L21N_T3_DQS_AD14N_35",
            "IOB_X1Y108": "IO_L21P_T3_DQS_AD14P_35"
        },
        "sites": {
            "IOB_X1Y107": "IOB33S",
            "IOB_X1Y108": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 42,
        "pin_functions": {
            "IOB_X1Y109": "IO_L20N_T3_AD6N_35",
            "IOB_X1Y110": "IO_L20P_T3_AD6P_35"
        },
        "sites": {
            "IOB_X1Y109": "IOB33S",
            "IOB_X1Y110": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 40,
        "pin_functions": {
            "IOB_X1Y111": "IO_L19N_T3_VREF_35",
            "IOB_X1Y112": "IO_L19P_T3_35"
        },
        "sites": {
            "IOB_X1Y111": "IOB33S",
            "IOB_X1Y112": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 38,
        "pin_functions": {
            "IOB_X1Y113": "IO_L18N_T2_AD13N_35",
            "IOB_X1Y114": "IO_L18P_T2_AD13P_35"
        },
        "sites": {
            "IOB_X1Y113": "IOB33S",
            "IOB_X1Y114": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 36,
        "pin_functions": {
            "IOB_X1Y115": "IO_L17N_T2_AD5N_35",
            "IOB_X1Y116": "IO_L17P_T2_AD5P_35"
        },
        "sites": {
            "IOB_X1Y115": "IOB33S",
            "IOB_X1Y116": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 34,
        "pin_functions": {
            "IOB_X1Y117": "IO_L16N_T2_35",
            "IOB_X1Y118": "IO_L16P_T2_35"
        },
        "sites": {
            "IOB_X1Y117": "IOB33S",
            "IOB_X1Y118": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 32,
        "pin_functions": {
            "IOB_X1Y119": "IO_L15N_T2_DQS_AD12N_35",
            "IOB_X1Y120": "IO_L15P_T2_DQS_AD12P_35"
        },
        "sites": {
            "IOB_X1Y119": "IOB33S",
            "IOB_X1Y120": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 30,
        "pin_functions": {
            "IOB_X1Y121": "IO_L14N_T2_AD4N_SRCC_35",
            "IOB_X1Y122": "IO_L14P_T2_AD4P_SRCC_35"
        },
        "sites": {
            "IOB_X1Y121": "IOB33S",
            "IOB_X1Y122": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 28,
        "pin_functions": {
            "IOB_X1Y123": "IO_L13N_T2_MRCC_35",
            "IOB_X1Y124": "IO_L13P_T2_MRCC_35"
        },
        "sites": {
            "IOB_X1Y123": "IOB33S",
            "IOB_X1Y124": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 25,
        "pin_functions": {
            "IOB_X1Y125": "IO_L12N_T1_MRCC_35",
            "IOB_X1Y126": "IO_L12P_T1_MRCC_35"
        },
        "sites": {
            "IOB_X1Y125": "IOB33S",
            "IOB_X1Y126": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 23,
        "pin_functions": {
            "IOB_X1Y127": "IO_L11N_T1_SRCC_35",
            "IOB_X1Y128": "IO_L11P_T1_SRCC_35"
        },
        "sites": {
            "IOB_X1Y127": "IOB33S",
            "IOB_X1Y128": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 21,
        "pin_functions": {
            "IOB_X1Y129": "IO_L10N_T1_AD11N_35",
            "IOB_X1Y130": "IO_L10P_T1_AD11P_35"
        },
        "sites": {
            "IOB_X1Y129": "IOB33S",
            "IOB_X1Y130": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 19,
        "pin_functions": {
            "IOB_X1Y131": "IO_L9N_T1_DQS_AD3N_35",
            "IOB_X1Y132": "IO_L9P_T1_DQS_AD3P_35"
        },
        "sites": {
            "IOB_X1Y131": "IOB33S",
            "IOB_X1Y132": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 17,
        "pin_functions": {
            "IOB_X1Y133": "IO_L8N_T1_AD10N_35",
            "IOB_X1Y134": "IO_L8P_T1_AD10P_35"
        },
        "sites": {
            "IOB_X1Y133": "IOB33S",
            "IOB_X1Y134": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 15,
        "pin_functions": {
            "IOB_X1Y135": "IO_L7N_T1_AD2N_35",
            "IOB_X1Y136": "IO_L7P_T1_AD2P_35"
        },
        "sites": {
            "IOB_X1Y135": "IOB33S",
            "IOB_X1Y136": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 13,
        "pin_functions": {
            "IOB_X1Y137": "IO_L6N_T0_VREF_35",
            "IOB_X1Y138": "IO_L6P_T0_35"
        },
        "sites": {
            "IOB_X1Y137": "IOB33S",
            "IOB_X1Y138": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 11,
        "pin_functions": {
            "IOB_X1Y139": "IO_L5N_T0_AD9N_35",
            "IOB_X1Y140": "IO_L5P_T0_AD9P_35"
        },
        "sites": {
            "IOB_X1Y139": "IOB33S",
            "IOB_X1Y140": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 9,
        "pin_functions": {
            "IOB_X1Y141": "IO_L4N_T0_35",
            "IOB_X1Y142": "IO_L4P_T0_35"
        },
        "sites": {
            "IOB_X1Y141": "IOB33S",
            "IOB_X1Y142": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 7,
        "pin_functions": {
            "IOB_X1Y143": "IO_L3N_T0_DQS_AD1N_35",
            "IOB_X1Y144": "IO_L3P_T0_DQS_AD1P_35"
        },
        "sites": {
            "IOB_X1Y143": "IOB33S",
            "IOB_X1Y144": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 5,
        "pin_functions": {
            "IOB_X1Y145": "IO_L2N_T0_AD8N_35",
            "IOB_X1Y146": "IO_L2P_T0_AD8P_35"
        },
        "sites": {
            "IOB_X1Y145": "IOB33S",
            "IOB_X1Y146": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X73Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 3,
        "pin_functions": {
            "IOB_X1Y147": "IO_L1N_T0_AD0N_35",
            "IOB_X1Y148": "IO_L1P_T0_AD0P_35"
        },
        "sites": {
            "IOB_X1Y147": "IOB33S",
            "IOB_X1Y148": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOI3_SING_X73Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 185,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y0": "IDELAYE2",
            "ILOGIC_X1Y0": "ILOGICE3",
            "OLOGIC_X1Y0": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X73Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 185,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y49": "IDELAYE2",
            "ILOGIC_X1Y49": "ILOGICE3",
            "OLOGIC_X1Y49": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X73Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 185,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y50": "IDELAYE2",
            "ILOGIC_X1Y50": "ILOGICE3",
            "OLOGIC_X1Y50": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X73Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 185,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y99": "IDELAYE2",
            "ILOGIC_X1Y99": "ILOGICE3",
            "OLOGIC_X1Y99": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X73Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 185,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y100": "IDELAYE2",
            "ILOGIC_X1Y100": "ILOGICE3",
            "OLOGIC_X1Y100": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X73Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00002480",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 185,
        "grid_y": 1,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y149": "IDELAYE2",
            "ILOGIC_X1Y149": "ILOGICE3",
            "OLOGIC_X1Y149": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_TBYTESRC_X73Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 185,
        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y7": "IDELAYE2",
            "IDELAY_X1Y8": "IDELAYE2",
            "ILOGIC_X1Y7": "ILOGICE3",
            "ILOGIC_X1Y8": "ILOGICE3",
            "OLOGIC_X1Y7": "OLOGICE3",
            "OLOGIC_X1Y8": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X73Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 185,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y19": "IDELAYE2",
            "IDELAY_X1Y20": "IDELAYE2",
            "ILOGIC_X1Y19": "ILOGICE3",
            "ILOGIC_X1Y20": "ILOGICE3",
            "OLOGIC_X1Y19": "OLOGICE3",
            "OLOGIC_X1Y20": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X73Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 185,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y31": "IDELAYE2",
            "IDELAY_X1Y32": "IDELAYE2",
            "ILOGIC_X1Y31": "ILOGICE3",
            "ILOGIC_X1Y32": "ILOGICE3",
            "OLOGIC_X1Y31": "OLOGICE3",
            "OLOGIC_X1Y32": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X73Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 185,
        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y43": "IDELAYE2",
            "IDELAY_X1Y44": "IDELAYE2",
            "ILOGIC_X1Y43": "ILOGICE3",
            "ILOGIC_X1Y44": "ILOGICE3",
            "OLOGIC_X1Y43": "OLOGICE3",
            "OLOGIC_X1Y44": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X73Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402480",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
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        },
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        },
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        },
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        },
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        },
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        },
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        },
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        },
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        },
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        },
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        },
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        },
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        },
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            "OLOGIC_X1Y18": "OLOGICE3"
        },
        "type": "RIOI3"
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            "OLOGIC_X1Y21": "OLOGICE3",
            "OLOGIC_X1Y22": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X73Y23": {
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                "words": 4
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        },
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            "OLOGIC_X1Y23": "OLOGICE3",
            "OLOGIC_X1Y24": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X73Y25": {
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                "words": 4
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            "OLOGIC_X1Y25": "OLOGICE3",
            "OLOGIC_X1Y26": "OLOGICE3"
        },
        "type": "RIOI3"
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                "offset": 55,
                "words": 4
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        },
        "clock_region": "X1Y0",
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            "OLOGIC_X1Y27": "OLOGICE3",
            "OLOGIC_X1Y28": "OLOGICE3"
        },
        "type": "RIOI3"
    },
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        "bits": {
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                "offset": 59,
                "words": 4
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        },
        "clock_region": "X1Y0",
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            "OLOGIC_X1Y30": "OLOGICE3"
        },
        "type": "RIOI3"
    },
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        "bits": {
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                "frames": 42,
                "offset": 67,
                "words": 4
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        },
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            "OLOGIC_X1Y33": "OLOGICE3",
            "OLOGIC_X1Y34": "OLOGICE3"
        },
        "type": "RIOI3"
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        "bits": {
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                "words": 4
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        },
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            "OLOGIC_X1Y35": "OLOGICE3",
            "OLOGIC_X1Y36": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X73Y39": {
        "bits": {
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                "offset": 79,
                "words": 4
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        },
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            "OLOGIC_X1Y39": "OLOGICE3",
            "OLOGIC_X1Y40": "OLOGICE3"
        },
        "type": "RIOI3"
    },
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        "bits": {
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                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 83,
                "words": 4
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        },
        "clock_region": "X1Y0",
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            "ILOGIC_X1Y42": "ILOGICE3",
            "OLOGIC_X1Y41": "OLOGICE3",
            "OLOGIC_X1Y42": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X73Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
                "frames": 42,
                "offset": 91,
                "words": 4
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y45": "IDELAYE2",
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            "ILOGIC_X1Y45": "ILOGICE3",
            "ILOGIC_X1Y46": "ILOGICE3",
            "OLOGIC_X1Y45": "OLOGICE3",
            "OLOGIC_X1Y46": "OLOGICE3"
        },
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        },
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        },
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        },
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        "type": "RIOI3"
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        },
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        "type": "RIOI3"
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        },
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        },
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        },
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        "type": "RIOI3"
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        },
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        "type": "RIOI3"
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        },
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    "RIOI3_X73Y73": {
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        },
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        },
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        },
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        },
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        },
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        },
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                "words": 4
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        },
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        "type": "RIOI3"
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        },
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        },
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        },
        "type": "RIOI3"
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        },
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        },
        "type": "RIOI3"
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        },
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        },
        "type": "RIOI3"
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        },
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        },
        "type": "RIOI3"
    },
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                "words": 4
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        },
        "clock_region": "X1Y2",
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            "OLOGIC_X1Y104": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X73Y105": {
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                "words": 4
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        },
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            "OLOGIC_X1Y106": "OLOGICE3"
        },
        "type": "RIOI3"
    },
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                "words": 4
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        },
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            "OLOGIC_X1Y110": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X73Y111": {
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                "words": 4
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        },
        "clock_region": "X1Y2",
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        },
        "type": "RIOI3"
    },
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                "words": 4
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        },
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            "OLOGIC_X1Y116": "OLOGICE3"
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        "type": "RIOI3"
    },
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                "words": 4
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        },
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        "type": "RIOI3"
    },
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                "words": 4
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        },
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        },
        "type": "RIOI3"
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                "words": 4
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        },
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            "OLOGIC_X1Y124": "OLOGICE3"
        },
        "type": "RIOI3"
    },
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                "words": 4
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        },
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            "OLOGIC_X1Y125": "OLOGICE3",
            "OLOGIC_X1Y126": "OLOGICE3"
        },
        "type": "RIOI3"
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                "offset": 55,
                "words": 4
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        },
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            "OLOGIC_X1Y127": "OLOGICE3",
            "OLOGIC_X1Y128": "OLOGICE3"
        },
        "type": "RIOI3"
    },
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        "bits": {
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                "frames": 42,
                "offset": 59,
                "words": 4
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
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            "OLOGIC_X1Y129": "OLOGICE3",
            "OLOGIC_X1Y130": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X73Y133": {
        "bits": {
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