Google Git
Sign in
foss-fpga-tools / prjxray-db / 7f7f529a752284693c28c2eb6acc3e2f27d22a57^! / .
commit7f7f529a752284693c28c2eb6acc3e2f27d22a57[log] [tgz]
authorTim 'mithro' Ansell <me@mith.ro>Thu Feb 18 08:28:55 2021 -0800
committerTim 'mithro' Ansell <me@mith.ro>Thu Feb 18 08:28:55 2021 -0800
tree6b35d12067e01ce24fcb1efcba1f755b98d73a0b
parente7663ba6eb651a7255775c7dca4e32483a8cd9fb [diff]
Updating all based on "Merge pull request #1591 from antmicro/add-dsp-pips"

See [Info File](Info.md) for details.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>

diff --git a/Info.md b/Info.md
index fdce660..8d9b94e 100644
--- a/Info.md
+++ b/Info.md

@@ -37,20 +37,20 @@
 
 # Details
 
-Last updated on Mon 25 Jan 2021 08:15:39 PM UTC (2021-01-25T20:15:39+00:00).
+Last updated on Thu 18 Feb 2021 04:28:24 PM UTC (2021-02-18T16:28:24+00:00).
 
-Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [6e3f0537](https://github.com/SymbiFlow/prjxray/commit/6e3f05370102d3b93760120741ca75c14599e7e2).
+Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [f3028e15](https://github.com/SymbiFlow/prjxray/commit/f3028e157e5f554e085af2a58247e2c8c7be0f3b).
 
 Latest commit was;
 ```
-commit 6e3f05370102d3b93760120741ca75c14599e7e2
-Merge: 14d2c2b9 b81df3fe
+commit f3028e157e5f554e085af2a58247e2c8c7be0f3b
+Merge: 2c9571d1 82662476
 Author: litghost <537074+litghost@users.noreply.github.com>
-Date:   Fri Jan 22 12:36:55 2021 -0800
+Date:   Wed Feb 17 09:26:49 2021 -0800
 
-    Merge pull request #1558 from antmicro/add-gtp-channel-conf
+    Merge pull request #1591 from antmicro/add-dsp-pips
     
-    Add GTP_CHANNEL fuzzer
+    101-dsp-pips: solve DSP-related PIPs
 ```
 
 
@@ -59,7 +59,7 @@
 
 ### Settings
 
-Created using following [settings/artix7.sh (sha256: 00d45bf1672d3460e8d452cda8e747fa713eed629aa086b219162886452013e4)](https://github.com/SymbiFlow/prjxray/blob/6e3f05370102d3b93760120741ca75c14599e7e2/settings/artix7.sh)
+Created using following [settings/artix7.sh (sha256: 00d45bf1672d3460e8d452cda8e747fa713eed629aa086b219162886452013e4)](https://github.com/SymbiFlow/prjxray/blob/f3028e157e5f554e085af2a58247e2c8c7be0f3b/settings/artix7.sh)
 ```shell
 #!/bin/bash
 # Copyright (C) 2017-2020  The Project X-Ray Authors.
@@ -109,26 +109,26 @@
  * [`2b18b3806f0e58024469eac1fe11749d04c6b035d2c2eafa7d2f30bf57173fa9  ./artix7/harness/README.md`](./artix7/harness/README.md)
  * [`560f255b569fd4798989f45104d4a511b51380418d4ca6fc53201141b36b20aa  ./artix7/harness/arty-a7/pmod/design.bit`](./artix7/harness/arty-a7/pmod/design.bit)
  * [`1d8a121c3aa3bca7893429cfb08a8748206134271432daa52cdc9d3f5593bda0  ./artix7/harness/arty-a7/pmod/design.dcp`](./artix7/harness/arty-a7/pmod/design.dcp)
- * [`fce1ab5cc3e9b1ec365d1ec76ae95e8fcbb3ed9f412faa73c05cc94ab530723b  ./artix7/harness/arty-a7/pmod/design.json`](./artix7/harness/arty-a7/pmod/design.json)
+ * [`38d9952e3e0a9bee6829dd338fa1965e150fd0d75fea13891d7a6a64fb5e14a5  ./artix7/harness/arty-a7/pmod/design.json`](./artix7/harness/arty-a7/pmod/design.json)
  * [`fb90ad5fe10750f33d5802e1409ebc2406f7b0adab4bf6ef12b53c0e100b43ea  ./artix7/harness/arty-a7/pmod/design.txt`](./artix7/harness/arty-a7/pmod/design.txt)
  * [`931c1598b75005a8a8e5b2225cc7454c2c7be451cb907bc4c047cb04db99772d  ./artix7/harness/arty-a7/swbut/design.bit`](./artix7/harness/arty-a7/swbut/design.bit)
  * [`5d06132c788097344a9bca7040a08dd0e1632e177ed8def1d7445132020cc768  ./artix7/harness/arty-a7/swbut/design.dcp`](./artix7/harness/arty-a7/swbut/design.dcp)
- * [`05fac731f2df3b4e59a567fe7a2db3e7cbaa370d47ae15d071de98cb8a266340  ./artix7/harness/arty-a7/swbut/design.json`](./artix7/harness/arty-a7/swbut/design.json)
+ * [`b1ff8026fb1ae19410884c09075306fe0cbeef8b4116bf7070979d19d1842bfa  ./artix7/harness/arty-a7/swbut/design.json`](./artix7/harness/arty-a7/swbut/design.json)
  * [`884af447661ff1cb653cd8280602c2348435366b35bf2627e2221af34899d191  ./artix7/harness/arty-a7/swbut/design.txt`](./artix7/harness/arty-a7/swbut/design.txt)
  * [`128e73ee026cf2238a35c7e993b845e3551919c90fc77b277635bc5098d59741  ./artix7/harness/arty-a7/uart/design.bit`](./artix7/harness/arty-a7/uart/design.bit)
  * [`955daed70c5728c13865eddc9bd7001d93183a50c560559a7b6628aa85b1fbbe  ./artix7/harness/arty-a7/uart/design.dcp`](./artix7/harness/arty-a7/uart/design.dcp)
- * [`8232e7aa1e30e0ae5d7d5cecd73ff0b6daa241a7271b16b94229ade213422339  ./artix7/harness/arty-a7/uart/design.json`](./artix7/harness/arty-a7/uart/design.json)
+ * [`c9cc30b017bf4345b3f0d6707f76cd50da2e7b6f045877bc99c1404147b1bb1e  ./artix7/harness/arty-a7/uart/design.json`](./artix7/harness/arty-a7/uart/design.json)
  * [`0583aa7502ee7a0303510c524f5500d8e1b9598aa26016d3d0e4e9623bf8ab8d  ./artix7/harness/arty-a7/uart/design.txt`](./artix7/harness/arty-a7/uart/design.txt)
  * [`d3109010f8fced3be08e720741a157d08b7042359e84d04bbe677f50cbf10a04  ./artix7/harness/basys3/swbut/design.bit`](./artix7/harness/basys3/swbut/design.bit)
  * [`abedfa7f2ee5a4dbc51b582ebae62dd20489f745a4a239e49b18ba3e02be019f  ./artix7/harness/basys3/swbut/design.dcp`](./artix7/harness/basys3/swbut/design.dcp)
- * [`1765b8e3bf0a02192069749f810ebf99e5309154464140b0fbceca521bcefc52  ./artix7/harness/basys3/swbut/design.json`](./artix7/harness/basys3/swbut/design.json)
+ * [`77aaf986289d5d97ab80a61fe6ef9708e03a95f4de895ec8c9b364c602b98424  ./artix7/harness/basys3/swbut/design.json`](./artix7/harness/basys3/swbut/design.json)
  * [`9df8eac3c11e57d81b4bf4a927ade787f881f0ef46c8ab610ca529f35e887689  ./artix7/harness/basys3/swbut/design.txt`](./artix7/harness/basys3/swbut/design.txt)
  * [`3ad62b024991225f1565e84159f2eb59d08e9fc6cf2577ea1698952b5dc0e4ec  ./artix7/harness/basys3/swbut_50/design.bit`](./artix7/harness/basys3/swbut_50/design.bit)
  * [`773fe43b4974ab353bde87e544abb6b541cdcb280de40df76afa96f7fa23db46  ./artix7/harness/basys3/swbut_50/design.dcp`](./artix7/harness/basys3/swbut_50/design.dcp)
  * [`5d08d9434fd6a8340dfe354613455554c037f6c886a35f6cc98055ff955613c1  ./artix7/harness/basys3/swbut_50/design.json`](./artix7/harness/basys3/swbut_50/design.json)
  * [`9df8eac3c11e57d81b4bf4a927ade787f881f0ef46c8ab610ca529f35e887689  ./artix7/harness/basys3/swbut_50/design.txt`](./artix7/harness/basys3/swbut_50/design.txt)
  * [`e5ebd51966bcfddb9b04078203231810df64f5afd3e3a608a5fb8fdc7d3c3304  ./artix7/mapping/devices.yaml`](./artix7/mapping/devices.yaml)
- * [`ee389fc75dd0f56a71852be8b2c1ce1a8c9572a63e4a3e92c239dcab71d7b7f8  ./artix7/mapping/parts.yaml`](./artix7/mapping/parts.yaml)
+ * [`9a63d519dcfee4016602553490a53c00a2fbc8cd0355ed201cfa3545650f6ce4  ./artix7/mapping/parts.yaml`](./artix7/mapping/parts.yaml)
  * [`fca753747fb1d583483e22980c4dae3a2de6451a326d46eab3581ea6f50f5b2d  ./artix7/mask_bram_l.block_ram.db`](./artix7/mask_bram_l.block_ram.db)
  * [`6d74881ba45dd2b17f442764722e3bb570fc879b973f32a778d0cbd583b513e1  ./artix7/mask_bram_l.db`](./artix7/mask_bram_l.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/mask_bram_l.origin_info.db`](./artix7/mask_bram_l.origin_info.db)
@@ -152,21 +152,21 @@
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/mask_dsp_l.origin_info.db`](./artix7/mask_dsp_l.origin_info.db)
  * [`0ea9fc3ec271604c27b850f84ec3811fd366c0897dfb8728bdb96d7f170a8a27  ./artix7/mask_dsp_r.db`](./artix7/mask_dsp_r.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/mask_dsp_r.origin_info.db`](./artix7/mask_dsp_r.origin_info.db)
- * [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf  ./artix7/mask_gtp_channel_0.db`](./artix7/mask_gtp_channel_0.db)
- * [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf  ./artix7/mask_gtp_channel_0_mid_left.db`](./artix7/mask_gtp_channel_0_mid_left.db)
- * [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf  ./artix7/mask_gtp_channel_0_mid_right.db`](./artix7/mask_gtp_channel_0_mid_right.db)
- * [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf  ./artix7/mask_gtp_channel_1.db`](./artix7/mask_gtp_channel_1.db)
- * [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf  ./artix7/mask_gtp_channel_1_mid_left.db`](./artix7/mask_gtp_channel_1_mid_left.db)
- * [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf  ./artix7/mask_gtp_channel_1_mid_right.db`](./artix7/mask_gtp_channel_1_mid_right.db)
- * [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf  ./artix7/mask_gtp_channel_2.db`](./artix7/mask_gtp_channel_2.db)
- * [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf  ./artix7/mask_gtp_channel_2_mid_left.db`](./artix7/mask_gtp_channel_2_mid_left.db)
- * [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf  ./artix7/mask_gtp_channel_2_mid_right.db`](./artix7/mask_gtp_channel_2_mid_right.db)
- * [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf  ./artix7/mask_gtp_channel_3.db`](./artix7/mask_gtp_channel_3.db)
- * [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf  ./artix7/mask_gtp_channel_3_mid_left.db`](./artix7/mask_gtp_channel_3_mid_left.db)
- * [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf  ./artix7/mask_gtp_channel_3_mid_right.db`](./artix7/mask_gtp_channel_3_mid_right.db)
- * [`5a3a0bab93d2e2df22e1245c38d2e1a62f6d6cb1d6ad358099402d9c89aa13bc  ./artix7/mask_gtp_common.db`](./artix7/mask_gtp_common.db)
- * [`60e4aed5bb9e864d2cd815281cf2bcf296b462d5e0982eabf9c582a4e2f89afc  ./artix7/mask_gtp_common_mid_left.db`](./artix7/mask_gtp_common_mid_left.db)
- * [`60e4aed5bb9e864d2cd815281cf2bcf296b462d5e0982eabf9c582a4e2f89afc  ./artix7/mask_gtp_common_mid_right.db`](./artix7/mask_gtp_common_mid_right.db)
+ * [`9e159b25b2f3eadcc2fa0bcd2f3c25dc3acf2083d3a57368968204d70d5f8ae4  ./artix7/mask_gtp_channel_0.db`](./artix7/mask_gtp_channel_0.db)
+ * [`d9ee40b7a46372b89ebc17de5800266a25489c6c2f3f9495d29f7916c3c6909c  ./artix7/mask_gtp_channel_0_mid_left.db`](./artix7/mask_gtp_channel_0_mid_left.db)
+ * [`d9ee40b7a46372b89ebc17de5800266a25489c6c2f3f9495d29f7916c3c6909c  ./artix7/mask_gtp_channel_0_mid_right.db`](./artix7/mask_gtp_channel_0_mid_right.db)
+ * [`9e159b25b2f3eadcc2fa0bcd2f3c25dc3acf2083d3a57368968204d70d5f8ae4  ./artix7/mask_gtp_channel_1.db`](./artix7/mask_gtp_channel_1.db)
+ * [`d9ee40b7a46372b89ebc17de5800266a25489c6c2f3f9495d29f7916c3c6909c  ./artix7/mask_gtp_channel_1_mid_left.db`](./artix7/mask_gtp_channel_1_mid_left.db)
+ * [`d9ee40b7a46372b89ebc17de5800266a25489c6c2f3f9495d29f7916c3c6909c  ./artix7/mask_gtp_channel_1_mid_right.db`](./artix7/mask_gtp_channel_1_mid_right.db)
+ * [`9e159b25b2f3eadcc2fa0bcd2f3c25dc3acf2083d3a57368968204d70d5f8ae4  ./artix7/mask_gtp_channel_2.db`](./artix7/mask_gtp_channel_2.db)
+ * [`d9ee40b7a46372b89ebc17de5800266a25489c6c2f3f9495d29f7916c3c6909c  ./artix7/mask_gtp_channel_2_mid_left.db`](./artix7/mask_gtp_channel_2_mid_left.db)
+ * [`d9ee40b7a46372b89ebc17de5800266a25489c6c2f3f9495d29f7916c3c6909c  ./artix7/mask_gtp_channel_2_mid_right.db`](./artix7/mask_gtp_channel_2_mid_right.db)
+ * [`9e159b25b2f3eadcc2fa0bcd2f3c25dc3acf2083d3a57368968204d70d5f8ae4  ./artix7/mask_gtp_channel_3.db`](./artix7/mask_gtp_channel_3.db)
+ * [`d9ee40b7a46372b89ebc17de5800266a25489c6c2f3f9495d29f7916c3c6909c  ./artix7/mask_gtp_channel_3_mid_left.db`](./artix7/mask_gtp_channel_3_mid_left.db)
+ * [`d9ee40b7a46372b89ebc17de5800266a25489c6c2f3f9495d29f7916c3c6909c  ./artix7/mask_gtp_channel_3_mid_right.db`](./artix7/mask_gtp_channel_3_mid_right.db)
+ * [`b9066d709d18d2d284c7728de80437c2785c2ab02edb7220fc93099a64f96232  ./artix7/mask_gtp_common.db`](./artix7/mask_gtp_common.db)
+ * [`212f9438c5b4fdb328d28ea3ae6f97f15169faa1d8d0d73476e476018a4521e5  ./artix7/mask_gtp_common_mid_left.db`](./artix7/mask_gtp_common_mid_left.db)
+ * [`212f9438c5b4fdb328d28ea3ae6f97f15169faa1d8d0d73476e476018a4521e5  ./artix7/mask_gtp_common_mid_right.db`](./artix7/mask_gtp_common_mid_right.db)
  * [`c714c25d06cc5d3b7947e638f55c5268b01792cb2d86320a5411d00387ada404  ./artix7/mask_hclk_cmt.db`](./artix7/mask_hclk_cmt.db)
  * [`c714c25d06cc5d3b7947e638f55c5268b01792cb2d86320a5411d00387ada404  ./artix7/mask_hclk_cmt_l.db`](./artix7/mask_hclk_cmt_l.db)
  * [`d0914443ac28056e840aee431bd51933a7cdc6504eefb052113d7e33e8b08e83  ./artix7/mask_hclk_ioi.db`](./artix7/mask_hclk_ioi.db)
@@ -175,12 +175,12 @@
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/mask_hclk_l.origin_info.db`](./artix7/mask_hclk_l.origin_info.db)
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./artix7/mask_hclk_r.db`](./artix7/mask_hclk_r.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/mask_hclk_r.origin_info.db`](./artix7/mask_hclk_r.origin_info.db)
- * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6  ./artix7/mask_liob33.db`](./artix7/mask_liob33.db)
+ * [`b1e6417cccea25799f1e5bf4b86b7a42fa1c46cb1351da93e380a519691e9fbd  ./artix7/mask_liob33.db`](./artix7/mask_liob33.db)
  * [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576  ./artix7/mask_lioi3.db`](./artix7/mask_lioi3.db)
  * [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576  ./artix7/mask_lioi3_tbytesrc.db`](./artix7/mask_lioi3_tbytesrc.db)
  * [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576  ./artix7/mask_lioi3_tbyteterm.db`](./artix7/mask_lioi3_tbyteterm.db)
  * [`454a16b8e9d2e0d38ee8c4af979a7bb1dd0757e5edb90d7b4f9489f094e7b162  ./artix7/mask_pcie_bot.db`](./artix7/mask_pcie_bot.db)
- * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6  ./artix7/mask_riob33.db`](./artix7/mask_riob33.db)
+ * [`b1e6417cccea25799f1e5bf4b86b7a42fa1c46cb1351da93e380a519691e9fbd  ./artix7/mask_riob33.db`](./artix7/mask_riob33.db)
  * [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576  ./artix7/mask_rioi3.db`](./artix7/mask_rioi3.db)
  * [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576  ./artix7/mask_rioi3_tbytesrc.db`](./artix7/mask_rioi3_tbytesrc.db)
  * [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576  ./artix7/mask_rioi3_tbyteterm.db`](./artix7/mask_rioi3_tbyteterm.db)
@@ -275,10 +275,10 @@
  * [`0a36013e20bc01d66d1a73eb2594e67d57898efddeb8de046ebcf65eed259c27  ./artix7/segbits_cmt_top_r_lower_b.origin_info.db`](./artix7/segbits_cmt_top_r_lower_b.origin_info.db)
  * [`05dd5d01374a8b40883444d33ea467e5e4363fc329e89402ee9618bde4d6752b  ./artix7/segbits_cmt_top_r_upper_t.db`](./artix7/segbits_cmt_top_r_upper_t.db)
  * [`1117a583fc1c9265aa6dcea7d32f363dd2c5ebe0e657f3a242c5fb0ceb8555fc  ./artix7/segbits_cmt_top_r_upper_t.origin_info.db`](./artix7/segbits_cmt_top_r_upper_t.origin_info.db)
- * [`0d9f730a1328a61f471c2f6abd98463a39c7e5e70ff557adc6228e1830560c64  ./artix7/segbits_dsp_l.db`](./artix7/segbits_dsp_l.db)
- * [`10a6e47f7b26f0d21cf0a011d4a5f2a4266538bb8d028a07fd981323dc1f0da0  ./artix7/segbits_dsp_l.origin_info.db`](./artix7/segbits_dsp_l.origin_info.db)
- * [`f81459ae1c84e0e73815c4577a7d0b19b497dd7f16029763c3fc4f3b8410dcc2  ./artix7/segbits_dsp_r.db`](./artix7/segbits_dsp_r.db)
- * [`76965c2e6ba2acab8f809a3d947b100fd322ba5b6d88c358bf816699348b07bf  ./artix7/segbits_dsp_r.origin_info.db`](./artix7/segbits_dsp_r.origin_info.db)
+ * [`81e0623ff13a253e3f9303de3d5dfbcf2fc92cf5cba277bd7de69e70c3c527e3  ./artix7/segbits_dsp_l.db`](./artix7/segbits_dsp_l.db)
+ * [`18cfd5dd8f59ca704cabeeddb2365486c755185b16a41714cc18ad08818c4f62  ./artix7/segbits_dsp_l.origin_info.db`](./artix7/segbits_dsp_l.origin_info.db)
+ * [`5297906aaafefd3be356682dc03cc4f8c85d0ec238a7d66bafc8b1b50a6c0c96  ./artix7/segbits_dsp_r.db`](./artix7/segbits_dsp_r.db)
+ * [`1f6d942f652416b24c7cdae7188144cc9a0778fc439d6e9f22ecec5d7833a391  ./artix7/segbits_dsp_r.origin_info.db`](./artix7/segbits_dsp_r.origin_info.db)
  * [`43e958853f10cd658ae0af26f78469bdac9b2bd1abb5dbee83f4e9dfad40eaeb  ./artix7/segbits_gtp_channel_0.db`](./artix7/segbits_gtp_channel_0.db)
  * [`23f87065aec5f4f22dd0c3c0b5e73a50e13e28b3c494f07becf435f219030b30  ./artix7/segbits_gtp_channel_0.origin_info.db`](./artix7/segbits_gtp_channel_0.origin_info.db)
  * [`fffd49cbef2952247233e2128b2752bf28f91f05e194495c6b044d125902191e  ./artix7/segbits_gtp_channel_0_mid_left.db`](./artix7/segbits_gtp_channel_0_mid_left.db)
@@ -303,28 +303,34 @@
  * [`290ca89106b61311978f9b7a9650fddb4dd5fb2b249612f66abdbe5a0a102f75  ./artix7/segbits_gtp_channel_3_mid_left.origin_info.db`](./artix7/segbits_gtp_channel_3_mid_left.origin_info.db)
  * [`4cda734eeec2bfdcd7eab62628b5577277f820aae7ba01c85fa7dbe2389ada1d  ./artix7/segbits_gtp_channel_3_mid_right.db`](./artix7/segbits_gtp_channel_3_mid_right.db)
  * [`e8357be2f52886f7160aafa6495791ab890808f99a1e396077e17c30e49e6700  ./artix7/segbits_gtp_channel_3_mid_right.origin_info.db`](./artix7/segbits_gtp_channel_3_mid_right.origin_info.db)
- * [`eca0e9e36b3e9f6e2584ee31e10a4104d5e128aac610da8236c94d49ebd02b3c  ./artix7/segbits_gtp_common.db`](./artix7/segbits_gtp_common.db)
- * [`ddfdf641009197804217c42635638c4d797355684584051939ed9b48558b4494  ./artix7/segbits_gtp_common.origin_info.db`](./artix7/segbits_gtp_common.origin_info.db)
- * [`0e52cfd32e766dafe42f2d2c7a2ff5c4a9195dce8a1d7cd019f49dd01d0ce818  ./artix7/segbits_gtp_common_mid_left.db`](./artix7/segbits_gtp_common_mid_left.db)
- * [`225f0089d42a1d565d8335a053998a98a11120535255834c259df5cf2e921c85  ./artix7/segbits_gtp_common_mid_left.origin_info.db`](./artix7/segbits_gtp_common_mid_left.origin_info.db)
- * [`c4b5b9477acc4e6220cb4e28604eecf205b2864cfd310edd9246f9182c90f451  ./artix7/segbits_gtp_common_mid_right.db`](./artix7/segbits_gtp_common_mid_right.db)
- * [`1371addf23574533d237282c8651987089d3fa705fb7c7192dc5567ac80db8d6  ./artix7/segbits_gtp_common_mid_right.origin_info.db`](./artix7/segbits_gtp_common_mid_right.origin_info.db)
+ * [`ea2df8227b92dbceb1073077f6453b6eb22eb6add9f330b93490915afd74ac2b  ./artix7/segbits_gtp_common.db`](./artix7/segbits_gtp_common.db)
+ * [`1d1399b298c426c6e15ffb7c75ee1fa9887d3de1210e17a046022ffff4d45287  ./artix7/segbits_gtp_common.origin_info.db`](./artix7/segbits_gtp_common.origin_info.db)
+ * [`37afc4aaffef82bc42052353e4a68a483be81cc4b08e0847b4627a395fad6a24  ./artix7/segbits_gtp_common_mid_left.db`](./artix7/segbits_gtp_common_mid_left.db)
+ * [`c792735501a19ea5ffb9808844d8875c21f234e653ed51a33e8fb9c777b4f9ef  ./artix7/segbits_gtp_common_mid_left.origin_info.db`](./artix7/segbits_gtp_common_mid_left.origin_info.db)
+ * [`1207c6985578749fe921840fe35187fd9043733059b463616ca9f8c189c6f81b  ./artix7/segbits_gtp_common_mid_right.db`](./artix7/segbits_gtp_common_mid_right.db)
+ * [`2f4d78754b65f558fb7ec8c89641312ba45e68d434529885be26696204de066b  ./artix7/segbits_gtp_common_mid_right.origin_info.db`](./artix7/segbits_gtp_common_mid_right.origin_info.db)
+ * [`0716b02a4d15baf2ae6ad06fd828e5e5d14bb6ca6ec4ed73da297863b66d9855  ./artix7/segbits_gtp_int_interface.db`](./artix7/segbits_gtp_int_interface.db)
+ * [`78df9b3f2977dddf280f5d0586d708bd635aa539d1e784fbc66cfde597670086  ./artix7/segbits_gtp_int_interface.origin_info.db`](./artix7/segbits_gtp_int_interface.origin_info.db)
+ * [`0cbdfb2e0e68dd296429972a70391d785011b7db5c720b605379d9812a45756c  ./artix7/segbits_gtp_int_interface_l.db`](./artix7/segbits_gtp_int_interface_l.db)
+ * [`3077cf7a0f949fb0ea40f725fd595bb721d5c24a9e0b487c988a5c94f68797a6  ./artix7/segbits_gtp_int_interface_l.origin_info.db`](./artix7/segbits_gtp_int_interface_l.origin_info.db)
+ * [`3dad412a515333cf3c4f7e5cc71f1ad1f027fa9f6e5135fc0ef87ebb9576fe91  ./artix7/segbits_gtp_int_interface_r.db`](./artix7/segbits_gtp_int_interface_r.db)
+ * [`3cca0de5223f38c39493c7f6571e32f8a400b7f6cd784d20e49ca8082dde00f8  ./artix7/segbits_gtp_int_interface_r.origin_info.db`](./artix7/segbits_gtp_int_interface_r.origin_info.db)
  * [`5d9063c8d4a35b5458573358459ec5e273cf242a97e5d7f1f0c1bf351edf2c63  ./artix7/segbits_hclk_cmt.db`](./artix7/segbits_hclk_cmt.db)
  * [`01b36f7757bee52cd1bdd78ecefed58b8215732678cef9eec629c21e4e89d7c5  ./artix7/segbits_hclk_cmt.origin_info.db`](./artix7/segbits_hclk_cmt.origin_info.db)
  * [`92eab3f79b39609fcd131300a63ddca51200ff4bd23b7b759d1e9bbf99543862  ./artix7/segbits_hclk_cmt_l.db`](./artix7/segbits_hclk_cmt_l.db)
  * [`7f83f0eb6b8d95ab391ab9bdc112de25829fc369c7c11d0ae2911131a6b81e50  ./artix7/segbits_hclk_cmt_l.origin_info.db`](./artix7/segbits_hclk_cmt_l.origin_info.db)
- * [`d1dd602c5c9d1280ed8d65630da5f53a1f95aab18a48adfa26bee7c76311d675  ./artix7/segbits_hclk_ioi3.db`](./artix7/segbits_hclk_ioi3.db)
- * [`52cf99e3a8d10e7b252907d53f9e1565a3e929fbf778331c17dd81c25a7c00ca  ./artix7/segbits_hclk_ioi3.origin_info.db`](./artix7/segbits_hclk_ioi3.origin_info.db)
+ * [`2ed495d6971c191c355614847839adf2590bbce598b5effabde9bac58712b675  ./artix7/segbits_hclk_ioi3.db`](./artix7/segbits_hclk_ioi3.db)
+ * [`371f8a67be25ed72a8edf74b92b9baf0625a51410d08f83e55d3327e75f195b0  ./artix7/segbits_hclk_ioi3.origin_info.db`](./artix7/segbits_hclk_ioi3.origin_info.db)
  * [`1c2c7229781a4a1d51bbbdeea76238b10497c043aaadf2a76de783041a201878  ./artix7/segbits_hclk_l.db`](./artix7/segbits_hclk_l.db)
  * [`d51f086d6e887d5709d3c4e0bc00b8467fa6344de9a4c0f6de66aeba66e90287  ./artix7/segbits_hclk_l.origin_info.db`](./artix7/segbits_hclk_l.origin_info.db)
  * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9  ./artix7/segbits_hclk_r.db`](./artix7/segbits_hclk_r.db)
  * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0  ./artix7/segbits_hclk_r.origin_info.db`](./artix7/segbits_hclk_r.origin_info.db)
  * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520  ./artix7/segbits_int_l.db`](./artix7/segbits_int_l.db)
- * [`6afcb554d32a59c99417f454c93d1b38b4b7fe17e0c2822f8d04b81fc0c2225f  ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db)
+ * [`457f32c2e85b71fa23faad709b0675d7cd26a8559d240a896de67d7da3bddb2d  ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db)
  * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556  ./artix7/segbits_int_r.db`](./artix7/segbits_int_r.db)
- * [`ced6c489ab1bae4823f259b65c90453d753b6b05c1ab8c00b959e2ca86504a8d  ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db)
- * [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23  ./artix7/segbits_liob33.db`](./artix7/segbits_liob33.db)
- * [`6ffdf37ae2c6625eed093d59458f3319928bab0ac268abfdeed04c92c4673cfb  ./artix7/segbits_liob33.origin_info.db`](./artix7/segbits_liob33.origin_info.db)
+ * [`f5efce54cdf0d717cc559fe071620af71389f8ddceb113b6f2fc294bb10049c1  ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db)
+ * [`ed2b09c63c7af8dcee883f6d145743aa83d90ace16b6a3613312b6f1ce455617  ./artix7/segbits_liob33.db`](./artix7/segbits_liob33.db)
+ * [`3fc479e800feb07c1acdd9345785a0bd227b4be4e3863ed38aa58186c15b1a26  ./artix7/segbits_liob33.origin_info.db`](./artix7/segbits_liob33.origin_info.db)
  * [`d369c1e614ef6ab1a464c0ab01d07456f73e88ca5a0c3c0dc524bb3b4f4364ff  ./artix7/segbits_lioi3.db`](./artix7/segbits_lioi3.db)
  * [`4b1dd698dba50fdf44426b05641189c2faaff29a99d387543d1874983fd68a50  ./artix7/segbits_lioi3.origin_info.db`](./artix7/segbits_lioi3.origin_info.db)
  * [`0fb3e4c3427cb3fe2426445f9e6ebd1a33a3a5900904f28c7aea339a5f71530e  ./artix7/segbits_lioi3_tbytesrc.db`](./artix7/segbits_lioi3_tbytesrc.db)
@@ -333,8 +339,12 @@
  * [`bf79280a339e566244220050232020c5d3b8dceed7bd80bcf23da7b4a53cb250  ./artix7/segbits_lioi3_tbyteterm.origin_info.db`](./artix7/segbits_lioi3_tbyteterm.origin_info.db)
  * [`5d3619d34977c6fc9a2e25e0b7db002af348bf35747b99fba89072778c943c5c  ./artix7/segbits_pcie_bot.db`](./artix7/segbits_pcie_bot.db)
  * [`f2a3c7410f318cb6906c49916104864894d0d2daba55a2173dc2033c8037bae7  ./artix7/segbits_pcie_bot.origin_info.db`](./artix7/segbits_pcie_bot.origin_info.db)
- * [`ded5f7b0cdadb7558470dbca9102d7293e4237ecb563b5f69821e01b41e4aad1  ./artix7/segbits_riob33.db`](./artix7/segbits_riob33.db)
- * [`49456622ba534f8a616fe6e8bb0e3006c3ca292f2439f190ef07f82743f09613  ./artix7/segbits_riob33.origin_info.db`](./artix7/segbits_riob33.origin_info.db)
+ * [`b3256c5444d1721cd0f3291d381b3276348cf3c9943bb6e8dd2b0ba5f3a63c4b  ./artix7/segbits_pcie_int_interface_l.db`](./artix7/segbits_pcie_int_interface_l.db)
+ * [`e4199fa3f738dd20e85250c6032628b275a859378c4a2a8716c6111cbafabdb5  ./artix7/segbits_pcie_int_interface_l.origin_info.db`](./artix7/segbits_pcie_int_interface_l.origin_info.db)
+ * [`0bc32fce572935289e5ac7b10c95fb96b78418270016546d42ab11276285343e  ./artix7/segbits_pcie_int_interface_r.db`](./artix7/segbits_pcie_int_interface_r.db)
+ * [`ad36811e5e38c911473f2c3a6b805e7bb1f6186408bb6740c0dd906754762e3b  ./artix7/segbits_pcie_int_interface_r.origin_info.db`](./artix7/segbits_pcie_int_interface_r.origin_info.db)
+ * [`10541d81df91208703a5757830c0b89f177b18b097523f76e9f5d8f5d57e519a  ./artix7/segbits_riob33.db`](./artix7/segbits_riob33.db)
+ * [`d9185e3cc5aee6614fd8ee0deb7d9d83ef030f4df99186d9868eede4b91b15d2  ./artix7/segbits_riob33.origin_info.db`](./artix7/segbits_riob33.origin_info.db)
  * [`712cc4b66ff35ea6033cb76e41d8dde1225857836f4b799834925ab5c3e8575a  ./artix7/segbits_rioi3.db`](./artix7/segbits_rioi3.db)
  * [`4d0e9719c7016a0dece266060eabf4db7218b6cc982449cb93b87e7b2d0c755b  ./artix7/segbits_rioi3.origin_info.db`](./artix7/segbits_rioi3.origin_info.db)
  * [`6823106be1cdccae2cf0c1332c7a36ee11a1a86c31376100f16921b6b579ea19  ./artix7/segbits_rioi3_tbytesrc.db`](./artix7/segbits_rioi3_tbytesrc.db)
@@ -566,16 +576,19 @@
  * [`3d2da5714d8c81165fa51403fb719b3ddd9e7ea7ab79280ae4e157d11a29172e  ./artix7/timings/slicem.sdf`](./artix7/timings/slicem.sdf)
  * [`9aaa711d29833f53f765caa74f1e43ac288803d9af8030ce1694b3e3137c4078  ./artix7/xc7a100t/node_wires.json`](./artix7/xc7a100t/node_wires.json)
  * [`9cf701615e6f9ed6e89d86738f10ebb9d5bf1a233f1e3251315b2f9159f73391  ./artix7/xc7a100t/tileconn.json`](./artix7/xc7a100t/tileconn.json)
- * [`7af806f357beceb592e1ada7f4c582a5bef2e5ac708779e5813fa3f49ffa2a63  ./artix7/xc7a100t/tilegrid.json`](./artix7/xc7a100t/tilegrid.json)
+ * [`40b95df1b59fd6cd9eb9c1be30ea756fc855c6fd960f9ce402485f44d154d782  ./artix7/xc7a100t/tilegrid.json`](./artix7/xc7a100t/tilegrid.json)
  * [`3f202fefbd0f36761f08eb58737a42754c65c965968174421df0374198e31daa  ./artix7/xc7a100tcsg324-1/package_pins.csv`](./artix7/xc7a100tcsg324-1/package_pins.csv)
  * [`277906907e43846ac8a52115983cd0ece673b2310d8d10c9b2253d6537bf1a02  ./artix7/xc7a100tcsg324-1/part.json`](./artix7/xc7a100tcsg324-1/part.json)
  * [`4e1f153303270ed3727ca40af3179020f74271ff63c4d771556020b1d3037b92  ./artix7/xc7a100tcsg324-1/part.yaml`](./artix7/xc7a100tcsg324-1/part.yaml)
+ * [`3e1de5edac7fdd8122041afb2b611902653f8c62dc2da1518b94ed6378e36f26  ./artix7/xc7a100tfgg484-2/package_pins.csv`](./artix7/xc7a100tfgg484-2/package_pins.csv)
+ * [`78909bda2084de19e6095258ab1b1ad549c2db376abdd8699235a7bdc3aa19fb  ./artix7/xc7a100tfgg484-2/part.json`](./artix7/xc7a100tfgg484-2/part.json)
+ * [`4e1f153303270ed3727ca40af3179020f74271ff63c4d771556020b1d3037b92  ./artix7/xc7a100tfgg484-2/part.yaml`](./artix7/xc7a100tfgg484-2/part.yaml)
  * [`bf25d62e58330960eb582f0b3b99196bd59df046db0d7de5330634b64cd397ad  ./artix7/xc7a100tfgg676-1/package_pins.csv`](./artix7/xc7a100tfgg676-1/package_pins.csv)
  * [`78909bda2084de19e6095258ab1b1ad549c2db376abdd8699235a7bdc3aa19fb  ./artix7/xc7a100tfgg676-1/part.json`](./artix7/xc7a100tfgg676-1/part.json)
  * [`4e1f153303270ed3727ca40af3179020f74271ff63c4d771556020b1d3037b92  ./artix7/xc7a100tfgg676-1/part.yaml`](./artix7/xc7a100tfgg676-1/part.yaml)
  * [`f25057c3f5f1273ab0e21bddafcb4499e219d84f7b5a00764b48bcb64dcd4bd2  ./artix7/xc7a200t/node_wires.json`](./artix7/xc7a200t/node_wires.json)
  * [`bed4bf8553b0faa4a63964100e6b4a8b5f9ac77dbcac474a2d2cbe7240aa4617  ./artix7/xc7a200t/tileconn.json`](./artix7/xc7a200t/tileconn.json)
- * [`9a88cc6c4a07e1ebed4ffcd1d7683a1f9394a68567b4f90c5c236ad9c670ba03  ./artix7/xc7a200t/tilegrid.json`](./artix7/xc7a200t/tilegrid.json)
+ * [`95c95a4f20601c927854c0e7e56a5fcd9d90ae00df7d4ef9c7a273f65e15c9a2  ./artix7/xc7a200t/tilegrid.json`](./artix7/xc7a200t/tilegrid.json)
  * [`72dd638f5c8f6c36e74765915c01b2fa28e3c28b2c0afd91871ab7b0490a14f3  ./artix7/xc7a200tffg1156-1/package_pins.csv`](./artix7/xc7a200tffg1156-1/package_pins.csv)
  * [`fe44ca57c10c7b804357ded2cdea392c008b7b4d5a82ad917fa3148a756e4e42  ./artix7/xc7a200tffg1156-1/part.json`](./artix7/xc7a200tffg1156-1/part.json)
  * [`a3d493aef436b9978b2ed1c98c4e1364ab9eb096f824e19acd7cce3f7d920e97  ./artix7/xc7a200tffg1156-1/part.yaml`](./artix7/xc7a200tffg1156-1/part.yaml)
@@ -593,7 +606,7 @@
  * [`ef0724733da87455426a0f833642d96e9d206d047f4eb97072c3093f80c40d7d  ./artix7/xc7a35tftg256-1/part.yaml`](./artix7/xc7a35tftg256-1/part.yaml)
  * [`b60e01fef4c8c8d47fc646190d2d17fc63210cd0e82613624761e7463a7c35a6  ./artix7/xc7a50t/node_wires.json`](./artix7/xc7a50t/node_wires.json)
  * [`1604d48580815e26069c2b4909fcc50e8e8f974ad0beb349ced2329c302bb06b  ./artix7/xc7a50t/tileconn.json`](./artix7/xc7a50t/tileconn.json)
- * [`5a3025cb7acf62e401c8b0a29e8f61cf35239574acdb4671157a27716f749fb4  ./artix7/xc7a50t/tilegrid.json`](./artix7/xc7a50t/tilegrid.json)
+ * [`930c3c75e7ecc929c0baaf13249e346092b78a474b54201271d107ed74d5b6ff  ./artix7/xc7a50t/tilegrid.json`](./artix7/xc7a50t/tilegrid.json)
  * [`1b01a06e9bae479981698cdb89fff971c825c75266b3b529cd69cd54815ce805  ./artix7/xc7a50tfgg484-1/package_pins.csv`](./artix7/xc7a50tfgg484-1/package_pins.csv)
  * [`6f58dc1e7f454bb28592ecfc9b343541283593d596dba555d0088d0bff9ca1ae  ./artix7/xc7a50tfgg484-1/part.json`](./artix7/xc7a50tfgg484-1/part.json)
  * [`41c360b1e2f7e08b9051f1160a34954ce4c05a445a07f226f1f4059caf1fa1d3  ./artix7/xc7a50tfgg484-1/part.yaml`](./artix7/xc7a50tfgg484-1/part.yaml)
@@ -603,7 +616,7 @@
 
 ### Settings
 
-Created using following [settings/kintex7.sh (sha256: f04c23dee2bff14bf48a04f60034d3f3d674bb3e40182cc88201265679ac42fb)](https://github.com/SymbiFlow/prjxray/blob/6e3f05370102d3b93760120741ca75c14599e7e2/settings/kintex7.sh)
+Created using following [settings/kintex7.sh (sha256: f04c23dee2bff14bf48a04f60034d3f3d674bb3e40182cc88201265679ac42fb)](https://github.com/SymbiFlow/prjxray/blob/f3028e157e5f554e085af2a58247e2c8c7be0f3b/settings/kintex7.sh)
 ```shell
 # Copyright (C) 2017-2020  The Project X-Ray Authors.
 #
@@ -676,11 +689,11 @@
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./kintex7/mask_hclk_l.origin_info.db`](./kintex7/mask_hclk_l.origin_info.db)
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./kintex7/mask_hclk_r.db`](./kintex7/mask_hclk_r.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./kintex7/mask_hclk_r.origin_info.db`](./kintex7/mask_hclk_r.origin_info.db)
- * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6  ./kintex7/mask_liob33.db`](./kintex7/mask_liob33.db)
+ * [`b1e6417cccea25799f1e5bf4b86b7a42fa1c46cb1351da93e380a519691e9fbd  ./kintex7/mask_liob33.db`](./kintex7/mask_liob33.db)
  * [`919dd02f5275750fd8bc8ace4707ecd94f1fad7deb8c67879894c0b7d6a8ae2f  ./kintex7/mask_lioi3.db`](./kintex7/mask_lioi3.db)
  * [`919dd02f5275750fd8bc8ace4707ecd94f1fad7deb8c67879894c0b7d6a8ae2f  ./kintex7/mask_lioi3_tbytesrc.db`](./kintex7/mask_lioi3_tbytesrc.db)
  * [`919dd02f5275750fd8bc8ace4707ecd94f1fad7deb8c67879894c0b7d6a8ae2f  ./kintex7/mask_lioi3_tbyteterm.db`](./kintex7/mask_lioi3_tbyteterm.db)
- * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6  ./kintex7/mask_riob33.db`](./kintex7/mask_riob33.db)
+ * [`b1e6417cccea25799f1e5bf4b86b7a42fa1c46cb1351da93e380a519691e9fbd  ./kintex7/mask_riob33.db`](./kintex7/mask_riob33.db)
  * [`919dd02f5275750fd8bc8ace4707ecd94f1fad7deb8c67879894c0b7d6a8ae2f  ./kintex7/mask_rioi3.db`](./kintex7/mask_rioi3.db)
  * [`919dd02f5275750fd8bc8ace4707ecd94f1fad7deb8c67879894c0b7d6a8ae2f  ./kintex7/mask_rioi3_tbytesrc.db`](./kintex7/mask_rioi3_tbytesrc.db)
  * [`919dd02f5275750fd8bc8ace4707ecd94f1fad7deb8c67879894c0b7d6a8ae2f  ./kintex7/mask_rioi3_tbyteterm.db`](./kintex7/mask_rioi3_tbyteterm.db)
@@ -771,34 +784,34 @@
  * [`0a36013e20bc01d66d1a73eb2594e67d57898efddeb8de046ebcf65eed259c27  ./kintex7/segbits_cmt_top_r_lower_b.origin_info.db`](./kintex7/segbits_cmt_top_r_lower_b.origin_info.db)
  * [`ff3f5ed631016fb97d2e949d02b6a4eda93b5291a14b43cda962a93eeed88894  ./kintex7/segbits_cmt_top_r_upper_t.db`](./kintex7/segbits_cmt_top_r_upper_t.db)
  * [`a6ea0f1abacda03e873459b43b5fda477a027904533d9bff94c0763bc2e30cef  ./kintex7/segbits_cmt_top_r_upper_t.origin_info.db`](./kintex7/segbits_cmt_top_r_upper_t.origin_info.db)
- * [`0d9f730a1328a61f471c2f6abd98463a39c7e5e70ff557adc6228e1830560c64  ./kintex7/segbits_dsp_l.db`](./kintex7/segbits_dsp_l.db)
- * [`10a6e47f7b26f0d21cf0a011d4a5f2a4266538bb8d028a07fd981323dc1f0da0  ./kintex7/segbits_dsp_l.origin_info.db`](./kintex7/segbits_dsp_l.origin_info.db)
- * [`f81459ae1c84e0e73815c4577a7d0b19b497dd7f16029763c3fc4f3b8410dcc2  ./kintex7/segbits_dsp_r.db`](./kintex7/segbits_dsp_r.db)
- * [`76965c2e6ba2acab8f809a3d947b100fd322ba5b6d88c358bf816699348b07bf  ./kintex7/segbits_dsp_r.origin_info.db`](./kintex7/segbits_dsp_r.origin_info.db)
+ * [`81e0623ff13a253e3f9303de3d5dfbcf2fc92cf5cba277bd7de69e70c3c527e3  ./kintex7/segbits_dsp_l.db`](./kintex7/segbits_dsp_l.db)
+ * [`18cfd5dd8f59ca704cabeeddb2365486c755185b16a41714cc18ad08818c4f62  ./kintex7/segbits_dsp_l.origin_info.db`](./kintex7/segbits_dsp_l.origin_info.db)
+ * [`5297906aaafefd3be356682dc03cc4f8c85d0ec238a7d66bafc8b1b50a6c0c96  ./kintex7/segbits_dsp_r.db`](./kintex7/segbits_dsp_r.db)
+ * [`1f6d942f652416b24c7cdae7188144cc9a0778fc439d6e9f22ecec5d7833a391  ./kintex7/segbits_dsp_r.origin_info.db`](./kintex7/segbits_dsp_r.origin_info.db)
  * [`5d9063c8d4a35b5458573358459ec5e273cf242a97e5d7f1f0c1bf351edf2c63  ./kintex7/segbits_hclk_cmt.db`](./kintex7/segbits_hclk_cmt.db)
  * [`01b36f7757bee52cd1bdd78ecefed58b8215732678cef9eec629c21e4e89d7c5  ./kintex7/segbits_hclk_cmt.origin_info.db`](./kintex7/segbits_hclk_cmt.origin_info.db)
  * [`92eab3f79b39609fcd131300a63ddca51200ff4bd23b7b759d1e9bbf99543862  ./kintex7/segbits_hclk_cmt_l.db`](./kintex7/segbits_hclk_cmt_l.db)
  * [`7f83f0eb6b8d95ab391ab9bdc112de25829fc369c7c11d0ae2911131a6b81e50  ./kintex7/segbits_hclk_cmt_l.origin_info.db`](./kintex7/segbits_hclk_cmt_l.origin_info.db)
- * [`d1dd602c5c9d1280ed8d65630da5f53a1f95aab18a48adfa26bee7c76311d675  ./kintex7/segbits_hclk_ioi3.db`](./kintex7/segbits_hclk_ioi3.db)
- * [`52cf99e3a8d10e7b252907d53f9e1565a3e929fbf778331c17dd81c25a7c00ca  ./kintex7/segbits_hclk_ioi3.origin_info.db`](./kintex7/segbits_hclk_ioi3.origin_info.db)
+ * [`2ed495d6971c191c355614847839adf2590bbce598b5effabde9bac58712b675  ./kintex7/segbits_hclk_ioi3.db`](./kintex7/segbits_hclk_ioi3.db)
+ * [`371f8a67be25ed72a8edf74b92b9baf0625a51410d08f83e55d3327e75f195b0  ./kintex7/segbits_hclk_ioi3.origin_info.db`](./kintex7/segbits_hclk_ioi3.origin_info.db)
  * [`1c2c7229781a4a1d51bbbdeea76238b10497c043aaadf2a76de783041a201878  ./kintex7/segbits_hclk_l.db`](./kintex7/segbits_hclk_l.db)
  * [`d51f086d6e887d5709d3c4e0bc00b8467fa6344de9a4c0f6de66aeba66e90287  ./kintex7/segbits_hclk_l.origin_info.db`](./kintex7/segbits_hclk_l.origin_info.db)
  * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9  ./kintex7/segbits_hclk_r.db`](./kintex7/segbits_hclk_r.db)
  * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0  ./kintex7/segbits_hclk_r.origin_info.db`](./kintex7/segbits_hclk_r.origin_info.db)
  * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520  ./kintex7/segbits_int_l.db`](./kintex7/segbits_int_l.db)
- * [`b635b86e0c7171123c853dee145cf57f7a1f411b82d7a368ed69f659f765b54b  ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db)
+ * [`328b6a3f6f338a3f94526f7f936e442ba9579a0e739e5432b4a63eab47360996  ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db)
  * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556  ./kintex7/segbits_int_r.db`](./kintex7/segbits_int_r.db)
- * [`0fc9c0513eb861f945057bf695b6b4e3026bd1b5a38953872b1c7ae3ab6f3468  ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db)
- * [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23  ./kintex7/segbits_liob33.db`](./kintex7/segbits_liob33.db)
- * [`6ffdf37ae2c6625eed093d59458f3319928bab0ac268abfdeed04c92c4673cfb  ./kintex7/segbits_liob33.origin_info.db`](./kintex7/segbits_liob33.origin_info.db)
+ * [`af9a0ceb5d80201d21e5677b7aeb676f6ecb822abb6c7e90dd23b39da18e0194  ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db)
+ * [`ed2b09c63c7af8dcee883f6d145743aa83d90ace16b6a3613312b6f1ce455617  ./kintex7/segbits_liob33.db`](./kintex7/segbits_liob33.db)
+ * [`3fc479e800feb07c1acdd9345785a0bd227b4be4e3863ed38aa58186c15b1a26  ./kintex7/segbits_liob33.origin_info.db`](./kintex7/segbits_liob33.origin_info.db)
  * [`d369c1e614ef6ab1a464c0ab01d07456f73e88ca5a0c3c0dc524bb3b4f4364ff  ./kintex7/segbits_lioi3.db`](./kintex7/segbits_lioi3.db)
  * [`4b1dd698dba50fdf44426b05641189c2faaff29a99d387543d1874983fd68a50  ./kintex7/segbits_lioi3.origin_info.db`](./kintex7/segbits_lioi3.origin_info.db)
  * [`0fb3e4c3427cb3fe2426445f9e6ebd1a33a3a5900904f28c7aea339a5f71530e  ./kintex7/segbits_lioi3_tbytesrc.db`](./kintex7/segbits_lioi3_tbytesrc.db)
  * [`cbc24997471fa0a4cc59db46589a3daea9f59b4d599ca802a1f62b730090c89c  ./kintex7/segbits_lioi3_tbytesrc.origin_info.db`](./kintex7/segbits_lioi3_tbytesrc.origin_info.db)
  * [`e81ad6e17e179647d06b9dc193588c8297af448e8eb7bd6c4b807a832631e07b  ./kintex7/segbits_lioi3_tbyteterm.db`](./kintex7/segbits_lioi3_tbyteterm.db)
  * [`bf79280a339e566244220050232020c5d3b8dceed7bd80bcf23da7b4a53cb250  ./kintex7/segbits_lioi3_tbyteterm.origin_info.db`](./kintex7/segbits_lioi3_tbyteterm.origin_info.db)
- * [`ded5f7b0cdadb7558470dbca9102d7293e4237ecb563b5f69821e01b41e4aad1  ./kintex7/segbits_riob33.db`](./kintex7/segbits_riob33.db)
- * [`49456622ba534f8a616fe6e8bb0e3006c3ca292f2439f190ef07f82743f09613  ./kintex7/segbits_riob33.origin_info.db`](./kintex7/segbits_riob33.origin_info.db)
+ * [`10541d81df91208703a5757830c0b89f177b18b097523f76e9f5d8f5d57e519a  ./kintex7/segbits_riob33.db`](./kintex7/segbits_riob33.db)
+ * [`d9185e3cc5aee6614fd8ee0deb7d9d83ef030f4df99186d9868eede4b91b15d2  ./kintex7/segbits_riob33.origin_info.db`](./kintex7/segbits_riob33.origin_info.db)
  * [`712cc4b66ff35ea6033cb76e41d8dde1225857836f4b799834925ab5c3e8575a  ./kintex7/segbits_rioi3.db`](./kintex7/segbits_rioi3.db)
  * [`4d0e9719c7016a0dece266060eabf4db7218b6cc982449cb93b87e7b2d0c755b  ./kintex7/segbits_rioi3.origin_info.db`](./kintex7/segbits_rioi3.origin_info.db)
  * [`6823106be1cdccae2cf0c1332c7a36ee11a1a86c31376100f16921b6b579ea19  ./kintex7/segbits_rioi3_tbytesrc.db`](./kintex7/segbits_rioi3_tbytesrc.db)
@@ -982,7 +995,7 @@
 
 ### Settings
 
-Created using following [settings/zynq7.sh (sha256: 241ebc54a73b6a3cb3eacea09b798fe9887d955ccdfe7b48994a9a10928837c2)](https://github.com/SymbiFlow/prjxray/blob/6e3f05370102d3b93760120741ca75c14599e7e2/settings/zynq7.sh)
+Created using following [settings/zynq7.sh (sha256: 241ebc54a73b6a3cb3eacea09b798fe9887d955ccdfe7b48994a9a10928837c2)](https://github.com/SymbiFlow/prjxray/blob/f3028e157e5f554e085af2a58247e2c8c7be0f3b/settings/zynq7.sh)
 ```shell
 # Copyright (C) 2017-2020  The Project X-Ray Authors.
 #
@@ -1062,11 +1075,11 @@
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./zynq7/mask_hclk_l.origin_info.db`](./zynq7/mask_hclk_l.origin_info.db)
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./zynq7/mask_hclk_r.db`](./zynq7/mask_hclk_r.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./zynq7/mask_hclk_r.origin_info.db`](./zynq7/mask_hclk_r.origin_info.db)
- * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6  ./zynq7/mask_liob33.db`](./zynq7/mask_liob33.db)
+ * [`b1e6417cccea25799f1e5bf4b86b7a42fa1c46cb1351da93e380a519691e9fbd  ./zynq7/mask_liob33.db`](./zynq7/mask_liob33.db)
  * [`04905dcedfe5b075d28c7ca2af92f4c3b9677675fc27d64813c43b8569f493ae  ./zynq7/mask_lioi3.db`](./zynq7/mask_lioi3.db)
  * [`04905dcedfe5b075d28c7ca2af92f4c3b9677675fc27d64813c43b8569f493ae  ./zynq7/mask_lioi3_tbytesrc.db`](./zynq7/mask_lioi3_tbytesrc.db)
  * [`04905dcedfe5b075d28c7ca2af92f4c3b9677675fc27d64813c43b8569f493ae  ./zynq7/mask_lioi3_tbyteterm.db`](./zynq7/mask_lioi3_tbyteterm.db)
- * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6  ./zynq7/mask_riob33.db`](./zynq7/mask_riob33.db)
+ * [`b1e6417cccea25799f1e5bf4b86b7a42fa1c46cb1351da93e380a519691e9fbd  ./zynq7/mask_riob33.db`](./zynq7/mask_riob33.db)
  * [`04905dcedfe5b075d28c7ca2af92f4c3b9677675fc27d64813c43b8569f493ae  ./zynq7/mask_rioi3.db`](./zynq7/mask_rioi3.db)
  * [`04905dcedfe5b075d28c7ca2af92f4c3b9677675fc27d64813c43b8569f493ae  ./zynq7/mask_rioi3_tbytesrc.db`](./zynq7/mask_rioi3_tbytesrc.db)
  * [`04905dcedfe5b075d28c7ca2af92f4c3b9677675fc27d64813c43b8569f493ae  ./zynq7/mask_rioi3_tbyteterm.db`](./zynq7/mask_rioi3_tbyteterm.db)
@@ -1160,42 +1173,42 @@
  * [`c913b6c8399b21d515063a9eba05749e06fcdb24fc40d7a4e1e009e91d7b9c02  ./zynq7/segbits_clk_hrow_bot_r.origin_info.db`](./zynq7/segbits_clk_hrow_bot_r.origin_info.db)
  * [`4c9c9effdaa6039eaa0df3c44056be0ceeaa1a34eab9134821f9f3e85f46738c  ./zynq7/segbits_clk_hrow_top_r.db`](./zynq7/segbits_clk_hrow_top_r.db)
  * [`dce4badb8750dc9ddf3db28e818df81abf4f2258c189891c35a427616c0cfc71  ./zynq7/segbits_clk_hrow_top_r.origin_info.db`](./zynq7/segbits_clk_hrow_top_r.origin_info.db)
- * [`fe7dd72edf8ebe571742e60b93627c447dd5daeb69b35f52dc3690671db31a74  ./zynq7/segbits_cmt_top_l_lower_b.db`](./zynq7/segbits_cmt_top_l_lower_b.db)
- * [`5d8f9f08f06723733b17419fccd083bd79c91f1bedc3d9ad4eea649af2196719  ./zynq7/segbits_cmt_top_l_lower_b.origin_info.db`](./zynq7/segbits_cmt_top_l_lower_b.origin_info.db)
+ * [`a4f42d6098b3aff51585f5ed58c0d13fb62019287172d98d73a5e0d8884134da  ./zynq7/segbits_cmt_top_l_lower_b.db`](./zynq7/segbits_cmt_top_l_lower_b.db)
+ * [`fe4b0310db36eb87fef9901c790193b7077fbe216b1ba789ef65446c1e3b0b19  ./zynq7/segbits_cmt_top_l_lower_b.origin_info.db`](./zynq7/segbits_cmt_top_l_lower_b.origin_info.db)
  * [`3e33276e75c69bf622e1019c4bf4b8cf3f7bb8bebcdd500f16e160b49e5a6811  ./zynq7/segbits_cmt_top_l_upper_t.db`](./zynq7/segbits_cmt_top_l_upper_t.db)
  * [`a8ba9d40de847f2175429ab3328c585242372124e499a520af2a2d8fb97d1550  ./zynq7/segbits_cmt_top_l_upper_t.origin_info.db`](./zynq7/segbits_cmt_top_l_upper_t.origin_info.db)
- * [`add1cfc6cb7bca692a3d2955d40dd41c70bc8ce3659053a88e149a16ced90627  ./zynq7/segbits_cmt_top_r_lower_b.db`](./zynq7/segbits_cmt_top_r_lower_b.db)
- * [`2094c1b4b02e63ed7cb7d00bf7ecaaf86ad205cc91125b125f0c40adcfa90728  ./zynq7/segbits_cmt_top_r_lower_b.origin_info.db`](./zynq7/segbits_cmt_top_r_lower_b.origin_info.db)
+ * [`32cc74ba971e07fea70818fb15cd9b0e66e2cbd3f971ac68ca0e0f69337c11ca  ./zynq7/segbits_cmt_top_r_lower_b.db`](./zynq7/segbits_cmt_top_r_lower_b.db)
+ * [`a526b7838198cdd3d9733b59aa41fc07ae55b1b3f7dfb1d6f9c3193c6384573a  ./zynq7/segbits_cmt_top_r_lower_b.origin_info.db`](./zynq7/segbits_cmt_top_r_lower_b.origin_info.db)
  * [`ff3f5ed631016fb97d2e949d02b6a4eda93b5291a14b43cda962a93eeed88894  ./zynq7/segbits_cmt_top_r_upper_t.db`](./zynq7/segbits_cmt_top_r_upper_t.db)
  * [`a6ea0f1abacda03e873459b43b5fda477a027904533d9bff94c0763bc2e30cef  ./zynq7/segbits_cmt_top_r_upper_t.origin_info.db`](./zynq7/segbits_cmt_top_r_upper_t.origin_info.db)
- * [`0d9f730a1328a61f471c2f6abd98463a39c7e5e70ff557adc6228e1830560c64  ./zynq7/segbits_dsp_l.db`](./zynq7/segbits_dsp_l.db)
- * [`10a6e47f7b26f0d21cf0a011d4a5f2a4266538bb8d028a07fd981323dc1f0da0  ./zynq7/segbits_dsp_l.origin_info.db`](./zynq7/segbits_dsp_l.origin_info.db)
- * [`f81459ae1c84e0e73815c4577a7d0b19b497dd7f16029763c3fc4f3b8410dcc2  ./zynq7/segbits_dsp_r.db`](./zynq7/segbits_dsp_r.db)
- * [`76965c2e6ba2acab8f809a3d947b100fd322ba5b6d88c358bf816699348b07bf  ./zynq7/segbits_dsp_r.origin_info.db`](./zynq7/segbits_dsp_r.origin_info.db)
+ * [`81e0623ff13a253e3f9303de3d5dfbcf2fc92cf5cba277bd7de69e70c3c527e3  ./zynq7/segbits_dsp_l.db`](./zynq7/segbits_dsp_l.db)
+ * [`18cfd5dd8f59ca704cabeeddb2365486c755185b16a41714cc18ad08818c4f62  ./zynq7/segbits_dsp_l.origin_info.db`](./zynq7/segbits_dsp_l.origin_info.db)
+ * [`5297906aaafefd3be356682dc03cc4f8c85d0ec238a7d66bafc8b1b50a6c0c96  ./zynq7/segbits_dsp_r.db`](./zynq7/segbits_dsp_r.db)
+ * [`1f6d942f652416b24c7cdae7188144cc9a0778fc439d6e9f22ecec5d7833a391  ./zynq7/segbits_dsp_r.origin_info.db`](./zynq7/segbits_dsp_r.origin_info.db)
  * [`5d9063c8d4a35b5458573358459ec5e273cf242a97e5d7f1f0c1bf351edf2c63  ./zynq7/segbits_hclk_cmt.db`](./zynq7/segbits_hclk_cmt.db)
  * [`01b36f7757bee52cd1bdd78ecefed58b8215732678cef9eec629c21e4e89d7c5  ./zynq7/segbits_hclk_cmt.origin_info.db`](./zynq7/segbits_hclk_cmt.origin_info.db)
  * [`92eab3f79b39609fcd131300a63ddca51200ff4bd23b7b759d1e9bbf99543862  ./zynq7/segbits_hclk_cmt_l.db`](./zynq7/segbits_hclk_cmt_l.db)
  * [`7f83f0eb6b8d95ab391ab9bdc112de25829fc369c7c11d0ae2911131a6b81e50  ./zynq7/segbits_hclk_cmt_l.origin_info.db`](./zynq7/segbits_hclk_cmt_l.origin_info.db)
- * [`d1dd602c5c9d1280ed8d65630da5f53a1f95aab18a48adfa26bee7c76311d675  ./zynq7/segbits_hclk_ioi3.db`](./zynq7/segbits_hclk_ioi3.db)
- * [`52cf99e3a8d10e7b252907d53f9e1565a3e929fbf778331c17dd81c25a7c00ca  ./zynq7/segbits_hclk_ioi3.origin_info.db`](./zynq7/segbits_hclk_ioi3.origin_info.db)
+ * [`2ed495d6971c191c355614847839adf2590bbce598b5effabde9bac58712b675  ./zynq7/segbits_hclk_ioi3.db`](./zynq7/segbits_hclk_ioi3.db)
+ * [`371f8a67be25ed72a8edf74b92b9baf0625a51410d08f83e55d3327e75f195b0  ./zynq7/segbits_hclk_ioi3.origin_info.db`](./zynq7/segbits_hclk_ioi3.origin_info.db)
  * [`1c2c7229781a4a1d51bbbdeea76238b10497c043aaadf2a76de783041a201878  ./zynq7/segbits_hclk_l.db`](./zynq7/segbits_hclk_l.db)
  * [`d51f086d6e887d5709d3c4e0bc00b8467fa6344de9a4c0f6de66aeba66e90287  ./zynq7/segbits_hclk_l.origin_info.db`](./zynq7/segbits_hclk_l.origin_info.db)
  * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9  ./zynq7/segbits_hclk_r.db`](./zynq7/segbits_hclk_r.db)
  * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0  ./zynq7/segbits_hclk_r.origin_info.db`](./zynq7/segbits_hclk_r.origin_info.db)
  * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520  ./zynq7/segbits_int_l.db`](./zynq7/segbits_int_l.db)
- * [`505898cbef5f62b7e4d1274c49dad1a373bae12af7825b14e52f053bf42217fe  ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db)
+ * [`ae75525546d228829d7ba8cebcff71b25d75a50ef7fbeabe60645ee99592d86e  ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db)
  * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556  ./zynq7/segbits_int_r.db`](./zynq7/segbits_int_r.db)
- * [`769ba4269774fca078ed64a0acaf380ae9532753b6cfb9378457e6485adbe15c  ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db)
- * [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23  ./zynq7/segbits_liob33.db`](./zynq7/segbits_liob33.db)
- * [`6ffdf37ae2c6625eed093d59458f3319928bab0ac268abfdeed04c92c4673cfb  ./zynq7/segbits_liob33.origin_info.db`](./zynq7/segbits_liob33.origin_info.db)
+ * [`1ba0ff2afa1d09037fdb6e31f6289712f3fbd37441a5f787536dc03ab78fb7ed  ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db)
+ * [`4523957b458005d3ca55aabfc7cbd967a3ef8717c2c9eee1c5be35b886a759db  ./zynq7/segbits_liob33.db`](./zynq7/segbits_liob33.db)
+ * [`091f100d6ccce6e7941b68ee8321da7577533c655743ff21f078cefd877e6b9d  ./zynq7/segbits_liob33.origin_info.db`](./zynq7/segbits_liob33.origin_info.db)
  * [`d369c1e614ef6ab1a464c0ab01d07456f73e88ca5a0c3c0dc524bb3b4f4364ff  ./zynq7/segbits_lioi3.db`](./zynq7/segbits_lioi3.db)
  * [`4b1dd698dba50fdf44426b05641189c2faaff29a99d387543d1874983fd68a50  ./zynq7/segbits_lioi3.origin_info.db`](./zynq7/segbits_lioi3.origin_info.db)
  * [`0fb3e4c3427cb3fe2426445f9e6ebd1a33a3a5900904f28c7aea339a5f71530e  ./zynq7/segbits_lioi3_tbytesrc.db`](./zynq7/segbits_lioi3_tbytesrc.db)
  * [`cbc24997471fa0a4cc59db46589a3daea9f59b4d599ca802a1f62b730090c89c  ./zynq7/segbits_lioi3_tbytesrc.origin_info.db`](./zynq7/segbits_lioi3_tbytesrc.origin_info.db)
  * [`e81ad6e17e179647d06b9dc193588c8297af448e8eb7bd6c4b807a832631e07b  ./zynq7/segbits_lioi3_tbyteterm.db`](./zynq7/segbits_lioi3_tbyteterm.db)
  * [`bf79280a339e566244220050232020c5d3b8dceed7bd80bcf23da7b4a53cb250  ./zynq7/segbits_lioi3_tbyteterm.origin_info.db`](./zynq7/segbits_lioi3_tbyteterm.origin_info.db)
- * [`ded5f7b0cdadb7558470dbca9102d7293e4237ecb563b5f69821e01b41e4aad1  ./zynq7/segbits_riob33.db`](./zynq7/segbits_riob33.db)
- * [`49456622ba534f8a616fe6e8bb0e3006c3ca292f2439f190ef07f82743f09613  ./zynq7/segbits_riob33.origin_info.db`](./zynq7/segbits_riob33.origin_info.db)
+ * [`7ac48ecadab7345faefab216256796a8c8c507b0ae37e2acc04a671b6b75a23b  ./zynq7/segbits_riob33.db`](./zynq7/segbits_riob33.db)
+ * [`22df2833dae390c044b62394764b79492d77db5fa15f6434d51c86e0ef10bcb3  ./zynq7/segbits_riob33.origin_info.db`](./zynq7/segbits_riob33.origin_info.db)
  * [`712cc4b66ff35ea6033cb76e41d8dde1225857836f4b799834925ab5c3e8575a  ./zynq7/segbits_rioi3.db`](./zynq7/segbits_rioi3.db)
  * [`4d0e9719c7016a0dece266060eabf4db7218b6cc982449cb93b87e7b2d0c755b  ./zynq7/segbits_rioi3.origin_info.db`](./zynq7/segbits_rioi3.origin_info.db)
  * [`6823106be1cdccae2cf0c1332c7a36ee11a1a86c31376100f16921b6b579ea19  ./zynq7/segbits_rioi3_tbytesrc.db`](./zynq7/segbits_rioi3_tbytesrc.db)

diff --git a/artix7/harness/arty-a7/pmod/design.json b/artix7/harness/arty-a7/pmod/design.json
index 06b733a..584b664 100644
--- a/artix7/harness/arty-a7/pmod/design.json
+++ b/artix7/harness/arty-a7/pmod/design.json

@@ -1118,6 +1118,7 @@
         "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "LIOB33_X0Y43.IOB_Y0.LVDS_25.IN",
         "LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP",
         "LIOB33_X0Y43.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
@@ -1126,6 +1127,7 @@
         "LIOB33_X0Y51.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y51.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y51.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "LIOB33_X0Y51.IOB_Y0.LVDS_25.IN",
         "LIOB33_X0Y51.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y51.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y51.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
@@ -1136,6 +1138,7 @@
         "LIOB33_X0Y53.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y53.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y53.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "LIOB33_X0Y53.IOB_Y0.LVDS_25.IN",
         "LIOB33_X0Y53.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y53.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y53.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
@@ -1146,6 +1149,7 @@
         "LIOB33_X0Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y75.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "LIOB33_X0Y75.IOB_Y0.LVDS_25.IN",
         "LIOB33_X0Y75.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y75.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y75.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
@@ -1156,6 +1160,7 @@
         "LIOB33_X0Y77.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y77.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y77.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "LIOB33_X0Y77.IOB_Y0.LVDS_25.IN",
         "LIOB33_X0Y77.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y77.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y77.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",

diff --git a/artix7/harness/arty-a7/swbut/design.json b/artix7/harness/arty-a7/swbut/design.json
index 6191ba0..faa60b0 100644
--- a/artix7/harness/arty-a7/swbut/design.json
+++ b/artix7/harness/arty-a7/swbut/design.json

@@ -874,6 +874,7 @@
         "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "LIOB33_X0Y43.IOB_Y0.LVDS_25.IN",
         "LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP",
         "LIOB33_X0Y43.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
@@ -882,6 +883,7 @@
         "LIOB33_X0Y121.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y121.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y121.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "LIOB33_X0Y121.IOB_Y0.LVDS_25.IN",
         "LIOB33_X0Y121.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y121.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y121.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
@@ -890,6 +892,7 @@
         "LIOB33_X0Y123.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y123.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y123.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "LIOB33_X0Y123.IOB_Y0.LVDS_25.IN",
         "LIOB33_X0Y123.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y123.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y123.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
@@ -900,6 +903,7 @@
         "LIOB33_X0Y125.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y125.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y125.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "LIOB33_X0Y125.IOB_Y0.LVDS_25.IN",
         "LIOB33_X0Y125.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y125.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y125.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
@@ -910,6 +914,7 @@
         "LIOB33_X0Y127.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y127.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y127.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "LIOB33_X0Y127.IOB_Y0.LVDS_25.IN",
         "LIOB33_X0Y127.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y127.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y127.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
@@ -1035,6 +1040,7 @@
         "RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y75.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "RIOB33_X43Y75.IOB_Y0.LVDS_25.IN",
         "RIOB33_X43Y75.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y75.IOB_Y1.IN_TERM.NONE",
         "RIOB33_X43Y75.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",

diff --git a/artix7/harness/arty-a7/uart/design.json b/artix7/harness/arty-a7/uart/design.json
index 5645d4c..6c884f5 100644
--- a/artix7/harness/arty-a7/uart/design.json
+++ b/artix7/harness/arty-a7/uart/design.json

@@ -356,6 +356,7 @@
         "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "LIOB33_X0Y43.IOB_Y0.LVDS_25.IN",
         "LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP",
         "LIOB33_X0Y43.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
@@ -416,6 +417,7 @@
         "RIOB33_X43Y67.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "RIOB33_X43Y67.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y67.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "RIOB33_X43Y67.IOB_Y0.LVDS_25.IN",
         "RIOB33_X43Y67.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y67.IOB_Y1.IN_TERM.NONE",
         "RIOB33_X43Y67.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
@@ -424,6 +426,7 @@
         "RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y75.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "RIOB33_X43Y75.IOB_Y0.LVDS_25.IN",
         "RIOB33_X43Y75.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y75.IOB_Y1.IN_TERM.NONE",
         "RIOB33_X43Y75.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",

diff --git a/artix7/harness/basys3/swbut/design.json b/artix7/harness/basys3/swbut/design.json
index ea09c76..5e8514b 100644
--- a/artix7/harness/basys3/swbut/design.json
+++ b/artix7/harness/basys3/swbut/design.json

@@ -3530,6 +3530,7 @@
         "LIOB33_X0Y5.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y5.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y5.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "LIOB33_X0Y5.IOB_Y0.LVDS_25.IN",
         "LIOB33_X0Y5.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y5.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y5.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
@@ -3540,6 +3541,7 @@
         "LIOB33_X0Y7.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y7.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y7.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "LIOB33_X0Y7.IOB_Y0.LVDS_25.IN",
         "LIOB33_X0Y7.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y7.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y7.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
@@ -3550,6 +3552,7 @@
         "LIOB33_X0Y9.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y9.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y9.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "LIOB33_X0Y9.IOB_Y0.LVDS_25.IN",
         "LIOB33_X0Y9.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y9.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y9.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
@@ -3560,6 +3563,7 @@
         "LIOB33_X0Y11.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y11.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y11.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "LIOB33_X0Y11.IOB_Y0.LVDS_25.IN",
         "LIOB33_X0Y11.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y11.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y11.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
@@ -3585,6 +3589,7 @@
         "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "LIOB33_X0Y43.IOB_Y0.LVDS_25.IN",
         "LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP",
         "LIOB33_X0Y43.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
@@ -3594,6 +3599,7 @@
         "LIOB33_X0Y111.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y111.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y111.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "LIOB33_X0Y111.IOB_Y0.LVDS_25.IN",
         "LIOB33_X0Y111.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y111.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y111.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
@@ -3747,6 +3753,7 @@
         "RIOB33_X43Y25.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "RIOB33_X43Y25.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y25.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "RIOB33_X43Y25.IOB_Y0.LVDS_25.IN",
         "RIOB33_X43Y25.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y25.IOB_Y1.IN_TERM.NONE",
         "RIOB33_X43Y25.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
@@ -3770,6 +3777,7 @@
         "RIOB33_X43Y39.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "RIOB33_X43Y39.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y39.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "RIOB33_X43Y39.IOB_Y0.LVDS_25.IN",
         "RIOB33_X43Y39.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y39.IOB_Y1.IN_TERM.NONE",
         "RIOB33_X43Y39.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
@@ -3780,6 +3788,7 @@
         "RIOB33_X43Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "RIOB33_X43Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "RIOB33_X43Y43.IOB_Y0.LVDS_25.IN",
         "RIOB33_X43Y43.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y43.IOB_Y1.IN_TERM.NONE",
         "RIOB33_X43Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
@@ -3790,6 +3799,7 @@
         "RIOB33_X43Y45.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "RIOB33_X43Y45.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y45.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "RIOB33_X43Y45.IOB_Y0.LVDS_25.IN",
         "RIOB33_X43Y45.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y45.IOB_Y1.IN_TERM.NONE",
         "RIOB33_X43Y45.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
@@ -3800,6 +3810,7 @@
         "RIOB33_X43Y47.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "RIOB33_X43Y47.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y47.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
+        "RIOB33_X43Y47.IOB_Y0.LVDS_25.IN",
         "RIOB33_X43Y47.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y47.IOB_Y1.IN_TERM.NONE",
         "RIOB33_X43Y47.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",

diff --git a/artix7/mapping/parts.yaml b/artix7/mapping/parts.yaml
index fc2bf34..d37e7cc 100644
--- a/artix7/mapping/parts.yaml
+++ b/artix7/mapping/parts.yaml

@@ -11,6 +11,10 @@
   device: "xc7a100t"
   package: "fgg676"
   speedgrade: "1"
+"xc7a100tfgg484-2":
+  device: "xc7a100t"
+  package: "fgg484"
+  speedgrade: "2"
 "xc7a100tcsg324-1":
   device: "xc7a100t"
   package: "csg324"

diff --git a/artix7/mask_gtp_channel_0.db b/artix7/mask_gtp_channel_0.db
index c576c8c..47663d6 100644
--- a/artix7/mask_gtp_channel_0.db
+++ b/artix7/mask_gtp_channel_0.db

@@ -1,1637 +1,3 @@
-bit 00_00
-bit 00_01
-bit 00_07
-bit 00_47
-bit 00_52
-bit 00_53
-bit 00_65
-bit 00_102
-bit 00_103
-bit 00_104
-bit 00_105
-bit 00_106
-bit 00_107
-bit 00_108
-bit 00_109
-bit 00_110
-bit 00_111
-bit 00_112
-bit 00_113
-bit 00_114
-bit 00_115
-bit 00_116
-bit 00_117
-bit 00_124
-bit 00_125
-bit 00_128
-bit 00_129
-bit 00_130
-bit 00_131
-bit 00_132
-bit 00_133
-bit 00_134
-bit 00_135
-bit 00_136
-bit 00_138
-bit 00_139
-bit 00_140
-bit 00_141
-bit 00_142
-bit 00_143
-bit 00_144
-bit 00_145
-bit 00_146
-bit 00_147
-bit 00_148
-bit 00_149
-bit 00_150
-bit 00_151
-bit 00_152
-bit 00_153
-bit 00_154
-bit 00_155
-bit 00_156
-bit 00_157
-bit 00_158
-bit 00_159
-bit 00_160
-bit 00_161
-bit 00_162
-bit 00_163
-bit 00_164
-bit 00_165
-bit 00_168
-bit 00_169
-bit 00_170
-bit 00_171
-bit 00_172
-bit 00_173
-bit 00_174
-bit 00_176
-bit 00_177
-bit 00_178
-bit 00_179
-bit 00_180
-bit 00_181
-bit 00_187
-bit 00_188
-bit 00_189
-bit 00_190
-bit 00_191
-bit 00_192
-bit 00_193
-bit 00_194
-bit 00_195
-bit 00_200
-bit 00_203
-bit 00_204
-bit 00_205
-bit 00_206
-bit 00_208
-bit 00_209
-bit 00_210
-bit 00_211
-bit 00_212
-bit 00_213
-bit 00_214
-bit 00_215
-bit 00_216
-bit 00_217
-bit 00_218
-bit 00_219
-bit 00_220
-bit 00_221
-bit 00_222
-bit 00_224
-bit 00_225
-bit 00_231
-bit 00_247
-bit 00_288
-bit 00_289
-bit 00_290
-bit 00_291
-bit 00_292
-bit 00_293
-bit 00_294
-bit 00_336
-bit 00_337
-bit 00_338
-bit 00_339
-bit 00_340
-bit 00_341
-bit 00_342
-bit 00_343
-bit 00_344
-bit 00_345
-bit 00_346
-bit 00_347
-bit 00_348
-bit 00_349
-bit 00_350
-bit 00_351
-bit 00_352
-bit 00_353
-bit 00_354
-bit 00_355
-bit 00_356
-bit 00_357
-bit 00_358
-bit 00_359
-bit 00_360
-bit 00_361
-bit 00_362
-bit 00_363
-bit 00_364
-bit 00_365
-bit 00_366
-bit 00_367
-bit 00_368
-bit 00_369
-bit 00_370
-bit 00_371
-bit 00_372
-bit 00_373
-bit 00_374
-bit 00_375
-bit 00_376
-bit 00_377
-bit 00_378
-bit 00_379
-bit 00_380
-bit 00_381
-bit 00_382
-bit 00_383
-bit 00_384
-bit 00_385
-bit 00_386
-bit 00_387
-bit 00_388
-bit 00_389
-bit 00_390
-bit 00_391
-bit 00_392
-bit 00_393
-bit 00_394
-bit 00_395
-bit 00_396
-bit 00_397
-bit 00_398
-bit 00_399
-bit 00_400
-bit 00_401
-bit 00_402
-bit 00_403
-bit 00_404
-bit 00_405
-bit 00_406
-bit 00_407
-bit 00_408
-bit 00_409
-bit 00_410
-bit 00_411
-bit 00_412
-bit 00_413
-bit 00_414
-bit 00_415
-bit 00_416
-bit 00_417
-bit 00_418
-bit 00_419
-bit 00_420
-bit 00_421
-bit 00_422
-bit 00_423
-bit 00_424
-bit 00_425
-bit 00_426
-bit 00_427
-bit 00_428
-bit 00_429
-bit 00_430
-bit 00_431
-bit 00_432
-bit 00_433
-bit 00_434
-bit 00_435
-bit 00_436
-bit 00_437
-bit 00_438
-bit 00_439
-bit 00_440
-bit 00_441
-bit 00_442
-bit 00_443
-bit 00_444
-bit 00_445
-bit 00_446
-bit 00_447
-bit 00_448
-bit 00_449
-bit 00_450
-bit 00_451
-bit 00_452
-bit 00_453
-bit 00_454
-bit 00_455
-bit 00_456
-bit 00_457
-bit 00_458
-bit 00_459
-bit 00_460
-bit 00_461
-bit 00_462
-bit 00_463
-bit 00_464
-bit 00_465
-bit 00_466
-bit 00_467
-bit 00_468
-bit 00_469
-bit 00_470
-bit 00_471
-bit 00_472
-bit 00_473
-bit 00_474
-bit 00_475
-bit 00_476
-bit 00_478
-bit 00_479
-bit 00_480
-bit 00_481
-bit 00_482
-bit 00_483
-bit 00_484
-bit 00_485
-bit 00_488
-bit 00_489
-bit 00_490
-bit 00_492
-bit 00_494
-bit 00_495
-bit 00_496
-bit 00_497
-bit 00_498
-bit 00_499
-bit 00_500
-bit 00_504
-bit 00_505
-bit 00_506
-bit 00_507
-bit 00_508
-bit 00_512
-bit 00_513
-bit 00_514
-bit 00_515
-bit 00_516
-bit 00_519
-bit 00_520
-bit 00_521
-bit 00_522
-bit 00_523
-bit 00_524
-bit 00_525
-bit 00_526
-bit 00_527
-bit 00_544
-bit 00_545
-bit 00_546
-bit 00_547
-bit 00_548
-bit 00_549
-bit 00_550
-bit 00_551
-bit 00_552
-bit 00_553
-bit 00_554
-bit 00_555
-bit 00_556
-bit 00_557
-bit 00_558
-bit 00_559
-bit 00_560
-bit 00_561
-bit 00_562
-bit 00_563
-bit 00_564
-bit 00_565
-bit 00_566
-bit 00_567
-bit 00_568
-bit 00_569
-bit 00_570
-bit 00_571
-bit 00_572
-bit 00_573
-bit 00_574
-bit 00_575
-bit 00_576
-bit 00_577
-bit 00_578
-bit 00_579
-bit 00_580
-bit 00_581
-bit 00_582
-bit 00_583
-bit 00_584
-bit 00_585
-bit 00_586
-bit 00_587
-bit 00_588
-bit 00_589
-bit 00_590
-bit 00_591
-bit 00_592
-bit 00_593
-bit 00_594
-bit 00_595
-bit 00_596
-bit 00_600
-bit 00_601
-bit 00_602
-bit 00_603
-bit 00_604
-bit 00_608
-bit 00_609
-bit 00_610
-bit 00_611
-bit 00_612
-bit 00_614
-bit 00_615
-bit 00_616
-bit 00_617
-bit 00_618
-bit 00_619
-bit 00_620
-bit 00_623
-bit 00_624
-bit 00_625
-bit 00_626
-bit 00_627
-bit 00_628
-bit 00_632
-bit 00_633
-bit 00_634
-bit 00_635
-bit 00_636
-bit 00_640
-bit 00_641
-bit 00_642
-bit 00_643
-bit 00_644
-bit 00_646
-bit 00_647
-bit 00_648
-bit 00_649
-bit 00_650
-bit 00_651
-bit 00_652
-bit 00_654
-bit 00_655
-bit 00_656
-bit 00_657
-bit 00_658
-bit 00_659
-bit 00_660
-bit 00_662
-bit 00_663
-bit 00_664
-bit 00_665
-bit 00_666
-bit 00_667
-bit 00_668
-bit 00_670
-bit 00_671
-bit 00_672
-bit 00_673
-bit 00_674
-bit 00_675
-bit 00_676
-bit 00_677
-bit 00_678
-bit 00_679
-bit 00_680
-bit 00_681
-bit 00_682
-bit 00_683
-bit 00_684
-bit 00_685
-bit 00_686
-bit 00_687
-bit 00_696
-bit 00_697
-bit 00_698
-bit 00_700
-bit 00_701
-bit 00_702
-bit 01_00
-bit 01_01
-bit 01_06
-bit 01_07
-bit 01_47
-bit 01_101
-bit 01_102
-bit 01_103
-bit 01_104
-bit 01_105
-bit 01_106
-bit 01_107
-bit 01_108
-bit 01_109
-bit 01_110
-bit 01_112
-bit 01_113
-bit 01_114
-bit 01_115
-bit 01_116
-bit 01_117
-bit 01_123
-bit 01_124
-bit 01_125
-bit 01_128
-bit 01_129
-bit 01_130
-bit 01_131
-bit 01_132
-bit 01_133
-bit 01_134
-bit 01_135
-bit 01_138
-bit 01_139
-bit 01_140
-bit 01_141
-bit 01_142
-bit 01_144
-bit 01_145
-bit 01_146
-bit 01_147
-bit 01_148
-bit 01_149
-bit 01_150
-bit 01_151
-bit 01_152
-bit 01_153
-bit 01_154
-bit 01_155
-bit 01_156
-bit 01_157
-bit 01_158
-bit 01_160
-bit 01_161
-bit 01_162
-bit 01_163
-bit 01_164
-bit 01_165
-bit 01_168
-bit 01_169
-bit 01_170
-bit 01_171
-bit 01_172
-bit 01_173
-bit 01_176
-bit 01_177
-bit 01_178
-bit 01_179
-bit 01_180
-bit 01_181
-bit 01_187
-bit 01_188
-bit 01_189
-bit 01_190
-bit 01_191
-bit 01_192
-bit 01_193
-bit 01_194
-bit 01_195
-bit 01_202
-bit 01_203
-bit 01_204
-bit 01_205
-bit 01_207
-bit 01_208
-bit 01_209
-bit 01_210
-bit 01_211
-bit 01_212
-bit 01_213
-bit 01_214
-bit 01_215
-bit 01_216
-bit 01_217
-bit 01_218
-bit 01_219
-bit 01_220
-bit 01_221
-bit 01_224
-bit 01_226
-bit 01_231
-bit 01_288
-bit 01_289
-bit 01_290
-bit 01_291
-bit 01_292
-bit 01_293
-bit 01_336
-bit 01_337
-bit 01_338
-bit 01_339
-bit 01_340
-bit 01_341
-bit 01_342
-bit 01_343
-bit 01_344
-bit 01_345
-bit 01_346
-bit 01_347
-bit 01_348
-bit 01_349
-bit 01_350
-bit 01_351
-bit 01_352
-bit 01_353
-bit 01_354
-bit 01_355
-bit 01_356
-bit 01_357
-bit 01_358
-bit 01_359
-bit 01_360
-bit 01_361
-bit 01_362
-bit 01_363
-bit 01_364
-bit 01_365
-bit 01_366
-bit 01_367
-bit 01_368
-bit 01_369
-bit 01_370
-bit 01_371
-bit 01_372
-bit 01_373
-bit 01_374
-bit 01_375
-bit 01_376
-bit 01_377
-bit 01_378
-bit 01_379
-bit 01_380
-bit 01_381
-bit 01_382
-bit 01_383
-bit 01_384
-bit 01_385
-bit 01_386
-bit 01_387
-bit 01_388
-bit 01_389
-bit 01_390
-bit 01_391
-bit 01_392
-bit 01_393
-bit 01_394
-bit 01_395
-bit 01_396
-bit 01_397
-bit 01_398
-bit 01_399
-bit 01_400
-bit 01_401
-bit 01_402
-bit 01_403
-bit 01_404
-bit 01_405
-bit 01_406
-bit 01_407
-bit 01_408
-bit 01_409
-bit 01_410
-bit 01_411
-bit 01_412
-bit 01_413
-bit 01_414
-bit 01_415
-bit 01_416
-bit 01_417
-bit 01_418
-bit 01_419
-bit 01_420
-bit 01_421
-bit 01_422
-bit 01_423
-bit 01_424
-bit 01_425
-bit 01_426
-bit 01_427
-bit 01_428
-bit 01_429
-bit 01_430
-bit 01_431
-bit 01_432
-bit 01_433
-bit 01_434
-bit 01_435
-bit 01_436
-bit 01_437
-bit 01_438
-bit 01_439
-bit 01_440
-bit 01_441
-bit 01_442
-bit 01_443
-bit 01_444
-bit 01_445
-bit 01_446
-bit 01_447
-bit 01_448
-bit 01_449
-bit 01_450
-bit 01_451
-bit 01_452
-bit 01_453
-bit 01_454
-bit 01_455
-bit 01_456
-bit 01_457
-bit 01_458
-bit 01_459
-bit 01_460
-bit 01_461
-bit 01_462
-bit 01_463
-bit 01_464
-bit 01_465
-bit 01_466
-bit 01_467
-bit 01_468
-bit 01_469
-bit 01_470
-bit 01_471
-bit 01_472
-bit 01_473
-bit 01_474
-bit 01_475
-bit 01_477
-bit 01_478
-bit 01_479
-bit 01_480
-bit 01_481
-bit 01_482
-bit 01_483
-bit 01_484
-bit 01_485
-bit 01_488
-bit 01_489
-bit 01_490
-bit 01_492
-bit 01_494
-bit 01_495
-bit 01_496
-bit 01_497
-bit 01_498
-bit 01_499
-bit 01_500
-bit 01_504
-bit 01_505
-bit 01_506
-bit 01_507
-bit 01_508
-bit 01_512
-bit 01_513
-bit 01_514
-bit 01_515
-bit 01_516
-bit 01_519
-bit 01_520
-bit 01_521
-bit 01_522
-bit 01_523
-bit 01_524
-bit 01_525
-bit 01_526
-bit 01_544
-bit 01_545
-bit 01_546
-bit 01_547
-bit 01_548
-bit 01_549
-bit 01_550
-bit 01_552
-bit 01_553
-bit 01_554
-bit 01_555
-bit 01_556
-bit 01_557
-bit 01_558
-bit 01_559
-bit 01_560
-bit 01_561
-bit 01_562
-bit 01_563
-bit 01_564
-bit 01_565
-bit 01_566
-bit 01_567
-bit 01_568
-bit 01_569
-bit 01_570
-bit 01_571
-bit 01_572
-bit 01_573
-bit 01_574
-bit 01_576
-bit 01_577
-bit 01_578
-bit 01_579
-bit 01_580
-bit 01_581
-bit 01_582
-bit 01_584
-bit 01_585
-bit 01_586
-bit 01_587
-bit 01_588
-bit 01_589
-bit 01_592
-bit 01_593
-bit 01_594
-bit 01_595
-bit 01_596
-bit 01_600
-bit 01_601
-bit 01_602
-bit 01_603
-bit 01_604
-bit 01_607
-bit 01_608
-bit 01_609
-bit 01_610
-bit 01_611
-bit 01_612
-bit 01_614
-bit 01_615
-bit 01_616
-bit 01_617
-bit 01_618
-bit 01_619
-bit 01_620
-bit 01_623
-bit 01_624
-bit 01_625
-bit 01_626
-bit 01_627
-bit 01_628
-bit 01_631
-bit 01_632
-bit 01_633
-bit 01_634
-bit 01_635
-bit 01_636
-bit 01_640
-bit 01_641
-bit 01_642
-bit 01_643
-bit 01_644
-bit 01_645
-bit 01_646
-bit 01_647
-bit 01_648
-bit 01_649
-bit 01_650
-bit 01_651
-bit 01_652
-bit 01_653
-bit 01_654
-bit 01_655
-bit 01_656
-bit 01_657
-bit 01_658
-bit 01_659
-bit 01_660
-bit 01_661
-bit 01_662
-bit 01_663
-bit 01_664
-bit 01_665
-bit 01_666
-bit 01_667
-bit 01_668
-bit 01_670
-bit 01_671
-bit 01_672
-bit 01_673
-bit 01_674
-bit 01_675
-bit 01_676
-bit 01_677
-bit 01_678
-bit 01_679
-bit 01_680
-bit 01_681
-bit 01_682
-bit 01_683
-bit 01_684
-bit 01_685
-bit 01_686
-bit 01_687
-bit 01_696
-bit 01_697
-bit 01_698
-bit 01_700
-bit 01_701
-bit 02_00
-bit 02_02
-bit 02_03
-bit 02_05
-bit 02_11
-bit 02_13
-bit 02_20
-bit 02_23
-bit 02_40
-bit 02_41
-bit 02_42
-bit 02_43
-bit 02_44
-bit 02_45
-bit 02_55
-bit 02_64
-bit 02_65
-bit 02_66
-bit 02_67
-bit 02_68
-bit 02_69
-bit 02_70
-bit 02_71
-bit 02_72
-bit 02_73
-bit 02_74
-bit 02_75
-bit 02_80
-bit 02_81
-bit 02_82
-bit 02_83
-bit 02_84
-bit 02_85
-bit 02_86
-bit 02_87
-bit 02_88
-bit 02_89
-bit 02_90
-bit 02_91
-bit 02_92
-bit 02_93
-bit 02_94
-bit 02_95
-bit 02_96
-bit 02_97
-bit 02_98
-bit 02_99
-bit 02_100
-bit 02_101
-bit 02_102
-bit 02_103
-bit 02_108
-bit 02_109
-bit 02_110
-bit 02_112
-bit 02_113
-bit 02_114
-bit 02_115
-bit 02_116
-bit 02_117
-bit 02_118
-bit 02_119
-bit 02_128
-bit 02_129
-bit 02_136
-bit 02_137
-bit 02_138
-bit 02_139
-bit 02_140
-bit 02_141
-bit 02_142
-bit 02_143
-bit 02_144
-bit 02_145
-bit 02_146
-bit 02_151
-bit 02_152
-bit 02_153
-bit 02_156
-bit 02_157
-bit 02_184
-bit 02_185
-bit 02_186
-bit 02_187
-bit 02_188
-bit 02_189
-bit 02_190
-bit 02_191
-bit 02_192
-bit 02_193
-bit 02_194
-bit 02_195
-bit 02_196
-bit 02_197
-bit 02_198
-bit 02_199
-bit 02_200
-bit 02_201
-bit 02_202
-bit 02_203
-bit 02_204
-bit 02_205
-bit 02_206
-bit 02_207
-bit 02_232
-bit 02_233
-bit 02_234
-bit 02_235
-bit 02_236
-bit 02_237
-bit 02_238
-bit 02_239
-bit 02_240
-bit 02_241
-bit 02_242
-bit 02_243
-bit 02_244
-bit 02_245
-bit 02_246
-bit 02_247
-bit 02_248
-bit 02_249
-bit 02_250
-bit 02_251
-bit 02_252
-bit 02_253
-bit 02_254
-bit 02_255
-bit 02_256
-bit 02_257
-bit 02_258
-bit 02_259
-bit 02_260
-bit 02_261
-bit 02_262
-bit 02_263
-bit 02_264
-bit 02_265
-bit 02_266
-bit 02_267
-bit 02_268
-bit 02_269
-bit 02_270
-bit 02_271
-bit 02_272
-bit 02_273
-bit 02_274
-bit 02_276
-bit 02_277
-bit 02_278
-bit 02_288
-bit 02_292
-bit 02_293
-bit 02_296
-bit 02_297
-bit 02_298
-bit 02_299
-bit 02_300
-bit 02_301
-bit 02_302
-bit 02_303
-bit 02_304
-bit 02_305
-bit 02_328
-bit 02_329
-bit 02_330
-bit 02_336
-bit 02_337
-bit 02_338
-bit 02_339
-bit 02_340
-bit 02_341
-bit 02_342
-bit 02_343
-bit 02_344
-bit 02_345
-bit 02_346
-bit 02_347
-bit 02_348
-bit 02_349
-bit 02_350
-bit 02_351
-bit 02_368
-bit 02_369
-bit 02_370
-bit 02_371
-bit 02_372
-bit 02_373
-bit 02_374
-bit 02_375
-bit 02_376
-bit 02_377
-bit 02_378
-bit 02_379
-bit 02_384
-bit 02_386
-bit 02_390
-bit 02_391
-bit 02_392
-bit 02_393
-bit 02_394
-bit 02_395
-bit 02_396
-bit 02_397
-bit 02_398
-bit 02_399
-bit 02_400
-bit 02_401
-bit 02_402
-bit 02_403
-bit 02_404
-bit 02_405
-bit 02_406
-bit 02_407
-bit 02_408
-bit 02_409
-bit 02_410
-bit 02_411
-bit 02_412
-bit 02_413
-bit 02_416
-bit 02_417
-bit 02_418
-bit 02_419
-bit 02_424
-bit 02_425
-bit 02_426
-bit 02_427
-bit 02_428
-bit 02_429
-bit 02_430
-bit 02_431
-bit 02_432
-bit 02_433
-bit 02_434
-bit 02_435
-bit 02_436
-bit 02_437
-bit 02_438
-bit 02_439
-bit 02_440
-bit 02_441
-bit 02_442
-bit 02_443
-bit 02_459
-bit 02_460
-bit 02_461
-bit 02_462
-bit 02_463
-bit 02_464
-bit 02_465
-bit 02_466
-bit 02_467
-bit 02_468
-bit 02_469
-bit 02_470
-bit 02_471
-bit 02_472
-bit 02_473
-bit 02_488
-bit 02_489
-bit 02_490
-bit 02_491
-bit 02_496
-bit 02_497
-bit 02_498
-bit 02_504
-bit 02_505
-bit 02_506
-bit 02_507
-bit 02_508
-bit 02_509
-bit 02_510
-bit 02_511
-bit 02_512
-bit 02_513
-bit 02_514
-bit 02_515
-bit 02_516
-bit 02_517
-bit 02_518
-bit 02_519
-bit 02_520
-bit 02_521
-bit 02_522
-bit 02_523
-bit 02_524
-bit 02_525
-bit 02_526
-bit 02_527
-bit 02_528
-bit 02_529
-bit 02_530
-bit 02_531
-bit 02_532
-bit 02_533
-bit 02_534
-bit 02_535
-bit 02_536
-bit 02_537
-bit 02_538
-bit 02_544
-bit 02_545
-bit 02_546
-bit 02_547
-bit 02_548
-bit 02_552
-bit 02_553
-bit 02_554
-bit 02_555
-bit 02_556
-bit 02_557
-bit 02_558
-bit 02_559
-bit 02_560
-bit 02_561
-bit 02_568
-bit 02_569
-bit 02_570
-bit 02_571
-bit 02_572
-bit 02_576
-bit 02_577
-bit 02_578
-bit 02_579
-bit 02_580
-bit 02_584
-bit 02_585
-bit 02_586
-bit 02_587
-bit 02_588
-bit 02_589
-bit 02_590
-bit 02_591
-bit 02_592
-bit 02_593
-bit 02_594
-bit 02_595
-bit 02_600
-bit 02_601
-bit 02_602
-bit 02_603
-bit 02_604
-bit 02_605
-bit 02_606
-bit 02_607
-bit 02_608
-bit 02_609
-bit 02_610
-bit 02_611
-bit 02_616
-bit 02_617
-bit 02_618
-bit 02_619
-bit 02_620
-bit 02_621
-bit 02_622
-bit 02_624
-bit 02_625
-bit 02_626
-bit 02_627
-bit 02_628
-bit 02_632
-bit 02_633
-bit 02_634
-bit 02_638
-bit 02_640
-bit 02_641
-bit 02_642
-bit 02_643
-bit 02_644
-bit 02_645
-bit 02_646
-bit 02_647
-bit 02_648
-bit 02_649
-bit 02_650
-bit 02_651
-bit 02_652
-bit 02_653
-bit 02_654
-bit 02_655
-bit 02_656
-bit 02_657
-bit 02_658
-bit 02_659
-bit 02_660
-bit 02_661
-bit 02_662
-bit 02_663
-bit 02_664
-bit 02_665
-bit 02_666
-bit 02_667
-bit 02_668
-bit 02_669
-bit 02_670
-bit 02_671
-bit 02_672
-bit 02_673
-bit 02_674
-bit 02_675
-bit 02_676
-bit 02_677
-bit 02_678
-bit 02_679
-bit 02_680
-bit 02_681
-bit 03_01
-bit 03_04
-bit 03_11
-bit 03_13
-bit 03_20
-bit 03_23
-bit 03_40
-bit 03_41
-bit 03_42
-bit 03_43
-bit 03_44
-bit 03_55
-bit 03_64
-bit 03_65
-bit 03_66
-bit 03_67
-bit 03_68
-bit 03_69
-bit 03_70
-bit 03_71
-bit 03_72
-bit 03_73
-bit 03_74
-bit 03_75
-bit 03_80
-bit 03_81
-bit 03_82
-bit 03_83
-bit 03_84
-bit 03_85
-bit 03_86
-bit 03_87
-bit 03_88
-bit 03_89
-bit 03_90
-bit 03_91
-bit 03_92
-bit 03_93
-bit 03_94
-bit 03_95
-bit 03_96
-bit 03_97
-bit 03_98
-bit 03_99
-bit 03_100
-bit 03_101
-bit 03_102
-bit 03_103
-bit 03_108
-bit 03_109
-bit 03_112
-bit 03_113
-bit 03_114
-bit 03_115
-bit 03_116
-bit 03_117
-bit 03_118
-bit 03_119
-bit 03_128
-bit 03_129
-bit 03_136
-bit 03_137
-bit 03_138
-bit 03_139
-bit 03_140
-bit 03_141
-bit 03_142
-bit 03_144
-bit 03_145
-bit 03_150
-bit 03_151
-bit 03_152
-bit 03_156
-bit 03_157
-bit 03_159
-bit 03_184
-bit 03_185
-bit 03_186
-bit 03_187
-bit 03_188
-bit 03_189
-bit 03_190
-bit 03_191
-bit 03_192
-bit 03_193
-bit 03_194
-bit 03_195
-bit 03_196
-bit 03_197
-bit 03_198
-bit 03_199
-bit 03_200
-bit 03_201
-bit 03_202
-bit 03_203
-bit 03_204
-bit 03_205
-bit 03_206
-bit 03_207
-bit 03_232
-bit 03_233
-bit 03_234
-bit 03_236
-bit 03_237
-bit 03_238
-bit 03_240
-bit 03_241
-bit 03_242
-bit 03_244
-bit 03_245
-bit 03_246
-bit 03_248
-bit 03_249
-bit 03_250
-bit 03_252
-bit 03_253
-bit 03_254
-bit 03_256
-bit 03_257
-bit 03_258
-bit 03_260
-bit 03_261
-bit 03_262
-bit 03_264
-bit 03_265
-bit 03_266
-bit 03_268
-bit 03_269
-bit 03_270
-bit 03_272
-bit 03_273
-bit 03_274
-bit 03_276
-bit 03_277
-bit 03_278
-bit 03_288
-bit 03_289
-bit 03_292
-bit 03_296
-bit 03_297
-bit 03_298
-bit 03_299
-bit 03_300
-bit 03_301
-bit 03_302
-bit 03_303
-bit 03_304
-bit 03_305
-bit 03_311
-bit 03_328
-bit 03_329
-bit 03_336
-bit 03_337
-bit 03_338
-bit 03_339
-bit 03_340
-bit 03_341
-bit 03_342
-bit 03_343
-bit 03_344
-bit 03_345
-bit 03_346
-bit 03_347
-bit 03_348
-bit 03_349
-bit 03_350
-bit 03_351
-bit 03_368
-bit 03_369
-bit 03_370
-bit 03_371
-bit 03_372
-bit 03_373
-bit 03_374
-bit 03_375
-bit 03_376
-bit 03_377
-bit 03_378
-bit 03_379
-bit 03_384
-bit 03_386
-bit 03_389
-bit 03_390
-bit 03_391
-bit 03_392
-bit 03_393
-bit 03_394
-bit 03_395
-bit 03_396
-bit 03_397
-bit 03_398
-bit 03_399
-bit 03_400
-bit 03_401
-bit 03_402
-bit 03_403
-bit 03_404
-bit 03_405
-bit 03_406
-bit 03_407
-bit 03_408
-bit 03_409
-bit 03_410
-bit 03_411
-bit 03_412
-bit 03_416
-bit 03_417
-bit 03_418
-bit 03_424
-bit 03_425
-bit 03_426
-bit 03_427
-bit 03_428
-bit 03_429
-bit 03_430
-bit 03_431
-bit 03_432
-bit 03_433
-bit 03_434
-bit 03_435
-bit 03_436
-bit 03_437
-bit 03_438
-bit 03_439
-bit 03_440
-bit 03_441
-bit 03_442
-bit 03_443
-bit 03_459
-bit 03_460
-bit 03_461
-bit 03_463
-bit 03_464
-bit 03_465
-bit 03_466
-bit 03_467
-bit 03_468
-bit 03_469
-bit 03_470
-bit 03_471
-bit 03_472
-bit 03_473
-bit 03_488
-bit 03_489
-bit 03_490
-bit 03_491
-bit 03_496
-bit 03_497
-bit 03_498
-bit 03_504
-bit 03_505
-bit 03_506
-bit 03_507
-bit 03_508
-bit 03_509
-bit 03_510
-bit 03_511
-bit 03_512
-bit 03_513
-bit 03_514
-bit 03_515
-bit 03_516
-bit 03_517
-bit 03_518
-bit 03_519
-bit 03_520
-bit 03_521
-bit 03_522
-bit 03_523
-bit 03_524
-bit 03_525
-bit 03_526
-bit 03_527
-bit 03_528
-bit 03_529
-bit 03_530
-bit 03_531
-bit 03_532
-bit 03_533
-bit 03_534
-bit 03_535
-bit 03_536
-bit 03_537
-bit 03_538
-bit 03_544
-bit 03_545
-bit 03_546
-bit 03_552
-bit 03_553
-bit 03_554
-bit 03_555
-bit 03_556
-bit 03_557
-bit 03_558
-bit 03_559
-bit 03_560
-bit 03_568
-bit 03_569
-bit 03_570
-bit 03_571
-bit 03_576
-bit 03_577
-bit 03_578
-bit 03_579
-bit 03_584
-bit 03_585
-bit 03_586
-bit 03_587
-bit 03_588
-bit 03_589
-bit 03_590
-bit 03_591
-bit 03_592
-bit 03_593
-bit 03_594
-bit 03_595
-bit 03_600
-bit 03_601
-bit 03_602
-bit 03_603
-bit 03_604
-bit 03_605
-bit 03_606
-bit 03_607
-bit 03_608
-bit 03_609
-bit 03_610
-bit 03_611
-bit 03_616
-bit 03_617
-bit 03_618
-bit 03_619
-bit 03_620
-bit 03_621
-bit 03_622
-bit 03_624
-bit 03_625
-bit 03_626
-bit 03_627
-bit 03_628
-bit 03_632
-bit 03_633
-bit 03_634
-bit 03_637
-bit 03_638
-bit 03_640
-bit 03_641
-bit 03_642
-bit 03_643
-bit 03_644
-bit 03_645
-bit 03_646
-bit 03_647
-bit 03_648
-bit 03_649
-bit 03_650
-bit 03_651
-bit 03_652
-bit 03_653
-bit 03_654
-bit 03_655
-bit 03_656
-bit 03_657
-bit 03_658
-bit 03_659
-bit 03_660
-bit 03_661
-bit 03_662
-bit 03_663
-bit 03_664
-bit 03_665
-bit 03_666
-bit 03_667
-bit 03_668
-bit 03_669
-bit 03_670
-bit 03_671
-bit 03_672
-bit 03_673
-bit 03_674
-bit 03_675
-bit 03_676
-bit 03_677
-bit 03_678
-bit 03_679
-bit 03_680
 bit 28_00
 bit 28_01
 bit 28_07

diff --git a/artix7/mask_gtp_channel_0_mid_left.db b/artix7/mask_gtp_channel_0_mid_left.db
index c576c8c..6f48b45 100644
--- a/artix7/mask_gtp_channel_0_mid_left.db
+++ b/artix7/mask_gtp_channel_0_mid_left.db

@@ -1632,1637 +1632,3 @@
 bit 03_678
 bit 03_679
 bit 03_680
-bit 28_00
-bit 28_01
-bit 28_07
-bit 28_47
-bit 28_52
-bit 28_53
-bit 28_65
-bit 28_102
-bit 28_103
-bit 28_104
-bit 28_105
-bit 28_106
-bit 28_107
-bit 28_108
-bit 28_109
-bit 28_110
-bit 28_111
-bit 28_112
-bit 28_113
-bit 28_114
-bit 28_115
-bit 28_116
-bit 28_117
-bit 28_124
-bit 28_125
-bit 28_128
-bit 28_129
-bit 28_130
-bit 28_131
-bit 28_132
-bit 28_133
-bit 28_134
-bit 28_135
-bit 28_136
-bit 28_138
-bit 28_139
-bit 28_140
-bit 28_141
-bit 28_142
-bit 28_143
-bit 28_144
-bit 28_145
-bit 28_146
-bit 28_147
-bit 28_148
-bit 28_149
-bit 28_150
-bit 28_151
-bit 28_152
-bit 28_153
-bit 28_154
-bit 28_155
-bit 28_156
-bit 28_157
-bit 28_158
-bit 28_159
-bit 28_160
-bit 28_161
-bit 28_162
-bit 28_163
-bit 28_164
-bit 28_165
-bit 28_168
-bit 28_169
-bit 28_170
-bit 28_171
-bit 28_172
-bit 28_173
-bit 28_174
-bit 28_176
-bit 28_177
-bit 28_178
-bit 28_179
-bit 28_180
-bit 28_181
-bit 28_187
-bit 28_188
-bit 28_189
-bit 28_190
-bit 28_191
-bit 28_192
-bit 28_193
-bit 28_194
-bit 28_195
-bit 28_200
-bit 28_203
-bit 28_204
-bit 28_205
-bit 28_206
-bit 28_208
-bit 28_209
-bit 28_210
-bit 28_211
-bit 28_212
-bit 28_213
-bit 28_214
-bit 28_215
-bit 28_216
-bit 28_217
-bit 28_218
-bit 28_219
-bit 28_220
-bit 28_221
-bit 28_222
-bit 28_224
-bit 28_225
-bit 28_231
-bit 28_247
-bit 28_288
-bit 28_289
-bit 28_290
-bit 28_291
-bit 28_292
-bit 28_293
-bit 28_294
-bit 28_336
-bit 28_337
-bit 28_338
-bit 28_339
-bit 28_340
-bit 28_341
-bit 28_342
-bit 28_343
-bit 28_344
-bit 28_345
-bit 28_346
-bit 28_347
-bit 28_348
-bit 28_349
-bit 28_350
-bit 28_351
-bit 28_352
-bit 28_353
-bit 28_354
-bit 28_355
-bit 28_356
-bit 28_357
-bit 28_358
-bit 28_359
-bit 28_360
-bit 28_361
-bit 28_362
-bit 28_363
-bit 28_364
-bit 28_365
-bit 28_366
-bit 28_367
-bit 28_368
-bit 28_369
-bit 28_370
-bit 28_371
-bit 28_372
-bit 28_373
-bit 28_374
-bit 28_375
-bit 28_376
-bit 28_377
-bit 28_378
-bit 28_379
-bit 28_380
-bit 28_381
-bit 28_382
-bit 28_383
-bit 28_384
-bit 28_385
-bit 28_386
-bit 28_387
-bit 28_388
-bit 28_389
-bit 28_390
-bit 28_391
-bit 28_392
-bit 28_393
-bit 28_394
-bit 28_395
-bit 28_396
-bit 28_397
-bit 28_398
-bit 28_399
-bit 28_400
-bit 28_401
-bit 28_402
-bit 28_403
-bit 28_404
-bit 28_405
-bit 28_406
-bit 28_407
-bit 28_408
-bit 28_409
-bit 28_410
-bit 28_411
-bit 28_412
-bit 28_413
-bit 28_414
-bit 28_415
-bit 28_416
-bit 28_417
-bit 28_418
-bit 28_419
-bit 28_420
-bit 28_421
-bit 28_422
-bit 28_423
-bit 28_424
-bit 28_425
-bit 28_426
-bit 28_427
-bit 28_428
-bit 28_429
-bit 28_430
-bit 28_431
-bit 28_432
-bit 28_433
-bit 28_434
-bit 28_435
-bit 28_436
-bit 28_437
-bit 28_438
-bit 28_439
-bit 28_440
-bit 28_441
-bit 28_442
-bit 28_443
-bit 28_444
-bit 28_445
-bit 28_446
-bit 28_447
-bit 28_448
-bit 28_449
-bit 28_450
-bit 28_451
-bit 28_452
-bit 28_453
-bit 28_454
-bit 28_455
-bit 28_456
-bit 28_457
-bit 28_458
-bit 28_459
-bit 28_460
-bit 28_461
-bit 28_462
-bit 28_463
-bit 28_464
-bit 28_465
-bit 28_466
-bit 28_467
-bit 28_468
-bit 28_469
-bit 28_470
-bit 28_471
-bit 28_472
-bit 28_473
-bit 28_474
-bit 28_475
-bit 28_476
-bit 28_478
-bit 28_479
-bit 28_480
-bit 28_481
-bit 28_482
-bit 28_483
-bit 28_484
-bit 28_485
-bit 28_488
-bit 28_489
-bit 28_490
-bit 28_492
-bit 28_494
-bit 28_495
-bit 28_496
-bit 28_497
-bit 28_498
-bit 28_499
-bit 28_500
-bit 28_504
-bit 28_505
-bit 28_506
-bit 28_507
-bit 28_508
-bit 28_512
-bit 28_513
-bit 28_514
-bit 28_515
-bit 28_516
-bit 28_519
-bit 28_520
-bit 28_521
-bit 28_522
-bit 28_523
-bit 28_524
-bit 28_525
-bit 28_526
-bit 28_527
-bit 28_544
-bit 28_545
-bit 28_546
-bit 28_547
-bit 28_548
-bit 28_549
-bit 28_550
-bit 28_551
-bit 28_552
-bit 28_553
-bit 28_554
-bit 28_555
-bit 28_556
-bit 28_557
-bit 28_558
-bit 28_559
-bit 28_560
-bit 28_561
-bit 28_562
-bit 28_563
-bit 28_564
-bit 28_565
-bit 28_566
-bit 28_567
-bit 28_568
-bit 28_569
-bit 28_570
-bit 28_571
-bit 28_572
-bit 28_573
-bit 28_574
-bit 28_575
-bit 28_576
-bit 28_577
-bit 28_578
-bit 28_579
-bit 28_580
-bit 28_581
-bit 28_582
-bit 28_583
-bit 28_584
-bit 28_585
-bit 28_586
-bit 28_587
-bit 28_588
-bit 28_589
-bit 28_590
-bit 28_591
-bit 28_592
-bit 28_593
-bit 28_594
-bit 28_595
-bit 28_596
-bit 28_600
-bit 28_601
-bit 28_602
-bit 28_603
-bit 28_604
-bit 28_608
-bit 28_609
-bit 28_610
-bit 28_611
-bit 28_612
-bit 28_614
-bit 28_615
-bit 28_616
-bit 28_617
-bit 28_618
-bit 28_619
-bit 28_620
-bit 28_623
-bit 28_624
-bit 28_625
-bit 28_626
-bit 28_627
-bit 28_628
-bit 28_632
-bit 28_633
-bit 28_634
-bit 28_635
-bit 28_636
-bit 28_640
-bit 28_641
-bit 28_642
-bit 28_643
-bit 28_644
-bit 28_646
-bit 28_647
-bit 28_648
-bit 28_649
-bit 28_650
-bit 28_651
-bit 28_652
-bit 28_654
-bit 28_655
-bit 28_656
-bit 28_657
-bit 28_658
-bit 28_659
-bit 28_660
-bit 28_662
-bit 28_663
-bit 28_664
-bit 28_665
-bit 28_666
-bit 28_667
-bit 28_668
-bit 28_670
-bit 28_671
-bit 28_672
-bit 28_673
-bit 28_674
-bit 28_675
-bit 28_676
-bit 28_677
-bit 28_678
-bit 28_679
-bit 28_680
-bit 28_681
-bit 28_682
-bit 28_683
-bit 28_684
-bit 28_685
-bit 28_686
-bit 28_687
-bit 28_696
-bit 28_697
-bit 28_698
-bit 28_700
-bit 28_701
-bit 28_702
-bit 29_00
-bit 29_01
-bit 29_06
-bit 29_07
-bit 29_47
-bit 29_101
-bit 29_102
-bit 29_103
-bit 29_104
-bit 29_105
-bit 29_106
-bit 29_107
-bit 29_108
-bit 29_109
-bit 29_110
-bit 29_112
-bit 29_113
-bit 29_114
-bit 29_115
-bit 29_116
-bit 29_117
-bit 29_123
-bit 29_124
-bit 29_125
-bit 29_128
-bit 29_129
-bit 29_130
-bit 29_131
-bit 29_132
-bit 29_133
-bit 29_134
-bit 29_135
-bit 29_138
-bit 29_139
-bit 29_140
-bit 29_141
-bit 29_142
-bit 29_144
-bit 29_145
-bit 29_146
-bit 29_147
-bit 29_148
-bit 29_149
-bit 29_150
-bit 29_151
-bit 29_152
-bit 29_153
-bit 29_154
-bit 29_155
-bit 29_156
-bit 29_157
-bit 29_158
-bit 29_160
-bit 29_161
-bit 29_162
-bit 29_163
-bit 29_164
-bit 29_165
-bit 29_168
-bit 29_169
-bit 29_170
-bit 29_171
-bit 29_172
-bit 29_173
-bit 29_176
-bit 29_177
-bit 29_178
-bit 29_179
-bit 29_180
-bit 29_181
-bit 29_187
-bit 29_188
-bit 29_189
-bit 29_190
-bit 29_191
-bit 29_192
-bit 29_193
-bit 29_194
-bit 29_195
-bit 29_202
-bit 29_203
-bit 29_204
-bit 29_205
-bit 29_207
-bit 29_208
-bit 29_209
-bit 29_210
-bit 29_211
-bit 29_212
-bit 29_213
-bit 29_214
-bit 29_215
-bit 29_216
-bit 29_217
-bit 29_218
-bit 29_219
-bit 29_220
-bit 29_221
-bit 29_224
-bit 29_226
-bit 29_231
-bit 29_288
-bit 29_289
-bit 29_290
-bit 29_291
-bit 29_292
-bit 29_293
-bit 29_336
-bit 29_337
-bit 29_338
-bit 29_339
-bit 29_340
-bit 29_341
-bit 29_342
-bit 29_343
-bit 29_344
-bit 29_345
-bit 29_346
-bit 29_347
-bit 29_348
-bit 29_349
-bit 29_350
-bit 29_351
-bit 29_352
-bit 29_353
-bit 29_354
-bit 29_355
-bit 29_356
-bit 29_357
-bit 29_358
-bit 29_359
-bit 29_360
-bit 29_361
-bit 29_362
-bit 29_363
-bit 29_364
-bit 29_365
-bit 29_366
-bit 29_367
-bit 29_368
-bit 29_369
-bit 29_370
-bit 29_371
-bit 29_372
-bit 29_373
-bit 29_374
-bit 29_375
-bit 29_376
-bit 29_377
-bit 29_378
-bit 29_379
-bit 29_380
-bit 29_381
-bit 29_382
-bit 29_383
-bit 29_384
-bit 29_385
-bit 29_386
-bit 29_387
-bit 29_388
-bit 29_389
-bit 29_390
-bit 29_391
-bit 29_392
-bit 29_393
-bit 29_394
-bit 29_395
-bit 29_396
-bit 29_397
-bit 29_398
-bit 29_399
-bit 29_400
-bit 29_401
-bit 29_402
-bit 29_403
-bit 29_404
-bit 29_405
-bit 29_406
-bit 29_407
-bit 29_408
-bit 29_409
-bit 29_410
-bit 29_411
-bit 29_412
-bit 29_413
-bit 29_414
-bit 29_415
-bit 29_416
-bit 29_417
-bit 29_418
-bit 29_419
-bit 29_420
-bit 29_421
-bit 29_422
-bit 29_423
-bit 29_424
-bit 29_425
-bit 29_426
-bit 29_427
-bit 29_428
-bit 29_429
-bit 29_430
-bit 29_431
-bit 29_432
-bit 29_433
-bit 29_434
-bit 29_435
-bit 29_436
-bit 29_437
-bit 29_438
-bit 29_439
-bit 29_440
-bit 29_441
-bit 29_442
-bit 29_443
-bit 29_444
-bit 29_445
-bit 29_446
-bit 29_447
-bit 29_448
-bit 29_449
-bit 29_450
-bit 29_451
-bit 29_452
-bit 29_453
-bit 29_454
-bit 29_455
-bit 29_456
-bit 29_457
-bit 29_458
-bit 29_459
-bit 29_460
-bit 29_461
-bit 29_462
-bit 29_463
-bit 29_464
-bit 29_465
-bit 29_466
-bit 29_467
-bit 29_468
-bit 29_469
-bit 29_470
-bit 29_471
-bit 29_472
-bit 29_473
-bit 29_474
-bit 29_475
-bit 29_477
-bit 29_478
-bit 29_479
-bit 29_480
-bit 29_481
-bit 29_482
-bit 29_483
-bit 29_484
-bit 29_485
-bit 29_488
-bit 29_489
-bit 29_490
-bit 29_492
-bit 29_494
-bit 29_495
-bit 29_496
-bit 29_497
-bit 29_498
-bit 29_499
-bit 29_500
-bit 29_504
-bit 29_505
-bit 29_506
-bit 29_507
-bit 29_508
-bit 29_512
-bit 29_513
-bit 29_514
-bit 29_515
-bit 29_516
-bit 29_519
-bit 29_520
-bit 29_521
-bit 29_522
-bit 29_523
-bit 29_524
-bit 29_525
-bit 29_526
-bit 29_544
-bit 29_545
-bit 29_546
-bit 29_547
-bit 29_548
-bit 29_549
-bit 29_550
-bit 29_552
-bit 29_553
-bit 29_554
-bit 29_555
-bit 29_556
-bit 29_557
-bit 29_558
-bit 29_559
-bit 29_560
-bit 29_561
-bit 29_562
-bit 29_563
-bit 29_564
-bit 29_565
-bit 29_566
-bit 29_567
-bit 29_568
-bit 29_569
-bit 29_570
-bit 29_571
-bit 29_572
-bit 29_573
-bit 29_574
-bit 29_576
-bit 29_577
-bit 29_578
-bit 29_579
-bit 29_580
-bit 29_581
-bit 29_582
-bit 29_584
-bit 29_585
-bit 29_586
-bit 29_587
-bit 29_588
-bit 29_589
-bit 29_592
-bit 29_593
-bit 29_594
-bit 29_595
-bit 29_596
-bit 29_600
-bit 29_601
-bit 29_602
-bit 29_603
-bit 29_604
-bit 29_607
-bit 29_608
-bit 29_609
-bit 29_610
-bit 29_611
-bit 29_612
-bit 29_614
-bit 29_615
-bit 29_616
-bit 29_617
-bit 29_618
-bit 29_619
-bit 29_620
-bit 29_623
-bit 29_624
-bit 29_625
-bit 29_626
-bit 29_627
-bit 29_628
-bit 29_631
-bit 29_632
-bit 29_633
-bit 29_634
-bit 29_635
-bit 29_636
-bit 29_640
-bit 29_641
-bit 29_642
-bit 29_643
-bit 29_644
-bit 29_645
-bit 29_646
-bit 29_647
-bit 29_648
-bit 29_649
-bit 29_650
-bit 29_651
-bit 29_652
-bit 29_653
-bit 29_654
-bit 29_655
-bit 29_656
-bit 29_657
-bit 29_658
-bit 29_659
-bit 29_660
-bit 29_661
-bit 29_662
-bit 29_663
-bit 29_664
-bit 29_665
-bit 29_666
-bit 29_667
-bit 29_668
-bit 29_670
-bit 29_671
-bit 29_672
-bit 29_673
-bit 29_674
-bit 29_675
-bit 29_676
-bit 29_677
-bit 29_678
-bit 29_679
-bit 29_680
-bit 29_681
-bit 29_682
-bit 29_683
-bit 29_684
-bit 29_685
-bit 29_686
-bit 29_687
-bit 29_696
-bit 29_697
-bit 29_698
-bit 29_700
-bit 29_701
-bit 30_00
-bit 30_02
-bit 30_03
-bit 30_05
-bit 30_11
-bit 30_13
-bit 30_20
-bit 30_23
-bit 30_40
-bit 30_41
-bit 30_42
-bit 30_43
-bit 30_44
-bit 30_45
-bit 30_55
-bit 30_64
-bit 30_65
-bit 30_66
-bit 30_67
-bit 30_68
-bit 30_69
-bit 30_70
-bit 30_71
-bit 30_72
-bit 30_73
-bit 30_74
-bit 30_75
-bit 30_80
-bit 30_81
-bit 30_82
-bit 30_83
-bit 30_84
-bit 30_85
-bit 30_86
-bit 30_87
-bit 30_88
-bit 30_89
-bit 30_90
-bit 30_91
-bit 30_92
-bit 30_93
-bit 30_94
-bit 30_95
-bit 30_96
-bit 30_97
-bit 30_98
-bit 30_99
-bit 30_100
-bit 30_101
-bit 30_102
-bit 30_103
-bit 30_108
-bit 30_109
-bit 30_110
-bit 30_112
-bit 30_113
-bit 30_114
-bit 30_115
-bit 30_116
-bit 30_117
-bit 30_118
-bit 30_119
-bit 30_128
-bit 30_129
-bit 30_136
-bit 30_137
-bit 30_138
-bit 30_139
-bit 30_140
-bit 30_141
-bit 30_142
-bit 30_143
-bit 30_144
-bit 30_145
-bit 30_146
-bit 30_151
-bit 30_152
-bit 30_153
-bit 30_156
-bit 30_157
-bit 30_184
-bit 30_185
-bit 30_186
-bit 30_187
-bit 30_188
-bit 30_189
-bit 30_190
-bit 30_191
-bit 30_192
-bit 30_193
-bit 30_194
-bit 30_195
-bit 30_196
-bit 30_197
-bit 30_198
-bit 30_199
-bit 30_200
-bit 30_201
-bit 30_202
-bit 30_203
-bit 30_204
-bit 30_205
-bit 30_206
-bit 30_207
-bit 30_232
-bit 30_233
-bit 30_234
-bit 30_235
-bit 30_236
-bit 30_237
-bit 30_238
-bit 30_239
-bit 30_240
-bit 30_241
-bit 30_242
-bit 30_243
-bit 30_244
-bit 30_245
-bit 30_246
-bit 30_247
-bit 30_248
-bit 30_249
-bit 30_250
-bit 30_251
-bit 30_252
-bit 30_253
-bit 30_254
-bit 30_255
-bit 30_256
-bit 30_257
-bit 30_258
-bit 30_259
-bit 30_260
-bit 30_261
-bit 30_262
-bit 30_263
-bit 30_264
-bit 30_265
-bit 30_266
-bit 30_267
-bit 30_268
-bit 30_269
-bit 30_270
-bit 30_271
-bit 30_272
-bit 30_273
-bit 30_274
-bit 30_276
-bit 30_277
-bit 30_278
-bit 30_288
-bit 30_292
-bit 30_293
-bit 30_296
-bit 30_297
-bit 30_298
-bit 30_299
-bit 30_300
-bit 30_301
-bit 30_302
-bit 30_303
-bit 30_304
-bit 30_305
-bit 30_328
-bit 30_329
-bit 30_330
-bit 30_336
-bit 30_337
-bit 30_338
-bit 30_339
-bit 30_340
-bit 30_341
-bit 30_342
-bit 30_343
-bit 30_344
-bit 30_345
-bit 30_346
-bit 30_347
-bit 30_348
-bit 30_349
-bit 30_350
-bit 30_351
-bit 30_368
-bit 30_369
-bit 30_370
-bit 30_371
-bit 30_372
-bit 30_373
-bit 30_374
-bit 30_375
-bit 30_376
-bit 30_377
-bit 30_378
-bit 30_379
-bit 30_384
-bit 30_386
-bit 30_390
-bit 30_391
-bit 30_392
-bit 30_393
-bit 30_394
-bit 30_395
-bit 30_396
-bit 30_397
-bit 30_398
-bit 30_399
-bit 30_400
-bit 30_401
-bit 30_402
-bit 30_403
-bit 30_404
-bit 30_405
-bit 30_406
-bit 30_407
-bit 30_408
-bit 30_409
-bit 30_410
-bit 30_411
-bit 30_412
-bit 30_413
-bit 30_416
-bit 30_417
-bit 30_418
-bit 30_419
-bit 30_424
-bit 30_425
-bit 30_426
-bit 30_427
-bit 30_428
-bit 30_429
-bit 30_430
-bit 30_431
-bit 30_432
-bit 30_433
-bit 30_434
-bit 30_435
-bit 30_436
-bit 30_437
-bit 30_438
-bit 30_439
-bit 30_440
-bit 30_441
-bit 30_442
-bit 30_443
-bit 30_459
-bit 30_460
-bit 30_461
-bit 30_462
-bit 30_463
-bit 30_464
-bit 30_465
-bit 30_466
-bit 30_467
-bit 30_468
-bit 30_469
-bit 30_470
-bit 30_471
-bit 30_472
-bit 30_473
-bit 30_488
-bit 30_489
-bit 30_490
-bit 30_491
-bit 30_496
-bit 30_497
-bit 30_498
-bit 30_504
-bit 30_505
-bit 30_506
-bit 30_507
-bit 30_508
-bit 30_509
-bit 30_510
-bit 30_511
-bit 30_512
-bit 30_513
-bit 30_514
-bit 30_515
-bit 30_516
-bit 30_517
-bit 30_518
-bit 30_519
-bit 30_520
-bit 30_521
-bit 30_522
-bit 30_523
-bit 30_524
-bit 30_525
-bit 30_526
-bit 30_527
-bit 30_528
-bit 30_529
-bit 30_530
-bit 30_531
-bit 30_532
-bit 30_533
-bit 30_534
-bit 30_535
-bit 30_536
-bit 30_537
-bit 30_538
-bit 30_544
-bit 30_545
-bit 30_546
-bit 30_547
-bit 30_548
-bit 30_552
-bit 30_553
-bit 30_554
-bit 30_555
-bit 30_556
-bit 30_557
-bit 30_558
-bit 30_559
-bit 30_560
-bit 30_561
-bit 30_568
-bit 30_569
-bit 30_570
-bit 30_571
-bit 30_572
-bit 30_576
-bit 30_577
-bit 30_578
-bit 30_579
-bit 30_580
-bit 30_584
-bit 30_585
-bit 30_586
-bit 30_587
-bit 30_588
-bit 30_589
-bit 30_590
-bit 30_591
-bit 30_592
-bit 30_593
-bit 30_594
-bit 30_595
-bit 30_600
-bit 30_601
-bit 30_602
-bit 30_603
-bit 30_604
-bit 30_605
-bit 30_606
-bit 30_607
-bit 30_608
-bit 30_609
-bit 30_610
-bit 30_611
-bit 30_616
-bit 30_617
-bit 30_618
-bit 30_619
-bit 30_620
-bit 30_621
-bit 30_622
-bit 30_624
-bit 30_625
-bit 30_626
-bit 30_627
-bit 30_628
-bit 30_632
-bit 30_633
-bit 30_634
-bit 30_638
-bit 30_640
-bit 30_641
-bit 30_642
-bit 30_643
-bit 30_644
-bit 30_645
-bit 30_646
-bit 30_647
-bit 30_648
-bit 30_649
-bit 30_650
-bit 30_651
-bit 30_652
-bit 30_653
-bit 30_654
-bit 30_655
-bit 30_656
-bit 30_657
-bit 30_658
-bit 30_659
-bit 30_660
-bit 30_661
-bit 30_662
-bit 30_663
-bit 30_664
-bit 30_665
-bit 30_666
-bit 30_667
-bit 30_668
-bit 30_669
-bit 30_670
-bit 30_671
-bit 30_672
-bit 30_673
-bit 30_674
-bit 30_675
-bit 30_676
-bit 30_677
-bit 30_678
-bit 30_679
-bit 30_680
-bit 30_681
-bit 31_01
-bit 31_04
-bit 31_11
-bit 31_13
-bit 31_20
-bit 31_23
-bit 31_40
-bit 31_41
-bit 31_42
-bit 31_43
-bit 31_44
-bit 31_55
-bit 31_64
-bit 31_65
-bit 31_66
-bit 31_67
-bit 31_68
-bit 31_69
-bit 31_70
-bit 31_71
-bit 31_72
-bit 31_73
-bit 31_74
-bit 31_75
-bit 31_80
-bit 31_81
-bit 31_82
-bit 31_83
-bit 31_84
-bit 31_85
-bit 31_86
-bit 31_87
-bit 31_88
-bit 31_89
-bit 31_90
-bit 31_91
-bit 31_92
-bit 31_93
-bit 31_94
-bit 31_95
-bit 31_96
-bit 31_97
-bit 31_98
-bit 31_99
-bit 31_100
-bit 31_101
-bit 31_102
-bit 31_103
-bit 31_108
-bit 31_109
-bit 31_112
-bit 31_113
-bit 31_114
-bit 31_115
-bit 31_116
-bit 31_117
-bit 31_118
-bit 31_119
-bit 31_128
-bit 31_129
-bit 31_136
-bit 31_137
-bit 31_138
-bit 31_139
-bit 31_140
-bit 31_141
-bit 31_142
-bit 31_144
-bit 31_145
-bit 31_150
-bit 31_151
-bit 31_152
-bit 31_156
-bit 31_157
-bit 31_159
-bit 31_184
-bit 31_185
-bit 31_186
-bit 31_187
-bit 31_188
-bit 31_189
-bit 31_190
-bit 31_191
-bit 31_192
-bit 31_193
-bit 31_194
-bit 31_195
-bit 31_196
-bit 31_197
-bit 31_198
-bit 31_199
-bit 31_200
-bit 31_201
-bit 31_202
-bit 31_203
-bit 31_204
-bit 31_205
-bit 31_206
-bit 31_207
-bit 31_232
-bit 31_233
-bit 31_234
-bit 31_236
-bit 31_237
-bit 31_238
-bit 31_240
-bit 31_241
-bit 31_242
-bit 31_244
-bit 31_245
-bit 31_246
-bit 31_248
-bit 31_249
-bit 31_250
-bit 31_252
-bit 31_253
-bit 31_254
-bit 31_256
-bit 31_257
-bit 31_258
-bit 31_260
-bit 31_261
-bit 31_262
-bit 31_264
-bit 31_265
-bit 31_266
-bit 31_268
-bit 31_269
-bit 31_270
-bit 31_272
-bit 31_273
-bit 31_274
-bit 31_276
-bit 31_277
-bit 31_278
-bit 31_288
-bit 31_289
-bit 31_292
-bit 31_296
-bit 31_297
-bit 31_298
-bit 31_299
-bit 31_300
-bit 31_301
-bit 31_302
-bit 31_303
-bit 31_304
-bit 31_305
-bit 31_311
-bit 31_328
-bit 31_329
-bit 31_336
-bit 31_337
-bit 31_338
-bit 31_339
-bit 31_340
-bit 31_341
-bit 31_342
-bit 31_343
-bit 31_344
-bit 31_345
-bit 31_346
-bit 31_347
-bit 31_348
-bit 31_349
-bit 31_350
-bit 31_351
-bit 31_368
-bit 31_369
-bit 31_370
-bit 31_371
-bit 31_372
-bit 31_373
-bit 31_374
-bit 31_375
-bit 31_376
-bit 31_377
-bit 31_378
-bit 31_379
-bit 31_384
-bit 31_386
-bit 31_389
-bit 31_390
-bit 31_391
-bit 31_392
-bit 31_393
-bit 31_394
-bit 31_395
-bit 31_396
-bit 31_397
-bit 31_398
-bit 31_399
-bit 31_400
-bit 31_401
-bit 31_402
-bit 31_403
-bit 31_404
-bit 31_405
-bit 31_406
-bit 31_407
-bit 31_408
-bit 31_409
-bit 31_410
-bit 31_411
-bit 31_412
-bit 31_416
-bit 31_417
-bit 31_418
-bit 31_424
-bit 31_425
-bit 31_426
-bit 31_427
-bit 31_428
-bit 31_429
-bit 31_430
-bit 31_431
-bit 31_432
-bit 31_433
-bit 31_434
-bit 31_435
-bit 31_436
-bit 31_437
-bit 31_438
-bit 31_439
-bit 31_440
-bit 31_441
-bit 31_442
-bit 31_443
-bit 31_459
-bit 31_460
-bit 31_461
-bit 31_463
-bit 31_464
-bit 31_465
-bit 31_466
-bit 31_467
-bit 31_468
-bit 31_469
-bit 31_470
-bit 31_471
-bit 31_472
-bit 31_473
-bit 31_488
-bit 31_489
-bit 31_490
-bit 31_491
-bit 31_496
-bit 31_497
-bit 31_498
-bit 31_504
-bit 31_505
-bit 31_506
-bit 31_507
-bit 31_508
-bit 31_509
-bit 31_510
-bit 31_511
-bit 31_512
-bit 31_513
-bit 31_514
-bit 31_515
-bit 31_516
-bit 31_517
-bit 31_518
-bit 31_519
-bit 31_520
-bit 31_521
-bit 31_522
-bit 31_523
-bit 31_524
-bit 31_525
-bit 31_526
-bit 31_527
-bit 31_528
-bit 31_529
-bit 31_530
-bit 31_531
-bit 31_532
-bit 31_533
-bit 31_534
-bit 31_535
-bit 31_536
-bit 31_537
-bit 31_538
-bit 31_544
-bit 31_545
-bit 31_546
-bit 31_552
-bit 31_553
-bit 31_554
-bit 31_555
-bit 31_556
-bit 31_557
-bit 31_558
-bit 31_559
-bit 31_560
-bit 31_568
-bit 31_569
-bit 31_570
-bit 31_571
-bit 31_576
-bit 31_577
-bit 31_578
-bit 31_579
-bit 31_584
-bit 31_585
-bit 31_586
-bit 31_587
-bit 31_588
-bit 31_589
-bit 31_590
-bit 31_591
-bit 31_592
-bit 31_593
-bit 31_594
-bit 31_595
-bit 31_600
-bit 31_601
-bit 31_602
-bit 31_603
-bit 31_604
-bit 31_605
-bit 31_606
-bit 31_607
-bit 31_608
-bit 31_609
-bit 31_610
-bit 31_611
-bit 31_616
-bit 31_617
-bit 31_618
-bit 31_619
-bit 31_620
-bit 31_621
-bit 31_622
-bit 31_624
-bit 31_625
-bit 31_626
-bit 31_627
-bit 31_628
-bit 31_632
-bit 31_633
-bit 31_634
-bit 31_637
-bit 31_638
-bit 31_640
-bit 31_641
-bit 31_642
-bit 31_643
-bit 31_644
-bit 31_645
-bit 31_646
-bit 31_647
-bit 31_648
-bit 31_649
-bit 31_650
-bit 31_651
-bit 31_652
-bit 31_653
-bit 31_654
-bit 31_655
-bit 31_656
-bit 31_657
-bit 31_658
-bit 31_659
-bit 31_660
-bit 31_661
-bit 31_662
-bit 31_663
-bit 31_664
-bit 31_665
-bit 31_666
-bit 31_667
-bit 31_668
-bit 31_669
-bit 31_670
-bit 31_671
-bit 31_672
-bit 31_673
-bit 31_674
-bit 31_675
-bit 31_676
-bit 31_677
-bit 31_678
-bit 31_679
-bit 31_680

diff --git a/artix7/mask_gtp_channel_0_mid_right.db b/artix7/mask_gtp_channel_0_mid_right.db
index c576c8c..6f48b45 100644
--- a/artix7/mask_gtp_channel_0_mid_right.db
+++ b/artix7/mask_gtp_channel_0_mid_right.db

@@ -1632,1637 +1632,3 @@
 bit 03_678
 bit 03_679
 bit 03_680
-bit 28_00
-bit 28_01
-bit 28_07
-bit 28_47
-bit 28_52
-bit 28_53
-bit 28_65
-bit 28_102
-bit 28_103
-bit 28_104
-bit 28_105
-bit 28_106
-bit 28_107
-bit 28_108
-bit 28_109
-bit 28_110
-bit 28_111
-bit 28_112
-bit 28_113
-bit 28_114
-bit 28_115
-bit 28_116
-bit 28_117
-bit 28_124
-bit 28_125
-bit 28_128
-bit 28_129
-bit 28_130
-bit 28_131
-bit 28_132
-bit 28_133
-bit 28_134
-bit 28_135
-bit 28_136
-bit 28_138
-bit 28_139
-bit 28_140
-bit 28_141
-bit 28_142
-bit 28_143
-bit 28_144
-bit 28_145
-bit 28_146
-bit 28_147
-bit 28_148
-bit 28_149
-bit 28_150
-bit 28_151
-bit 28_152
-bit 28_153
-bit 28_154
-bit 28_155
-bit 28_156
-bit 28_157
-bit 28_158
-bit 28_159
-bit 28_160
-bit 28_161
-bit 28_162
-bit 28_163
-bit 28_164
-bit 28_165
-bit 28_168
-bit 28_169
-bit 28_170
-bit 28_171
-bit 28_172
-bit 28_173
-bit 28_174
-bit 28_176
-bit 28_177
-bit 28_178
-bit 28_179
-bit 28_180
-bit 28_181
-bit 28_187
-bit 28_188
-bit 28_189
-bit 28_190
-bit 28_191
-bit 28_192
-bit 28_193
-bit 28_194
-bit 28_195
-bit 28_200
-bit 28_203
-bit 28_204
-bit 28_205
-bit 28_206
-bit 28_208
-bit 28_209
-bit 28_210
-bit 28_211
-bit 28_212
-bit 28_213
-bit 28_214
-bit 28_215
-bit 28_216
-bit 28_217
-bit 28_218
-bit 28_219
-bit 28_220
-bit 28_221
-bit 28_222
-bit 28_224
-bit 28_225
-bit 28_231
-bit 28_247
-bit 28_288
-bit 28_289
-bit 28_290
-bit 28_291
-bit 28_292
-bit 28_293
-bit 28_294
-bit 28_336
-bit 28_337
-bit 28_338
-bit 28_339
-bit 28_340
-bit 28_341
-bit 28_342
-bit 28_343
-bit 28_344
-bit 28_345
-bit 28_346
-bit 28_347
-bit 28_348
-bit 28_349
-bit 28_350
-bit 28_351
-bit 28_352
-bit 28_353
-bit 28_354
-bit 28_355
-bit 28_356
-bit 28_357
-bit 28_358
-bit 28_359
-bit 28_360
-bit 28_361
-bit 28_362
-bit 28_363
-bit 28_364
-bit 28_365
-bit 28_366
-bit 28_367
-bit 28_368
-bit 28_369
-bit 28_370
-bit 28_371
-bit 28_372
-bit 28_373
-bit 28_374
-bit 28_375
-bit 28_376
-bit 28_377
-bit 28_378
-bit 28_379
-bit 28_380
-bit 28_381
-bit 28_382
-bit 28_383
-bit 28_384
-bit 28_385
-bit 28_386
-bit 28_387
-bit 28_388
-bit 28_389
-bit 28_390
-bit 28_391
-bit 28_392
-bit 28_393
-bit 28_394
-bit 28_395
-bit 28_396
-bit 28_397
-bit 28_398
-bit 28_399
-bit 28_400
-bit 28_401
-bit 28_402
-bit 28_403
-bit 28_404
-bit 28_405
-bit 28_406
-bit 28_407
-bit 28_408
-bit 28_409
-bit 28_410
-bit 28_411
-bit 28_412
-bit 28_413
-bit 28_414
-bit 28_415
-bit 28_416
-bit 28_417
-bit 28_418
-bit 28_419
-bit 28_420
-bit 28_421
-bit 28_422
-bit 28_423
-bit 28_424
-bit 28_425
-bit 28_426
-bit 28_427
-bit 28_428
-bit 28_429
-bit 28_430
-bit 28_431
-bit 28_432
-bit 28_433
-bit 28_434
-bit 28_435
-bit 28_436
-bit 28_437
-bit 28_438
-bit 28_439
-bit 28_440
-bit 28_441
-bit 28_442
-bit 28_443
-bit 28_444
-bit 28_445
-bit 28_446
-bit 28_447
-bit 28_448
-bit 28_449
-bit 28_450
-bit 28_451
-bit 28_452
-bit 28_453
-bit 28_454
-bit 28_455
-bit 28_456
-bit 28_457
-bit 28_458
-bit 28_459
-bit 28_460
-bit 28_461
-bit 28_462
-bit 28_463
-bit 28_464
-bit 28_465
-bit 28_466
-bit 28_467
-bit 28_468
-bit 28_469
-bit 28_470
-bit 28_471
-bit 28_472
-bit 28_473
-bit 28_474
-bit 28_475
-bit 28_476
-bit 28_478
-bit 28_479
-bit 28_480
-bit 28_481
-bit 28_482
-bit 28_483
-bit 28_484
-bit 28_485
-bit 28_488
-bit 28_489
-bit 28_490
-bit 28_492
-bit 28_494
-bit 28_495
-bit 28_496
-bit 28_497
-bit 28_498
-bit 28_499
-bit 28_500
-bit 28_504
-bit 28_505
-bit 28_506
-bit 28_507
-bit 28_508
-bit 28_512
-bit 28_513
-bit 28_514
-bit 28_515
-bit 28_516
-bit 28_519
-bit 28_520
-bit 28_521
-bit 28_522
-bit 28_523
-bit 28_524
-bit 28_525
-bit 28_526
-bit 28_527
-bit 28_544
-bit 28_545
-bit 28_546
-bit 28_547
-bit 28_548
-bit 28_549
-bit 28_550
-bit 28_551
-bit 28_552
-bit 28_553
-bit 28_554
-bit 28_555
-bit 28_556
-bit 28_557
-bit 28_558
-bit 28_559
-bit 28_560
-bit 28_561
-bit 28_562
-bit 28_563
-bit 28_564
-bit 28_565
-bit 28_566
-bit 28_567
-bit 28_568
-bit 28_569
-bit 28_570
-bit 28_571
-bit 28_572
-bit 28_573
-bit 28_574
-bit 28_575
-bit 28_576
-bit 28_577
-bit 28_578
-bit 28_579
-bit 28_580
-bit 28_581
-bit 28_582
-bit 28_583
-bit 28_584
-bit 28_585
-bit 28_586
-bit 28_587
-bit 28_588
-bit 28_589
-bit 28_590
-bit 28_591
-bit 28_592
-bit 28_593
-bit 28_594
-bit 28_595
-bit 28_596
-bit 28_600
-bit 28_601
-bit 28_602
-bit 28_603
-bit 28_604
-bit 28_608
-bit 28_609
-bit 28_610
-bit 28_611
-bit 28_612
-bit 28_614
-bit 28_615
-bit 28_616
-bit 28_617
-bit 28_618
-bit 28_619
-bit 28_620
-bit 28_623
-bit 28_624
-bit 28_625
-bit 28_626
-bit 28_627
-bit 28_628
-bit 28_632
-bit 28_633
-bit 28_634
-bit 28_635
-bit 28_636
-bit 28_640
-bit 28_641
-bit 28_642
-bit 28_643
-bit 28_644
-bit 28_646
-bit 28_647
-bit 28_648
-bit 28_649
-bit 28_650
-bit 28_651
-bit 28_652
-bit 28_654
-bit 28_655
-bit 28_656
-bit 28_657
-bit 28_658
-bit 28_659
-bit 28_660
-bit 28_662
-bit 28_663
-bit 28_664
-bit 28_665
-bit 28_666
-bit 28_667
-bit 28_668
-bit 28_670
-bit 28_671
-bit 28_672
-bit 28_673
-bit 28_674
-bit 28_675
-bit 28_676
-bit 28_677
-bit 28_678
-bit 28_679
-bit 28_680
-bit 28_681
-bit 28_682
-bit 28_683
-bit 28_684
-bit 28_685
-bit 28_686
-bit 28_687
-bit 28_696
-bit 28_697
-bit 28_698
-bit 28_700
-bit 28_701
-bit 28_702
-bit 29_00
-bit 29_01
-bit 29_06
-bit 29_07
-bit 29_47
-bit 29_101
-bit 29_102
-bit 29_103
-bit 29_104
-bit 29_105
-bit 29_106
-bit 29_107
-bit 29_108
-bit 29_109
-bit 29_110
-bit 29_112
-bit 29_113
-bit 29_114
-bit 29_115
-bit 29_116
-bit 29_117
-bit 29_123
-bit 29_124
-bit 29_125
-bit 29_128
-bit 29_129
-bit 29_130
-bit 29_131
-bit 29_132
-bit 29_133
-bit 29_134
-bit 29_135
-bit 29_138
-bit 29_139
-bit 29_140
-bit 29_141
-bit 29_142
-bit 29_144
-bit 29_145
-bit 29_146
-bit 29_147
-bit 29_148
-bit 29_149
-bit 29_150
-bit 29_151
-bit 29_152
-bit 29_153
-bit 29_154
-bit 29_155
-bit 29_156
-bit 29_157
-bit 29_158
-bit 29_160
-bit 29_161
-bit 29_162
-bit 29_163
-bit 29_164
-bit 29_165
-bit 29_168
-bit 29_169
-bit 29_170
-bit 29_171
-bit 29_172
-bit 29_173
-bit 29_176
-bit 29_177
-bit 29_178
-bit 29_179
-bit 29_180
-bit 29_181
-bit 29_187
-bit 29_188
-bit 29_189
-bit 29_190
-bit 29_191
-bit 29_192
-bit 29_193
-bit 29_194
-bit 29_195
-bit 29_202
-bit 29_203
-bit 29_204
-bit 29_205
-bit 29_207
-bit 29_208
-bit 29_209
-bit 29_210
-bit 29_211
-bit 29_212
-bit 29_213
-bit 29_214
-bit 29_215
-bit 29_216
-bit 29_217
-bit 29_218
-bit 29_219
-bit 29_220
-bit 29_221
-bit 29_224
-bit 29_226
-bit 29_231
-bit 29_288
-bit 29_289
-bit 29_290
-bit 29_291
-bit 29_292
-bit 29_293
-bit 29_336
-bit 29_337
-bit 29_338
-bit 29_339
-bit 29_340
-bit 29_341
-bit 29_342
-bit 29_343
-bit 29_344
-bit 29_345
-bit 29_346
-bit 29_347
-bit 29_348
-bit 29_349
-bit 29_350
-bit 29_351
-bit 29_352
-bit 29_353
-bit 29_354
-bit 29_355
-bit 29_356
-bit 29_357
-bit 29_358
-bit 29_359
-bit 29_360
-bit 29_361
-bit 29_362
-bit 29_363
-bit 29_364
-bit 29_365
-bit 29_366
-bit 29_367
-bit 29_368
-bit 29_369
-bit 29_370
-bit 29_371
-bit 29_372
-bit 29_373
-bit 29_374
-bit 29_375
-bit 29_376
-bit 29_377
-bit 29_378
-bit 29_379
-bit 29_380
-bit 29_381
-bit 29_382
-bit 29_383
-bit 29_384
-bit 29_385
-bit 29_386
-bit 29_387
-bit 29_388
-bit 29_389
-bit 29_390
-bit 29_391
-bit 29_392
-bit 29_393
-bit 29_394
-bit 29_395
-bit 29_396
-bit 29_397
-bit 29_398
-bit 29_399
-bit 29_400
-bit 29_401
-bit 29_402
-bit 29_403
-bit 29_404
-bit 29_405
-bit 29_406
-bit 29_407
-bit 29_408
-bit 29_409
-bit 29_410
-bit 29_411
-bit 29_412
-bit 29_413
-bit 29_414
-bit 29_415
-bit 29_416
-bit 29_417
-bit 29_418
-bit 29_419
-bit 29_420
-bit 29_421
-bit 29_422
-bit 29_423
-bit 29_424
-bit 29_425
-bit 29_426
-bit 29_427
-bit 29_428
-bit 29_429
-bit 29_430
-bit 29_431
-bit 29_432
-bit 29_433
-bit 29_434
-bit 29_435
-bit 29_436
-bit 29_437
-bit 29_438
-bit 29_439
-bit 29_440
-bit 29_441
-bit 29_442
-bit 29_443
-bit 29_444
-bit 29_445
-bit 29_446
-bit 29_447
-bit 29_448
-bit 29_449
-bit 29_450
-bit 29_451
-bit 29_452
-bit 29_453
-bit 29_454
-bit 29_455
-bit 29_456
-bit 29_457
-bit 29_458
-bit 29_459
-bit 29_460
-bit 29_461
-bit 29_462
-bit 29_463
-bit 29_464
-bit 29_465
-bit 29_466
-bit 29_467
-bit 29_468
-bit 29_469
-bit 29_470
-bit 29_471
-bit 29_472
-bit 29_473
-bit 29_474
-bit 29_475
-bit 29_477
-bit 29_478
-bit 29_479
-bit 29_480
-bit 29_481
-bit 29_482
-bit 29_483
-bit 29_484
-bit 29_485
-bit 29_488
-bit 29_489
-bit 29_490
-bit 29_492
-bit 29_494
-bit 29_495
-bit 29_496
-bit 29_497
-bit 29_498
-bit 29_499
-bit 29_500
-bit 29_504
-bit 29_505
-bit 29_506
-bit 29_507
-bit 29_508
-bit 29_512
-bit 29_513
-bit 29_514
-bit 29_515
-bit 29_516
-bit 29_519
-bit 29_520
-bit 29_521
-bit 29_522
-bit 29_523
-bit 29_524
-bit 29_525
-bit 29_526
-bit 29_544
-bit 29_545
-bit 29_546
-bit 29_547
-bit 29_548
-bit 29_549
-bit 29_550
-bit 29_552
-bit 29_553
-bit 29_554
-bit 29_555
-bit 29_556
-bit 29_557
-bit 29_558
-bit 29_559
-bit 29_560
-bit 29_561
-bit 29_562
-bit 29_563
-bit 29_564
-bit 29_565
-bit 29_566
-bit 29_567
-bit 29_568
-bit 29_569
-bit 29_570
-bit 29_571
-bit 29_572
-bit 29_573
-bit 29_574
-bit 29_576
-bit 29_577
-bit 29_578
-bit 29_579
-bit 29_580
-bit 29_581
-bit 29_582
-bit 29_584
-bit 29_585
-bit 29_586
-bit 29_587
-bit 29_588
-bit 29_589
-bit 29_592
-bit 29_593
-bit 29_594
-bit 29_595
-bit 29_596
-bit 29_600
-bit 29_601
-bit 29_602
-bit 29_603
-bit 29_604
-bit 29_607
-bit 29_608
-bit 29_609
-bit 29_610
-bit 29_611
-bit 29_612
-bit 29_614
-bit 29_615
-bit 29_616
-bit 29_617
-bit 29_618
-bit 29_619
-bit 29_620
-bit 29_623
-bit 29_624
-bit 29_625
-bit 29_626
-bit 29_627
-bit 29_628
-bit 29_631
-bit 29_632
-bit 29_633
-bit 29_634
-bit 29_635
-bit 29_636
-bit 29_640
-bit 29_641
-bit 29_642
-bit 29_643
-bit 29_644
-bit 29_645
-bit 29_646
-bit 29_647
-bit 29_648
-bit 29_649
-bit 29_650
-bit 29_651
-bit 29_652
-bit 29_653
-bit 29_654
-bit 29_655
-bit 29_656
-bit 29_657
-bit 29_658
-bit 29_659
-bit 29_660
-bit 29_661
-bit 29_662
-bit 29_663
-bit 29_664
-bit 29_665
-bit 29_666
-bit 29_667
-bit 29_668
-bit 29_670
-bit 29_671
-bit 29_672
-bit 29_673
-bit 29_674
-bit 29_675
-bit 29_676
-bit 29_677
-bit 29_678
-bit 29_679
-bit 29_680
-bit 29_681
-bit 29_682
-bit 29_683
-bit 29_684
-bit 29_685
-bit 29_686
-bit 29_687
-bit 29_696
-bit 29_697
-bit 29_698
-bit 29_700
-bit 29_701
-bit 30_00
-bit 30_02
-bit 30_03
-bit 30_05
-bit 30_11
-bit 30_13
-bit 30_20
-bit 30_23
-bit 30_40
-bit 30_41
-bit 30_42
-bit 30_43
-bit 30_44
-bit 30_45
-bit 30_55
-bit 30_64
-bit 30_65
-bit 30_66
-bit 30_67
-bit 30_68
-bit 30_69
-bit 30_70
-bit 30_71
-bit 30_72
-bit 30_73
-bit 30_74
-bit 30_75
-bit 30_80
-bit 30_81
-bit 30_82
-bit 30_83
-bit 30_84
-bit 30_85
-bit 30_86
-bit 30_87
-bit 30_88
-bit 30_89
-bit 30_90
-bit 30_91
-bit 30_92
-bit 30_93
-bit 30_94
-bit 30_95
-bit 30_96
-bit 30_97
-bit 30_98
-bit 30_99
-bit 30_100
-bit 30_101
-bit 30_102
-bit 30_103
-bit 30_108
-bit 30_109
-bit 30_110
-bit 30_112
-bit 30_113
-bit 30_114
-bit 30_115
-bit 30_116
-bit 30_117
-bit 30_118
-bit 30_119
-bit 30_128
-bit 30_129
-bit 30_136
-bit 30_137
-bit 30_138
-bit 30_139
-bit 30_140
-bit 30_141
-bit 30_142
-bit 30_143
-bit 30_144
-bit 30_145
-bit 30_146
-bit 30_151
-bit 30_152
-bit 30_153
-bit 30_156
-bit 30_157
-bit 30_184
-bit 30_185
-bit 30_186
-bit 30_187
-bit 30_188
-bit 30_189
-bit 30_190
-bit 30_191
-bit 30_192
-bit 30_193
-bit 30_194
-bit 30_195
-bit 30_196
-bit 30_197
-bit 30_198
-bit 30_199
-bit 30_200
-bit 30_201
-bit 30_202
-bit 30_203
-bit 30_204
-bit 30_205
-bit 30_206
-bit 30_207
-bit 30_232
-bit 30_233
-bit 30_234
-bit 30_235
-bit 30_236
-bit 30_237
-bit 30_238
-bit 30_239
-bit 30_240
-bit 30_241
-bit 30_242
-bit 30_243
-bit 30_244
-bit 30_245
-bit 30_246
-bit 30_247
-bit 30_248
-bit 30_249
-bit 30_250
-bit 30_251
-bit 30_252
-bit 30_253
-bit 30_254
-bit 30_255
-bit 30_256
-bit 30_257
-bit 30_258
-bit 30_259
-bit 30_260
-bit 30_261
-bit 30_262
-bit 30_263
-bit 30_264
-bit 30_265
-bit 30_266
-bit 30_267
-bit 30_268
-bit 30_269
-bit 30_270
-bit 30_271
-bit 30_272
-bit 30_273
-bit 30_274
-bit 30_276
-bit 30_277
-bit 30_278
-bit 30_288
-bit 30_292
-bit 30_293
-bit 30_296
-bit 30_297
-bit 30_298
-bit 30_299
-bit 30_300
-bit 30_301
-bit 30_302
-bit 30_303
-bit 30_304
-bit 30_305
-bit 30_328
-bit 30_329
-bit 30_330
-bit 30_336
-bit 30_337
-bit 30_338
-bit 30_339
-bit 30_340
-bit 30_341
-bit 30_342
-bit 30_343
-bit 30_344
-bit 30_345
-bit 30_346
-bit 30_347
-bit 30_348
-bit 30_349
-bit 30_350
-bit 30_351
-bit 30_368
-bit 30_369
-bit 30_370
-bit 30_371
-bit 30_372
-bit 30_373
-bit 30_374
-bit 30_375
-bit 30_376
-bit 30_377
-bit 30_378
-bit 30_379
-bit 30_384
-bit 30_386
-bit 30_390
-bit 30_391
-bit 30_392
-bit 30_393
-bit 30_394
-bit 30_395
-bit 30_396
-bit 30_397
-bit 30_398
-bit 30_399
-bit 30_400
-bit 30_401
-bit 30_402
-bit 30_403
-bit 30_404
-bit 30_405
-bit 30_406
-bit 30_407
-bit 30_408
-bit 30_409
-bit 30_410
-bit 30_411
-bit 30_412
-bit 30_413
-bit 30_416
-bit 30_417
-bit 30_418
-bit 30_419
-bit 30_424
-bit 30_425
-bit 30_426
-bit 30_427
-bit 30_428
-bit 30_429
-bit 30_430
-bit 30_431
-bit 30_432
-bit 30_433
-bit 30_434
-bit 30_435
-bit 30_436
-bit 30_437
-bit 30_438
-bit 30_439
-bit 30_440
-bit 30_441
-bit 30_442
-bit 30_443
-bit 30_459
-bit 30_460
-bit 30_461
-bit 30_462
-bit 30_463
-bit 30_464
-bit 30_465
-bit 30_466
-bit 30_467
-bit 30_468
-bit 30_469
-bit 30_470
-bit 30_471
-bit 30_472
-bit 30_473
-bit 30_488
-bit 30_489
-bit 30_490
-bit 30_491
-bit 30_496
-bit 30_497
-bit 30_498
-bit 30_504
-bit 30_505
-bit 30_506
-bit 30_507
-bit 30_508
-bit 30_509
-bit 30_510
-bit 30_511
-bit 30_512
-bit 30_513
-bit 30_514
-bit 30_515
-bit 30_516
-bit 30_517
-bit 30_518
-bit 30_519
-bit 30_520
-bit 30_521
-bit 30_522
-bit 30_523
-bit 30_524
-bit 30_525
-bit 30_526
-bit 30_527
-bit 30_528
-bit 30_529
-bit 30_530
-bit 30_531
-bit 30_532
-bit 30_533
-bit 30_534
-bit 30_535
-bit 30_536
-bit 30_537
-bit 30_538
-bit 30_544
-bit 30_545
-bit 30_546
-bit 30_547
-bit 30_548
-bit 30_552
-bit 30_553
-bit 30_554
-bit 30_555
-bit 30_556
-bit 30_557
-bit 30_558
-bit 30_559
-bit 30_560
-bit 30_561
-bit 30_568
-bit 30_569
-bit 30_570
-bit 30_571
-bit 30_572
-bit 30_576
-bit 30_577
-bit 30_578
-bit 30_579
-bit 30_580
-bit 30_584
-bit 30_585
-bit 30_586
-bit 30_587
-bit 30_588
-bit 30_589
-bit 30_590
-bit 30_591
-bit 30_592
-bit 30_593
-bit 30_594
-bit 30_595
-bit 30_600
-bit 30_601
-bit 30_602
-bit 30_603
-bit 30_604
-bit 30_605
-bit 30_606
-bit 30_607
-bit 30_608
-bit 30_609
-bit 30_610
-bit 30_611
-bit 30_616
-bit 30_617
-bit 30_618
-bit 30_619
-bit 30_620
-bit 30_621
-bit 30_622
-bit 30_624
-bit 30_625
-bit 30_626
-bit 30_627
-bit 30_628
-bit 30_632
-bit 30_633
-bit 30_634
-bit 30_638
-bit 30_640
-bit 30_641
-bit 30_642
-bit 30_643
-bit 30_644
-bit 30_645
-bit 30_646
-bit 30_647
-bit 30_648
-bit 30_649
-bit 30_650
-bit 30_651
-bit 30_652
-bit 30_653
-bit 30_654
-bit 30_655
-bit 30_656
-bit 30_657
-bit 30_658
-bit 30_659
-bit 30_660
-bit 30_661
-bit 30_662
-bit 30_663
-bit 30_664
-bit 30_665
-bit 30_666
-bit 30_667
-bit 30_668
-bit 30_669
-bit 30_670
-bit 30_671
-bit 30_672
-bit 30_673
-bit 30_674
-bit 30_675
-bit 30_676
-bit 30_677
-bit 30_678
-bit 30_679
-bit 30_680
-bit 30_681
-bit 31_01
-bit 31_04
-bit 31_11
-bit 31_13
-bit 31_20
-bit 31_23
-bit 31_40
-bit 31_41
-bit 31_42
-bit 31_43
-bit 31_44
-bit 31_55
-bit 31_64
-bit 31_65
-bit 31_66
-bit 31_67
-bit 31_68
-bit 31_69
-bit 31_70
-bit 31_71
-bit 31_72
-bit 31_73
-bit 31_74
-bit 31_75
-bit 31_80
-bit 31_81
-bit 31_82
-bit 31_83
-bit 31_84
-bit 31_85
-bit 31_86
-bit 31_87
-bit 31_88
-bit 31_89
-bit 31_90
-bit 31_91
-bit 31_92
-bit 31_93
-bit 31_94
-bit 31_95
-bit 31_96
-bit 31_97
-bit 31_98
-bit 31_99
-bit 31_100
-bit 31_101
-bit 31_102
-bit 31_103
-bit 31_108
-bit 31_109
-bit 31_112
-bit 31_113
-bit 31_114
-bit 31_115
-bit 31_116
-bit 31_117
-bit 31_118
-bit 31_119
-bit 31_128
-bit 31_129
-bit 31_136
-bit 31_137
-bit 31_138
-bit 31_139
-bit 31_140
-bit 31_141
-bit 31_142
-bit 31_144
-bit 31_145
-bit 31_150
-bit 31_151
-bit 31_152
-bit 31_156
-bit 31_157
-bit 31_159
-bit 31_184
-bit 31_185
-bit 31_186
-bit 31_187
-bit 31_188
-bit 31_189
-bit 31_190
-bit 31_191
-bit 31_192
-bit 31_193
-bit 31_194
-bit 31_195
-bit 31_196
-bit 31_197
-bit 31_198
-bit 31_199
-bit 31_200
-bit 31_201
-bit 31_202
-bit 31_203
-bit 31_204
-bit 31_205
-bit 31_206
-bit 31_207
-bit 31_232
-bit 31_233
-bit 31_234
-bit 31_236
-bit 31_237
-bit 31_238
-bit 31_240
-bit 31_241
-bit 31_242
-bit 31_244
-bit 31_245
-bit 31_246
-bit 31_248
-bit 31_249
-bit 31_250
-bit 31_252
-bit 31_253
-bit 31_254
-bit 31_256
-bit 31_257
-bit 31_258
-bit 31_260
-bit 31_261
-bit 31_262
-bit 31_264
-bit 31_265
-bit 31_266
-bit 31_268
-bit 31_269
-bit 31_270
-bit 31_272
-bit 31_273
-bit 31_274
-bit 31_276
-bit 31_277
-bit 31_278
-bit 31_288
-bit 31_289
-bit 31_292
-bit 31_296
-bit 31_297
-bit 31_298
-bit 31_299
-bit 31_300
-bit 31_301
-bit 31_302
-bit 31_303
-bit 31_304
-bit 31_305
-bit 31_311
-bit 31_328
-bit 31_329
-bit 31_336
-bit 31_337
-bit 31_338
-bit 31_339
-bit 31_340
-bit 31_341
-bit 31_342
-bit 31_343
-bit 31_344
-bit 31_345
-bit 31_346
-bit 31_347
-bit 31_348
-bit 31_349
-bit 31_350
-bit 31_351
-bit 31_368
-bit 31_369
-bit 31_370
-bit 31_371
-bit 31_372
-bit 31_373
-bit 31_374
-bit 31_375
-bit 31_376
-bit 31_377
-bit 31_378
-bit 31_379
-bit 31_384
-bit 31_386
-bit 31_389
-bit 31_390
-bit 31_391
-bit 31_392
-bit 31_393
-bit 31_394
-bit 31_395
-bit 31_396
-bit 31_397
-bit 31_398
-bit 31_399
-bit 31_400
-bit 31_401
-bit 31_402
-bit 31_403
-bit 31_404
-bit 31_405
-bit 31_406
-bit 31_407
-bit 31_408
-bit 31_409
-bit 31_410
-bit 31_411
-bit 31_412
-bit 31_416
-bit 31_417
-bit 31_418
-bit 31_424
-bit 31_425
-bit 31_426
-bit 31_427
-bit 31_428
-bit 31_429
-bit 31_430
-bit 31_431
-bit 31_432
-bit 31_433
-bit 31_434
-bit 31_435
-bit 31_436
-bit 31_437
-bit 31_438
-bit 31_439
-bit 31_440
-bit 31_441
-bit 31_442
-bit 31_443
-bit 31_459
-bit 31_460
-bit 31_461
-bit 31_463
-bit 31_464
-bit 31_465
-bit 31_466
-bit 31_467
-bit 31_468
-bit 31_469
-bit 31_470
-bit 31_471
-bit 31_472
-bit 31_473
-bit 31_488
-bit 31_489
-bit 31_490
-bit 31_491
-bit 31_496
-bit 31_497
-bit 31_498
-bit 31_504
-bit 31_505
-bit 31_506
-bit 31_507
-bit 31_508
-bit 31_509
-bit 31_510
-bit 31_511
-bit 31_512
-bit 31_513
-bit 31_514
-bit 31_515
-bit 31_516
-bit 31_517
-bit 31_518
-bit 31_519
-bit 31_520
-bit 31_521
-bit 31_522
-bit 31_523
-bit 31_524
-bit 31_525
-bit 31_526
-bit 31_527
-bit 31_528
-bit 31_529
-bit 31_530
-bit 31_531
-bit 31_532
-bit 31_533
-bit 31_534
-bit 31_535
-bit 31_536
-bit 31_537
-bit 31_538
-bit 31_544
-bit 31_545
-bit 31_546
-bit 31_552
-bit 31_553
-bit 31_554
-bit 31_555
-bit 31_556
-bit 31_557
-bit 31_558
-bit 31_559
-bit 31_560
-bit 31_568
-bit 31_569
-bit 31_570
-bit 31_571
-bit 31_576
-bit 31_577
-bit 31_578
-bit 31_579
-bit 31_584
-bit 31_585
-bit 31_586
-bit 31_587
-bit 31_588
-bit 31_589
-bit 31_590
-bit 31_591
-bit 31_592
-bit 31_593
-bit 31_594
-bit 31_595
-bit 31_600
-bit 31_601
-bit 31_602
-bit 31_603
-bit 31_604
-bit 31_605
-bit 31_606
-bit 31_607
-bit 31_608
-bit 31_609
-bit 31_610
-bit 31_611
-bit 31_616
-bit 31_617
-bit 31_618
-bit 31_619
-bit 31_620
-bit 31_621
-bit 31_622
-bit 31_624
-bit 31_625
-bit 31_626
-bit 31_627
-bit 31_628
-bit 31_632
-bit 31_633
-bit 31_634
-bit 31_637
-bit 31_638
-bit 31_640
-bit 31_641
-bit 31_642
-bit 31_643
-bit 31_644
-bit 31_645
-bit 31_646
-bit 31_647
-bit 31_648
-bit 31_649
-bit 31_650
-bit 31_651
-bit 31_652
-bit 31_653
-bit 31_654
-bit 31_655
-bit 31_656
-bit 31_657
-bit 31_658
-bit 31_659
-bit 31_660
-bit 31_661
-bit 31_662
-bit 31_663
-bit 31_664
-bit 31_665
-bit 31_666
-bit 31_667
-bit 31_668
-bit 31_669
-bit 31_670
-bit 31_671
-bit 31_672
-bit 31_673
-bit 31_674
-bit 31_675
-bit 31_676
-bit 31_677
-bit 31_678
-bit 31_679
-bit 31_680

diff --git a/artix7/mask_gtp_channel_1.db b/artix7/mask_gtp_channel_1.db
index c576c8c..47663d6 100644
--- a/artix7/mask_gtp_channel_1.db
+++ b/artix7/mask_gtp_channel_1.db

@@ -1,1637 +1,3 @@
-bit 00_00
-bit 00_01
-bit 00_07
-bit 00_47
-bit 00_52
-bit 00_53
-bit 00_65
-bit 00_102
-bit 00_103
-bit 00_104
-bit 00_105
-bit 00_106
-bit 00_107
-bit 00_108
-bit 00_109
-bit 00_110
-bit 00_111
-bit 00_112
-bit 00_113
-bit 00_114
-bit 00_115
-bit 00_116
-bit 00_117
-bit 00_124
-bit 00_125
-bit 00_128
-bit 00_129
-bit 00_130
-bit 00_131
-bit 00_132
-bit 00_133
-bit 00_134
-bit 00_135
-bit 00_136
-bit 00_138
-bit 00_139
-bit 00_140
-bit 00_141
-bit 00_142
-bit 00_143
-bit 00_144
-bit 00_145
-bit 00_146
-bit 00_147
-bit 00_148
-bit 00_149
-bit 00_150
-bit 00_151
-bit 00_152
-bit 00_153
-bit 00_154
-bit 00_155
-bit 00_156
-bit 00_157
-bit 00_158
-bit 00_159
-bit 00_160
-bit 00_161
-bit 00_162
-bit 00_163
-bit 00_164
-bit 00_165
-bit 00_168
-bit 00_169
-bit 00_170
-bit 00_171
-bit 00_172
-bit 00_173
-bit 00_174
-bit 00_176
-bit 00_177
-bit 00_178
-bit 00_179
-bit 00_180
-bit 00_181
-bit 00_187
-bit 00_188
-bit 00_189
-bit 00_190
-bit 00_191
-bit 00_192
-bit 00_193
-bit 00_194
-bit 00_195
-bit 00_200
-bit 00_203
-bit 00_204
-bit 00_205
-bit 00_206
-bit 00_208
-bit 00_209
-bit 00_210
-bit 00_211
-bit 00_212
-bit 00_213
-bit 00_214
-bit 00_215
-bit 00_216
-bit 00_217
-bit 00_218
-bit 00_219
-bit 00_220
-bit 00_221
-bit 00_222
-bit 00_224
-bit 00_225
-bit 00_231
-bit 00_247
-bit 00_288
-bit 00_289
-bit 00_290
-bit 00_291
-bit 00_292
-bit 00_293
-bit 00_294
-bit 00_336
-bit 00_337
-bit 00_338
-bit 00_339
-bit 00_340
-bit 00_341
-bit 00_342
-bit 00_343
-bit 00_344
-bit 00_345
-bit 00_346
-bit 00_347
-bit 00_348
-bit 00_349
-bit 00_350
-bit 00_351
-bit 00_352
-bit 00_353
-bit 00_354
-bit 00_355
-bit 00_356
-bit 00_357
-bit 00_358
-bit 00_359
-bit 00_360
-bit 00_361
-bit 00_362
-bit 00_363
-bit 00_364
-bit 00_365
-bit 00_366
-bit 00_367
-bit 00_368
-bit 00_369
-bit 00_370
-bit 00_371
-bit 00_372
-bit 00_373
-bit 00_374
-bit 00_375
-bit 00_376
-bit 00_377
-bit 00_378
-bit 00_379
-bit 00_380
-bit 00_381
-bit 00_382
-bit 00_383
-bit 00_384
-bit 00_385
-bit 00_386
-bit 00_387
-bit 00_388
-bit 00_389
-bit 00_390
-bit 00_391
-bit 00_392
-bit 00_393
-bit 00_394
-bit 00_395
-bit 00_396
-bit 00_397
-bit 00_398
-bit 00_399
-bit 00_400
-bit 00_401
-bit 00_402
-bit 00_403
-bit 00_404
-bit 00_405
-bit 00_406
-bit 00_407
-bit 00_408
-bit 00_409
-bit 00_410
-bit 00_411
-bit 00_412
-bit 00_413
-bit 00_414
-bit 00_415
-bit 00_416
-bit 00_417
-bit 00_418
-bit 00_419
-bit 00_420
-bit 00_421
-bit 00_422
-bit 00_423
-bit 00_424
-bit 00_425
-bit 00_426
-bit 00_427
-bit 00_428
-bit 00_429
-bit 00_430
-bit 00_431
-bit 00_432
-bit 00_433
-bit 00_434
-bit 00_435
-bit 00_436
-bit 00_437
-bit 00_438
-bit 00_439
-bit 00_440
-bit 00_441
-bit 00_442
-bit 00_443
-bit 00_444
-bit 00_445
-bit 00_446
-bit 00_447
-bit 00_448
-bit 00_449
-bit 00_450
-bit 00_451
-bit 00_452
-bit 00_453
-bit 00_454
-bit 00_455
-bit 00_456
-bit 00_457
-bit 00_458
-bit 00_459
-bit 00_460
-bit 00_461
-bit 00_462
-bit 00_463
-bit 00_464
-bit 00_465
-bit 00_466
-bit 00_467
-bit 00_468
-bit 00_469
-bit 00_470
-bit 00_471
-bit 00_472
-bit 00_473
-bit 00_474
-bit 00_475
-bit 00_476
-bit 00_478
-bit 00_479
-bit 00_480
-bit 00_481
-bit 00_482
-bit 00_483
-bit 00_484
-bit 00_485
-bit 00_488
-bit 00_489
-bit 00_490
-bit 00_492
-bit 00_494
-bit 00_495
-bit 00_496
-bit 00_497
-bit 00_498
-bit 00_499
-bit 00_500
-bit 00_504
-bit 00_505
-bit 00_506
-bit 00_507
-bit 00_508
-bit 00_512
-bit 00_513
-bit 00_514
-bit 00_515
-bit 00_516
-bit 00_519
-bit 00_520
-bit 00_521
-bit 00_522
-bit 00_523
-bit 00_524
-bit 00_525
-bit 00_526
-bit 00_527
-bit 00_544
-bit 00_545
-bit 00_546
-bit 00_547
-bit 00_548
-bit 00_549
-bit 00_550
-bit 00_551
-bit 00_552
-bit 00_553
-bit 00_554
-bit 00_555
-bit 00_556
-bit 00_557
-bit 00_558
-bit 00_559
-bit 00_560
-bit 00_561
-bit 00_562
-bit 00_563
-bit 00_564
-bit 00_565
-bit 00_566
-bit 00_567
-bit 00_568
-bit 00_569
-bit 00_570
-bit 00_571
-bit 00_572
-bit 00_573
-bit 00_574
-bit 00_575
-bit 00_576
-bit 00_577
-bit 00_578
-bit 00_579
-bit 00_580
-bit 00_581
-bit 00_582
-bit 00_583
-bit 00_584
-bit 00_585
-bit 00_586
-bit 00_587
-bit 00_588
-bit 00_589
-bit 00_590
-bit 00_591
-bit 00_592
-bit 00_593
-bit 00_594
-bit 00_595
-bit 00_596
-bit 00_600
-bit 00_601
-bit 00_602
-bit 00_603
-bit 00_604
-bit 00_608
-bit 00_609
-bit 00_610
-bit 00_611
-bit 00_612
-bit 00_614
-bit 00_615
-bit 00_616
-bit 00_617
-bit 00_618
-bit 00_619
-bit 00_620
-bit 00_623
-bit 00_624
-bit 00_625
-bit 00_626
-bit 00_627
-bit 00_628
-bit 00_632
-bit 00_633
-bit 00_634
-bit 00_635
-bit 00_636
-bit 00_640
-bit 00_641
-bit 00_642
-bit 00_643
-bit 00_644
-bit 00_646
-bit 00_647
-bit 00_648
-bit 00_649
-bit 00_650
-bit 00_651
-bit 00_652
-bit 00_654
-bit 00_655
-bit 00_656
-bit 00_657
-bit 00_658
-bit 00_659
-bit 00_660
-bit 00_662
-bit 00_663
-bit 00_664
-bit 00_665
-bit 00_666
-bit 00_667
-bit 00_668
-bit 00_670
-bit 00_671
-bit 00_672
-bit 00_673
-bit 00_674
-bit 00_675
-bit 00_676
-bit 00_677
-bit 00_678
-bit 00_679
-bit 00_680
-bit 00_681
-bit 00_682
-bit 00_683
-bit 00_684
-bit 00_685
-bit 00_686
-bit 00_687
-bit 00_696
-bit 00_697
-bit 00_698
-bit 00_700
-bit 00_701
-bit 00_702
-bit 01_00
-bit 01_01
-bit 01_06
-bit 01_07
-bit 01_47
-bit 01_101
-bit 01_102
-bit 01_103
-bit 01_104
-bit 01_105
-bit 01_106
-bit 01_107
-bit 01_108
-bit 01_109
-bit 01_110
-bit 01_112
-bit 01_113
-bit 01_114
-bit 01_115
-bit 01_116
-bit 01_117
-bit 01_123
-bit 01_124
-bit 01_125
-bit 01_128
-bit 01_129
-bit 01_130
-bit 01_131
-bit 01_132
-bit 01_133
-bit 01_134
-bit 01_135
-bit 01_138
-bit 01_139
-bit 01_140
-bit 01_141
-bit 01_142
-bit 01_144
-bit 01_145
-bit 01_146
-bit 01_147
-bit 01_148
-bit 01_149
-bit 01_150
-bit 01_151
-bit 01_152
-bit 01_153
-bit 01_154
-bit 01_155
-bit 01_156
-bit 01_157
-bit 01_158
-bit 01_160
-bit 01_161
-bit 01_162
-bit 01_163
-bit 01_164
-bit 01_165
-bit 01_168
-bit 01_169
-bit 01_170
-bit 01_171
-bit 01_172
-bit 01_173
-bit 01_176
-bit 01_177
-bit 01_178
-bit 01_179
-bit 01_180
-bit 01_181
-bit 01_187
-bit 01_188
-bit 01_189
-bit 01_190
-bit 01_191
-bit 01_192
-bit 01_193
-bit 01_194
-bit 01_195
-bit 01_202
-bit 01_203
-bit 01_204
-bit 01_205
-bit 01_207
-bit 01_208
-bit 01_209
-bit 01_210
-bit 01_211
-bit 01_212
-bit 01_213
-bit 01_214
-bit 01_215
-bit 01_216
-bit 01_217
-bit 01_218
-bit 01_219
-bit 01_220
-bit 01_221
-bit 01_224
-bit 01_226
-bit 01_231
-bit 01_288
-bit 01_289
-bit 01_290
-bit 01_291
-bit 01_292
-bit 01_293
-bit 01_336
-bit 01_337
-bit 01_338
-bit 01_339
-bit 01_340
-bit 01_341
-bit 01_342
-bit 01_343
-bit 01_344
-bit 01_345
-bit 01_346
-bit 01_347
-bit 01_348
-bit 01_349
-bit 01_350
-bit 01_351
-bit 01_352
-bit 01_353
-bit 01_354
-bit 01_355
-bit 01_356
-bit 01_357
-bit 01_358
-bit 01_359
-bit 01_360
-bit 01_361
-bit 01_362
-bit 01_363
-bit 01_364
-bit 01_365
-bit 01_366
-bit 01_367
-bit 01_368
-bit 01_369
-bit 01_370
-bit 01_371
-bit 01_372
-bit 01_373
-bit 01_374
-bit 01_375
-bit 01_376
-bit 01_377
-bit 01_378
-bit 01_379
-bit 01_380
-bit 01_381
-bit 01_382
-bit 01_383
-bit 01_384
-bit 01_385
-bit 01_386
-bit 01_387
-bit 01_388
-bit 01_389
-bit 01_390
-bit 01_391
-bit 01_392
-bit 01_393
-bit 01_394
-bit 01_395
-bit 01_396
-bit 01_397
-bit 01_398
-bit 01_399
-bit 01_400
-bit 01_401
-bit 01_402
-bit 01_403
-bit 01_404
-bit 01_405
-bit 01_406
-bit 01_407
-bit 01_408
-bit 01_409
-bit 01_410
-bit 01_411
-bit 01_412
-bit 01_413
-bit 01_414
-bit 01_415
-bit 01_416
-bit 01_417
-bit 01_418
-bit 01_419
-bit 01_420
-bit 01_421
-bit 01_422
-bit 01_423
-bit 01_424
-bit 01_425
-bit 01_426
-bit 01_427
-bit 01_428
-bit 01_429
-bit 01_430
-bit 01_431
-bit 01_432
-bit 01_433
-bit 01_434
-bit 01_435
-bit 01_436
-bit 01_437
-bit 01_438
-bit 01_439
-bit 01_440
-bit 01_441
-bit 01_442
-bit 01_443
-bit 01_444
-bit 01_445
-bit 01_446
-bit 01_447
-bit 01_448
-bit 01_449
-bit 01_450
-bit 01_451
-bit 01_452
-bit 01_453
-bit 01_454
-bit 01_455
-bit 01_456
-bit 01_457
-bit 01_458
-bit 01_459
-bit 01_460
-bit 01_461
-bit 01_462
-bit 01_463
-bit 01_464
-bit 01_465
-bit 01_466
-bit 01_467
-bit 01_468
-bit 01_469
-bit 01_470
-bit 01_471
-bit 01_472
-bit 01_473
-bit 01_474
-bit 01_475
-bit 01_477
-bit 01_478
-bit 01_479
-bit 01_480
-bit 01_481
-bit 01_482
-bit 01_483
-bit 01_484
-bit 01_485
-bit 01_488
-bit 01_489
-bit 01_490
-bit 01_492
-bit 01_494
-bit 01_495
-bit 01_496
-bit 01_497
-bit 01_498
-bit 01_499
-bit 01_500
-bit 01_504
-bit 01_505
-bit 01_506
-bit 01_507
-bit 01_508
-bit 01_512
-bit 01_513
-bit 01_514
-bit 01_515
-bit 01_516
-bit 01_519
-bit 01_520
-bit 01_521
-bit 01_522
-bit 01_523
-bit 01_524
-bit 01_525
-bit 01_526
-bit 01_544
-bit 01_545
-bit 01_546
-bit 01_547
-bit 01_548
-bit 01_549
-bit 01_550
-bit 01_552
-bit 01_553
-bit 01_554
-bit 01_555
-bit 01_556
-bit 01_557
-bit 01_558
-bit 01_559
-bit 01_560
-bit 01_561
-bit 01_562
-bit 01_563
-bit 01_564
-bit 01_565
-bit 01_566
-bit 01_567
-bit 01_568
-bit 01_569
-bit 01_570
-bit 01_571
-bit 01_572
-bit 01_573
-bit 01_574
-bit 01_576
-bit 01_577
-bit 01_578
-bit 01_579
-bit 01_580
-bit 01_581
-bit 01_582
-bit 01_584
-bit 01_585
-bit 01_586
-bit 01_587
-bit 01_588
-bit 01_589
-bit 01_592
-bit 01_593
-bit 01_594
-bit 01_595
-bit 01_596
-bit 01_600
-bit 01_601
-bit 01_602
-bit 01_603
-bit 01_604
-bit 01_607
-bit 01_608
-bit 01_609
-bit 01_610
-bit 01_611
-bit 01_612
-bit 01_614
-bit 01_615
-bit 01_616
-bit 01_617
-bit 01_618
-bit 01_619
-bit 01_620
-bit 01_623
-bit 01_624
-bit 01_625
-bit 01_626
-bit 01_627
-bit 01_628
-bit 01_631
-bit 01_632
-bit 01_633
-bit 01_634
-bit 01_635
-bit 01_636
-bit 01_640
-bit 01_641
-bit 01_642
-bit 01_643
-bit 01_644
-bit 01_645
-bit 01_646
-bit 01_647
-bit 01_648
-bit 01_649
-bit 01_650
-bit 01_651
-bit 01_652
-bit 01_653
-bit 01_654
-bit 01_655
-bit 01_656
-bit 01_657
-bit 01_658
-bit 01_659
-bit 01_660
-bit 01_661
-bit 01_662
-bit 01_663
-bit 01_664
-bit 01_665
-bit 01_666
-bit 01_667
-bit 01_668
-bit 01_670
-bit 01_671
-bit 01_672
-bit 01_673
-bit 01_674
-bit 01_675
-bit 01_676
-bit 01_677
-bit 01_678
-bit 01_679
-bit 01_680
-bit 01_681
-bit 01_682
-bit 01_683
-bit 01_684
-bit 01_685
-bit 01_686
-bit 01_687
-bit 01_696
-bit 01_697
-bit 01_698
-bit 01_700
-bit 01_701
-bit 02_00
-bit 02_02
-bit 02_03
-bit 02_05
-bit 02_11
-bit 02_13
-bit 02_20
-bit 02_23
-bit 02_40
-bit 02_41
-bit 02_42
-bit 02_43
-bit 02_44
-bit 02_45
-bit 02_55
-bit 02_64
-bit 02_65
-bit 02_66
-bit 02_67
-bit 02_68
-bit 02_69
-bit 02_70
-bit 02_71
-bit 02_72
-bit 02_73
-bit 02_74
-bit 02_75
-bit 02_80
-bit 02_81
-bit 02_82
-bit 02_83
-bit 02_84
-bit 02_85
-bit 02_86
-bit 02_87
-bit 02_88
-bit 02_89
-bit 02_90
-bit 02_91
-bit 02_92
-bit 02_93
-bit 02_94
-bit 02_95
-bit 02_96
-bit 02_97
-bit 02_98
-bit 02_99
-bit 02_100
-bit 02_101
-bit 02_102
-bit 02_103
-bit 02_108
-bit 02_109
-bit 02_110
-bit 02_112
-bit 02_113
-bit 02_114
-bit 02_115
-bit 02_116
-bit 02_117
-bit 02_118
-bit 02_119
-bit 02_128
-bit 02_129
-bit 02_136
-bit 02_137
-bit 02_138
-bit 02_139
-bit 02_140
-bit 02_141
-bit 02_142
-bit 02_143
-bit 02_144
-bit 02_145
-bit 02_146
-bit 02_151
-bit 02_152
-bit 02_153
-bit 02_156
-bit 02_157
-bit 02_184
-bit 02_185
-bit 02_186
-bit 02_187
-bit 02_188
-bit 02_189
-bit 02_190
-bit 02_191
-bit 02_192
-bit 02_193
-bit 02_194
-bit 02_195
-bit 02_196
-bit 02_197
-bit 02_198
-bit 02_199
-bit 02_200
-bit 02_201
-bit 02_202
-bit 02_203
-bit 02_204
-bit 02_205
-bit 02_206
-bit 02_207
-bit 02_232
-bit 02_233
-bit 02_234
-bit 02_235
-bit 02_236
-bit 02_237
-bit 02_238
-bit 02_239
-bit 02_240
-bit 02_241
-bit 02_242
-bit 02_243
-bit 02_244
-bit 02_245
-bit 02_246
-bit 02_247
-bit 02_248
-bit 02_249
-bit 02_250
-bit 02_251
-bit 02_252
-bit 02_253
-bit 02_254
-bit 02_255
-bit 02_256
-bit 02_257
-bit 02_258
-bit 02_259
-bit 02_260
-bit 02_261
-bit 02_262
-bit 02_263
-bit 02_264
-bit 02_265
-bit 02_266
-bit 02_267
-bit 02_268
-bit 02_269
-bit 02_270
-bit 02_271
-bit 02_272
-bit 02_273
-bit 02_274
-bit 02_276
-bit 02_277
-bit 02_278
-bit 02_288
-bit 02_292
-bit 02_293
-bit 02_296
-bit 02_297
-bit 02_298
-bit 02_299
-bit 02_300
-bit 02_301
-bit 02_302
-bit 02_303
-bit 02_304
-bit 02_305
-bit 02_328
-bit 02_329
-bit 02_330
-bit 02_336
-bit 02_337
-bit 02_338
-bit 02_339
-bit 02_340
-bit 02_341
-bit 02_342
-bit 02_343
-bit 02_344
-bit 02_345
-bit 02_346
-bit 02_347
-bit 02_348
-bit 02_349
-bit 02_350
-bit 02_351
-bit 02_368
-bit 02_369
-bit 02_370
-bit 02_371
-bit 02_372
-bit 02_373
-bit 02_374
-bit 02_375
-bit 02_376
-bit 02_377
-bit 02_378
-bit 02_379
-bit 02_384
-bit 02_386
-bit 02_390
-bit 02_391
-bit 02_392
-bit 02_393
-bit 02_394
-bit 02_395
-bit 02_396
-bit 02_397
-bit 02_398
-bit 02_399
-bit 02_400
-bit 02_401
-bit 02_402
-bit 02_403
-bit 02_404
-bit 02_405
-bit 02_406
-bit 02_407
-bit 02_408
-bit 02_409
-bit 02_410
-bit 02_411
-bit 02_412
-bit 02_413
-bit 02_416
-bit 02_417
-bit 02_418
-bit 02_419
-bit 02_424
-bit 02_425
-bit 02_426
-bit 02_427
-bit 02_428
-bit 02_429
-bit 02_430
-bit 02_431
-bit 02_432
-bit 02_433
-bit 02_434
-bit 02_435
-bit 02_436
-bit 02_437
-bit 02_438
-bit 02_439
-bit 02_440
-bit 02_441
-bit 02_442
-bit 02_443
-bit 02_459
-bit 02_460
-bit 02_461
-bit 02_462
-bit 02_463
-bit 02_464
-bit 02_465
-bit 02_466
-bit 02_467
-bit 02_468
-bit 02_469
-bit 02_470
-bit 02_471
-bit 02_472
-bit 02_473
-bit 02_488
-bit 02_489
-bit 02_490
-bit 02_491
-bit 02_496
-bit 02_497
-bit 02_498
-bit 02_504
-bit 02_505
-bit 02_506
-bit 02_507
-bit 02_508
-bit 02_509
-bit 02_510
-bit 02_511
-bit 02_512
-bit 02_513
-bit 02_514
-bit 02_515
-bit 02_516
-bit 02_517
-bit 02_518
-bit 02_519
-bit 02_520
-bit 02_521
-bit 02_522
-bit 02_523
-bit 02_524
-bit 02_525
-bit 02_526
-bit 02_527
-bit 02_528
-bit 02_529
-bit 02_530
-bit 02_531
-bit 02_532
-bit 02_533
-bit 02_534
-bit 02_535
-bit 02_536
-bit 02_537
-bit 02_538
-bit 02_544
-bit 02_545
-bit 02_546
-bit 02_547
-bit 02_548
-bit 02_552
-bit 02_553
-bit 02_554
-bit 02_555
-bit 02_556
-bit 02_557
-bit 02_558
-bit 02_559
-bit 02_560
-bit 02_561
-bit 02_568
-bit 02_569
-bit 02_570
-bit 02_571
-bit 02_572
-bit 02_576
-bit 02_577
-bit 02_578
-bit 02_579
-bit 02_580
-bit 02_584
-bit 02_585
-bit 02_586
-bit 02_587
-bit 02_588
-bit 02_589
-bit 02_590
-bit 02_591
-bit 02_592
-bit 02_593
-bit 02_594
-bit 02_595
-bit 02_600
-bit 02_601
-bit 02_602
-bit 02_603
-bit 02_604
-bit 02_605
-bit 02_606
-bit 02_607
-bit 02_608
-bit 02_609
-bit 02_610
-bit 02_611
-bit 02_616
-bit 02_617
-bit 02_618
-bit 02_619
-bit 02_620
-bit 02_621
-bit 02_622
-bit 02_624
-bit 02_625
-bit 02_626
-bit 02_627
-bit 02_628
-bit 02_632
-bit 02_633
-bit 02_634
-bit 02_638
-bit 02_640
-bit 02_641
-bit 02_642
-bit 02_643
-bit 02_644
-bit 02_645
-bit 02_646
-bit 02_647
-bit 02_648
-bit 02_649
-bit 02_650
-bit 02_651
-bit 02_652
-bit 02_653
-bit 02_654
-bit 02_655
-bit 02_656
-bit 02_657
-bit 02_658
-bit 02_659
-bit 02_660
-bit 02_661
-bit 02_662
-bit 02_663
-bit 02_664
-bit 02_665
-bit 02_666
-bit 02_667
-bit 02_668
-bit 02_669
-bit 02_670
-bit 02_671
-bit 02_672
-bit 02_673
-bit 02_674
-bit 02_675
-bit 02_676
-bit 02_677
-bit 02_678
-bit 02_679
-bit 02_680
-bit 02_681
-bit 03_01
-bit 03_04
-bit 03_11
-bit 03_13
-bit 03_20
-bit 03_23
-bit 03_40
-bit 03_41
-bit 03_42
-bit 03_43
-bit 03_44
-bit 03_55
-bit 03_64
-bit 03_65
-bit 03_66
-bit 03_67
-bit 03_68
-bit 03_69
-bit 03_70
-bit 03_71
-bit 03_72
-bit 03_73
-bit 03_74
-bit 03_75
-bit 03_80
-bit 03_81
-bit 03_82
-bit 03_83
-bit 03_84
-bit 03_85
-bit 03_86
-bit 03_87
-bit 03_88
-bit 03_89
-bit 03_90
-bit 03_91
-bit 03_92
-bit 03_93
-bit 03_94
-bit 03_95
-bit 03_96
-bit 03_97
-bit 03_98
-bit 03_99
-bit 03_100
-bit 03_101
-bit 03_102
-bit 03_103
-bit 03_108
-bit 03_109
-bit 03_112
-bit 03_113
-bit 03_114
-bit 03_115
-bit 03_116
-bit 03_117
-bit 03_118
-bit 03_119
-bit 03_128
-bit 03_129
-bit 03_136
-bit 03_137
-bit 03_138
-bit 03_139
-bit 03_140
-bit 03_141
-bit 03_142
-bit 03_144
-bit 03_145
-bit 03_150
-bit 03_151
-bit 03_152
-bit 03_156
-bit 03_157
-bit 03_159
-bit 03_184
-bit 03_185
-bit 03_186
-bit 03_187
-bit 03_188
-bit 03_189
-bit 03_190
-bit 03_191
-bit 03_192
-bit 03_193
-bit 03_194
-bit 03_195
-bit 03_196
-bit 03_197
-bit 03_198
-bit 03_199
-bit 03_200
-bit 03_201
-bit 03_202
-bit 03_203
-bit 03_204
-bit 03_205
-bit 03_206
-bit 03_207
-bit 03_232
-bit 03_233
-bit 03_234
-bit 03_236
-bit 03_237
-bit 03_238
-bit 03_240
-bit 03_241
-bit 03_242
-bit 03_244
-bit 03_245
-bit 03_246
-bit 03_248
-bit 03_249
-bit 03_250
-bit 03_252
-bit 03_253
-bit 03_254
-bit 03_256
-bit 03_257
-bit 03_258
-bit 03_260
-bit 03_261
-bit 03_262
-bit 03_264
-bit 03_265
-bit 03_266
-bit 03_268
-bit 03_269
-bit 03_270
-bit 03_272
-bit 03_273
-bit 03_274
-bit 03_276
-bit 03_277
-bit 03_278
-bit 03_288
-bit 03_289
-bit 03_292
-bit 03_296
-bit 03_297
-bit 03_298
-bit 03_299
-bit 03_300
-bit 03_301
-bit 03_302
-bit 03_303
-bit 03_304
-bit 03_305
-bit 03_311
-bit 03_328
-bit 03_329
-bit 03_336
-bit 03_337
-bit 03_338
-bit 03_339
-bit 03_340
-bit 03_341
-bit 03_342
-bit 03_343
-bit 03_344
-bit 03_345
-bit 03_346
-bit 03_347
-bit 03_348
-bit 03_349
-bit 03_350
-bit 03_351
-bit 03_368
-bit 03_369
-bit 03_370
-bit 03_371
-bit 03_372
-bit 03_373
-bit 03_374
-bit 03_375
-bit 03_376
-bit 03_377
-bit 03_378
-bit 03_379
-bit 03_384
-bit 03_386
-bit 03_389
-bit 03_390
-bit 03_391
-bit 03_392
-bit 03_393
-bit 03_394
-bit 03_395
-bit 03_396
-bit 03_397
-bit 03_398
-bit 03_399
-bit 03_400
-bit 03_401
-bit 03_402
-bit 03_403
-bit 03_404
-bit 03_405
-bit 03_406
-bit 03_407
-bit 03_408
-bit 03_409
-bit 03_410
-bit 03_411
-bit 03_412
-bit 03_416
-bit 03_417
-bit 03_418
-bit 03_424
-bit 03_425
-bit 03_426
-bit 03_427
-bit 03_428
-bit 03_429
-bit 03_430
-bit 03_431
-bit 03_432
-bit 03_433
-bit 03_434
-bit 03_435
-bit 03_436
-bit 03_437
-bit 03_438
-bit 03_439
-bit 03_440
-bit 03_441
-bit 03_442
-bit 03_443
-bit 03_459
-bit 03_460
-bit 03_461
-bit 03_463
-bit 03_464
-bit 03_465
-bit 03_466
-bit 03_467
-bit 03_468
-bit 03_469
-bit 03_470
-bit 03_471
-bit 03_472
-bit 03_473
-bit 03_488
-bit 03_489
-bit 03_490
-bit 03_491
-bit 03_496
-bit 03_497
-bit 03_498
-bit 03_504
-bit 03_505
-bit 03_506
-bit 03_507
-bit 03_508
-bit 03_509
-bit 03_510
-bit 03_511
-bit 03_512
-bit 03_513
-bit 03_514
-bit 03_515
-bit 03_516
-bit 03_517
-bit 03_518
-bit 03_519
-bit 03_520
-bit 03_521
-bit 03_522
-bit 03_523
-bit 03_524
-bit 03_525
-bit 03_526
-bit 03_527
-bit 03_528
-bit 03_529
-bit 03_530
-bit 03_531
-bit 03_532
-bit 03_533
-bit 03_534
-bit 03_535
-bit 03_536
-bit 03_537
-bit 03_538
-bit 03_544
-bit 03_545
-bit 03_546
-bit 03_552
-bit 03_553
-bit 03_554
-bit 03_555
-bit 03_556
-bit 03_557
-bit 03_558
-bit 03_559
-bit 03_560
-bit 03_568
-bit 03_569
-bit 03_570
-bit 03_571
-bit 03_576
-bit 03_577
-bit 03_578
-bit 03_579
-bit 03_584
-bit 03_585
-bit 03_586
-bit 03_587
-bit 03_588
-bit 03_589
-bit 03_590
-bit 03_591
-bit 03_592
-bit 03_593
-bit 03_594
-bit 03_595
-bit 03_600
-bit 03_601
-bit 03_602
-bit 03_603
-bit 03_604
-bit 03_605
-bit 03_606
-bit 03_607
-bit 03_608
-bit 03_609
-bit 03_610
-bit 03_611
-bit 03_616
-bit 03_617
-bit 03_618
-bit 03_619
-bit 03_620
-bit 03_621
-bit 03_622
-bit 03_624
-bit 03_625
-bit 03_626
-bit 03_627
-bit 03_628
-bit 03_632
-bit 03_633
-bit 03_634
-bit 03_637
-bit 03_638
-bit 03_640
-bit 03_641
-bit 03_642
-bit 03_643
-bit 03_644
-bit 03_645
-bit 03_646
-bit 03_647
-bit 03_648
-bit 03_649
-bit 03_650
-bit 03_651
-bit 03_652
-bit 03_653
-bit 03_654
-bit 03_655
-bit 03_656
-bit 03_657
-bit 03_658
-bit 03_659
-bit 03_660
-bit 03_661
-bit 03_662
-bit 03_663
-bit 03_664
-bit 03_665
-bit 03_666
-bit 03_667
-bit 03_668
-bit 03_669
-bit 03_670
-bit 03_671
-bit 03_672
-bit 03_673
-bit 03_674
-bit 03_675
-bit 03_676
-bit 03_677
-bit 03_678
-bit 03_679
-bit 03_680
 bit 28_00
 bit 28_01
 bit 28_07

diff --git a/artix7/mask_gtp_channel_1_mid_left.db b/artix7/mask_gtp_channel_1_mid_left.db
index c576c8c..6f48b45 100644
--- a/artix7/mask_gtp_channel_1_mid_left.db
+++ b/artix7/mask_gtp_channel_1_mid_left.db

@@ -1632,1637 +1632,3 @@
 bit 03_678
 bit 03_679
 bit 03_680
-bit 28_00
-bit 28_01
-bit 28_07
-bit 28_47
-bit 28_52
-bit 28_53
-bit 28_65
-bit 28_102
-bit 28_103
-bit 28_104
-bit 28_105
-bit 28_106
-bit 28_107
-bit 28_108
-bit 28_109
-bit 28_110
-bit 28_111
-bit 28_112
-bit 28_113
-bit 28_114
-bit 28_115
-bit 28_116
-bit 28_117
-bit 28_124
-bit 28_125
-bit 28_128
-bit 28_129
-bit 28_130
-bit 28_131
-bit 28_132
-bit 28_133
-bit 28_134
-bit 28_135
-bit 28_136
-bit 28_138
-bit 28_139
-bit 28_140
-bit 28_141
-bit 28_142
-bit 28_143
-bit 28_144
-bit 28_145
-bit 28_146
-bit 28_147
-bit 28_148
-bit 28_149
-bit 28_150
-bit 28_151
-bit 28_152
-bit 28_153
-bit 28_154
-bit 28_155
-bit 28_156
-bit 28_157
-bit 28_158
-bit 28_159
-bit 28_160
-bit 28_161
-bit 28_162
-bit 28_163
-bit 28_164
-bit 28_165
-bit 28_168
-bit 28_169
-bit 28_170
-bit 28_171
-bit 28_172
-bit 28_173
-bit 28_174
-bit 28_176
-bit 28_177
-bit 28_178
-bit 28_179
-bit 28_180
-bit 28_181
-bit 28_187
-bit 28_188
-bit 28_189
-bit 28_190
-bit 28_191
-bit 28_192
-bit 28_193
-bit 28_194
-bit 28_195
-bit 28_200
-bit 28_203
-bit 28_204
-bit 28_205
-bit 28_206
-bit 28_208
-bit 28_209
-bit 28_210
-bit 28_211
-bit 28_212
-bit 28_213
-bit 28_214
-bit 28_215
-bit 28_216
-bit 28_217
-bit 28_218
-bit 28_219
-bit 28_220
-bit 28_221
-bit 28_222
-bit 28_224
-bit 28_225
-bit 28_231
-bit 28_247
-bit 28_288
-bit 28_289
-bit 28_290
-bit 28_291
-bit 28_292
-bit 28_293
-bit 28_294
-bit 28_336
-bit 28_337
-bit 28_338
-bit 28_339
-bit 28_340
-bit 28_341
-bit 28_342
-bit 28_343
-bit 28_344
-bit 28_345
-bit 28_346
-bit 28_347
-bit 28_348
-bit 28_349
-bit 28_350
-bit 28_351
-bit 28_352
-bit 28_353
-bit 28_354
-bit 28_355
-bit 28_356
-bit 28_357
-bit 28_358
-bit 28_359
-bit 28_360
-bit 28_361
-bit 28_362
-bit 28_363
-bit 28_364
-bit 28_365
-bit 28_366
-bit 28_367
-bit 28_368
-bit 28_369
-bit 28_370
-bit 28_371
-bit 28_372
-bit 28_373
-bit 28_374
-bit 28_375
-bit 28_376
-bit 28_377
-bit 28_378
-bit 28_379
-bit 28_380
-bit 28_381
-bit 28_382
-bit 28_383
-bit 28_384
-bit 28_385
-bit 28_386
-bit 28_387
-bit 28_388
-bit 28_389
-bit 28_390
-bit 28_391
-bit 28_392
-bit 28_393
-bit 28_394
-bit 28_395
-bit 28_396
-bit 28_397
-bit 28_398
-bit 28_399
-bit 28_400
-bit 28_401
-bit 28_402
-bit 28_403
-bit 28_404
-bit 28_405
-bit 28_406
-bit 28_407
-bit 28_408
-bit 28_409
-bit 28_410
-bit 28_411
-bit 28_412
-bit 28_413
-bit 28_414
-bit 28_415
-bit 28_416
-bit 28_417
-bit 28_418
-bit 28_419
-bit 28_420
-bit 28_421
-bit 28_422
-bit 28_423
-bit 28_424
-bit 28_425
-bit 28_426
-bit 28_427
-bit 28_428
-bit 28_429
-bit 28_430
-bit 28_431
-bit 28_432
-bit 28_433
-bit 28_434
-bit 28_435
-bit 28_436
-bit 28_437
-bit 28_438
-bit 28_439
-bit 28_440
-bit 28_441
-bit 28_442
-bit 28_443
-bit 28_444
-bit 28_445
-bit 28_446
-bit 28_447
-bit 28_448
-bit 28_449
-bit 28_450
-bit 28_451
-bit 28_452
-bit 28_453
-bit 28_454
-bit 28_455
-bit 28_456
-bit 28_457
-bit 28_458
-bit 28_459
-bit 28_460
-bit 28_461
-bit 28_462
-bit 28_463
-bit 28_464
-bit 28_465
-bit 28_466
-bit 28_467
-bit 28_468
-bit 28_469
-bit 28_470
-bit 28_471
-bit 28_472
-bit 28_473
-bit 28_474
-bit 28_475
-bit 28_476
-bit 28_478
-bit 28_479
-bit 28_480
-bit 28_481
-bit 28_482
-bit 28_483
-bit 28_484
-bit 28_485
-bit 28_488
-bit 28_489
-bit 28_490
-bit 28_492
-bit 28_494
-bit 28_495
-bit 28_496
-bit 28_497
-bit 28_498
-bit 28_499
-bit 28_500
-bit 28_504
-bit 28_505
-bit 28_506
-bit 28_507
-bit 28_508
-bit 28_512
-bit 28_513
-bit 28_514
-bit 28_515
-bit 28_516
-bit 28_519
-bit 28_520
-bit 28_521
-bit 28_522
-bit 28_523
-bit 28_524
-bit 28_525
-bit 28_526
-bit 28_527
-bit 28_544
-bit 28_545
-bit 28_546
-bit 28_547
-bit 28_548
-bit 28_549
-bit 28_550
-bit 28_551
-bit 28_552
-bit 28_553
-bit 28_554
-bit 28_555
-bit 28_556
-bit 28_557
-bit 28_558
-bit 28_559
-bit 28_560
-bit 28_561
-bit 28_562
-bit 28_563
-bit 28_564
-bit 28_565
-bit 28_566
-bit 28_567
-bit 28_568
-bit 28_569
-bit 28_570
-bit 28_571
-bit 28_572
-bit 28_573
-bit 28_574
-bit 28_575
-bit 28_576
-bit 28_577
-bit 28_578
-bit 28_579
-bit 28_580
-bit 28_581
-bit 28_582
-bit 28_583
-bit 28_584
-bit 28_585
-bit 28_586
-bit 28_587
-bit 28_588
-bit 28_589
-bit 28_590
-bit 28_591
-bit 28_592
-bit 28_593
-bit 28_594
-bit 28_595
-bit 28_596
-bit 28_600
-bit 28_601
-bit 28_602
-bit 28_603
-bit 28_604
-bit 28_608
-bit 28_609
-bit 28_610
-bit 28_611
-bit 28_612
-bit 28_614
-bit 28_615
-bit 28_616
-bit 28_617
-bit 28_618
-bit 28_619
-bit 28_620
-bit 28_623
-bit 28_624
-bit 28_625
-bit 28_626
-bit 28_627
-bit 28_628
-bit 28_632
-bit 28_633
-bit 28_634
-bit 28_635
-bit 28_636
-bit 28_640
-bit 28_641
-bit 28_642
-bit 28_643
-bit 28_644
-bit 28_646
-bit 28_647
-bit 28_648
-bit 28_649
-bit 28_650
-bit 28_651
-bit 28_652
-bit 28_654
-bit 28_655
-bit 28_656
-bit 28_657
-bit 28_658
-bit 28_659
-bit 28_660
-bit 28_662
-bit 28_663
-bit 28_664
-bit 28_665
-bit 28_666
-bit 28_667
-bit 28_668
-bit 28_670
-bit 28_671
-bit 28_672
-bit 28_673
-bit 28_674
-bit 28_675
-bit 28_676
-bit 28_677
-bit 28_678
-bit 28_679
-bit 28_680
-bit 28_681
-bit 28_682
-bit 28_683
-bit 28_684
-bit 28_685
-bit 28_686
-bit 28_687
-bit 28_696
-bit 28_697
-bit 28_698
-bit 28_700
-bit 28_701
-bit 28_702
-bit 29_00
-bit 29_01
-bit 29_06
-bit 29_07
-bit 29_47
-bit 29_101
-bit 29_102
-bit 29_103
-bit 29_104
-bit 29_105
-bit 29_106
-bit 29_107
-bit 29_108
-bit 29_109
-bit 29_110
-bit 29_112
-bit 29_113
-bit 29_114
-bit 29_115
-bit 29_116
-bit 29_117
-bit 29_123
-bit 29_124
-bit 29_125
-bit 29_128
-bit 29_129
-bit 29_130
-bit 29_131
-bit 29_132
-bit 29_133
-bit 29_134
-bit 29_135
-bit 29_138
-bit 29_139
-bit 29_140
-bit 29_141
-bit 29_142
-bit 29_144
-bit 29_145
-bit 29_146
-bit 29_147
-bit 29_148
-bit 29_149
-bit 29_150
-bit 29_151
-bit 29_152
-bit 29_153
-bit 29_154
-bit 29_155
-bit 29_156
-bit 29_157
-bit 29_158
-bit 29_160
-bit 29_161
-bit 29_162
-bit 29_163
-bit 29_164
-bit 29_165
-bit 29_168
-bit 29_169
-bit 29_170
-bit 29_171
-bit 29_172
-bit 29_173
-bit 29_176
-bit 29_177
-bit 29_178
-bit 29_179
-bit 29_180
-bit 29_181
-bit 29_187
-bit 29_188
-bit 29_189
-bit 29_190
-bit 29_191
-bit 29_192
-bit 29_193
-bit 29_194
-bit 29_195
-bit 29_202
-bit 29_203
-bit 29_204
-bit 29_205
-bit 29_207
-bit 29_208
-bit 29_209
-bit 29_210
-bit 29_211
-bit 29_212
-bit 29_213
-bit 29_214
-bit 29_215
-bit 29_216
-bit 29_217
-bit 29_218
-bit 29_219
-bit 29_220
-bit 29_221
-bit 29_224
-bit 29_226
-bit 29_231
-bit 29_288
-bit 29_289
-bit 29_290
-bit 29_291
-bit 29_292
-bit 29_293
-bit 29_336
-bit 29_337
-bit 29_338
-bit 29_339
-bit 29_340
-bit 29_341
-bit 29_342
-bit 29_343
-bit 29_344
-bit 29_345
-bit 29_346
-bit 29_347
-bit 29_348
-bit 29_349
-bit 29_350
-bit 29_351
-bit 29_352
-bit 29_353
-bit 29_354
-bit 29_355
-bit 29_356
-bit 29_357
-bit 29_358
-bit 29_359
-bit 29_360
-bit 29_361
-bit 29_362
-bit 29_363
-bit 29_364
-bit 29_365
-bit 29_366
-bit 29_367
-bit 29_368
-bit 29_369
-bit 29_370
-bit 29_371
-bit 29_372
-bit 29_373
-bit 29_374
-bit 29_375
-bit 29_376
-bit 29_377
-bit 29_378
-bit 29_379
-bit 29_380
-bit 29_381
-bit 29_382
-bit 29_383
-bit 29_384
-bit 29_385
-bit 29_386
-bit 29_387
-bit 29_388
-bit 29_389
-bit 29_390
-bit 29_391
-bit 29_392
-bit 29_393
-bit 29_394
-bit 29_395
-bit 29_396
-bit 29_397
-bit 29_398
-bit 29_399
-bit 29_400
-bit 29_401
-bit 29_402
-bit 29_403
-bit 29_404
-bit 29_405
-bit 29_406
-bit 29_407
-bit 29_408
-bit 29_409
-bit 29_410
-bit 29_411
-bit 29_412
-bit 29_413
-bit 29_414
-bit 29_415
-bit 29_416
-bit 29_417
-bit 29_418
-bit 29_419
-bit 29_420
-bit 29_421
-bit 29_422
-bit 29_423
-bit 29_424
-bit 29_425
-bit 29_426
-bit 29_427
-bit 29_428
-bit 29_429
-bit 29_430
-bit 29_431
-bit 29_432
-bit 29_433
-bit 29_434
-bit 29_435
-bit 29_436
-bit 29_437
-bit 29_438
-bit 29_439
-bit 29_440
-bit 29_441
-bit 29_442
-bit 29_443
-bit 29_444
-bit 29_445
-bit 29_446
-bit 29_447
-bit 29_448
-bit 29_449
-bit 29_450
-bit 29_451
-bit 29_452
-bit 29_453
-bit 29_454
-bit 29_455
-bit 29_456
-bit 29_457
-bit 29_458
-bit 29_459
-bit 29_460
-bit 29_461
-bit 29_462
-bit 29_463
-bit 29_464
-bit 29_465
-bit 29_466
-bit 29_467
-bit 29_468
-bit 29_469
-bit 29_470
-bit 29_471
-bit 29_472
-bit 29_473
-bit 29_474
-bit 29_475
-bit 29_477
-bit 29_478
-bit 29_479
-bit 29_480
-bit 29_481
-bit 29_482
-bit 29_483
-bit 29_484
-bit 29_485
-bit 29_488
-bit 29_489
-bit 29_490
-bit 29_492
-bit 29_494
-bit 29_495
-bit 29_496
-bit 29_497
-bit 29_498
-bit 29_499
-bit 29_500
-bit 29_504
-bit 29_505
-bit 29_506
-bit 29_507
-bit 29_508
-bit 29_512
-bit 29_513
-bit 29_514
-bit 29_515
-bit 29_516
-bit 29_519
-bit 29_520
-bit 29_521
-bit 29_522
-bit 29_523
-bit 29_524
-bit 29_525
-bit 29_526
-bit 29_544
-bit 29_545
-bit 29_546
-bit 29_547
-bit 29_548
-bit 29_549
-bit 29_550
-bit 29_552
-bit 29_553
-bit 29_554
-bit 29_555
-bit 29_556
-bit 29_557
-bit 29_558
-bit 29_559
-bit 29_560
-bit 29_561
-bit 29_562
-bit 29_563
-bit 29_564
-bit 29_565
-bit 29_566
-bit 29_567
-bit 29_568
-bit 29_569
-bit 29_570
-bit 29_571
-bit 29_572
-bit 29_573
-bit 29_574
-bit 29_576
-bit 29_577
-bit 29_578
-bit 29_579
-bit 29_580
-bit 29_581
-bit 29_582
-bit 29_584
-bit 29_585
-bit 29_586
-bit 29_587
-bit 29_588
-bit 29_589
-bit 29_592
-bit 29_593
-bit 29_594
-bit 29_595
-bit 29_596
-bit 29_600
-bit 29_601
-bit 29_602
-bit 29_603
-bit 29_604
-bit 29_607
-bit 29_608
-bit 29_609
-bit 29_610
-bit 29_611
-bit 29_612
-bit 29_614
-bit 29_615
-bit 29_616
-bit 29_617
-bit 29_618
-bit 29_619
-bit 29_620
-bit 29_623
-bit 29_624
-bit 29_625
-bit 29_626
-bit 29_627
-bit 29_628
-bit 29_631
-bit 29_632
-bit 29_633
-bit 29_634
-bit 29_635
-bit 29_636
-bit 29_640
-bit 29_641
-bit 29_642
-bit 29_643
-bit 29_644
-bit 29_645
-bit 29_646
-bit 29_647
-bit 29_648
-bit 29_649
-bit 29_650
-bit 29_651
-bit 29_652
-bit 29_653
-bit 29_654
-bit 29_655
-bit 29_656
-bit 29_657
-bit 29_658
-bit 29_659
-bit 29_660
-bit 29_661
-bit 29_662
-bit 29_663
-bit 29_664
-bit 29_665
-bit 29_666
-bit 29_667
-bit 29_668
-bit 29_670
-bit 29_671
-bit 29_672
-bit 29_673
-bit 29_674
-bit 29_675
-bit 29_676
-bit 29_677
-bit 29_678
-bit 29_679
-bit 29_680
-bit 29_681
-bit 29_682
-bit 29_683
-bit 29_684
-bit 29_685
-bit 29_686
-bit 29_687
-bit 29_696
-bit 29_697
-bit 29_698
-bit 29_700
-bit 29_701
-bit 30_00
-bit 30_02
-bit 30_03
-bit 30_05
-bit 30_11
-bit 30_13
-bit 30_20
-bit 30_23
-bit 30_40
-bit 30_41
-bit 30_42
-bit 30_43
-bit 30_44
-bit 30_45
-bit 30_55
-bit 30_64
-bit 30_65
-bit 30_66
-bit 30_67
-bit 30_68
-bit 30_69
-bit 30_70
-bit 30_71
-bit 30_72
-bit 30_73
-bit 30_74
-bit 30_75
-bit 30_80
-bit 30_81
-bit 30_82
-bit 30_83
-bit 30_84
-bit 30_85
-bit 30_86
-bit 30_87
-bit 30_88
-bit 30_89
-bit 30_90
-bit 30_91
-bit 30_92
-bit 30_93
-bit 30_94
-bit 30_95
-bit 30_96
-bit 30_97
-bit 30_98
-bit 30_99
-bit 30_100
-bit 30_101
-bit 30_102
-bit 30_103
-bit 30_108
-bit 30_109
-bit 30_110
-bit 30_112
-bit 30_113
-bit 30_114
-bit 30_115
-bit 30_116
-bit 30_117
-bit 30_118
-bit 30_119
-bit 30_128
-bit 30_129
-bit 30_136
-bit 30_137
-bit 30_138
-bit 30_139
-bit 30_140
-bit 30_141
-bit 30_142
-bit 30_143
-bit 30_144
-bit 30_145
-bit 30_146
-bit 30_151
-bit 30_152
-bit 30_153
-bit 30_156
-bit 30_157
-bit 30_184
-bit 30_185
-bit 30_186
-bit 30_187
-bit 30_188
-bit 30_189
-bit 30_190
-bit 30_191
-bit 30_192
-bit 30_193
-bit 30_194
-bit 30_195
-bit 30_196
-bit 30_197
-bit 30_198
-bit 30_199
-bit 30_200
-bit 30_201
-bit 30_202
-bit 30_203
-bit 30_204
-bit 30_205
-bit 30_206
-bit 30_207
-bit 30_232
-bit 30_233
-bit 30_234
-bit 30_235
-bit 30_236
-bit 30_237
-bit 30_238
-bit 30_239
-bit 30_240
-bit 30_241
-bit 30_242
-bit 30_243
-bit 30_244
-bit 30_245
-bit 30_246
-bit 30_247
-bit 30_248
-bit 30_249
-bit 30_250
-bit 30_251
-bit 30_252
-bit 30_253
-bit 30_254
-bit 30_255
-bit 30_256
-bit 30_257
-bit 30_258
-bit 30_259
-bit 30_260
-bit 30_261
-bit 30_262
-bit 30_263
-bit 30_264
-bit 30_265
-bit 30_266
-bit 30_267
-bit 30_268
-bit 30_269
-bit 30_270
-bit 30_271
-bit 30_272
-bit 30_273
-bit 30_274
-bit 30_276
-bit 30_277
-bit 30_278
-bit 30_288
-bit 30_292
-bit 30_293
-bit 30_296
-bit 30_297
-bit 30_298
-bit 30_299
-bit 30_300
-bit 30_301
-bit 30_302
-bit 30_303
-bit 30_304
-bit 30_305
-bit 30_328
-bit 30_329
-bit 30_330
-bit 30_336
-bit 30_337
-bit 30_338
-bit 30_339
-bit 30_340
-bit 30_341
-bit 30_342
-bit 30_343
-bit 30_344
-bit 30_345
-bit 30_346
-bit 30_347
-bit 30_348
-bit 30_349
-bit 30_350
-bit 30_351
-bit 30_368
-bit 30_369
-bit 30_370
-bit 30_371
-bit 30_372
-bit 30_373
-bit 30_374
-bit 30_375
-bit 30_376
-bit 30_377
-bit 30_378
-bit 30_379
-bit 30_384
-bit 30_386
-bit 30_390
-bit 30_391
-bit 30_392
-bit 30_393
-bit 30_394
-bit 30_395
-bit 30_396
-bit 30_397
-bit 30_398
-bit 30_399
-bit 30_400
-bit 30_401
-bit 30_402
-bit 30_403
-bit 30_404
-bit 30_405
-bit 30_406
-bit 30_407
-bit 30_408
-bit 30_409
-bit 30_410
-bit 30_411
-bit 30_412
-bit 30_413
-bit 30_416
-bit 30_417
-bit 30_418
-bit 30_419
-bit 30_424
-bit 30_425
-bit 30_426
-bit 30_427
-bit 30_428
-bit 30_429
-bit 30_430
-bit 30_431
-bit 30_432
-bit 30_433
-bit 30_434
-bit 30_435
-bit 30_436
-bit 30_437
-bit 30_438
-bit 30_439
-bit 30_440
-bit 30_441
-bit 30_442
-bit 30_443
-bit 30_459
-bit 30_460
-bit 30_461
-bit 30_462
-bit 30_463
-bit 30_464
-bit 30_465
-bit 30_466
-bit 30_467
-bit 30_468
-bit 30_469
-bit 30_470
-bit 30_471
-bit 30_472
-bit 30_473
-bit 30_488
-bit 30_489
-bit 30_490
-bit 30_491
-bit 30_496
-bit 30_497
-bit 30_498
-bit 30_504
-bit 30_505
-bit 30_506
-bit 30_507
-bit 30_508
-bit 30_509
-bit 30_510
-bit 30_511
-bit 30_512
-bit 30_513
-bit 30_514
-bit 30_515
-bit 30_516
-bit 30_517
-bit 30_518
-bit 30_519
-bit 30_520
-bit 30_521
-bit 30_522
-bit 30_523
-bit 30_524
-bit 30_525
-bit 30_526
-bit 30_527
-bit 30_528
-bit 30_529
-bit 30_530
-bit 30_531
-bit 30_532
-bit 30_533
-bit 30_534
-bit 30_535
-bit 30_536
-bit 30_537
-bit 30_538
-bit 30_544
-bit 30_545
-bit 30_546
-bit 30_547
-bit 30_548
-bit 30_552
-bit 30_553
-bit 30_554
-bit 30_555
-bit 30_556
-bit 30_557
-bit 30_558
-bit 30_559
-bit 30_560
-bit 30_561
-bit 30_568
-bit 30_569
-bit 30_570
-bit 30_571
-bit 30_572
-bit 30_576
-bit 30_577
-bit 30_578
-bit 30_579
-bit 30_580
-bit 30_584
-bit 30_585
-bit 30_586
-bit 30_587
-bit 30_588
-bit 30_589
-bit 30_590
-bit 30_591
-bit 30_592
-bit 30_593
-bit 30_594
-bit 30_595
-bit 30_600
-bit 30_601
-bit 30_602
-bit 30_603
-bit 30_604
-bit 30_605
-bit 30_606
-bit 30_607
-bit 30_608
-bit 30_609
-bit 30_610
-bit 30_611
-bit 30_616
-bit 30_617
-bit 30_618
-bit 30_619
-bit 30_620
-bit 30_621
-bit 30_622
-bit 30_624
-bit 30_625
-bit 30_626
-bit 30_627
-bit 30_628
-bit 30_632
-bit 30_633
-bit 30_634
-bit 30_638
-bit 30_640
-bit 30_641
-bit 30_642
-bit 30_643
-bit 30_644
-bit 30_645
-bit 30_646
-bit 30_647
-bit 30_648
-bit 30_649
-bit 30_650
-bit 30_651
-bit 30_652
-bit 30_653
-bit 30_654
-bit 30_655
-bit 30_656
-bit 30_657
-bit 30_658
-bit 30_659
-bit 30_660
-bit 30_661
-bit 30_662
-bit 30_663
-bit 30_664
-bit 30_665
-bit 30_666
-bit 30_667
-bit 30_668
-bit 30_669
-bit 30_670
-bit 30_671
-bit 30_672
-bit 30_673
-bit 30_674
-bit 30_675
-bit 30_676
-bit 30_677
-bit 30_678
-bit 30_679
-bit 30_680
-bit 30_681
-bit 31_01
-bit 31_04
-bit 31_11
-bit 31_13
-bit 31_20
-bit 31_23
-bit 31_40
-bit 31_41
-bit 31_42
-bit 31_43
-bit 31_44
-bit 31_55
-bit 31_64
-bit 31_65
-bit 31_66
-bit 31_67
-bit 31_68
-bit 31_69
-bit 31_70
-bit 31_71
-bit 31_72
-bit 31_73
-bit 31_74
-bit 31_75
-bit 31_80
-bit 31_81
-bit 31_82
-bit 31_83
-bit 31_84
-bit 31_85
-bit 31_86
-bit 31_87
-bit 31_88
-bit 31_89
-bit 31_90
-bit 31_91
-bit 31_92
-bit 31_93
-bit 31_94
-bit 31_95
-bit 31_96
-bit 31_97
-bit 31_98
-bit 31_99
-bit 31_100
-bit 31_101
-bit 31_102
-bit 31_103
-bit 31_108
-bit 31_109
-bit 31_112
-bit 31_113
-bit 31_114
-bit 31_115
-bit 31_116
-bit 31_117
-bit 31_118
-bit 31_119
-bit 31_128
-bit 31_129
-bit 31_136
-bit 31_137
-bit 31_138
-bit 31_139
-bit 31_140
-bit 31_141
-bit 31_142
-bit 31_144
-bit 31_145
-bit 31_150
-bit 31_151
-bit 31_152
-bit 31_156
-bit 31_157
-bit 31_159
-bit 31_184
-bit 31_185
-bit 31_186
-bit 31_187
-bit 31_188
-bit 31_189
-bit 31_190
-bit 31_191
-bit 31_192
-bit 31_193
-bit 31_194
-bit 31_195
-bit 31_196
-bit 31_197
-bit 31_198
-bit 31_199
-bit 31_200
-bit 31_201
-bit 31_202
-bit 31_203
-bit 31_204
-bit 31_205
-bit 31_206
-bit 31_207
-bit 31_232
-bit 31_233
-bit 31_234
-bit 31_236
-bit 31_237
-bit 31_238
-bit 31_240
-bit 31_241
-bit 31_242
-bit 31_244
-bit 31_245
-bit 31_246
-bit 31_248
-bit 31_249
-bit 31_250
-bit 31_252
-bit 31_253
-bit 31_254
-bit 31_256
-bit 31_257
-bit 31_258
-bit 31_260
-bit 31_261
-bit 31_262
-bit 31_264
-bit 31_265
-bit 31_266
-bit 31_268
-bit 31_269
-bit 31_270
-bit 31_272
-bit 31_273
-bit 31_274
-bit 31_276
-bit 31_277
-bit 31_278
-bit 31_288
-bit 31_289
-bit 31_292
-bit 31_296
-bit 31_297
-bit 31_298
-bit 31_299
-bit 31_300
-bit 31_301
-bit 31_302
-bit 31_303
-bit 31_304
-bit 31_305
-bit 31_311
-bit 31_328
-bit 31_329
-bit 31_336
-bit 31_337
-bit 31_338
-bit 31_339
-bit 31_340
-bit 31_341
-bit 31_342
-bit 31_343
-bit 31_344
-bit 31_345
-bit 31_346
-bit 31_347
-bit 31_348
-bit 31_349
-bit 31_350
-bit 31_351
-bit 31_368
-bit 31_369
-bit 31_370
-bit 31_371
-bit 31_372
-bit 31_373
-bit 31_374
-bit 31_375
-bit 31_376
-bit 31_377
-bit 31_378
-bit 31_379
-bit 31_384
-bit 31_386
-bit 31_389
-bit 31_390
-bit 31_391
-bit 31_392
-bit 31_393
-bit 31_394
-bit 31_395
-bit 31_396
-bit 31_397
-bit 31_398
-bit 31_399
-bit 31_400
-bit 31_401
-bit 31_402
-bit 31_403
-bit 31_404
-bit 31_405
-bit 31_406
-bit 31_407
-bit 31_408
-bit 31_409
-bit 31_410
-bit 31_411
-bit 31_412
-bit 31_416
-bit 31_417
-bit 31_418
-bit 31_424
-bit 31_425
-bit 31_426
-bit 31_427
-bit 31_428
-bit 31_429
-bit 31_430
-bit 31_431
-bit 31_432
-bit 31_433
-bit 31_434
-bit 31_435
-bit 31_436
-bit 31_437
-bit 31_438
-bit 31_439
-bit 31_440
-bit 31_441
-bit 31_442
-bit 31_443
-bit 31_459
-bit 31_460
-bit 31_461
-bit 31_463
-bit 31_464
-bit 31_465
-bit 31_466
-bit 31_467
-bit 31_468
-bit 31_469
-bit 31_470
-bit 31_471
-bit 31_472
-bit 31_473
-bit 31_488
-bit 31_489
-bit 31_490
-bit 31_491
-bit 31_496
-bit 31_497
-bit 31_498
-bit 31_504
-bit 31_505
-bit 31_506
-bit 31_507
-bit 31_508
-bit 31_509
-bit 31_510
-bit 31_511
-bit 31_512
-bit 31_513
-bit 31_514
-bit 31_515
-bit 31_516
-bit 31_517
-bit 31_518
-bit 31_519
-bit 31_520
-bit 31_521
-bit 31_522
-bit 31_523
-bit 31_524
-bit 31_525
-bit 31_526
-bit 31_527
-bit 31_528
-bit 31_529
-bit 31_530
-bit 31_531
-bit 31_532
-bit 31_533
-bit 31_534
-bit 31_535
-bit 31_536
-bit 31_537
-bit 31_538
-bit 31_544
-bit 31_545
-bit 31_546
-bit 31_552
-bit 31_553
-bit 31_554
-bit 31_555
-bit 31_556
-bit 31_557
-bit 31_558
-bit 31_559
-bit 31_560
-bit 31_568
-bit 31_569
-bit 31_570
-bit 31_571
-bit 31_576
-bit 31_577
-bit 31_578
-bit 31_579
-bit 31_584
-bit 31_585
-bit 31_586
-bit 31_587
-bit 31_588
-bit 31_589
-bit 31_590
-bit 31_591
-bit 31_592
-bit 31_593
-bit 31_594
-bit 31_595
-bit 31_600
-bit 31_601
-bit 31_602
-bit 31_603
-bit 31_604
-bit 31_605
-bit 31_606
-bit 31_607
-bit 31_608
-bit 31_609
-bit 31_610
-bit 31_611
-bit 31_616
-bit 31_617
-bit 31_618
-bit 31_619
-bit 31_620
-bit 31_621
-bit 31_622
-bit 31_624
-bit 31_625
-bit 31_626
-bit 31_627
-bit 31_628
-bit 31_632
-bit 31_633
-bit 31_634
-bit 31_637
-bit 31_638
-bit 31_640
-bit 31_641
-bit 31_642
-bit 31_643
-bit 31_644
-bit 31_645
-bit 31_646
-bit 31_647
-bit 31_648
-bit 31_649
-bit 31_650
-bit 31_651
-bit 31_652
-bit 31_653
-bit 31_654
-bit 31_655
-bit 31_656
-bit 31_657
-bit 31_658
-bit 31_659
-bit 31_660
-bit 31_661
-bit 31_662
-bit 31_663
-bit 31_664
-bit 31_665
-bit 31_666
-bit 31_667
-bit 31_668
-bit 31_669
-bit 31_670
-bit 31_671
-bit 31_672
-bit 31_673
-bit 31_674
-bit 31_675
-bit 31_676
-bit 31_677
-bit 31_678
-bit 31_679
-bit 31_680

diff --git a/artix7/mask_gtp_channel_1_mid_right.db b/artix7/mask_gtp_channel_1_mid_right.db
index c576c8c..6f48b45 100644
--- a/artix7/mask_gtp_channel_1_mid_right.db
+++ b/artix7/mask_gtp_channel_1_mid_right.db

@@ -1632,1637 +1632,3 @@
 bit 03_678
 bit 03_679
 bit 03_680
-bit 28_00
-bit 28_01
-bit 28_07
-bit 28_47
-bit 28_52
-bit 28_53
-bit 28_65
-bit 28_102
-bit 28_103
-bit 28_104
-bit 28_105
-bit 28_106
-bit 28_107
-bit 28_108
-bit 28_109
-bit 28_110
-bit 28_111
-bit 28_112
-bit 28_113
-bit 28_114
-bit 28_115
-bit 28_116
-bit 28_117
-bit 28_124
-bit 28_125
-bit 28_128
-bit 28_129
-bit 28_130
-bit 28_131
-bit 28_132
-bit 28_133
-bit 28_134
-bit 28_135
-bit 28_136
-bit 28_138
-bit 28_139
-bit 28_140
-bit 28_141
-bit 28_142
-bit 28_143
-bit 28_144
-bit 28_145
-bit 28_146
-bit 28_147
-bit 28_148
-bit 28_149
-bit 28_150
-bit 28_151
-bit 28_152
-bit 28_153
-bit 28_154
-bit 28_155
-bit 28_156
-bit 28_157
-bit 28_158
-bit 28_159
-bit 28_160
-bit 28_161
-bit 28_162
-bit 28_163
-bit 28_164
-bit 28_165
-bit 28_168
-bit 28_169
-bit 28_170
-bit 28_171
-bit 28_172
-bit 28_173
-bit 28_174
-bit 28_176
-bit 28_177
-bit 28_178
-bit 28_179
-bit 28_180
-bit 28_181
-bit 28_187
-bit 28_188
-bit 28_189
-bit 28_190
-bit 28_191
-bit 28_192
-bit 28_193
-bit 28_194
-bit 28_195
-bit 28_200
-bit 28_203
-bit 28_204
-bit 28_205
-bit 28_206
-bit 28_208
-bit 28_209
-bit 28_210
-bit 28_211
-bit 28_212
-bit 28_213
-bit 28_214
-bit 28_215
-bit 28_216
-bit 28_217
-bit 28_218
-bit 28_219
-bit 28_220
-bit 28_221
-bit 28_222
-bit 28_224
-bit 28_225
-bit 28_231
-bit 28_247
-bit 28_288
-bit 28_289
-bit 28_290
-bit 28_291
-bit 28_292
-bit 28_293
-bit 28_294
-bit 28_336
-bit 28_337
-bit 28_338
-bit 28_339
-bit 28_340
-bit 28_341
-bit 28_342
-bit 28_343
-bit 28_344
-bit 28_345
-bit 28_346
-bit 28_347
-bit 28_348
-bit 28_349
-bit 28_350
-bit 28_351
-bit 28_352
-bit 28_353
-bit 28_354
-bit 28_355
-bit 28_356
-bit 28_357
-bit 28_358
-bit 28_359
-bit 28_360
-bit 28_361
-bit 28_362
-bit 28_363
-bit 28_364
-bit 28_365
-bit 28_366
-bit 28_367
-bit 28_368
-bit 28_369
-bit 28_370
-bit 28_371
-bit 28_372
-bit 28_373
-bit 28_374
-bit 28_375
-bit 28_376
-bit 28_377
-bit 28_378
-bit 28_379
-bit 28_380
-bit 28_381
-bit 28_382
-bit 28_383
-bit 28_384
-bit 28_385
-bit 28_386
-bit 28_387
-bit 28_388
-bit 28_389
-bit 28_390
-bit 28_391
-bit 28_392
-bit 28_393
-bit 28_394
-bit 28_395
-bit 28_396
-bit 28_397
-bit 28_398
-bit 28_399
-bit 28_400
-bit 28_401
-bit 28_402
-bit 28_403
-bit 28_404
-bit 28_405
-bit 28_406
-bit 28_407
-bit 28_408
-bit 28_409
-bit 28_410
-bit 28_411
-bit 28_412
-bit 28_413
-bit 28_414
-bit 28_415
-bit 28_416
-bit 28_417
-bit 28_418
-bit 28_419
-bit 28_420
-bit 28_421
-bit 28_422
-bit 28_423
-bit 28_424
-bit 28_425
-bit 28_426
-bit 28_427
-bit 28_428
-bit 28_429
-bit 28_430
-bit 28_431
-bit 28_432
-bit 28_433
-bit 28_434
-bit 28_435
-bit 28_436
-bit 28_437
-bit 28_438
-bit 28_439
-bit 28_440
-bit 28_441
-bit 28_442
-bit 28_443
-bit 28_444
-bit 28_445
-bit 28_446
-bit 28_447
-bit 28_448
-bit 28_449
-bit 28_450
-bit 28_451
-bit 28_452
-bit 28_453
-bit 28_454
-bit 28_455
-bit 28_456
-bit 28_457
-bit 28_458
-bit 28_459
-bit 28_460
-bit 28_461
-bit 28_462
-bit 28_463
-bit 28_464
-bit 28_465
-bit 28_466
-bit 28_467
-bit 28_468
-bit 28_469
-bit 28_470
-bit 28_471
-bit 28_472
-bit 28_473
-bit 28_474
-bit 28_475
-bit 28_476
-bit 28_478
-bit 28_479
-bit 28_480
-bit 28_481
-bit 28_482
-bit 28_483
-bit 28_484
-bit 28_485
-bit 28_488
-bit 28_489
-bit 28_490
-bit 28_492
-bit 28_494
-bit 28_495
-bit 28_496
-bit 28_497
-bit 28_498
-bit 28_499
-bit 28_500
-bit 28_504
-bit 28_505
-bit 28_506
-bit 28_507
-bit 28_508
-bit 28_512
-bit 28_513
-bit 28_514
-bit 28_515
-bit 28_516
-bit 28_519
-bit 28_520
-bit 28_521
-bit 28_522
-bit 28_523
-bit 28_524
-bit 28_525
-bit 28_526
-bit 28_527
-bit 28_544
-bit 28_545
-bit 28_546
-bit 28_547
-bit 28_548
-bit 28_549
-bit 28_550
-bit 28_551
-bit 28_552
-bit 28_553
-bit 28_554
-bit 28_555
-bit 28_556
-bit 28_557
-bit 28_558
-bit 28_559
-bit 28_560
-bit 28_561
-bit 28_562
-bit 28_563
-bit 28_564
-bit 28_565
-bit 28_566
-bit 28_567
-bit 28_568
-bit 28_569
-bit 28_570
-bit 28_571
-bit 28_572
-bit 28_573
-bit 28_574
-bit 28_575
-bit 28_576
-bit 28_577
-bit 28_578
-bit 28_579
-bit 28_580
-bit 28_581
-bit 28_582
-bit 28_583
-bit 28_584
-bit 28_585
-bit 28_586
-bit 28_587
-bit 28_588
-bit 28_589
-bit 28_590
-bit 28_591
-bit 28_592
-bit 28_593
-bit 28_594
-bit 28_595
-bit 28_596
-bit 28_600
-bit 28_601
-bit 28_602
-bit 28_603
-bit 28_604
-bit 28_608
-bit 28_609
-bit 28_610
-bit 28_611
-bit 28_612
-bit 28_614
-bit 28_615
-bit 28_616
-bit 28_617
-bit 28_618
-bit 28_619
-bit 28_620
-bit 28_623
-bit 28_624
-bit 28_625
-bit 28_626
-bit 28_627
-bit 28_628
-bit 28_632
-bit 28_633
-bit 28_634
-bit 28_635
-bit 28_636
-bit 28_640
-bit 28_641
-bit 28_642
-bit 28_643
-bit 28_644
-bit 28_646
-bit 28_647
-bit 28_648
-bit 28_649
-bit 28_650
-bit 28_651
-bit 28_652
-bit 28_654
-bit 28_655
-bit 28_656
-bit 28_657
-bit 28_658
-bit 28_659
-bit 28_660
-bit 28_662
-bit 28_663
-bit 28_664
-bit 28_665
-bit 28_666
-bit 28_667
-bit 28_668
-bit 28_670
-bit 28_671
-bit 28_672
-bit 28_673
-bit 28_674
-bit 28_675
-bit 28_676
-bit 28_677
-bit 28_678
-bit 28_679
-bit 28_680
-bit 28_681
-bit 28_682
-bit 28_683
-bit 28_684
-bit 28_685
-bit 28_686
-bit 28_687
-bit 28_696
-bit 28_697
-bit 28_698
-bit 28_700
-bit 28_701
-bit 28_702
-bit 29_00
-bit 29_01
-bit 29_06
-bit 29_07
-bit 29_47
-bit 29_101
-bit 29_102
-bit 29_103
-bit 29_104
-bit 29_105
-bit 29_106
-bit 29_107
-bit 29_108
-bit 29_109
-bit 29_110
-bit 29_112
-bit 29_113
-bit 29_114
-bit 29_115
-bit 29_116
-bit 29_117
-bit 29_123
-bit 29_124
-bit 29_125
-bit 29_128
-bit 29_129
-bit 29_130
-bit 29_131
-bit 29_132
-bit 29_133
-bit 29_134
-bit 29_135
-bit 29_138
-bit 29_139
-bit 29_140
-bit 29_141
-bit 29_142
-bit 29_144
-bit 29_145
-bit 29_146
-bit 29_147
-bit 29_148
-bit 29_149
-bit 29_150
-bit 29_151
-bit 29_152
-bit 29_153
-bit 29_154
-bit 29_155
-bit 29_156
-bit 29_157
-bit 29_158
-bit 29_160
-bit 29_161
-bit 29_162
-bit 29_163
-bit 29_164
-bit 29_165
-bit 29_168
-bit 29_169
-bit 29_170
-bit 29_171
-bit 29_172
-bit 29_173
-bit 29_176
-bit 29_177
-bit 29_178
-bit 29_179
-bit 29_180
-bit 29_181
-bit 29_187
-bit 29_188
-bit 29_189
-bit 29_190
-bit 29_191
-bit 29_192
-bit 29_193
-bit 29_194
-bit 29_195
-bit 29_202
-bit 29_203
-bit 29_204
-bit 29_205
-bit 29_207
-bit 29_208
-bit 29_209
-bit 29_210
-bit 29_211
-bit 29_212
-bit 29_213
-bit 29_214
-bit 29_215
-bit 29_216
-bit 29_217
-bit 29_218
-bit 29_219
-bit 29_220
-bit 29_221
-bit 29_224
-bit 29_226
-bit 29_231
-bit 29_288
-bit 29_289
-bit 29_290
-bit 29_291
-bit 29_292
-bit 29_293
-bit 29_336
-bit 29_337
-bit 29_338
-bit 29_339
-bit 29_340
-bit 29_341
-bit 29_342
-bit 29_343
-bit 29_344
-bit 29_345
-bit 29_346
-bit 29_347
-bit 29_348
-bit 29_349
-bit 29_350
-bit 29_351
-bit 29_352
-bit 29_353
-bit 29_354
-bit 29_355
-bit 29_356
-bit 29_357
-bit 29_358
-bit 29_359
-bit 29_360
-bit 29_361
-bit 29_362
-bit 29_363
-bit 29_364
-bit 29_365
-bit 29_366
-bit 29_367
-bit 29_368
-bit 29_369
-bit 29_370
-bit 29_371
-bit 29_372
-bit 29_373
-bit 29_374
-bit 29_375
-bit 29_376
-bit 29_377
-bit 29_378
-bit 29_379
-bit 29_380
-bit 29_381
-bit 29_382
-bit 29_383
-bit 29_384
-bit 29_385
-bit 29_386
-bit 29_387
-bit 29_388
-bit 29_389
-bit 29_390
-bit 29_391
-bit 29_392
-bit 29_393
-bit 29_394
-bit 29_395
-bit 29_396
-bit 29_397
-bit 29_398
-bit 29_399
-bit 29_400
-bit 29_401
-bit 29_402
-bit 29_403
-bit 29_404
-bit 29_405
-bit 29_406
-bit 29_407
-bit 29_408
-bit 29_409
-bit 29_410
-bit 29_411
-bit 29_412
-bit 29_413
-bit 29_414
-bit 29_415
-bit 29_416
-bit 29_417
-bit 29_418
-bit 29_419
-bit 29_420
-bit 29_421
-bit 29_422
-bit 29_423
-bit 29_424
-bit 29_425
-bit 29_426
-bit 29_427
-bit 29_428
-bit 29_429
-bit 29_430
-bit 29_431
-bit 29_432
-bit 29_433
-bit 29_434
-bit 29_435
-bit 29_436
-bit 29_437
-bit 29_438
-bit 29_439
-bit 29_440
-bit 29_441
-bit 29_442
-bit 29_443
-bit 29_444
-bit 29_445
-bit 29_446
-bit 29_447
-bit 29_448
-bit 29_449
-bit 29_450
-bit 29_451
-bit 29_452
-bit 29_453
-bit 29_454
-bit 29_455
-bit 29_456
-bit 29_457
-bit 29_458
-bit 29_459
-bit 29_460
-bit 29_461
-bit 29_462
-bit 29_463
-bit 29_464
-bit 29_465
-bit 29_466
-bit 29_467
-bit 29_468
-bit 29_469
-bit 29_470
-bit 29_471
-bit 29_472
-bit 29_473
-bit 29_474
-bit 29_475
-bit 29_477
-bit 29_478
-bit 29_479
-bit 29_480
-bit 29_481
-bit 29_482
-bit 29_483
-bit 29_484
-bit 29_485
-bit 29_488
-bit 29_489
-bit 29_490
-bit 29_492
-bit 29_494
-bit 29_495
-bit 29_496
-bit 29_497
-bit 29_498
-bit 29_499
-bit 29_500
-bit 29_504
-bit 29_505
-bit 29_506
-bit 29_507
-bit 29_508
-bit 29_512
-bit 29_513
-bit 29_514
-bit 29_515
-bit 29_516
-bit 29_519
-bit 29_520
-bit 29_521
-bit 29_522
-bit 29_523
-bit 29_524
-bit 29_525
-bit 29_526
-bit 29_544
-bit 29_545
-bit 29_546
-bit 29_547
-bit 29_548
-bit 29_549
-bit 29_550
-bit 29_552
-bit 29_553
-bit 29_554
-bit 29_555
-bit 29_556
-bit 29_557
-bit 29_558
-bit 29_559
-bit 29_560
-bit 29_561
-bit 29_562
-bit 29_563
-bit 29_564
-bit 29_565
-bit 29_566
-bit 29_567
-bit 29_568
-bit 29_569
-bit 29_570
-bit 29_571
-bit 29_572
-bit 29_573
-bit 29_574
-bit 29_576
-bit 29_577
-bit 29_578
-bit 29_579
-bit 29_580
-bit 29_581
-bit 29_582
-bit 29_584
-bit 29_585
-bit 29_586
-bit 29_587
-bit 29_588
-bit 29_589
-bit 29_592
-bit 29_593
-bit 29_594
-bit 29_595
-bit 29_596
-bit 29_600
-bit 29_601
-bit 29_602
-bit 29_603
-bit 29_604
-bit 29_607
-bit 29_608
-bit 29_609
-bit 29_610
-bit 29_611
-bit 29_612
-bit 29_614
-bit 29_615
-bit 29_616
-bit 29_617
-bit 29_618
-bit 29_619
-bit 29_620
-bit 29_623
-bit 29_624
-bit 29_625
-bit 29_626
-bit 29_627
-bit 29_628
-bit 29_631
-bit 29_632
-bit 29_633
-bit 29_634
-bit 29_635
-bit 29_636
-bit 29_640
-bit 29_641
-bit 29_642
-bit 29_643
-bit 29_644
-bit 29_645
-bit 29_646
-bit 29_647
-bit 29_648
-bit 29_649
-bit 29_650
-bit 29_651
-bit 29_652
-bit 29_653
-bit 29_654
-bit 29_655
-bit 29_656
-bit 29_657
-bit 29_658
-bit 29_659
-bit 29_660
-bit 29_661
-bit 29_662
-bit 29_663
-bit 29_664
-bit 29_665
-bit 29_666
-bit 29_667
-bit 29_668
-bit 29_670
-bit 29_671
-bit 29_672
-bit 29_673
-bit 29_674
-bit 29_675
-bit 29_676
-bit 29_677
-bit 29_678
-bit 29_679
-bit 29_680
-bit 29_681
-bit 29_682
-bit 29_683
-bit 29_684
-bit 29_685
-bit 29_686
-bit 29_687
-bit 29_696
-bit 29_697
-bit 29_698
-bit 29_700
-bit 29_701
-bit 30_00
-bit 30_02
-bit 30_03
-bit 30_05
-bit 30_11
-bit 30_13
-bit 30_20
-bit 30_23
-bit 30_40
-bit 30_41
-bit 30_42
-bit 30_43
-bit 30_44
-bit 30_45
-bit 30_55
-bit 30_64
-bit 30_65
-bit 30_66
-bit 30_67
-bit 30_68
-bit 30_69
-bit 30_70
-bit 30_71
-bit 30_72
-bit 30_73
-bit 30_74
-bit 30_75
-bit 30_80
-bit 30_81
-bit 30_82
-bit 30_83
-bit 30_84
-bit 30_85
-bit 30_86
-bit 30_87
-bit 30_88
-bit 30_89
-bit 30_90
-bit 30_91
-bit 30_92
-bit 30_93
-bit 30_94
-bit 30_95
-bit 30_96
-bit 30_97
-bit 30_98
-bit 30_99
-bit 30_100
-bit 30_101
-bit 30_102
-bit 30_103
-bit 30_108
-bit 30_109
-bit 30_110
-bit 30_112
-bit 30_113
-bit 30_114
-bit 30_115
-bit 30_116
-bit 30_117
-bit 30_118
-bit 30_119
-bit 30_128
-bit 30_129
-bit 30_136
-bit 30_137
-bit 30_138
-bit 30_139
-bit 30_140
-bit 30_141
-bit 30_142
-bit 30_143
-bit 30_144
-bit 30_145
-bit 30_146
-bit 30_151
-bit 30_152
-bit 30_153
-bit 30_156
-bit 30_157
-bit 30_184
-bit 30_185
-bit 30_186
-bit 30_187
-bit 30_188
-bit 30_189
-bit 30_190
-bit 30_191
-bit 30_192
-bit 30_193
-bit 30_194
-bit 30_195
-bit 30_196
-bit 30_197
-bit 30_198
-bit 30_199
-bit 30_200
-bit 30_201
-bit 30_202
-bit 30_203
-bit 30_204
-bit 30_205
-bit 30_206
-bit 30_207
-bit 30_232
-bit 30_233
-bit 30_234
-bit 30_235
-bit 30_236
-bit 30_237
-bit 30_238
-bit 30_239
-bit 30_240
-bit 30_241
-bit 30_242
-bit 30_243
-bit 30_244
-bit 30_245
-bit 30_246
-bit 30_247
-bit 30_248
-bit 30_249
-bit 30_250
-bit 30_251
-bit 30_252
-bit 30_253
-bit 30_254
-bit 30_255
-bit 30_256
-bit 30_257
-bit 30_258
-bit 30_259
-bit 30_260
-bit 30_261
-bit 30_262
-bit 30_263
-bit 30_264
-bit 30_265
-bit 30_266
-bit 30_267
-bit 30_268
-bit 30_269
-bit 30_270
-bit 30_271
-bit 30_272
-bit 30_273
-bit 30_274
-bit 30_276
-bit 30_277
-bit 30_278
-bit 30_288
-bit 30_292
-bit 30_293
-bit 30_296
-bit 30_297
-bit 30_298
-bit 30_299
-bit 30_300
-bit 30_301
-bit 30_302
-bit 30_303
-bit 30_304
-bit 30_305
-bit 30_328
-bit 30_329
-bit 30_330
-bit 30_336
-bit 30_337
-bit 30_338
-bit 30_339
-bit 30_340
-bit 30_341
-bit 30_342
-bit 30_343
-bit 30_344
-bit 30_345
-bit 30_346
-bit 30_347
-bit 30_348
-bit 30_349
-bit 30_350
-bit 30_351
-bit 30_368
-bit 30_369
-bit 30_370
-bit 30_371
-bit 30_372
-bit 30_373
-bit 30_374
-bit 30_375
-bit 30_376
-bit 30_377
-bit 30_378
-bit 30_379
-bit 30_384
-bit 30_386
-bit 30_390
-bit 30_391
-bit 30_392
-bit 30_393
-bit 30_394
-bit 30_395
-bit 30_396
-bit 30_397
-bit 30_398
-bit 30_399
-bit 30_400
-bit 30_401
-bit 30_402
-bit 30_403
-bit 30_404
-bit 30_405
-bit 30_406
-bit 30_407
-bit 30_408
-bit 30_409
-bit 30_410
-bit 30_411
-bit 30_412
-bit 30_413
-bit 30_416
-bit 30_417
-bit 30_418
-bit 30_419
-bit 30_424
-bit 30_425
-bit 30_426
-bit 30_427
-bit 30_428
-bit 30_429
-bit 30_430
-bit 30_431
-bit 30_432
-bit 30_433
-bit 30_434
-bit 30_435
-bit 30_436
-bit 30_437
-bit 30_438
-bit 30_439
-bit 30_440
-bit 30_441
-bit 30_442
-bit 30_443
-bit 30_459
-bit 30_460
-bit 30_461
-bit 30_462
-bit 30_463
-bit 30_464
-bit 30_465
-bit 30_466
-bit 30_467
-bit 30_468
-bit 30_469
-bit 30_470
-bit 30_471
-bit 30_472
-bit 30_473
-bit 30_488
-bit 30_489
-bit 30_490
-bit 30_491
-bit 30_496
-bit 30_497
-bit 30_498
-bit 30_504
-bit 30_505
-bit 30_506
-bit 30_507
-bit 30_508
-bit 30_509
-bit 30_510
-bit 30_511
-bit 30_512
-bit 30_513
-bit 30_514
-bit 30_515
-bit 30_516
-bit 30_517
-bit 30_518
-bit 30_519
-bit 30_520
-bit 30_521
-bit 30_522
-bit 30_523
-bit 30_524
-bit 30_525
-bit 30_526
-bit 30_527
-bit 30_528
-bit 30_529
-bit 30_530
-bit 30_531
-bit 30_532
-bit 30_533
-bit 30_534
-bit 30_535
-bit 30_536
-bit 30_537
-bit 30_538
-bit 30_544
-bit 30_545
-bit 30_546
-bit 30_547
-bit 30_548
-bit 30_552
-bit 30_553
-bit 30_554
-bit 30_555
-bit 30_556
-bit 30_557
-bit 30_558
-bit 30_559
-bit 30_560
-bit 30_561
-bit 30_568
-bit 30_569
-bit 30_570
-bit 30_571
-bit 30_572
-bit 30_576
-bit 30_577
-bit 30_578
-bit 30_579
-bit 30_580
-bit 30_584
-bit 30_585
-bit 30_586
-bit 30_587
-bit 30_588
-bit 30_589
-bit 30_590
-bit 30_591
-bit 30_592
-bit 30_593
-bit 30_594
-bit 30_595
-bit 30_600
-bit 30_601
-bit 30_602
-bit 30_603
-bit 30_604
-bit 30_605
-bit 30_606
-bit 30_607
-bit 30_608
-bit 30_609
-bit 30_610
-bit 30_611
-bit 30_616
-bit 30_617
-bit 30_618
-bit 30_619
-bit 30_620
-bit 30_621
-bit 30_622
-bit 30_624
-bit 30_625
-bit 30_626
-bit 30_627
-bit 30_628
-bit 30_632
-bit 30_633
-bit 30_634
-bit 30_638
-bit 30_640
-bit 30_641
-bit 30_642
-bit 30_643
-bit 30_644
-bit 30_645
-bit 30_646
-bit 30_647
-bit 30_648
-bit 30_649
-bit 30_650
-bit 30_651
-bit 30_652
-bit 30_653
-bit 30_654
-bit 30_655
-bit 30_656
-bit 30_657
-bit 30_658
-bit 30_659
-bit 30_660
-bit 30_661
-bit 30_662
-bit 30_663
-bit 30_664
-bit 30_665
-bit 30_666
-bit 30_667
-bit 30_668
-bit 30_669
-bit 30_670
-bit 30_671
-bit 30_672
-bit 30_673
-bit 30_674
-bit 30_675
-bit 30_676
-bit 30_677
-bit 30_678
-bit 30_679
-bit 30_680
-bit 30_681
-bit 31_01
-bit 31_04
-bit 31_11
-bit 31_13
-bit 31_20
-bit 31_23
-bit 31_40
-bit 31_41
-bit 31_42
-bit 31_43
-bit 31_44
-bit 31_55
-bit 31_64
-bit 31_65
-bit 31_66
-bit 31_67
-bit 31_68
-bit 31_69
-bit 31_70
-bit 31_71
-bit 31_72
-bit 31_73
-bit 31_74
-bit 31_75
-bit 31_80
-bit 31_81
-bit 31_82
-bit 31_83
-bit 31_84
-bit 31_85
-bit 31_86
-bit 31_87
-bit 31_88
-bit 31_89
-bit 31_90
-bit 31_91
-bit 31_92
-bit 31_93
-bit 31_94
-bit 31_95
-bit 31_96
-bit 31_97
-bit 31_98
-bit 31_99
-bit 31_100
-bit 31_101
-bit 31_102
-bit 31_103
-bit 31_108
-bit 31_109
-bit 31_112
-bit 31_113
-bit 31_114
-bit 31_115
-bit 31_116
-bit 31_117
-bit 31_118
-bit 31_119
-bit 31_128
-bit 31_129
-bit 31_136
-bit 31_137
-bit 31_138
-bit 31_139
-bit 31_140
-bit 31_141
-bit 31_142
-bit 31_144
-bit 31_145
-bit 31_150
-bit 31_151
-bit 31_152
-bit 31_156
-bit 31_157
-bit 31_159
-bit 31_184
-bit 31_185
-bit 31_186
-bit 31_187
-bit 31_188
-bit 31_189
-bit 31_190
-bit 31_191
-bit 31_192
-bit 31_193
-bit 31_194
-bit 31_195
-bit 31_196
-bit 31_197
-bit 31_198
-bit 31_199
-bit 31_200
-bit 31_201
-bit 31_202
-bit 31_203
-bit 31_204
-bit 31_205
-bit 31_206
-bit 31_207
-bit 31_232
-bit 31_233
-bit 31_234
-bit 31_236
-bit 31_237
-bit 31_238
-bit 31_240
-bit 31_241
-bit 31_242
-bit 31_244
-bit 31_245
-bit 31_246
-bit 31_248
-bit 31_249
-bit 31_250
-bit 31_252
-bit 31_253
-bit 31_254
-bit 31_256
-bit 31_257
-bit 31_258
-bit 31_260
-bit 31_261
-bit 31_262
-bit 31_264
-bit 31_265
-bit 31_266
-bit 31_268
-bit 31_269
-bit 31_270
-bit 31_272
-bit 31_273
-bit 31_274
-bit 31_276
-bit 31_277
-bit 31_278
-bit 31_288
-bit 31_289
-bit 31_292
-bit 31_296
-bit 31_297
-bit 31_298
-bit 31_299
-bit 31_300
-bit 31_301
-bit 31_302
-bit 31_303
-bit 31_304
-bit 31_305
-bit 31_311
-bit 31_328
-bit 31_329
-bit 31_336
-bit 31_337
-bit 31_338
-bit 31_339
-bit 31_340
-bit 31_341
-bit 31_342
-bit 31_343
-bit 31_344
-bit 31_345
-bit 31_346
-bit 31_347
-bit 31_348
-bit 31_349
-bit 31_350
-bit 31_351
-bit 31_368
-bit 31_369
-bit 31_370
-bit 31_371
-bit 31_372
-bit 31_373
-bit 31_374
-bit 31_375
-bit 31_376
-bit 31_377
-bit 31_378
-bit 31_379
-bit 31_384
-bit 31_386
-bit 31_389
-bit 31_390
-bit 31_391
-bit 31_392
-bit 31_393
-bit 31_394
-bit 31_395
-bit 31_396
-bit 31_397
-bit 31_398
-bit 31_399
-bit 31_400
-bit 31_401
-bit 31_402
-bit 31_403
-bit 31_404
-bit 31_405
-bit 31_406
-bit 31_407
-bit 31_408
-bit 31_409
-bit 31_410
-bit 31_411
-bit 31_412
-bit 31_416
-bit 31_417
-bit 31_418
-bit 31_424
-bit 31_425
-bit 31_426
-bit 31_427
-bit 31_428
-bit 31_429
-bit 31_430
-bit 31_431
-bit 31_432
-bit 31_433
-bit 31_434
-bit 31_435
-bit 31_436
-bit 31_437
-bit 31_438
-bit 31_439
-bit 31_440
-bit 31_441
-bit 31_442
-bit 31_443
-bit 31_459
-bit 31_460
-bit 31_461
-bit 31_463
-bit 31_464
-bit 31_465
-bit 31_466
-bit 31_467
-bit 31_468
-bit 31_469
-bit 31_470
-bit 31_471
-bit 31_472
-bit 31_473
-bit 31_488
-bit 31_489
-bit 31_490
-bit 31_491
-bit 31_496
-bit 31_497
-bit 31_498
-bit 31_504
-bit 31_505
-bit 31_506
-bit 31_507
-bit 31_508
-bit 31_509
-bit 31_510
-bit 31_511
-bit 31_512
-bit 31_513
-bit 31_514
-bit 31_515
-bit 31_516
-bit 31_517
-bit 31_518
-bit 31_519
-bit 31_520
-bit 31_521
-bit 31_522
-bit 31_523
-bit 31_524
-bit 31_525
-bit 31_526
-bit 31_527
-bit 31_528
-bit 31_529
-bit 31_530
-bit 31_531
-bit 31_532
-bit 31_533
-bit 31_534
-bit 31_535
-bit 31_536
-bit 31_537
-bit 31_538
-bit 31_544
-bit 31_545
-bit 31_546
-bit 31_552
-bit 31_553
-bit 31_554
-bit 31_555
-bit 31_556
-bit 31_557
-bit 31_558
-bit 31_559
-bit 31_560
-bit 31_568
-bit 31_569
-bit 31_570
-bit 31_571
-bit 31_576
-bit 31_577
-bit 31_578
-bit 31_579
-bit 31_584
-bit 31_585
-bit 31_586
-bit 31_587
-bit 31_588
-bit 31_589
-bit 31_590
-bit 31_591
-bit 31_592
-bit 31_593
-bit 31_594
-bit 31_595
-bit 31_600
-bit 31_601
-bit 31_602
-bit 31_603
-bit 31_604
-bit 31_605
-bit 31_606
-bit 31_607
-bit 31_608
-bit 31_609
-bit 31_610
-bit 31_611
-bit 31_616
-bit 31_617
-bit 31_618
-bit 31_619
-bit 31_620
-bit 31_621
-bit 31_622
-bit 31_624
-bit 31_625
-bit 31_626
-bit 31_627
-bit 31_628
-bit 31_632
-bit 31_633
-bit 31_634
-bit 31_637
-bit 31_638
-bit 31_640
-bit 31_641
-bit 31_642
-bit 31_643
-bit 31_644
-bit 31_645
-bit 31_646
-bit 31_647
-bit 31_648
-bit 31_649
-bit 31_650
-bit 31_651
-bit 31_652
-bit 31_653
-bit 31_654
-bit 31_655
-bit 31_656
-bit 31_657
-bit 31_658
-bit 31_659
-bit 31_660
-bit 31_661
-bit 31_662
-bit 31_663
-bit 31_664
-bit 31_665
-bit 31_666
-bit 31_667
-bit 31_668
-bit 31_669
-bit 31_670
-bit 31_671
-bit 31_672
-bit 31_673
-bit 31_674
-bit 31_675
-bit 31_676
-bit 31_677
-bit 31_678
-bit 31_679
-bit 31_680

diff --git a/artix7/mask_gtp_channel_2.db b/artix7/mask_gtp_channel_2.db
index c576c8c..47663d6 100644
--- a/artix7/mask_gtp_channel_2.db
+++ b/artix7/mask_gtp_channel_2.db

@@ -1,1637 +1,3 @@
-bit 00_00
-bit 00_01
-bit 00_07
-bit 00_47
-bit 00_52
-bit 00_53
-bit 00_65
-bit 00_102
-bit 00_103
-bit 00_104
-bit 00_105
-bit 00_106
-bit 00_107
-bit 00_108
-bit 00_109
-bit 00_110
-bit 00_111
-bit 00_112
-bit 00_113
-bit 00_114
-bit 00_115
-bit 00_116
-bit 00_117
-bit 00_124
-bit 00_125
-bit 00_128
-bit 00_129
-bit 00_130
-bit 00_131
-bit 00_132
-bit 00_133
-bit 00_134
-bit 00_135
-bit 00_136
-bit 00_138
-bit 00_139
-bit 00_140
-bit 00_141
-bit 00_142
-bit 00_143
-bit 00_144
-bit 00_145
-bit 00_146
-bit 00_147
-bit 00_148
-bit 00_149
-bit 00_150
-bit 00_151
-bit 00_152
-bit 00_153
-bit 00_154
-bit 00_155
-bit 00_156
-bit 00_157
-bit 00_158
-bit 00_159
-bit 00_160
-bit 00_161
-bit 00_162
-bit 00_163
-bit 00_164
-bit 00_165
-bit 00_168
-bit 00_169
-bit 00_170
-bit 00_171
-bit 00_172
-bit 00_173
-bit 00_174
-bit 00_176
-bit 00_177
-bit 00_178
-bit 00_179
-bit 00_180
-bit 00_181
-bit 00_187
-bit 00_188
-bit 00_189
-bit 00_190
-bit 00_191
-bit 00_192
-bit 00_193
-bit 00_194
-bit 00_195
-bit 00_200
-bit 00_203
-bit 00_204
-bit 00_205
-bit 00_206
-bit 00_208
-bit 00_209
-bit 00_210
-bit 00_211
-bit 00_212
-bit 00_213
-bit 00_214
-bit 00_215
-bit 00_216
-bit 00_217
-bit 00_218
-bit 00_219
-bit 00_220
-bit 00_221
-bit 00_222
-bit 00_224
-bit 00_225
-bit 00_231
-bit 00_247
-bit 00_288
-bit 00_289
-bit 00_290
-bit 00_291
-bit 00_292
-bit 00_293
-bit 00_294
-bit 00_336
-bit 00_337
-bit 00_338
-bit 00_339
-bit 00_340
-bit 00_341
-bit 00_342
-bit 00_343
-bit 00_344
-bit 00_345
-bit 00_346
-bit 00_347
-bit 00_348
-bit 00_349
-bit 00_350
-bit 00_351
-bit 00_352
-bit 00_353
-bit 00_354
-bit 00_355
-bit 00_356
-bit 00_357
-bit 00_358
-bit 00_359
-bit 00_360
-bit 00_361
-bit 00_362
-bit 00_363
-bit 00_364
-bit 00_365
-bit 00_366
-bit 00_367
-bit 00_368
-bit 00_369
-bit 00_370
-bit 00_371
-bit 00_372
-bit 00_373
-bit 00_374
-bit 00_375
-bit 00_376
-bit 00_377
-bit 00_378
-bit 00_379
-bit 00_380
-bit 00_381
-bit 00_382
-bit 00_383
-bit 00_384
-bit 00_385
-bit 00_386
-bit 00_387
-bit 00_388
-bit 00_389
-bit 00_390
-bit 00_391
-bit 00_392
-bit 00_393
-bit 00_394
-bit 00_395
-bit 00_396
-bit 00_397
-bit 00_398
-bit 00_399
-bit 00_400
-bit 00_401
-bit 00_402
-bit 00_403
-bit 00_404
-bit 00_405
-bit 00_406
-bit 00_407
-bit 00_408
-bit 00_409
-bit 00_410
-bit 00_411
-bit 00_412
-bit 00_413
-bit 00_414
-bit 00_415
-bit 00_416
-bit 00_417
-bit 00_418
-bit 00_419
-bit 00_420
-bit 00_421
-bit 00_422
-bit 00_423
-bit 00_424
-bit 00_425
-bit 00_426
-bit 00_427
-bit 00_428
-bit 00_429
-bit 00_430
-bit 00_431
-bit 00_432
-bit 00_433
-bit 00_434
-bit 00_435
-bit 00_436
-bit 00_437
-bit 00_438
-bit 00_439
-bit 00_440
-bit 00_441
-bit 00_442
-bit 00_443
-bit 00_444
-bit 00_445
-bit 00_446
-bit 00_447
-bit 00_448
-bit 00_449
-bit 00_450
-bit 00_451
-bit 00_452
-bit 00_453
-bit 00_454
-bit 00_455
-bit 00_456
-bit 00_457
-bit 00_458
-bit 00_459
-bit 00_460
-bit 00_461
-bit 00_462
-bit 00_463
-bit 00_464
-bit 00_465
-bit 00_466
-bit 00_467
-bit 00_468
-bit 00_469
-bit 00_470
-bit 00_471
-bit 00_472
-bit 00_473
-bit 00_474
-bit 00_475
-bit 00_476
-bit 00_478
-bit 00_479
-bit 00_480
-bit 00_481
-bit 00_482
-bit 00_483
-bit 00_484
-bit 00_485
-bit 00_488
-bit 00_489
-bit 00_490
-bit 00_492
-bit 00_494
-bit 00_495
-bit 00_496
-bit 00_497
-bit 00_498
-bit 00_499
-bit 00_500
-bit 00_504
-bit 00_505
-bit 00_506
-bit 00_507
-bit 00_508
-bit 00_512
-bit 00_513
-bit 00_514
-bit 00_515
-bit 00_516
-bit 00_519
-bit 00_520
-bit 00_521
-bit 00_522
-bit 00_523
-bit 00_524
-bit 00_525
-bit 00_526
-bit 00_527
-bit 00_544
-bit 00_545
-bit 00_546
-bit 00_547
-bit 00_548
-bit 00_549
-bit 00_550
-bit 00_551
-bit 00_552
-bit 00_553
-bit 00_554
-bit 00_555
-bit 00_556
-bit 00_557
-bit 00_558
-bit 00_559
-bit 00_560
-bit 00_561
-bit 00_562
-bit 00_563
-bit 00_564
-bit 00_565
-bit 00_566
-bit 00_567
-bit 00_568
-bit 00_569
-bit 00_570
-bit 00_571
-bit 00_572
-bit 00_573
-bit 00_574
-bit 00_575
-bit 00_576
-bit 00_577
-bit 00_578
-bit 00_579
-bit 00_580
-bit 00_581
-bit 00_582
-bit 00_583
-bit 00_584
-bit 00_585
-bit 00_586
-bit 00_587
-bit 00_588
-bit 00_589
-bit 00_590
-bit 00_591
-bit 00_592
-bit 00_593
-bit 00_594
-bit 00_595
-bit 00_596
-bit 00_600
-bit 00_601
-bit 00_602
-bit 00_603
-bit 00_604
-bit 00_608
-bit 00_609
-bit 00_610
-bit 00_611
-bit 00_612
-bit 00_614
-bit 00_615
-bit 00_616
-bit 00_617
-bit 00_618
-bit 00_619
-bit 00_620
-bit 00_623
-bit 00_624
-bit 00_625
-bit 00_626
-bit 00_627
-bit 00_628
-bit 00_632
-bit 00_633
-bit 00_634
-bit 00_635
-bit 00_636
-bit 00_640
-bit 00_641
-bit 00_642
-bit 00_643
-bit 00_644
-bit 00_646
-bit 00_647
-bit 00_648
-bit 00_649
-bit 00_650
-bit 00_651
-bit 00_652
-bit 00_654
-bit 00_655
-bit 00_656
-bit 00_657
-bit 00_658
-bit 00_659
-bit 00_660
-bit 00_662
-bit 00_663
-bit 00_664
-bit 00_665
-bit 00_666
-bit 00_667
-bit 00_668
-bit 00_670
-bit 00_671
-bit 00_672
-bit 00_673
-bit 00_674
-bit 00_675
-bit 00_676
-bit 00_677
-bit 00_678
-bit 00_679
-bit 00_680
-bit 00_681
-bit 00_682
-bit 00_683
-bit 00_684
-bit 00_685
-bit 00_686
-bit 00_687
-bit 00_696
-bit 00_697
-bit 00_698
-bit 00_700
-bit 00_701
-bit 00_702
-bit 01_00
-bit 01_01
-bit 01_06
-bit 01_07
-bit 01_47
-bit 01_101
-bit 01_102
-bit 01_103
-bit 01_104
-bit 01_105
-bit 01_106
-bit 01_107
-bit 01_108
-bit 01_109
-bit 01_110
-bit 01_112
-bit 01_113
-bit 01_114
-bit 01_115
-bit 01_116
-bit 01_117
-bit 01_123
-bit 01_124
-bit 01_125
-bit 01_128
-bit 01_129
-bit 01_130
-bit 01_131
-bit 01_132
-bit 01_133
-bit 01_134
-bit 01_135
-bit 01_138
-bit 01_139
-bit 01_140
-bit 01_141
-bit 01_142
-bit 01_144
-bit 01_145
-bit 01_146
-bit 01_147
-bit 01_148
-bit 01_149
-bit 01_150
-bit 01_151
-bit 01_152
-bit 01_153
-bit 01_154
-bit 01_155
-bit 01_156
-bit 01_157
-bit 01_158
-bit 01_160
-bit 01_161
-bit 01_162
-bit 01_163
-bit 01_164
-bit 01_165
-bit 01_168
-bit 01_169
-bit 01_170
-bit 01_171
-bit 01_172
-bit 01_173
-bit 01_176
-bit 01_177
-bit 01_178
-bit 01_179
-bit 01_180
-bit 01_181
-bit 01_187
-bit 01_188
-bit 01_189
-bit 01_190
-bit 01_191
-bit 01_192
-bit 01_193
-bit 01_194
-bit 01_195
-bit 01_202
-bit 01_203
-bit 01_204
-bit 01_205
-bit 01_207
-bit 01_208
-bit 01_209
-bit 01_210
-bit 01_211
-bit 01_212
-bit 01_213
-bit 01_214
-bit 01_215
-bit 01_216
-bit 01_217
-bit 01_218
-bit 01_219
-bit 01_220
-bit 01_221
-bit 01_224
-bit 01_226
-bit 01_231
-bit 01_288
-bit 01_289
-bit 01_290
-bit 01_291
-bit 01_292
-bit 01_293
-bit 01_336
-bit 01_337
-bit 01_338
-bit 01_339
-bit 01_340
-bit 01_341
-bit 01_342
-bit 01_343
-bit 01_344
-bit 01_345
-bit 01_346
-bit 01_347
-bit 01_348
-bit 01_349
-bit 01_350
-bit 01_351
-bit 01_352
-bit 01_353
-bit 01_354
-bit 01_355
-bit 01_356
-bit 01_357
-bit 01_358
-bit 01_359
-bit 01_360
-bit 01_361
-bit 01_362
-bit 01_363
-bit 01_364
-bit 01_365
-bit 01_366
-bit 01_367
-bit 01_368
-bit 01_369
-bit 01_370
-bit 01_371
-bit 01_372
-bit 01_373
-bit 01_374
-bit 01_375
-bit 01_376
-bit 01_377
-bit 01_378
-bit 01_379
-bit 01_380
-bit 01_381
-bit 01_382
-bit 01_383
-bit 01_384
-bit 01_385
-bit 01_386
-bit 01_387
-bit 01_388
-bit 01_389
-bit 01_390
-bit 01_391
-bit 01_392
-bit 01_393
-bit 01_394
-bit 01_395
-bit 01_396
-bit 01_397
-bit 01_398
-bit 01_399
-bit 01_400
-bit 01_401
-bit 01_402
-bit 01_403
-bit 01_404
-bit 01_405
-bit 01_406
-bit 01_407
-bit 01_408
-bit 01_409
-bit 01_410
-bit 01_411
-bit 01_412
-bit 01_413
-bit 01_414
-bit 01_415
-bit 01_416
-bit 01_417
-bit 01_418
-bit 01_419
-bit 01_420
-bit 01_421
-bit 01_422
-bit 01_423
-bit 01_424
-bit 01_425
-bit 01_426
-bit 01_427
-bit 01_428
-bit 01_429
-bit 01_430
-bit 01_431
-bit 01_432
-bit 01_433
-bit 01_434
-bit 01_435
-bit 01_436
-bit 01_437
-bit 01_438
-bit 01_439
-bit 01_440
-bit 01_441
-bit 01_442
-bit 01_443
-bit 01_444
-bit 01_445
-bit 01_446
-bit 01_447
-bit 01_448
-bit 01_449
-bit 01_450
-bit 01_451
-bit 01_452
-bit 01_453
-bit 01_454
-bit 01_455
-bit 01_456
-bit 01_457
-bit 01_458
-bit 01_459
-bit 01_460
-bit 01_461
-bit 01_462
-bit 01_463
-bit 01_464
-bit 01_465
-bit 01_466
-bit 01_467
-bit 01_468
-bit 01_469
-bit 01_470
-bit 01_471
-bit 01_472
-bit 01_473
-bit 01_474
-bit 01_475
-bit 01_477
-bit 01_478
-bit 01_479
-bit 01_480
-bit 01_481
-bit 01_482
-bit 01_483
-bit 01_484
-bit 01_485
-bit 01_488
-bit 01_489
-bit 01_490
-bit 01_492
-bit 01_494
-bit 01_495
-bit 01_496
-bit 01_497
-bit 01_498
-bit 01_499
-bit 01_500
-bit 01_504
-bit 01_505
-bit 01_506
-bit 01_507
-bit 01_508
-bit 01_512
-bit 01_513
-bit 01_514
-bit 01_515
-bit 01_516
-bit 01_519
-bit 01_520
-bit 01_521
-bit 01_522
-bit 01_523
-bit 01_524
-bit 01_525
-bit 01_526
-bit 01_544
-bit 01_545
-bit 01_546
-bit 01_547
-bit 01_548
-bit 01_549
-bit 01_550
-bit 01_552
-bit 01_553
-bit 01_554
-bit 01_555
-bit 01_556
-bit 01_557
-bit 01_558
-bit 01_559
-bit 01_560
-bit 01_561
-bit 01_562
-bit 01_563
-bit 01_564
-bit 01_565
-bit 01_566
-bit 01_567
-bit 01_568
-bit 01_569
-bit 01_570
-bit 01_571
-bit 01_572
-bit 01_573
-bit 01_574
-bit 01_576
-bit 01_577
-bit 01_578
-bit 01_579
-bit 01_580
-bit 01_581
-bit 01_582
-bit 01_584
-bit 01_585
-bit 01_586
-bit 01_587
-bit 01_588
-bit 01_589
-bit 01_592
-bit 01_593
-bit 01_594
-bit 01_595
-bit 01_596
-bit 01_600
-bit 01_601
-bit 01_602
-bit 01_603
-bit 01_604
-bit 01_607
-bit 01_608
-bit 01_609
-bit 01_610
-bit 01_611
-bit 01_612
-bit 01_614
-bit 01_615
-bit 01_616
-bit 01_617
-bit 01_618
-bit 01_619
-bit 01_620
-bit 01_623
-bit 01_624
-bit 01_625
-bit 01_626
-bit 01_627
-bit 01_628
-bit 01_631
-bit 01_632
-bit 01_633
-bit 01_634
-bit 01_635
-bit 01_636
-bit 01_640
-bit 01_641
-bit 01_642
-bit 01_643
-bit 01_644
-bit 01_645
-bit 01_646
-bit 01_647
-bit 01_648
-bit 01_649
-bit 01_650
-bit 01_651
-bit 01_652
-bit 01_653
-bit 01_654
-bit 01_655
-bit 01_656
-bit 01_657
-bit 01_658
-bit 01_659
-bit 01_660
-bit 01_661
-bit 01_662
-bit 01_663
-bit 01_664
-bit 01_665
-bit 01_666
-bit 01_667
-bit 01_668
-bit 01_670
-bit 01_671
-bit 01_672
-bit 01_673
-bit 01_674
-bit 01_675
-bit 01_676
-bit 01_677
-bit 01_678
-bit 01_679
-bit 01_680
-bit 01_681
-bit 01_682
-bit 01_683
-bit 01_684
-bit 01_685
-bit 01_686
-bit 01_687
-bit 01_696
-bit 01_697
-bit 01_698
-bit 01_700
-bit 01_701
-bit 02_00
-bit 02_02
-bit 02_03
-bit 02_05
-bit 02_11
-bit 02_13
-bit 02_20
-bit 02_23
-bit 02_40
-bit 02_41
-bit 02_42
-bit 02_43
-bit 02_44
-bit 02_45
-bit 02_55
-bit 02_64
-bit 02_65
-bit 02_66
-bit 02_67
-bit 02_68
-bit 02_69
-bit 02_70
-bit 02_71
-bit 02_72
-bit 02_73
-bit 02_74
-bit 02_75
-bit 02_80
-bit 02_81
-bit 02_82
-bit 02_83
-bit 02_84
-bit 02_85
-bit 02_86
-bit 02_87
-bit 02_88
-bit 02_89
-bit 02_90
-bit 02_91
-bit 02_92
-bit 02_93
-bit 02_94
-bit 02_95
-bit 02_96
-bit 02_97
-bit 02_98
-bit 02_99
-bit 02_100
-bit 02_101
-bit 02_102
-bit 02_103
-bit 02_108
-bit 02_109
-bit 02_110
-bit 02_112
-bit 02_113
-bit 02_114
-bit 02_115
-bit 02_116
-bit 02_117
-bit 02_118
-bit 02_119
-bit 02_128
-bit 02_129
-bit 02_136
-bit 02_137
-bit 02_138
-bit 02_139
-bit 02_140
-bit 02_141
-bit 02_142
-bit 02_143
-bit 02_144
-bit 02_145
-bit 02_146
-bit 02_151
-bit 02_152
-bit 02_153
-bit 02_156
-bit 02_157
-bit 02_184
-bit 02_185
-bit 02_186
-bit 02_187
-bit 02_188
-bit 02_189
-bit 02_190
-bit 02_191
-bit 02_192
-bit 02_193
-bit 02_194
-bit 02_195
-bit 02_196
-bit 02_197
-bit 02_198
-bit 02_199
-bit 02_200
-bit 02_201
-bit 02_202
-bit 02_203
-bit 02_204
-bit 02_205
-bit 02_206
-bit 02_207
-bit 02_232
-bit 02_233
-bit 02_234
-bit 02_235
-bit 02_236
-bit 02_237
-bit 02_238
-bit 02_239
-bit 02_240
-bit 02_241
-bit 02_242
-bit 02_243
-bit 02_244
-bit 02_245
-bit 02_246
-bit 02_247
-bit 02_248
-bit 02_249
-bit 02_250
-bit 02_251
-bit 02_252
-bit 02_253
-bit 02_254
-bit 02_255
-bit 02_256
-bit 02_257
-bit 02_258
-bit 02_259
-bit 02_260
-bit 02_261
-bit 02_262
-bit 02_263
-bit 02_264
-bit 02_265
-bit 02_266
-bit 02_267
-bit 02_268
-bit 02_269
-bit 02_270
-bit 02_271
-bit 02_272
-bit 02_273
-bit 02_274
-bit 02_276
-bit 02_277
-bit 02_278
-bit 02_288
-bit 02_292
-bit 02_293
-bit 02_296
-bit 02_297
-bit 02_298
-bit 02_299
-bit 02_300
-bit 02_301
-bit 02_302
-bit 02_303
-bit 02_304
-bit 02_305
-bit 02_328
-bit 02_329
-bit 02_330
-bit 02_336
-bit 02_337
-bit 02_338
-bit 02_339
-bit 02_340
-bit 02_341
-bit 02_342
-bit 02_343
-bit 02_344
-bit 02_345
-bit 02_346
-bit 02_347
-bit 02_348
-bit 02_349
-bit 02_350
-bit 02_351
-bit 02_368
-bit 02_369
-bit 02_370
-bit 02_371
-bit 02_372
-bit 02_373
-bit 02_374
-bit 02_375
-bit 02_376
-bit 02_377
-bit 02_378
-bit 02_379
-bit 02_384
-bit 02_386
-bit 02_390
-bit 02_391
-bit 02_392
-bit 02_393
-bit 02_394
-bit 02_395
-bit 02_396
-bit 02_397
-bit 02_398
-bit 02_399
-bit 02_400
-bit 02_401
-bit 02_402
-bit 02_403
-bit 02_404
-bit 02_405
-bit 02_406
-bit 02_407
-bit 02_408
-bit 02_409
-bit 02_410
-bit 02_411
-bit 02_412
-bit 02_413
-bit 02_416
-bit 02_417
-bit 02_418
-bit 02_419
-bit 02_424
-bit 02_425
-bit 02_426
-bit 02_427
-bit 02_428
-bit 02_429
-bit 02_430
-bit 02_431
-bit 02_432
-bit 02_433
-bit 02_434
-bit 02_435
-bit 02_436
-bit 02_437
-bit 02_438
-bit 02_439
-bit 02_440
-bit 02_441
-bit 02_442
-bit 02_443
-bit 02_459
-bit 02_460
-bit 02_461
-bit 02_462
-bit 02_463
-bit 02_464
-bit 02_465
-bit 02_466
-bit 02_467
-bit 02_468
-bit 02_469
-bit 02_470
-bit 02_471
-bit 02_472
-bit 02_473
-bit 02_488
-bit 02_489
-bit 02_490
-bit 02_491
-bit 02_496
-bit 02_497
-bit 02_498
-bit 02_504
-bit 02_505
-bit 02_506
-bit 02_507
-bit 02_508
-bit 02_509
-bit 02_510
-bit 02_511
-bit 02_512
-bit 02_513
-bit 02_514
-bit 02_515
-bit 02_516
-bit 02_517
-bit 02_518
-bit 02_519
-bit 02_520
-bit 02_521
-bit 02_522
-bit 02_523
-bit 02_524
-bit 02_525
-bit 02_526
-bit 02_527
-bit 02_528
-bit 02_529
-bit 02_530
-bit 02_531
-bit 02_532
-bit 02_533
-bit 02_534
-bit 02_535
-bit 02_536
-bit 02_537
-bit 02_538
-bit 02_544
-bit 02_545
-bit 02_546
-bit 02_547
-bit 02_548
-bit 02_552
-bit 02_553
-bit 02_554
-bit 02_555
-bit 02_556
-bit 02_557
-bit 02_558
-bit 02_559
-bit 02_560
-bit 02_561
-bit 02_568
-bit 02_569
-bit 02_570
-bit 02_571
-bit 02_572
-bit 02_576
-bit 02_577
-bit 02_578
-bit 02_579
-bit 02_580
-bit 02_584
-bit 02_585
-bit 02_586
-bit 02_587
-bit 02_588
-bit 02_589
-bit 02_590
-bit 02_591
-bit 02_592
-bit 02_593
-bit 02_594
-bit 02_595
-bit 02_600
-bit 02_601
-bit 02_602
-bit 02_603
-bit 02_604
-bit 02_605
-bit 02_606
-bit 02_607
-bit 02_608
-bit 02_609
-bit 02_610
-bit 02_611
-bit 02_616
-bit 02_617
-bit 02_618
-bit 02_619
-bit 02_620
-bit 02_621
-bit 02_622
-bit 02_624
-bit 02_625
-bit 02_626
-bit 02_627
-bit 02_628
-bit 02_632
-bit 02_633
-bit 02_634
-bit 02_638
-bit 02_640
-bit 02_641
-bit 02_642
-bit 02_643
-bit 02_644
-bit 02_645
-bit 02_646
-bit 02_647
-bit 02_648
-bit 02_649
-bit 02_650
-bit 02_651
-bit 02_652
-bit 02_653
-bit 02_654
-bit 02_655
-bit 02_656
-bit 02_657
-bit 02_658
-bit 02_659
-bit 02_660
-bit 02_661
-bit 02_662
-bit 02_663
-bit 02_664
-bit 02_665
-bit 02_666
-bit 02_667
-bit 02_668
-bit 02_669
-bit 02_670
-bit 02_671
-bit 02_672
-bit 02_673
-bit 02_674
-bit 02_675
-bit 02_676
-bit 02_677
-bit 02_678
-bit 02_679
-bit 02_680
-bit 02_681
-bit 03_01
-bit 03_04
-bit 03_11
-bit 03_13
-bit 03_20
-bit 03_23
-bit 03_40
-bit 03_41
-bit 03_42
-bit 03_43
-bit 03_44
-bit 03_55
-bit 03_64
-bit 03_65
-bit 03_66
-bit 03_67
-bit 03_68
-bit 03_69
-bit 03_70
-bit 03_71
-bit 03_72
-bit 03_73
-bit 03_74
-bit 03_75
-bit 03_80
-bit 03_81
-bit 03_82
-bit 03_83
-bit 03_84
-bit 03_85
-bit 03_86
-bit 03_87
-bit 03_88
-bit 03_89
-bit 03_90
-bit 03_91
-bit 03_92
-bit 03_93
-bit 03_94
-bit 03_95
-bit 03_96
-bit 03_97
-bit 03_98
-bit 03_99
-bit 03_100
-bit 03_101
-bit 03_102
-bit 03_103
-bit 03_108
-bit 03_109
-bit 03_112
-bit 03_113
-bit 03_114
-bit 03_115
-bit 03_116
-bit 03_117
-bit 03_118
-bit 03_119
-bit 03_128
-bit 03_129
-bit 03_136
-bit 03_137
-bit 03_138
-bit 03_139
-bit 03_140
-bit 03_141
-bit 03_142
-bit 03_144
-bit 03_145
-bit 03_150
-bit 03_151
-bit 03_152
-bit 03_156
-bit 03_157
-bit 03_159
-bit 03_184
-bit 03_185
-bit 03_186
-bit 03_187
-bit 03_188
-bit 03_189
-bit 03_190
-bit 03_191
-bit 03_192
-bit 03_193
-bit 03_194
-bit 03_195
-bit 03_196
-bit 03_197
-bit 03_198
-bit 03_199
-bit 03_200
-bit 03_201
-bit 03_202
-bit 03_203
-bit 03_204
-bit 03_205
-bit 03_206
-bit 03_207
-bit 03_232
-bit 03_233
-bit 03_234
-bit 03_236
-bit 03_237
-bit 03_238
-bit 03_240
-bit 03_241
-bit 03_242
-bit 03_244
-bit 03_245
-bit 03_246
-bit 03_248
-bit 03_249
-bit 03_250
-bit 03_252
-bit 03_253
-bit 03_254
-bit 03_256
-bit 03_257
-bit 03_258
-bit 03_260
-bit 03_261
-bit 03_262
-bit 03_264
-bit 03_265
-bit 03_266
-bit 03_268
-bit 03_269
-bit 03_270
-bit 03_272
-bit 03_273
-bit 03_274
-bit 03_276
-bit 03_277
-bit 03_278
-bit 03_288
-bit 03_289
-bit 03_292
-bit 03_296
-bit 03_297
-bit 03_298
-bit 03_299
-bit 03_300
-bit 03_301
-bit 03_302
-bit 03_303
-bit 03_304
-bit 03_305
-bit 03_311
-bit 03_328
-bit 03_329
-bit 03_336
-bit 03_337
-bit 03_338
-bit 03_339
-bit 03_340
-bit 03_341
-bit 03_342
-bit 03_343
-bit 03_344
-bit 03_345
-bit 03_346
-bit 03_347
-bit 03_348
-bit 03_349
-bit 03_350
-bit 03_351
-bit 03_368
-bit 03_369
-bit 03_370
-bit 03_371
-bit 03_372
-bit 03_373
-bit 03_374
-bit 03_375
-bit 03_376
-bit 03_377
-bit 03_378
-bit 03_379
-bit 03_384
-bit 03_386
-bit 03_389
-bit 03_390
-bit 03_391
-bit 03_392
-bit 03_393
-bit 03_394
-bit 03_395
-bit 03_396
-bit 03_397
-bit 03_398
-bit 03_399
-bit 03_400
-bit 03_401
-bit 03_402
-bit 03_403
-bit 03_404
-bit 03_405
-bit 03_406
-bit 03_407
-bit 03_408
-bit 03_409
-bit 03_410
-bit 03_411
-bit 03_412
-bit 03_416
-bit 03_417
-bit 03_418
-bit 03_424
-bit 03_425
-bit 03_426
-bit 03_427
-bit 03_428
-bit 03_429
-bit 03_430
-bit 03_431
-bit 03_432
-bit 03_433
-bit 03_434
-bit 03_435
-bit 03_436
-bit 03_437
-bit 03_438
-bit 03_439
-bit 03_440
-bit 03_441
-bit 03_442
-bit 03_443
-bit 03_459
-bit 03_460
-bit 03_461
-bit 03_463
-bit 03_464
-bit 03_465
-bit 03_466
-bit 03_467
-bit 03_468
-bit 03_469
-bit 03_470
-bit 03_471
-bit 03_472
-bit 03_473
-bit 03_488
-bit 03_489
-bit 03_490
-bit 03_491
-bit 03_496
-bit 03_497
-bit 03_498
-bit 03_504
-bit 03_505
-bit 03_506
-bit 03_507
-bit 03_508
-bit 03_509
-bit 03_510
-bit 03_511
-bit 03_512
-bit 03_513
-bit 03_514
-bit 03_515
-bit 03_516
-bit 03_517
-bit 03_518
-bit 03_519
-bit 03_520
-bit 03_521
-bit 03_522
-bit 03_523
-bit 03_524
-bit 03_525
-bit 03_526
-bit 03_527
-bit 03_528
-bit 03_529
-bit 03_530
-bit 03_531
-bit 03_532
-bit 03_533
-bit 03_534
-bit 03_535
-bit 03_536
-bit 03_537
-bit 03_538
-bit 03_544
-bit 03_545
-bit 03_546
-bit 03_552
-bit 03_553
-bit 03_554
-bit 03_555
-bit 03_556
-bit 03_557
-bit 03_558
-bit 03_559
-bit 03_560
-bit 03_568
-bit 03_569
-bit 03_570
-bit 03_571
-bit 03_576
-bit 03_577
-bit 03_578
-bit 03_579
-bit 03_584
-bit 03_585
-bit 03_586
-bit 03_587
-bit 03_588
-bit 03_589
-bit 03_590
-bit 03_591
-bit 03_592
-bit 03_593
-bit 03_594
-bit 03_595
-bit 03_600
-bit 03_601
-bit 03_602
-bit 03_603
-bit 03_604
-bit 03_605
-bit 03_606
-bit 03_607
-bit 03_608
-bit 03_609
-bit 03_610
-bit 03_611
-bit 03_616
-bit 03_617
-bit 03_618
-bit 03_619
-bit 03_620
-bit 03_621
-bit 03_622
-bit 03_624
-bit 03_625
-bit 03_626
-bit 03_627
-bit 03_628
-bit 03_632
-bit 03_633
-bit 03_634
-bit 03_637
-bit 03_638
-bit 03_640
-bit 03_641
-bit 03_642
-bit 03_643
-bit 03_644
-bit 03_645
-bit 03_646
-bit 03_647
-bit 03_648
-bit 03_649
-bit 03_650
-bit 03_651
-bit 03_652
-bit 03_653
-bit 03_654
-bit 03_655
-bit 03_656
-bit 03_657
-bit 03_658
-bit 03_659
-bit 03_660
-bit 03_661
-bit 03_662
-bit 03_663
-bit 03_664
-bit 03_665
-bit 03_666
-bit 03_667
-bit 03_668
-bit 03_669
-bit 03_670
-bit 03_671
-bit 03_672
-bit 03_673
-bit 03_674
-bit 03_675
-bit 03_676
-bit 03_677
-bit 03_678
-bit 03_679
-bit 03_680
 bit 28_00
 bit 28_01
 bit 28_07

diff --git a/artix7/mask_gtp_channel_2_mid_left.db b/artix7/mask_gtp_channel_2_mid_left.db
index c576c8c..6f48b45 100644
--- a/artix7/mask_gtp_channel_2_mid_left.db
+++ b/artix7/mask_gtp_channel_2_mid_left.db

@@ -1632,1637 +1632,3 @@
 bit 03_678
 bit 03_679
 bit 03_680
-bit 28_00
-bit 28_01
-bit 28_07
-bit 28_47
-bit 28_52
-bit 28_53
-bit 28_65
-bit 28_102
-bit 28_103
-bit 28_104
-bit 28_105
-bit 28_106
-bit 28_107
-bit 28_108
-bit 28_109
-bit 28_110
-bit 28_111
-bit 28_112
-bit 28_113
-bit 28_114
-bit 28_115
-bit 28_116
-bit 28_117
-bit 28_124
-bit 28_125
-bit 28_128
-bit 28_129
-bit 28_130
-bit 28_131
-bit 28_132
-bit 28_133
-bit 28_134
-bit 28_135
-bit 28_136
-bit 28_138
-bit 28_139
-bit 28_140
-bit 28_141
-bit 28_142
-bit 28_143
-bit 28_144
-bit 28_145
-bit 28_146
-bit 28_147
-bit 28_148
-bit 28_149
-bit 28_150
-bit 28_151
-bit 28_152
-bit 28_153
-bit 28_154
-bit 28_155
-bit 28_156
-bit 28_157
-bit 28_158
-bit 28_159
-bit 28_160
-bit 28_161
-bit 28_162
-bit 28_163
-bit 28_164
-bit 28_165
-bit 28_168
-bit 28_169
-bit 28_170
-bit 28_171
-bit 28_172
-bit 28_173
-bit 28_174
-bit 28_176
-bit 28_177
-bit 28_178
-bit 28_179
-bit 28_180
-bit 28_181
-bit 28_187
-bit 28_188
-bit 28_189
-bit 28_190
-bit 28_191
-bit 28_192
-bit 28_193
-bit 28_194
-bit 28_195
-bit 28_200
-bit 28_203
-bit 28_204
-bit 28_205
-bit 28_206
-bit 28_208
-bit 28_209
-bit 28_210
-bit 28_211
-bit 28_212
-bit 28_213
-bit 28_214
-bit 28_215
-bit 28_216
-bit 28_217
-bit 28_218
-bit 28_219
-bit 28_220
-bit 28_221
-bit 28_222
-bit 28_224
-bit 28_225
-bit 28_231
-bit 28_247
-bit 28_288
-bit 28_289
-bit 28_290
-bit 28_291
-bit 28_292
-bit 28_293
-bit 28_294
-bit 28_336
-bit 28_337
-bit 28_338
-bit 28_339
-bit 28_340
-bit 28_341
-bit 28_342
-bit 28_343
-bit 28_344
-bit 28_345
-bit 28_346
-bit 28_347
-bit 28_348
-bit 28_349
-bit 28_350
-bit 28_351
-bit 28_352
-bit 28_353
-bit 28_354
-bit 28_355
-bit 28_356
-bit 28_357
-bit 28_358
-bit 28_359
-bit 28_360
-bit 28_361
-bit 28_362
-bit 28_363
-bit 28_364
-bit 28_365
-bit 28_366
-bit 28_367
-bit 28_368
-bit 28_369
-bit 28_370
-bit 28_371
-bit 28_372
-bit 28_373
-bit 28_374
-bit 28_375
-bit 28_376
-bit 28_377
-bit 28_378
-bit 28_379
-bit 28_380
-bit 28_381
-bit 28_382
-bit 28_383
-bit 28_384
-bit 28_385
-bit 28_386
-bit 28_387
-bit 28_388
-bit 28_389
-bit 28_390
-bit 28_391
-bit 28_392
-bit 28_393
-bit 28_394
-bit 28_395
-bit 28_396
-bit 28_397
-bit 28_398
-bit 28_399
-bit 28_400
-bit 28_401
-bit 28_402
-bit 28_403
-bit 28_404
-bit 28_405
-bit 28_406
-bit 28_407
-bit 28_408
-bit 28_409
-bit 28_410
-bit 28_411
-bit 28_412
-bit 28_413
-bit 28_414
-bit 28_415
-bit 28_416
-bit 28_417
-bit 28_418
-bit 28_419
-bit 28_420
-bit 28_421
-bit 28_422
-bit 28_423
-bit 28_424
-bit 28_425
-bit 28_426
-bit 28_427
-bit 28_428
-bit 28_429
-bit 28_430
-bit 28_431
-bit 28_432
-bit 28_433
-bit 28_434
-bit 28_435
-bit 28_436
-bit 28_437
-bit 28_438
-bit 28_439
-bit 28_440
-bit 28_441
-bit 28_442
-bit 28_443
-bit 28_444
-bit 28_445
-bit 28_446
-bit 28_447
-bit 28_448
-bit 28_449
-bit 28_450
-bit 28_451
-bit 28_452
-bit 28_453
-bit 28_454
-bit 28_455
-bit 28_456
-bit 28_457
-bit 28_458
-bit 28_459
-bit 28_460
-bit 28_461
-bit 28_462
-bit 28_463
-bit 28_464
-bit 28_465
-bit 28_466
-bit 28_467
-bit 28_468
-bit 28_469
-bit 28_470
-bit 28_471
-bit 28_472
-bit 28_473
-bit 28_474
-bit 28_475
-bit 28_476
-bit 28_478
-bit 28_479
-bit 28_480
-bit 28_481
-bit 28_482
-bit 28_483
-bit 28_484
-bit 28_485
-bit 28_488
-bit 28_489
-bit 28_490
-bit 28_492
-bit 28_494
-bit 28_495
-bit 28_496
-bit 28_497
-bit 28_498
-bit 28_499
-bit 28_500
-bit 28_504
-bit 28_505
-bit 28_506
-bit 28_507
-bit 28_508
-bit 28_512
-bit 28_513
-bit 28_514
-bit 28_515
-bit 28_516
-bit 28_519
-bit 28_520
-bit 28_521
-bit 28_522
-bit 28_523
-bit 28_524
-bit 28_525
-bit 28_526
-bit 28_527
-bit 28_544
-bit 28_545
-bit 28_546
-bit 28_547
-bit 28_548
-bit 28_549
-bit 28_550
-bit 28_551
-bit 28_552
-bit 28_553
-bit 28_554
-bit 28_555
-bit 28_556
-bit 28_557
-bit 28_558
-bit 28_559
-bit 28_560
-bit 28_561
-bit 28_562
-bit 28_563
-bit 28_564
-bit 28_565
-bit 28_566
-bit 28_567
-bit 28_568
-bit 28_569
-bit 28_570
-bit 28_571
-bit 28_572
-bit 28_573
-bit 28_574
-bit 28_575
-bit 28_576
-bit 28_577
-bit 28_578
-bit 28_579
-bit 28_580
-bit 28_581
-bit 28_582
-bit 28_583
-bit 28_584
-bit 28_585
-bit 28_586
-bit 28_587
-bit 28_588
-bit 28_589
-bit 28_590
-bit 28_591
-bit 28_592
-bit 28_593
-bit 28_594
-bit 28_595
-bit 28_596
-bit 28_600
-bit 28_601
-bit 28_602
-bit 28_603
-bit 28_604
-bit 28_608
-bit 28_609
-bit 28_610
-bit 28_611
-bit 28_612
-bit 28_614
-bit 28_615
-bit 28_616
-bit 28_617
-bit 28_618
-bit 28_619
-bit 28_620
-bit 28_623
-bit 28_624
-bit 28_625
-bit 28_626
-bit 28_627
-bit 28_628
-bit 28_632
-bit 28_633
-bit 28_634
-bit 28_635
-bit 28_636
-bit 28_640
-bit 28_641
-bit 28_642
-bit 28_643
-bit 28_644
-bit 28_646
-bit 28_647
-bit 28_648
-bit 28_649
-bit 28_650
-bit 28_651
-bit 28_652
-bit 28_654
-bit 28_655
-bit 28_656
-bit 28_657
-bit 28_658
-bit 28_659
-bit 28_660
-bit 28_662
-bit 28_663
-bit 28_664
-bit 28_665
-bit 28_666
-bit 28_667
-bit 28_668
-bit 28_670
-bit 28_671
-bit 28_672
-bit 28_673
-bit 28_674
-bit 28_675
-bit 28_676
-bit 28_677
-bit 28_678
-bit 28_679
-bit 28_680
-bit 28_681
-bit 28_682
-bit 28_683
-bit 28_684
-bit 28_685
-bit 28_686
-bit 28_687
-bit 28_696
-bit 28_697
-bit 28_698
-bit 28_700
-bit 28_701
-bit 28_702
-bit 29_00
-bit 29_01
-bit 29_06
-bit 29_07
-bit 29_47
-bit 29_101
-bit 29_102
-bit 29_103
-bit 29_104
-bit 29_105
-bit 29_106
-bit 29_107
-bit 29_108
-bit 29_109
-bit 29_110
-bit 29_112
-bit 29_113
-bit 29_114
-bit 29_115
-bit 29_116
-bit 29_117
-bit 29_123
-bit 29_124
-bit 29_125
-bit 29_128
-bit 29_129
-bit 29_130
-bit 29_131
-bit 29_132
-bit 29_133
-bit 29_134
-bit 29_135
-bit 29_138
-bit 29_139
-bit 29_140
-bit 29_141
-bit 29_142
-bit 29_144
-bit 29_145
-bit 29_146
-bit 29_147
-bit 29_148
-bit 29_149
-bit 29_150
-bit 29_151
-bit 29_152
-bit 29_153
-bit 29_154
-bit 29_155
-bit 29_156
-bit 29_157
-bit 29_158
-bit 29_160
-bit 29_161
-bit 29_162
-bit 29_163
-bit 29_164
-bit 29_165
-bit 29_168
-bit 29_169
-bit 29_170
-bit 29_171
-bit 29_172
-bit 29_173
-bit 29_176
-bit 29_177
-bit 29_178
-bit 29_179
-bit 29_180
-bit 29_181
-bit 29_187
-bit 29_188
-bit 29_189
-bit 29_190
-bit 29_191
-bit 29_192
-bit 29_193
-bit 29_194
-bit 29_195
-bit 29_202
-bit 29_203
-bit 29_204
-bit 29_205
-bit 29_207
-bit 29_208
-bit 29_209
-bit 29_210
-bit 29_211
-bit 29_212
-bit 29_213
-bit 29_214
-bit 29_215
-bit 29_216
-bit 29_217
-bit 29_218
-bit 29_219
-bit 29_220
-bit 29_221
-bit 29_224
-bit 29_226
-bit 29_231
-bit 29_288
-bit 29_289
-bit 29_290
-bit 29_291
-bit 29_292
-bit 29_293
-bit 29_336
-bit 29_337
-bit 29_338
-bit 29_339
-bit 29_340
-bit 29_341
-bit 29_342
-bit 29_343
-bit 29_344
-bit 29_345
-bit 29_346
-bit 29_347
-bit 29_348
-bit 29_349
-bit 29_350
-bit 29_351
-bit 29_352
-bit 29_353
-bit 29_354
-bit 29_355
-bit 29_356
-bit 29_357
-bit 29_358
-bit 29_359
-bit 29_360
-bit 29_361
-bit 29_362
-bit 29_363
-bit 29_364
-bit 29_365
-bit 29_366
-bit 29_367
-bit 29_368
-bit 29_369
-bit 29_370
-bit 29_371
-bit 29_372
-bit 29_373
-bit 29_374
-bit 29_375
-bit 29_376
-bit 29_377
-bit 29_378
-bit 29_379
-bit 29_380
-bit 29_381
-bit 29_382
-bit 29_383
-bit 29_384
-bit 29_385
-bit 29_386
-bit 29_387
-bit 29_388
-bit 29_389
-bit 29_390
-bit 29_391
-bit 29_392
-bit 29_393
-bit 29_394
-bit 29_395
-bit 29_396
-bit 29_397
-bit 29_398
-bit 29_399
-bit 29_400
-bit 29_401
-bit 29_402
-bit 29_403
-bit 29_404
-bit 29_405
-bit 29_406
-bit 29_407
-bit 29_408
-bit 29_409
-bit 29_410
-bit 29_411
-bit 29_412
-bit 29_413
-bit 29_414
-bit 29_415
-bit 29_416
-bit 29_417
-bit 29_418
-bit 29_419
-bit 29_420
-bit 29_421
-bit 29_422
-bit 29_423
-bit 29_424
-bit 29_425
-bit 29_426
-bit 29_427
-bit 29_428
-bit 29_429
-bit 29_430
-bit 29_431
-bit 29_432
-bit 29_433
-bit 29_434
-bit 29_435
-bit 29_436
-bit 29_437
-bit 29_438
-bit 29_439
-bit 29_440
-bit 29_441
-bit 29_442
-bit 29_443
-bit 29_444
-bit 29_445
-bit 29_446
-bit 29_447
-bit 29_448
-bit 29_449
-bit 29_450
-bit 29_451
-bit 29_452
-bit 29_453
-bit 29_454
-bit 29_455
-bit 29_456
-bit 29_457
-bit 29_458
-bit 29_459
-bit 29_460
-bit 29_461
-bit 29_462
-bit 29_463
-bit 29_464
-bit 29_465
-bit 29_466
-bit 29_467
-bit 29_468
-bit 29_469
-bit 29_470
-bit 29_471
-bit 29_472
-bit 29_473
-bit 29_474
-bit 29_475
-bit 29_477
-bit 29_478
-bit 29_479
-bit 29_480
-bit 29_481
-bit 29_482
-bit 29_483
-bit 29_484
-bit 29_485
-bit 29_488
-bit 29_489
-bit 29_490
-bit 29_492
-bit 29_494
-bit 29_495
-bit 29_496
-bit 29_497
-bit 29_498
-bit 29_499
-bit 29_500
-bit 29_504
-bit 29_505
-bit 29_506
-bit 29_507
-bit 29_508
-bit 29_512
-bit 29_513
-bit 29_514
-bit 29_515
-bit 29_516
-bit 29_519
-bit 29_520
-bit 29_521
-bit 29_522
-bit 29_523
-bit 29_524
-bit 29_525
-bit 29_526
-bit 29_544
-bit 29_545
-bit 29_546
-bit 29_547
-bit 29_548
-bit 29_549
-bit 29_550
-bit 29_552
-bit 29_553
-bit 29_554
-bit 29_555
-bit 29_556
-bit 29_557
-bit 29_558
-bit 29_559
-bit 29_560
-bit 29_561
-bit 29_562
-bit 29_563
-bit 29_564
-bit 29_565
-bit 29_566
-bit 29_567
-bit 29_568
-bit 29_569
-bit 29_570
-bit 29_571
-bit 29_572
-bit 29_573
-bit 29_574
-bit 29_576
-bit 29_577
-bit 29_578
-bit 29_579
-bit 29_580
-bit 29_581
-bit 29_582
-bit 29_584
-bit 29_585
-bit 29_586
-bit 29_587
-bit 29_588
-bit 29_589
-bit 29_592
-bit 29_593
-bit 29_594
-bit 29_595
-bit 29_596
-bit 29_600
-bit 29_601
-bit 29_602
-bit 29_603
-bit 29_604
-bit 29_607
-bit 29_608
-bit 29_609
-bit 29_610
-bit 29_611
-bit 29_612
-bit 29_614
-bit 29_615
-bit 29_616
-bit 29_617
-bit 29_618
-bit 29_619
-bit 29_620
-bit 29_623
-bit 29_624
-bit 29_625
-bit 29_626
-bit 29_627
-bit 29_628
-bit 29_631
-bit 29_632
-bit 29_633
-bit 29_634
-bit 29_635
-bit 29_636
-bit 29_640
-bit 29_641
-bit 29_642
-bit 29_643
-bit 29_644
-bit 29_645
-bit 29_646
-bit 29_647
-bit 29_648
-bit 29_649
-bit 29_650
-bit 29_651
-bit 29_652
-bit 29_653
-bit 29_654
-bit 29_655
-bit 29_656
-bit 29_657
-bit 29_658
-bit 29_659
-bit 29_660
-bit 29_661
-bit 29_662
-bit 29_663
-bit 29_664
-bit 29_665
-bit 29_666
-bit 29_667
-bit 29_668
-bit 29_670
-bit 29_671
-bit 29_672
-bit 29_673
-bit 29_674
-bit 29_675
-bit 29_676
-bit 29_677
-bit 29_678
-bit 29_679
-bit 29_680
-bit 29_681
-bit 29_682
-bit 29_683
-bit 29_684
-bit 29_685
-bit 29_686
-bit 29_687
-bit 29_696
-bit 29_697
-bit 29_698
-bit 29_700
-bit 29_701
-bit 30_00
-bit 30_02
-bit 30_03
-bit 30_05
-bit 30_11
-bit 30_13
-bit 30_20
-bit 30_23
-bit 30_40
-bit 30_41
-bit 30_42
-bit 30_43
-bit 30_44
-bit 30_45
-bit 30_55
-bit 30_64
-bit 30_65
-bit 30_66
-bit 30_67
-bit 30_68
-bit 30_69
-bit 30_70
-bit 30_71
-bit 30_72
-bit 30_73
-bit 30_74
-bit 30_75
-bit 30_80
-bit 30_81
-bit 30_82
-bit 30_83
-bit 30_84
-bit 30_85
-bit 30_86
-bit 30_87
-bit 30_88
-bit 30_89
-bit 30_90
-bit 30_91
-bit 30_92
-bit 30_93
-bit 30_94
-bit 30_95
-bit 30_96
-bit 30_97
-bit 30_98
-bit 30_99
-bit 30_100
-bit 30_101
-bit 30_102
-bit 30_103
-bit 30_108
-bit 30_109
-bit 30_110
-bit 30_112
-bit 30_113
-bit 30_114
-bit 30_115
-bit 30_116
-bit 30_117
-bit 30_118
-bit 30_119
-bit 30_128
-bit 30_129
-bit 30_136
-bit 30_137
-bit 30_138
-bit 30_139
-bit 30_140
-bit 30_141
-bit 30_142
-bit 30_143
-bit 30_144
-bit 30_145
-bit 30_146
-bit 30_151
-bit 30_152
-bit 30_153
-bit 30_156
-bit 30_157
-bit 30_184
-bit 30_185
-bit 30_186
-bit 30_187
-bit 30_188
-bit 30_189
-bit 30_190
-bit 30_191
-bit 30_192
-bit 30_193
-bit 30_194
-bit 30_195
-bit 30_196
-bit 30_197
-bit 30_198
-bit 30_199
-bit 30_200
-bit 30_201
-bit 30_202
-bit 30_203
-bit 30_204
-bit 30_205
-bit 30_206
-bit 30_207
-bit 30_232
-bit 30_233
-bit 30_234
-bit 30_235
-bit 30_236
-bit 30_237
-bit 30_238
-bit 30_239
-bit 30_240
-bit 30_241
-bit 30_242
-bit 30_243
-bit 30_244
-bit 30_245
-bit 30_246
-bit 30_247
-bit 30_248
-bit 30_249
-bit 30_250
-bit 30_251
-bit 30_252
-bit 30_253
-bit 30_254
-bit 30_255
-bit 30_256
-bit 30_257
-bit 30_258
-bit 30_259
-bit 30_260
-bit 30_261
-bit 30_262
-bit 30_263
-bit 30_264
-bit 30_265
-bit 30_266
-bit 30_267
-bit 30_268
-bit 30_269
-bit 30_270
-bit 30_271
-bit 30_272
-bit 30_273
-bit 30_274
-bit 30_276
-bit 30_277
-bit 30_278
-bit 30_288
-bit 30_292
-bit 30_293
-bit 30_296
-bit 30_297
-bit 30_298
-bit 30_299
-bit 30_300
-bit 30_301
-bit 30_302
-bit 30_303
-bit 30_304
-bit 30_305
-bit 30_328
-bit 30_329
-bit 30_330
-bit 30_336
-bit 30_337
-bit 30_338
-bit 30_339
-bit 30_340
-bit 30_341
-bit 30_342
-bit 30_343
-bit 30_344
-bit 30_345
-bit 30_346
-bit 30_347
-bit 30_348
-bit 30_349
-bit 30_350
-bit 30_351
-bit 30_368
-bit 30_369
-bit 30_370
-bit 30_371
-bit 30_372
-bit 30_373
-bit 30_374
-bit 30_375
-bit 30_376
-bit 30_377
-bit 30_378
-bit 30_379
-bit 30_384
-bit 30_386
-bit 30_390
-bit 30_391
-bit 30_392
-bit 30_393
-bit 30_394
-bit 30_395
-bit 30_396
-bit 30_397
-bit 30_398
-bit 30_399
-bit 30_400
-bit 30_401
-bit 30_402
-bit 30_403
-bit 30_404
-bit 30_405
-bit 30_406
-bit 30_407
-bit 30_408
-bit 30_409
-bit 30_410
-bit 30_411
-bit 30_412
-bit 30_413
-bit 30_416
-bit 30_417
-bit 30_418
-bit 30_419
-bit 30_424
-bit 30_425
-bit 30_426
-bit 30_427
-bit 30_428
-bit 30_429
-bit 30_430
-bit 30_431
-bit 30_432
-bit 30_433
-bit 30_434
-bit 30_435
-bit 30_436
-bit 30_437
-bit 30_438
-bit 30_439
-bit 30_440
-bit 30_441
-bit 30_442
-bit 30_443
-bit 30_459
-bit 30_460
-bit 30_461
-bit 30_462
-bit 30_463
-bit 30_464
-bit 30_465
-bit 30_466
-bit 30_467
-bit 30_468
-bit 30_469
-bit 30_470
-bit 30_471
-bit 30_472
-bit 30_473
-bit 30_488
-bit 30_489
-bit 30_490
-bit 30_491
-bit 30_496
-bit 30_497
-bit 30_498
-bit 30_504
-bit 30_505
-bit 30_506
-bit 30_507
-bit 30_508
-bit 30_509
-bit 30_510
-bit 30_511
-bit 30_512
-bit 30_513
-bit 30_514
-bit 30_515
-bit 30_516
-bit 30_517
-bit 30_518
-bit 30_519
-bit 30_520
-bit 30_521
-bit 30_522
-bit 30_523
-bit 30_524
-bit 30_525
-bit 30_526
-bit 30_527
-bit 30_528
-bit 30_529
-bit 30_530
-bit 30_531
-bit 30_532
-bit 30_533
-bit 30_534
-bit 30_535
-bit 30_536
-bit 30_537
-bit 30_538
-bit 30_544
-bit 30_545
-bit 30_546
-bit 30_547
-bit 30_548
-bit 30_552
-bit 30_553
-bit 30_554
-bit 30_555
-bit 30_556
-bit 30_557
-bit 30_558
-bit 30_559
-bit 30_560
-bit 30_561
-bit 30_568
-bit 30_569
-bit 30_570
-bit 30_571
-bit 30_572
-bit 30_576
-bit 30_577
-bit 30_578
-bit 30_579
-bit 30_580
-bit 30_584
-bit 30_585
-bit 30_586
-bit 30_587
-bit 30_588
-bit 30_589
-bit 30_590
-bit 30_591
-bit 30_592
-bit 30_593
-bit 30_594
-bit 30_595
-bit 30_600
-bit 30_601
-bit 30_602
-bit 30_603
-bit 30_604
-bit 30_605
-bit 30_606
-bit 30_607
-bit 30_608
-bit 30_609
-bit 30_610
-bit 30_611
-bit 30_616
-bit 30_617
-bit 30_618
-bit 30_619
-bit 30_620
-bit 30_621
-bit 30_622
-bit 30_624
-bit 30_625
-bit 30_626
-bit 30_627
-bit 30_628
-bit 30_632
-bit 30_633
-bit 30_634
-bit 30_638
-bit 30_640
-bit 30_641
-bit 30_642
-bit 30_643
-bit 30_644
-bit 30_645
-bit 30_646
-bit 30_647
-bit 30_648
-bit 30_649
-bit 30_650
-bit 30_651
-bit 30_652
-bit 30_653
-bit 30_654
-bit 30_655
-bit 30_656
-bit 30_657
-bit 30_658
-bit 30_659
-bit 30_660
-bit 30_661
-bit 30_662
-bit 30_663
-bit 30_664
-bit 30_665
-bit 30_666
-bit 30_667
-bit 30_668
-bit 30_669
-bit 30_670
-bit 30_671
-bit 30_672
-bit 30_673
-bit 30_674
-bit 30_675
-bit 30_676
-bit 30_677
-bit 30_678
-bit 30_679
-bit 30_680
-bit 30_681
-bit 31_01
-bit 31_04
-bit 31_11
-bit 31_13
-bit 31_20
-bit 31_23
-bit 31_40
-bit 31_41
-bit 31_42
-bit 31_43
-bit 31_44
-bit 31_55
-bit 31_64
-bit 31_65
-bit 31_66
-bit 31_67
-bit 31_68
-bit 31_69
-bit 31_70
-bit 31_71
-bit 31_72
-bit 31_73
-bit 31_74
-bit 31_75
-bit 31_80
-bit 31_81
-bit 31_82
-bit 31_83
-bit 31_84
-bit 31_85
-bit 31_86
-bit 31_87
-bit 31_88
-bit 31_89
-bit 31_90
-bit 31_91
-bit 31_92
-bit 31_93
-bit 31_94
-bit 31_95
-bit 31_96
-bit 31_97
-bit 31_98
-bit 31_99
-bit 31_100
-bit 31_101
-bit 31_102
-bit 31_103
-bit 31_108
-bit 31_109
-bit 31_112
-bit 31_113
-bit 31_114
-bit 31_115
-bit 31_116
-bit 31_117
-bit 31_118
-bit 31_119
-bit 31_128
-bit 31_129
-bit 31_136
-bit 31_137
-bit 31_138
-bit 31_139
-bit 31_140
-bit 31_141
-bit 31_142
-bit 31_144
-bit 31_145
-bit 31_150
-bit 31_151
-bit 31_152
-bit 31_156
-bit 31_157
-bit 31_159
-bit 31_184
-bit 31_185
-bit 31_186
-bit 31_187
-bit 31_188
-bit 31_189
-bit 31_190
-bit 31_191
-bit 31_192
-bit 31_193
-bit 31_194
-bit 31_195
-bit 31_196
-bit 31_197
-bit 31_198
-bit 31_199
-bit 31_200
-bit 31_201
-bit 31_202
-bit 31_203
-bit 31_204
-bit 31_205
-bit 31_206
-bit 31_207
-bit 31_232
-bit 31_233
-bit 31_234
-bit 31_236
-bit 31_237
-bit 31_238
-bit 31_240
-bit 31_241
-bit 31_242
-bit 31_244
-bit 31_245
-bit 31_246
-bit 31_248
-bit 31_249
-bit 31_250
-bit 31_252
-bit 31_253
-bit 31_254
-bit 31_256
-bit 31_257
-bit 31_258
-bit 31_260
-bit 31_261
-bit 31_262
-bit 31_264
-bit 31_265
-bit 31_266
-bit 31_268
-bit 31_269
-bit 31_270
-bit 31_272
-bit 31_273
-bit 31_274
-bit 31_276
-bit 31_277
-bit 31_278
-bit 31_288
-bit 31_289
-bit 31_292
-bit 31_296
-bit 31_297
-bit 31_298
-bit 31_299
-bit 31_300
-bit 31_301
-bit 31_302
-bit 31_303
-bit 31_304
-bit 31_305
-bit 31_311
-bit 31_328
-bit 31_329
-bit 31_336
-bit 31_337
-bit 31_338
-bit 31_339
-bit 31_340
-bit 31_341
-bit 31_342
-bit 31_343
-bit 31_344
-bit 31_345
-bit 31_346
-bit 31_347
-bit 31_348
-bit 31_349
-bit 31_350
-bit 31_351
-bit 31_368
-bit 31_369
-bit 31_370
-bit 31_371
-bit 31_372
-bit 31_373
-bit 31_374
-bit 31_375
-bit 31_376
-bit 31_377
-bit 31_378
-bit 31_379
-bit 31_384
-bit 31_386
-bit 31_389
-bit 31_390
-bit 31_391
-bit 31_392
-bit 31_393
-bit 31_394
-bit 31_395
-bit 31_396
-bit 31_397
-bit 31_398
-bit 31_399
-bit 31_400
-bit 31_401
-bit 31_402
-bit 31_403
-bit 31_404
-bit 31_405
-bit 31_406
-bit 31_407
-bit 31_408
-bit 31_409
-bit 31_410
-bit 31_411
-bit 31_412
-bit 31_416
-bit 31_417
-bit 31_418
-bit 31_424
-bit 31_425
-bit 31_426
-bit 31_427
-bit 31_428
-bit 31_429
-bit 31_430
-bit 31_431
-bit 31_432
-bit 31_433
-bit 31_434
-bit 31_435
-bit 31_436
-bit 31_437
-bit 31_438
-bit 31_439
-bit 31_440
-bit 31_441
-bit 31_442
-bit 31_443
-bit 31_459
-bit 31_460
-bit 31_461
-bit 31_463
-bit 31_464
-bit 31_465
-bit 31_466
-bit 31_467
-bit 31_468
-bit 31_469
-bit 31_470
-bit 31_471
-bit 31_472
-bit 31_473
-bit 31_488
-bit 31_489
-bit 31_490
-bit 31_491
-bit 31_496
-bit 31_497
-bit 31_498
-bit 31_504
-bit 31_505
-bit 31_506
-bit 31_507
-bit 31_508
-bit 31_509
-bit 31_510
-bit 31_511
-bit 31_512
-bit 31_513
-bit 31_514
-bit 31_515
-bit 31_516
-bit 31_517
-bit 31_518
-bit 31_519
-bit 31_520
-bit 31_521
-bit 31_522
-bit 31_523
-bit 31_524
-bit 31_525
-bit 31_526
-bit 31_527
-bit 31_528
-bit 31_529
-bit 31_530
-bit 31_531
-bit 31_532
-bit 31_533
-bit 31_534
-bit 31_535
-bit 31_536
-bit 31_537
-bit 31_538
-bit 31_544
-bit 31_545
-bit 31_546
-bit 31_552
-bit 31_553
-bit 31_554
-bit 31_555
-bit 31_556
-bit 31_557
-bit 31_558
-bit 31_559
-bit 31_560
-bit 31_568
-bit 31_569
-bit 31_570
-bit 31_571
-bit 31_576
-bit 31_577
-bit 31_578
-bit 31_579
-bit 31_584
-bit 31_585
-bit 31_586
-bit 31_587
-bit 31_588
-bit 31_589
-bit 31_590
-bit 31_591
-bit 31_592
-bit 31_593
-bit 31_594
-bit 31_595
-bit 31_600
-bit 31_601
-bit 31_602
-bit 31_603
-bit 31_604
-bit 31_605
-bit 31_606
-bit 31_607
-bit 31_608
-bit 31_609
-bit 31_610
-bit 31_611
-bit 31_616
-bit 31_617
-bit 31_618
-bit 31_619
-bit 31_620
-bit 31_621
-bit 31_622
-bit 31_624
-bit 31_625
-bit 31_626
-bit 31_627
-bit 31_628
-bit 31_632
-bit 31_633
-bit 31_634
-bit 31_637
-bit 31_638
-bit 31_640
-bit 31_641
-bit 31_642
-bit 31_643
-bit 31_644
-bit 31_645
-bit 31_646
-bit 31_647
-bit 31_648
-bit 31_649
-bit 31_650
-bit 31_651
-bit 31_652
-bit 31_653
-bit 31_654
-bit 31_655
-bit 31_656
-bit 31_657
-bit 31_658
-bit 31_659
-bit 31_660
-bit 31_661
-bit 31_662
-bit 31_663
-bit 31_664
-bit 31_665
-bit 31_666
-bit 31_667
-bit 31_668
-bit 31_669
-bit 31_670
-bit 31_671
-bit 31_672
-bit 31_673
-bit 31_674
-bit 31_675
-bit 31_676
-bit 31_677
-bit 31_678
-bit 31_679
-bit 31_680

diff --git a/artix7/mask_gtp_channel_2_mid_right.db b/artix7/mask_gtp_channel_2_mid_right.db
index c576c8c..6f48b45 100644
--- a/artix7/mask_gtp_channel_2_mid_right.db
+++ b/artix7/mask_gtp_channel_2_mid_right.db

@@ -1632,1637 +1632,3 @@
 bit 03_678
 bit 03_679
 bit 03_680
-bit 28_00
-bit 28_01
-bit 28_07
-bit 28_47
-bit 28_52
-bit 28_53
-bit 28_65
-bit 28_102
-bit 28_103
-bit 28_104
-bit 28_105
-bit 28_106
-bit 28_107
-bit 28_108
-bit 28_109
-bit 28_110
-bit 28_111
-bit 28_112
-bit 28_113
-bit 28_114
-bit 28_115
-bit 28_116
-bit 28_117
-bit 28_124
-bit 28_125
-bit 28_128
-bit 28_129
-bit 28_130
-bit 28_131
-bit 28_132
-bit 28_133
-bit 28_134
-bit 28_135
-bit 28_136
-bit 28_138
-bit 28_139
-bit 28_140
-bit 28_141
-bit 28_142
-bit 28_143
-bit 28_144
-bit 28_145
-bit 28_146
-bit 28_147
-bit 28_148
-bit 28_149
-bit 28_150
-bit 28_151
-bit 28_152
-bit 28_153
-bit 28_154
-bit 28_155
-bit 28_156
-bit 28_157
-bit 28_158
-bit 28_159
-bit 28_160
-bit 28_161
-bit 28_162
-bit 28_163
-bit 28_164
-bit 28_165
-bit 28_168
-bit 28_169
-bit 28_170
-bit 28_171
-bit 28_172
-bit 28_173
-bit 28_174
-bit 28_176
-bit 28_177
-bit 28_178
-bit 28_179
-bit 28_180
-bit 28_181
-bit 28_187
-bit 28_188
-bit 28_189
-bit 28_190
-bit 28_191
-bit 28_192
-bit 28_193
-bit 28_194
-bit 28_195
-bit 28_200
-bit 28_203
-bit 28_204
-bit 28_205
-bit 28_206
-bit 28_208
-bit 28_209
-bit 28_210
-bit 28_211
-bit 28_212
-bit 28_213
-bit 28_214
-bit 28_215
-bit 28_216
-bit 28_217
-bit 28_218
-bit 28_219
-bit 28_220
-bit 28_221
-bit 28_222
-bit 28_224
-bit 28_225
-bit 28_231
-bit 28_247
-bit 28_288
-bit 28_289
-bit 28_290
-bit 28_291
-bit 28_292
-bit 28_293
-bit 28_294
-bit 28_336
-bit 28_337
-bit 28_338
-bit 28_339
-bit 28_340
-bit 28_341
-bit 28_342
-bit 28_343
-bit 28_344
-bit 28_345
-bit 28_346
-bit 28_347
-bit 28_348
-bit 28_349
-bit 28_350
-bit 28_351
-bit 28_352
-bit 28_353
-bit 28_354
-bit 28_355
-bit 28_356
-bit 28_357
-bit 28_358
-bit 28_359
-bit 28_360
-bit 28_361
-bit 28_362
-bit 28_363
-bit 28_364
-bit 28_365
-bit 28_366
-bit 28_367
-bit 28_368
-bit 28_369
-bit 28_370
-bit 28_371
-bit 28_372
-bit 28_373
-bit 28_374
-bit 28_375
-bit 28_376
-bit 28_377
-bit 28_378
-bit 28_379
-bit 28_380
-bit 28_381
-bit 28_382
-bit 28_383
-bit 28_384
-bit 28_385
-bit 28_386
-bit 28_387
-bit 28_388
-bit 28_389
-bit 28_390
-bit 28_391
-bit 28_392
-bit 28_393
-bit 28_394
-bit 28_395
-bit 28_396
-bit 28_397
-bit 28_398
-bit 28_399
-bit 28_400
-bit 28_401
-bit 28_402
-bit 28_403
-bit 28_404
-bit 28_405
-bit 28_406
-bit 28_407
-bit 28_408
-bit 28_409
-bit 28_410
-bit 28_411
-bit 28_412
-bit 28_413
-bit 28_414
-bit 28_415
-bit 28_416
-bit 28_417
-bit 28_418
-bit 28_419
-bit 28_420
-bit 28_421
-bit 28_422
-bit 28_423
-bit 28_424
-bit 28_425
-bit 28_426
-bit 28_427
-bit 28_428
-bit 28_429
-bit 28_430
-bit 28_431
-bit 28_432
-bit 28_433
-bit 28_434
-bit 28_435
-bit 28_436
-bit 28_437
-bit 28_438
-bit 28_439
-bit 28_440
-bit 28_441
-bit 28_442
-bit 28_443
-bit 28_444
-bit 28_445
-bit 28_446
-bit 28_447
-bit 28_448
-bit 28_449
-bit 28_450
-bit 28_451
-bit 28_452
-bit 28_453
-bit 28_454
-bit 28_455
-bit 28_456
-bit 28_457
-bit 28_458
-bit 28_459
-bit 28_460
-bit 28_461
-bit 28_462
-bit 28_463
-bit 28_464
-bit 28_465
-bit 28_466
-bit 28_467
-bit 28_468
-bit 28_469
-bit 28_470
-bit 28_471
-bit 28_472
-bit 28_473
-bit 28_474
-bit 28_475
-bit 28_476
-bit 28_478
-bit 28_479
-bit 28_480
-bit 28_481
-bit 28_482
-bit 28_483
-bit 28_484
-bit 28_485
-bit 28_488
-bit 28_489
-bit 28_490
-bit 28_492
-bit 28_494
-bit 28_495
-bit 28_496
-bit 28_497
-bit 28_498
-bit 28_499
-bit 28_500
-bit 28_504
-bit 28_505
-bit 28_506
-bit 28_507
-bit 28_508
-bit 28_512
-bit 28_513
-bit 28_514
-bit 28_515
-bit 28_516
-bit 28_519
-bit 28_520
-bit 28_521
-bit 28_522
-bit 28_523
-bit 28_524
-bit 28_525
-bit 28_526
-bit 28_527
-bit 28_544
-bit 28_545
-bit 28_546
-bit 28_547
-bit 28_548
-bit 28_549
-bit 28_550
-bit 28_551
-bit 28_552
-bit 28_553
-bit 28_554
-bit 28_555
-bit 28_556
-bit 28_557
-bit 28_558
-bit 28_559
-bit 28_560
-bit 28_561
-bit 28_562
-bit 28_563
-bit 28_564
-bit 28_565
-bit 28_566
-bit 28_567
-bit 28_568
-bit 28_569
-bit 28_570
-bit 28_571
-bit 28_572
-bit 28_573
-bit 28_574
-bit 28_575
-bit 28_576
-bit 28_577
-bit 28_578
-bit 28_579
-bit 28_580
-bit 28_581
-bit 28_582
-bit 28_583
-bit 28_584
-bit 28_585
-bit 28_586
-bit 28_587
-bit 28_588
-bit 28_589
-bit 28_590
-bit 28_591
-bit 28_592
-bit 28_593
-bit 28_594
-bit 28_595
-bit 28_596
-bit 28_600
-bit 28_601
-bit 28_602
-bit 28_603
-bit 28_604
-bit 28_608
-bit 28_609
-bit 28_610
-bit 28_611
-bit 28_612
-bit 28_614
-bit 28_615
-bit 28_616
-bit 28_617
-bit 28_618
-bit 28_619
-bit 28_620
-bit 28_623
-bit 28_624
-bit 28_625
-bit 28_626
-bit 28_627
-bit 28_628
-bit 28_632
-bit 28_633
-bit 28_634
-bit 28_635
-bit 28_636
-bit 28_640
-bit 28_641
-bit 28_642
-bit 28_643
-bit 28_644
-bit 28_646
-bit 28_647
-bit 28_648
-bit 28_649
-bit 28_650
-bit 28_651
-bit 28_652
-bit 28_654
-bit 28_655
-bit 28_656
-bit 28_657
-bit 28_658
-bit 28_659
-bit 28_660
-bit 28_662
-bit 28_663
-bit 28_664
-bit 28_665
-bit 28_666
-bit 28_667
-bit 28_668
-bit 28_670
-bit 28_671
-bit 28_672
-bit 28_673
-bit 28_674
-bit 28_675
-bit 28_676
-bit 28_677
-bit 28_678
-bit 28_679
-bit 28_680
-bit 28_681
-bit 28_682
-bit 28_683
-bit 28_684
-bit 28_685
-bit 28_686
-bit 28_687
-bit 28_696
-bit 28_697
-bit 28_698
-bit 28_700
-bit 28_701
-bit 28_702
-bit 29_00
-bit 29_01
-bit 29_06
-bit 29_07
-bit 29_47
-bit 29_101
-bit 29_102
-bit 29_103
-bit 29_104
-bit 29_105
-bit 29_106
-bit 29_107
-bit 29_108
-bit 29_109
-bit 29_110
-bit 29_112
-bit 29_113
-bit 29_114
-bit 29_115
-bit 29_116
-bit 29_117
-bit 29_123
-bit 29_124
-bit 29_125
-bit 29_128
-bit 29_129
-bit 29_130
-bit 29_131
-bit 29_132
-bit 29_133
-bit 29_134
-bit 29_135
-bit 29_138
-bit 29_139
-bit 29_140
-bit 29_141
-bit 29_142
-bit 29_144
-bit 29_145
-bit 29_146
-bit 29_147
-bit 29_148
-bit 29_149
-bit 29_150
-bit 29_151
-bit 29_152
-bit 29_153
-bit 29_154
-bit 29_155
-bit 29_156
-bit 29_157
-bit 29_158
-bit 29_160
-bit 29_161
-bit 29_162
-bit 29_163
-bit 29_164
-bit 29_165
-bit 29_168
-bit 29_169
-bit 29_170
-bit 29_171
-bit 29_172
-bit 29_173
-bit 29_176
-bit 29_177
-bit 29_178
-bit 29_179
-bit 29_180
-bit 29_181
-bit 29_187
-bit 29_188
-bit 29_189
-bit 29_190
-bit 29_191
-bit 29_192
-bit 29_193
-bit 29_194
-bit 29_195
-bit 29_202
-bit 29_203
-bit 29_204
-bit 29_205
-bit 29_207
-bit 29_208
-bit 29_209
-bit 29_210
-bit 29_211
-bit 29_212
-bit 29_213
-bit 29_214
-bit 29_215
-bit 29_216
-bit 29_217
-bit 29_218
-bit 29_219
-bit 29_220
-bit 29_221
-bit 29_224
-bit 29_226
-bit 29_231
-bit 29_288
-bit 29_289
-bit 29_290
-bit 29_291
-bit 29_292
-bit 29_293
-bit 29_336
-bit 29_337
-bit 29_338
-bit 29_339
-bit 29_340
-bit 29_341
-bit 29_342
-bit 29_343
-bit 29_344
-bit 29_345
-bit 29_346
-bit 29_347
-bit 29_348
-bit 29_349
-bit 29_350
-bit 29_351
-bit 29_352
-bit 29_353
-bit 29_354
-bit 29_355
-bit 29_356
-bit 29_357
-bit 29_358
-bit 29_359
-bit 29_360
-bit 29_361
-bit 29_362
-bit 29_363
-bit 29_364
-bit 29_365
-bit 29_366
-bit 29_367
-bit 29_368
-bit 29_369
-bit 29_370
-bit 29_371
-bit 29_372
-bit 29_373
-bit 29_374
-bit 29_375
-bit 29_376
-bit 29_377
-bit 29_378
-bit 29_379
-bit 29_380
-bit 29_381
-bit 29_382
-bit 29_383
-bit 29_384
-bit 29_385
-bit 29_386
-bit 29_387
-bit 29_388
-bit 29_389
-bit 29_390
-bit 29_391
-bit 29_392
-bit 29_393
-bit 29_394
-bit 29_395
-bit 29_396
-bit 29_397
-bit 29_398
-bit 29_399
-bit 29_400
-bit 29_401
-bit 29_402
-bit 29_403
-bit 29_404
-bit 29_405
-bit 29_406
-bit 29_407
-bit 29_408
-bit 29_409
-bit 29_410
-bit 29_411
-bit 29_412
-bit 29_413
-bit 29_414
-bit 29_415
-bit 29_416
-bit 29_417
-bit 29_418
-bit 29_419
-bit 29_420
-bit 29_421
-bit 29_422
-bit 29_423
-bit 29_424
-bit 29_425
-bit 29_426
-bit 29_427
-bit 29_428
-bit 29_429
-bit 29_430
-bit 29_431
-bit 29_432
-bit 29_433
-bit 29_434
-bit 29_435
-bit 29_436
-bit 29_437
-bit 29_438
-bit 29_439
-bit 29_440
-bit 29_441
-bit 29_442
-bit 29_443
-bit 29_444
-bit 29_445
-bit 29_446
-bit 29_447
-bit 29_448
-bit 29_449
-bit 29_450
-bit 29_451
-bit 29_452
-bit 29_453
-bit 29_454
-bit 29_455
-bit 29_456
-bit 29_457
-bit 29_458
-bit 29_459
-bit 29_460
-bit 29_461
-bit 29_462
-bit 29_463
-bit 29_464
-bit 29_465
-bit 29_466
-bit 29_467
-bit 29_468
-bit 29_469
-bit 29_470
-bit 29_471
-bit 29_472
-bit 29_473
-bit 29_474
-bit 29_475
-bit 29_477
-bit 29_478
-bit 29_479
-bit 29_480
-bit 29_481
-bit 29_482
-bit 29_483
-bit 29_484
-bit 29_485
-bit 29_488
-bit 29_489
-bit 29_490
-bit 29_492
-bit 29_494
-bit 29_495
-bit 29_496
-bit 29_497
-bit 29_498
-bit 29_499
-bit 29_500
-bit 29_504
-bit 29_505
-bit 29_506
-bit 29_507
-bit 29_508
-bit 29_512
-bit 29_513
-bit 29_514
-bit 29_515
-bit 29_516
-bit 29_519
-bit 29_520
-bit 29_521
-bit 29_522
-bit 29_523
-bit 29_524
-bit 29_525
-bit 29_526
-bit 29_544
-bit 29_545
-bit 29_546
-bit 29_547
-bit 29_548
-bit 29_549
-bit 29_550
-bit 29_552
-bit 29_553
-bit 29_554
-bit 29_555
-bit 29_556
-bit 29_557
-bit 29_558
-bit 29_559
-bit 29_560
-bit 29_561
-bit 29_562
-bit 29_563
-bit 29_564
-bit 29_565
-bit 29_566
-bit 29_567
-bit 29_568
-bit 29_569
-bit 29_570
-bit 29_571
-bit 29_572
-bit 29_573
-bit 29_574
-bit 29_576
-bit 29_577
-bit 29_578
-bit 29_579
-bit 29_580
-bit 29_581
-bit 29_582
-bit 29_584
-bit 29_585
-bit 29_586
-bit 29_587
-bit 29_588
-bit 29_589
-bit 29_592
-bit 29_593
-bit 29_594
-bit 29_595
-bit 29_596
-bit 29_600
-bit 29_601
-bit 29_602
-bit 29_603
-bit 29_604
-bit 29_607
-bit 29_608
-bit 29_609
-bit 29_610
-bit 29_611
-bit 29_612
-bit 29_614
-bit 29_615
-bit 29_616
-bit 29_617
-bit 29_618
-bit 29_619
-bit 29_620
-bit 29_623
-bit 29_624
-bit 29_625
-bit 29_626
-bit 29_627
-bit 29_628
-bit 29_631
-bit 29_632
-bit 29_633
-bit 29_634
-bit 29_635
-bit 29_636
-bit 29_640
-bit 29_641
-bit 29_642
-bit 29_643
-bit 29_644
-bit 29_645
-bit 29_646
-bit 29_647
-bit 29_648
-bit 29_649
-bit 29_650
-bit 29_651
-bit 29_652
-bit 29_653
-bit 29_654
-bit 29_655
-bit 29_656
-bit 29_657
-bit 29_658
-bit 29_659
-bit 29_660
-bit 29_661
-bit 29_662
-bit 29_663
-bit 29_664
-bit 29_665
-bit 29_666
-bit 29_667
-bit 29_668
-bit 29_670
-bit 29_671
-bit 29_672
-bit 29_673
-bit 29_674
-bit 29_675
-bit 29_676
-bit 29_677
-bit 29_678
-bit 29_679
-bit 29_680
-bit 29_681
-bit 29_682
-bit 29_683
-bit 29_684
-bit 29_685
-bit 29_686
-bit 29_687
-bit 29_696
-bit 29_697
-bit 29_698
-bit 29_700
-bit 29_701
-bit 30_00
-bit 30_02
-bit 30_03
-bit 30_05
-bit 30_11
-bit 30_13
-bit 30_20
-bit 30_23
-bit 30_40
-bit 30_41
-bit 30_42
-bit 30_43
-bit 30_44
-bit 30_45
-bit 30_55
-bit 30_64
-bit 30_65
-bit 30_66
-bit 30_67
-bit 30_68
-bit 30_69
-bit 30_70
-bit 30_71
-bit 30_72
-bit 30_73
-bit 30_74
-bit 30_75
-bit 30_80
-bit 30_81
-bit 30_82
-bit 30_83
-bit 30_84
-bit 30_85
-bit 30_86
-bit 30_87
-bit 30_88
-bit 30_89
-bit 30_90
-bit 30_91
-bit 30_92
-bit 30_93
-bit 30_94
-bit 30_95
-bit 30_96
-bit 30_97
-bit 30_98
-bit 30_99
-bit 30_100
-bit 30_101
-bit 30_102
-bit 30_103
-bit 30_108
-bit 30_109
-bit 30_110
-bit 30_112
-bit 30_113
-bit 30_114
-bit 30_115
-bit 30_116
-bit 30_117
-bit 30_118
-bit 30_119
-bit 30_128
-bit 30_129
-bit 30_136
-bit 30_137
-bit 30_138
-bit 30_139
-bit 30_140
-bit 30_141
-bit 30_142
-bit 30_143
-bit 30_144
-bit 30_145
-bit 30_146
-bit 30_151
-bit 30_152
-bit 30_153
-bit 30_156
-bit 30_157
-bit 30_184
-bit 30_185
-bit 30_186
-bit 30_187
-bit 30_188
-bit 30_189
-bit 30_190
-bit 30_191
-bit 30_192
-bit 30_193
-bit 30_194
-bit 30_195
-bit 30_196
-bit 30_197
-bit 30_198
-bit 30_199
-bit 30_200
-bit 30_201
-bit 30_202
-bit 30_203
-bit 30_204
-bit 30_205
-bit 30_206
-bit 30_207
-bit 30_232
-bit 30_233
-bit 30_234
-bit 30_235
-bit 30_236
-bit 30_237
-bit 30_238
-bit 30_239
-bit 30_240
-bit 30_241
-bit 30_242
-bit 30_243
-bit 30_244
-bit 30_245
-bit 30_246
-bit 30_247
-bit 30_248
-bit 30_249
-bit 30_250
-bit 30_251
-bit 30_252
-bit 30_253
-bit 30_254
-bit 30_255
-bit 30_256
-bit 30_257
-bit 30_258
-bit 30_259
-bit 30_260
-bit 30_261
-bit 30_262
-bit 30_263
-bit 30_264
-bit 30_265
-bit 30_266
-bit 30_267
-bit 30_268
-bit 30_269
-bit 30_270
-bit 30_271
-bit 30_272
-bit 30_273
-bit 30_274
-bit 30_276
-bit 30_277
-bit 30_278
-bit 30_288
-bit 30_292
-bit 30_293
-bit 30_296
-bit 30_297
-bit 30_298
-bit 30_299
-bit 30_300
-bit 30_301
-bit 30_302
-bit 30_303
-bit 30_304
-bit 30_305
-bit 30_328
-bit 30_329
-bit 30_330
-bit 30_336
-bit 30_337
-bit 30_338
-bit 30_339
-bit 30_340
-bit 30_341
-bit 30_342
-bit 30_343
-bit 30_344
-bit 30_345
-bit 30_346
-bit 30_347
-bit 30_348
-bit 30_349
-bit 30_350
-bit 30_351
-bit 30_368
-bit 30_369
-bit 30_370
-bit 30_371
-bit 30_372
-bit 30_373
-bit 30_374
-bit 30_375
-bit 30_376
-bit 30_377
-bit 30_378
-bit 30_379
-bit 30_384
-bit 30_386
-bit 30_390
-bit 30_391
-bit 30_392
-bit 30_393
-bit 30_394
-bit 30_395
-bit 30_396
-bit 30_397
-bit 30_398
-bit 30_399
-bit 30_400
-bit 30_401
-bit 30_402
-bit 30_403
-bit 30_404
-bit 30_405
-bit 30_406
-bit 30_407
-bit 30_408
-bit 30_409
-bit 30_410
-bit 30_411
-bit 30_412
-bit 30_413
-bit 30_416
-bit 30_417
-bit 30_418
-bit 30_419
-bit 30_424
-bit 30_425
-bit 30_426
-bit 30_427
-bit 30_428
-bit 30_429
-bit 30_430
-bit 30_431
-bit 30_432
-bit 30_433
-bit 30_434
-bit 30_435
-bit 30_436
-bit 30_437
-bit 30_438
-bit 30_439
-bit 30_440
-bit 30_441
-bit 30_442
-bit 30_443
-bit 30_459
-bit 30_460
-bit 30_461
-bit 30_462
-bit 30_463
-bit 30_464
-bit 30_465
-bit 30_466
-bit 30_467
-bit 30_468
-bit 30_469
-bit 30_470
-bit 30_471
-bit 30_472
-bit 30_473
-bit 30_488
-bit 30_489
-bit 30_490
-bit 30_491
-bit 30_496
-bit 30_497
-bit 30_498
-bit 30_504
-bit 30_505
-bit 30_506
-bit 30_507
-bit 30_508
-bit 30_509
-bit 30_510
-bit 30_511
-bit 30_512
-bit 30_513
-bit 30_514
-bit 30_515
-bit 30_516
-bit 30_517
-bit 30_518
-bit 30_519
-bit 30_520
-bit 30_521
-bit 30_522
-bit 30_523
-bit 30_524
-bit 30_525
-bit 30_526
-bit 30_527
-bit 30_528
-bit 30_529
-bit 30_530
-bit 30_531
-bit 30_532
-bit 30_533
-bit 30_534
-bit 30_535
-bit 30_536
-bit 30_537
-bit 30_538
-bit 30_544
-bit 30_545
-bit 30_546
-bit 30_547
-bit 30_548
-bit 30_552
-bit 30_553
-bit 30_554
-bit 30_555
-bit 30_556
-bit 30_557
-bit 30_558
-bit 30_559
-bit 30_560
-bit 30_561
-bit 30_568
-bit 30_569
-bit 30_570
-bit 30_571
-bit 30_572
-bit 30_576
-bit 30_577
-bit 30_578
-bit 30_579
-bit 30_580
-bit 30_584
-bit 30_585
-bit 30_586
-bit 30_587
-bit 30_588
-bit 30_589
-bit 30_590
-bit 30_591
-bit 30_592
-bit 30_593
-bit 30_594
-bit 30_595
-bit 30_600
-bit 30_601
-bit 30_602
-bit 30_603
-bit 30_604
-bit 30_605
-bit 30_606
-bit 30_607
-bit 30_608
-bit 30_609
-bit 30_610
-bit 30_611
-bit 30_616
-bit 30_617
-bit 30_618
-bit 30_619
-bit 30_620
-bit 30_621
-bit 30_622
-bit 30_624
-bit 30_625
-bit 30_626
-bit 30_627
-bit 30_628
-bit 30_632
-bit 30_633
-bit 30_634
-bit 30_638
-bit 30_640
-bit 30_641
-bit 30_642
-bit 30_643
-bit 30_644
-bit 30_645
-bit 30_646
-bit 30_647
-bit 30_648
-bit 30_649
-bit 30_650
-bit 30_651
-bit 30_652
-bit 30_653
-bit 30_654
-bit 30_655
-bit 30_656
-bit 30_657
-bit 30_658
-bit 30_659
-bit 30_660
-bit 30_661
-bit 30_662
-bit 30_663
-bit 30_664
-bit 30_665
-bit 30_666
-bit 30_667
-bit 30_668
-bit 30_669
-bit 30_670
-bit 30_671
-bit 30_672
-bit 30_673
-bit 30_674
-bit 30_675
-bit 30_676
-bit 30_677
-bit 30_678
-bit 30_679
-bit 30_680
-bit 30_681
-bit 31_01
-bit 31_04
-bit 31_11
-bit 31_13
-bit 31_20
-bit 31_23
-bit 31_40
-bit 31_41
-bit 31_42
-bit 31_43
-bit 31_44
-bit 31_55
-bit 31_64
-bit 31_65
-bit 31_66
-bit 31_67
-bit 31_68
-bit 31_69
-bit 31_70
-bit 31_71
-bit 31_72
-bit 31_73
-bit 31_74
-bit 31_75
-bit 31_80
-bit 31_81
-bit 31_82
-bit 31_83
-bit 31_84
-bit 31_85
-bit 31_86
-bit 31_87
-bit 31_88
-bit 31_89
-bit 31_90
-bit 31_91
-bit 31_92
-bit 31_93
-bit 31_94
-bit 31_95
-bit 31_96
-bit 31_97
-bit 31_98
-bit 31_99
-bit 31_100
-bit 31_101
-bit 31_102
-bit 31_103
-bit 31_108
-bit 31_109
-bit 31_112
-bit 31_113
-bit 31_114
-bit 31_115
-bit 31_116
-bit 31_117
-bit 31_118
-bit 31_119
-bit 31_128
-bit 31_129
-bit 31_136
-bit 31_137
-bit 31_138
-bit 31_139
-bit 31_140
-bit 31_141
-bit 31_142
-bit 31_144
-bit 31_145
-bit 31_150
-bit 31_151
-bit 31_152
-bit 31_156
-bit 31_157
-bit 31_159
-bit 31_184
-bit 31_185
-bit 31_186
-bit 31_187
-bit 31_188
-bit 31_189
-bit 31_190
-bit 31_191
-bit 31_192
-bit 31_193
-bit 31_194
-bit 31_195
-bit 31_196
-bit 31_197
-bit 31_198
-bit 31_199
-bit 31_200
-bit 31_201
-bit 31_202
-bit 31_203
-bit 31_204
-bit 31_205
-bit 31_206
-bit 31_207
-bit 31_232
-bit 31_233
-bit 31_234
-bit 31_236
-bit 31_237
-bit 31_238
-bit 31_240
-bit 31_241
-bit 31_242
-bit 31_244
-bit 31_245
-bit 31_246
-bit 31_248
-bit 31_249
-bit 31_250
-bit 31_252
-bit 31_253
-bit 31_254
-bit 31_256
-bit 31_257
-bit 31_258
-bit 31_260
-bit 31_261
-bit 31_262
-bit 31_264
-bit 31_265
-bit 31_266
-bit 31_268
-bit 31_269
-bit 31_270
-bit 31_272
-bit 31_273
-bit 31_274
-bit 31_276
-bit 31_277
-bit 31_278
-bit 31_288
-bit 31_289
-bit 31_292
-bit 31_296
-bit 31_297
-bit 31_298
-bit 31_299
-bit 31_300
-bit 31_301
-bit 31_302
-bit 31_303
-bit 31_304
-bit 31_305
-bit 31_311
-bit 31_328
-bit 31_329
-bit 31_336
-bit 31_337
-bit 31_338
-bit 31_339
-bit 31_340
-bit 31_341
-bit 31_342
-bit 31_343
-bit 31_344
-bit 31_345
-bit 31_346
-bit 31_347
-bit 31_348
-bit 31_349
-bit 31_350
-bit 31_351
-bit 31_368
-bit 31_369
-bit 31_370
-bit 31_371
-bit 31_372
-bit 31_373
-bit 31_374
-bit 31_375
-bit 31_376
-bit 31_377
-bit 31_378
-bit 31_379
-bit 31_384
-bit 31_386
-bit 31_389
-bit 31_390
-bit 31_391
-bit 31_392
-bit 31_393
-bit 31_394
-bit 31_395
-bit 31_396
-bit 31_397
-bit 31_398
-bit 31_399
-bit 31_400
-bit 31_401
-bit 31_402
-bit 31_403
-bit 31_404
-bit 31_405
-bit 31_406
-bit 31_407
-bit 31_408
-bit 31_409
-bit 31_410
-bit 31_411
-bit 31_412
-bit 31_416
-bit 31_417
-bit 31_418
-bit 31_424
-bit 31_425
-bit 31_426
-bit 31_427
-bit 31_428
-bit 31_429
-bit 31_430
-bit 31_431
-bit 31_432
-bit 31_433
-bit 31_434
-bit 31_435
-bit 31_436
-bit 31_437
-bit 31_438
-bit 31_439
-bit 31_440
-bit 31_441
-bit 31_442
-bit 31_443
-bit 31_459
-bit 31_460
-bit 31_461
-bit 31_463
-bit 31_464
-bit 31_465
-bit 31_466
-bit 31_467
-bit 31_468
-bit 31_469
-bit 31_470
-bit 31_471
-bit 31_472
-bit 31_473
-bit 31_488
-bit 31_489
-bit 31_490
-bit 31_491
-bit 31_496
-bit 31_497
-bit 31_498
-bit 31_504
-bit 31_505
-bit 31_506
-bit 31_507
-bit 31_508
-bit 31_509
-bit 31_510
-bit 31_511
-bit 31_512
-bit 31_513
-bit 31_514
-bit 31_515
-bit 31_516
-bit 31_517
-bit 31_518
-bit 31_519
-bit 31_520
-bit 31_521
-bit 31_522
-bit 31_523
-bit 31_524
-bit 31_525
-bit 31_526
-bit 31_527
-bit 31_528
-bit 31_529
-bit 31_530
-bit 31_531
-bit 31_532
-bit 31_533
-bit 31_534
-bit 31_535
-bit 31_536
-bit 31_537
-bit 31_538
-bit 31_544
-bit 31_545
-bit 31_546
-bit 31_552
-bit 31_553
-bit 31_554
-bit 31_555
-bit 31_556
-bit 31_557
-bit 31_558
-bit 31_559
-bit 31_560
-bit 31_568
-bit 31_569
-bit 31_570
-bit 31_571
-bit 31_576
-bit 31_577
-bit 31_578
-bit 31_579
-bit 31_584
-bit 31_585
-bit 31_586
-bit 31_587
-bit 31_588
-bit 31_589
-bit 31_590
-bit 31_591
-bit 31_592
-bit 31_593
-bit 31_594
-bit 31_595
-bit 31_600
-bit 31_601
-bit 31_602
-bit 31_603
-bit 31_604
-bit 31_605
-bit 31_606
-bit 31_607
-bit 31_608
-bit 31_609
-bit 31_610
-bit 31_611
-bit 31_616
-bit 31_617
-bit 31_618
-bit 31_619
-bit 31_620
-bit 31_621
-bit 31_622
-bit 31_624
-bit 31_625
-bit 31_626
-bit 31_627
-bit 31_628
-bit 31_632
-bit 31_633
-bit 31_634
-bit 31_637
-bit 31_638
-bit 31_640
-bit 31_641
-bit 31_642
-bit 31_643
-bit 31_644
-bit 31_645
-bit 31_646
-bit 31_647
-bit 31_648
-bit 31_649
-bit 31_650
-bit 31_651
-bit 31_652
-bit 31_653
-bit 31_654
-bit 31_655
-bit 31_656
-bit 31_657
-bit 31_658
-bit 31_659
-bit 31_660
-bit 31_661
-bit 31_662
-bit 31_663
-bit 31_664
-bit 31_665
-bit 31_666
-bit 31_667
-bit 31_668
-bit 31_669
-bit 31_670
-bit 31_671
-bit 31_672
-bit 31_673
-bit 31_674
-bit 31_675
-bit 31_676
-bit 31_677
-bit 31_678
-bit 31_679
-bit 31_680

diff --git a/artix7/mask_gtp_channel_3.db b/artix7/mask_gtp_channel_3.db
index c576c8c..47663d6 100644
--- a/artix7/mask_gtp_channel_3.db
+++ b/artix7/mask_gtp_channel_3.db

@@ -1,1637 +1,3 @@
-bit 00_00
-bit 00_01
-bit 00_07
-bit 00_47
-bit 00_52
-bit 00_53
-bit 00_65
-bit 00_102
-bit 00_103
-bit 00_104
-bit 00_105
-bit 00_106
-bit 00_107
-bit 00_108
-bit 00_109
-bit 00_110
-bit 00_111
-bit 00_112
-bit 00_113
-bit 00_114
-bit 00_115
-bit 00_116
-bit 00_117
-bit 00_124
-bit 00_125
-bit 00_128
-bit 00_129
-bit 00_130
-bit 00_131
-bit 00_132
-bit 00_133
-bit 00_134
-bit 00_135
-bit 00_136
-bit 00_138
-bit 00_139
-bit 00_140
-bit 00_141
-bit 00_142
-bit 00_143
-bit 00_144
-bit 00_145
-bit 00_146
-bit 00_147
-bit 00_148
-bit 00_149
-bit 00_150
-bit 00_151
-bit 00_152
-bit 00_153
-bit 00_154
-bit 00_155
-bit 00_156
-bit 00_157
-bit 00_158
-bit 00_159
-bit 00_160
-bit 00_161
-bit 00_162
-bit 00_163
-bit 00_164
-bit 00_165
-bit 00_168
-bit 00_169
-bit 00_170
-bit 00_171
-bit 00_172
-bit 00_173
-bit 00_174
-bit 00_176
-bit 00_177
-bit 00_178
-bit 00_179
-bit 00_180
-bit 00_181
-bit 00_187
-bit 00_188
-bit 00_189
-bit 00_190
-bit 00_191
-bit 00_192
-bit 00_193
-bit 00_194
-bit 00_195
-bit 00_200
-bit 00_203
-bit 00_204
-bit 00_205
-bit 00_206
-bit 00_208
-bit 00_209
-bit 00_210
-bit 00_211
-bit 00_212
-bit 00_213
-bit 00_214
-bit 00_215
-bit 00_216
-bit 00_217
-bit 00_218
-bit 00_219
-bit 00_220
-bit 00_221
-bit 00_222
-bit 00_224
-bit 00_225
-bit 00_231
-bit 00_247
-bit 00_288
-bit 00_289
-bit 00_290
-bit 00_291
-bit 00_292
-bit 00_293
-bit 00_294
-bit 00_336
-bit 00_337
-bit 00_338
-bit 00_339
-bit 00_340
-bit 00_341
-bit 00_342
-bit 00_343
-bit 00_344
-bit 00_345
-bit 00_346
-bit 00_347
-bit 00_348
-bit 00_349
-bit 00_350
-bit 00_351
-bit 00_352
-bit 00_353
-bit 00_354
-bit 00_355
-bit 00_356
-bit 00_357
-bit 00_358
-bit 00_359
-bit 00_360
-bit 00_361
-bit 00_362
-bit 00_363
-bit 00_364
-bit 00_365
-bit 00_366
-bit 00_367
-bit 00_368
-bit 00_369
-bit 00_370
-bit 00_371
-bit 00_372
-bit 00_373
-bit 00_374
-bit 00_375
-bit 00_376
-bit 00_377
-bit 00_378
-bit 00_379
-bit 00_380
-bit 00_381
-bit 00_382
-bit 00_383
-bit 00_384
-bit 00_385
-bit 00_386
-bit 00_387
-bit 00_388
-bit 00_389
-bit 00_390
-bit 00_391
-bit 00_392
-bit 00_393
-bit 00_394
-bit 00_395
-bit 00_396
-bit 00_397
-bit 00_398
-bit 00_399
-bit 00_400
-bit 00_401
-bit 00_402
-bit 00_403
-bit 00_404
-bit 00_405
-bit 00_406
-bit 00_407
-bit 00_408
-bit 00_409
-bit 00_410
-bit 00_411
-bit 00_412
-bit 00_413
-bit 00_414
-bit 00_415
-bit 00_416
-bit 00_417
-bit 00_418
-bit 00_419
-bit 00_420
-bit 00_421
-bit 00_422
-bit 00_423
-bit 00_424
-bit 00_425
-bit 00_426
-bit 00_427
-bit 00_428
-bit 00_429
-bit 00_430
-bit 00_431
-bit 00_432
-bit 00_433
-bit 00_434
-bit 00_435
-bit 00_436
-bit 00_437
-bit 00_438
-bit 00_439
-bit 00_440
-bit 00_441
-bit 00_442
-bit 00_443
-bit 00_444
-bit 00_445
-bit 00_446
-bit 00_447
-bit 00_448
-bit 00_449
-bit 00_450
-bit 00_451
-bit 00_452
-bit 00_453
-bit 00_454
-bit 00_455
-bit 00_456
-bit 00_457
-bit 00_458
-bit 00_459
-bit 00_460
-bit 00_461
-bit 00_462
-bit 00_463
-bit 00_464
-bit 00_465
-bit 00_466
-bit 00_467
-bit 00_468
-bit 00_469
-bit 00_470
-bit 00_471
-bit 00_472
-bit 00_473
-bit 00_474
-bit 00_475
-bit 00_476
-bit 00_478
-bit 00_479
-bit 00_480
-bit 00_481
-bit 00_482
-bit 00_483
-bit 00_484
-bit 00_485
-bit 00_488
-bit 00_489
-bit 00_490
-bit 00_492
-bit 00_494
-bit 00_495
-bit 00_496
-bit 00_497
-bit 00_498
-bit 00_499
-bit 00_500
-bit 00_504
-bit 00_505
-bit 00_506
-bit 00_507
-bit 00_508
-bit 00_512
-bit 00_513
-bit 00_514
-bit 00_515
-bit 00_516
-bit 00_519
-bit 00_520
-bit 00_521
-bit 00_522
-bit 00_523
-bit 00_524
-bit 00_525
-bit 00_526
-bit 00_527
-bit 00_544
-bit 00_545
-bit 00_546
-bit 00_547
-bit 00_548
-bit 00_549
-bit 00_550
-bit 00_551
-bit 00_552
-bit 00_553
-bit 00_554
-bit 00_555
-bit 00_556
-bit 00_557
-bit 00_558
-bit 00_559
-bit 00_560
-bit 00_561
-bit 00_562
-bit 00_563
-bit 00_564
-bit 00_565
-bit 00_566
-bit 00_567
-bit 00_568
-bit 00_569
-bit 00_570
-bit 00_571
-bit 00_572
-bit 00_573
-bit 00_574
-bit 00_575
-bit 00_576
-bit 00_577
-bit 00_578
-bit 00_579
-bit 00_580
-bit 00_581
-bit 00_582
-bit 00_583
-bit 00_584
-bit 00_585
-bit 00_586
-bit 00_587
-bit 00_588
-bit 00_589
-bit 00_590
-bit 00_591
-bit 00_592
-bit 00_593
-bit 00_594
-bit 00_595
-bit 00_596
-bit 00_600
-bit 00_601
-bit 00_602
-bit 00_603
-bit 00_604
-bit 00_608
-bit 00_609
-bit 00_610
-bit 00_611
-bit 00_612
-bit 00_614
-bit 00_615
-bit 00_616
-bit 00_617
-bit 00_618
-bit 00_619
-bit 00_620
-bit 00_623
-bit 00_624
-bit 00_625
-bit 00_626
-bit 00_627
-bit 00_628
-bit 00_632
-bit 00_633
-bit 00_634
-bit 00_635
-bit 00_636
-bit 00_640
-bit 00_641
-bit 00_642
-bit 00_643
-bit 00_644
-bit 00_646
-bit 00_647
-bit 00_648
-bit 00_649
-bit 00_650
-bit 00_651
-bit 00_652
-bit 00_654
-bit 00_655
-bit 00_656
-bit 00_657
-bit 00_658
-bit 00_659
-bit 00_660
-bit 00_662
-bit 00_663
-bit 00_664
-bit 00_665
-bit 00_666
-bit 00_667
-bit 00_668
-bit 00_670
-bit 00_671
-bit 00_672
-bit 00_673
-bit 00_674
-bit 00_675
-bit 00_676
-bit 00_677
-bit 00_678
-bit 00_679
-bit 00_680
-bit 00_681
-bit 00_682
-bit 00_683
-bit 00_684
-bit 00_685
-bit 00_686
-bit 00_687
-bit 00_696
-bit 00_697
-bit 00_698
-bit 00_700
-bit 00_701
-bit 00_702
-bit 01_00
-bit 01_01
-bit 01_06
-bit 01_07
-bit 01_47
-bit 01_101
-bit 01_102
-bit 01_103
-bit 01_104
-bit 01_105
-bit 01_106
-bit 01_107
-bit 01_108
-bit 01_109
-bit 01_110
-bit 01_112
-bit 01_113
-bit 01_114
-bit 01_115
-bit 01_116
-bit 01_117
-bit 01_123
-bit 01_124
-bit 01_125
-bit 01_128
-bit 01_129
-bit 01_130
-bit 01_131
-bit 01_132
-bit 01_133
-bit 01_134
-bit 01_135
-bit 01_138
-bit 01_139
-bit 01_140
-bit 01_141
-bit 01_142
-bit 01_144
-bit 01_145
-bit 01_146
-bit 01_147
-bit 01_148
-bit 01_149
-bit 01_150
-bit 01_151
-bit 01_152
-bit 01_153
-bit 01_154
-bit 01_155
-bit 01_156
-bit 01_157
-bit 01_158
-bit 01_160
-bit 01_161
-bit 01_162
-bit 01_163
-bit 01_164
-bit 01_165
-bit 01_168
-bit 01_169
-bit 01_170
-bit 01_171
-bit 01_172
-bit 01_173
-bit 01_176
-bit 01_177
-bit 01_178
-bit 01_179
-bit 01_180
-bit 01_181
-bit 01_187
-bit 01_188
-bit 01_189
-bit 01_190
-bit 01_191
-bit 01_192
-bit 01_193
-bit 01_194
-bit 01_195
-bit 01_202
-bit 01_203
-bit 01_204
-bit 01_205
-bit 01_207
-bit 01_208
-bit 01_209
-bit 01_210
-bit 01_211
-bit 01_212
-bit 01_213
-bit 01_214
-bit 01_215
-bit 01_216
-bit 01_217
-bit 01_218
-bit 01_219
-bit 01_220
-bit 01_221
-bit 01_224
-bit 01_226
-bit 01_231
-bit 01_288
-bit 01_289
-bit 01_290
-bit 01_291
-bit 01_292
-bit 01_293
-bit 01_336
-bit 01_337
-bit 01_338
-bit 01_339
-bit 01_340
-bit 01_341
-bit 01_342
-bit 01_343
-bit 01_344
-bit 01_345
-bit 01_346
-bit 01_347
-bit 01_348
-bit 01_349
-bit 01_350
-bit 01_351
-bit 01_352
-bit 01_353
-bit 01_354
-bit 01_355
-bit 01_356
-bit 01_357
-bit 01_358
-bit 01_359
-bit 01_360
-bit 01_361
-bit 01_362
-bit 01_363
-bit 01_364
-bit 01_365
-bit 01_366
-bit 01_367
-bit 01_368
-bit 01_369
-bit 01_370
-bit 01_371
-bit 01_372
-bit 01_373
-bit 01_374
-bit 01_375
-bit 01_376
-bit 01_377
-bit 01_378
-bit 01_379
-bit 01_380
-bit 01_381
-bit 01_382
-bit 01_383
-bit 01_384
-bit 01_385
-bit 01_386
-bit 01_387
-bit 01_388
-bit 01_389
-bit 01_390
-bit 01_391
-bit 01_392
-bit 01_393
-bit 01_394
-bit 01_395
-bit 01_396
-bit 01_397
-bit 01_398
-bit 01_399
-bit 01_400
-bit 01_401
-bit 01_402
-bit 01_403
-bit 01_404
-bit 01_405
-bit 01_406
-bit 01_407
-bit 01_408
-bit 01_409
-bit 01_410
-bit 01_411
-bit 01_412
-bit 01_413
-bit 01_414
-bit 01_415
-bit 01_416
-bit 01_417
-bit 01_418
-bit 01_419
-bit 01_420
-bit 01_421
-bit 01_422
-bit 01_423
-bit 01_424
-bit 01_425
-bit 01_426
-bit 01_427
-bit 01_428
-bit 01_429
-bit 01_430
-bit 01_431
-bit 01_432
-bit 01_433
-bit 01_434
-bit 01_435
-bit 01_436
-bit 01_437
-bit 01_438
-bit 01_439
-bit 01_440
-bit 01_441
-bit 01_442
-bit 01_443
-bit 01_444
-bit 01_445
-bit 01_446
-bit 01_447
-bit 01_448
-bit 01_449
-bit 01_450
-bit 01_451
-bit 01_452
-bit 01_453
-bit 01_454
-bit 01_455
-bit 01_456
-bit 01_457
-bit 01_458
-bit 01_459
-bit 01_460
-bit 01_461
-bit 01_462
-bit 01_463
-bit 01_464
-bit 01_465
-bit 01_466
-bit 01_467
-bit 01_468
-bit 01_469
-bit 01_470
-bit 01_471
-bit 01_472
-bit 01_473
-bit 01_474
-bit 01_475
-bit 01_477
-bit 01_478
-bit 01_479
-bit 01_480
-bit 01_481
-bit 01_482
-bit 01_483
-bit 01_484
-bit 01_485
-bit 01_488
-bit 01_489
-bit 01_490
-bit 01_492
-bit 01_494
-bit 01_495
-bit 01_496
-bit 01_497
-bit 01_498
-bit 01_499
-bit 01_500
-bit 01_504
-bit 01_505
-bit 01_506
-bit 01_507
-bit 01_508
-bit 01_512
-bit 01_513
-bit 01_514
-bit 01_515
-bit 01_516
-bit 01_519
-bit 01_520
-bit 01_521
-bit 01_522
-bit 01_523
-bit 01_524
-bit 01_525
-bit 01_526
-bit 01_544
-bit 01_545
-bit 01_546
-bit 01_547
-bit 01_548
-bit 01_549
-bit 01_550
-bit 01_552
-bit 01_553
-bit 01_554
-bit 01_555
-bit 01_556
-bit 01_557
-bit 01_558
-bit 01_559
-bit 01_560
-bit 01_561
-bit 01_562
-bit 01_563
-bit 01_564
-bit 01_565
-bit 01_566
-bit 01_567
-bit 01_568
-bit 01_569
-bit 01_570
-bit 01_571
-bit 01_572
-bit 01_573
-bit 01_574
-bit 01_576
-bit 01_577
-bit 01_578
-bit 01_579
-bit 01_580
-bit 01_581
-bit 01_582
-bit 01_584
-bit 01_585
-bit 01_586
-bit 01_587
-bit 01_588
-bit 01_589
-bit 01_592
-bit 01_593
-bit 01_594
-bit 01_595
-bit 01_596
-bit 01_600
-bit 01_601
-bit 01_602
-bit 01_603
-bit 01_604
-bit 01_607
-bit 01_608
-bit 01_609
-bit 01_610
-bit 01_611
-bit 01_612
-bit 01_614
-bit 01_615
-bit 01_616
-bit 01_617
-bit 01_618
-bit 01_619
-bit 01_620
-bit 01_623
-bit 01_624
-bit 01_625
-bit 01_626
-bit 01_627
-bit 01_628
-bit 01_631
-bit 01_632
-bit 01_633
-bit 01_634
-bit 01_635
-bit 01_636
-bit 01_640
-bit 01_641
-bit 01_642
-bit 01_643
-bit 01_644
-bit 01_645
-bit 01_646
-bit 01_647
-bit 01_648
-bit 01_649
-bit 01_650
-bit 01_651
-bit 01_652
-bit 01_653
-bit 01_654
-bit 01_655
-bit 01_656
-bit 01_657
-bit 01_658
-bit 01_659
-bit 01_660
-bit 01_661
-bit 01_662
-bit 01_663
-bit 01_664
-bit 01_665
-bit 01_666
-bit 01_667
-bit 01_668
-bit 01_670
-bit 01_671
-bit 01_672
-bit 01_673
-bit 01_674
-bit 01_675
-bit 01_676
-bit 01_677
-bit 01_678
-bit 01_679
-bit 01_680
-bit 01_681
-bit 01_682
-bit 01_683
-bit 01_684
-bit 01_685
-bit 01_686
-bit 01_687
-bit 01_696
-bit 01_697
-bit 01_698
-bit 01_700
-bit 01_701
-bit 02_00
-bit 02_02
-bit 02_03
-bit 02_05
-bit 02_11
-bit 02_13
-bit 02_20
-bit 02_23
-bit 02_40
-bit 02_41
-bit 02_42
-bit 02_43
-bit 02_44
-bit 02_45
-bit 02_55
-bit 02_64
-bit 02_65
-bit 02_66
-bit 02_67
-bit 02_68
-bit 02_69
-bit 02_70
-bit 02_71
-bit 02_72
-bit 02_73
-bit 02_74
-bit 02_75
-bit 02_80
-bit 02_81
-bit 02_82
-bit 02_83
-bit 02_84
-bit 02_85
-bit 02_86
-bit 02_87
-bit 02_88
-bit 02_89
-bit 02_90
-bit 02_91
-bit 02_92
-bit 02_93
-bit 02_94
-bit 02_95
-bit 02_96
-bit 02_97
-bit 02_98
-bit 02_99
-bit 02_100
-bit 02_101
-bit 02_102
-bit 02_103
-bit 02_108
-bit 02_109
-bit 02_110
-bit 02_112
-bit 02_113
-bit 02_114
-bit 02_115
-bit 02_116
-bit 02_117
-bit 02_118
-bit 02_119
-bit 02_128
-bit 02_129
-bit 02_136
-bit 02_137
-bit 02_138
-bit 02_139
-bit 02_140
-bit 02_141
-bit 02_142
-bit 02_143
-bit 02_144
-bit 02_145
-bit 02_146
-bit 02_151
-bit 02_152
-bit 02_153
-bit 02_156
-bit 02_157
-bit 02_184
-bit 02_185
-bit 02_186
-bit 02_187
-bit 02_188
-bit 02_189
-bit 02_190
-bit 02_191
-bit 02_192
-bit 02_193
-bit 02_194
-bit 02_195
-bit 02_196
-bit 02_197
-bit 02_198
-bit 02_199
-bit 02_200
-bit 02_201
-bit 02_202
-bit 02_203
-bit 02_204
-bit 02_205
-bit 02_206
-bit 02_207
-bit 02_232
-bit 02_233
-bit 02_234
-bit 02_235
-bit 02_236
-bit 02_237
-bit 02_238
-bit 02_239
-bit 02_240
-bit 02_241
-bit 02_242
-bit 02_243
-bit 02_244
-bit 02_245
-bit 02_246
-bit 02_247
-bit 02_248
-bit 02_249
-bit 02_250
-bit 02_251
-bit 02_252
-bit 02_253
-bit 02_254
-bit 02_255
-bit 02_256
-bit 02_257
-bit 02_258
-bit 02_259
-bit 02_260
-bit 02_261
-bit 02_262
-bit 02_263
-bit 02_264
-bit 02_265
-bit 02_266
-bit 02_267
-bit 02_268
-bit 02_269
-bit 02_270
-bit 02_271
-bit 02_272
-bit 02_273
-bit 02_274
-bit 02_276
-bit 02_277
-bit 02_278
-bit 02_288
-bit 02_292
-bit 02_293
-bit 02_296
-bit 02_297
-bit 02_298
-bit 02_299
-bit 02_300
-bit 02_301
-bit 02_302
-bit 02_303
-bit 02_304
-bit 02_305
-bit 02_328
-bit 02_329
-bit 02_330
-bit 02_336
-bit 02_337
-bit 02_338
-bit 02_339
-bit 02_340
-bit 02_341
-bit 02_342
-bit 02_343
-bit 02_344
-bit 02_345
-bit 02_346
-bit 02_347
-bit 02_348
-bit 02_349
-bit 02_350
-bit 02_351
-bit 02_368
-bit 02_369
-bit 02_370
-bit 02_371
-bit 02_372
-bit 02_373
-bit 02_374
-bit 02_375
-bit 02_376
-bit 02_377
-bit 02_378
-bit 02_379
-bit 02_384
-bit 02_386
-bit 02_390
-bit 02_391
-bit 02_392
-bit 02_393
-bit 02_394
-bit 02_395
-bit 02_396
-bit 02_397
-bit 02_398
-bit 02_399
-bit 02_400
-bit 02_401
-bit 02_402
-bit 02_403
-bit 02_404
-bit 02_405
-bit 02_406
-bit 02_407
-bit 02_408
-bit 02_409
-bit 02_410
-bit 02_411
-bit 02_412
-bit 02_413
-bit 02_416
-bit 02_417
-bit 02_418
-bit 02_419
-bit 02_424
-bit 02_425
-bit 02_426
-bit 02_427
-bit 02_428
-bit 02_429
-bit 02_430
-bit 02_431
-bit 02_432
-bit 02_433
-bit 02_434
-bit 02_435
-bit 02_436
-bit 02_437
-bit 02_438
-bit 02_439
-bit 02_440
-bit 02_441
-bit 02_442
-bit 02_443
-bit 02_459
-bit 02_460
-bit 02_461
-bit 02_462
-bit 02_463
-bit 02_464
-bit 02_465
-bit 02_466
-bit 02_467
-bit 02_468
-bit 02_469
-bit 02_470
-bit 02_471
-bit 02_472
-bit 02_473
-bit 02_488
-bit 02_489
-bit 02_490
-bit 02_491
-bit 02_496
-bit 02_497
-bit 02_498
-bit 02_504
-bit 02_505
-bit 02_506
-bit 02_507
-bit 02_508
-bit 02_509
-bit 02_510
-bit 02_511
-bit 02_512
-bit 02_513
-bit 02_514
-bit 02_515
-bit 02_516
-bit 02_517
-bit 02_518
-bit 02_519
-bit 02_520
-bit 02_521
-bit 02_522
-bit 02_523
-bit 02_524
-bit 02_525
-bit 02_526
-bit 02_527
-bit 02_528
-bit 02_529
-bit 02_530
-bit 02_531
-bit 02_532
-bit 02_533
-bit 02_534
-bit 02_535
-bit 02_536
-bit 02_537
-bit 02_538
-bit 02_544
-bit 02_545
-bit 02_546
-bit 02_547
-bit 02_548
-bit 02_552
-bit 02_553
-bit 02_554
-bit 02_555
-bit 02_556
-bit 02_557
-bit 02_558
-bit 02_559
-bit 02_560
-bit 02_561
-bit 02_568
-bit 02_569
-bit 02_570
-bit 02_571
-bit 02_572
-bit 02_576
-bit 02_577
-bit 02_578
-bit 02_579
-bit 02_580
-bit 02_584
-bit 02_585
-bit 02_586
-bit 02_587
-bit 02_588
-bit 02_589
-bit 02_590
-bit 02_591
-bit 02_592
-bit 02_593
-bit 02_594
-bit 02_595
-bit 02_600
-bit 02_601
-bit 02_602
-bit 02_603
-bit 02_604
-bit 02_605
-bit 02_606
-bit 02_607
-bit 02_608
-bit 02_609
-bit 02_610
-bit 02_611
-bit 02_616
-bit 02_617
-bit 02_618
-bit 02_619
-bit 02_620
-bit 02_621
-bit 02_622
-bit 02_624
-bit 02_625
-bit 02_626
-bit 02_627
-bit 02_628
-bit 02_632
-bit 02_633
-bit 02_634
-bit 02_638
-bit 02_640
-bit 02_641
-bit 02_642
-bit 02_643
-bit 02_644
-bit 02_645
-bit 02_646
-bit 02_647
-bit 02_648
-bit 02_649
-bit 02_650
-bit 02_651
-bit 02_652
-bit 02_653
-bit 02_654
-bit 02_655
-bit 02_656
-bit 02_657
-bit 02_658
-bit 02_659
-bit 02_660
-bit 02_661
-bit 02_662
-bit 02_663
-bit 02_664
-bit 02_665
-bit 02_666
-bit 02_667
-bit 02_668
-bit 02_669
-bit 02_670
-bit 02_671
-bit 02_672
-bit 02_673
-bit 02_674
-bit 02_675
-bit 02_676
-bit 02_677
-bit 02_678
-bit 02_679
-bit 02_680
-bit 02_681
-bit 03_01
-bit 03_04
-bit 03_11
-bit 03_13
-bit 03_20
-bit 03_23
-bit 03_40
-bit 03_41
-bit 03_42
-bit 03_43
-bit 03_44
-bit 03_55
-bit 03_64
-bit 03_65
-bit 03_66
-bit 03_67
-bit 03_68
-bit 03_69
-bit 03_70
-bit 03_71
-bit 03_72
-bit 03_73
-bit 03_74
-bit 03_75
-bit 03_80
-bit 03_81
-bit 03_82
-bit 03_83
-bit 03_84
-bit 03_85
-bit 03_86
-bit 03_87
-bit 03_88
-bit 03_89
-bit 03_90
-bit 03_91
-bit 03_92
-bit 03_93
-bit 03_94
-bit 03_95
-bit 03_96
-bit 03_97
-bit 03_98
-bit 03_99
-bit 03_100
-bit 03_101
-bit 03_102
-bit 03_103
-bit 03_108
-bit 03_109
-bit 03_112
-bit 03_113
-bit 03_114
-bit 03_115
-bit 03_116
-bit 03_117
-bit 03_118
-bit 03_119
-bit 03_128
-bit 03_129
-bit 03_136
-bit 03_137
-bit 03_138
-bit 03_139
-bit 03_140
-bit 03_141
-bit 03_142
-bit 03_144
-bit 03_145
-bit 03_150
-bit 03_151
-bit 03_152
-bit 03_156
-bit 03_157
-bit 03_159
-bit 03_184
-bit 03_185
-bit 03_186
-bit 03_187
-bit 03_188
-bit 03_189
-bit 03_190
-bit 03_191
-bit 03_192
-bit 03_193
-bit 03_194
-bit 03_195
-bit 03_196
-bit 03_197
-bit 03_198
-bit 03_199
-bit 03_200
-bit 03_201
-bit 03_202
-bit 03_203
-bit 03_204
-bit 03_205
-bit 03_206
-bit 03_207
-bit 03_232
-bit 03_233
-bit 03_234
-bit 03_236
-bit 03_237
-bit 03_238
-bit 03_240
-bit 03_241
-bit 03_242
-bit 03_244
-bit 03_245
-bit 03_246
-bit 03_248
-bit 03_249
-bit 03_250
-bit 03_252
-bit 03_253
-bit 03_254
-bit 03_256
-bit 03_257
-bit 03_258
-bit 03_260
-bit 03_261
-bit 03_262
-bit 03_264
-bit 03_265
-bit 03_266
-bit 03_268
-bit 03_269
-bit 03_270
-bit 03_272
-bit 03_273
-bit 03_274
-bit 03_276
-bit 03_277
-bit 03_278
-bit 03_288
-bit 03_289
-bit 03_292
-bit 03_296
-bit 03_297
-bit 03_298
-bit 03_299
-bit 03_300
-bit 03_301
-bit 03_302
-bit 03_303
-bit 03_304
-bit 03_305
-bit 03_311
-bit 03_328
-bit 03_329
-bit 03_336
-bit 03_337
-bit 03_338
-bit 03_339
-bit 03_340
-bit 03_341
-bit 03_342
-bit 03_343
-bit 03_344
-bit 03_345
-bit 03_346
-bit 03_347
-bit 03_348
-bit 03_349
-bit 03_350
-bit 03_351
-bit 03_368
-bit 03_369
-bit 03_370
-bit 03_371
-bit 03_372
-bit 03_373
-bit 03_374
-bit 03_375
-bit 03_376
-bit 03_377
-bit 03_378
-bit 03_379
-bit 03_384
-bit 03_386
-bit 03_389
-bit 03_390
-bit 03_391
-bit 03_392
-bit 03_393
-bit 03_394
-bit 03_395
-bit 03_396
-bit 03_397
-bit 03_398
-bit 03_399
-bit 03_400
-bit 03_401
-bit 03_402
-bit 03_403
-bit 03_404
-bit 03_405
-bit 03_406
-bit 03_407
-bit 03_408
-bit 03_409
-bit 03_410
-bit 03_411
-bit 03_412
-bit 03_416
-bit 03_417
-bit 03_418
-bit 03_424
-bit 03_425
-bit 03_426
-bit 03_427
-bit 03_428
-bit 03_429
-bit 03_430
-bit 03_431
-bit 03_432
-bit 03_433
-bit 03_434
-bit 03_435
-bit 03_436
-bit 03_437
-bit 03_438
-bit 03_439
-bit 03_440
-bit 03_441
-bit 03_442
-bit 03_443
-bit 03_459
-bit 03_460
-bit 03_461
-bit 03_463
-bit 03_464
-bit 03_465
-bit 03_466
-bit 03_467
-bit 03_468
-bit 03_469
-bit 03_470
-bit 03_471
-bit 03_472
-bit 03_473
-bit 03_488
-bit 03_489
-bit 03_490
-bit 03_491
-bit 03_496
-bit 03_497
-bit 03_498
-bit 03_504
-bit 03_505
-bit 03_506
-bit 03_507
-bit 03_508
-bit 03_509
-bit 03_510
-bit 03_511
-bit 03_512
-bit 03_513
-bit 03_514
-bit 03_515
-bit 03_516
-bit 03_517
-bit 03_518
-bit 03_519
-bit 03_520
-bit 03_521
-bit 03_522
-bit 03_523
-bit 03_524
-bit 03_525
-bit 03_526
-bit 03_527
-bit 03_528
-bit 03_529
-bit 03_530
-bit 03_531
-bit 03_532
-bit 03_533
-bit 03_534
-bit 03_535
-bit 03_536
-bit 03_537
-bit 03_538
-bit 03_544
-bit 03_545
-bit 03_546
-bit 03_552
-bit 03_553
-bit 03_554
-bit 03_555
-bit 03_556
-bit 03_557
-bit 03_558
-bit 03_559
-bit 03_560
-bit 03_568
-bit 03_569
-bit 03_570
-bit 03_571
-bit 03_576
-bit 03_577
-bit 03_578
-bit 03_579
-bit 03_584
-bit 03_585
-bit 03_586
-bit 03_587
-bit 03_588
-bit 03_589
-bit 03_590
-bit 03_591
-bit 03_592
-bit 03_593
-bit 03_594
-bit 03_595
-bit 03_600
-bit 03_601
-bit 03_602
-bit 03_603
-bit 03_604
-bit 03_605
-bit 03_606
-bit 03_607
-bit 03_608
-bit 03_609
-bit 03_610
-bit 03_611
-bit 03_616
-bit 03_617
-bit 03_618
-bit 03_619
-bit 03_620
-bit 03_621
-bit 03_622
-bit 03_624
-bit 03_625
-bit 03_626
-bit 03_627
-bit 03_628
-bit 03_632
-bit 03_633
-bit 03_634
-bit 03_637
-bit 03_638
-bit 03_640
-bit 03_641
-bit 03_642
-bit 03_643
-bit 03_644
-bit 03_645
-bit 03_646
-bit 03_647
-bit 03_648
-bit 03_649
-bit 03_650
-bit 03_651
-bit 03_652
-bit 03_653
-bit 03_654
-bit 03_655
-bit 03_656
-bit 03_657
-bit 03_658
-bit 03_659
-bit 03_660
-bit 03_661
-bit 03_662
-bit 03_663
-bit 03_664
-bit 03_665
-bit 03_666
-bit 03_667
-bit 03_668
-bit 03_669
-bit 03_670
-bit 03_671
-bit 03_672
-bit 03_673
-bit 03_674
-bit 03_675
-bit 03_676
-bit 03_677
-bit 03_678
-bit 03_679
-bit 03_680
 bit 28_00
 bit 28_01
 bit 28_07

diff --git a/artix7/mask_gtp_channel_3_mid_left.db b/artix7/mask_gtp_channel_3_mid_left.db
index c576c8c..6f48b45 100644
--- a/artix7/mask_gtp_channel_3_mid_left.db
+++ b/artix7/mask_gtp_channel_3_mid_left.db

@@ -1632,1637 +1632,3 @@
 bit 03_678
 bit 03_679
 bit 03_680
-bit 28_00
-bit 28_01
-bit 28_07
-bit 28_47
-bit 28_52
-bit 28_53
-bit 28_65
-bit 28_102
-bit 28_103
-bit 28_104
-bit 28_105
-bit 28_106
-bit 28_107
-bit 28_108
-bit 28_109
-bit 28_110
-bit 28_111
-bit 28_112
-bit 28_113
-bit 28_114
-bit 28_115
-bit 28_116
-bit 28_117
-bit 28_124
-bit 28_125
-bit 28_128
-bit 28_129
-bit 28_130
-bit 28_131
-bit 28_132
-bit 28_133
-bit 28_134
-bit 28_135
-bit 28_136
-bit 28_138
-bit 28_139
-bit 28_140
-bit 28_141
-bit 28_142
-bit 28_143
-bit 28_144
-bit 28_145
-bit 28_146
-bit 28_147
-bit 28_148
-bit 28_149
-bit 28_150
-bit 28_151
-bit 28_152
-bit 28_153
-bit 28_154
-bit 28_155
-bit 28_156
-bit 28_157
-bit 28_158
-bit 28_159
-bit 28_160
-bit 28_161
-bit 28_162
-bit 28_163
-bit 28_164
-bit 28_165
-bit 28_168
-bit 28_169
-bit 28_170
-bit 28_171
-bit 28_172
-bit 28_173
-bit 28_174
-bit 28_176
-bit 28_177
-bit 28_178
-bit 28_179
-bit 28_180
-bit 28_181
-bit 28_187
-bit 28_188
-bit 28_189
-bit 28_190
-bit 28_191
-bit 28_192
-bit 28_193
-bit 28_194
-bit 28_195
-bit 28_200
-bit 28_203
-bit 28_204
-bit 28_205
-bit 28_206
-bit 28_208
-bit 28_209
-bit 28_210
-bit 28_211
-bit 28_212
-bit 28_213
-bit 28_214
-bit 28_215
-bit 28_216
-bit 28_217
-bit 28_218
-bit 28_219
-bit 28_220
-bit 28_221
-bit 28_222
-bit 28_224
-bit 28_225
-bit 28_231
-bit 28_247
-bit 28_288
-bit 28_289
-bit 28_290
-bit 28_291
-bit 28_292
-bit 28_293
-bit 28_294
-bit 28_336
-bit 28_337
-bit 28_338
-bit 28_339
-bit 28_340
-bit 28_341
-bit 28_342
-bit 28_343
-bit 28_344
-bit 28_345
-bit 28_346
-bit 28_347
-bit 28_348
-bit 28_349
-bit 28_350
-bit 28_351
-bit 28_352
-bit 28_353
-bit 28_354
-bit 28_355
-bit 28_356
-bit 28_357
-bit 28_358
-bit 28_359
-bit 28_360
-bit 28_361
-bit 28_362
-bit 28_363
-bit 28_364
-bit 28_365
-bit 28_366
-bit 28_367
-bit 28_368
-bit 28_369
-bit 28_370
-bit 28_371
-bit 28_372
-bit 28_373
-bit 28_374
-bit 28_375
-bit 28_376
-bit 28_377
-bit 28_378
-bit 28_379
-bit 28_380
-bit 28_381
-bit 28_382
-bit 28_383
-bit 28_384
-bit 28_385
-bit 28_386
-bit 28_387
-bit 28_388
-bit 28_389
-bit 28_390
-bit 28_391
-bit 28_392
-bit 28_393
-bit 28_394
-bit 28_395
-bit 28_396
-bit 28_397
-bit 28_398
-bit 28_399
-bit 28_400
-bit 28_401
-bit 28_402
-bit 28_403
-bit 28_404
-bit 28_405
-bit 28_406
-bit 28_407
-bit 28_408
-bit 28_409
-bit 28_410
-bit 28_411
-bit 28_412
-bit 28_413
-bit 28_414
-bit 28_415
-bit 28_416
-bit 28_417
-bit 28_418
-bit 28_419
-bit 28_420
-bit 28_421
-bit 28_422
-bit 28_423
-bit 28_424
-bit 28_425
-bit 28_426
-bit 28_427
-bit 28_428
-bit 28_429
-bit 28_430
-bit 28_431
-bit 28_432
-bit 28_433
-bit 28_434
-bit 28_435
-bit 28_436
-bit 28_437
-bit 28_438
-bit 28_439
-bit 28_440
-bit 28_441
-bit 28_442
-bit 28_443
-bit 28_444
-bit 28_445
-bit 28_446
-bit 28_447
-bit 28_448
-bit 28_449
-bit 28_450
-bit 28_451
-bit 28_452
-bit 28_453
-bit 28_454
-bit 28_455
-bit 28_456
-bit 28_457
-bit 28_458
-bit 28_459
-bit 28_460
-bit 28_461
-bit 28_462
-bit 28_463
-bit 28_464
-bit 28_465
-bit 28_466
-bit 28_467
-bit 28_468
-bit 28_469
-bit 28_470
-bit 28_471
-bit 28_472
-bit 28_473
-bit 28_474
-bit 28_475
-bit 28_476
-bit 28_478
-bit 28_479
-bit 28_480
-bit 28_481
-bit 28_482
-bit 28_483
-bit 28_484
-bit 28_485
-bit 28_488
-bit 28_489
-bit 28_490
-bit 28_492
-bit 28_494
-bit 28_495
-bit 28_496
-bit 28_497
-bit 28_498
-bit 28_499
-bit 28_500
-bit 28_504
-bit 28_505
-bit 28_506
-bit 28_507
-bit 28_508
-bit 28_512
-bit 28_513
-bit 28_514
-bit 28_515
-bit 28_516
-bit 28_519
-bit 28_520
-bit 28_521
-bit 28_522
-bit 28_523
-bit 28_524
-bit 28_525
-bit 28_526
-bit 28_527
-bit 28_544
-bit 28_545
-bit 28_546
-bit 28_547
-bit 28_548
-bit 28_549
-bit 28_550
-bit 28_551
-bit 28_552
-bit 28_553
-bit 28_554
-bit 28_555
-bit 28_556
-bit 28_557
-bit 28_558
-bit 28_559
-bit 28_560
-bit 28_561
-bit 28_562
-bit 28_563
-bit 28_564
-bit 28_565
-bit 28_566
-bit 28_567
-bit 28_568
-bit 28_569
-bit 28_570
-bit 28_571
-bit 28_572
-bit 28_573
-bit 28_574
-bit 28_575
-bit 28_576
-bit 28_577
-bit 28_578
-bit 28_579
-bit 28_580
-bit 28_581
-bit 28_582
-bit 28_583
-bit 28_584
-bit 28_585
-bit 28_586
-bit 28_587
-bit 28_588
-bit 28_589
-bit 28_590
-bit 28_591
-bit 28_592
-bit 28_593
-bit 28_594
-bit 28_595
-bit 28_596
-bit 28_600
-bit 28_601
-bit 28_602
-bit 28_603
-bit 28_604
-bit 28_608
-bit 28_609
-bit 28_610
-bit 28_611
-bit 28_612
-bit 28_614
-bit 28_615
-bit 28_616
-bit 28_617
-bit 28_618
-bit 28_619
-bit 28_620
-bit 28_623
-bit 28_624
-bit 28_625
-bit 28_626
-bit 28_627
-bit 28_628
-bit 28_632
-bit 28_633
-bit 28_634
-bit 28_635
-bit 28_636
-bit 28_640
-bit 28_641
-bit 28_642
-bit 28_643
-bit 28_644
-bit 28_646
-bit 28_647
-bit 28_648
-bit 28_649
-bit 28_650
-bit 28_651
-bit 28_652
-bit 28_654
-bit 28_655
-bit 28_656
-bit 28_657
-bit 28_658
-bit 28_659
-bit 28_660
-bit 28_662
-bit 28_663
-bit 28_664
-bit 28_665
-bit 28_666
-bit 28_667
-bit 28_668
-bit 28_670
-bit 28_671
-bit 28_672
-bit 28_673
-bit 28_674
-bit 28_675
-bit 28_676
-bit 28_677
-bit 28_678
-bit 28_679
-bit 28_680
-bit 28_681
-bit 28_682
-bit 28_683
-bit 28_684
-bit 28_685
-bit 28_686
-bit 28_687
-bit 28_696
-bit 28_697
-bit 28_698
-bit 28_700
-bit 28_701
-bit 28_702
-bit 29_00
-bit 29_01
-bit 29_06
-bit 29_07
-bit 29_47
-bit 29_101
-bit 29_102
-bit 29_103
-bit 29_104
-bit 29_105
-bit 29_106
-bit 29_107
-bit 29_108
-bit 29_109
-bit 29_110
-bit 29_112
-bit 29_113
-bit 29_114
-bit 29_115
-bit 29_116
-bit 29_117
-bit 29_123
-bit 29_124
-bit 29_125
-bit 29_128
-bit 29_129
-bit 29_130
-bit 29_131
-bit 29_132
-bit 29_133
-bit 29_134
-bit 29_135
-bit 29_138
-bit 29_139
-bit 29_140
-bit 29_141
-bit 29_142
-bit 29_144
-bit 29_145
-bit 29_146
-bit 29_147
-bit 29_148
-bit 29_149
-bit 29_150
-bit 29_151
-bit 29_152
-bit 29_153
-bit 29_154
-bit 29_155
-bit 29_156
-bit 29_157
-bit 29_158
-bit 29_160
-bit 29_161
-bit 29_162
-bit 29_163
-bit 29_164
-bit 29_165
-bit 29_168
-bit 29_169
-bit 29_170
-bit 29_171
-bit 29_172
-bit 29_173
-bit 29_176
-bit 29_177
-bit 29_178
-bit 29_179
-bit 29_180
-bit 29_181
-bit 29_187
-bit 29_188
-bit 29_189
-bit 29_190
-bit 29_191
-bit 29_192
-bit 29_193
-bit 29_194
-bit 29_195
-bit 29_202
-bit 29_203
-bit 29_204
-bit 29_205
-bit 29_207
-bit 29_208
-bit 29_209
-bit 29_210
-bit 29_211
-bit 29_212
-bit 29_213
-bit 29_214
-bit 29_215
-bit 29_216
-bit 29_217
-bit 29_218
-bit 29_219
-bit 29_220
-bit 29_221
-bit 29_224
-bit 29_226
-bit 29_231
-bit 29_288
-bit 29_289
-bit 29_290
-bit 29_291
-bit 29_292
-bit 29_293
-bit 29_336
-bit 29_337
-bit 29_338
-bit 29_339
-bit 29_340
-bit 29_341
-bit 29_342
-bit 29_343
-bit 29_344
-bit 29_345
-bit 29_346
-bit 29_347
-bit 29_348
-bit 29_349
-bit 29_350
-bit 29_351
-bit 29_352
-bit 29_353
-bit 29_354
-bit 29_355
-bit 29_356
-bit 29_357
-bit 29_358
-bit 29_359
-bit 29_360
-bit 29_361
-bit 29_362
-bit 29_363
-bit 29_364
-bit 29_365
-bit 29_366
-bit 29_367
-bit 29_368
-bit 29_369
-bit 29_370
-bit 29_371
-bit 29_372
-bit 29_373
-bit 29_374
-bit 29_375
-bit 29_376
-bit 29_377
-bit 29_378
-bit 29_379
-bit 29_380
-bit 29_381
-bit 29_382
-bit 29_383
-bit 29_384
-bit 29_385
-bit 29_386
-bit 29_387
-bit 29_388
-bit 29_389
-bit 29_390
-bit 29_391
-bit 29_392
-bit 29_393
-bit 29_394
-bit 29_395
-bit 29_396
-bit 29_397
-bit 29_398
-bit 29_399
-bit 29_400
-bit 29_401
-bit 29_402
-bit 29_403
-bit 29_404
-bit 29_405
-bit 29_406
-bit 29_407
-bit 29_408
-bit 29_409
-bit 29_410
-bit 29_411
-bit 29_412
-bit 29_413
-bit 29_414
-bit 29_415
-bit 29_416
-bit 29_417
-bit 29_418
-bit 29_419
-bit 29_420
-bit 29_421
-bit 29_422
-bit 29_423
-bit 29_424
-bit 29_425
-bit 29_426
-bit 29_427
-bit 29_428
-bit 29_429
-bit 29_430
-bit 29_431
-bit 29_432
-bit 29_433
-bit 29_434
-bit 29_435
-bit 29_436
-bit 29_437
-bit 29_438
-bit 29_439
-bit 29_440
-bit 29_441
-bit 29_442
-bit 29_443
-bit 29_444
-bit 29_445
-bit 29_446
-bit 29_447
-bit 29_448
-bit 29_449
-bit 29_450
-bit 29_451
-bit 29_452
-bit 29_453
-bit 29_454
-bit 29_455
-bit 29_456
-bit 29_457
-bit 29_458
-bit 29_459
-bit 29_460
-bit 29_461
-bit 29_462
-bit 29_463
-bit 29_464
-bit 29_465
-bit 29_466
-bit 29_467
-bit 29_468
-bit 29_469
-bit 29_470
-bit 29_471
-bit 29_472
-bit 29_473
-bit 29_474
-bit 29_475
-bit 29_477
-bit 29_478
-bit 29_479
-bit 29_480
-bit 29_481
-bit 29_482
-bit 29_483
-bit 29_484
-bit 29_485
-bit 29_488
-bit 29_489
-bit 29_490
-bit 29_492
-bit 29_494
-bit 29_495
-bit 29_496
-bit 29_497
-bit 29_498
-bit 29_499
-bit 29_500
-bit 29_504
-bit 29_505
-bit 29_506
-bit 29_507
-bit 29_508
-bit 29_512
-bit 29_513
-bit 29_514
-bit 29_515
-bit 29_516
-bit 29_519
-bit 29_520
-bit 29_521
-bit 29_522
-bit 29_523
-bit 29_524
-bit 29_525
-bit 29_526
-bit 29_544
-bit 29_545
-bit 29_546
-bit 29_547
-bit 29_548
-bit 29_549
-bit 29_550
-bit 29_552
-bit 29_553
-bit 29_554
-bit 29_555
-bit 29_556
-bit 29_557
-bit 29_558
-bit 29_559
-bit 29_560
-bit 29_561
-bit 29_562
-bit 29_563
-bit 29_564
-bit 29_565
-bit 29_566
-bit 29_567
-bit 29_568
-bit 29_569
-bit 29_570
-bit 29_571
-bit 29_572
-bit 29_573
-bit 29_574
-bit 29_576
-bit 29_577
-bit 29_578
-bit 29_579
-bit 29_580
-bit 29_581
-bit 29_582
-bit 29_584
-bit 29_585
-bit 29_586
-bit 29_587
-bit 29_588
-bit 29_589
-bit 29_592
-bit 29_593
-bit 29_594
-bit 29_595
-bit 29_596
-bit 29_600
-bit 29_601
-bit 29_602
-bit 29_603
-bit 29_604
-bit 29_607
-bit 29_608
-bit 29_609
-bit 29_610
-bit 29_611
-bit 29_612
-bit 29_614
-bit 29_615
-bit 29_616
-bit 29_617
-bit 29_618
-bit 29_619
-bit 29_620
-bit 29_623
-bit 29_624
-bit 29_625
-bit 29_626
-bit 29_627
-bit 29_628
-bit 29_631
-bit 29_632
-bit 29_633
-bit 29_634
-bit 29_635
-bit 29_636
-bit 29_640
-bit 29_641
-bit 29_642
-bit 29_643
-bit 29_644
-bit 29_645
-bit 29_646
-bit 29_647
-bit 29_648
-bit 29_649
-bit 29_650
-bit 29_651
-bit 29_652
-bit 29_653
-bit 29_654
-bit 29_655
-bit 29_656
-bit 29_657
-bit 29_658
-bit 29_659
-bit 29_660
-bit 29_661
-bit 29_662
-bit 29_663
-bit 29_664
-bit 29_665
-bit 29_666
-bit 29_667
-bit 29_668
-bit 29_670
-bit 29_671
-bit 29_672
-bit 29_673
-bit 29_674
-bit 29_675
-bit 29_676
-bit 29_677
-bit 29_678
-bit 29_679
-bit 29_680
-bit 29_681
-bit 29_682
-bit 29_683
-bit 29_684
-bit 29_685
-bit 29_686
-bit 29_687
-bit 29_696
-bit 29_697
-bit 29_698
-bit 29_700
-bit 29_701
-bit 30_00
-bit 30_02
-bit 30_03
-bit 30_05
-bit 30_11
-bit 30_13
-bit 30_20
-bit 30_23
-bit 30_40
-bit 30_41
-bit 30_42
-bit 30_43
-bit 30_44
-bit 30_45
-bit 30_55
-bit 30_64
-bit 30_65
-bit 30_66
-bit 30_67
-bit 30_68
-bit 30_69
-bit 30_70
-bit 30_71
-bit 30_72
-bit 30_73
-bit 30_74
-bit 30_75
-bit 30_80
-bit 30_81
-bit 30_82
-bit 30_83
-bit 30_84
-bit 30_85
-bit 30_86
-bit 30_87
-bit 30_88
-bit 30_89
-bit 30_90
-bit 30_91
-bit 30_92
-bit 30_93
-bit 30_94
-bit 30_95
-bit 30_96
-bit 30_97
-bit 30_98
-bit 30_99
-bit 30_100
-bit 30_101
-bit 30_102
-bit 30_103
-bit 30_108
-bit 30_109
-bit 30_110
-bit 30_112
-bit 30_113
-bit 30_114
-bit 30_115
-bit 30_116
-bit 30_117
-bit 30_118
-bit 30_119
-bit 30_128
-bit 30_129
-bit 30_136
-bit 30_137
-bit 30_138
-bit 30_139
-bit 30_140
-bit 30_141
-bit 30_142
-bit 30_143
-bit 30_144
-bit 30_145
-bit 30_146
-bit 30_151
-bit 30_152
-bit 30_153
-bit 30_156
-bit 30_157
-bit 30_184
-bit 30_185
-bit 30_186
-bit 30_187
-bit 30_188
-bit 30_189
-bit 30_190
-bit 30_191
-bit 30_192
-bit 30_193
-bit 30_194
-bit 30_195
-bit 30_196
-bit 30_197
-bit 30_198
-bit 30_199
-bit 30_200
-bit 30_201
-bit 30_202
-bit 30_203
-bit 30_204
-bit 30_205
-bit 30_206
-bit 30_207
-bit 30_232
-bit 30_233
-bit 30_234
-bit 30_235
-bit 30_236
-bit 30_237
-bit 30_238
-bit 30_239
-bit 30_240
-bit 30_241
-bit 30_242
-bit 30_243
-bit 30_244
-bit 30_245
-bit 30_246
-bit 30_247
-bit 30_248
-bit 30_249
-bit 30_250
-bit 30_251
-bit 30_252
-bit 30_253
-bit 30_254
-bit 30_255
-bit 30_256
-bit 30_257
-bit 30_258
-bit 30_259
-bit 30_260
-bit 30_261
-bit 30_262
-bit 30_263
-bit 30_264
-bit 30_265
-bit 30_266
-bit 30_267
-bit 30_268
-bit 30_269
-bit 30_270
-bit 30_271
-bit 30_272
-bit 30_273
-bit 30_274
-bit 30_276
-bit 30_277
-bit 30_278
-bit 30_288
-bit 30_292
-bit 30_293
-bit 30_296
-bit 30_297
-bit 30_298
-bit 30_299
-bit 30_300
-bit 30_301
-bit 30_302
-bit 30_303
-bit 30_304
-bit 30_305
-bit 30_328
-bit 30_329
-bit 30_330
-bit 30_336
-bit 30_337
-bit 30_338
-bit 30_339
-bit 30_340
-bit 30_341
-bit 30_342
-bit 30_343
-bit 30_344
-bit 30_345
-bit 30_346
-bit 30_347
-bit 30_348
-bit 30_349
-bit 30_350
-bit 30_351
-bit 30_368
-bit 30_369
-bit 30_370
-bit 30_371
-bit 30_372
-bit 30_373
-bit 30_374
-bit 30_375
-bit 30_376
-bit 30_377
-bit 30_378
-bit 30_379
-bit 30_384
-bit 30_386
-bit 30_390
-bit 30_391
-bit 30_392
-bit 30_393
-bit 30_394
-bit 30_395
-bit 30_396
-bit 30_397
-bit 30_398
-bit 30_399
-bit 30_400
-bit 30_401
-bit 30_402
-bit 30_403
-bit 30_404
-bit 30_405
-bit 30_406
-bit 30_407
-bit 30_408
-bit 30_409
-bit 30_410
-bit 30_411
-bit 30_412
-bit 30_413
-bit 30_416
-bit 30_417
-bit 30_418
-bit 30_419
-bit 30_424
-bit 30_425
-bit 30_426
-bit 30_427
-bit 30_428
-bit 30_429
-bit 30_430
-bit 30_431
-bit 30_432
-bit 30_433
-bit 30_434
-bit 30_435
-bit 30_436
-bit 30_437
-bit 30_438
-bit 30_439
-bit 30_440
-bit 30_441
-bit 30_442
-bit 30_443
-bit 30_459
-bit 30_460
-bit 30_461
-bit 30_462
-bit 30_463
-bit 30_464
-bit 30_465
-bit 30_466
-bit 30_467
-bit 30_468
-bit 30_469
-bit 30_470
-bit 30_471
-bit 30_472
-bit 30_473
-bit 30_488
-bit 30_489
-bit 30_490
-bit 30_491
-bit 30_496
-bit 30_497
-bit 30_498
-bit 30_504
-bit 30_505
-bit 30_506
-bit 30_507
-bit 30_508
-bit 30_509
-bit 30_510
-bit 30_511
-bit 30_512
-bit 30_513
-bit 30_514
-bit 30_515
-bit 30_516
-bit 30_517
-bit 30_518
-bit 30_519
-bit 30_520
-bit 30_521
-bit 30_522
-bit 30_523
-bit 30_524
-bit 30_525
-bit 30_526
-bit 30_527
-bit 30_528
-bit 30_529
-bit 30_530
-bit 30_531
-bit 30_532
-bit 30_533
-bit 30_534
-bit 30_535
-bit 30_536
-bit 30_537
-bit 30_538
-bit 30_544
-bit 30_545
-bit 30_546
-bit 30_547
-bit 30_548
-bit 30_552
-bit 30_553
-bit 30_554
-bit 30_555
-bit 30_556
-bit 30_557
-bit 30_558
-bit 30_559
-bit 30_560
-bit 30_561
-bit 30_568
-bit 30_569
-bit 30_570
-bit 30_571
-bit 30_572
-bit 30_576
-bit 30_577
-bit 30_578
-bit 30_579
-bit 30_580
-bit 30_584
-bit 30_585
-bit 30_586
-bit 30_587
-bit 30_588
-bit 30_589
-bit 30_590
-bit 30_591
-bit 30_592
-bit 30_593
-bit 30_594
-bit 30_595
-bit 30_600
-bit 30_601
-bit 30_602
-bit 30_603
-bit 30_604
-bit 30_605
-bit 30_606
-bit 30_607
-bit 30_608
-bit 30_609
-bit 30_610
-bit 30_611
-bit 30_616
-bit 30_617
-bit 30_618
-bit 30_619
-bit 30_620
-bit 30_621
-bit 30_622
-bit 30_624
-bit 30_625
-bit 30_626
-bit 30_627
-bit 30_628
-bit 30_632
-bit 30_633
-bit 30_634
-bit 30_638
-bit 30_640
-bit 30_641
-bit 30_642
-bit 30_643
-bit 30_644
-bit 30_645
-bit 30_646
-bit 30_647
-bit 30_648
-bit 30_649
-bit 30_650
-bit 30_651
-bit 30_652
-bit 30_653
-bit 30_654
-bit 30_655
-bit 30_656
-bit 30_657
-bit 30_658
-bit 30_659
-bit 30_660
-bit 30_661
-bit 30_662
-bit 30_663
-bit 30_664
-bit 30_665
-bit 30_666
-bit 30_667
-bit 30_668
-bit 30_669
-bit 30_670
-bit 30_671
-bit 30_672
-bit 30_673
-bit 30_674
-bit 30_675
-bit 30_676
-bit 30_677
-bit 30_678
-bit 30_679
-bit 30_680
-bit 30_681
-bit 31_01
-bit 31_04
-bit 31_11
-bit 31_13
-bit 31_20
-bit 31_23
-bit 31_40
-bit 31_41
-bit 31_42
-bit 31_43
-bit 31_44
-bit 31_55
-bit 31_64
-bit 31_65
-bit 31_66
-bit 31_67
-bit 31_68
-bit 31_69
-bit 31_70
-bit 31_71
-bit 31_72
-bit 31_73
-bit 31_74
-bit 31_75
-bit 31_80
-bit 31_81
-bit 31_82
-bit 31_83
-bit 31_84
-bit 31_85
-bit 31_86
-bit 31_87
-bit 31_88
-bit 31_89
-bit 31_90
-bit 31_91
-bit 31_92
-bit 31_93
-bit 31_94
-bit 31_95
-bit 31_96
-bit 31_97
-bit 31_98
-bit 31_99
-bit 31_100
-bit 31_101
-bit 31_102
-bit 31_103
-bit 31_108
-bit 31_109
-bit 31_112
-bit 31_113
-bit 31_114
-bit 31_115
-bit 31_116
-bit 31_117
-bit 31_118
-bit 31_119
-bit 31_128
-bit 31_129
-bit 31_136
-bit 31_137
-bit 31_138
-bit 31_139
-bit 31_140
-bit 31_141
-bit 31_142
-bit 31_144
-bit 31_145
-bit 31_150
-bit 31_151
-bit 31_152
-bit 31_156
-bit 31_157
-bit 31_159
-bit 31_184
-bit 31_185
-bit 31_186
-bit 31_187
-bit 31_188
-bit 31_189
-bit 31_190
-bit 31_191
-bit 31_192
-bit 31_193
-bit 31_194
-bit 31_195
-bit 31_196
-bit 31_197
-bit 31_198
-bit 31_199
-bit 31_200
-bit 31_201
-bit 31_202
-bit 31_203
-bit 31_204
-bit 31_205
-bit 31_206
-bit 31_207
-bit 31_232
-bit 31_233
-bit 31_234
-bit 31_236
-bit 31_237
-bit 31_238
-bit 31_240
-bit 31_241
-bit 31_242
-bit 31_244
-bit 31_245
-bit 31_246
-bit 31_248
-bit 31_249
-bit 31_250
-bit 31_252
-bit 31_253
-bit 31_254
-bit 31_256
-bit 31_257
-bit 31_258
-bit 31_260
-bit 31_261
-bit 31_262
-bit 31_264
-bit 31_265
-bit 31_266
-bit 31_268
-bit 31_269
-bit 31_270
-bit 31_272
-bit 31_273
-bit 31_274
-bit 31_276
-bit 31_277
-bit 31_278
-bit 31_288
-bit 31_289
-bit 31_292
-bit 31_296
-bit 31_297
-bit 31_298
-bit 31_299
-bit 31_300
-bit 31_301
-bit 31_302
-bit 31_303
-bit 31_304
-bit 31_305
-bit 31_311
-bit 31_328
-bit 31_329
-bit 31_336
-bit 31_337
-bit 31_338
-bit 31_339
-bit 31_340
-bit 31_341
-bit 31_342
-bit 31_343
-bit 31_344
-bit 31_345
-bit 31_346
-bit 31_347
-bit 31_348
-bit 31_349
-bit 31_350
-bit 31_351
-bit 31_368
-bit 31_369
-bit 31_370
-bit 31_371
-bit 31_372
-bit 31_373
-bit 31_374
-bit 31_375
-bit 31_376
-bit 31_377
-bit 31_378
-bit 31_379
-bit 31_384
-bit 31_386
-bit 31_389
-bit 31_390
-bit 31_391
-bit 31_392
-bit 31_393
-bit 31_394
-bit 31_395
-bit 31_396
-bit 31_397
-bit 31_398
-bit 31_399
-bit 31_400
-bit 31_401
-bit 31_402
-bit 31_403
-bit 31_404
-bit 31_405
-bit 31_406
-bit 31_407
-bit 31_408
-bit 31_409
-bit 31_410
-bit 31_411
-bit 31_412
-bit 31_416
-bit 31_417
-bit 31_418
-bit 31_424
-bit 31_425
-bit 31_426
-bit 31_427
-bit 31_428
-bit 31_429
-bit 31_430
-bit 31_431
-bit 31_432
-bit 31_433
-bit 31_434
-bit 31_435
-bit 31_436
-bit 31_437
-bit 31_438
-bit 31_439
-bit 31_440
-bit 31_441
-bit 31_442
-bit 31_443
-bit 31_459
-bit 31_460
-bit 31_461
-bit 31_463
-bit 31_464
-bit 31_465
-bit 31_466
-bit 31_467
-bit 31_468
-bit 31_469
-bit 31_470
-bit 31_471
-bit 31_472
-bit 31_473
-bit 31_488
-bit 31_489
-bit 31_490
-bit 31_491
-bit 31_496
-bit 31_497
-bit 31_498
-bit 31_504
-bit 31_505
-bit 31_506
-bit 31_507
-bit 31_508
-bit 31_509
-bit 31_510
-bit 31_511
-bit 31_512
-bit 31_513
-bit 31_514
-bit 31_515
-bit 31_516
-bit 31_517
-bit 31_518
-bit 31_519
-bit 31_520
-bit 31_521
-bit 31_522
-bit 31_523
-bit 31_524
-bit 31_525
-bit 31_526
-bit 31_527
-bit 31_528
-bit 31_529
-bit 31_530
-bit 31_531
-bit 31_532
-bit 31_533
-bit 31_534
-bit 31_535
-bit 31_536
-bit 31_537
-bit 31_538
-bit 31_544
-bit 31_545
-bit 31_546
-bit 31_552
-bit 31_553
-bit 31_554
-bit 31_555
-bit 31_556
-bit 31_557
-bit 31_558
-bit 31_559
-bit 31_560
-bit 31_568
-bit 31_569
-bit 31_570
-bit 31_571
-bit 31_576
-bit 31_577
-bit 31_578
-bit 31_579
-bit 31_584
-bit 31_585
-bit 31_586
-bit 31_587
-bit 31_588
-bit 31_589
-bit 31_590
-bit 31_591
-bit 31_592
-bit 31_593
-bit 31_594
-bit 31_595
-bit 31_600
-bit 31_601
-bit 31_602
-bit 31_603
-bit 31_604
-bit 31_605
-bit 31_606
-bit 31_607
-bit 31_608
-bit 31_609
-bit 31_610
-bit 31_611
-bit 31_616
-bit 31_617
-bit 31_618
-bit 31_619
-bit 31_620
-bit 31_621
-bit 31_622
-bit 31_624
-bit 31_625
-bit 31_626
-bit 31_627
-bit 31_628
-bit 31_632
-bit 31_633
-bit 31_634
-bit 31_637
-bit 31_638
-bit 31_640
-bit 31_641
-bit 31_642
-bit 31_643
-bit 31_644
-bit 31_645
-bit 31_646
-bit 31_647
-bit 31_648
-bit 31_649
-bit 31_650
-bit 31_651
-bit 31_652
-bit 31_653
-bit 31_654
-bit 31_655
-bit 31_656
-bit 31_657
-bit 31_658
-bit 31_659
-bit 31_660
-bit 31_661
-bit 31_662
-bit 31_663
-bit 31_664
-bit 31_665
-bit 31_666
-bit 31_667
-bit 31_668
-bit 31_669
-bit 31_670
-bit 31_671
-bit 31_672
-bit 31_673
-bit 31_674
-bit 31_675
-bit 31_676
-bit 31_677
-bit 31_678
-bit 31_679
-bit 31_680

diff --git a/artix7/mask_gtp_channel_3_mid_right.db b/artix7/mask_gtp_channel_3_mid_right.db
index c576c8c..6f48b45 100644
--- a/artix7/mask_gtp_channel_3_mid_right.db
+++ b/artix7/mask_gtp_channel_3_mid_right.db

@@ -1632,1637 +1632,3 @@
 bit 03_678
 bit 03_679
 bit 03_680
-bit 28_00
-bit 28_01
-bit 28_07
-bit 28_47
-bit 28_52
-bit 28_53
-bit 28_65
-bit 28_102
-bit 28_103
-bit 28_104
-bit 28_105
-bit 28_106
-bit 28_107
-bit 28_108
-bit 28_109
-bit 28_110
-bit 28_111
-bit 28_112
-bit 28_113
-bit 28_114
-bit 28_115
-bit 28_116
-bit 28_117
-bit 28_124
-bit 28_125
-bit 28_128
-bit 28_129
-bit 28_130
-bit 28_131
-bit 28_132
-bit 28_133
-bit 28_134
-bit 28_135
-bit 28_136
-bit 28_138
-bit 28_139
-bit 28_140
-bit 28_141
-bit 28_142
-bit 28_143
-bit 28_144
-bit 28_145
-bit 28_146
-bit 28_147
-bit 28_148
-bit 28_149
-bit 28_150
-bit 28_151
-bit 28_152
-bit 28_153
-bit 28_154
-bit 28_155
-bit 28_156
-bit 28_157
-bit 28_158
-bit 28_159
-bit 28_160
-bit 28_161
-bit 28_162
-bit 28_163
-bit 28_164
-bit 28_165
-bit 28_168
-bit 28_169
-bit 28_170
-bit 28_171
-bit 28_172
-bit 28_173
-bit 28_174
-bit 28_176
-bit 28_177
-bit 28_178
-bit 28_179
-bit 28_180
-bit 28_181
-bit 28_187
-bit 28_188
-bit 28_189
-bit 28_190
-bit 28_191
-bit 28_192
-bit 28_193
-bit 28_194
-bit 28_195
-bit 28_200
-bit 28_203
-bit 28_204
-bit 28_205
-bit 28_206
-bit 28_208
-bit 28_209
-bit 28_210
-bit 28_211
-bit 28_212
-bit 28_213
-bit 28_214
-bit 28_215
-bit 28_216
-bit 28_217
-bit 28_218
-bit 28_219
-bit 28_220
-bit 28_221
-bit 28_222
-bit 28_224
-bit 28_225
-bit 28_231
-bit 28_247
-bit 28_288
-bit 28_289
-bit 28_290
-bit 28_291
-bit 28_292
-bit 28_293
-bit 28_294
-bit 28_336
-bit 28_337
-bit 28_338
-bit 28_339
-bit 28_340
-bit 28_341
-bit 28_342
-bit 28_343
-bit 28_344
-bit 28_345
-bit 28_346
-bit 28_347
-bit 28_348
-bit 28_349
-bit 28_350
-bit 28_351
-bit 28_352
-bit 28_353
-bit 28_354
-bit 28_355
-bit 28_356
-bit 28_357
-bit 28_358
-bit 28_359
-bit 28_360
-bit 28_361
-bit 28_362
-bit 28_363
-bit 28_364
-bit 28_365
-bit 28_366
-bit 28_367
-bit 28_368
-bit 28_369
-bit 28_370
-bit 28_371
-bit 28_372
-bit 28_373
-bit 28_374
-bit 28_375
-bit 28_376
-bit 28_377
-bit 28_378
-bit 28_379
-bit 28_380
-bit 28_381
-bit 28_382
-bit 28_383
-bit 28_384
-bit 28_385
-bit 28_386
-bit 28_387
-bit 28_388
-bit 28_389
-bit 28_390
-bit 28_391
-bit 28_392
-bit 28_393
-bit 28_394
-bit 28_395
-bit 28_396
-bit 28_397
-bit 28_398
-bit 28_399
-bit 28_400
-bit 28_401
-bit 28_402
-bit 28_403
-bit 28_404
-bit 28_405
-bit 28_406
-bit 28_407
-bit 28_408
-bit 28_409
-bit 28_410
-bit 28_411
-bit 28_412
-bit 28_413
-bit 28_414
-bit 28_415
-bit 28_416
-bit 28_417
-bit 28_418
-bit 28_419
-bit 28_420
-bit 28_421
-bit 28_422
-bit 28_423
-bit 28_424
-bit 28_425
-bit 28_426
-bit 28_427
-bit 28_428
-bit 28_429
-bit 28_430
-bit 28_431
-bit 28_432
-bit 28_433
-bit 28_434
-bit 28_435
-bit 28_436
-bit 28_437
-bit 28_438
-bit 28_439
-bit 28_440
-bit 28_441
-bit 28_442
-bit 28_443
-bit 28_444
-bit 28_445
-bit 28_446
-bit 28_447
-bit 28_448
-bit 28_449
-bit 28_450
-bit 28_451
-bit 28_452
-bit 28_453
-bit 28_454
-bit 28_455
-bit 28_456
-bit 28_457
-bit 28_458
-bit 28_459
-bit 28_460
-bit 28_461
-bit 28_462
-bit 28_463
-bit 28_464
-bit 28_465
-bit 28_466
-bit 28_467
-bit 28_468
-bit 28_469
-bit 28_470
-bit 28_471
-bit 28_472
-bit 28_473
-bit 28_474
-bit 28_475
-bit 28_476
-bit 28_478
-bit 28_479
-bit 28_480
-bit 28_481
-bit 28_482
-bit 28_483
-bit 28_484
-bit 28_485
-bit 28_488
-bit 28_489
-bit 28_490
-bit 28_492
-bit 28_494
-bit 28_495
-bit 28_496
-bit 28_497
-bit 28_498
-bit 28_499
-bit 28_500
-bit 28_504
-bit 28_505
-bit 28_506
-bit 28_507
-bit 28_508
-bit 28_512
-bit 28_513
-bit 28_514
-bit 28_515
-bit 28_516
-bit 28_519
-bit 28_520
-bit 28_521
-bit 28_522
-bit 28_523
-bit 28_524
-bit 28_525
-bit 28_526
-bit 28_527
-bit 28_544
-bit 28_545
-bit 28_546
-bit 28_547
-bit 28_548
-bit 28_549
-bit 28_550
-bit 28_551
-bit 28_552
-bit 28_553
-bit 28_554
-bit 28_555
-bit 28_556
-bit 28_557
-bit 28_558
-bit 28_559
-bit 28_560
-bit 28_561
-bit 28_562
-bit 28_563
-bit 28_564
-bit 28_565
-bit 28_566
-bit 28_567
-bit 28_568
-bit 28_569
-bit 28_570
-bit 28_571
-bit 28_572
-bit 28_573
-bit 28_574
-bit 28_575
-bit 28_576
-bit 28_577
-bit 28_578
-bit 28_579
-bit 28_580
-bit 28_581
-bit 28_582
-bit 28_583
-bit 28_584
-bit 28_585
-bit 28_586
-bit 28_587
-bit 28_588
-bit 28_589
-bit 28_590
-bit 28_591
-bit 28_592
-bit 28_593
-bit 28_594
-bit 28_595
-bit 28_596
-bit 28_600
-bit 28_601
-bit 28_602
-bit 28_603
-bit 28_604
-bit 28_608
-bit 28_609
-bit 28_610
-bit 28_611
-bit 28_612
-bit 28_614
-bit 28_615
-bit 28_616
-bit 28_617
-bit 28_618
-bit 28_619
-bit 28_620
-bit 28_623
-bit 28_624
-bit 28_625
-bit 28_626
-bit 28_627
-bit 28_628
-bit 28_632
-bit 28_633
-bit 28_634
-bit 28_635
-bit 28_636
-bit 28_640
-bit 28_641
-bit 28_642
-bit 28_643
-bit 28_644
-bit 28_646
-bit 28_647
-bit 28_648
-bit 28_649
-bit 28_650
-bit 28_651
-bit 28_652
-bit 28_654
-bit 28_655
-bit 28_656
-bit 28_657
-bit 28_658
-bit 28_659
-bit 28_660
-bit 28_662
-bit 28_663
-bit 28_664
-bit 28_665
-bit 28_666
-bit 28_667
-bit 28_668
-bit 28_670
-bit 28_671
-bit 28_672
-bit 28_673
-bit 28_674
-bit 28_675
-bit 28_676
-bit 28_677
-bit 28_678
-bit 28_679
-bit 28_680
-bit 28_681
-bit 28_682
-bit 28_683
-bit 28_684
-bit 28_685
-bit 28_686
-bit 28_687
-bit 28_696
-bit 28_697
-bit 28_698
-bit 28_700
-bit 28_701
-bit 28_702
-bit 29_00
-bit 29_01
-bit 29_06
-bit 29_07
-bit 29_47
-bit 29_101
-bit 29_102
-bit 29_103
-bit 29_104
-bit 29_105
-bit 29_106
-bit 29_107
-bit 29_108
-bit 29_109
-bit 29_110
-bit 29_112
-bit 29_113
-bit 29_114
-bit 29_115
-bit 29_116
-bit 29_117
-bit 29_123
-bit 29_124
-bit 29_125
-bit 29_128
-bit 29_129
-bit 29_130
-bit 29_131
-bit 29_132
-bit 29_133
-bit 29_134
-bit 29_135
-bit 29_138
-bit 29_139
-bit 29_140
-bit 29_141
-bit 29_142
-bit 29_144
-bit 29_145
-bit 29_146
-bit 29_147
-bit 29_148
-bit 29_149
-bit 29_150
-bit 29_151
-bit 29_152
-bit 29_153
-bit 29_154
-bit 29_155
-bit 29_156
-bit 29_157
-bit 29_158
-bit 29_160
-bit 29_161
-bit 29_162
-bit 29_163
-bit 29_164
-bit 29_165
-bit 29_168
-bit 29_169
-bit 29_170
-bit 29_171
-bit 29_172
-bit 29_173
-bit 29_176
-bit 29_177
-bit 29_178
-bit 29_179
-bit 29_180
-bit 29_181
-bit 29_187
-bit 29_188
-bit 29_189
-bit 29_190
-bit 29_191
-bit 29_192
-bit 29_193
-bit 29_194
-bit 29_195
-bit 29_202
-bit 29_203
-bit 29_204
-bit 29_205
-bit 29_207
-bit 29_208
-bit 29_209
-bit 29_210
-bit 29_211
-bit 29_212
-bit 29_213
-bit 29_214
-bit 29_215
-bit 29_216
-bit 29_217
-bit 29_218
-bit 29_219
-bit 29_220
-bit 29_221
-bit 29_224
-bit 29_226
-bit 29_231
-bit 29_288
-bit 29_289
-bit 29_290
-bit 29_291
-bit 29_292
-bit 29_293
-bit 29_336
-bit 29_337
-bit 29_338
-bit 29_339
-bit 29_340
-bit 29_341
-bit 29_342
-bit 29_343
-bit 29_344
-bit 29_345
-bit 29_346
-bit 29_347
-bit 29_348
-bit 29_349
-bit 29_350
-bit 29_351
-bit 29_352
-bit 29_353
-bit 29_354
-bit 29_355
-bit 29_356
-bit 29_357
-bit 29_358
-bit 29_359
-bit 29_360
-bit 29_361
-bit 29_362
-bit 29_363
-bit 29_364
-bit 29_365
-bit 29_366
-bit 29_367
-bit 29_368
-bit 29_369
-bit 29_370
-bit 29_371
-bit 29_372
-bit 29_373
-bit 29_374
-bit 29_375
-bit 29_376
-bit 29_377
-bit 29_378
-bit 29_379
-bit 29_380
-bit 29_381
-bit 29_382
-bit 29_383
-bit 29_384
-bit 29_385
-bit 29_386
-bit 29_387
-bit 29_388
-bit 29_389
-bit 29_390
-bit 29_391
-bit 29_392
-bit 29_393
-bit 29_394
-bit 29_395
-bit 29_396
-bit 29_397
-bit 29_398
-bit 29_399
-bit 29_400
-bit 29_401
-bit 29_402
-bit 29_403
-bit 29_404
-bit 29_405
-bit 29_406
-bit 29_407
-bit 29_408
-bit 29_409
-bit 29_410
-bit 29_411
-bit 29_412
-bit 29_413
-bit 29_414
-bit 29_415
-bit 29_416
-bit 29_417
-bit 29_418
-bit 29_419
-bit 29_420
-bit 29_421
-bit 29_422
-bit 29_423
-bit 29_424
-bit 29_425
-bit 29_426
-bit 29_427
-bit 29_428
-bit 29_429
-bit 29_430
-bit 29_431
-bit 29_432
-bit 29_433
-bit 29_434
-bit 29_435
-bit 29_436
-bit 29_437
-bit 29_438
-bit 29_439
-bit 29_440
-bit 29_441
-bit 29_442
-bit 29_443
-bit 29_444
-bit 29_445
-bit 29_446
-bit 29_447
-bit 29_448
-bit 29_449
-bit 29_450
-bit 29_451
-bit 29_452
-bit 29_453
-bit 29_454
-bit 29_455
-bit 29_456
-bit 29_457
-bit 29_458
-bit 29_459
-bit 29_460
-bit 29_461
-bit 29_462
-bit 29_463
-bit 29_464
-bit 29_465
-bit 29_466
-bit 29_467
-bit 29_468
-bit 29_469
-bit 29_470
-bit 29_471
-bit 29_472
-bit 29_473
-bit 29_474
-bit 29_475
-bit 29_477
-bit 29_478
-bit 29_479
-bit 29_480
-bit 29_481
-bit 29_482
-bit 29_483
-bit 29_484
-bit 29_485
-bit 29_488
-bit 29_489
-bit 29_490
-bit 29_492
-bit 29_494
-bit 29_495
-bit 29_496
-bit 29_497
-bit 29_498
-bit 29_499
-bit 29_500
-bit 29_504
-bit 29_505
-bit 29_506
-bit 29_507
-bit 29_508
-bit 29_512
-bit 29_513
-bit 29_514
-bit 29_515
-bit 29_516
-bit 29_519
-bit 29_520
-bit 29_521
-bit 29_522
-bit 29_523
-bit 29_524
-bit 29_525
-bit 29_526
-bit 29_544
-bit 29_545
-bit 29_546
-bit 29_547
-bit 29_548
-bit 29_549
-bit 29_550
-bit 29_552
-bit 29_553
-bit 29_554
-bit 29_555
-bit 29_556
-bit 29_557
-bit 29_558
-bit 29_559
-bit 29_560
-bit 29_561
-bit 29_562
-bit 29_563
-bit 29_564
-bit 29_565
-bit 29_566
-bit 29_567
-bit 29_568
-bit 29_569
-bit 29_570
-bit 29_571
-bit 29_572
-bit 29_573
-bit 29_574
-bit 29_576
-bit 29_577
-bit 29_578
-bit 29_579
-bit 29_580
-bit 29_581
-bit 29_582
-bit 29_584
-bit 29_585
-bit 29_586
-bit 29_587
-bit 29_588
-bit 29_589
-bit 29_592
-bit 29_593
-bit 29_594
-bit 29_595
-bit 29_596
-bit 29_600
-bit 29_601
-bit 29_602
-bit 29_603
-bit 29_604
-bit 29_607
-bit 29_608
-bit 29_609
-bit 29_610
-bit 29_611
-bit 29_612
-bit 29_614
-bit 29_615
-bit 29_616
-bit 29_617
-bit 29_618
-bit 29_619
-bit 29_620
-bit 29_623
-bit 29_624
-bit 29_625
-bit 29_626
-bit 29_627
-bit 29_628
-bit 29_631
-bit 29_632
-bit 29_633
-bit 29_634
-bit 29_635
-bit 29_636
-bit 29_640
-bit 29_641
-bit 29_642
-bit 29_643
-bit 29_644
-bit 29_645
-bit 29_646
-bit 29_647
-bit 29_648
-bit 29_649
-bit 29_650
-bit 29_651
-bit 29_652
-bit 29_653
-bit 29_654
-bit 29_655
-bit 29_656
-bit 29_657
-bit 29_658
-bit 29_659
-bit 29_660
-bit 29_661
-bit 29_662
-bit 29_663
-bit 29_664
-bit 29_665
-bit 29_666
-bit 29_667
-bit 29_668
-bit 29_670
-bit 29_671
-bit 29_672
-bit 29_673
-bit 29_674
-bit 29_675
-bit 29_676
-bit 29_677
-bit 29_678
-bit 29_679
-bit 29_680
-bit 29_681
-bit 29_682
-bit 29_683
-bit 29_684
-bit 29_685
-bit 29_686
-bit 29_687
-bit 29_696
-bit 29_697
-bit 29_698
-bit 29_700
-bit 29_701
-bit 30_00
-bit 30_02
-bit 30_03
-bit 30_05
-bit 30_11
-bit 30_13
-bit 30_20
-bit 30_23
-bit 30_40
-bit 30_41
-bit 30_42
-bit 30_43
-bit 30_44
-bit 30_45
-bit 30_55
-bit 30_64
-bit 30_65
-bit 30_66
-bit 30_67
-bit 30_68
-bit 30_69
-bit 30_70
-bit 30_71
-bit 30_72
-bit 30_73
-bit 30_74
-bit 30_75
-bit 30_80
-bit 30_81
-bit 30_82
-bit 30_83
-bit 30_84
-bit 30_85
-bit 30_86
-bit 30_87
-bit 30_88
-bit 30_89
-bit 30_90
-bit 30_91
-bit 30_92
-bit 30_93
-bit 30_94
-bit 30_95
-bit 30_96
-bit 30_97
-bit 30_98
-bit 30_99
-bit 30_100
-bit 30_101
-bit 30_102
-bit 30_103
-bit 30_108
-bit 30_109
-bit 30_110
-bit 30_112
-bit 30_113
-bit 30_114
-bit 30_115
-bit 30_116
-bit 30_117
-bit 30_118
-bit 30_119
-bit 30_128
-bit 30_129
-bit 30_136
-bit 30_137
-bit 30_138
-bit 30_139
-bit 30_140
-bit 30_141
-bit 30_142
-bit 30_143
-bit 30_144
-bit 30_145
-bit 30_146
-bit 30_151
-bit 30_152
-bit 30_153
-bit 30_156
-bit 30_157
-bit 30_184
-bit 30_185
-bit 30_186
-bit 30_187
-bit 30_188
-bit 30_189
-bit 30_190
-bit 30_191
-bit 30_192
-bit 30_193
-bit 30_194
-bit 30_195
-bit 30_196
-bit 30_197
-bit 30_198
-bit 30_199
-bit 30_200
-bit 30_201
-bit 30_202
-bit 30_203
-bit 30_204
-bit 30_205
-bit 30_206
-bit 30_207
-bit 30_232
-bit 30_233
-bit 30_234
-bit 30_235
-bit 30_236
-bit 30_237
-bit 30_238
-bit 30_239
-bit 30_240
-bit 30_241
-bit 30_242
-bit 30_243
-bit 30_244
-bit 30_245
-bit 30_246
-bit 30_247
-bit 30_248
-bit 30_249
-bit 30_250
-bit 30_251
-bit 30_252
-bit 30_253
-bit 30_254
-bit 30_255
-bit 30_256
-bit 30_257
-bit 30_258
-bit 30_259
-bit 30_260
-bit 30_261
-bit 30_262
-bit 30_263
-bit 30_264
-bit 30_265
-bit 30_266
-bit 30_267
-bit 30_268
-bit 30_269
-bit 30_270
-bit 30_271
-bit 30_272
-bit 30_273
-bit 30_274
-bit 30_276
-bit 30_277
-bit 30_278
-bit 30_288
-bit 30_292
-bit 30_293
-bit 30_296
-bit 30_297
-bit 30_298
-bit 30_299
-bit 30_300
-bit 30_301
-bit 30_302
-bit 30_303
-bit 30_304
-bit 30_305
-bit 30_328
-bit 30_329
-bit 30_330
-bit 30_336
-bit 30_337
-bit 30_338
-bit 30_339
-bit 30_340
-bit 30_341
-bit 30_342
-bit 30_343
-bit 30_344
-bit 30_345
-bit 30_346
-bit 30_347
-bit 30_348
-bit 30_349
-bit 30_350
-bit 30_351
-bit 30_368
-bit 30_369
-bit 30_370
-bit 30_371
-bit 30_372
-bit 30_373
-bit 30_374
-bit 30_375
-bit 30_376
-bit 30_377
-bit 30_378
-bit 30_379
-bit 30_384
-bit 30_386
-bit 30_390
-bit 30_391
-bit 30_392
-bit 30_393
-bit 30_394
-bit 30_395
-bit 30_396
-bit 30_397
-bit 30_398
-bit 30_399
-bit 30_400
-bit 30_401
-bit 30_402
-bit 30_403
-bit 30_404
-bit 30_405
-bit 30_406
-bit 30_407
-bit 30_408
-bit 30_409
-bit 30_410
-bit 30_411
-bit 30_412
-bit 30_413
-bit 30_416
-bit 30_417
-bit 30_418
-bit 30_419
-bit 30_424
-bit 30_425
-bit 30_426
-bit 30_427
-bit 30_428
-bit 30_429
-bit 30_430
-bit 30_431
-bit 30_432
-bit 30_433
-bit 30_434
-bit 30_435
-bit 30_436
-bit 30_437
-bit 30_438
-bit 30_439
-bit 30_440
-bit 30_441
-bit 30_442
-bit 30_443
-bit 30_459
-bit 30_460
-bit 30_461
-bit 30_462
-bit 30_463
-bit 30_464
-bit 30_465
-bit 30_466
-bit 30_467
-bit 30_468
-bit 30_469
-bit 30_470
-bit 30_471
-bit 30_472
-bit 30_473
-bit 30_488
-bit 30_489
-bit 30_490
-bit 30_491
-bit 30_496
-bit 30_497
-bit 30_498
-bit 30_504
-bit 30_505
-bit 30_506
-bit 30_507
-bit 30_508
-bit 30_509
-bit 30_510
-bit 30_511
-bit 30_512
-bit 30_513
-bit 30_514
-bit 30_515
-bit 30_516
-bit 30_517
-bit 30_518
-bit 30_519
-bit 30_520
-bit 30_521
-bit 30_522
-bit 30_523
-bit 30_524
-bit 30_525
-bit 30_526
-bit 30_527
-bit 30_528
-bit 30_529
-bit 30_530
-bit 30_531
-bit 30_532
-bit 30_533
-bit 30_534
-bit 30_535
-bit 30_536
-bit 30_537
-bit 30_538
-bit 30_544
-bit 30_545
-bit 30_546
-bit 30_547
-bit 30_548
-bit 30_552
-bit 30_553
-bit 30_554
-bit 30_555
-bit 30_556
-bit 30_557
-bit 30_558
-bit 30_559
-bit 30_560
-bit 30_561
-bit 30_568
-bit 30_569
-bit 30_570
-bit 30_571
-bit 30_572
-bit 30_576
-bit 30_577
-bit 30_578
-bit 30_579
-bit 30_580
-bit 30_584
-bit 30_585
-bit 30_586
-bit 30_587
-bit 30_588
-bit 30_589
-bit 30_590
-bit 30_591
-bit 30_592
-bit 30_593
-bit 30_594
-bit 30_595
-bit 30_600
-bit 30_601
-bit 30_602
-bit 30_603
-bit 30_604
-bit 30_605
-bit 30_606
-bit 30_607
-bit 30_608
-bit 30_609
-bit 30_610
-bit 30_611
-bit 30_616
-bit 30_617
-bit 30_618
-bit 30_619
-bit 30_620
-bit 30_621
-bit 30_622
-bit 30_624
-bit 30_625
-bit 30_626
-bit 30_627
-bit 30_628
-bit 30_632
-bit 30_633
-bit 30_634
-bit 30_638
-bit 30_640
-bit 30_641
-bit 30_642
-bit 30_643
-bit 30_644
-bit 30_645
-bit 30_646
-bit 30_647
-bit 30_648
-bit 30_649
-bit 30_650
-bit 30_651
-bit 30_652
-bit 30_653
-bit 30_654
-bit 30_655
-bit 30_656
-bit 30_657
-bit 30_658
-bit 30_659
-bit 30_660
-bit 30_661
-bit 30_662
-bit 30_663
-bit 30_664
-bit 30_665
-bit 30_666
-bit 30_667
-bit 30_668
-bit 30_669
-bit 30_670
-bit 30_671
-bit 30_672
-bit 30_673
-bit 30_674
-bit 30_675
-bit 30_676
-bit 30_677
-bit 30_678
-bit 30_679
-bit 30_680
-bit 30_681
-bit 31_01
-bit 31_04
-bit 31_11
-bit 31_13
-bit 31_20
-bit 31_23
-bit 31_40
-bit 31_41
-bit 31_42
-bit 31_43
-bit 31_44
-bit 31_55
-bit 31_64
-bit 31_65
-bit 31_66
-bit 31_67
-bit 31_68
-bit 31_69
-bit 31_70
-bit 31_71
-bit 31_72
-bit 31_73
-bit 31_74
-bit 31_75
-bit 31_80
-bit 31_81
-bit 31_82
-bit 31_83
-bit 31_84
-bit 31_85
-bit 31_86
-bit 31_87
-bit 31_88
-bit 31_89
-bit 31_90
-bit 31_91
-bit 31_92
-bit 31_93
-bit 31_94
-bit 31_95
-bit 31_96
-bit 31_97
-bit 31_98
-bit 31_99
-bit 31_100
-bit 31_101
-bit 31_102
-bit 31_103
-bit 31_108
-bit 31_109
-bit 31_112
-bit 31_113
-bit 31_114
-bit 31_115
-bit 31_116
-bit 31_117
-bit 31_118
-bit 31_119
-bit 31_128
-bit 31_129
-bit 31_136
-bit 31_137
-bit 31_138
-bit 31_139
-bit 31_140
-bit 31_141
-bit 31_142
-bit 31_144
-bit 31_145
-bit 31_150
-bit 31_151
-bit 31_152
-bit 31_156
-bit 31_157
-bit 31_159
-bit 31_184
-bit 31_185
-bit 31_186
-bit 31_187
-bit 31_188
-bit 31_189
-bit 31_190
-bit 31_191
-bit 31_192
-bit 31_193
-bit 31_194
-bit 31_195
-bit 31_196
-bit 31_197
-bit 31_198
-bit 31_199
-bit 31_200
-bit 31_201
-bit 31_202
-bit 31_203
-bit 31_204
-bit 31_205
-bit 31_206
-bit 31_207
-bit 31_232
-bit 31_233
-bit 31_234
-bit 31_236
-bit 31_237
-bit 31_238
-bit 31_240
-bit 31_241
-bit 31_242
-bit 31_244
-bit 31_245
-bit 31_246
-bit 31_248
-bit 31_249
-bit 31_250
-bit 31_252
-bit 31_253
-bit 31_254
-bit 31_256
-bit 31_257
-bit 31_258
-bit 31_260
-bit 31_261
-bit 31_262
-bit 31_264
-bit 31_265
-bit 31_266
-bit 31_268
-bit 31_269
-bit 31_270
-bit 31_272
-bit 31_273
-bit 31_274
-bit 31_276
-bit 31_277
-bit 31_278
-bit 31_288
-bit 31_289
-bit 31_292
-bit 31_296
-bit 31_297
-bit 31_298
-bit 31_299
-bit 31_300
-bit 31_301
-bit 31_302
-bit 31_303
-bit 31_304
-bit 31_305
-bit 31_311
-bit 31_328
-bit 31_329
-bit 31_336
-bit 31_337
-bit 31_338
-bit 31_339
-bit 31_340
-bit 31_341
-bit 31_342
-bit 31_343
-bit 31_344
-bit 31_345
-bit 31_346
-bit 31_347
-bit 31_348
-bit 31_349
-bit 31_350
-bit 31_351
-bit 31_368
-bit 31_369
-bit 31_370
-bit 31_371
-bit 31_372
-bit 31_373
-bit 31_374
-bit 31_375
-bit 31_376
-bit 31_377
-bit 31_378
-bit 31_379
-bit 31_384
-bit 31_386
-bit 31_389
-bit 31_390
-bit 31_391
-bit 31_392
-bit 31_393
-bit 31_394
-bit 31_395
-bit 31_396
-bit 31_397
-bit 31_398
-bit 31_399
-bit 31_400
-bit 31_401
-bit 31_402
-bit 31_403
-bit 31_404
-bit 31_405
-bit 31_406
-bit 31_407
-bit 31_408
-bit 31_409
-bit 31_410
-bit 31_411
-bit 31_412
-bit 31_416
-bit 31_417
-bit 31_418
-bit 31_424
-bit 31_425
-bit 31_426
-bit 31_427
-bit 31_428
-bit 31_429
-bit 31_430
-bit 31_431
-bit 31_432
-bit 31_433
-bit 31_434
-bit 31_435
-bit 31_436
-bit 31_437
-bit 31_438
-bit 31_439
-bit 31_440
-bit 31_441
-bit 31_442
-bit 31_443
-bit 31_459
-bit 31_460
-bit 31_461
-bit 31_463
-bit 31_464
-bit 31_465
-bit 31_466
-bit 31_467
-bit 31_468
-bit 31_469
-bit 31_470
-bit 31_471
-bit 31_472
-bit 31_473
-bit 31_488
-bit 31_489
-bit 31_490
-bit 31_491
-bit 31_496
-bit 31_497
-bit 31_498
-bit 31_504
-bit 31_505
-bit 31_506
-bit 31_507
-bit 31_508
-bit 31_509
-bit 31_510
-bit 31_511
-bit 31_512
-bit 31_513
-bit 31_514
-bit 31_515
-bit 31_516
-bit 31_517
-bit 31_518
-bit 31_519
-bit 31_520
-bit 31_521
-bit 31_522
-bit 31_523
-bit 31_524
-bit 31_525
-bit 31_526
-bit 31_527
-bit 31_528
-bit 31_529
-bit 31_530
-bit 31_531
-bit 31_532
-bit 31_533
-bit 31_534
-bit 31_535
-bit 31_536
-bit 31_537
-bit 31_538
-bit 31_544
-bit 31_545
-bit 31_546
-bit 31_552
-bit 31_553
-bit 31_554
-bit 31_555
-bit 31_556
-bit 31_557
-bit 31_558
-bit 31_559
-bit 31_560
-bit 31_568
-bit 31_569
-bit 31_570
-bit 31_571
-bit 31_576
-bit 31_577
-bit 31_578
-bit 31_579
-bit 31_584
-bit 31_585
-bit 31_586
-bit 31_587
-bit 31_588
-bit 31_589
-bit 31_590
-bit 31_591
-bit 31_592
-bit 31_593
-bit 31_594
-bit 31_595
-bit 31_600
-bit 31_601
-bit 31_602
-bit 31_603
-bit 31_604
-bit 31_605
-bit 31_606
-bit 31_607
-bit 31_608
-bit 31_609
-bit 31_610
-bit 31_611
-bit 31_616
-bit 31_617
-bit 31_618
-bit 31_619
-bit 31_620
-bit 31_621
-bit 31_622
-bit 31_624
-bit 31_625
-bit 31_626
-bit 31_627
-bit 31_628
-bit 31_632
-bit 31_633
-bit 31_634
-bit 31_637
-bit 31_638
-bit 31_640
-bit 31_641
-bit 31_642
-bit 31_643
-bit 31_644
-bit 31_645
-bit 31_646
-bit 31_647
-bit 31_648
-bit 31_649
-bit 31_650
-bit 31_651
-bit 31_652
-bit 31_653
-bit 31_654
-bit 31_655
-bit 31_656
-bit 31_657
-bit 31_658
-bit 31_659
-bit 31_660
-bit 31_661
-bit 31_662
-bit 31_663
-bit 31_664
-bit 31_665
-bit 31_666
-bit 31_667
-bit 31_668
-bit 31_669
-bit 31_670
-bit 31_671
-bit 31_672
-bit 31_673
-bit 31_674
-bit 31_675
-bit 31_676
-bit 31_677
-bit 31_678
-bit 31_679
-bit 31_680

diff --git a/artix7/mask_gtp_common.db b/artix7/mask_gtp_common.db
index 2b533a6..70bd4c7 100644
--- a/artix7/mask_gtp_common.db
+++ b/artix7/mask_gtp_common.db

@@ -1,3 +1,5 @@
+bit 24_1613
+bit 25_1613
 bit 28_1424
 bit 28_1425
 bit 28_1426
@@ -12,6 +14,7 @@
 bit 28_1435
 bit 28_1436
 bit 28_1437
+bit 28_1438
 bit 28_1440
 bit 28_1442
 bit 28_1448
@@ -40,7 +43,6 @@
 bit 28_1494
 bit 28_1495
 bit 28_1512
-bit 28_1514
 bit 28_1516
 bit 28_1528
 bit 28_1544
@@ -142,6 +144,7 @@
 bit 28_1803
 bit 28_1804
 bit 28_1805
+bit 28_1806
 bit 29_1424
 bit 29_1425
 bit 29_1426
@@ -155,6 +158,8 @@
 bit 29_1434
 bit 29_1435
 bit 29_1436
+bit 29_1438
+bit 29_1439
 bit 29_1440
 bit 29_1443
 bit 29_1446
@@ -183,7 +188,6 @@
 bit 29_1494
 bit 29_1495
 bit 29_1512
-bit 29_1516
 bit 29_1528
 bit 29_1544
 bit 29_1545
@@ -280,3 +284,5 @@
 bit 29_1802
 bit 29_1803
 bit 29_1804
+bit 29_1806
+bit 29_1807

diff --git a/artix7/mask_gtp_common_mid_left.db b/artix7/mask_gtp_common_mid_left.db
index cbf3685..e63ba48 100644
--- a/artix7/mask_gtp_common_mid_left.db
+++ b/artix7/mask_gtp_common_mid_left.db

@@ -12,6 +12,7 @@
 bit 00_1435
 bit 00_1436
 bit 00_1437
+bit 00_1438
 bit 00_1440
 bit 00_1442
 bit 00_1448
@@ -40,7 +41,6 @@
 bit 00_1494
 bit 00_1495
 bit 00_1512
-bit 00_1514
 bit 00_1516
 bit 00_1528
 bit 00_1544
@@ -69,6 +69,7 @@
 bit 00_1580
 bit 00_1582
 bit 00_1584
+bit 00_1613
 bit 00_1640
 bit 00_1641
 bit 00_1642
@@ -142,6 +143,7 @@
 bit 00_1803
 bit 00_1804
 bit 00_1805
+bit 00_1806
 bit 01_1424
 bit 01_1425
 bit 01_1426
@@ -155,6 +157,8 @@
 bit 01_1434
 bit 01_1435
 bit 01_1436
+bit 01_1438
+bit 01_1439
 bit 01_1440
 bit 01_1443
 bit 01_1446
@@ -183,7 +187,6 @@
 bit 01_1494
 bit 01_1495
 bit 01_1512
-bit 01_1516
 bit 01_1528
 bit 01_1544
 bit 01_1545
@@ -208,6 +211,7 @@
 bit 01_1576
 bit 01_1580
 bit 01_1581
+bit 01_1613
 bit 01_1640
 bit 01_1641
 bit 01_1642
@@ -280,3 +284,5 @@
 bit 01_1802
 bit 01_1803
 bit 01_1804
+bit 01_1806
+bit 01_1807

diff --git a/artix7/mask_gtp_common_mid_right.db b/artix7/mask_gtp_common_mid_right.db
index cbf3685..e63ba48 100644
--- a/artix7/mask_gtp_common_mid_right.db
+++ b/artix7/mask_gtp_common_mid_right.db

@@ -12,6 +12,7 @@
 bit 00_1435
 bit 00_1436
 bit 00_1437
+bit 00_1438
 bit 00_1440
 bit 00_1442
 bit 00_1448
@@ -40,7 +41,6 @@
 bit 00_1494
 bit 00_1495
 bit 00_1512
-bit 00_1514
 bit 00_1516
 bit 00_1528
 bit 00_1544
@@ -69,6 +69,7 @@
 bit 00_1580
 bit 00_1582
 bit 00_1584
+bit 00_1613
 bit 00_1640
 bit 00_1641
 bit 00_1642
@@ -142,6 +143,7 @@
 bit 00_1803
 bit 00_1804
 bit 00_1805
+bit 00_1806
 bit 01_1424
 bit 01_1425
 bit 01_1426
@@ -155,6 +157,8 @@
 bit 01_1434
 bit 01_1435
 bit 01_1436
+bit 01_1438
+bit 01_1439
 bit 01_1440
 bit 01_1443
 bit 01_1446
@@ -183,7 +187,6 @@
 bit 01_1494
 bit 01_1495
 bit 01_1512
-bit 01_1516
 bit 01_1528
 bit 01_1544
 bit 01_1545
@@ -208,6 +211,7 @@
 bit 01_1576
 bit 01_1580
 bit 01_1581
+bit 01_1613
 bit 01_1640
 bit 01_1641
 bit 01_1642
@@ -280,3 +284,5 @@
 bit 01_1802
 bit 01_1803
 bit 01_1804
+bit 01_1806
+bit 01_1807

diff --git a/artix7/mask_liob33.db b/artix7/mask_liob33.db
index 1de8776..bf0a21e 100644
--- a/artix7/mask_liob33.db
+++ b/artix7/mask_liob33.db

@@ -17,11 +17,16 @@
 bit 38_44
 bit 38_62
 bit 38_64
+bit 38_74
+bit 38_76
 bit 38_82
 bit 38_84
 bit 38_86
 bit 38_92
 bit 38_94
+bit 38_98
+bit 38_100
+bit 38_102
 bit 38_106
 bit 38_110
 bit 38_112
@@ -45,12 +50,15 @@
 bit 39_61
 bit 39_63
 bit 39_65
+bit 39_75
 bit 39_83
 bit 39_85
 bit 39_87
 bit 39_89
 bit 39_93
 bit 39_95
+bit 39_97
+bit 39_101
 bit 39_105
 bit 39_107
 bit 39_109

diff --git a/artix7/mask_riob33.db b/artix7/mask_riob33.db
index 1de8776..bf0a21e 100644
--- a/artix7/mask_riob33.db
+++ b/artix7/mask_riob33.db

@@ -17,11 +17,16 @@
 bit 38_44
 bit 38_62
 bit 38_64
+bit 38_74
+bit 38_76
 bit 38_82
 bit 38_84
 bit 38_86
 bit 38_92
 bit 38_94
+bit 38_98
+bit 38_100
+bit 38_102
 bit 38_106
 bit 38_110
 bit 38_112
@@ -45,12 +50,15 @@
 bit 39_61
 bit 39_63
 bit 39_65
+bit 39_75
 bit 39_83
 bit 39_85
 bit 39_87
 bit 39_89
 bit 39_93
 bit 39_95
+bit 39_97
+bit 39_101
 bit 39_105
 bit 39_107
 bit 39_109

diff --git a/artix7/segbits_dsp_l.db b/artix7/segbits_dsp_l.db
index 55c2f6b..6b0e0f2 100644
--- a/artix7/segbits_dsp_l.db
+++ b/artix7/segbits_dsp_l.db

@@ -1,3 +1,159 @@
+DSP_L.DSP_0_CEAD.DSP_GND_L 26_63
+DSP_L.DSP_0_CEAD.DSP_VCC_L 27_62
+DSP_L.DSP_0_CEALUMODE.DSP_GND_L 27_51
+DSP_L.DSP_0_CEALUMODE.DSP_VCC_L 26_50
+DSP_L.DSP_0_CED.DSP_GND_L 27_72
+DSP_L.DSP_0_CED.DSP_VCC_L 26_72
+DSP_L.DSP_0_CEINMODE.DSP_GND_L 26_69
+DSP_L.DSP_0_CEINMODE.DSP_VCC_L 26_67
+DSP_L.DSP_0_RSTD.DSP_GND_L 27_96
+DSP_L.DSP_0_RSTD.DSP_VCC_L 27_85
+DSP_L.DSP_0_ALUMODE2.DSP_GND_L 27_56
+DSP_L.DSP_0_ALUMODE2.DSP_VCC_L 26_55
+DSP_L.DSP_0_ALUMODE3.DSP_GND_L 27_60
+DSP_L.DSP_0_ALUMODE3.DSP_VCC_L 26_53
+DSP_L.DSP_0_CARRYINSEL2.DSP_GND_L 26_17
+DSP_L.DSP_0_CARRYINSEL2.DSP_VCC_L 27_18
+DSP_L.DSP_0_D0.DSP_GND_L 26_65
+DSP_L.DSP_0_D0.DSP_VCC_L 27_64
+DSP_L.DSP_0_D1.DSP_GND_L 27_68
+DSP_L.DSP_0_D1.DSP_VCC_L 27_74
+DSP_L.DSP_0_D2.DSP_GND_L 27_71
+DSP_L.DSP_0_D2.DSP_VCC_L 27_70
+DSP_L.DSP_0_D3.DSP_GND_L 26_75
+DSP_L.DSP_0_D3.DSP_VCC_L 26_73
+DSP_L.DSP_0_D4.DSP_GND_L 27_78
+DSP_L.DSP_0_D4.DSP_VCC_L 26_77
+DSP_L.DSP_0_D5.DSP_GND_L 26_82
+DSP_L.DSP_0_D5.DSP_VCC_L 26_81
+DSP_L.DSP_0_D6.DSP_GND_L 26_89
+DSP_L.DSP_0_D6.DSP_VCC_L 27_89
+DSP_L.DSP_0_D7.DSP_GND_L 27_91
+DSP_L.DSP_0_D7.DSP_VCC_L 26_91
+DSP_L.DSP_0_D8.DSP_GND_L 26_98
+DSP_L.DSP_0_D8.DSP_VCC_L 27_97
+DSP_L.DSP_0_D9.DSP_GND_L 26_101
+DSP_L.DSP_0_D9.DSP_VCC_L 26_99
+DSP_L.DSP_0_D10.DSP_GND_L 26_105
+DSP_L.DSP_0_D10.DSP_VCC_L 26_103
+DSP_L.DSP_0_D11.DSP_GND_L 27_107
+DSP_L.DSP_0_D11.DSP_VCC_L 27_105
+DSP_L.DSP_0_D12.DSP_GND_L 26_107
+DSP_L.DSP_0_D12.DSP_VCC_L 26_111
+DSP_L.DSP_0_D13.DSP_GND_L 27_113
+DSP_L.DSP_0_D13.DSP_VCC_L 26_114
+DSP_L.DSP_0_D14.DSP_GND_L 26_118
+DSP_L.DSP_0_D14.DSP_VCC_L 27_116
+DSP_L.DSP_0_D15.DSP_GND_L 27_122
+DSP_L.DSP_0_D15.DSP_VCC_L 27_120
+DSP_L.DSP_0_D16.DSP_GND_L 27_125
+DSP_L.DSP_0_D16.DSP_VCC_L 26_125
+DSP_L.DSP_0_D17.DSP_GND_L 27_128
+DSP_L.DSP_0_D17.DSP_VCC_L 27_126
+DSP_L.DSP_0_D18.DSP_GND_L 26_135
+DSP_L.DSP_0_D18.DSP_VCC_L 26_131
+DSP_L.DSP_0_D19.DSP_GND_L 27_140
+DSP_L.DSP_0_D19.DSP_VCC_L 26_140
+DSP_L.DSP_0_D20.DSP_GND_L 26_145
+DSP_L.DSP_0_D20.DSP_VCC_L 27_143
+DSP_L.DSP_0_D21.DSP_GND_L 27_147
+DSP_L.DSP_0_D21.DSP_VCC_L 26_147
+DSP_L.DSP_0_D22.DSP_GND_L 27_151
+DSP_L.DSP_0_D22.DSP_VCC_L 26_150
+DSP_L.DSP_0_D23.DSP_GND_L 27_154
+DSP_L.DSP_0_D23.DSP_VCC_L 27_153
+DSP_L.DSP_0_D24.DSP_GND_L 27_158
+DSP_L.DSP_0_D24.DSP_VCC_L 27_155
+DSP_L.DSP_0_INMODE0.DSP_GND_L 27_134
+DSP_L.DSP_0_INMODE0.DSP_VCC_L 27_130
+DSP_L.DSP_0_INMODE1.DSP_GND_L 26_133
+DSP_L.DSP_0_INMODE1.DSP_VCC_L 27_145
+DSP_L.DSP_0_INMODE2.DSP_GND_L 27_80
+DSP_L.DSP_0_INMODE2.DSP_VCC_L 26_71
+DSP_L.DSP_0_INMODE3.DSP_GND_L 27_79
+DSP_L.DSP_0_INMODE3.DSP_VCC_L 26_70
+DSP_L.DSP_0_INMODE4.DSP_GND_L 26_58
+DSP_L.DSP_0_INMODE4.DSP_VCC_L 26_46
+DSP_L.DSP_0_OPMODE6.DSP_GND_L 27_12
+DSP_L.DSP_0_OPMODE6.DSP_VCC_L 27_20
+DSP_L.DSP_1_CEAD.DSP_GND_L 26_223
+DSP_L.DSP_1_CEAD.DSP_VCC_L 27_222
+DSP_L.DSP_1_CEALUMODE.DSP_GND_L 27_211
+DSP_L.DSP_1_CEALUMODE.DSP_VCC_L 26_210
+DSP_L.DSP_1_CED.DSP_GND_L 27_232
+DSP_L.DSP_1_CED.DSP_VCC_L 26_232
+DSP_L.DSP_1_CEINMODE.DSP_GND_L 26_229
+DSP_L.DSP_1_CEINMODE.DSP_VCC_L 26_227
+DSP_L.DSP_1_RSTD.DSP_GND_L 27_256
+DSP_L.DSP_1_RSTD.DSP_VCC_L 27_245
+DSP_L.DSP_1_ALUMODE2.DSP_GND_L 27_216
+DSP_L.DSP_1_ALUMODE2.DSP_VCC_L 26_215
+DSP_L.DSP_1_ALUMODE3.DSP_GND_L 27_220
+DSP_L.DSP_1_ALUMODE3.DSP_VCC_L 26_213
+DSP_L.DSP_1_CARRYINSEL2.DSP_GND_L 26_177
+DSP_L.DSP_1_CARRYINSEL2.DSP_VCC_L 27_178
+DSP_L.DSP_1_D0.DSP_GND_L 26_225
+DSP_L.DSP_1_D0.DSP_VCC_L 27_224
+DSP_L.DSP_1_D1.DSP_GND_L 27_228
+DSP_L.DSP_1_D1.DSP_VCC_L 27_234
+DSP_L.DSP_1_D2.DSP_GND_L 27_231
+DSP_L.DSP_1_D2.DSP_VCC_L 27_230
+DSP_L.DSP_1_D3.DSP_GND_L 26_235
+DSP_L.DSP_1_D3.DSP_VCC_L 26_233
+DSP_L.DSP_1_D4.DSP_GND_L 27_238
+DSP_L.DSP_1_D4.DSP_VCC_L 26_237
+DSP_L.DSP_1_D5.DSP_GND_L 26_242
+DSP_L.DSP_1_D5.DSP_VCC_L 26_241
+DSP_L.DSP_1_D6.DSP_GND_L 26_249
+DSP_L.DSP_1_D6.DSP_VCC_L 27_249
+DSP_L.DSP_1_D7.DSP_GND_L 27_251
+DSP_L.DSP_1_D7.DSP_VCC_L 26_251
+DSP_L.DSP_1_D8.DSP_GND_L 26_258
+DSP_L.DSP_1_D8.DSP_VCC_L 27_257
+DSP_L.DSP_1_D9.DSP_GND_L 26_261
+DSP_L.DSP_1_D9.DSP_VCC_L 26_259
+DSP_L.DSP_1_D10.DSP_GND_L 26_265
+DSP_L.DSP_1_D10.DSP_VCC_L 26_263
+DSP_L.DSP_1_D11.DSP_GND_L 27_267
+DSP_L.DSP_1_D11.DSP_VCC_L 27_265
+DSP_L.DSP_1_D12.DSP_GND_L 26_267
+DSP_L.DSP_1_D12.DSP_VCC_L 26_271
+DSP_L.DSP_1_D13.DSP_GND_L 27_273
+DSP_L.DSP_1_D13.DSP_VCC_L 26_274
+DSP_L.DSP_1_D14.DSP_GND_L 26_278
+DSP_L.DSP_1_D14.DSP_VCC_L 27_276
+DSP_L.DSP_1_D15.DSP_GND_L 27_282
+DSP_L.DSP_1_D15.DSP_VCC_L 27_280
+DSP_L.DSP_1_D16.DSP_GND_L 27_285
+DSP_L.DSP_1_D16.DSP_VCC_L 26_285
+DSP_L.DSP_1_D17.DSP_GND_L 27_288
+DSP_L.DSP_1_D17.DSP_VCC_L 27_286
+DSP_L.DSP_1_D18.DSP_GND_L 26_295
+DSP_L.DSP_1_D18.DSP_VCC_L 26_291
+DSP_L.DSP_1_D19.DSP_GND_L 27_300
+DSP_L.DSP_1_D19.DSP_VCC_L 26_300
+DSP_L.DSP_1_D20.DSP_GND_L 26_305
+DSP_L.DSP_1_D20.DSP_VCC_L 27_303
+DSP_L.DSP_1_D21.DSP_GND_L 27_307
+DSP_L.DSP_1_D21.DSP_VCC_L 26_307
+DSP_L.DSP_1_D22.DSP_GND_L 27_311
+DSP_L.DSP_1_D22.DSP_VCC_L 26_310
+DSP_L.DSP_1_D23.DSP_GND_L 27_314
+DSP_L.DSP_1_D23.DSP_VCC_L 27_313
+DSP_L.DSP_1_D24.DSP_GND_L 27_318
+DSP_L.DSP_1_D24.DSP_VCC_L 27_315
+DSP_L.DSP_1_INMODE0.DSP_GND_L 27_294
+DSP_L.DSP_1_INMODE0.DSP_VCC_L 27_290
+DSP_L.DSP_1_INMODE1.DSP_GND_L 26_293
+DSP_L.DSP_1_INMODE1.DSP_VCC_L 27_305
+DSP_L.DSP_1_INMODE2.DSP_GND_L 27_240
+DSP_L.DSP_1_INMODE2.DSP_VCC_L 26_231
+DSP_L.DSP_1_INMODE3.DSP_GND_L 27_239
+DSP_L.DSP_1_INMODE3.DSP_VCC_L 26_230
+DSP_L.DSP_1_INMODE4.DSP_GND_L 26_218
+DSP_L.DSP_1_INMODE4.DSP_VCC_L 26_206
+DSP_L.DSP_1_OPMODE6.DSP_GND_L 27_172
+DSP_L.DSP_1_OPMODE6.DSP_VCC_L 27_180
 DSP_L.DSP48.DSP_0.A_INPUT[0] 27_84
 DSP_L.DSP48.DSP_0.AREG_0 26_113 26_137 27_111
 DSP_L.DSP48.DSP_0.AREG_2 27_136

diff --git a/artix7/segbits_dsp_l.origin_info.db b/artix7/segbits_dsp_l.origin_info.db
index 53f2e7f..b4a192d 100644
--- a/artix7/segbits_dsp_l.origin_info.db
+++ b/artix7/segbits_dsp_l.origin_info.db

@@ -1,3 +1,159 @@
+DSP_L.DSP_0_CEAD.DSP_GND_L origin:101-dsp-pips 26_63
+DSP_L.DSP_0_CEAD.DSP_VCC_L origin:101-dsp-pips 27_62
+DSP_L.DSP_0_CEALUMODE.DSP_GND_L origin:101-dsp-pips 27_51
+DSP_L.DSP_0_CEALUMODE.DSP_VCC_L origin:101-dsp-pips 26_50
+DSP_L.DSP_0_CED.DSP_GND_L origin:101-dsp-pips 27_72
+DSP_L.DSP_0_CED.DSP_VCC_L origin:101-dsp-pips 26_72
+DSP_L.DSP_0_CEINMODE.DSP_GND_L origin:101-dsp-pips 26_69
+DSP_L.DSP_0_CEINMODE.DSP_VCC_L origin:101-dsp-pips 26_67
+DSP_L.DSP_0_RSTD.DSP_GND_L origin:101-dsp-pips 27_96
+DSP_L.DSP_0_RSTD.DSP_VCC_L origin:101-dsp-pips 27_85
+DSP_L.DSP_0_ALUMODE2.DSP_GND_L origin:101-dsp-pips 27_56
+DSP_L.DSP_0_ALUMODE2.DSP_VCC_L origin:101-dsp-pips 26_55
+DSP_L.DSP_0_ALUMODE3.DSP_GND_L origin:101-dsp-pips 27_60
+DSP_L.DSP_0_ALUMODE3.DSP_VCC_L origin:101-dsp-pips 26_53
+DSP_L.DSP_0_CARRYINSEL2.DSP_GND_L origin:101-dsp-pips 26_17
+DSP_L.DSP_0_CARRYINSEL2.DSP_VCC_L origin:101-dsp-pips 27_18
+DSP_L.DSP_0_D0.DSP_GND_L origin:101-dsp-pips 26_65
+DSP_L.DSP_0_D0.DSP_VCC_L origin:101-dsp-pips 27_64
+DSP_L.DSP_0_D1.DSP_GND_L origin:101-dsp-pips 27_68
+DSP_L.DSP_0_D1.DSP_VCC_L origin:101-dsp-pips 27_74
+DSP_L.DSP_0_D2.DSP_GND_L origin:101-dsp-pips 27_71
+DSP_L.DSP_0_D2.DSP_VCC_L origin:101-dsp-pips 27_70
+DSP_L.DSP_0_D3.DSP_GND_L origin:101-dsp-pips 26_75
+DSP_L.DSP_0_D3.DSP_VCC_L origin:101-dsp-pips 26_73
+DSP_L.DSP_0_D4.DSP_GND_L origin:101-dsp-pips 27_78
+DSP_L.DSP_0_D4.DSP_VCC_L origin:101-dsp-pips 26_77
+DSP_L.DSP_0_D5.DSP_GND_L origin:101-dsp-pips 26_82
+DSP_L.DSP_0_D5.DSP_VCC_L origin:101-dsp-pips 26_81
+DSP_L.DSP_0_D6.DSP_GND_L origin:101-dsp-pips 26_89
+DSP_L.DSP_0_D6.DSP_VCC_L origin:101-dsp-pips 27_89
+DSP_L.DSP_0_D7.DSP_GND_L origin:101-dsp-pips 27_91
+DSP_L.DSP_0_D7.DSP_VCC_L origin:101-dsp-pips 26_91
+DSP_L.DSP_0_D8.DSP_GND_L origin:101-dsp-pips 26_98
+DSP_L.DSP_0_D8.DSP_VCC_L origin:101-dsp-pips 27_97
+DSP_L.DSP_0_D9.DSP_GND_L origin:101-dsp-pips 26_101
+DSP_L.DSP_0_D9.DSP_VCC_L origin:101-dsp-pips 26_99
+DSP_L.DSP_0_D10.DSP_GND_L origin:101-dsp-pips 26_105
+DSP_L.DSP_0_D10.DSP_VCC_L origin:101-dsp-pips 26_103
+DSP_L.DSP_0_D11.DSP_GND_L origin:101-dsp-pips 27_107
+DSP_L.DSP_0_D11.DSP_VCC_L origin:101-dsp-pips 27_105
+DSP_L.DSP_0_D12.DSP_GND_L origin:101-dsp-pips 26_107
+DSP_L.DSP_0_D12.DSP_VCC_L origin:101-dsp-pips 26_111
+DSP_L.DSP_0_D13.DSP_GND_L origin:101-dsp-pips 27_113
+DSP_L.DSP_0_D13.DSP_VCC_L origin:101-dsp-pips 26_114
+DSP_L.DSP_0_D14.DSP_GND_L origin:101-dsp-pips 26_118
+DSP_L.DSP_0_D14.DSP_VCC_L origin:101-dsp-pips 27_116
+DSP_L.DSP_0_D15.DSP_GND_L origin:101-dsp-pips 27_122
+DSP_L.DSP_0_D15.DSP_VCC_L origin:101-dsp-pips 27_120
+DSP_L.DSP_0_D16.DSP_GND_L origin:101-dsp-pips 27_125
+DSP_L.DSP_0_D16.DSP_VCC_L origin:101-dsp-pips 26_125
+DSP_L.DSP_0_D17.DSP_GND_L origin:101-dsp-pips 27_128
+DSP_L.DSP_0_D17.DSP_VCC_L origin:101-dsp-pips 27_126
+DSP_L.DSP_0_D18.DSP_GND_L origin:101-dsp-pips 26_135
+DSP_L.DSP_0_D18.DSP_VCC_L origin:101-dsp-pips 26_131
+DSP_L.DSP_0_D19.DSP_GND_L origin:101-dsp-pips 27_140
+DSP_L.DSP_0_D19.DSP_VCC_L origin:101-dsp-pips 26_140
+DSP_L.DSP_0_D20.DSP_GND_L origin:101-dsp-pips 26_145
+DSP_L.DSP_0_D20.DSP_VCC_L origin:101-dsp-pips 27_143
+DSP_L.DSP_0_D21.DSP_GND_L origin:101-dsp-pips 27_147
+DSP_L.DSP_0_D21.DSP_VCC_L origin:101-dsp-pips 26_147
+DSP_L.DSP_0_D22.DSP_GND_L origin:101-dsp-pips 27_151
+DSP_L.DSP_0_D22.DSP_VCC_L origin:101-dsp-pips 26_150
+DSP_L.DSP_0_D23.DSP_GND_L origin:101-dsp-pips 27_154
+DSP_L.DSP_0_D23.DSP_VCC_L origin:101-dsp-pips 27_153
+DSP_L.DSP_0_D24.DSP_GND_L origin:101-dsp-pips 27_158
+DSP_L.DSP_0_D24.DSP_VCC_L origin:101-dsp-pips 27_155
+DSP_L.DSP_0_INMODE0.DSP_GND_L origin:101-dsp-pips 27_134
+DSP_L.DSP_0_INMODE0.DSP_VCC_L origin:101-dsp-pips 27_130
+DSP_L.DSP_0_INMODE1.DSP_GND_L origin:101-dsp-pips 26_133
+DSP_L.DSP_0_INMODE1.DSP_VCC_L origin:101-dsp-pips 27_145
+DSP_L.DSP_0_INMODE2.DSP_GND_L origin:101-dsp-pips 27_80
+DSP_L.DSP_0_INMODE2.DSP_VCC_L origin:101-dsp-pips 26_71
+DSP_L.DSP_0_INMODE3.DSP_GND_L origin:101-dsp-pips 27_79
+DSP_L.DSP_0_INMODE3.DSP_VCC_L origin:101-dsp-pips 26_70
+DSP_L.DSP_0_INMODE4.DSP_GND_L origin:101-dsp-pips 26_58
+DSP_L.DSP_0_INMODE4.DSP_VCC_L origin:101-dsp-pips 26_46
+DSP_L.DSP_0_OPMODE6.DSP_GND_L origin:101-dsp-pips 27_12
+DSP_L.DSP_0_OPMODE6.DSP_VCC_L origin:101-dsp-pips 27_20
+DSP_L.DSP_1_CEAD.DSP_GND_L origin:101-dsp-pips 26_223
+DSP_L.DSP_1_CEAD.DSP_VCC_L origin:101-dsp-pips 27_222
+DSP_L.DSP_1_CEALUMODE.DSP_GND_L origin:101-dsp-pips 27_211
+DSP_L.DSP_1_CEALUMODE.DSP_VCC_L origin:101-dsp-pips 26_210
+DSP_L.DSP_1_CED.DSP_GND_L origin:101-dsp-pips 27_232
+DSP_L.DSP_1_CED.DSP_VCC_L origin:101-dsp-pips 26_232
+DSP_L.DSP_1_CEINMODE.DSP_GND_L origin:101-dsp-pips 26_229
+DSP_L.DSP_1_CEINMODE.DSP_VCC_L origin:101-dsp-pips 26_227
+DSP_L.DSP_1_RSTD.DSP_GND_L origin:101-dsp-pips 27_256
+DSP_L.DSP_1_RSTD.DSP_VCC_L origin:101-dsp-pips 27_245
+DSP_L.DSP_1_ALUMODE2.DSP_GND_L origin:101-dsp-pips 27_216
+DSP_L.DSP_1_ALUMODE2.DSP_VCC_L origin:101-dsp-pips 26_215
+DSP_L.DSP_1_ALUMODE3.DSP_GND_L origin:101-dsp-pips 27_220
+DSP_L.DSP_1_ALUMODE3.DSP_VCC_L origin:101-dsp-pips 26_213
+DSP_L.DSP_1_CARRYINSEL2.DSP_GND_L origin:101-dsp-pips 26_177
+DSP_L.DSP_1_CARRYINSEL2.DSP_VCC_L origin:101-dsp-pips 27_178
+DSP_L.DSP_1_D0.DSP_GND_L origin:101-dsp-pips 26_225
+DSP_L.DSP_1_D0.DSP_VCC_L origin:101-dsp-pips 27_224
+DSP_L.DSP_1_D1.DSP_GND_L origin:101-dsp-pips 27_228
+DSP_L.DSP_1_D1.DSP_VCC_L origin:101-dsp-pips 27_234
+DSP_L.DSP_1_D2.DSP_GND_L origin:101-dsp-pips 27_231
+DSP_L.DSP_1_D2.DSP_VCC_L origin:101-dsp-pips 27_230
+DSP_L.DSP_1_D3.DSP_GND_L origin:101-dsp-pips 26_235
+DSP_L.DSP_1_D3.DSP_VCC_L origin:101-dsp-pips 26_233
+DSP_L.DSP_1_D4.DSP_GND_L origin:101-dsp-pips 27_238
+DSP_L.DSP_1_D4.DSP_VCC_L origin:101-dsp-pips 26_237
+DSP_L.DSP_1_D5.DSP_GND_L origin:101-dsp-pips 26_242
+DSP_L.DSP_1_D5.DSP_VCC_L origin:101-dsp-pips 26_241
+DSP_L.DSP_1_D6.DSP_GND_L origin:101-dsp-pips 26_249
+DSP_L.DSP_1_D6.DSP_VCC_L origin:101-dsp-pips 27_249
+DSP_L.DSP_1_D7.DSP_GND_L origin:101-dsp-pips 27_251
+DSP_L.DSP_1_D7.DSP_VCC_L origin:101-dsp-pips 26_251
+DSP_L.DSP_1_D8.DSP_GND_L origin:101-dsp-pips 26_258
+DSP_L.DSP_1_D8.DSP_VCC_L origin:101-dsp-pips 27_257
+DSP_L.DSP_1_D9.DSP_GND_L origin:101-dsp-pips 26_261
+DSP_L.DSP_1_D9.DSP_VCC_L origin:101-dsp-pips 26_259
+DSP_L.DSP_1_D10.DSP_GND_L origin:101-dsp-pips 26_265
+DSP_L.DSP_1_D10.DSP_VCC_L origin:101-dsp-pips 26_263
+DSP_L.DSP_1_D11.DSP_GND_L origin:101-dsp-pips 27_267
+DSP_L.DSP_1_D11.DSP_VCC_L origin:101-dsp-pips 27_265
+DSP_L.DSP_1_D12.DSP_GND_L origin:101-dsp-pips 26_267
+DSP_L.DSP_1_D12.DSP_VCC_L origin:101-dsp-pips 26_271
+DSP_L.DSP_1_D13.DSP_GND_L origin:101-dsp-pips 27_273
+DSP_L.DSP_1_D13.DSP_VCC_L origin:101-dsp-pips 26_274
+DSP_L.DSP_1_D14.DSP_GND_L origin:101-dsp-pips 26_278
+DSP_L.DSP_1_D14.DSP_VCC_L origin:101-dsp-pips 27_276
+DSP_L.DSP_1_D15.DSP_GND_L origin:101-dsp-pips 27_282
+DSP_L.DSP_1_D15.DSP_VCC_L origin:101-dsp-pips 27_280
+DSP_L.DSP_1_D16.DSP_GND_L origin:101-dsp-pips 27_285
+DSP_L.DSP_1_D16.DSP_VCC_L origin:101-dsp-pips 26_285
+DSP_L.DSP_1_D17.DSP_GND_L origin:101-dsp-pips 27_288
+DSP_L.DSP_1_D17.DSP_VCC_L origin:101-dsp-pips 27_286
+DSP_L.DSP_1_D18.DSP_GND_L origin:101-dsp-pips 26_295
+DSP_L.DSP_1_D18.DSP_VCC_L origin:101-dsp-pips 26_291
+DSP_L.DSP_1_D19.DSP_GND_L origin:101-dsp-pips 27_300
+DSP_L.DSP_1_D19.DSP_VCC_L origin:101-dsp-pips 26_300
+DSP_L.DSP_1_D20.DSP_GND_L origin:101-dsp-pips 26_305
+DSP_L.DSP_1_D20.DSP_VCC_L origin:101-dsp-pips 27_303
+DSP_L.DSP_1_D21.DSP_GND_L origin:101-dsp-pips 27_307
+DSP_L.DSP_1_D21.DSP_VCC_L origin:101-dsp-pips 26_307
+DSP_L.DSP_1_D22.DSP_GND_L origin:101-dsp-pips 27_311
+DSP_L.DSP_1_D22.DSP_VCC_L origin:101-dsp-pips 26_310
+DSP_L.DSP_1_D23.DSP_GND_L origin:101-dsp-pips 27_314
+DSP_L.DSP_1_D23.DSP_VCC_L origin:101-dsp-pips 27_313
+DSP_L.DSP_1_D24.DSP_GND_L origin:101-dsp-pips 27_318
+DSP_L.DSP_1_D24.DSP_VCC_L origin:101-dsp-pips 27_315
+DSP_L.DSP_1_INMODE0.DSP_GND_L origin:101-dsp-pips 27_294
+DSP_L.DSP_1_INMODE0.DSP_VCC_L origin:101-dsp-pips 27_290
+DSP_L.DSP_1_INMODE1.DSP_GND_L origin:101-dsp-pips 26_293
+DSP_L.DSP_1_INMODE1.DSP_VCC_L origin:101-dsp-pips 27_305
+DSP_L.DSP_1_INMODE2.DSP_GND_L origin:101-dsp-pips 27_240
+DSP_L.DSP_1_INMODE2.DSP_VCC_L origin:101-dsp-pips 26_231
+DSP_L.DSP_1_INMODE3.DSP_GND_L origin:101-dsp-pips 27_239
+DSP_L.DSP_1_INMODE3.DSP_VCC_L origin:101-dsp-pips 26_230
+DSP_L.DSP_1_INMODE4.DSP_GND_L origin:101-dsp-pips 26_218
+DSP_L.DSP_1_INMODE4.DSP_VCC_L origin:101-dsp-pips 26_206
+DSP_L.DSP_1_OPMODE6.DSP_GND_L origin:101-dsp-pips 27_172
+DSP_L.DSP_1_OPMODE6.DSP_VCC_L origin:101-dsp-pips 27_180
 DSP_L.DSP48.DSP_0.A_INPUT[0] origin:100-dsp-mskpat 27_84
 DSP_L.DSP48.DSP_0.AREG_0 origin:100-dsp-mskpat 26_113 26_137 27_111
 DSP_L.DSP48.DSP_0.AREG_2 origin:100-dsp-mskpat 27_136

diff --git a/artix7/segbits_dsp_r.db b/artix7/segbits_dsp_r.db
index 956b1b3..cc796f2 100644
--- a/artix7/segbits_dsp_r.db
+++ b/artix7/segbits_dsp_r.db

@@ -1,3 +1,159 @@
+DSP_R.DSP_0_CEAD.DSP_GND_R 26_63
+DSP_R.DSP_0_CEAD.DSP_VCC_R 27_62
+DSP_R.DSP_0_CEALUMODE.DSP_GND_R 27_51
+DSP_R.DSP_0_CEALUMODE.DSP_VCC_R 26_50
+DSP_R.DSP_0_CED.DSP_GND_R 27_72
+DSP_R.DSP_0_CED.DSP_VCC_R 26_72
+DSP_R.DSP_0_CEINMODE.DSP_GND_R 26_69
+DSP_R.DSP_0_CEINMODE.DSP_VCC_R 26_67
+DSP_R.DSP_0_RSTD.DSP_GND_R 27_96
+DSP_R.DSP_0_RSTD.DSP_VCC_R 27_85
+DSP_R.DSP_0_ALUMODE2.DSP_GND_R 27_56
+DSP_R.DSP_0_ALUMODE2.DSP_VCC_R 26_55
+DSP_R.DSP_0_ALUMODE3.DSP_GND_R 27_60
+DSP_R.DSP_0_ALUMODE3.DSP_VCC_R 26_53
+DSP_R.DSP_0_CARRYINSEL2.DSP_GND_R 26_17
+DSP_R.DSP_0_CARRYINSEL2.DSP_VCC_R 27_18
+DSP_R.DSP_0_D0.DSP_GND_R 26_65
+DSP_R.DSP_0_D0.DSP_VCC_R 27_64
+DSP_R.DSP_0_D1.DSP_GND_R 27_68
+DSP_R.DSP_0_D1.DSP_VCC_R 27_74
+DSP_R.DSP_0_D2.DSP_GND_R 27_71
+DSP_R.DSP_0_D2.DSP_VCC_R 27_70
+DSP_R.DSP_0_D3.DSP_GND_R 26_75
+DSP_R.DSP_0_D3.DSP_VCC_R 26_73
+DSP_R.DSP_0_D4.DSP_GND_R 27_78
+DSP_R.DSP_0_D4.DSP_VCC_R 26_77
+DSP_R.DSP_0_D5.DSP_GND_R 26_82
+DSP_R.DSP_0_D5.DSP_VCC_R 26_81
+DSP_R.DSP_0_D6.DSP_GND_R 26_89
+DSP_R.DSP_0_D6.DSP_VCC_R 27_89
+DSP_R.DSP_0_D7.DSP_GND_R 27_91
+DSP_R.DSP_0_D7.DSP_VCC_R 26_91
+DSP_R.DSP_0_D8.DSP_GND_R 26_98
+DSP_R.DSP_0_D8.DSP_VCC_R 27_97
+DSP_R.DSP_0_D9.DSP_GND_R 26_101
+DSP_R.DSP_0_D9.DSP_VCC_R 26_99
+DSP_R.DSP_0_D10.DSP_GND_R 26_105
+DSP_R.DSP_0_D10.DSP_VCC_R 26_103
+DSP_R.DSP_0_D11.DSP_GND_R 27_107
+DSP_R.DSP_0_D11.DSP_VCC_R 27_105
+DSP_R.DSP_0_D12.DSP_GND_R 26_107
+DSP_R.DSP_0_D12.DSP_VCC_R 26_111
+DSP_R.DSP_0_D13.DSP_GND_R 27_113
+DSP_R.DSP_0_D13.DSP_VCC_R 26_114
+DSP_R.DSP_0_D14.DSP_GND_R 26_118
+DSP_R.DSP_0_D14.DSP_VCC_R 27_116
+DSP_R.DSP_0_D15.DSP_GND_R 27_122
+DSP_R.DSP_0_D15.DSP_VCC_R 27_120
+DSP_R.DSP_0_D16.DSP_GND_R 27_125
+DSP_R.DSP_0_D16.DSP_VCC_R 26_125
+DSP_R.DSP_0_D17.DSP_GND_R 27_128
+DSP_R.DSP_0_D17.DSP_VCC_R 27_126
+DSP_R.DSP_0_D18.DSP_GND_R 26_135
+DSP_R.DSP_0_D18.DSP_VCC_R 26_131
+DSP_R.DSP_0_D19.DSP_GND_R 27_140
+DSP_R.DSP_0_D19.DSP_VCC_R 26_140
+DSP_R.DSP_0_D20.DSP_GND_R 26_145
+DSP_R.DSP_0_D20.DSP_VCC_R 27_143
+DSP_R.DSP_0_D21.DSP_GND_R 27_147
+DSP_R.DSP_0_D21.DSP_VCC_R 26_147
+DSP_R.DSP_0_D22.DSP_GND_R 27_151
+DSP_R.DSP_0_D22.DSP_VCC_R 26_150
+DSP_R.DSP_0_D23.DSP_GND_R 27_154
+DSP_R.DSP_0_D23.DSP_VCC_R 27_153
+DSP_R.DSP_0_D24.DSP_GND_R 27_158
+DSP_R.DSP_0_D24.DSP_VCC_R 27_155
+DSP_R.DSP_0_INMODE0.DSP_GND_R 27_134
+DSP_R.DSP_0_INMODE0.DSP_VCC_R 27_130
+DSP_R.DSP_0_INMODE1.DSP_GND_R 26_133
+DSP_R.DSP_0_INMODE1.DSP_VCC_R 27_145
+DSP_R.DSP_0_INMODE2.DSP_GND_R 27_80
+DSP_R.DSP_0_INMODE2.DSP_VCC_R 26_71
+DSP_R.DSP_0_INMODE3.DSP_GND_R 27_79
+DSP_R.DSP_0_INMODE3.DSP_VCC_R 26_70
+DSP_R.DSP_0_INMODE4.DSP_GND_R 26_58
+DSP_R.DSP_0_INMODE4.DSP_VCC_R 26_46
+DSP_R.DSP_0_OPMODE6.DSP_GND_R 27_12
+DSP_R.DSP_0_OPMODE6.DSP_VCC_R 27_20
+DSP_R.DSP_1_CEAD.DSP_GND_R 26_223
+DSP_R.DSP_1_CEAD.DSP_VCC_R 27_222
+DSP_R.DSP_1_CEALUMODE.DSP_GND_R 27_211
+DSP_R.DSP_1_CEALUMODE.DSP_VCC_R 26_210
+DSP_R.DSP_1_CED.DSP_GND_R 27_232
+DSP_R.DSP_1_CED.DSP_VCC_R 26_232
+DSP_R.DSP_1_CEINMODE.DSP_GND_R 26_229
+DSP_R.DSP_1_CEINMODE.DSP_VCC_R 26_227
+DSP_R.DSP_1_RSTD.DSP_GND_R 27_256
+DSP_R.DSP_1_RSTD.DSP_VCC_R 27_245
+DSP_R.DSP_1_ALUMODE2.DSP_GND_R 27_216
+DSP_R.DSP_1_ALUMODE2.DSP_VCC_R 26_215
+DSP_R.DSP_1_ALUMODE3.DSP_GND_R 27_220
+DSP_R.DSP_1_ALUMODE3.DSP_VCC_R 26_213
+DSP_R.DSP_1_CARRYINSEL2.DSP_GND_R 26_177
+DSP_R.DSP_1_CARRYINSEL2.DSP_VCC_R 27_178
+DSP_R.DSP_1_D0.DSP_GND_R 26_225
+DSP_R.DSP_1_D0.DSP_VCC_R 27_224
+DSP_R.DSP_1_D1.DSP_GND_R 27_228
+DSP_R.DSP_1_D1.DSP_VCC_R 27_234
+DSP_R.DSP_1_D2.DSP_GND_R 27_231
+DSP_R.DSP_1_D2.DSP_VCC_R 27_230
+DSP_R.DSP_1_D3.DSP_GND_R 26_235
+DSP_R.DSP_1_D3.DSP_VCC_R 26_233
+DSP_R.DSP_1_D4.DSP_GND_R 27_238
+DSP_R.DSP_1_D4.DSP_VCC_R 26_237
+DSP_R.DSP_1_D5.DSP_GND_R 26_242
+DSP_R.DSP_1_D5.DSP_VCC_R 26_241
+DSP_R.DSP_1_D6.DSP_GND_R 26_249
+DSP_R.DSP_1_D6.DSP_VCC_R 27_249
+DSP_R.DSP_1_D7.DSP_GND_R 27_251
+DSP_R.DSP_1_D7.DSP_VCC_R 26_251
+DSP_R.DSP_1_D8.DSP_GND_R 26_258
+DSP_R.DSP_1_D8.DSP_VCC_R 27_257
+DSP_R.DSP_1_D9.DSP_GND_R 26_261
+DSP_R.DSP_1_D9.DSP_VCC_R 26_259
+DSP_R.DSP_1_D10.DSP_GND_R 26_265
+DSP_R.DSP_1_D10.DSP_VCC_R 26_263
+DSP_R.DSP_1_D11.DSP_GND_R 27_267
+DSP_R.DSP_1_D11.DSP_VCC_R 27_265
+DSP_R.DSP_1_D12.DSP_GND_R 26_267
+DSP_R.DSP_1_D12.DSP_VCC_R 26_271
+DSP_R.DSP_1_D13.DSP_GND_R 27_273
+DSP_R.DSP_1_D13.DSP_VCC_R 26_274
+DSP_R.DSP_1_D14.DSP_GND_R 26_278
+DSP_R.DSP_1_D14.DSP_VCC_R 27_276
+DSP_R.DSP_1_D15.DSP_GND_R 27_282
+DSP_R.DSP_1_D15.DSP_VCC_R 27_280
+DSP_R.DSP_1_D16.DSP_GND_R 27_285
+DSP_R.DSP_1_D16.DSP_VCC_R 26_285
+DSP_R.DSP_1_D17.DSP_GND_R 27_288
+DSP_R.DSP_1_D17.DSP_VCC_R 27_286
+DSP_R.DSP_1_D18.DSP_GND_R 26_295
+DSP_R.DSP_1_D18.DSP_VCC_R 26_291
+DSP_R.DSP_1_D19.DSP_GND_R 27_300
+DSP_R.DSP_1_D19.DSP_VCC_R 26_300
+DSP_R.DSP_1_D20.DSP_GND_R 26_305
+DSP_R.DSP_1_D20.DSP_VCC_R 27_303
+DSP_R.DSP_1_D21.DSP_GND_R 27_307
+DSP_R.DSP_1_D21.DSP_VCC_R 26_307
+DSP_R.DSP_1_D22.DSP_GND_R 27_311
+DSP_R.DSP_1_D22.DSP_VCC_R 26_310
+DSP_R.DSP_1_D23.DSP_GND_R 27_314
+DSP_R.DSP_1_D23.DSP_VCC_R 27_313
+DSP_R.DSP_1_D24.DSP_GND_R 27_318
+DSP_R.DSP_1_D24.DSP_VCC_R 27_315
+DSP_R.DSP_1_INMODE0.DSP_GND_R 27_294
+DSP_R.DSP_1_INMODE0.DSP_VCC_R 27_290
+DSP_R.DSP_1_INMODE1.DSP_GND_R 26_293
+DSP_R.DSP_1_INMODE1.DSP_VCC_R 27_305
+DSP_R.DSP_1_INMODE2.DSP_GND_R 27_240
+DSP_R.DSP_1_INMODE2.DSP_VCC_R 26_231
+DSP_R.DSP_1_INMODE3.DSP_GND_R 27_239
+DSP_R.DSP_1_INMODE3.DSP_VCC_R 26_230
+DSP_R.DSP_1_INMODE4.DSP_GND_R 26_218
+DSP_R.DSP_1_INMODE4.DSP_VCC_R 26_206
+DSP_R.DSP_1_OPMODE6.DSP_GND_R 27_172
+DSP_R.DSP_1_OPMODE6.DSP_VCC_R 27_180
 DSP_R.DSP48.DSP_0.A_INPUT[0] 27_84
 DSP_R.DSP48.DSP_0.AREG_0 26_113 26_137 27_111
 DSP_R.DSP48.DSP_0.AREG_2 27_136

diff --git a/artix7/segbits_dsp_r.origin_info.db b/artix7/segbits_dsp_r.origin_info.db
index e3ac198..f2d5d0f 100644
--- a/artix7/segbits_dsp_r.origin_info.db
+++ b/artix7/segbits_dsp_r.origin_info.db

@@ -1,3 +1,159 @@
+DSP_R.DSP_0_CEAD.DSP_GND_R origin:101-dsp-pips 26_63
+DSP_R.DSP_0_CEAD.DSP_VCC_R origin:101-dsp-pips 27_62
+DSP_R.DSP_0_CEALUMODE.DSP_GND_R origin:101-dsp-pips 27_51
+DSP_R.DSP_0_CEALUMODE.DSP_VCC_R origin:101-dsp-pips 26_50
+DSP_R.DSP_0_CED.DSP_GND_R origin:101-dsp-pips 27_72
+DSP_R.DSP_0_CED.DSP_VCC_R origin:101-dsp-pips 26_72
+DSP_R.DSP_0_CEINMODE.DSP_GND_R origin:101-dsp-pips 26_69
+DSP_R.DSP_0_CEINMODE.DSP_VCC_R origin:101-dsp-pips 26_67
+DSP_R.DSP_0_RSTD.DSP_GND_R origin:101-dsp-pips 27_96
+DSP_R.DSP_0_RSTD.DSP_VCC_R origin:101-dsp-pips 27_85
+DSP_R.DSP_0_ALUMODE2.DSP_GND_R origin:101-dsp-pips 27_56
+DSP_R.DSP_0_ALUMODE2.DSP_VCC_R origin:101-dsp-pips 26_55
+DSP_R.DSP_0_ALUMODE3.DSP_GND_R origin:101-dsp-pips 27_60
+DSP_R.DSP_0_ALUMODE3.DSP_VCC_R origin:101-dsp-pips 26_53
+DSP_R.DSP_0_CARRYINSEL2.DSP_GND_R origin:101-dsp-pips 26_17
+DSP_R.DSP_0_CARRYINSEL2.DSP_VCC_R origin:101-dsp-pips 27_18
+DSP_R.DSP_0_D0.DSP_GND_R origin:101-dsp-pips 26_65
+DSP_R.DSP_0_D0.DSP_VCC_R origin:101-dsp-pips 27_64
+DSP_R.DSP_0_D1.DSP_GND_R origin:101-dsp-pips 27_68
+DSP_R.DSP_0_D1.DSP_VCC_R origin:101-dsp-pips 27_74
+DSP_R.DSP_0_D2.DSP_GND_R origin:101-dsp-pips 27_71
+DSP_R.DSP_0_D2.DSP_VCC_R origin:101-dsp-pips 27_70
+DSP_R.DSP_0_D3.DSP_GND_R origin:101-dsp-pips 26_75
+DSP_R.DSP_0_D3.DSP_VCC_R origin:101-dsp-pips 26_73
+DSP_R.DSP_0_D4.DSP_GND_R origin:101-dsp-pips 27_78
+DSP_R.DSP_0_D4.DSP_VCC_R origin:101-dsp-pips 26_77
+DSP_R.DSP_0_D5.DSP_GND_R origin:101-dsp-pips 26_82
+DSP_R.DSP_0_D5.DSP_VCC_R origin:101-dsp-pips 26_81
+DSP_R.DSP_0_D6.DSP_GND_R origin:101-dsp-pips 26_89
+DSP_R.DSP_0_D6.DSP_VCC_R origin:101-dsp-pips 27_89
+DSP_R.DSP_0_D7.DSP_GND_R origin:101-dsp-pips 27_91
+DSP_R.DSP_0_D7.DSP_VCC_R origin:101-dsp-pips 26_91
+DSP_R.DSP_0_D8.DSP_GND_R origin:101-dsp-pips 26_98
+DSP_R.DSP_0_D8.DSP_VCC_R origin:101-dsp-pips 27_97
+DSP_R.DSP_0_D9.DSP_GND_R origin:101-dsp-pips 26_101
+DSP_R.DSP_0_D9.DSP_VCC_R origin:101-dsp-pips 26_99
+DSP_R.DSP_0_D10.DSP_GND_R origin:101-dsp-pips 26_105
+DSP_R.DSP_0_D10.DSP_VCC_R origin:101-dsp-pips 26_103
+DSP_R.DSP_0_D11.DSP_GND_R origin:101-dsp-pips 27_107
+DSP_R.DSP_0_D11.DSP_VCC_R origin:101-dsp-pips 27_105
+DSP_R.DSP_0_D12.DSP_GND_R origin:101-dsp-pips 26_107
+DSP_R.DSP_0_D12.DSP_VCC_R origin:101-dsp-pips 26_111
+DSP_R.DSP_0_D13.DSP_GND_R origin:101-dsp-pips 27_113
+DSP_R.DSP_0_D13.DSP_VCC_R origin:101-dsp-pips 26_114
+DSP_R.DSP_0_D14.DSP_GND_R origin:101-dsp-pips 26_118
+DSP_R.DSP_0_D14.DSP_VCC_R origin:101-dsp-pips 27_116
+DSP_R.DSP_0_D15.DSP_GND_R origin:101-dsp-pips 27_122
+DSP_R.DSP_0_D15.DSP_VCC_R origin:101-dsp-pips 27_120
+DSP_R.DSP_0_D16.DSP_GND_R origin:101-dsp-pips 27_125
+DSP_R.DSP_0_D16.DSP_VCC_R origin:101-dsp-pips 26_125
+DSP_R.DSP_0_D17.DSP_GND_R origin:101-dsp-pips 27_128
+DSP_R.DSP_0_D17.DSP_VCC_R origin:101-dsp-pips 27_126
+DSP_R.DSP_0_D18.DSP_GND_R origin:101-dsp-pips 26_135
+DSP_R.DSP_0_D18.DSP_VCC_R origin:101-dsp-pips 26_131
+DSP_R.DSP_0_D19.DSP_GND_R origin:101-dsp-pips 27_140
+DSP_R.DSP_0_D19.DSP_VCC_R origin:101-dsp-pips 26_140
+DSP_R.DSP_0_D20.DSP_GND_R origin:101-dsp-pips 26_145
+DSP_R.DSP_0_D20.DSP_VCC_R origin:101-dsp-pips 27_143
+DSP_R.DSP_0_D21.DSP_GND_R origin:101-dsp-pips 27_147
+DSP_R.DSP_0_D21.DSP_VCC_R origin:101-dsp-pips 26_147
+DSP_R.DSP_0_D22.DSP_GND_R origin:101-dsp-pips 27_151
+DSP_R.DSP_0_D22.DSP_VCC_R origin:101-dsp-pips 26_150
+DSP_R.DSP_0_D23.DSP_GND_R origin:101-dsp-pips 27_154
+DSP_R.DSP_0_D23.DSP_VCC_R origin:101-dsp-pips 27_153
+DSP_R.DSP_0_D24.DSP_GND_R origin:101-dsp-pips 27_158
+DSP_R.DSP_0_D24.DSP_VCC_R origin:101-dsp-pips 27_155
+DSP_R.DSP_0_INMODE0.DSP_GND_R origin:101-dsp-pips 27_134
+DSP_R.DSP_0_INMODE0.DSP_VCC_R origin:101-dsp-pips 27_130
+DSP_R.DSP_0_INMODE1.DSP_GND_R origin:101-dsp-pips 26_133
+DSP_R.DSP_0_INMODE1.DSP_VCC_R origin:101-dsp-pips 27_145
+DSP_R.DSP_0_INMODE2.DSP_GND_R origin:101-dsp-pips 27_80
+DSP_R.DSP_0_INMODE2.DSP_VCC_R origin:101-dsp-pips 26_71
+DSP_R.DSP_0_INMODE3.DSP_GND_R origin:101-dsp-pips 27_79
+DSP_R.DSP_0_INMODE3.DSP_VCC_R origin:101-dsp-pips 26_70
+DSP_R.DSP_0_INMODE4.DSP_GND_R origin:101-dsp-pips 26_58
+DSP_R.DSP_0_INMODE4.DSP_VCC_R origin:101-dsp-pips 26_46
+DSP_R.DSP_0_OPMODE6.DSP_GND_R origin:101-dsp-pips 27_12
+DSP_R.DSP_0_OPMODE6.DSP_VCC_R origin:101-dsp-pips 27_20
+DSP_R.DSP_1_CEAD.DSP_GND_R origin:101-dsp-pips 26_223
+DSP_R.DSP_1_CEAD.DSP_VCC_R origin:101-dsp-pips 27_222
+DSP_R.DSP_1_CEALUMODE.DSP_GND_R origin:101-dsp-pips 27_211
+DSP_R.DSP_1_CEALUMODE.DSP_VCC_R origin:101-dsp-pips 26_210
+DSP_R.DSP_1_CED.DSP_GND_R origin:101-dsp-pips 27_232
+DSP_R.DSP_1_CED.DSP_VCC_R origin:101-dsp-pips 26_232
+DSP_R.DSP_1_CEINMODE.DSP_GND_R origin:101-dsp-pips 26_229
+DSP_R.DSP_1_CEINMODE.DSP_VCC_R origin:101-dsp-pips 26_227
+DSP_R.DSP_1_RSTD.DSP_GND_R origin:101-dsp-pips 27_256
+DSP_R.DSP_1_RSTD.DSP_VCC_R origin:101-dsp-pips 27_245
+DSP_R.DSP_1_ALUMODE2.DSP_GND_R origin:101-dsp-pips 27_216
+DSP_R.DSP_1_ALUMODE2.DSP_VCC_R origin:101-dsp-pips 26_215
+DSP_R.DSP_1_ALUMODE3.DSP_GND_R origin:101-dsp-pips 27_220
+DSP_R.DSP_1_ALUMODE3.DSP_VCC_R origin:101-dsp-pips 26_213
+DSP_R.DSP_1_CARRYINSEL2.DSP_GND_R origin:101-dsp-pips 26_177
+DSP_R.DSP_1_CARRYINSEL2.DSP_VCC_R origin:101-dsp-pips 27_178
+DSP_R.DSP_1_D0.DSP_GND_R origin:101-dsp-pips 26_225
+DSP_R.DSP_1_D0.DSP_VCC_R origin:101-dsp-pips 27_224
+DSP_R.DSP_1_D1.DSP_GND_R origin:101-dsp-pips 27_228
+DSP_R.DSP_1_D1.DSP_VCC_R origin:101-dsp-pips 27_234
+DSP_R.DSP_1_D2.DSP_GND_R origin:101-dsp-pips 27_231
+DSP_R.DSP_1_D2.DSP_VCC_R origin:101-dsp-pips 27_230
+DSP_R.DSP_1_D3.DSP_GND_R origin:101-dsp-pips 26_235
+DSP_R.DSP_1_D3.DSP_VCC_R origin:101-dsp-pips 26_233
+DSP_R.DSP_1_D4.DSP_GND_R origin:101-dsp-pips 27_238
+DSP_R.DSP_1_D4.DSP_VCC_R origin:101-dsp-pips 26_237
+DSP_R.DSP_1_D5.DSP_GND_R origin:101-dsp-pips 26_242
+DSP_R.DSP_1_D5.DSP_VCC_R origin:101-dsp-pips 26_241
+DSP_R.DSP_1_D6.DSP_GND_R origin:101-dsp-pips 26_249
+DSP_R.DSP_1_D6.DSP_VCC_R origin:101-dsp-pips 27_249
+DSP_R.DSP_1_D7.DSP_GND_R origin:101-dsp-pips 27_251
+DSP_R.DSP_1_D7.DSP_VCC_R origin:101-dsp-pips 26_251
+DSP_R.DSP_1_D8.DSP_GND_R origin:101-dsp-pips 26_258
+DSP_R.DSP_1_D8.DSP_VCC_R origin:101-dsp-pips 27_257
+DSP_R.DSP_1_D9.DSP_GND_R origin:101-dsp-pips 26_261
+DSP_R.DSP_1_D9.DSP_VCC_R origin:101-dsp-pips 26_259
+DSP_R.DSP_1_D10.DSP_GND_R origin:101-dsp-pips 26_265
+DSP_R.DSP_1_D10.DSP_VCC_R origin:101-dsp-pips 26_263
+DSP_R.DSP_1_D11.DSP_GND_R origin:101-dsp-pips 27_267
+DSP_R.DSP_1_D11.DSP_VCC_R origin:101-dsp-pips 27_265
+DSP_R.DSP_1_D12.DSP_GND_R origin:101-dsp-pips 26_267
+DSP_R.DSP_1_D12.DSP_VCC_R origin:101-dsp-pips 26_271
+DSP_R.DSP_1_D13.DSP_GND_R origin:101-dsp-pips 27_273
+DSP_R.DSP_1_D13.DSP_VCC_R origin:101-dsp-pips 26_274
+DSP_R.DSP_1_D14.DSP_GND_R origin:101-dsp-pips 26_278
+DSP_R.DSP_1_D14.DSP_VCC_R origin:101-dsp-pips 27_276
+DSP_R.DSP_1_D15.DSP_GND_R origin:101-dsp-pips 27_282
+DSP_R.DSP_1_D15.DSP_VCC_R origin:101-dsp-pips 27_280
+DSP_R.DSP_1_D16.DSP_GND_R origin:101-dsp-pips 27_285
+DSP_R.DSP_1_D16.DSP_VCC_R origin:101-dsp-pips 26_285
+DSP_R.DSP_1_D17.DSP_GND_R origin:101-dsp-pips 27_288
+DSP_R.DSP_1_D17.DSP_VCC_R origin:101-dsp-pips 27_286
+DSP_R.DSP_1_D18.DSP_GND_R origin:101-dsp-pips 26_295
+DSP_R.DSP_1_D18.DSP_VCC_R origin:101-dsp-pips 26_291
+DSP_R.DSP_1_D19.DSP_GND_R origin:101-dsp-pips 27_300
+DSP_R.DSP_1_D19.DSP_VCC_R origin:101-dsp-pips 26_300
+DSP_R.DSP_1_D20.DSP_GND_R origin:101-dsp-pips 26_305
+DSP_R.DSP_1_D20.DSP_VCC_R origin:101-dsp-pips 27_303
+DSP_R.DSP_1_D21.DSP_GND_R origin:101-dsp-pips 27_307
+DSP_R.DSP_1_D21.DSP_VCC_R origin:101-dsp-pips 26_307
+DSP_R.DSP_1_D22.DSP_GND_R origin:101-dsp-pips 27_311
+DSP_R.DSP_1_D22.DSP_VCC_R origin:101-dsp-pips 26_310
+DSP_R.DSP_1_D23.DSP_GND_R origin:101-dsp-pips 27_314
+DSP_R.DSP_1_D23.DSP_VCC_R origin:101-dsp-pips 27_313
+DSP_R.DSP_1_D24.DSP_GND_R origin:101-dsp-pips 27_318
+DSP_R.DSP_1_D24.DSP_VCC_R origin:101-dsp-pips 27_315
+DSP_R.DSP_1_INMODE0.DSP_GND_R origin:101-dsp-pips 27_294
+DSP_R.DSP_1_INMODE0.DSP_VCC_R origin:101-dsp-pips 27_290
+DSP_R.DSP_1_INMODE1.DSP_GND_R origin:101-dsp-pips 26_293
+DSP_R.DSP_1_INMODE1.DSP_VCC_R origin:101-dsp-pips 27_305
+DSP_R.DSP_1_INMODE2.DSP_GND_R origin:101-dsp-pips 27_240
+DSP_R.DSP_1_INMODE2.DSP_VCC_R origin:101-dsp-pips 26_231
+DSP_R.DSP_1_INMODE3.DSP_GND_R origin:101-dsp-pips 27_239
+DSP_R.DSP_1_INMODE3.DSP_VCC_R origin:101-dsp-pips 26_230
+DSP_R.DSP_1_INMODE4.DSP_GND_R origin:101-dsp-pips 26_218
+DSP_R.DSP_1_INMODE4.DSP_VCC_R origin:101-dsp-pips 26_206
+DSP_R.DSP_1_OPMODE6.DSP_GND_R origin:101-dsp-pips 27_172
+DSP_R.DSP_1_OPMODE6.DSP_VCC_R origin:101-dsp-pips 27_180
 DSP_R.DSP48.DSP_0.A_INPUT[0] origin:100-dsp-mskpat 27_84
 DSP_R.DSP48.DSP_0.AREG_0 origin:100-dsp-mskpat 26_113 26_137 27_111
 DSP_R.DSP48.DSP_0.AREG_2 origin:100-dsp-mskpat 27_136

diff --git a/artix7/segbits_gtp_common.db b/artix7/segbits_gtp_common.db
index 57d5499..a872d54 100644
--- a/artix7/segbits_gtp_common.db
+++ b/artix7/segbits_gtp_common.db

@@ -1,3 +1,4 @@
+GTP_COMMON.ENABLE_DRP 24_1613 25_1613
 GTP_COMMON.IBUFDS_GTE2.CLKCM_CFG[0] 29_1581
 GTP_COMMON.IBUFDS_GTE2.CLKCM_CFG[1] 28_1582
 GTP_COMMON.IBUFDS_GTE2_Y0.CLKCM_CFG 28_1580
@@ -70,6 +71,7 @@
 GTP_COMMON.GTPE2.BIAS_CFG[61] 29_1670
 GTP_COMMON.GTPE2.BIAS_CFG[62] 28_1671
 GTP_COMMON.GTPE2.BIAS_CFG[63] 29_1671
+GTP_COMMON.GTPE2.BOTH_GTREFCLK_USED 29_1439 29_1807
 GTP_COMMON.GTPE2.COMMON_CFG[0] 28_1544
 GTP_COMMON.GTPE2.COMMON_CFG[1] 29_1544
 GTP_COMMON.GTPE2.COMMON_CFG[2] 28_1545
@@ -103,8 +105,6 @@
 GTP_COMMON.GTPE2.COMMON_CFG[30] 28_1559
 GTP_COMMON.GTPE2.COMMON_CFG[31] 29_1559
 GTP_COMMON.GTPE2.IN_USE 28_1584
-GTP_COMMON.GTPE2.INV_GTGREFCLK0 29_1516
-GTP_COMMON.GTPE2.INV_GTGREFCLK1 28_1514
 GTP_COMMON.GTPE2.PLL_CLKOUT_CFG[0] 28_1560
 GTP_COMMON.GTPE2.PLL_CLKOUT_CFG[1] 29_1560
 GTP_COMMON.GTPE2.PLL_CLKOUT_CFG[2] 28_1561
@@ -148,6 +148,8 @@
 GTP_COMMON.GTPE2.ZINV_DRPCLK 28_1516
 GTP_COMMON.GTPE2.ZINV_PLL0LOCKDETCLK 29_1512
 GTP_COMMON.GTPE2.ZINV_PLL1LOCKDETCLK 28_1512
+GTP_COMMON.GTPE2.GTREFCLK0_USED 28_1438 28_1806
+GTP_COMMON.GTPE2.GTREFCLK1_USED 29_1438 29_1806
 GTP_COMMON.GTPE2.PLL0_CFG[0] 28_1424
 GTP_COMMON.GTPE2.PLL0_CFG[1] 29_1424
 GTP_COMMON.GTPE2.PLL0_CFG[2] 28_1425

diff --git a/artix7/segbits_gtp_common.origin_info.db b/artix7/segbits_gtp_common.origin_info.db
index 13eb7b3..3a8bd76 100644
--- a/artix7/segbits_gtp_common.origin_info.db
+++ b/artix7/segbits_gtp_common.origin_info.db

@@ -1,3 +1,4 @@
+GTP_COMMON.ENABLE_DRP origin:063-gtp-common-conf 24_1613 25_1613
 GTP_COMMON.IBUFDS_GTE2.CLKCM_CFG[0] origin:063-gtp-common-conf 29_1581
 GTP_COMMON.IBUFDS_GTE2.CLKCM_CFG[1] origin:063-gtp-common-conf 28_1582
 GTP_COMMON.IBUFDS_GTE2_Y0.CLKCM_CFG origin:063-gtp-common-conf 28_1580
@@ -70,6 +71,7 @@
 GTP_COMMON.GTPE2.BIAS_CFG[61] origin:063-gtp-common-conf 29_1670
 GTP_COMMON.GTPE2.BIAS_CFG[62] origin:063-gtp-common-conf 28_1671
 GTP_COMMON.GTPE2.BIAS_CFG[63] origin:063-gtp-common-conf 29_1671
+GTP_COMMON.GTPE2.BOTH_GTREFCLK_USED origin:063-gtp-common-conf 29_1439 29_1807
 GTP_COMMON.GTPE2.COMMON_CFG[0] origin:063-gtp-common-conf 28_1544
 GTP_COMMON.GTPE2.COMMON_CFG[1] origin:063-gtp-common-conf 29_1544
 GTP_COMMON.GTPE2.COMMON_CFG[2] origin:063-gtp-common-conf 28_1545
@@ -103,8 +105,6 @@
 GTP_COMMON.GTPE2.COMMON_CFG[30] origin:063-gtp-common-conf 28_1559
 GTP_COMMON.GTPE2.COMMON_CFG[31] origin:063-gtp-common-conf 29_1559
 GTP_COMMON.GTPE2.IN_USE origin:063-gtp-common-conf 28_1584
-GTP_COMMON.GTPE2.INV_GTGREFCLK0 origin:063-gtp-common-conf 29_1516
-GTP_COMMON.GTPE2.INV_GTGREFCLK1 origin:063-gtp-common-conf 28_1514
 GTP_COMMON.GTPE2.PLL_CLKOUT_CFG[0] origin:063-gtp-common-conf 28_1560
 GTP_COMMON.GTPE2.PLL_CLKOUT_CFG[1] origin:063-gtp-common-conf 29_1560
 GTP_COMMON.GTPE2.PLL_CLKOUT_CFG[2] origin:063-gtp-common-conf 28_1561
@@ -148,6 +148,8 @@
 GTP_COMMON.GTPE2.ZINV_DRPCLK origin:063-gtp-common-conf 28_1516
 GTP_COMMON.GTPE2.ZINV_PLL0LOCKDETCLK origin:063-gtp-common-conf 29_1512
 GTP_COMMON.GTPE2.ZINV_PLL1LOCKDETCLK origin:063-gtp-common-conf 28_1512
+GTP_COMMON.GTPE2.GTREFCLK0_USED origin:063-gtp-common-conf 28_1438 28_1806
+GTP_COMMON.GTPE2.GTREFCLK1_USED origin:063-gtp-common-conf 29_1438 29_1806
 GTP_COMMON.GTPE2.PLL0_CFG[0] origin:063-gtp-common-conf 28_1424
 GTP_COMMON.GTPE2.PLL0_CFG[1] origin:063-gtp-common-conf 29_1424
 GTP_COMMON.GTPE2.PLL0_CFG[2] origin:063-gtp-common-conf 28_1425

diff --git a/artix7/segbits_gtp_common_mid_left.db b/artix7/segbits_gtp_common_mid_left.db
index e5712e7..6fcfe87 100644
--- a/artix7/segbits_gtp_common_mid_left.db
+++ b/artix7/segbits_gtp_common_mid_left.db

@@ -1,3 +1,172 @@
+GTP_COMMON_MID_LEFT.ENABLE_DRP 00_1613 01_1613
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.HCLK_GTP_CK_MUX0 02_1614 03_1617 03_1622
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.HCLK_GTP_CK_MUX1 02_1614 02_1622 03_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 02_1615 03_1617
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 02_1615 03_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_0 02_1615 03_1621
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_1 02_1615 03_1620
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_2 02_1614 03_1621
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_3 02_1614 03_1620
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_0 02_1615 03_1619
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_1 02_1615 03_1618
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_2 02_1614 03_1619
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_3 02_1614 03_1618
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.HCLK_GTP_CK_MUX0 02_1617 03_1614 03_1622
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.HCLK_GTP_CK_MUX1 02_1616 02_1622 03_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 02_1617 03_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 02_1616 03_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_0 02_1621 03_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_1 02_1620 03_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_2 02_1621 03_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_3 02_1620 03_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_0 02_1619 03_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_1 02_1618 03_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_2 02_1619 03_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_3 02_1618 03_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.HCLK_GTP_CK_MUX2 02_1624 03_1623 03_1627
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.HCLK_GTP_CK_MUX3 02_1623 02_1624 03_1626
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 02_1625 03_1627
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 02_1625 03_1626
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_0 02_1625 03_1631
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_1 02_1625 03_1630
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_2 02_1624 03_1631
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_3 02_1624 03_1630
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_0 02_1625 03_1629
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_1 02_1625 03_1628
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_2 02_1624 03_1629
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_3 02_1624 03_1628
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.HCLK_GTP_CK_MUX2 02_1627 03_1623 03_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.HCLK_GTP_CK_MUX3 02_1623 02_1626 03_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 02_1627 03_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 02_1626 03_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_0 02_1631 03_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_1 02_1630 03_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_2 02_1631 03_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_3 02_1630 03_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_0 02_1629 03_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_1 02_1628 03_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_2 02_1629 03_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_3 02_1628 03_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.HCLK_GTP_CK_MUX4 00_1614 01_1617 01_1622
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.HCLK_GTP_CK_MUX5 00_1614 00_1622 01_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 00_1615 01_1617
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 00_1615 01_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_0 00_1615 01_1621
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_1 00_1615 01_1620
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_2 00_1614 01_1621
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_3 00_1614 01_1620
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_0 00_1615 01_1619
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_1 00_1615 01_1618
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_2 00_1614 01_1619
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_3 00_1614 01_1618
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.HCLK_GTP_CK_MUX4 00_1617 01_1614 01_1622
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.HCLK_GTP_CK_MUX5 00_1616 00_1622 01_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 00_1617 01_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 00_1616 01_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_0 00_1621 01_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_1 00_1620 01_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_2 00_1621 01_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_3 00_1620 01_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_0 00_1619 01_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_1 00_1618 01_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_2 00_1619 01_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_3 00_1618 01_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.HCLK_GTP_CK_MUX6 00_1624 01_1623 01_1627
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.HCLK_GTP_CK_MUX7 00_1623 00_1624 01_1626
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 00_1625 01_1627
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 00_1625 01_1626
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_0 00_1625 01_1631
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_1 00_1625 01_1630
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_2 00_1624 01_1631
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_3 00_1624 01_1630
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_0 00_1625 01_1629
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_1 00_1625 01_1628
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_2 00_1624 01_1629
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_3 00_1624 01_1628
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.HCLK_GTP_CK_MUX6 00_1627 01_1623 01_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.HCLK_GTP_CK_MUX7 00_1623 00_1626 01_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 00_1627 01_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 00_1626 01_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_0 00_1631 01_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_1 00_1630 01_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_2 00_1631 01_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_3 00_1630 01_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_0 00_1629 01_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_1 00_1628 01_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_2 00_1629 01_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_3 00_1628 01_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.HCLK_GTP_CK_MUX8 04_1614 05_1617 05_1622
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.HCLK_GTP_CK_MUX9 04_1614 04_1622 05_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 04_1615 05_1617
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 04_1615 05_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_0 04_1615 05_1621
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_1 04_1615 05_1620
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_2 04_1614 05_1621
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_3 04_1614 05_1620
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_0 04_1615 05_1619
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_1 04_1615 05_1618
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_2 04_1614 05_1619
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_3 04_1614 05_1618
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.HCLK_GTP_CK_MUX8 04_1617 05_1614 05_1622
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.HCLK_GTP_CK_MUX9 04_1616 04_1622 05_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 04_1617 05_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 04_1616 05_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_0 04_1621 05_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_1 04_1620 05_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_2 04_1621 05_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_3 04_1620 05_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_0 04_1619 05_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_1 04_1618 05_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_2 04_1619 05_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_3 04_1618 05_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.HCLK_GTP_CK_MUX10 04_1624 05_1623 05_1627
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.HCLK_GTP_CK_MUX11 04_1623 04_1624 05_1626
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 04_1625 05_1627
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 04_1625 05_1626
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_0 04_1625 05_1631
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_1 04_1625 05_1630
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_2 04_1624 05_1631
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_3 04_1624 05_1630
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_0 04_1625 05_1629
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_1 04_1625 05_1628
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_2 04_1624 05_1629
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_3 04_1624 05_1628
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.HCLK_GTP_CK_MUX10 04_1627 05_1623 05_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.HCLK_GTP_CK_MUX11 04_1623 04_1626 05_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 04_1627 05_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 04_1626 05_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_0 04_1631 05_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_1 04_1630 05_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_2 04_1631 05_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_3 04_1630 05_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_0 04_1629 05_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_1 04_1628 05_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_2 04_1629 05_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_3 04_1628 05_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.HCLK_GTP_CK_MUX12 06_1616 07_1619 07_1626
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.HCLK_GTP_CK_MUX13 06_1616 06_1626 07_1618
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 06_1617 07_1619
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 06_1617 07_1618
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_0 06_1617 07_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_1 06_1617 07_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_2 06_1616 07_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_3 06_1616 07_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_0 06_1617 07_1623
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_1 06_1617 07_1622
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_2 06_1616 07_1623
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_3 06_1616 07_1622
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.HCLK_GTP_CK_MUX12 06_1619 07_1616 07_1626
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.HCLK_GTP_CK_MUX13 06_1618 06_1626 07_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 06_1619 07_1617
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 06_1618 07_1617
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_0 06_1625 07_1617
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_1 06_1624 07_1617
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_2 06_1625 07_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_3 06_1624 07_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_0 06_1623 07_1617
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_1 06_1620 07_1617
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_2 06_1623 07_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_3 06_1620 07_1616
 GTP_COMMON_MID_LEFT.IBUFDS_GTE2.CLKCM_CFG[0] 01_1581
 GTP_COMMON_MID_LEFT.IBUFDS_GTE2.CLKCM_CFG[1] 00_1582
 GTP_COMMON_MID_LEFT.IBUFDS_GTE2_Y0.CLKCM_CFG 00_1580
@@ -6,6 +175,8 @@
 GTP_COMMON_MID_LEFT.IBUFDS_GTE2_Y1.CLKCM_CFG 01_1580
 GTP_COMMON_MID_LEFT.IBUFDS_GTE2_Y1.CLKRCV_TRST 01_1576
 GTP_COMMON_MID_LEFT.IBUFDS_GTE2_Y1.IN_USE 00_1579
+GTP_COMMON_MID_LEFT.IBUFDS_GTPE2_0_MGTCLKOUT_MUX.IBUFDS_GTPE2_0_MGTCLKOUT 07_1629
+GTP_COMMON_MID_LEFT.IBUFDS_GTPE2_1_MGTCLKOUT_MUX.IBUFDS_GTPE2_1_MGTCLKOUT 06_1627
 GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[0] 00_1640
 GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[1] 01_1640
 GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[2] 00_1641
@@ -70,6 +241,7 @@
 GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[61] 01_1670
 GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[62] 00_1671
 GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[63] 01_1671
+GTP_COMMON_MID_LEFT.GTPE2.BOTH_GTREFCLK_USED 01_1439 01_1807
 GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[0] 00_1544
 GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[1] 01_1544
 GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[2] 00_1545
@@ -102,9 +274,15 @@
 GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[29] 01_1558
 GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[30] 00_1559
 GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[31] 01_1559
+GTP_COMMON_MID_LEFT.GTPE2_COMMON_RXOUTCLK_MUX_0.GTPE2_COMMON_RXOUTCLK_0 06_1628
+GTP_COMMON_MID_LEFT.GTPE2_COMMON_RXOUTCLK_MUX_1.GTPE2_COMMON_RXOUTCLK_1 07_1627
+GTP_COMMON_MID_LEFT.GTPE2_COMMON_RXOUTCLK_MUX_2.GTPE2_COMMON_RXOUTCLK_2 07_1630
+GTP_COMMON_MID_LEFT.GTPE2_COMMON_RXOUTCLK_MUX_3.GTPE2_COMMON_RXOUTCLK_3 06_1630
+GTP_COMMON_MID_LEFT.GTPE2_COMMON_TXOUTCLK_MUX_0.GTPE2_COMMON_TXOUTCLK_0 06_1629
+GTP_COMMON_MID_LEFT.GTPE2_COMMON_TXOUTCLK_MUX_1.GTPE2_COMMON_TXOUTCLK_1 07_1628
+GTP_COMMON_MID_LEFT.GTPE2_COMMON_TXOUTCLK_MUX_2.GTPE2_COMMON_TXOUTCLK_2 07_1631
+GTP_COMMON_MID_LEFT.GTPE2_COMMON_TXOUTCLK_MUX_3.GTPE2_COMMON_TXOUTCLK_3 06_1631
 GTP_COMMON_MID_LEFT.GTPE2.IN_USE 00_1584
-GTP_COMMON_MID_LEFT.GTPE2.INV_GTGREFCLK0 01_1516
-GTP_COMMON_MID_LEFT.GTPE2.INV_GTGREFCLK1 00_1514
 GTP_COMMON_MID_LEFT.GTPE2.PLL_CLKOUT_CFG[0] 00_1560
 GTP_COMMON_MID_LEFT.GTPE2.PLL_CLKOUT_CFG[1] 01_1560
 GTP_COMMON_MID_LEFT.GTPE2.PLL_CLKOUT_CFG[2] 00_1561
@@ -148,6 +326,8 @@
 GTP_COMMON_MID_LEFT.GTPE2.ZINV_DRPCLK 00_1516
 GTP_COMMON_MID_LEFT.GTPE2.ZINV_PLL0LOCKDETCLK 01_1512
 GTP_COMMON_MID_LEFT.GTPE2.ZINV_PLL1LOCKDETCLK 00_1512
+GTP_COMMON_MID_LEFT.GTPE2.GTREFCLK0_USED 00_1438 00_1806
+GTP_COMMON_MID_LEFT.GTPE2.GTREFCLK1_USED 01_1438 01_1806
 GTP_COMMON_MID_LEFT.GTPE2.PLL0_CFG[0] 00_1424
 GTP_COMMON_MID_LEFT.GTPE2.PLL0_CFG[1] 01_1424
 GTP_COMMON_MID_LEFT.GTPE2.PLL0_CFG[2] 00_1425

diff --git a/artix7/segbits_gtp_common_mid_left.origin_info.db b/artix7/segbits_gtp_common_mid_left.origin_info.db
index d7831a3..ed63878 100644
--- a/artix7/segbits_gtp_common_mid_left.origin_info.db
+++ b/artix7/segbits_gtp_common_mid_left.origin_info.db

@@ -1,3 +1,172 @@
+GTP_COMMON_MID_LEFT.ENABLE_DRP origin:063-gtp-common-conf 00_1613 01_1613
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.HCLK_GTP_CK_MUX0 origin:065b-gtp-common-pips 02_1614 03_1617 03_1622
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.HCLK_GTP_CK_MUX1 origin:065b-gtp-common-pips 02_1614 02_1622 03_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1615 03_1617
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1615 03_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1615 03_1621
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1615 03_1620
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1614 03_1621
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1614 03_1620
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1615 03_1619
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1615 03_1618
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1614 03_1619
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1614 03_1618
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.HCLK_GTP_CK_MUX0 origin:065b-gtp-common-pips 02_1617 03_1614 03_1622
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.HCLK_GTP_CK_MUX1 origin:065b-gtp-common-pips 02_1616 02_1622 03_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1617 03_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1616 03_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1621 03_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1620 03_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1621 03_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1620 03_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1619 03_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1618 03_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1619 03_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1618 03_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.HCLK_GTP_CK_MUX2 origin:065b-gtp-common-pips 02_1624 03_1623 03_1627
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.HCLK_GTP_CK_MUX3 origin:065b-gtp-common-pips 02_1623 02_1624 03_1626
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1625 03_1627
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1625 03_1626
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1625 03_1631
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1625 03_1630
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1624 03_1631
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1624 03_1630
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1625 03_1629
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1625 03_1628
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1624 03_1629
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1624 03_1628
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.HCLK_GTP_CK_MUX2 origin:065b-gtp-common-pips 02_1627 03_1623 03_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.HCLK_GTP_CK_MUX3 origin:065b-gtp-common-pips 02_1623 02_1626 03_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1627 03_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1626 03_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1631 03_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1630 03_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1631 03_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1630 03_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1629 03_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1628 03_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1629 03_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1628 03_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.HCLK_GTP_CK_MUX4 origin:065b-gtp-common-pips 00_1614 01_1617 01_1622
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.HCLK_GTP_CK_MUX5 origin:065b-gtp-common-pips 00_1614 00_1622 01_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1615 01_1617
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1615 01_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1615 01_1621
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1615 01_1620
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1614 01_1621
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1614 01_1620
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1615 01_1619
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1615 01_1618
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1614 01_1619
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1614 01_1618
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.HCLK_GTP_CK_MUX4 origin:065b-gtp-common-pips 00_1617 01_1614 01_1622
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.HCLK_GTP_CK_MUX5 origin:065b-gtp-common-pips 00_1616 00_1622 01_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1617 01_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1616 01_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1621 01_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1620 01_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1621 01_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1620 01_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1619 01_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1618 01_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1619 01_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1618 01_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.HCLK_GTP_CK_MUX6 origin:065b-gtp-common-pips 00_1624 01_1623 01_1627
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.HCLK_GTP_CK_MUX7 origin:065b-gtp-common-pips 00_1623 00_1624 01_1626
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1625 01_1627
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1625 01_1626
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1625 01_1631
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1625 01_1630
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1624 01_1631
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1624 01_1630
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1625 01_1629
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1625 01_1628
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1624 01_1629
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1624 01_1628
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.HCLK_GTP_CK_MUX6 origin:065b-gtp-common-pips 00_1627 01_1623 01_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.HCLK_GTP_CK_MUX7 origin:065b-gtp-common-pips 00_1623 00_1626 01_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1627 01_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1626 01_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1631 01_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1630 01_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1631 01_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1630 01_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1629 01_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1628 01_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1629 01_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1628 01_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.HCLK_GTP_CK_MUX8 origin:065b-gtp-common-pips 04_1614 05_1617 05_1622
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.HCLK_GTP_CK_MUX9 origin:065b-gtp-common-pips 04_1614 04_1622 05_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1615 05_1617
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1615 05_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1615 05_1621
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1615 05_1620
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1614 05_1621
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1614 05_1620
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1615 05_1619
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1615 05_1618
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1614 05_1619
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1614 05_1618
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.HCLK_GTP_CK_MUX8 origin:065b-gtp-common-pips 04_1617 05_1614 05_1622
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.HCLK_GTP_CK_MUX9 origin:065b-gtp-common-pips 04_1616 04_1622 05_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1617 05_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1616 05_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1621 05_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1620 05_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1621 05_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1620 05_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1619 05_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1618 05_1615
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1619 05_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1618 05_1614
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.HCLK_GTP_CK_MUX10 origin:065b-gtp-common-pips 04_1624 05_1623 05_1627
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.HCLK_GTP_CK_MUX11 origin:065b-gtp-common-pips 04_1623 04_1624 05_1626
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1625 05_1627
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1625 05_1626
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1625 05_1631
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1625 05_1630
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1624 05_1631
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1624 05_1630
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1625 05_1629
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1625 05_1628
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1624 05_1629
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1624 05_1628
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.HCLK_GTP_CK_MUX10 origin:065b-gtp-common-pips 04_1627 05_1623 05_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.HCLK_GTP_CK_MUX11 origin:065b-gtp-common-pips 04_1623 04_1626 05_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1627 05_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1626 05_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1631 05_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1630 05_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1631 05_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1630 05_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1629 05_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1628 05_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1629 05_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1628 05_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.HCLK_GTP_CK_MUX12 origin:065b-gtp-common-pips 06_1616 07_1619 07_1626
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.HCLK_GTP_CK_MUX13 origin:065b-gtp-common-pips 06_1616 06_1626 07_1618
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 06_1617 07_1619
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 06_1617 07_1618
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 06_1617 07_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 06_1617 07_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 06_1616 07_1625
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 06_1616 07_1624
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 06_1617 07_1623
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 06_1617 07_1622
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 06_1616 07_1623
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 06_1616 07_1622
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.HCLK_GTP_CK_MUX12 origin:065b-gtp-common-pips 06_1619 07_1616 07_1626
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.HCLK_GTP_CK_MUX13 origin:065b-gtp-common-pips 06_1618 06_1626 07_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 06_1619 07_1617
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 06_1618 07_1617
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 06_1625 07_1617
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 06_1624 07_1617
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 06_1625 07_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 06_1624 07_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 06_1623 07_1617
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 06_1620 07_1617
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 06_1623 07_1616
+GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 06_1620 07_1616
 GTP_COMMON_MID_LEFT.IBUFDS_GTE2.CLKCM_CFG[0] origin:063-gtp-common-conf 01_1581
 GTP_COMMON_MID_LEFT.IBUFDS_GTE2.CLKCM_CFG[1] origin:063-gtp-common-conf 00_1582
 GTP_COMMON_MID_LEFT.IBUFDS_GTE2_Y0.CLKCM_CFG origin:063-gtp-common-conf 00_1580
@@ -6,6 +175,8 @@
 GTP_COMMON_MID_LEFT.IBUFDS_GTE2_Y1.CLKCM_CFG origin:063-gtp-common-conf 01_1580
 GTP_COMMON_MID_LEFT.IBUFDS_GTE2_Y1.CLKRCV_TRST origin:063-gtp-common-conf 01_1576
 GTP_COMMON_MID_LEFT.IBUFDS_GTE2_Y1.IN_USE origin:063-gtp-common-conf 00_1579
+GTP_COMMON_MID_LEFT.IBUFDS_GTPE2_0_MGTCLKOUT_MUX.IBUFDS_GTPE2_0_MGTCLKOUT origin:065-gtp-common-pips 07_1629
+GTP_COMMON_MID_LEFT.IBUFDS_GTPE2_1_MGTCLKOUT_MUX.IBUFDS_GTPE2_1_MGTCLKOUT origin:065-gtp-common-pips 06_1627
 GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[0] origin:063-gtp-common-conf 00_1640
 GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[1] origin:063-gtp-common-conf 01_1640
 GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[2] origin:063-gtp-common-conf 00_1641
@@ -70,6 +241,7 @@
 GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[61] origin:063-gtp-common-conf 01_1670
 GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[62] origin:063-gtp-common-conf 00_1671
 GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[63] origin:063-gtp-common-conf 01_1671
+GTP_COMMON_MID_LEFT.GTPE2.BOTH_GTREFCLK_USED origin:063-gtp-common-conf 01_1439 01_1807
 GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[0] origin:063-gtp-common-conf 00_1544
 GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[1] origin:063-gtp-common-conf 01_1544
 GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[2] origin:063-gtp-common-conf 00_1545
@@ -102,9 +274,15 @@
 GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[29] origin:063-gtp-common-conf 01_1558
 GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[30] origin:063-gtp-common-conf 00_1559
 GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[31] origin:063-gtp-common-conf 01_1559
+GTP_COMMON_MID_LEFT.GTPE2_COMMON_RXOUTCLK_MUX_0.GTPE2_COMMON_RXOUTCLK_0 origin:065-gtp-common-pips 06_1628
+GTP_COMMON_MID_LEFT.GTPE2_COMMON_RXOUTCLK_MUX_1.GTPE2_COMMON_RXOUTCLK_1 origin:065-gtp-common-pips 07_1627
+GTP_COMMON_MID_LEFT.GTPE2_COMMON_RXOUTCLK_MUX_2.GTPE2_COMMON_RXOUTCLK_2 origin:065-gtp-common-pips 07_1630
+GTP_COMMON_MID_LEFT.GTPE2_COMMON_RXOUTCLK_MUX_3.GTPE2_COMMON_RXOUTCLK_3 origin:065-gtp-common-pips 06_1630
+GTP_COMMON_MID_LEFT.GTPE2_COMMON_TXOUTCLK_MUX_0.GTPE2_COMMON_TXOUTCLK_0 origin:065-gtp-common-pips 06_1629
+GTP_COMMON_MID_LEFT.GTPE2_COMMON_TXOUTCLK_MUX_1.GTPE2_COMMON_TXOUTCLK_1 origin:065-gtp-common-pips 07_1628
+GTP_COMMON_MID_LEFT.GTPE2_COMMON_TXOUTCLK_MUX_2.GTPE2_COMMON_TXOUTCLK_2 origin:065-gtp-common-pips 07_1631
+GTP_COMMON_MID_LEFT.GTPE2_COMMON_TXOUTCLK_MUX_3.GTPE2_COMMON_TXOUTCLK_3 origin:065-gtp-common-pips 06_1631
 GTP_COMMON_MID_LEFT.GTPE2.IN_USE origin:063-gtp-common-conf 00_1584
-GTP_COMMON_MID_LEFT.GTPE2.INV_GTGREFCLK0 origin:063-gtp-common-conf 01_1516
-GTP_COMMON_MID_LEFT.GTPE2.INV_GTGREFCLK1 origin:063-gtp-common-conf 00_1514
 GTP_COMMON_MID_LEFT.GTPE2.PLL_CLKOUT_CFG[0] origin:063-gtp-common-conf 00_1560
 GTP_COMMON_MID_LEFT.GTPE2.PLL_CLKOUT_CFG[1] origin:063-gtp-common-conf 01_1560
 GTP_COMMON_MID_LEFT.GTPE2.PLL_CLKOUT_CFG[2] origin:063-gtp-common-conf 00_1561
@@ -148,6 +326,8 @@
 GTP_COMMON_MID_LEFT.GTPE2.ZINV_DRPCLK origin:063-gtp-common-conf 00_1516
 GTP_COMMON_MID_LEFT.GTPE2.ZINV_PLL0LOCKDETCLK origin:063-gtp-common-conf 01_1512
 GTP_COMMON_MID_LEFT.GTPE2.ZINV_PLL1LOCKDETCLK origin:063-gtp-common-conf 00_1512
+GTP_COMMON_MID_LEFT.GTPE2.GTREFCLK0_USED origin:063-gtp-common-conf 00_1438 00_1806
+GTP_COMMON_MID_LEFT.GTPE2.GTREFCLK1_USED origin:063-gtp-common-conf 01_1438 01_1806
 GTP_COMMON_MID_LEFT.GTPE2.PLL0_CFG[0] origin:063-gtp-common-conf 00_1424
 GTP_COMMON_MID_LEFT.GTPE2.PLL0_CFG[1] origin:063-gtp-common-conf 01_1424
 GTP_COMMON_MID_LEFT.GTPE2.PLL0_CFG[2] origin:063-gtp-common-conf 00_1425

diff --git a/artix7/segbits_gtp_common_mid_right.db b/artix7/segbits_gtp_common_mid_right.db
index 120214c..9c70cff 100644
--- a/artix7/segbits_gtp_common_mid_right.db
+++ b/artix7/segbits_gtp_common_mid_right.db

@@ -1,3 +1,172 @@
+GTP_COMMON_MID_RIGHT.ENABLE_DRP 00_1613 01_1613
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.HCLK_GTP_CK_MUX0 02_1614 03_1617 03_1622
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.HCLK_GTP_CK_MUX1 02_1614 02_1622 03_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 02_1615 03_1617
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 02_1615 03_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_0 02_1615 03_1621
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_1 02_1615 03_1620
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_2 02_1614 03_1621
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_3 02_1614 03_1620
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_0 02_1615 03_1619
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_1 02_1615 03_1618
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_2 02_1614 03_1619
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_3 02_1614 03_1618
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.HCLK_GTP_CK_MUX0 02_1617 03_1614 03_1622
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.HCLK_GTP_CK_MUX1 02_1616 02_1622 03_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 02_1617 03_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 02_1616 03_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_0 02_1621 03_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_1 02_1620 03_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_2 02_1621 03_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_3 02_1620 03_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_0 02_1619 03_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_1 02_1618 03_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_2 02_1619 03_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_3 02_1618 03_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.HCLK_GTP_CK_MUX2 02_1624 03_1623 03_1627
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.HCLK_GTP_CK_MUX3 02_1623 02_1624 03_1626
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 02_1625 03_1627
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 02_1625 03_1626
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_0 02_1625 03_1631
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_1 02_1625 03_1630
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_2 02_1624 03_1631
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_3 02_1624 03_1630
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_0 02_1625 03_1629
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_1 02_1625 03_1628
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_2 02_1624 03_1629
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_3 02_1624 03_1628
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.HCLK_GTP_CK_MUX2 02_1627 03_1623 03_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.HCLK_GTP_CK_MUX3 02_1623 02_1626 03_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 02_1627 03_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 02_1626 03_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_0 02_1631 03_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_1 02_1630 03_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_2 02_1631 03_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_3 02_1630 03_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_0 02_1629 03_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_1 02_1628 03_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_2 02_1629 03_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_3 02_1628 03_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.HCLK_GTP_CK_MUX4 00_1614 01_1617 01_1622
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.HCLK_GTP_CK_MUX5 00_1614 00_1622 01_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 00_1615 01_1617
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 00_1615 01_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_0 00_1615 01_1621
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_1 00_1615 01_1620
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_2 00_1614 01_1621
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_3 00_1614 01_1620
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_0 00_1615 01_1619
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_1 00_1615 01_1618
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_2 00_1614 01_1619
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_3 00_1614 01_1618
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.HCLK_GTP_CK_MUX4 00_1617 01_1614 01_1622
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.HCLK_GTP_CK_MUX5 00_1616 00_1622 01_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 00_1617 01_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 00_1616 01_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_0 00_1621 01_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_1 00_1620 01_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_2 00_1621 01_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_3 00_1620 01_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_0 00_1619 01_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_1 00_1618 01_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_2 00_1619 01_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_3 00_1618 01_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.HCLK_GTP_CK_MUX6 00_1624 01_1623 01_1627
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.HCLK_GTP_CK_MUX7 00_1623 00_1624 01_1626
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 00_1625 01_1627
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 00_1625 01_1626
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_0 00_1625 01_1631
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_1 00_1625 01_1630
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_2 00_1624 01_1631
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_3 00_1624 01_1630
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_0 00_1625 01_1629
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_1 00_1625 01_1628
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_2 00_1624 01_1629
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_3 00_1624 01_1628
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.HCLK_GTP_CK_MUX6 00_1627 01_1623 01_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.HCLK_GTP_CK_MUX7 00_1623 00_1626 01_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 00_1627 01_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 00_1626 01_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_0 00_1631 01_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_1 00_1630 01_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_2 00_1631 01_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_3 00_1630 01_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_0 00_1629 01_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_1 00_1628 01_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_2 00_1629 01_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_3 00_1628 01_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.HCLK_GTP_CK_MUX8 04_1614 05_1617 05_1622
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.HCLK_GTP_CK_MUX9 04_1614 04_1622 05_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 04_1615 05_1617
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 04_1615 05_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_0 04_1615 05_1621
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_1 04_1615 05_1620
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_2 04_1614 05_1621
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_3 04_1614 05_1620
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_0 04_1615 05_1619
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_1 04_1615 05_1618
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_2 04_1614 05_1619
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_3 04_1614 05_1618
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.HCLK_GTP_CK_MUX8 04_1617 05_1614 05_1622
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.HCLK_GTP_CK_MUX9 04_1616 04_1622 05_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 04_1617 05_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 04_1616 05_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_0 04_1621 05_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_1 04_1620 05_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_2 04_1621 05_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_3 04_1620 05_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_0 04_1619 05_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_1 04_1618 05_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_2 04_1619 05_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_3 04_1618 05_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.HCLK_GTP_CK_MUX10 04_1624 05_1623 05_1627
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.HCLK_GTP_CK_MUX11 04_1623 04_1624 05_1626
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 04_1625 05_1627
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 04_1625 05_1626
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_0 04_1625 05_1631
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_1 04_1625 05_1630
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_2 04_1624 05_1631
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_3 04_1624 05_1630
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_0 04_1625 05_1629
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_1 04_1625 05_1628
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_2 04_1624 05_1629
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_3 04_1624 05_1628
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.HCLK_GTP_CK_MUX10 04_1627 05_1623 05_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.HCLK_GTP_CK_MUX11 04_1623 04_1626 05_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 04_1627 05_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 04_1626 05_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_0 04_1631 05_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_1 04_1630 05_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_2 04_1631 05_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_3 04_1630 05_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_0 04_1629 05_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_1 04_1628 05_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_2 04_1629 05_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_3 04_1628 05_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.HCLK_GTP_CK_MUX12 06_1616 07_1619 07_1626
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.HCLK_GTP_CK_MUX13 06_1616 06_1626 07_1618
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 06_1617 07_1619
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 06_1617 07_1618
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_0 06_1617 07_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_1 06_1617 07_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_2 06_1616 07_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_3 06_1616 07_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_0 06_1617 07_1623
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_1 06_1617 07_1622
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_2 06_1616 07_1623
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_3 06_1616 07_1622
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.HCLK_GTP_CK_MUX12 06_1619 07_1616 07_1626
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.HCLK_GTP_CK_MUX13 06_1618 06_1626 07_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 06_1619 07_1617
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 06_1618 07_1617
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_0 06_1625 07_1617
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_1 06_1624 07_1617
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_2 06_1625 07_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_3 06_1624 07_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_0 06_1623 07_1617
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_1 06_1620 07_1617
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_2 06_1623 07_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_3 06_1620 07_1616
 GTP_COMMON_MID_RIGHT.IBUFDS_GTE2.CLKCM_CFG[0] 01_1581
 GTP_COMMON_MID_RIGHT.IBUFDS_GTE2.CLKCM_CFG[1] 00_1582
 GTP_COMMON_MID_RIGHT.IBUFDS_GTE2_Y0.CLKCM_CFG 00_1580
@@ -6,6 +175,8 @@
 GTP_COMMON_MID_RIGHT.IBUFDS_GTE2_Y1.CLKCM_CFG 01_1580
 GTP_COMMON_MID_RIGHT.IBUFDS_GTE2_Y1.CLKRCV_TRST 01_1576
 GTP_COMMON_MID_RIGHT.IBUFDS_GTE2_Y1.IN_USE 00_1579
+GTP_COMMON_MID_RIGHT.IBUFDS_GTPE2_0_MGTCLKOUT_MUX.IBUFDS_GTPE2_0_MGTCLKOUT 07_1629
+GTP_COMMON_MID_RIGHT.IBUFDS_GTPE2_1_MGTCLKOUT_MUX.IBUFDS_GTPE2_1_MGTCLKOUT 06_1627
 GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[0] 00_1640
 GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[1] 01_1640
 GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[2] 00_1641
@@ -70,6 +241,7 @@
 GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[61] 01_1670
 GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[62] 00_1671
 GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[63] 01_1671
+GTP_COMMON_MID_RIGHT.GTPE2.BOTH_GTREFCLK_USED 01_1439 01_1807
 GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[0] 00_1544
 GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[1] 01_1544
 GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[2] 00_1545
@@ -102,9 +274,15 @@
 GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[29] 01_1558
 GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[30] 00_1559
 GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[31] 01_1559
+GTP_COMMON_MID_RIGHT.GTPE2_COMMON_RXOUTCLK_MUX_0.GTPE2_COMMON_RXOUTCLK_0 06_1628
+GTP_COMMON_MID_RIGHT.GTPE2_COMMON_RXOUTCLK_MUX_1.GTPE2_COMMON_RXOUTCLK_1 07_1627
+GTP_COMMON_MID_RIGHT.GTPE2_COMMON_RXOUTCLK_MUX_2.GTPE2_COMMON_RXOUTCLK_2 07_1630
+GTP_COMMON_MID_RIGHT.GTPE2_COMMON_RXOUTCLK_MUX_3.GTPE2_COMMON_RXOUTCLK_3 06_1630
+GTP_COMMON_MID_RIGHT.GTPE2_COMMON_TXOUTCLK_MUX_0.GTPE2_COMMON_TXOUTCLK_0 06_1629
+GTP_COMMON_MID_RIGHT.GTPE2_COMMON_TXOUTCLK_MUX_1.GTPE2_COMMON_TXOUTCLK_1 07_1628
+GTP_COMMON_MID_RIGHT.GTPE2_COMMON_TXOUTCLK_MUX_2.GTPE2_COMMON_TXOUTCLK_2 07_1631
+GTP_COMMON_MID_RIGHT.GTPE2_COMMON_TXOUTCLK_MUX_3.GTPE2_COMMON_TXOUTCLK_3 06_1631
 GTP_COMMON_MID_RIGHT.GTPE2.IN_USE 00_1584
-GTP_COMMON_MID_RIGHT.GTPE2.INV_GTGREFCLK0 01_1516
-GTP_COMMON_MID_RIGHT.GTPE2.INV_GTGREFCLK1 00_1514
 GTP_COMMON_MID_RIGHT.GTPE2.PLL_CLKOUT_CFG[0] 00_1560
 GTP_COMMON_MID_RIGHT.GTPE2.PLL_CLKOUT_CFG[1] 01_1560
 GTP_COMMON_MID_RIGHT.GTPE2.PLL_CLKOUT_CFG[2] 00_1561
@@ -148,6 +326,8 @@
 GTP_COMMON_MID_RIGHT.GTPE2.ZINV_DRPCLK 00_1516
 GTP_COMMON_MID_RIGHT.GTPE2.ZINV_PLL0LOCKDETCLK 01_1512
 GTP_COMMON_MID_RIGHT.GTPE2.ZINV_PLL1LOCKDETCLK 00_1512
+GTP_COMMON_MID_RIGHT.GTPE2.GTREFCLK0_USED 00_1438 00_1806
+GTP_COMMON_MID_RIGHT.GTPE2.GTREFCLK1_USED 01_1438 01_1806
 GTP_COMMON_MID_RIGHT.GTPE2.PLL0_CFG[0] 00_1424
 GTP_COMMON_MID_RIGHT.GTPE2.PLL0_CFG[1] 01_1424
 GTP_COMMON_MID_RIGHT.GTPE2.PLL0_CFG[2] 00_1425

diff --git a/artix7/segbits_gtp_common_mid_right.origin_info.db b/artix7/segbits_gtp_common_mid_right.origin_info.db
index 3a0f6be..d4f434c 100644
--- a/artix7/segbits_gtp_common_mid_right.origin_info.db
+++ b/artix7/segbits_gtp_common_mid_right.origin_info.db

@@ -1,3 +1,172 @@
+GTP_COMMON_MID_RIGHT.ENABLE_DRP origin:063-gtp-common-conf 00_1613 01_1613
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.HCLK_GTP_CK_MUX0 origin:065b-gtp-common-pips 02_1614 03_1617 03_1622
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.HCLK_GTP_CK_MUX1 origin:065b-gtp-common-pips 02_1614 02_1622 03_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1615 03_1617
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1615 03_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1615 03_1621
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1615 03_1620
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1614 03_1621
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1614 03_1620
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1615 03_1619
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1615 03_1618
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1614 03_1619
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1614 03_1618
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.HCLK_GTP_CK_MUX0 origin:065b-gtp-common-pips 02_1617 03_1614 03_1622
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.HCLK_GTP_CK_MUX1 origin:065b-gtp-common-pips 02_1616 02_1622 03_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1617 03_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1616 03_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1621 03_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1620 03_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1621 03_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1620 03_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1619 03_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1618 03_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1619 03_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1618 03_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.HCLK_GTP_CK_MUX2 origin:065b-gtp-common-pips 02_1624 03_1623 03_1627
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.HCLK_GTP_CK_MUX3 origin:065b-gtp-common-pips 02_1623 02_1624 03_1626
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1625 03_1627
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1625 03_1626
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1625 03_1631
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1625 03_1630
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1624 03_1631
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1624 03_1630
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1625 03_1629
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1625 03_1628
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1624 03_1629
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1624 03_1628
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.HCLK_GTP_CK_MUX2 origin:065b-gtp-common-pips 02_1627 03_1623 03_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.HCLK_GTP_CK_MUX3 origin:065b-gtp-common-pips 02_1623 02_1626 03_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1627 03_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1626 03_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1631 03_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1630 03_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1631 03_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1630 03_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1629 03_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1628 03_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1629 03_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1628 03_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.HCLK_GTP_CK_MUX4 origin:065b-gtp-common-pips 00_1614 01_1617 01_1622
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.HCLK_GTP_CK_MUX5 origin:065b-gtp-common-pips 00_1614 00_1622 01_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1615 01_1617
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1615 01_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1615 01_1621
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1615 01_1620
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1614 01_1621
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1614 01_1620
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1615 01_1619
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1615 01_1618
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1614 01_1619
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1614 01_1618
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.HCLK_GTP_CK_MUX4 origin:065b-gtp-common-pips 00_1617 01_1614 01_1622
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.HCLK_GTP_CK_MUX5 origin:065b-gtp-common-pips 00_1616 00_1622 01_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1617 01_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1616 01_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1621 01_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1620 01_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1621 01_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1620 01_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1619 01_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1618 01_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1619 01_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1618 01_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.HCLK_GTP_CK_MUX6 origin:065b-gtp-common-pips 00_1624 01_1623 01_1627
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.HCLK_GTP_CK_MUX7 origin:065b-gtp-common-pips 00_1623 00_1624 01_1626
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1625 01_1627
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1625 01_1626
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1625 01_1631
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1625 01_1630
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1624 01_1631
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1624 01_1630
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1625 01_1629
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1625 01_1628
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1624 01_1629
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1624 01_1628
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.HCLK_GTP_CK_MUX6 origin:065b-gtp-common-pips 00_1627 01_1623 01_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.HCLK_GTP_CK_MUX7 origin:065b-gtp-common-pips 00_1623 00_1626 01_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1627 01_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1626 01_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1631 01_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1630 01_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1631 01_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1630 01_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1629 01_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1628 01_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1629 01_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1628 01_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.HCLK_GTP_CK_MUX8 origin:065b-gtp-common-pips 04_1614 05_1617 05_1622
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.HCLK_GTP_CK_MUX9 origin:065b-gtp-common-pips 04_1614 04_1622 05_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1615 05_1617
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1615 05_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1615 05_1621
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1615 05_1620
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1614 05_1621
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1614 05_1620
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1615 05_1619
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1615 05_1618
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1614 05_1619
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1614 05_1618
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.HCLK_GTP_CK_MUX8 origin:065b-gtp-common-pips 04_1617 05_1614 05_1622
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.HCLK_GTP_CK_MUX9 origin:065b-gtp-common-pips 04_1616 04_1622 05_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1617 05_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1616 05_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1621 05_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1620 05_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1621 05_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1620 05_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1619 05_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1618 05_1615
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1619 05_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1618 05_1614
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.HCLK_GTP_CK_MUX10 origin:065b-gtp-common-pips 04_1624 05_1623 05_1627
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.HCLK_GTP_CK_MUX11 origin:065b-gtp-common-pips 04_1623 04_1624 05_1626
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1625 05_1627
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1625 05_1626
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1625 05_1631
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1625 05_1630
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1624 05_1631
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1624 05_1630
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1625 05_1629
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1625 05_1628
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1624 05_1629
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1624 05_1628
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.HCLK_GTP_CK_MUX10 origin:065b-gtp-common-pips 04_1627 05_1623 05_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.HCLK_GTP_CK_MUX11 origin:065b-gtp-common-pips 04_1623 04_1626 05_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1627 05_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1626 05_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1631 05_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1630 05_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1631 05_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1630 05_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1629 05_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1628 05_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1629 05_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1628 05_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.HCLK_GTP_CK_MUX12 origin:065b-gtp-common-pips 06_1616 07_1619 07_1626
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.HCLK_GTP_CK_MUX13 origin:065b-gtp-common-pips 06_1616 06_1626 07_1618
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 06_1617 07_1619
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 06_1617 07_1618
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 06_1617 07_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 06_1617 07_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 06_1616 07_1625
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 06_1616 07_1624
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 06_1617 07_1623
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 06_1617 07_1622
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 06_1616 07_1623
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 06_1616 07_1622
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.HCLK_GTP_CK_MUX12 origin:065b-gtp-common-pips 06_1619 07_1616 07_1626
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.HCLK_GTP_CK_MUX13 origin:065b-gtp-common-pips 06_1618 06_1626 07_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 06_1619 07_1617
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 06_1618 07_1617
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 06_1625 07_1617
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 06_1624 07_1617
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 06_1625 07_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 06_1624 07_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 06_1623 07_1617
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 06_1620 07_1617
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 06_1623 07_1616
+GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 06_1620 07_1616
 GTP_COMMON_MID_RIGHT.IBUFDS_GTE2.CLKCM_CFG[0] origin:063-gtp-common-conf 01_1581
 GTP_COMMON_MID_RIGHT.IBUFDS_GTE2.CLKCM_CFG[1] origin:063-gtp-common-conf 00_1582
 GTP_COMMON_MID_RIGHT.IBUFDS_GTE2_Y0.CLKCM_CFG origin:063-gtp-common-conf 00_1580
@@ -6,6 +175,8 @@
 GTP_COMMON_MID_RIGHT.IBUFDS_GTE2_Y1.CLKCM_CFG origin:063-gtp-common-conf 01_1580
 GTP_COMMON_MID_RIGHT.IBUFDS_GTE2_Y1.CLKRCV_TRST origin:063-gtp-common-conf 01_1576
 GTP_COMMON_MID_RIGHT.IBUFDS_GTE2_Y1.IN_USE origin:063-gtp-common-conf 00_1579
+GTP_COMMON_MID_RIGHT.IBUFDS_GTPE2_0_MGTCLKOUT_MUX.IBUFDS_GTPE2_0_MGTCLKOUT origin:065-gtp-common-pips 07_1629
+GTP_COMMON_MID_RIGHT.IBUFDS_GTPE2_1_MGTCLKOUT_MUX.IBUFDS_GTPE2_1_MGTCLKOUT origin:065-gtp-common-pips 06_1627
 GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[0] origin:063-gtp-common-conf 00_1640
 GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[1] origin:063-gtp-common-conf 01_1640
 GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[2] origin:063-gtp-common-conf 00_1641
@@ -70,6 +241,7 @@
 GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[61] origin:063-gtp-common-conf 01_1670
 GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[62] origin:063-gtp-common-conf 00_1671
 GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[63] origin:063-gtp-common-conf 01_1671
+GTP_COMMON_MID_RIGHT.GTPE2.BOTH_GTREFCLK_USED origin:063-gtp-common-conf 01_1439 01_1807
 GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[0] origin:063-gtp-common-conf 00_1544
 GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[1] origin:063-gtp-common-conf 01_1544
 GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[2] origin:063-gtp-common-conf 00_1545
@@ -102,9 +274,15 @@
 GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[29] origin:063-gtp-common-conf 01_1558
 GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[30] origin:063-gtp-common-conf 00_1559
 GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[31] origin:063-gtp-common-conf 01_1559
+GTP_COMMON_MID_RIGHT.GTPE2_COMMON_RXOUTCLK_MUX_0.GTPE2_COMMON_RXOUTCLK_0 origin:065-gtp-common-pips 06_1628
+GTP_COMMON_MID_RIGHT.GTPE2_COMMON_RXOUTCLK_MUX_1.GTPE2_COMMON_RXOUTCLK_1 origin:065-gtp-common-pips 07_1627
+GTP_COMMON_MID_RIGHT.GTPE2_COMMON_RXOUTCLK_MUX_2.GTPE2_COMMON_RXOUTCLK_2 origin:065-gtp-common-pips 07_1630
+GTP_COMMON_MID_RIGHT.GTPE2_COMMON_RXOUTCLK_MUX_3.GTPE2_COMMON_RXOUTCLK_3 origin:065-gtp-common-pips 06_1630
+GTP_COMMON_MID_RIGHT.GTPE2_COMMON_TXOUTCLK_MUX_0.GTPE2_COMMON_TXOUTCLK_0 origin:065-gtp-common-pips 06_1629
+GTP_COMMON_MID_RIGHT.GTPE2_COMMON_TXOUTCLK_MUX_1.GTPE2_COMMON_TXOUTCLK_1 origin:065-gtp-common-pips 07_1628
+GTP_COMMON_MID_RIGHT.GTPE2_COMMON_TXOUTCLK_MUX_2.GTPE2_COMMON_TXOUTCLK_2 origin:065-gtp-common-pips 07_1631
+GTP_COMMON_MID_RIGHT.GTPE2_COMMON_TXOUTCLK_MUX_3.GTPE2_COMMON_TXOUTCLK_3 origin:065-gtp-common-pips 06_1631
 GTP_COMMON_MID_RIGHT.GTPE2.IN_USE origin:063-gtp-common-conf 00_1584
-GTP_COMMON_MID_RIGHT.GTPE2.INV_GTGREFCLK0 origin:063-gtp-common-conf 01_1516
-GTP_COMMON_MID_RIGHT.GTPE2.INV_GTGREFCLK1 origin:063-gtp-common-conf 00_1514
 GTP_COMMON_MID_RIGHT.GTPE2.PLL_CLKOUT_CFG[0] origin:063-gtp-common-conf 00_1560
 GTP_COMMON_MID_RIGHT.GTPE2.PLL_CLKOUT_CFG[1] origin:063-gtp-common-conf 01_1560
 GTP_COMMON_MID_RIGHT.GTPE2.PLL_CLKOUT_CFG[2] origin:063-gtp-common-conf 00_1561
@@ -148,6 +326,8 @@
 GTP_COMMON_MID_RIGHT.GTPE2.ZINV_DRPCLK origin:063-gtp-common-conf 00_1516
 GTP_COMMON_MID_RIGHT.GTPE2.ZINV_PLL0LOCKDETCLK origin:063-gtp-common-conf 01_1512
 GTP_COMMON_MID_RIGHT.GTPE2.ZINV_PLL1LOCKDETCLK origin:063-gtp-common-conf 00_1512
+GTP_COMMON_MID_RIGHT.GTPE2.GTREFCLK0_USED origin:063-gtp-common-conf 00_1438 00_1806
+GTP_COMMON_MID_RIGHT.GTPE2.GTREFCLK1_USED origin:063-gtp-common-conf 01_1438 01_1806
 GTP_COMMON_MID_RIGHT.GTPE2.PLL0_CFG[0] origin:063-gtp-common-conf 00_1424
 GTP_COMMON_MID_RIGHT.GTPE2.PLL0_CFG[1] origin:063-gtp-common-conf 01_1424
 GTP_COMMON_MID_RIGHT.GTPE2.PLL0_CFG[2] origin:063-gtp-common-conf 00_1425

diff --git a/artix7/segbits_gtp_int_interface.db b/artix7/segbits_gtp_int_interface.db
new file mode 100644
index 0000000..e68579d
--- /dev/null
+++ b/artix7/segbits_gtp_int_interface.db

@@ -0,0 +1,48 @@
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT0.GTPE2_INT_INTERFACE_IMUX_DELAY0 26_00
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT1.GTPE2_INT_INTERFACE_IMUX_DELAY1 27_08
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT2.GTPE2_INT_INTERFACE_IMUX_DELAY2 27_16
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT3.GTPE2_INT_INTERFACE_IMUX_DELAY3 27_24
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT4.GTPE2_INT_INTERFACE_IMUX_DELAY4 26_32
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT5.GTPE2_INT_INTERFACE_IMUX_DELAY5 27_40
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT6.GTPE2_INT_INTERFACE_IMUX_DELAY6 27_48
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT7.GTPE2_INT_INTERFACE_IMUX_DELAY7 27_56
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT8.GTPE2_INT_INTERFACE_IMUX_DELAY8 26_02
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT9.GTPE2_INT_INTERFACE_IMUX_DELAY9 26_10
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT10.GTPE2_INT_INTERFACE_IMUX_DELAY10 26_18
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT11.GTPE2_INT_INTERFACE_IMUX_DELAY11 26_26
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT12.GTPE2_INT_INTERFACE_IMUX_DELAY12 26_34
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT13.GTPE2_INT_INTERFACE_IMUX_DELAY13 26_42
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT14.GTPE2_INT_INTERFACE_IMUX_DELAY14 26_50
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT15.GTPE2_INT_INTERFACE_IMUX_DELAY15 26_58
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT16.GTPE2_INT_INTERFACE_IMUX_DELAY16 26_03
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT17.GTPE2_INT_INTERFACE_IMUX_DELAY17 26_11
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT18.GTPE2_INT_INTERFACE_IMUX_DELAY18 26_19
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT19.GTPE2_INT_INTERFACE_IMUX_DELAY19 26_27
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT20.GTPE2_INT_INTERFACE_IMUX_DELAY20 26_35
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT21.GTPE2_INT_INTERFACE_IMUX_DELAY21 26_43
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT22.GTPE2_INT_INTERFACE_IMUX_DELAY22 26_51
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT23.GTPE2_INT_INTERFACE_IMUX_DELAY23 26_59
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT24.GTPE2_INT_INTERFACE_IMUX_DELAY24 27_04
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT25.GTPE2_INT_INTERFACE_IMUX_DELAY25 27_12
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT26.GTPE2_INT_INTERFACE_IMUX_DELAY26 27_20
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT27.GTPE2_INT_INTERFACE_IMUX_DELAY27 27_28
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT28.GTPE2_INT_INTERFACE_IMUX_DELAY28 27_36
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT29.GTPE2_INT_INTERFACE_IMUX_DELAY29 27_44
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT30.GTPE2_INT_INTERFACE_IMUX_DELAY30 27_52
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT31.GTPE2_INT_INTERFACE_IMUX_DELAY31 27_60
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT32.GTPE2_INT_INTERFACE_IMUX_DELAY32 27_05
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT33.GTPE2_INT_INTERFACE_IMUX_DELAY33 27_13
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT34.GTPE2_INT_INTERFACE_IMUX_DELAY34 27_21
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT35.GTPE2_INT_INTERFACE_IMUX_DELAY35 27_29
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT36.GTPE2_INT_INTERFACE_IMUX_DELAY36 27_37
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT37.GTPE2_INT_INTERFACE_IMUX_DELAY37 27_45
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT38.GTPE2_INT_INTERFACE_IMUX_DELAY38 27_53
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT39.GTPE2_INT_INTERFACE_IMUX_DELAY39 27_61
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT40.GTPE2_INT_INTERFACE_IMUX_DELAY40 27_07
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT41.GTPE2_INT_INTERFACE_IMUX_DELAY41 27_15
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT42.GTPE2_INT_INTERFACE_IMUX_DELAY42 27_23
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT43.GTPE2_INT_INTERFACE_IMUX_DELAY43 27_31
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT44.GTPE2_INT_INTERFACE_IMUX_DELAY44 27_39
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT45.GTPE2_INT_INTERFACE_IMUX_DELAY45 27_47
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT46.GTPE2_INT_INTERFACE_IMUX_DELAY46 27_55
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT47.GTPE2_INT_INTERFACE_IMUX_DELAY47 27_63

diff --git a/artix7/segbits_gtp_int_interface.origin_info.db b/artix7/segbits_gtp_int_interface.origin_info.db
new file mode 100644
index 0000000..b4c7e49
--- /dev/null
+++ b/artix7/segbits_gtp_int_interface.origin_info.db

@@ -0,0 +1,48 @@
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT0.GTPE2_INT_INTERFACE_IMUX_DELAY0 origin:066-gtp-int-pips 26_00
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT1.GTPE2_INT_INTERFACE_IMUX_DELAY1 origin:066-gtp-int-pips 27_08
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT2.GTPE2_INT_INTERFACE_IMUX_DELAY2 origin:066-gtp-int-pips 27_16
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT3.GTPE2_INT_INTERFACE_IMUX_DELAY3 origin:066-gtp-int-pips 27_24
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT4.GTPE2_INT_INTERFACE_IMUX_DELAY4 origin:066-gtp-int-pips 26_32
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT5.GTPE2_INT_INTERFACE_IMUX_DELAY5 origin:066-gtp-int-pips 27_40
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT6.GTPE2_INT_INTERFACE_IMUX_DELAY6 origin:066-gtp-int-pips 27_48
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT7.GTPE2_INT_INTERFACE_IMUX_DELAY7 origin:066-gtp-int-pips 27_56
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT8.GTPE2_INT_INTERFACE_IMUX_DELAY8 origin:066-gtp-int-pips 26_02
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT9.GTPE2_INT_INTERFACE_IMUX_DELAY9 origin:066-gtp-int-pips 26_10
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT10.GTPE2_INT_INTERFACE_IMUX_DELAY10 origin:066-gtp-int-pips 26_18
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT11.GTPE2_INT_INTERFACE_IMUX_DELAY11 origin:066-gtp-int-pips 26_26
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT12.GTPE2_INT_INTERFACE_IMUX_DELAY12 origin:066-gtp-int-pips 26_34
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT13.GTPE2_INT_INTERFACE_IMUX_DELAY13 origin:066-gtp-int-pips 26_42
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT14.GTPE2_INT_INTERFACE_IMUX_DELAY14 origin:066-gtp-int-pips 26_50
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT15.GTPE2_INT_INTERFACE_IMUX_DELAY15 origin:066-gtp-int-pips 26_58
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT16.GTPE2_INT_INTERFACE_IMUX_DELAY16 origin:066-gtp-int-pips 26_03
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT17.GTPE2_INT_INTERFACE_IMUX_DELAY17 origin:066-gtp-int-pips 26_11
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT18.GTPE2_INT_INTERFACE_IMUX_DELAY18 origin:066-gtp-int-pips 26_19
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT19.GTPE2_INT_INTERFACE_IMUX_DELAY19 origin:066-gtp-int-pips 26_27
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT20.GTPE2_INT_INTERFACE_IMUX_DELAY20 origin:066-gtp-int-pips 26_35
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT21.GTPE2_INT_INTERFACE_IMUX_DELAY21 origin:066-gtp-int-pips 26_43
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT22.GTPE2_INT_INTERFACE_IMUX_DELAY22 origin:066-gtp-int-pips 26_51
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT23.GTPE2_INT_INTERFACE_IMUX_DELAY23 origin:066-gtp-int-pips 26_59
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT24.GTPE2_INT_INTERFACE_IMUX_DELAY24 origin:066-gtp-int-pips 27_04
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT25.GTPE2_INT_INTERFACE_IMUX_DELAY25 origin:066-gtp-int-pips 27_12
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT26.GTPE2_INT_INTERFACE_IMUX_DELAY26 origin:066-gtp-int-pips 27_20
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT27.GTPE2_INT_INTERFACE_IMUX_DELAY27 origin:066-gtp-int-pips 27_28
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT28.GTPE2_INT_INTERFACE_IMUX_DELAY28 origin:066-gtp-int-pips 27_36
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT29.GTPE2_INT_INTERFACE_IMUX_DELAY29 origin:066-gtp-int-pips 27_44
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT30.GTPE2_INT_INTERFACE_IMUX_DELAY30 origin:066-gtp-int-pips 27_52
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT31.GTPE2_INT_INTERFACE_IMUX_DELAY31 origin:066-gtp-int-pips 27_60
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT32.GTPE2_INT_INTERFACE_IMUX_DELAY32 origin:066-gtp-int-pips 27_05
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT33.GTPE2_INT_INTERFACE_IMUX_DELAY33 origin:066-gtp-int-pips 27_13
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT34.GTPE2_INT_INTERFACE_IMUX_DELAY34 origin:066-gtp-int-pips 27_21
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT35.GTPE2_INT_INTERFACE_IMUX_DELAY35 origin:066-gtp-int-pips 27_29
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT36.GTPE2_INT_INTERFACE_IMUX_DELAY36 origin:066-gtp-int-pips 27_37
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT37.GTPE2_INT_INTERFACE_IMUX_DELAY37 origin:066-gtp-int-pips 27_45
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT38.GTPE2_INT_INTERFACE_IMUX_DELAY38 origin:066-gtp-int-pips 27_53
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT39.GTPE2_INT_INTERFACE_IMUX_DELAY39 origin:066-gtp-int-pips 27_61
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT40.GTPE2_INT_INTERFACE_IMUX_DELAY40 origin:066-gtp-int-pips 27_07
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT41.GTPE2_INT_INTERFACE_IMUX_DELAY41 origin:066-gtp-int-pips 27_15
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT42.GTPE2_INT_INTERFACE_IMUX_DELAY42 origin:066-gtp-int-pips 27_23
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT43.GTPE2_INT_INTERFACE_IMUX_DELAY43 origin:066-gtp-int-pips 27_31
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT44.GTPE2_INT_INTERFACE_IMUX_DELAY44 origin:066-gtp-int-pips 27_39
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT45.GTPE2_INT_INTERFACE_IMUX_DELAY45 origin:066-gtp-int-pips 27_47
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT46.GTPE2_INT_INTERFACE_IMUX_DELAY46 origin:066-gtp-int-pips 27_55
+GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT47.GTPE2_INT_INTERFACE_IMUX_DELAY47 origin:066-gtp-int-pips 27_63

diff --git a/artix7/segbits_gtp_int_interface_l.db b/artix7/segbits_gtp_int_interface_l.db
new file mode 100644
index 0000000..9301331
--- /dev/null
+++ b/artix7/segbits_gtp_int_interface_l.db

@@ -0,0 +1,48 @@
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT0.GTPE2_INT_INTERFACE_IMUX_DELAY0 26_00
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT1.GTPE2_INT_INTERFACE_IMUX_DELAY1 27_08
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT2.GTPE2_INT_INTERFACE_IMUX_DELAY2 27_16
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT3.GTPE2_INT_INTERFACE_IMUX_DELAY3 27_24
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT4.GTPE2_INT_INTERFACE_IMUX_DELAY4 26_32
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT5.GTPE2_INT_INTERFACE_IMUX_DELAY5 27_40
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT6.GTPE2_INT_INTERFACE_IMUX_DELAY6 27_48
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT7.GTPE2_INT_INTERFACE_IMUX_DELAY7 27_56
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT8.GTPE2_INT_INTERFACE_IMUX_DELAY8 26_02
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT9.GTPE2_INT_INTERFACE_IMUX_DELAY9 26_10
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT10.GTPE2_INT_INTERFACE_IMUX_DELAY10 26_18
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT11.GTPE2_INT_INTERFACE_IMUX_DELAY11 26_26
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT12.GTPE2_INT_INTERFACE_IMUX_DELAY12 26_34
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT13.GTPE2_INT_INTERFACE_IMUX_DELAY13 26_42
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT14.GTPE2_INT_INTERFACE_IMUX_DELAY14 26_50
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT15.GTPE2_INT_INTERFACE_IMUX_DELAY15 26_58
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT16.GTPE2_INT_INTERFACE_IMUX_DELAY16 26_03
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT17.GTPE2_INT_INTERFACE_IMUX_DELAY17 26_11
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT18.GTPE2_INT_INTERFACE_IMUX_DELAY18 26_19
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT19.GTPE2_INT_INTERFACE_IMUX_DELAY19 26_27
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT20.GTPE2_INT_INTERFACE_IMUX_DELAY20 26_35
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT21.GTPE2_INT_INTERFACE_IMUX_DELAY21 26_43
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT22.GTPE2_INT_INTERFACE_IMUX_DELAY22 26_51
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT23.GTPE2_INT_INTERFACE_IMUX_DELAY23 26_59
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT24.GTPE2_INT_INTERFACE_IMUX_DELAY24 27_04
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT25.GTPE2_INT_INTERFACE_IMUX_DELAY25 27_12
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT26.GTPE2_INT_INTERFACE_IMUX_DELAY26 27_20
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT27.GTPE2_INT_INTERFACE_IMUX_DELAY27 27_28
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT28.GTPE2_INT_INTERFACE_IMUX_DELAY28 27_36
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT29.GTPE2_INT_INTERFACE_IMUX_DELAY29 27_44
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT30.GTPE2_INT_INTERFACE_IMUX_DELAY30 27_52
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT31.GTPE2_INT_INTERFACE_IMUX_DELAY31 27_60
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT32.GTPE2_INT_INTERFACE_IMUX_DELAY32 27_05
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT33.GTPE2_INT_INTERFACE_IMUX_DELAY33 27_13
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT34.GTPE2_INT_INTERFACE_IMUX_DELAY34 27_21
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT35.GTPE2_INT_INTERFACE_IMUX_DELAY35 27_29
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT36.GTPE2_INT_INTERFACE_IMUX_DELAY36 27_37
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT37.GTPE2_INT_INTERFACE_IMUX_DELAY37 27_45
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT38.GTPE2_INT_INTERFACE_IMUX_DELAY38 27_53
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT39.GTPE2_INT_INTERFACE_IMUX_DELAY39 27_61
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT40.GTPE2_INT_INTERFACE_IMUX_DELAY40 27_07
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT41.GTPE2_INT_INTERFACE_IMUX_DELAY41 27_15
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT42.GTPE2_INT_INTERFACE_IMUX_DELAY42 27_23
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT43.GTPE2_INT_INTERFACE_IMUX_DELAY43 27_31
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT44.GTPE2_INT_INTERFACE_IMUX_DELAY44 27_39
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT45.GTPE2_INT_INTERFACE_IMUX_DELAY45 27_47
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT46.GTPE2_INT_INTERFACE_IMUX_DELAY46 27_55
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT47.GTPE2_INT_INTERFACE_IMUX_DELAY47 27_63

diff --git a/artix7/segbits_gtp_int_interface_l.origin_info.db b/artix7/segbits_gtp_int_interface_l.origin_info.db
new file mode 100644
index 0000000..5f51372
--- /dev/null
+++ b/artix7/segbits_gtp_int_interface_l.origin_info.db

@@ -0,0 +1,48 @@
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT0.GTPE2_INT_INTERFACE_IMUX_DELAY0 origin:066-gtp-int-pips 26_00
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT1.GTPE2_INT_INTERFACE_IMUX_DELAY1 origin:066-gtp-int-pips 27_08
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT2.GTPE2_INT_INTERFACE_IMUX_DELAY2 origin:066-gtp-int-pips 27_16
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT3.GTPE2_INT_INTERFACE_IMUX_DELAY3 origin:066-gtp-int-pips 27_24
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT4.GTPE2_INT_INTERFACE_IMUX_DELAY4 origin:066-gtp-int-pips 26_32
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT5.GTPE2_INT_INTERFACE_IMUX_DELAY5 origin:066-gtp-int-pips 27_40
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT6.GTPE2_INT_INTERFACE_IMUX_DELAY6 origin:066-gtp-int-pips 27_48
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT7.GTPE2_INT_INTERFACE_IMUX_DELAY7 origin:066-gtp-int-pips 27_56
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT8.GTPE2_INT_INTERFACE_IMUX_DELAY8 origin:066-gtp-int-pips 26_02
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT9.GTPE2_INT_INTERFACE_IMUX_DELAY9 origin:066-gtp-int-pips 26_10
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT10.GTPE2_INT_INTERFACE_IMUX_DELAY10 origin:066-gtp-int-pips 26_18
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT11.GTPE2_INT_INTERFACE_IMUX_DELAY11 origin:066-gtp-int-pips 26_26
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT12.GTPE2_INT_INTERFACE_IMUX_DELAY12 origin:066-gtp-int-pips 26_34
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT13.GTPE2_INT_INTERFACE_IMUX_DELAY13 origin:066-gtp-int-pips 26_42
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT14.GTPE2_INT_INTERFACE_IMUX_DELAY14 origin:066-gtp-int-pips 26_50
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT15.GTPE2_INT_INTERFACE_IMUX_DELAY15 origin:066-gtp-int-pips 26_58
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT16.GTPE2_INT_INTERFACE_IMUX_DELAY16 origin:066-gtp-int-pips 26_03
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT17.GTPE2_INT_INTERFACE_IMUX_DELAY17 origin:066-gtp-int-pips 26_11
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT18.GTPE2_INT_INTERFACE_IMUX_DELAY18 origin:066-gtp-int-pips 26_19
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT19.GTPE2_INT_INTERFACE_IMUX_DELAY19 origin:066-gtp-int-pips 26_27
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT20.GTPE2_INT_INTERFACE_IMUX_DELAY20 origin:066-gtp-int-pips 26_35
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT21.GTPE2_INT_INTERFACE_IMUX_DELAY21 origin:066-gtp-int-pips 26_43
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT22.GTPE2_INT_INTERFACE_IMUX_DELAY22 origin:066-gtp-int-pips 26_51
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT23.GTPE2_INT_INTERFACE_IMUX_DELAY23 origin:066-gtp-int-pips 26_59
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT24.GTPE2_INT_INTERFACE_IMUX_DELAY24 origin:066-gtp-int-pips 27_04
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT25.GTPE2_INT_INTERFACE_IMUX_DELAY25 origin:066-gtp-int-pips 27_12
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT26.GTPE2_INT_INTERFACE_IMUX_DELAY26 origin:066-gtp-int-pips 27_20
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT27.GTPE2_INT_INTERFACE_IMUX_DELAY27 origin:066-gtp-int-pips 27_28
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT28.GTPE2_INT_INTERFACE_IMUX_DELAY28 origin:066-gtp-int-pips 27_36
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT29.GTPE2_INT_INTERFACE_IMUX_DELAY29 origin:066-gtp-int-pips 27_44
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT30.GTPE2_INT_INTERFACE_IMUX_DELAY30 origin:066-gtp-int-pips 27_52
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT31.GTPE2_INT_INTERFACE_IMUX_DELAY31 origin:066-gtp-int-pips 27_60
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT32.GTPE2_INT_INTERFACE_IMUX_DELAY32 origin:066-gtp-int-pips 27_05
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT33.GTPE2_INT_INTERFACE_IMUX_DELAY33 origin:066-gtp-int-pips 27_13
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT34.GTPE2_INT_INTERFACE_IMUX_DELAY34 origin:066-gtp-int-pips 27_21
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT35.GTPE2_INT_INTERFACE_IMUX_DELAY35 origin:066-gtp-int-pips 27_29
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT36.GTPE2_INT_INTERFACE_IMUX_DELAY36 origin:066-gtp-int-pips 27_37
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT37.GTPE2_INT_INTERFACE_IMUX_DELAY37 origin:066-gtp-int-pips 27_45
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT38.GTPE2_INT_INTERFACE_IMUX_DELAY38 origin:066-gtp-int-pips 27_53
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT39.GTPE2_INT_INTERFACE_IMUX_DELAY39 origin:066-gtp-int-pips 27_61
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT40.GTPE2_INT_INTERFACE_IMUX_DELAY40 origin:066-gtp-int-pips 27_07
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT41.GTPE2_INT_INTERFACE_IMUX_DELAY41 origin:066-gtp-int-pips 27_15
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT42.GTPE2_INT_INTERFACE_IMUX_DELAY42 origin:066-gtp-int-pips 27_23
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT43.GTPE2_INT_INTERFACE_IMUX_DELAY43 origin:066-gtp-int-pips 27_31
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT44.GTPE2_INT_INTERFACE_IMUX_DELAY44 origin:066-gtp-int-pips 27_39
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT45.GTPE2_INT_INTERFACE_IMUX_DELAY45 origin:066-gtp-int-pips 27_47
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT46.GTPE2_INT_INTERFACE_IMUX_DELAY46 origin:066-gtp-int-pips 27_55
+GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT47.GTPE2_INT_INTERFACE_IMUX_DELAY47 origin:066-gtp-int-pips 27_63

diff --git a/artix7/segbits_gtp_int_interface_r.db b/artix7/segbits_gtp_int_interface_r.db
new file mode 100644
index 0000000..4ce39dd
--- /dev/null
+++ b/artix7/segbits_gtp_int_interface_r.db

@@ -0,0 +1,48 @@
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT0.GTPE2_INT_INTERFACE_IMUX_DELAY0 26_00
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT1.GTPE2_INT_INTERFACE_IMUX_DELAY1 27_08
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT2.GTPE2_INT_INTERFACE_IMUX_DELAY2 27_16
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT3.GTPE2_INT_INTERFACE_IMUX_DELAY3 27_24
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT4.GTPE2_INT_INTERFACE_IMUX_DELAY4 26_32
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT5.GTPE2_INT_INTERFACE_IMUX_DELAY5 27_40
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT6.GTPE2_INT_INTERFACE_IMUX_DELAY6 27_48
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT7.GTPE2_INT_INTERFACE_IMUX_DELAY7 27_56
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT8.GTPE2_INT_INTERFACE_IMUX_DELAY8 26_02
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT9.GTPE2_INT_INTERFACE_IMUX_DELAY9 26_10
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT10.GTPE2_INT_INTERFACE_IMUX_DELAY10 26_18
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT11.GTPE2_INT_INTERFACE_IMUX_DELAY11 26_26
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT12.GTPE2_INT_INTERFACE_IMUX_DELAY12 26_34
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT13.GTPE2_INT_INTERFACE_IMUX_DELAY13 26_42
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT14.GTPE2_INT_INTERFACE_IMUX_DELAY14 26_50
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT15.GTPE2_INT_INTERFACE_IMUX_DELAY15 26_58
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT16.GTPE2_INT_INTERFACE_IMUX_DELAY16 26_03
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT17.GTPE2_INT_INTERFACE_IMUX_DELAY17 26_11
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT18.GTPE2_INT_INTERFACE_IMUX_DELAY18 26_19
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT19.GTPE2_INT_INTERFACE_IMUX_DELAY19 26_27
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT20.GTPE2_INT_INTERFACE_IMUX_DELAY20 26_35
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT21.GTPE2_INT_INTERFACE_IMUX_DELAY21 26_43
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT22.GTPE2_INT_INTERFACE_IMUX_DELAY22 26_51
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT23.GTPE2_INT_INTERFACE_IMUX_DELAY23 26_59
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT24.GTPE2_INT_INTERFACE_IMUX_DELAY24 27_04
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT25.GTPE2_INT_INTERFACE_IMUX_DELAY25 27_12
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT26.GTPE2_INT_INTERFACE_IMUX_DELAY26 27_20
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT27.GTPE2_INT_INTERFACE_IMUX_DELAY27 27_28
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT28.GTPE2_INT_INTERFACE_IMUX_DELAY28 27_36
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT29.GTPE2_INT_INTERFACE_IMUX_DELAY29 27_44
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT30.GTPE2_INT_INTERFACE_IMUX_DELAY30 27_52
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT31.GTPE2_INT_INTERFACE_IMUX_DELAY31 27_60
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT32.GTPE2_INT_INTERFACE_IMUX_DELAY32 27_05
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT33.GTPE2_INT_INTERFACE_IMUX_DELAY33 27_13
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT34.GTPE2_INT_INTERFACE_IMUX_DELAY34 27_21
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT35.GTPE2_INT_INTERFACE_IMUX_DELAY35 27_29
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT36.GTPE2_INT_INTERFACE_IMUX_DELAY36 27_37
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT37.GTPE2_INT_INTERFACE_IMUX_DELAY37 27_45
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT38.GTPE2_INT_INTERFACE_IMUX_DELAY38 27_53
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT39.GTPE2_INT_INTERFACE_IMUX_DELAY39 27_61
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT40.GTPE2_INT_INTERFACE_IMUX_DELAY40 27_07
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT41.GTPE2_INT_INTERFACE_IMUX_DELAY41 27_15
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT42.GTPE2_INT_INTERFACE_IMUX_DELAY42 27_23
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT43.GTPE2_INT_INTERFACE_IMUX_DELAY43 27_31
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT44.GTPE2_INT_INTERFACE_IMUX_DELAY44 27_39
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT45.GTPE2_INT_INTERFACE_IMUX_DELAY45 27_47
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT46.GTPE2_INT_INTERFACE_IMUX_DELAY46 27_55
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT47.GTPE2_INT_INTERFACE_IMUX_DELAY47 27_63

diff --git a/artix7/segbits_gtp_int_interface_r.origin_info.db b/artix7/segbits_gtp_int_interface_r.origin_info.db
new file mode 100644
index 0000000..824758d
--- /dev/null
+++ b/artix7/segbits_gtp_int_interface_r.origin_info.db

@@ -0,0 +1,48 @@
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT0.GTPE2_INT_INTERFACE_IMUX_DELAY0 origin:066-gtp-int-pips 26_00
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT1.GTPE2_INT_INTERFACE_IMUX_DELAY1 origin:066-gtp-int-pips 27_08
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT2.GTPE2_INT_INTERFACE_IMUX_DELAY2 origin:066-gtp-int-pips 27_16
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT3.GTPE2_INT_INTERFACE_IMUX_DELAY3 origin:066-gtp-int-pips 27_24
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT4.GTPE2_INT_INTERFACE_IMUX_DELAY4 origin:066-gtp-int-pips 26_32
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT5.GTPE2_INT_INTERFACE_IMUX_DELAY5 origin:066-gtp-int-pips 27_40
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT6.GTPE2_INT_INTERFACE_IMUX_DELAY6 origin:066-gtp-int-pips 27_48
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT7.GTPE2_INT_INTERFACE_IMUX_DELAY7 origin:066-gtp-int-pips 27_56
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT8.GTPE2_INT_INTERFACE_IMUX_DELAY8 origin:066-gtp-int-pips 26_02
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT9.GTPE2_INT_INTERFACE_IMUX_DELAY9 origin:066-gtp-int-pips 26_10
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT10.GTPE2_INT_INTERFACE_IMUX_DELAY10 origin:066-gtp-int-pips 26_18
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT11.GTPE2_INT_INTERFACE_IMUX_DELAY11 origin:066-gtp-int-pips 26_26
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT12.GTPE2_INT_INTERFACE_IMUX_DELAY12 origin:066-gtp-int-pips 26_34
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT13.GTPE2_INT_INTERFACE_IMUX_DELAY13 origin:066-gtp-int-pips 26_42
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT14.GTPE2_INT_INTERFACE_IMUX_DELAY14 origin:066-gtp-int-pips 26_50
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT15.GTPE2_INT_INTERFACE_IMUX_DELAY15 origin:066-gtp-int-pips 26_58
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT16.GTPE2_INT_INTERFACE_IMUX_DELAY16 origin:066-gtp-int-pips 26_03
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT17.GTPE2_INT_INTERFACE_IMUX_DELAY17 origin:066-gtp-int-pips 26_11
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT18.GTPE2_INT_INTERFACE_IMUX_DELAY18 origin:066-gtp-int-pips 26_19
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT19.GTPE2_INT_INTERFACE_IMUX_DELAY19 origin:066-gtp-int-pips 26_27
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT20.GTPE2_INT_INTERFACE_IMUX_DELAY20 origin:066-gtp-int-pips 26_35
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT21.GTPE2_INT_INTERFACE_IMUX_DELAY21 origin:066-gtp-int-pips 26_43
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT22.GTPE2_INT_INTERFACE_IMUX_DELAY22 origin:066-gtp-int-pips 26_51
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT23.GTPE2_INT_INTERFACE_IMUX_DELAY23 origin:066-gtp-int-pips 26_59
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT24.GTPE2_INT_INTERFACE_IMUX_DELAY24 origin:066-gtp-int-pips 27_04
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT25.GTPE2_INT_INTERFACE_IMUX_DELAY25 origin:066-gtp-int-pips 27_12
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT26.GTPE2_INT_INTERFACE_IMUX_DELAY26 origin:066-gtp-int-pips 27_20
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT27.GTPE2_INT_INTERFACE_IMUX_DELAY27 origin:066-gtp-int-pips 27_28
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT28.GTPE2_INT_INTERFACE_IMUX_DELAY28 origin:066-gtp-int-pips 27_36
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT29.GTPE2_INT_INTERFACE_IMUX_DELAY29 origin:066-gtp-int-pips 27_44
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT30.GTPE2_INT_INTERFACE_IMUX_DELAY30 origin:066-gtp-int-pips 27_52
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT31.GTPE2_INT_INTERFACE_IMUX_DELAY31 origin:066-gtp-int-pips 27_60
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT32.GTPE2_INT_INTERFACE_IMUX_DELAY32 origin:066-gtp-int-pips 27_05
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT33.GTPE2_INT_INTERFACE_IMUX_DELAY33 origin:066-gtp-int-pips 27_13
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT34.GTPE2_INT_INTERFACE_IMUX_DELAY34 origin:066-gtp-int-pips 27_21
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT35.GTPE2_INT_INTERFACE_IMUX_DELAY35 origin:066-gtp-int-pips 27_29
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT36.GTPE2_INT_INTERFACE_IMUX_DELAY36 origin:066-gtp-int-pips 27_37
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT37.GTPE2_INT_INTERFACE_IMUX_DELAY37 origin:066-gtp-int-pips 27_45
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT38.GTPE2_INT_INTERFACE_IMUX_DELAY38 origin:066-gtp-int-pips 27_53
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT39.GTPE2_INT_INTERFACE_IMUX_DELAY39 origin:066-gtp-int-pips 27_61
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT40.GTPE2_INT_INTERFACE_IMUX_DELAY40 origin:066-gtp-int-pips 27_07
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT41.GTPE2_INT_INTERFACE_IMUX_DELAY41 origin:066-gtp-int-pips 27_15
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT42.GTPE2_INT_INTERFACE_IMUX_DELAY42 origin:066-gtp-int-pips 27_23
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT43.GTPE2_INT_INTERFACE_IMUX_DELAY43 origin:066-gtp-int-pips 27_31
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT44.GTPE2_INT_INTERFACE_IMUX_DELAY44 origin:066-gtp-int-pips 27_39
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT45.GTPE2_INT_INTERFACE_IMUX_DELAY45 origin:066-gtp-int-pips 27_47
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT46.GTPE2_INT_INTERFACE_IMUX_DELAY46 origin:066-gtp-int-pips 27_55
+GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT47.GTPE2_INT_INTERFACE_IMUX_DELAY47 origin:066-gtp-int-pips 27_63

diff --git a/artix7/segbits_hclk_ioi3.db b/artix7/segbits_hclk_ioi3.db
index 443583e..a775abe 100644
--- a/artix7/segbits_hclk_ioi3.db
+++ b/artix7/segbits_hclk_ioi3.db

@@ -242,7 +242,10 @@
 HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK1 32_19 35_21
 HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK2 31_20 32_19
 HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK3 32_19 35_19
+HCLK_IOI3.LVDS_25_IN_USE 38_23 38_24 38_25 41_14 41_15 41_17 41_18 41_27 41_28 41_29
+HCLK_IOI3.ONLY_DIFF_IN_USE 38_27 39_23 40_25 40_27 40_29 40_30 41_16 41_31
 HCLK_IOI3.STEPDOWN 38_15 39_14 39_15 39_16
+HCLK_IOI3.TMDS_33_IN_USE 38_28 41_19
 HCLK_IOI3.VREF.V_600_MV 38_26 39_30
 HCLK_IOI3.VREF.V_675_MV 38_26 39_22
 HCLK_IOI3.VREF.V_750_MV 38_26 39_24

diff --git a/artix7/segbits_hclk_ioi3.origin_info.db b/artix7/segbits_hclk_ioi3.origin_info.db
index d2ea9e1..df5951b 100644
--- a/artix7/segbits_hclk_ioi3.origin_info.db
+++ b/artix7/segbits_hclk_ioi3.origin_info.db

@@ -242,7 +242,10 @@
 HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK1 origin:047-hclk-ioi-pips 32_19 35_21
 HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK2 origin:047-hclk-ioi-pips 31_20 32_19
 HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK3 origin:047-hclk-ioi-pips 32_19 35_19
+HCLK_IOI3.LVDS_25_IN_USE origin:030-iob 38_23 38_24 38_25 41_14 41_15 41_17 41_18 41_27 41_28 41_29
+HCLK_IOI3.ONLY_DIFF_IN_USE origin:030-iob 38_27 39_23 40_25 40_27 40_29 40_30 41_16 41_31
 HCLK_IOI3.STEPDOWN origin:030-iob 38_15 39_14 39_15 39_16
+HCLK_IOI3.TMDS_33_IN_USE origin:030-iob 38_28 41_19
 HCLK_IOI3.VREF.V_600_MV origin:030-iob 38_26 39_30
 HCLK_IOI3.VREF.V_675_MV origin:030-iob 38_26 39_22
 HCLK_IOI3.VREF.V_750_MV origin:030-iob 38_26 39_24

diff --git a/artix7/segbits_int_l.origin_info.db b/artix7/segbits_int_l.origin_info.db
index ae2dacb..315d82a 100644
--- a/artix7/segbits_int_l.origin_info.db
+++ b/artix7/segbits_int_l.origin_info.db

@@ -301,7 +301,7 @@
 INT_L.FAN_ALT0.FAN_BOUNCE6 origin:050-pip-seed !23_00 20_00 22_00 24_00 25_00
 INT_L.FAN_ALT0.LOGIC_OUTS_L0 origin:050-pip-seed !23_00 21_00 22_00 24_00 25_00
 INT_L.FAN_ALT0.LOGIC_OUTS_L12 origin:050-pip-seed !22_00 21_00 23_00 24_00 25_00
-INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:056-pip-rem !22_00 !23_00 !25_00 21_00 24_00
+INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:050-pip-seed !22_00 !23_00 !25_00 21_00 24_00
 INT_L.FAN_ALT0.SR1END_N3_3 origin:050-pip-seed !23_00 19_01 22_00 24_00 25_00
 INT_L.FAN_ALT0.SS2END_N0_3 origin:050-pip-seed !22_00 !23_00 !24_00 17_00 25_00
 INT_L.FAN_ALT0.SW2END_N0_3 origin:050-pip-seed !22_00 !23_00 !25_00 17_00 24_00
@@ -1937,7 +1937,7 @@
 INT_L.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
 INT_L.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
 INT_L.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
-INT_L.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
+INT_L.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
 INT_L.EL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_20 14_21
 INT_L.EL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_21 14_21
 INT_L.EL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_21 13_21
@@ -2273,7 +2273,7 @@
 INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
 INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
 INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
-INT_L.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
+INT_L.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
 INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17
 INT_L.NL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_17 14_17
 INT_L.NL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_17 13_17
@@ -3348,7 +3348,7 @@
 INT_L.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60
 INT_L.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60
 INT_L.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61
-INT_L.SW6BEG3.SE6END3 origin:050-pip-seed 04_61 06_60
+INT_L.SW6BEG3.SE6END3 origin:056-pip-rem 04_61 06_60
 INT_L.SW6BEG3.SS2END3 origin:050-pip-seed 03_60 03_61
 INT_L.SW6BEG3.SS6END3 origin:050-pip-seed 03_61 06_60
 INT_L.SW6BEG3.SW2END3 origin:050-pip-seed 02_61 03_61

diff --git a/artix7/segbits_int_r.origin_info.db b/artix7/segbits_int_r.origin_info.db
index 1134657..a3d7b1e 100644
--- a/artix7/segbits_int_r.origin_info.db
+++ b/artix7/segbits_int_r.origin_info.db

@@ -237,7 +237,7 @@
 INT_R.FAN_ALT0.FAN_BOUNCE6 origin:050-pip-seed !23_00 20_00 22_00 24_00 25_00
 INT_R.FAN_ALT0.LOGIC_OUTS0 origin:050-pip-seed !23_00 21_00 22_00 24_00 25_00
 INT_R.FAN_ALT0.LOGIC_OUTS12 origin:050-pip-seed !22_00 21_00 23_00 24_00 25_00
-INT_R.FAN_ALT0.LOGIC_OUTS22 origin:050-pip-seed !22_00 !23_00 !25_00 21_00 24_00
+INT_R.FAN_ALT0.LOGIC_OUTS22 origin:056-pip-rem !22_00 !23_00 !25_00 21_00 24_00
 INT_R.FAN_ALT0.SR1END_N3_3 origin:050-pip-seed !23_00 19_01 22_00 24_00 25_00
 INT_R.FAN_ALT0.SS2END_N0_3 origin:050-pip-seed !22_00 !23_00 !24_00 17_00 25_00
 INT_R.FAN_ALT0.SW2END_N0_3 origin:050-pip-seed !22_00 !23_00 !25_00 17_00 24_00
@@ -328,11 +328,11 @@
 INT_R.FAN_ALT3.WW2END3 origin:050-pip-seed !22_56 !23_56 !24_56 19_57 25_56
 INT_R.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08
 INT_R.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08
-INT_R.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
+INT_R.FAN_ALT4.FAN_BOUNCE2 origin:056-pip-rem !23_08 20_08 22_08 24_08 25_08
 INT_R.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
 INT_R.FAN_ALT4.LOGIC_OUTS4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
 INT_R.FAN_ALT4.LOGIC_OUTS8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
-INT_R.FAN_ALT4.LOGIC_OUTS18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
+INT_R.FAN_ALT4.LOGIC_OUTS18 origin:056-pip-rem !22_08 !23_08 !25_08 21_08 24_08
 INT_R.FAN_ALT4.SR1BEG_S0 origin:050-pip-seed !23_08 19_09 22_08 24_08 25_08
 INT_R.FAN_ALT4.EE2END0 origin:050-pip-seed !22_08 !23_08 !24_08 16_08 25_08
 INT_R.FAN_ALT4.EL1END0 origin:050-pip-seed !22_08 16_08 23_08 24_08 25_08
@@ -725,7 +725,7 @@
 INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
 INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
 INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
-INT_R.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
+INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
 INT_R.EL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_20 14_21
 INT_R.EL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_21 14_21
 INT_R.EL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_21 13_21
@@ -2273,7 +2273,7 @@
 INT_R.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
 INT_R.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
 INT_R.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
-INT_R.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
+INT_R.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
 INT_R.NL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_16 14_17
 INT_R.NL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_17 14_17
 INT_R.NL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_17 13_17
@@ -2491,7 +2491,7 @@
 INT_R.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52
 INT_R.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55
 INT_R.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54
-INT_R.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55
+INT_R.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55
 INT_R.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52
 INT_R.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55
 INT_R.NR1BEG0.LOGIC_OUTS0 origin:050-pip-seed 11_07 14_07
@@ -3281,7 +3281,7 @@
 INT_R.SW6BEG0.LOGIC_OUTS18 origin:050-pip-seed 04_14 06_12
 INT_R.SW6BEG0.LOGIC_OUTS22 origin:050-pip-seed 06_12 07_13
 INT_R.SW6BEG0.EE2END0 origin:050-pip-seed 03_12 04_13
-INT_R.SW6BEG0.EE4END0 origin:050-pip-seed 04_13 05_12
+INT_R.SW6BEG0.EE4END0 origin:056-pip-rem 04_13 05_12
 INT_R.SW6BEG0.LH12 origin:056-pip-rem 05_12 07_13
 INT_R.SW6BEG0.LV0 origin:056-pip-rem 04_14 05_12
 INT_R.SW6BEG0.NW2END1 origin:050-pip-seed 02_13 05_15
@@ -3321,7 +3321,7 @@
 INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44
 INT_R.SW6BEG2.LOGIC_OUTS20 origin:050-pip-seed 06_44 07_45
 INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
-INT_R.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
+INT_R.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
 INT_R.SW6BEG2.LVB0 origin:056-pip-rem 04_46 05_44
 INT_R.SW6BEG2.LVB12 origin:056-pip-rem 05_44 07_45
 INT_R.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47
@@ -3344,7 +3344,7 @@
 INT_R.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60
 INT_R.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63
 INT_R.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61
-INT_R.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60
+INT_R.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60
 INT_R.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60
 INT_R.SW6BEG3.LV18 origin:056-pip-rem 05_60 07_61
 INT_R.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61
@@ -3603,7 +3603,7 @@
 INT_R.WW4BEG2.LVB0 origin:056-pip-rem 04_34 05_32
 INT_R.WW4BEG2.LVB12 origin:056-pip-rem 05_32 07_33
 INT_R.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
-INT_R.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
+INT_R.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
 INT_R.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
 INT_R.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
 INT_R.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33

diff --git a/artix7/segbits_liob33.db b/artix7/segbits_liob33.db
index d9ad4de..940d83b 100644
--- a/artix7/segbits_liob33.db
+++ b/artix7/segbits_liob33.db

@@ -1,14 +1,21 @@
+LIOB33.DIFF.ZIBUF_LOW_PWR 38_44 39_83
 LIOB33.IOB_Y0.IBUFDISABLE.I 38_82
 LIOB33.IOB_Y0.IN_TERM.NONE !38_120 !38_122 !39_121 !39_123
 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 38_120 38_122 39_121 39_123
 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 !39_121 39_123
 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 !38_122 !39_121 39_123
 LIOB33.IOB_Y0.INTERMDISABLE.I 39_89
+LIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED 38_64 38_74 38_76 38_98 38_100 38_102 38_118 39_65 39_75 39_97 !39_101 39_113 39_119 39_125
+LIOB33.IOB_Y0.LVDS_25.IN 38_86 39_87
+LIOB33.IOB_Y0.LVDS_25.OUT 38_64 38_74 38_76 38_98 38_102 39_65 39_75 !39_101
 LIOB33.IOB_Y0.LVTTL.DRIVE.I24 38_64 !38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127
 LIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93
 LIOB33.IOB_Y0.PULLTYPE.NONE !38_92 38_94 !39_93
 LIOB33.IOB_Y0.PULLTYPE.PULLDOWN !38_92 !38_94 !39_93
 LIOB33.IOB_Y0.PULLTYPE.PULLUP !38_92 38_94 39_93
+LIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED 38_64 !38_74 !38_76 !38_98 !38_100 !38_102 38_118 39_65 !39_75 !39_97 39_101 39_113 39_119 39_125
+LIOB33.IOB_Y0.TMDS_33.IN 38_86 !39_87
+LIOB33.IOB_Y0.TMDS_33.OUT 38_64 !38_74 !38_76 !38_98 !38_102 39_65 !39_75 39_101
 LIOB33.IOB_Y0.ZIBUF_LOW_PWR 38_84
 LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 !39_127
 LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127

diff --git a/artix7/segbits_liob33.origin_info.db b/artix7/segbits_liob33.origin_info.db
index 0490cb8..b07739c 100644
--- a/artix7/segbits_liob33.origin_info.db
+++ b/artix7/segbits_liob33.origin_info.db

@@ -1,14 +1,21 @@
+LIOB33.DIFF.ZIBUF_LOW_PWR origin:030-iob 38_44 39_83
 LIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82
 LIOB33.IOB_Y0.IN_TERM.NONE origin:030-iob !38_120 !38_122 !39_121 !39_123
 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123
 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !39_121 38_120 38_122 39_123
 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_122 !39_121 38_120 39_123
 LIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89
+LIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED origin:030-iob !39_101 38_100 38_102 38_118 38_64 38_74 38_76 38_98 39_113 39_119 39_125 39_65 39_75 39_97
+LIOB33.IOB_Y0.LVDS_25.IN origin:030-iob 38_86 39_87
+LIOB33.IOB_Y0.LVDS_25.OUT origin:030-iob !39_101 38_102 38_64 38_74 38_76 38_98 39_65 39_75
 LIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65
 LIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94
 LIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94
 LIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93
 LIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93
+LIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED origin:030-iob !38_100 !38_102 !38_74 !38_76 !38_98 !39_75 !39_97 38_118 38_64 39_101 39_113 39_119 39_125 39_65
+LIOB33.IOB_Y0.TMDS_33.IN origin:030-iob !39_87 38_86
+LIOB33.IOB_Y0.TMDS_33.OUT origin:030-iob !38_102 !38_74 !38_76 !38_98 !39_75 38_64 39_101 39_65
 LIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84
 LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_113 39_125 39_65
 LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65

diff --git a/artix7/segbits_pcie_int_interface_l.db b/artix7/segbits_pcie_int_interface_l.db
new file mode 100644
index 0000000..979c2a3
--- /dev/null
+++ b/artix7/segbits_pcie_int_interface_l.db

@@ -0,0 +1,27 @@
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT0.PCIE_INT_INTERFACE_IMUX_L_DELAY0 26_00
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT1.PCIE_INT_INTERFACE_IMUX_L_DELAY1 27_08
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT2.PCIE_INT_INTERFACE_IMUX_L_DELAY2 27_16
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT3.PCIE_INT_INTERFACE_IMUX_L_DELAY3 27_24
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT4.PCIE_INT_INTERFACE_IMUX_L_DELAY4 26_32
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT5.PCIE_INT_INTERFACE_IMUX_L_DELAY5 27_40
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT6.PCIE_INT_INTERFACE_IMUX_L_DELAY6 27_48
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT7.PCIE_INT_INTERFACE_IMUX_L_DELAY7 27_56
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT8.PCIE_INT_INTERFACE_IMUX_L_DELAY8 26_02
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT9.PCIE_INT_INTERFACE_IMUX_L_DELAY9 26_10
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT10.PCIE_INT_INTERFACE_IMUX_L_DELAY10 26_18
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT11.PCIE_INT_INTERFACE_IMUX_L_DELAY11 26_26
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT12.PCIE_INT_INTERFACE_IMUX_L_DELAY12 26_34
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT13.PCIE_INT_INTERFACE_IMUX_L_DELAY13 26_42
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT14.PCIE_INT_INTERFACE_IMUX_L_DELAY14 26_50
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT15.PCIE_INT_INTERFACE_IMUX_L_DELAY15 26_58
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT16.PCIE_INT_INTERFACE_IMUX_L_DELAY16 26_03
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT17.PCIE_INT_INTERFACE_IMUX_L_DELAY17 26_11
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT20.PCIE_INT_INTERFACE_IMUX_L_DELAY20 26_35
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT32.PCIE_INT_INTERFACE_IMUX_L_DELAY32 27_05
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT33.PCIE_INT_INTERFACE_IMUX_L_DELAY33 27_13
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT34.PCIE_INT_INTERFACE_IMUX_L_DELAY34 27_21
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT35.PCIE_INT_INTERFACE_IMUX_L_DELAY35 27_29
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT36.PCIE_INT_INTERFACE_IMUX_L_DELAY36 27_37
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT37.PCIE_INT_INTERFACE_IMUX_L_DELAY37 27_45
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT38.PCIE_INT_INTERFACE_IMUX_L_DELAY38 27_53
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT39.PCIE_INT_INTERFACE_IMUX_L_DELAY39 27_61

diff --git a/artix7/segbits_pcie_int_interface_l.origin_info.db b/artix7/segbits_pcie_int_interface_l.origin_info.db
new file mode 100644
index 0000000..466d7c5
--- /dev/null
+++ b/artix7/segbits_pcie_int_interface_l.origin_info.db

@@ -0,0 +1,27 @@
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT0.PCIE_INT_INTERFACE_IMUX_L_DELAY0 origin:062-pcie-int-pips 26_00
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT1.PCIE_INT_INTERFACE_IMUX_L_DELAY1 origin:062-pcie-int-pips 27_08
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT2.PCIE_INT_INTERFACE_IMUX_L_DELAY2 origin:062-pcie-int-pips 27_16
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT3.PCIE_INT_INTERFACE_IMUX_L_DELAY3 origin:062-pcie-int-pips 27_24
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT4.PCIE_INT_INTERFACE_IMUX_L_DELAY4 origin:062-pcie-int-pips 26_32
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT5.PCIE_INT_INTERFACE_IMUX_L_DELAY5 origin:062-pcie-int-pips 27_40
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT6.PCIE_INT_INTERFACE_IMUX_L_DELAY6 origin:062-pcie-int-pips 27_48
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT7.PCIE_INT_INTERFACE_IMUX_L_DELAY7 origin:062-pcie-int-pips 27_56
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT8.PCIE_INT_INTERFACE_IMUX_L_DELAY8 origin:062-pcie-int-pips 26_02
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT9.PCIE_INT_INTERFACE_IMUX_L_DELAY9 origin:062-pcie-int-pips 26_10
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT10.PCIE_INT_INTERFACE_IMUX_L_DELAY10 origin:062-pcie-int-pips 26_18
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT11.PCIE_INT_INTERFACE_IMUX_L_DELAY11 origin:062-pcie-int-pips 26_26
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT12.PCIE_INT_INTERFACE_IMUX_L_DELAY12 origin:062-pcie-int-pips 26_34
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT13.PCIE_INT_INTERFACE_IMUX_L_DELAY13 origin:062-pcie-int-pips 26_42
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT14.PCIE_INT_INTERFACE_IMUX_L_DELAY14 origin:062-pcie-int-pips 26_50
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT15.PCIE_INT_INTERFACE_IMUX_L_DELAY15 origin:062-pcie-int-pips 26_58
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT16.PCIE_INT_INTERFACE_IMUX_L_DELAY16 origin:062-pcie-int-pips 26_03
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT17.PCIE_INT_INTERFACE_IMUX_L_DELAY17 origin:062-pcie-int-pips 26_11
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT20.PCIE_INT_INTERFACE_IMUX_L_DELAY20 origin:062-pcie-int-pips 26_35
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT32.PCIE_INT_INTERFACE_IMUX_L_DELAY32 origin:062-pcie-int-pips 27_05
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT33.PCIE_INT_INTERFACE_IMUX_L_DELAY33 origin:062-pcie-int-pips 27_13
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT34.PCIE_INT_INTERFACE_IMUX_L_DELAY34 origin:062-pcie-int-pips 27_21
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT35.PCIE_INT_INTERFACE_IMUX_L_DELAY35 origin:062-pcie-int-pips 27_29
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT36.PCIE_INT_INTERFACE_IMUX_L_DELAY36 origin:062-pcie-int-pips 27_37
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT37.PCIE_INT_INTERFACE_IMUX_L_DELAY37 origin:062-pcie-int-pips 27_45
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT38.PCIE_INT_INTERFACE_IMUX_L_DELAY38 origin:062-pcie-int-pips 27_53
+PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT39.PCIE_INT_INTERFACE_IMUX_L_DELAY39 origin:062-pcie-int-pips 27_61

diff --git a/artix7/segbits_pcie_int_interface_r.db b/artix7/segbits_pcie_int_interface_r.db
new file mode 100644
index 0000000..9be753d
--- /dev/null
+++ b/artix7/segbits_pcie_int_interface_r.db

@@ -0,0 +1,34 @@
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT0.PCIE_INT_INTERFACE_IMUX_DELAY0 26_00
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT1.PCIE_INT_INTERFACE_IMUX_DELAY1 27_08
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT2.PCIE_INT_INTERFACE_IMUX_DELAY2 27_16
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT3.PCIE_INT_INTERFACE_IMUX_DELAY3 27_24
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT4.PCIE_INT_INTERFACE_IMUX_DELAY4 26_32
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT5.PCIE_INT_INTERFACE_IMUX_DELAY5 27_40
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT6.PCIE_INT_INTERFACE_IMUX_DELAY6 27_48
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT7.PCIE_INT_INTERFACE_IMUX_DELAY7 27_56
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT8.PCIE_INT_INTERFACE_IMUX_DELAY8 26_02
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT9.PCIE_INT_INTERFACE_IMUX_DELAY9 26_10
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT10.PCIE_INT_INTERFACE_IMUX_DELAY10 26_18
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT11.PCIE_INT_INTERFACE_IMUX_DELAY11 26_26
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT12.PCIE_INT_INTERFACE_IMUX_DELAY12 26_34
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT13.PCIE_INT_INTERFACE_IMUX_DELAY13 26_42
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT14.PCIE_INT_INTERFACE_IMUX_DELAY14 26_50
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT15.PCIE_INT_INTERFACE_IMUX_DELAY15 26_58
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT16.PCIE_INT_INTERFACE_IMUX_DELAY16 26_03
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT17.PCIE_INT_INTERFACE_IMUX_DELAY17 26_11
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT18.PCIE_INT_INTERFACE_IMUX_DELAY18 26_19
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT19.PCIE_INT_INTERFACE_IMUX_DELAY19 26_27
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT20.PCIE_INT_INTERFACE_IMUX_DELAY20 26_35
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT21.PCIE_INT_INTERFACE_IMUX_DELAY21 26_43
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT22.PCIE_INT_INTERFACE_IMUX_DELAY22 26_51
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT23.PCIE_INT_INTERFACE_IMUX_DELAY23 26_59
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT24.PCIE_INT_INTERFACE_IMUX_DELAY24 27_04
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT25.PCIE_INT_INTERFACE_IMUX_DELAY25 27_12
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT32.PCIE_INT_INTERFACE_IMUX_DELAY32 27_05
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT33.PCIE_INT_INTERFACE_IMUX_DELAY33 27_13
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT34.PCIE_INT_INTERFACE_IMUX_DELAY34 27_21
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT35.PCIE_INT_INTERFACE_IMUX_DELAY35 27_29
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT36.PCIE_INT_INTERFACE_IMUX_DELAY36 27_37
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT37.PCIE_INT_INTERFACE_IMUX_DELAY37 27_45
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT38.PCIE_INT_INTERFACE_IMUX_DELAY38 27_53
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT39.PCIE_INT_INTERFACE_IMUX_DELAY39 27_61

diff --git a/artix7/segbits_pcie_int_interface_r.origin_info.db b/artix7/segbits_pcie_int_interface_r.origin_info.db
new file mode 100644
index 0000000..958252d
--- /dev/null
+++ b/artix7/segbits_pcie_int_interface_r.origin_info.db

@@ -0,0 +1,34 @@
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT0.PCIE_INT_INTERFACE_IMUX_DELAY0 origin:062-pcie-int-pips 26_00
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT1.PCIE_INT_INTERFACE_IMUX_DELAY1 origin:062-pcie-int-pips 27_08
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT2.PCIE_INT_INTERFACE_IMUX_DELAY2 origin:062-pcie-int-pips 27_16
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT3.PCIE_INT_INTERFACE_IMUX_DELAY3 origin:062-pcie-int-pips 27_24
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT4.PCIE_INT_INTERFACE_IMUX_DELAY4 origin:062-pcie-int-pips 26_32
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT5.PCIE_INT_INTERFACE_IMUX_DELAY5 origin:062-pcie-int-pips 27_40
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT6.PCIE_INT_INTERFACE_IMUX_DELAY6 origin:062-pcie-int-pips 27_48
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT7.PCIE_INT_INTERFACE_IMUX_DELAY7 origin:062-pcie-int-pips 27_56
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT8.PCIE_INT_INTERFACE_IMUX_DELAY8 origin:062-pcie-int-pips 26_02
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT9.PCIE_INT_INTERFACE_IMUX_DELAY9 origin:062-pcie-int-pips 26_10
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT10.PCIE_INT_INTERFACE_IMUX_DELAY10 origin:062-pcie-int-pips 26_18
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT11.PCIE_INT_INTERFACE_IMUX_DELAY11 origin:062-pcie-int-pips 26_26
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT12.PCIE_INT_INTERFACE_IMUX_DELAY12 origin:062-pcie-int-pips 26_34
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT13.PCIE_INT_INTERFACE_IMUX_DELAY13 origin:062-pcie-int-pips 26_42
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT14.PCIE_INT_INTERFACE_IMUX_DELAY14 origin:062-pcie-int-pips 26_50
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT15.PCIE_INT_INTERFACE_IMUX_DELAY15 origin:062-pcie-int-pips 26_58
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT16.PCIE_INT_INTERFACE_IMUX_DELAY16 origin:062-pcie-int-pips 26_03
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT17.PCIE_INT_INTERFACE_IMUX_DELAY17 origin:062-pcie-int-pips 26_11
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT18.PCIE_INT_INTERFACE_IMUX_DELAY18 origin:062-pcie-int-pips 26_19
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT19.PCIE_INT_INTERFACE_IMUX_DELAY19 origin:062-pcie-int-pips 26_27
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT20.PCIE_INT_INTERFACE_IMUX_DELAY20 origin:062-pcie-int-pips 26_35
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT21.PCIE_INT_INTERFACE_IMUX_DELAY21 origin:062-pcie-int-pips 26_43
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT22.PCIE_INT_INTERFACE_IMUX_DELAY22 origin:062-pcie-int-pips 26_51
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT23.PCIE_INT_INTERFACE_IMUX_DELAY23 origin:062-pcie-int-pips 26_59
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT24.PCIE_INT_INTERFACE_IMUX_DELAY24 origin:062-pcie-int-pips 27_04
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT25.PCIE_INT_INTERFACE_IMUX_DELAY25 origin:062-pcie-int-pips 27_12
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT32.PCIE_INT_INTERFACE_IMUX_DELAY32 origin:062-pcie-int-pips 27_05
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT33.PCIE_INT_INTERFACE_IMUX_DELAY33 origin:062-pcie-int-pips 27_13
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT34.PCIE_INT_INTERFACE_IMUX_DELAY34 origin:062-pcie-int-pips 27_21
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT35.PCIE_INT_INTERFACE_IMUX_DELAY35 origin:062-pcie-int-pips 27_29
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT36.PCIE_INT_INTERFACE_IMUX_DELAY36 origin:062-pcie-int-pips 27_37
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT37.PCIE_INT_INTERFACE_IMUX_DELAY37 origin:062-pcie-int-pips 27_45
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT38.PCIE_INT_INTERFACE_IMUX_DELAY38 origin:062-pcie-int-pips 27_53
+PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT39.PCIE_INT_INTERFACE_IMUX_DELAY39 origin:062-pcie-int-pips 27_61

diff --git a/artix7/segbits_riob33.db b/artix7/segbits_riob33.db
index b07295c..9e24932 100644
--- a/artix7/segbits_riob33.db
+++ b/artix7/segbits_riob33.db

@@ -1,14 +1,21 @@
+RIOB33.DIFF.ZIBUF_LOW_PWR 38_44 39_83
 RIOB33.IOB_Y0.IBUFDISABLE.I 38_82
 RIOB33.IOB_Y0.IN_TERM.NONE !38_120 !38_122 !39_121 !39_123
 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 38_120 38_122 39_121 39_123
 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 !39_121 39_123
 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 !38_122 !39_121 39_123
 RIOB33.IOB_Y0.INTERMDISABLE.I 39_89
+RIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED 38_64 38_74 38_76 38_98 38_100 38_102 38_118 39_65 39_75 39_97 !39_101 39_113 39_119 39_125
+RIOB33.IOB_Y0.LVDS_25.IN 38_86 39_87
+RIOB33.IOB_Y0.LVDS_25.OUT 38_64 38_74 38_76 38_98 38_102 39_65 39_75 !39_101
 RIOB33.IOB_Y0.LVTTL.DRIVE.I24 38_64 !38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127
 RIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93
 RIOB33.IOB_Y0.PULLTYPE.NONE !38_92 38_94 !39_93
 RIOB33.IOB_Y0.PULLTYPE.PULLDOWN !38_92 !38_94 !39_93
 RIOB33.IOB_Y0.PULLTYPE.PULLUP !38_92 38_94 39_93
+RIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED 38_64 !38_74 !38_76 !38_98 !38_100 !38_102 38_118 39_65 !39_75 !39_97 39_101 39_113 39_119 39_125
+RIOB33.IOB_Y0.TMDS_33.IN 38_86 !39_87
+RIOB33.IOB_Y0.TMDS_33.OUT 38_64 !38_74 !38_76 !38_98 !38_102 39_65 !39_75 39_101
 RIOB33.IOB_Y0.ZIBUF_LOW_PWR 38_84
 RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 !39_127
 RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127

diff --git a/artix7/segbits_riob33.origin_info.db b/artix7/segbits_riob33.origin_info.db
index 8db23c8..d2b5b14 100644
--- a/artix7/segbits_riob33.origin_info.db
+++ b/artix7/segbits_riob33.origin_info.db

@@ -1,14 +1,21 @@
+RIOB33.DIFF.ZIBUF_LOW_PWR origin:030-iob 38_44 39_83
 RIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82
 RIOB33.IOB_Y0.IN_TERM.NONE origin:030-iob !38_120 !38_122 !39_121 !39_123
 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123
 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !39_121 38_120 38_122 39_123
 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_122 !39_121 38_120 39_123
 RIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89
+RIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED origin:030-iob !39_101 38_100 38_102 38_118 38_64 38_74 38_76 38_98 39_113 39_119 39_125 39_65 39_75 39_97
+RIOB33.IOB_Y0.LVDS_25.IN origin:030-iob 38_86 39_87
+RIOB33.IOB_Y0.LVDS_25.OUT origin:030-iob !39_101 38_102 38_64 38_74 38_76 38_98 39_65 39_75
 RIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65
 RIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94
 RIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94
 RIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93
 RIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93
+RIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED origin:030-iob !38_100 !38_102 !38_74 !38_76 !38_98 !39_75 !39_97 38_118 38_64 39_101 39_113 39_119 39_125 39_65
+RIOB33.IOB_Y0.TMDS_33.IN origin:030-iob !39_87 38_86
+RIOB33.IOB_Y0.TMDS_33.OUT origin:030-iob !38_102 !38_74 !38_76 !38_98 !39_75 38_64 39_101 39_65
 RIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84
 RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_113 39_125 39_65
 RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65

diff --git a/artix7/xc7a100t/tilegrid.json b/artix7/xc7a100t/tilegrid.json
index 54f3557..c55e7c1 100644
--- a/artix7/xc7a100t/tilegrid.json
+++ b/artix7/xc7a100t/tilegrid.json

@@ -176717,7 +176717,14 @@
         "type": "GTP_COMMON"
     },
     "GTP_INT_INTERFACE_X51Y0": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 207,
         "pin_functions": {},
@@ -176726,7 +176733,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y1": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 206,
         "pin_functions": {},
@@ -176735,7 +176749,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y2": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 205,
         "pin_functions": {},
@@ -176744,7 +176765,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y3": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 204,
         "pin_functions": {},
@@ -176753,7 +176781,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y4": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 203,
         "pin_functions": {},
@@ -176762,7 +176797,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y5": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 202,
         "pin_functions": {},
@@ -176771,7 +176813,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y6": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 201,
         "pin_functions": {},
@@ -176780,7 +176829,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y7": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 200,
         "pin_functions": {},
@@ -176789,7 +176845,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y8": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 199,
         "pin_functions": {},
@@ -176798,7 +176861,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y9": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 198,
         "pin_functions": {},
@@ -176807,7 +176877,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y10": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 197,
         "pin_functions": {},
@@ -176816,7 +176893,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y11": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 196,
         "pin_functions": {},
@@ -176825,7 +176909,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y12": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 195,
         "pin_functions": {},
@@ -176834,7 +176925,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y13": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 194,
         "pin_functions": {},
@@ -176843,7 +176941,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y14": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 193,
         "pin_functions": {},
@@ -176852,7 +176957,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y15": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 192,
         "pin_functions": {},
@@ -176861,7 +176973,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y16": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 191,
         "pin_functions": {},
@@ -176870,7 +176989,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y17": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 190,
         "pin_functions": {},
@@ -176879,7 +177005,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y18": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 189,
         "pin_functions": {},
@@ -176888,7 +177021,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y19": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 188,
         "pin_functions": {},
@@ -176897,7 +177037,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y20": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 187,
         "pin_functions": {},
@@ -176906,7 +177053,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y21": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 186,
         "pin_functions": {},
@@ -176915,7 +177069,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y22": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 185,
         "pin_functions": {},
@@ -176924,7 +177085,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y23": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 184,
         "pin_functions": {},
@@ -176933,7 +177101,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y24": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 183,
         "pin_functions": {},
@@ -176942,7 +177117,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y25": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 51,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 181,
         "pin_functions": {},
@@ -176951,7 +177133,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y26": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 53,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 180,
         "pin_functions": {},
@@ -176960,7 +177149,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y27": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 55,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 179,
         "pin_functions": {},
@@ -176969,7 +177165,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y28": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 57,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 178,
         "pin_functions": {},
@@ -176978,7 +177181,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y29": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 59,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 177,
         "pin_functions": {},
@@ -176987,7 +177197,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y30": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 61,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 176,
         "pin_functions": {},
@@ -176996,7 +177213,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y31": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 63,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 175,
         "pin_functions": {},
@@ -177005,7 +177229,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y32": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 65,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 174,
         "pin_functions": {},
@@ -177014,7 +177245,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y33": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 67,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 173,
         "pin_functions": {},
@@ -177023,7 +177261,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y34": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 69,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 172,
         "pin_functions": {},
@@ -177032,7 +177277,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y35": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 71,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 171,
         "pin_functions": {},
@@ -177041,7 +177293,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y36": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 73,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 170,
         "pin_functions": {},
@@ -177050,7 +177309,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y37": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 75,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 169,
         "pin_functions": {},
@@ -177059,7 +177325,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y38": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 77,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 168,
         "pin_functions": {},
@@ -177068,7 +177341,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y39": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 79,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 167,
         "pin_functions": {},
@@ -177077,7 +177357,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y40": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 81,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 166,
         "pin_functions": {},
@@ -177086,7 +177373,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y41": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 83,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 165,
         "pin_functions": {},
@@ -177095,7 +177389,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y42": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 85,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 164,
         "pin_functions": {},
@@ -177104,7 +177405,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y43": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 87,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 163,
         "pin_functions": {},
@@ -177113,7 +177421,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y44": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 89,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 162,
         "pin_functions": {},
@@ -177122,7 +177437,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y45": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 91,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 161,
         "pin_functions": {},
@@ -177131,7 +177453,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y46": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 93,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 160,
         "pin_functions": {},
@@ -177140,7 +177469,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y47": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 95,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 159,
         "pin_functions": {},
@@ -177149,7 +177485,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y48": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 97,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 158,
         "pin_functions": {},
@@ -177158,7 +177501,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y49": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00421980",
+                "frames": 28,
+                "offset": 99,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 157,
         "pin_functions": {},
@@ -177167,7 +177517,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y150": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 51,
         "pin_functions": {},
@@ -177176,7 +177533,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y151": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 50,
         "pin_functions": {},
@@ -177185,7 +177549,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y152": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 49,
         "pin_functions": {},
@@ -177194,7 +177565,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y153": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 48,
         "pin_functions": {},
@@ -177203,7 +177581,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y154": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 47,
         "pin_functions": {},
@@ -177212,7 +177597,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y155": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 46,
         "pin_functions": {},
@@ -177221,7 +177613,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y156": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 45,
         "pin_functions": {},
@@ -177230,7 +177629,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y157": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 44,
         "pin_functions": {},
@@ -177239,7 +177645,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y158": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 43,
         "pin_functions": {},
@@ -177248,7 +177661,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y159": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 42,
         "pin_functions": {},
@@ -177257,7 +177677,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y160": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 41,
         "pin_functions": {},
@@ -177266,7 +177693,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y161": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 40,
         "pin_functions": {},
@@ -177275,7 +177709,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y162": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 39,
         "pin_functions": {},
@@ -177284,7 +177725,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y163": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 38,
         "pin_functions": {},
@@ -177293,7 +177741,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y164": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 37,
         "pin_functions": {},
@@ -177302,7 +177757,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y165": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 36,
         "pin_functions": {},
@@ -177311,7 +177773,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y166": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 35,
         "pin_functions": {},
@@ -177320,7 +177789,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y167": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 34,
         "pin_functions": {},
@@ -177329,7 +177805,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y168": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 33,
         "pin_functions": {},
@@ -177338,7 +177821,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y169": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 32,
         "pin_functions": {},
@@ -177347,7 +177837,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y170": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 31,
         "pin_functions": {},
@@ -177356,7 +177853,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y171": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 30,
         "pin_functions": {},
@@ -177365,7 +177869,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y172": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 29,
         "pin_functions": {},
@@ -177374,7 +177885,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y173": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 28,
         "pin_functions": {},
@@ -177383,7 +177901,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y174": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 27,
         "pin_functions": {},
@@ -177392,7 +177917,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y175": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 51,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 25,
         "pin_functions": {},
@@ -177401,7 +177933,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y176": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 53,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 24,
         "pin_functions": {},
@@ -177410,7 +177949,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y177": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 55,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 23,
         "pin_functions": {},
@@ -177419,7 +177965,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y178": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 57,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 22,
         "pin_functions": {},
@@ -177428,7 +177981,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y179": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 59,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 21,
         "pin_functions": {},
@@ -177437,7 +177997,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y180": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 61,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 20,
         "pin_functions": {},
@@ -177446,7 +178013,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y181": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 63,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 19,
         "pin_functions": {},
@@ -177455,7 +178029,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y182": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 65,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 18,
         "pin_functions": {},
@@ -177464,7 +178045,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y183": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 67,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 17,
         "pin_functions": {},
@@ -177473,7 +178061,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y184": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 69,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 16,
         "pin_functions": {},
@@ -177482,7 +178077,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y185": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 71,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 15,
         "pin_functions": {},
@@ -177491,7 +178093,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y186": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 73,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 14,
         "pin_functions": {},
@@ -177500,7 +178109,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y187": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 75,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 13,
         "pin_functions": {},
@@ -177509,7 +178125,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y188": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 77,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 12,
         "pin_functions": {},
@@ -177518,7 +178141,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y189": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 79,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 11,
         "pin_functions": {},
@@ -177527,7 +178157,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y190": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 81,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 10,
         "pin_functions": {},
@@ -177536,7 +178173,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y191": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 83,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 9,
         "pin_functions": {},
@@ -177545,7 +178189,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y192": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 85,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 8,
         "pin_functions": {},
@@ -177554,7 +178205,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y193": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 87,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 7,
         "pin_functions": {},
@@ -177563,7 +178221,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y194": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 89,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 6,
         "pin_functions": {},
@@ -177572,7 +178237,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y195": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 91,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 5,
         "pin_functions": {},
@@ -177581,7 +178253,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y196": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 93,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 4,
         "pin_functions": {},
@@ -177590,7 +178269,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y197": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 95,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 3,
         "pin_functions": {},
@@ -177599,7 +178285,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y198": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 97,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 2,
         "pin_functions": {},
@@ -177608,7 +178301,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X51Y199": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021980",
+                "frames": 28,
+                "offset": 99,
+                "words": 2
+            }
+        },
         "grid_x": 127,
         "grid_y": 1,
         "pin_functions": {},
@@ -449339,7 +450039,14 @@
         "type": "PCIE_BOT"
     },
     "PCIE_INT_INTERFACE_L_X44Y150": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 51,
         "pin_functions": {},
@@ -449348,7 +450055,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y151": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 50,
         "pin_functions": {},
@@ -449357,7 +450071,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y152": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 49,
         "pin_functions": {},
@@ -449366,7 +450087,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y153": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 48,
         "pin_functions": {},
@@ -449375,7 +450103,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y154": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 47,
         "pin_functions": {},
@@ -449384,7 +450119,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y155": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 46,
         "pin_functions": {},
@@ -449393,7 +450135,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y156": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 45,
         "pin_functions": {},
@@ -449402,7 +450151,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y157": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 44,
         "pin_functions": {},
@@ -449411,7 +450167,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y158": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 43,
         "pin_functions": {},
@@ -449420,7 +450183,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y159": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 42,
         "pin_functions": {},
@@ -449429,7 +450199,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y160": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 41,
         "pin_functions": {},
@@ -449438,7 +450215,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y161": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 40,
         "pin_functions": {},
@@ -449447,7 +450231,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y162": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 39,
         "pin_functions": {},
@@ -449456,7 +450247,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y163": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 38,
         "pin_functions": {},
@@ -449465,7 +450263,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y164": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 37,
         "pin_functions": {},
@@ -449474,7 +450279,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y165": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 36,
         "pin_functions": {},
@@ -449483,7 +450295,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y166": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 35,
         "pin_functions": {},
@@ -449492,7 +450311,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y167": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 34,
         "pin_functions": {},
@@ -449501,7 +450327,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y168": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 33,
         "pin_functions": {},
@@ -449510,7 +450343,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y169": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 32,
         "pin_functions": {},
@@ -449519,7 +450359,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y170": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 31,
         "pin_functions": {},
@@ -449528,7 +450375,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y171": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 30,
         "pin_functions": {},
@@ -449537,7 +450391,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y172": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 29,
         "pin_functions": {},
@@ -449546,7 +450407,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y173": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 28,
         "pin_functions": {},
@@ -449555,7 +450423,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X44Y174": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021600",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "grid_x": 109,
         "grid_y": 27,
         "pin_functions": {},
@@ -449564,7 +450439,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_R_X41Y150": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 51,
         "pin_functions": {},
@@ -449573,7 +450455,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y151": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 50,
         "pin_functions": {},
@@ -449582,7 +450471,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y152": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 49,
         "pin_functions": {},
@@ -449591,7 +450487,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y153": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 48,
         "pin_functions": {},
@@ -449600,7 +450503,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y154": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 47,
         "pin_functions": {},
@@ -449609,7 +450519,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y155": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 46,
         "pin_functions": {},
@@ -449618,7 +450535,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y156": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 45,
         "pin_functions": {},
@@ -449627,7 +450551,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y157": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 44,
         "pin_functions": {},
@@ -449636,7 +450567,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y158": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 43,
         "pin_functions": {},
@@ -449645,7 +450583,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y159": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 42,
         "pin_functions": {},
@@ -449654,7 +450599,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y160": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 41,
         "pin_functions": {},
@@ -449663,7 +450615,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y161": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 40,
         "pin_functions": {},
@@ -449672,7 +450631,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y162": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 39,
         "pin_functions": {},
@@ -449681,7 +450647,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y163": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 38,
         "pin_functions": {},
@@ -449690,7 +450663,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y164": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 37,
         "pin_functions": {},
@@ -449699,7 +450679,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y165": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 36,
         "pin_functions": {},
@@ -449708,7 +450695,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y166": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 35,
         "pin_functions": {},
@@ -449717,7 +450711,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y167": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 34,
         "pin_functions": {},
@@ -449726,7 +450727,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y168": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 33,
         "pin_functions": {},
@@ -449735,7 +450743,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y169": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 32,
         "pin_functions": {},
@@ -449744,7 +450759,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y170": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 31,
         "pin_functions": {},
@@ -449753,7 +450775,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y171": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 30,
         "pin_functions": {},
@@ -449762,7 +450791,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y172": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 29,
         "pin_functions": {},
@@ -449771,7 +450807,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y173": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 28,
         "pin_functions": {},
@@ -449780,7 +450823,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X41Y174": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021480",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "grid_x": 103,
         "grid_y": 27,
         "pin_functions": {},

diff --git a/artix7/xc7a100tfgg484-2/package_pins.csv b/artix7/xc7a100tfgg484-2/package_pins.csv
new file mode 100644
index 0000000..1b027c4
--- /dev/null
+++ b/artix7/xc7a100tfgg484-2/package_pins.csv

@@ -0,0 +1,308 @@
+pin,bank,site,tile,pin_function
+A1,35,IOB_X1Y147,RIOB33_X57Y147,IO_L1N_T0_AD4N_35
+A4,216,OPAD_X0Y8,GTP_CHANNEL_0_X130Y162,MGTPTXN0_216
+A6,216,OPAD_X0Y12,GTP_CHANNEL_2_X130Y191,MGTPTXN2_216
+A8,216,IPAD_X1Y36,GTP_CHANNEL_0_X130Y162,MGTPRXN0_216
+A10,216,IPAD_X1Y54,GTP_CHANNEL_2_X130Y191,MGTPRXN2_216
+A13,16,IOB_X0Y180,LIOB33_X0Y179,IO_L10P_T1_16
+A14,16,IOB_X0Y179,LIOB33_X0Y179,IO_L10N_T1_16
+A15,16,IOB_X0Y182,LIOB33_X0Y181,IO_L9P_T1_DQS_16
+A16,16,IOB_X0Y181,LIOB33_X0Y181,IO_L9N_T1_DQS_16
+A18,16,IOB_X0Y166,LIOB33_X0Y165,IO_L17P_T2_16
+A19,16,IOB_X0Y165,LIOB33_X0Y165,IO_L17N_T2_16
+A20,16,IOB_X0Y167,LIOB33_X0Y167,IO_L16N_T2_16
+A21,16,IOB_X0Y157,LIOB33_X0Y157,IO_L21N_T3_DQS_16
+AA1,34,IOB_X1Y86,RIOB33_X57Y85,IO_L7P_T1_34
+AA3,34,IOB_X1Y81,RIOB33_X57Y81,IO_L9N_T1_DQS_34
+AA4,34,IOB_X1Y77,RIOB33_X57Y77,IO_L11N_T1_SRCC_34
+AA5,34,IOB_X1Y80,RIOB33_X57Y79,IO_L10P_T1_34
+AA6,34,IOB_X1Y63,RIOB33_X57Y63,IO_L18N_T2_34
+AA8,34,IOB_X1Y56,RIOB33_X57Y55,IO_L22P_T3_34
+AA9,13,IOB_X0Y34,LIOB33_X0Y33,IO_L8P_T1_13
+AA10,13,IOB_X0Y32,LIOB33_X0Y31,IO_L9P_T1_DQS_13
+AA11,13,IOB_X0Y31,LIOB33_X0Y31,IO_L9N_T1_DQS_13
+AA13,13,IOB_X0Y44,LIOB33_X0Y43,IO_L3P_T0_DQS_13
+AA14,13,IOB_X0Y39,LIOB33_X0Y39,IO_L5N_T0_13
+AA15,13,IOB_X0Y42,LIOB33_X0Y41,IO_L4P_T0_13
+AA16,13,IOB_X0Y47,LIOB33_X0Y47,IO_L1N_T0_13
+AA18,14,IOB_X0Y66,LIOB33_X0Y65,IO_L17P_T2_A14_D30_14
+AA19,14,IOB_X0Y70,LIOB33_X0Y69,IO_L15P_T2_DQS_RDWR_B_14
+AA20,14,IOB_X0Y84,LIOB33_X0Y83,IO_L8P_T1_D11_14
+AA21,14,IOB_X0Y83,LIOB33_X0Y83,IO_L8N_T1_D12_14
+AB1,34,IOB_X1Y85,RIOB33_X57Y85,IO_L7N_T1_34
+AB2,34,IOB_X1Y83,RIOB33_X57Y83,IO_L8N_T1_34
+AB3,34,IOB_X1Y84,RIOB33_X57Y83,IO_L8P_T1_34
+AB5,34,IOB_X1Y79,RIOB33_X57Y79,IO_L10N_T1_34
+AB6,34,IOB_X1Y59,RIOB33_X57Y59,IO_L20N_T3_34
+AB7,34,IOB_X1Y60,RIOB33_X57Y59,IO_L20P_T3_34
+AB8,34,IOB_X1Y55,RIOB33_X57Y55,IO_L22N_T3_34
+AB10,13,IOB_X0Y33,LIOB33_X0Y33,IO_L8N_T1_13
+AB11,13,IOB_X0Y36,LIOB33_X0Y35,IO_L7P_T1_13
+AB12,13,IOB_X0Y35,LIOB33_X0Y35,IO_L7N_T1_13
+AB13,13,IOB_X0Y43,LIOB33_X0Y43,IO_L3N_T0_DQS_13
+AB15,13,IOB_X0Y41,LIOB33_X0Y41,IO_L4N_T0_13
+AB16,13,IOB_X0Y46,LIOB33_X0Y45,IO_L2P_T0_13
+AB17,13,IOB_X0Y45,LIOB33_X0Y45,IO_L2N_T0_13
+AB18,14,IOB_X0Y65,LIOB33_X0Y65,IO_L17N_T2_A13_D29_14
+AB20,14,IOB_X0Y69,LIOB33_X0Y69,IO_L15N_T2_DQS_DOUT_CSO_B_14
+AB21,14,IOB_X0Y80,LIOB33_X0Y79,IO_L10P_T1_D14_14
+AB22,14,IOB_X0Y79,LIOB33_X0Y79,IO_L10N_T1_D15_14
+B1,35,IOB_X1Y148,RIOB33_X57Y147,IO_L1P_T0_AD4P_35
+B2,35,IOB_X1Y145,RIOB33_X57Y145,IO_L2N_T0_AD12N_35
+B4,216,OPAD_X0Y9,GTP_CHANNEL_0_X130Y162,MGTPTXP0_216
+B6,216,OPAD_X0Y13,GTP_CHANNEL_2_X130Y191,MGTPTXP2_216
+B8,216,IPAD_X1Y37,GTP_CHANNEL_0_X130Y162,MGTPRXP0_216
+B10,216,IPAD_X1Y55,GTP_CHANNEL_2_X130Y191,MGTPRXP2_216
+B13,16,IOB_X0Y183,LIOB33_X0Y183,IO_L8N_T1_16
+B15,16,IOB_X0Y186,LIOB33_X0Y185,IO_L7P_T1_16
+B16,16,IOB_X0Y185,LIOB33_X0Y185,IO_L7N_T1_16
+B17,16,IOB_X0Y178,LIOB33_X0Y177,IO_L11P_T1_SRCC_16
+B18,16,IOB_X0Y177,LIOB33_X0Y177,IO_L11N_T1_SRCC_16
+B20,16,IOB_X0Y168,LIOB33_X0Y167,IO_L16P_T2_16
+B21,16,IOB_X0Y158,LIOB33_X0Y157,IO_L21P_T3_DQS_16
+B22,16,IOB_X0Y159,LIOB33_X0Y159,IO_L20N_T3_16
+C2,35,IOB_X1Y146,RIOB33_X57Y145,IO_L2P_T0_AD12P_35
+C5,216,OPAD_X0Y10,GTP_CHANNEL_1_X130Y173,MGTPTXN1_216
+C7,216,OPAD_X0Y14,GTP_CHANNEL_3_X130Y202,MGTPTXN3_216
+C9,216,IPAD_X1Y60,GTP_CHANNEL_3_X130Y202,MGTPRXN3_216
+C11,216,IPAD_X1Y42,GTP_CHANNEL_1_X130Y173,MGTPRXN1_216
+C13,16,IOB_X0Y184,LIOB33_X0Y183,IO_L8P_T1_16
+C14,16,IOB_X0Y194,LIOB33_X0Y193,IO_L3P_T0_DQS_16
+C15,16,IOB_X0Y193,LIOB33_X0Y193,IO_L3N_T0_DQS_16
+C17,16,IOB_X0Y175,LIOB33_X0Y175,IO_L12N_T1_MRCC_16
+C18,16,IOB_X0Y174,LIOB33_X0Y173,IO_L13P_T2_MRCC_16
+C19,16,IOB_X0Y173,LIOB33_X0Y173,IO_L13N_T2_MRCC_16
+C20,16,IOB_X0Y161,LIOB33_X0Y161,IO_L19N_T3_VREF_16
+C22,16,IOB_X0Y160,LIOB33_X0Y159,IO_L20P_T3_16
+D1,35,IOB_X1Y143,RIOB33_X57Y143,IO_L3N_T0_DQS_AD5N_35
+D2,35,IOB_X1Y141,RIOB33_X57Y141,IO_L4N_T0_35
+D5,216,OPAD_X0Y11,GTP_CHANNEL_1_X130Y173,MGTPTXP1_216
+D7,216,OPAD_X0Y15,GTP_CHANNEL_3_X130Y202,MGTPTXP3_216
+D9,216,IPAD_X1Y61,GTP_CHANNEL_3_X130Y202,MGTPRXP3_216
+D11,216,IPAD_X1Y43,GTP_CHANNEL_1_X130Y173,MGTPRXP1_216
+D14,16,IOB_X0Y188,LIOB33_X0Y187,IO_L6P_T0_16
+D15,16,IOB_X0Y187,LIOB33_X0Y187,IO_L6N_T0_VREF_16
+D16,16,IOB_X0Y189,LIOB33_X0Y189,IO_L5N_T0_16
+D17,16,IOB_X0Y176,LIOB33_X0Y175,IO_L12P_T1_MRCC_16
+D19,16,IOB_X0Y171,LIOB33_X0Y171,IO_L14N_T2_SRCC_16
+D20,16,IOB_X0Y162,LIOB33_X0Y161,IO_L19P_T3_16
+D21,16,IOB_X0Y153,LIOB33_X0Y153,IO_L23N_T3_16
+D22,16,IOB_X0Y155,LIOB33_X0Y155,IO_L22N_T3_16
+E1,35,IOB_X1Y144,RIOB33_X57Y143,IO_L3P_T0_DQS_AD5P_35
+E2,35,IOB_X1Y142,RIOB33_X57Y141,IO_L4P_T0_35
+E3,35,IOB_X1Y137,RIOB33_X57Y137,IO_L6N_T0_VREF_35
+E6,216,IPAD_X1Y45,GTP_COMMON_X130Y179,MGTREFCLK0N_216
+E10,216,IPAD_X1Y47,GTP_COMMON_X130Y179,MGTREFCLK1N_216
+E13,16,IOB_X0Y192,LIOB33_X0Y191,IO_L4P_T0_16
+E14,16,IOB_X0Y191,LIOB33_X0Y191,IO_L4N_T0_16
+E16,16,IOB_X0Y190,LIOB33_X0Y189,IO_L5P_T0_16
+E17,16,IOB_X0Y195,LIOB33_X0Y195,IO_L2N_T0_16
+E18,16,IOB_X0Y169,LIOB33_X0Y169,IO_L15N_T2_DQS_16
+E19,16,IOB_X0Y172,LIOB33_X0Y171,IO_L14P_T2_SRCC_16
+E21,16,IOB_X0Y154,LIOB33_X0Y153,IO_L23P_T3_16
+E22,16,IOB_X0Y156,LIOB33_X0Y155,IO_L22P_T3_16
+F1,35,IOB_X1Y139,RIOB33_X57Y139,IO_L5N_T0_AD13N_35
+F3,35,IOB_X1Y138,RIOB33_X57Y137,IO_L6P_T0_35
+F4,35,IOB_X1Y149,RIOB33_SING_X57Y149,IO_0_35
+F6,216,IPAD_X1Y44,GTP_COMMON_X130Y179,MGTREFCLK0P_216
+F10,216,IPAD_X1Y46,GTP_COMMON_X130Y179,MGTREFCLK1P_216
+F13,16,IOB_X0Y198,LIOB33_X0Y197,IO_L1P_T0_16
+F14,16,IOB_X0Y197,LIOB33_X0Y197,IO_L1N_T0_16
+F15,16,IOB_X0Y199,LIOB33_SING_X0Y199,IO_0_16
+F16,16,IOB_X0Y196,LIOB33_X0Y195,IO_L2P_T0_16
+F18,16,IOB_X0Y170,LIOB33_X0Y169,IO_L15P_T2_DQS_16
+F19,16,IOB_X0Y164,LIOB33_X0Y163,IO_L18P_T2_16
+F20,16,IOB_X0Y163,LIOB33_X0Y163,IO_L18N_T2_16
+F21,16,IOB_X0Y150,LIOB33_SING_X0Y150,IO_25_16
+G1,35,IOB_X1Y140,RIOB33_X57Y139,IO_L5P_T0_AD13P_35
+G2,35,IOB_X1Y133,RIOB33_X57Y133,IO_L8N_T1_AD14N_35
+G3,35,IOB_X1Y127,RIOB33_X57Y127,IO_L11N_T1_SRCC_35
+G4,35,IOB_X1Y125,RIOB33_X57Y125,IO_L12N_T1_MRCC_35
+G13,15,IOB_X0Y147,LIOB33_X0Y147,IO_L1N_T0_AD0N_15
+G15,15,IOB_X0Y146,LIOB33_X0Y145,IO_L2P_T0_AD8P_15
+G16,15,IOB_X0Y145,LIOB33_X0Y145,IO_L2N_T0_AD8N_15
+G17,15,IOB_X0Y142,LIOB33_X0Y141,IO_L4P_T0_15
+G18,15,IOB_X0Y141,LIOB33_X0Y141,IO_L4N_T0_15
+G20,15,IOB_X0Y133,LIOB33_X0Y133,IO_L8N_T1_AD10N_15
+G21,16,IOB_X0Y152,LIOB33_X0Y151,IO_L24P_T3_16
+G22,16,IOB_X0Y151,LIOB33_X0Y151,IO_L24N_T3_16
+H2,35,IOB_X1Y134,RIOB33_X57Y133,IO_L8P_T1_AD14P_35
+H3,35,IOB_X1Y128,RIOB33_X57Y127,IO_L11P_T1_SRCC_35
+H4,35,IOB_X1Y126,RIOB33_X57Y125,IO_L12P_T1_MRCC_35
+H5,35,IOB_X1Y129,RIOB33_X57Y129,IO_L10N_T1_AD15N_35
+H13,15,IOB_X0Y148,LIOB33_X0Y147,IO_L1P_T0_AD0P_15
+H14,15,IOB_X0Y143,LIOB33_X0Y143,IO_L3N_T0_DQS_AD1N_15
+H15,15,IOB_X0Y139,LIOB33_X0Y139,IO_L5N_T0_AD9N_15
+H17,15,IOB_X0Y138,LIOB33_X0Y137,IO_L6P_T0_15
+H18,15,IOB_X0Y137,LIOB33_X0Y137,IO_L6N_T0_VREF_15
+H19,15,IOB_X0Y125,LIOB33_X0Y125,IO_L12N_T1_MRCC_15
+H20,15,IOB_X0Y134,LIOB33_X0Y133,IO_L8P_T1_AD10P_15
+H22,15,IOB_X0Y135,LIOB33_X0Y135,IO_L7N_T1_AD2N_15
+J1,35,IOB_X1Y135,RIOB33_X57Y135,IO_L7N_T1_AD6N_35
+J2,35,IOB_X1Y131,RIOB33_X57Y131,IO_L9N_T1_DQS_AD7N_35
+J4,35,IOB_X1Y123,RIOB33_X57Y123,IO_L13N_T2_MRCC_35
+J5,35,IOB_X1Y130,RIOB33_X57Y129,IO_L10P_T1_AD15P_35
+J6,35,IOB_X1Y115,RIOB33_X57Y115,IO_L17N_T2_35
+J14,15,IOB_X0Y144,LIOB33_X0Y143,IO_L3P_T0_DQS_AD1P_15
+J15,15,IOB_X0Y140,LIOB33_X0Y139,IO_L5P_T0_AD9P_15
+J16,15,IOB_X0Y149,LIOB33_SING_X0Y149,IO_0_15
+J17,15,IOB_X0Y107,LIOB33_X0Y107,IO_L21N_T3_DQS_A18_15
+J19,15,IOB_X0Y126,LIOB33_X0Y125,IO_L12P_T1_MRCC_15
+J20,15,IOB_X0Y128,LIOB33_X0Y127,IO_L11P_T1_SRCC_15
+J21,15,IOB_X0Y127,LIOB33_X0Y127,IO_L11N_T1_SRCC_15
+J22,15,IOB_X0Y136,LIOB33_X0Y135,IO_L7P_T1_AD2P_15
+K1,35,IOB_X1Y136,RIOB33_X57Y135,IO_L7P_T1_AD6P_35
+K2,35,IOB_X1Y132,RIOB33_X57Y131,IO_L9P_T1_DQS_AD7P_35
+K3,35,IOB_X1Y121,RIOB33_X57Y121,IO_L14N_T2_SRCC_35
+K4,35,IOB_X1Y124,RIOB33_X57Y123,IO_L13P_T2_MRCC_35
+K6,35,IOB_X1Y116,RIOB33_X57Y115,IO_L17P_T2_35
+K13,15,IOB_X0Y112,LIOB33_X0Y111,IO_L19P_T3_A22_15
+K14,15,IOB_X0Y111,LIOB33_X0Y111,IO_L19N_T3_A21_VREF_15
+K16,15,IOB_X0Y103,LIOB33_X0Y103,IO_L23N_T3_FWE_B_15
+K17,15,IOB_X0Y108,LIOB33_X0Y107,IO_L21P_T3_DQS_15
+K18,15,IOB_X0Y124,LIOB33_X0Y123,IO_L13P_T2_MRCC_15
+K19,15,IOB_X0Y123,LIOB33_X0Y123,IO_L13N_T2_MRCC_15
+K21,15,IOB_X0Y132,LIOB33_X0Y131,IO_L9P_T1_DQS_AD3P_15
+K22,15,IOB_X0Y131,LIOB33_X0Y131,IO_L9N_T1_DQS_AD3N_15
+L1,35,IOB_X1Y119,RIOB33_X57Y119,IO_L15N_T2_DQS_35
+L3,35,IOB_X1Y122,RIOB33_X57Y121,IO_L14P_T2_SRCC_35
+L4,35,IOB_X1Y113,RIOB33_X57Y113,IO_L18N_T2_35
+L5,35,IOB_X1Y114,RIOB33_X57Y113,IO_L18P_T2_35
+L6,35,IOB_X1Y100,RIOB33_SING_X57Y100,IO_25_35
+L10,0,IPAD_X0Y30,MONITOR_BOT_X46Y131,VP_0
+L13,15,IOB_X0Y109,LIOB33_X0Y109,IO_L20N_T3_A19_15
+L14,15,IOB_X0Y106,LIOB33_X0Y105,IO_L22P_T3_A17_15
+L15,15,IOB_X0Y105,LIOB33_X0Y105,IO_L22N_T3_A16_15
+L16,15,IOB_X0Y104,LIOB33_X0Y103,IO_L23P_T3_FOE_B_15
+L18,15,IOB_X0Y117,LIOB33_X0Y117,IO_L16N_T2_A27_15
+L19,15,IOB_X0Y122,LIOB33_X0Y121,IO_L14P_T2_SRCC_15
+L20,15,IOB_X0Y121,LIOB33_X0Y121,IO_L14N_T2_SRCC_15
+L21,15,IOB_X0Y129,LIOB33_X0Y129,IO_L10N_T1_AD11N_15
+M1,35,IOB_X1Y120,RIOB33_X57Y119,IO_L15P_T2_DQS_35
+M2,35,IOB_X1Y117,RIOB33_X57Y117,IO_L16N_T2_35
+M3,35,IOB_X1Y118,RIOB33_X57Y117,IO_L16P_T2_35
+M5,35,IOB_X1Y103,RIOB33_X57Y103,IO_L23N_T3_35
+M6,35,IOB_X1Y104,RIOB33_X57Y103,IO_L23P_T3_35
+M9,0,IPAD_X0Y31,MONITOR_BOT_X46Y131,VN_0
+M13,15,IOB_X0Y110,LIOB33_X0Y109,IO_L20P_T3_A20_15
+M15,15,IOB_X0Y102,LIOB33_X0Y101,IO_L24P_T3_RS1_15
+M16,15,IOB_X0Y101,LIOB33_X0Y101,IO_L24N_T3_RS0_15
+M17,15,IOB_X0Y100,LIOB33_SING_X0Y100,IO_25_15
+M18,15,IOB_X0Y118,LIOB33_X0Y117,IO_L16P_T2_A28_15
+M20,15,IOB_X0Y113,LIOB33_X0Y113,IO_L18N_T2_A23_15
+M21,15,IOB_X0Y130,LIOB33_X0Y129,IO_L10P_T1_AD11P_15
+M22,15,IOB_X0Y119,LIOB33_X0Y119,IO_L15N_T2_DQS_ADV_B_15
+N2,35,IOB_X1Y105,RIOB33_X57Y105,IO_L22N_T3_35
+N3,35,IOB_X1Y111,RIOB33_X57Y111,IO_L19N_T3_VREF_35
+N4,35,IOB_X1Y112,RIOB33_X57Y111,IO_L19P_T3_35
+N5,35,IOB_X1Y101,RIOB33_X57Y101,IO_L24N_T3_35
+N13,14,IOB_X0Y54,LIOB33_X0Y53,IO_L23P_T3_A03_D19_14
+N14,14,IOB_X0Y53,LIOB33_X0Y53,IO_L23N_T3_A02_D18_14
+N15,14,IOB_X0Y50,LIOB33_SING_X0Y50,IO_25_14
+N17,14,IOB_X0Y58,LIOB33_X0Y57,IO_L21P_T3_DQS_14
+N18,15,IOB_X0Y116,LIOB33_X0Y115,IO_L17P_T2_A26_15
+N19,15,IOB_X0Y115,LIOB33_X0Y115,IO_L17N_T2_A25_15
+N20,15,IOB_X0Y114,LIOB33_X0Y113,IO_L18P_T2_A24_15
+N22,15,IOB_X0Y120,LIOB33_X0Y119,IO_L15P_T2_DQS_15
+P1,35,IOB_X1Y109,RIOB33_X57Y109,IO_L20N_T3_35
+P2,35,IOB_X1Y106,RIOB33_X57Y105,IO_L22P_T3_35
+P4,35,IOB_X1Y107,RIOB33_X57Y107,IO_L21N_T3_DQS_35
+P5,35,IOB_X1Y108,RIOB33_X57Y107,IO_L21P_T3_DQS_35
+P6,35,IOB_X1Y102,RIOB33_X57Y101,IO_L24P_T3_35
+P14,14,IOB_X0Y62,LIOB33_X0Y61,IO_L19P_T3_A10_D26_14
+P15,14,IOB_X0Y56,LIOB33_X0Y55,IO_L22P_T3_A05_D21_14
+P16,14,IOB_X0Y52,LIOB33_X0Y51,IO_L24P_T3_A01_D17_14
+P17,14,IOB_X0Y57,LIOB33_X0Y57,IO_L21N_T3_DQS_A06_D22_14
+P19,14,IOB_X0Y90,LIOB33_X0Y89,IO_L5P_T0_D06_14
+P20,14,IOB_X0Y99,LIOB33_SING_X0Y99,IO_0_14
+P21,14,IOB_X0Y96,LIOB33_X0Y95,IO_L2P_T0_D02_14
+P22,14,IOB_X0Y98,LIOB33_X0Y97,IO_L1P_T0_D00_MOSI_14
+R1,35,IOB_X1Y110,RIOB33_X57Y109,IO_L20P_T3_35
+R2,34,IOB_X1Y93,RIOB33_X57Y93,IO_L3N_T0_DQS_34
+R3,34,IOB_X1Y94,RIOB33_X57Y93,IO_L3P_T0_DQS_34
+R4,34,IOB_X1Y74,RIOB33_X57Y73,IO_L13P_T2_MRCC_34
+R6,34,IOB_X1Y66,RIOB33_X57Y65,IO_L17P_T2_34
+R14,14,IOB_X0Y61,LIOB33_X0Y61,IO_L19N_T3_A09_D25_VREF_14
+R16,14,IOB_X0Y55,LIOB33_X0Y55,IO_L22N_T3_A04_D20_14
+R17,14,IOB_X0Y51,LIOB33_X0Y51,IO_L24N_T3_A00_D16_14
+R18,14,IOB_X0Y60,LIOB33_X0Y59,IO_L20P_T3_A08_D24_14
+R19,14,IOB_X0Y89,LIOB33_X0Y89,IO_L5N_T0_D07_14
+R21,14,IOB_X0Y95,LIOB33_X0Y95,IO_L2N_T0_D03_14
+R22,14,IOB_X0Y97,LIOB33_X0Y97,IO_L1N_T0_D01_DIN_14
+T1,34,IOB_X1Y98,RIOB33_X57Y97,IO_L1P_T0_34
+T3,34,IOB_X1Y99,RIOB33_SING_X57Y99,IO_0_34
+T4,34,IOB_X1Y73,RIOB33_X57Y73,IO_L13N_T2_MRCC_34
+T5,34,IOB_X1Y72,RIOB33_X57Y71,IO_L14P_T2_SRCC_34
+T6,34,IOB_X1Y65,RIOB33_X57Y65,IO_L17N_T2_34
+T14,13,IOB_X0Y20,LIOB33_X0Y19,IO_L15P_T2_DQS_13
+T15,13,IOB_X0Y19,LIOB33_X0Y19,IO_L15N_T2_DQS_13
+T16,13,IOB_X0Y16,LIOB33_X0Y15,IO_L17P_T2_13
+T18,14,IOB_X0Y59,LIOB33_X0Y59,IO_L20N_T3_A07_D23_14
+T19,14,IOB_X0Y88,LIOB33_X0Y87,IO_L6P_T0_FCS_B_14
+T20,14,IOB_X0Y87,LIOB33_X0Y87,IO_L6N_T0_D08_VREF_14
+T21,14,IOB_X0Y92,LIOB33_X0Y91,IO_L4P_T0_D04_14
+U1,34,IOB_X1Y97,RIOB33_X57Y97,IO_L1N_T0_34
+U2,34,IOB_X1Y96,RIOB33_X57Y95,IO_L2P_T0_34
+U3,34,IOB_X1Y88,RIOB33_X57Y87,IO_L6P_T0_34
+U5,34,IOB_X1Y71,RIOB33_X57Y71,IO_L14N_T2_SRCC_34
+U6,34,IOB_X1Y68,RIOB33_X57Y67,IO_L16P_T2_34
+U7,34,IOB_X1Y50,RIOB33_SING_X57Y50,IO_25_34
+U15,13,IOB_X0Y22,LIOB33_X0Y21,IO_L14P_T2_SRCC_13
+U16,13,IOB_X0Y15,LIOB33_X0Y15,IO_L17N_T2_13
+U17,14,IOB_X0Y64,LIOB33_X0Y63,IO_L18P_T2_A12_D28_14
+U18,14,IOB_X0Y63,LIOB33_X0Y63,IO_L18N_T2_A11_D27_14
+U20,14,IOB_X0Y78,LIOB33_X0Y77,IO_L11P_T1_SRCC_14
+U21,14,IOB_X0Y91,LIOB33_X0Y91,IO_L4N_T0_D05_14
+U22,14,IOB_X0Y94,LIOB33_X0Y93,IO_L3P_T0_DQS_PUDC_B_14
+V2,34,IOB_X1Y95,RIOB33_X57Y95,IO_L2N_T0_34
+V3,34,IOB_X1Y87,RIOB33_X57Y87,IO_L6N_T0_VREF_34
+V4,34,IOB_X1Y76,RIOB33_X57Y75,IO_L12P_T1_MRCC_34
+V5,34,IOB_X1Y67,RIOB33_X57Y67,IO_L16N_T2_34
+V7,34,IOB_X1Y62,RIOB33_X57Y61,IO_L19P_T3_34
+V8,34,IOB_X1Y57,RIOB33_X57Y57,IO_L21N_T3_DQS_34
+V9,34,IOB_X1Y58,RIOB33_X57Y57,IO_L21P_T3_DQS_34
+V10,13,IOB_X0Y30,LIOB33_X0Y29,IO_L10P_T1_13
+V13,13,IOB_X0Y24,LIOB33_X0Y23,IO_L13P_T2_MRCC_13
+V14,13,IOB_X0Y23,LIOB33_X0Y23,IO_L13N_T2_MRCC_13
+V15,13,IOB_X0Y21,LIOB33_X0Y21,IO_L14N_T2_SRCC_13
+V17,14,IOB_X0Y68,LIOB33_X0Y67,IO_L16P_T2_CSI_B_14
+V18,14,IOB_X0Y72,LIOB33_X0Y71,IO_L14P_T2_SRCC_14
+V19,14,IOB_X0Y71,LIOB33_X0Y71,IO_L14N_T2_SRCC_14
+V20,14,IOB_X0Y77,LIOB33_X0Y77,IO_L11N_T1_SRCC_14
+V22,14,IOB_X0Y93,LIOB33_X0Y93,IO_L3N_T0_DQS_EMCCLK_14
+W1,34,IOB_X1Y90,RIOB33_X57Y89,IO_L5P_T0_34
+W2,34,IOB_X1Y92,RIOB33_X57Y91,IO_L4P_T0_34
+W4,34,IOB_X1Y75,RIOB33_X57Y75,IO_L12N_T1_MRCC_34
+W5,34,IOB_X1Y69,RIOB33_X57Y69,IO_L15N_T2_DQS_34
+W6,34,IOB_X1Y70,RIOB33_X57Y69,IO_L15P_T2_DQS_34
+W7,34,IOB_X1Y61,RIOB33_X57Y61,IO_L19N_T3_VREF_34
+W9,34,IOB_X1Y52,RIOB33_X57Y51,IO_L24P_T3_34
+W10,13,IOB_X0Y29,LIOB33_X0Y29,IO_L10N_T1_13
+W11,13,IOB_X0Y26,LIOB33_X0Y25,IO_L12P_T1_MRCC_13
+W12,13,IOB_X0Y25,LIOB33_X0Y25,IO_L12N_T1_MRCC_13
+W14,13,IOB_X0Y38,LIOB33_X0Y37,IO_L6P_T0_13
+W15,13,IOB_X0Y18,LIOB33_X0Y17,IO_L16P_T2_13
+W16,13,IOB_X0Y17,LIOB33_X0Y17,IO_L16N_T2_13
+W17,14,IOB_X0Y67,LIOB33_X0Y67,IO_L16N_T2_A15_D31_14
+W19,14,IOB_X0Y76,LIOB33_X0Y75,IO_L12P_T1_MRCC_14
+W20,14,IOB_X0Y75,LIOB33_X0Y75,IO_L12N_T1_MRCC_14
+W21,14,IOB_X0Y86,LIOB33_X0Y85,IO_L7P_T1_D09_14
+W22,14,IOB_X0Y85,LIOB33_X0Y85,IO_L7N_T1_D10_14
+Y1,34,IOB_X1Y89,RIOB33_X57Y89,IO_L5N_T0_34
+Y2,34,IOB_X1Y91,RIOB33_X57Y91,IO_L4N_T0_34
+Y3,34,IOB_X1Y82,RIOB33_X57Y81,IO_L9P_T1_DQS_34
+Y4,34,IOB_X1Y78,RIOB33_X57Y77,IO_L11P_T1_SRCC_34
+Y6,34,IOB_X1Y64,RIOB33_X57Y63,IO_L18P_T2_34
+Y7,34,IOB_X1Y53,RIOB33_X57Y53,IO_L23N_T3_34
+Y8,34,IOB_X1Y54,RIOB33_X57Y53,IO_L23P_T3_34
+Y9,34,IOB_X1Y51,RIOB33_X57Y51,IO_L24N_T3_34
+Y11,13,IOB_X0Y28,LIOB33_X0Y27,IO_L11P_T1_SRCC_13
+Y12,13,IOB_X0Y27,LIOB33_X0Y27,IO_L11N_T1_SRCC_13
+Y13,13,IOB_X0Y40,LIOB33_X0Y39,IO_L5P_T0_13
+Y14,13,IOB_X0Y37,LIOB33_X0Y37,IO_L6N_T0_VREF_13
+Y16,13,IOB_X0Y48,LIOB33_X0Y47,IO_L1P_T0_13
+Y17,13,IOB_X0Y49,LIOB33_SING_X0Y49,IO_0_13
+Y18,14,IOB_X0Y74,LIOB33_X0Y73,IO_L13P_T2_MRCC_14
+Y19,14,IOB_X0Y73,LIOB33_X0Y73,IO_L13N_T2_MRCC_14
+Y21,14,IOB_X0Y82,LIOB33_X0Y81,IO_L9P_T1_DQS_14
+Y22,14,IOB_X0Y81,LIOB33_X0Y81,IO_L9N_T1_DQS_D13_14

diff --git a/artix7/xc7a100tfgg484-2/part.json b/artix7/xc7a100tfgg484-2/part.json
new file mode 100644
index 0000000..3a9350c
--- /dev/null
+++ b/artix7/xc7a100tfgg484-2/part.json

@@ -0,0 +1,772 @@
+{
+    "global_clock_regions": {
+        "bottom": {
+            "rows": {
+                "0": {
+                    "configuration_buses": {
+                        "BLOCK_RAM": {
+                            "configuration_columns": {
+                                "0": {
+                                    "frame_count": 128
+                                },
+                                "1": {
+                                    "frame_count": 128
+                                },
+                                "2": {
+                                    "frame_count": 128
+                                },
+                                "3": {
+                                    "frame_count": 128
+                                }
+                            }
+                        },
+                        "CLB_IO_CLK": {
+                            "configuration_columns": {
+                                "0": {
+                                    "frame_count": 42
+                                },
+                                "1": {
+                                    "frame_count": 30
+                                },
+                                "2": {
+                                    "frame_count": 36
+                                },
+                                "3": {
+                                    "frame_count": 36
+                                },
+                                "4": {
+                                    "frame_count": 36
+                                },
+                                "5": {
+                                    "frame_count": 36
+                                },
+                                "6": {
+                                    "frame_count": 28
+                                },
+                                "7": {
+                                    "frame_count": 36
+                                },
+                                "8": {
+                                    "frame_count": 36
+                                },
+                                "9": {
+                                    "frame_count": 28
+                                },
+                                "10": {
+                                    "frame_count": 36
+                                },
+                                "11": {
+                                    "frame_count": 36
+                                },
+                                "12": {
+                                    "frame_count": 36
+                                },
+                                "13": {
+                                    "frame_count": 36
+                                },
+                                "14": {
+                                    "frame_count": 36
+                                },
+                                "15": {
+                                    "frame_count": 36
+                                },
+                                "16": {
+                                    "frame_count": 36
+                                },
+                                "17": {
+                                    "frame_count": 36
+                                },
+                                "18": {
+                                    "frame_count": 30
+                                },
+                                "19": {
+                                    "frame_count": 36
+                                },
+                                "20": {
+                                    "frame_count": 36
+                                },
+                                "21": {
+                                    "frame_count": 36
+                                },
+                                "22": {
+                                    "frame_count": 36
+                                },
+                                "23": {
+                                    "frame_count": 36
+                                },
+                                "24": {
+                                    "frame_count": 36
+                                },
+                                "25": {
+                                    "frame_count": 36
+                                },
+                                "26": {
+                                    "frame_count": 36
+                                },
+                                "27": {
+                                    "frame_count": 36
+                                },
+                                "28": {
+                                    "frame_count": 36
+                                },
+                                "29": {
+                                    "frame_count": 36
+                                },
+                                "30": {
+                                    "frame_count": 36
+                                },
+                                "31": {
+                                    "frame_count": 30
+                                },
+                                "32": {
+                                    "frame_count": 36
+                                },
+                                "33": {
+                                    "frame_count": 36
+                                },
+                                "34": {
+                                    "frame_count": 36
+                                },
+                                "35": {
+                                    "frame_count": 28
+                                },
+                                "36": {
+                                    "frame_count": 36
+                                },
+                                "37": {
+                                    "frame_count": 36
+                                },
+                                "38": {
+                                    "frame_count": 28
+                                },
+                                "39": {
+                                    "frame_count": 36
+                                },
+                                "40": {
+                                    "frame_count": 36
+                                },
+                                "41": {
+                                    "frame_count": 36
+                                },
+                                "42": {
+                                    "frame_count": 36
+                                },
+                                "43": {
+                                    "frame_count": 36
+                                },
+                                "44": {
+                                    "frame_count": 28
+                                },
+                                "45": {
+                                    "frame_count": 36
+                                },
+                                "46": {
+                                    "frame_count": 36
+                                },
+                                "47": {
+                                    "frame_count": 36
+                                },
+                                "48": {
+                                    "frame_count": 28
+                                },
+                                "49": {
+                                    "frame_count": 36
+                                },
+                                "50": {
+                                    "frame_count": 36
+                                },
+                                "51": {
+                                    "frame_count": 28
+                                },
+                                "52": {
+                                    "frame_count": 36
+                                },
+                                "53": {
+                                    "frame_count": 36
+                                },
+                                "54": {
+                                    "frame_count": 36
+                                },
+                                "55": {
+                                    "frame_count": 36
+                                },
+                                "56": {
+                                    "frame_count": 30
+                                },
+                                "57": {
+                                    "frame_count": 42
+                                }
+                            }
+                        }
+                    }
+                },
+                "1": {
+                    "configuration_buses": {
+                        "BLOCK_RAM": {
+                            "configuration_columns": {
+                                "0": {
+                                    "frame_count": 128
+                                },
+                                "1": {
+                                    "frame_count": 128
+                                },
+                                "2": {
+                                    "frame_count": 128
+                                }
+                            }
+                        },
+                        "CLB_IO_CLK": {
+                            "configuration_columns": {
+                                "0": {
+                                    "frame_count": 42
+                                },
+                                "1": {
+                                    "frame_count": 30
+                                },
+                                "2": {
+                                    "frame_count": 36
+                                },
+                                "3": {
+                                    "frame_count": 36
+                                },
+                                "4": {
+                                    "frame_count": 36
+                                },
+                                "5": {
+                                    "frame_count": 36
+                                },
+                                "6": {
+                                    "frame_count": 28
+                                },
+                                "7": {
+                                    "frame_count": 36
+                                },
+                                "8": {
+                                    "frame_count": 36
+                                },
+                                "9": {
+                                    "frame_count": 28
+                                },
+                                "10": {
+                                    "frame_count": 36
+                                },
+                                "11": {
+                                    "frame_count": 36
+                                },
+                                "12": {
+                                    "frame_count": 36
+                                },
+                                "13": {
+                                    "frame_count": 36
+                                },
+                                "14": {
+                                    "frame_count": 36
+                                },
+                                "15": {
+                                    "frame_count": 36
+                                },
+                                "16": {
+                                    "frame_count": 36
+                                },
+                                "17": {
+                                    "frame_count": 36
+                                },
+                                "18": {
+                                    "frame_count": 30
+                                },
+                                "19": {
+                                    "frame_count": 36
+                                },
+                                "20": {
+                                    "frame_count": 36
+                                },
+                                "21": {
+                                    "frame_count": 36
+                                },
+                                "22": {
+                                    "frame_count": 36
+                                },
+                                "23": {
+                                    "frame_count": 36
+                                },
+                                "24": {
+                                    "frame_count": 36
+                                },
+                                "25": {
+                                    "frame_count": 36
+                                },
+                                "26": {
+                                    "frame_count": 36
+                                },
+                                "27": {
+                                    "frame_count": 36
+                                },
+                                "28": {
+                                    "frame_count": 36
+                                },
+                                "29": {
+                                    "frame_count": 36
+                                },
+                                "30": {
+                                    "frame_count": 36
+                                },
+                                "31": {
+                                    "frame_count": 30
+                                },
+                                "32": {
+                                    "frame_count": 36
+                                },
+                                "33": {
+                                    "frame_count": 36
+                                },
+                                "34": {
+                                    "frame_count": 36
+                                },
+                                "35": {
+                                    "frame_count": 28
+                                },
+                                "36": {
+                                    "frame_count": 36
+                                },
+                                "37": {
+                                    "frame_count": 36
+                                },
+                                "38": {
+                                    "frame_count": 28
+                                },
+                                "39": {
+                                    "frame_count": 36
+                                },
+                                "40": {
+                                    "frame_count": 36
+                                },
+                                "41": {
+                                    "frame_count": 36
+                                },
+                                "42": {
+                                    "frame_count": 36
+                                },
+                                "43": {
+                                    "frame_count": 36
+                                },
+                                "44": {
+                                    "frame_count": 28
+                                },
+                                "45": {
+                                    "frame_count": 36
+                                },
+                                "46": {
+                                    "frame_count": 36
+                                },
+                                "47": {
+                                    "frame_count": 36
+                                },
+                                "48": {
+                                    "frame_count": 28
+                                },
+                                "49": {
+                                    "frame_count": 36
+                                },
+                                "50": {
+                                    "frame_count": 36
+                                },
+                                "51": {
+                                    "frame_count": 32
+                                }
+                            }
+                        }
+                    }
+                }
+            }
+        },
+        "top": {
+            "rows": {
+                "0": {
+                    "configuration_buses": {
+                        "BLOCK_RAM": {
+                            "configuration_columns": {
+                                "0": {
+                                    "frame_count": 128
+                                },
+                                "1": {
+                                    "frame_count": 128
+                                },
+                                "2": {
+                                    "frame_count": 128
+                                },
+                                "3": {
+                                    "frame_count": 128
+                                }
+                            }
+                        },
+                        "CLB_IO_CLK": {
+                            "configuration_columns": {
+                                "0": {
+                                    "frame_count": 42
+                                },
+                                "1": {
+                                    "frame_count": 30
+                                },
+                                "2": {
+                                    "frame_count": 36
+                                },
+                                "3": {
+                                    "frame_count": 36
+                                },
+                                "4": {
+                                    "frame_count": 36
+                                },
+                                "5": {
+                                    "frame_count": 36
+                                },
+                                "6": {
+                                    "frame_count": 28
+                                },
+                                "7": {
+                                    "frame_count": 36
+                                },
+                                "8": {
+                                    "frame_count": 36
+                                },
+                                "9": {
+                                    "frame_count": 28
+                                },
+                                "10": {
+                                    "frame_count": 36
+                                },
+                                "11": {
+                                    "frame_count": 36
+                                },
+                                "12": {
+                                    "frame_count": 36
+                                },
+                                "13": {
+                                    "frame_count": 36
+                                },
+                                "14": {
+                                    "frame_count": 36
+                                },
+                                "15": {
+                                    "frame_count": 36
+                                },
+                                "16": {
+                                    "frame_count": 36
+                                },
+                                "17": {
+                                    "frame_count": 36
+                                },
+                                "18": {
+                                    "frame_count": 30
+                                },
+                                "19": {
+                                    "frame_count": 36
+                                },
+                                "20": {
+                                    "frame_count": 36
+                                },
+                                "21": {
+                                    "frame_count": 36
+                                },
+                                "22": {
+                                    "frame_count": 36
+                                },
+                                "23": {
+                                    "frame_count": 36
+                                },
+                                "24": {
+                                    "frame_count": 36
+                                },
+                                "25": {
+                                    "frame_count": 36
+                                },
+                                "26": {
+                                    "frame_count": 36
+                                },
+                                "27": {
+                                    "frame_count": 36
+                                },
+                                "28": {
+                                    "frame_count": 36
+                                },
+                                "29": {
+                                    "frame_count": 36
+                                },
+                                "30": {
+                                    "frame_count": 36
+                                },
+                                "31": {
+                                    "frame_count": 30
+                                },
+                                "32": {
+                                    "frame_count": 36
+                                },
+                                "33": {
+                                    "frame_count": 36
+                                },
+                                "34": {
+                                    "frame_count": 36
+                                },
+                                "35": {
+                                    "frame_count": 28
+                                },
+                                "36": {
+                                    "frame_count": 36
+                                },
+                                "37": {
+                                    "frame_count": 36
+                                },
+                                "38": {
+                                    "frame_count": 28
+                                },
+                                "39": {
+                                    "frame_count": 36
+                                },
+                                "40": {
+                                    "frame_count": 36
+                                },
+                                "41": {
+                                    "frame_count": 36
+                                },
+                                "42": {
+                                    "frame_count": 36
+                                },
+                                "43": {
+                                    "frame_count": 36
+                                },
+                                "44": {
+                                    "frame_count": 28
+                                },
+                                "45": {
+                                    "frame_count": 36
+                                },
+                                "46": {
+                                    "frame_count": 36
+                                },
+                                "47": {
+                                    "frame_count": 36
+                                },
+                                "48": {
+                                    "frame_count": 28
+                                },
+                                "49": {
+                                    "frame_count": 36
+                                },
+                                "50": {
+                                    "frame_count": 36
+                                },
+                                "51": {
+                                    "frame_count": 28
+                                },
+                                "52": {
+                                    "frame_count": 36
+                                },
+                                "53": {
+                                    "frame_count": 36
+                                },
+                                "54": {
+                                    "frame_count": 36
+                                },
+                                "55": {
+                                    "frame_count": 36
+                                },
+                                "56": {
+                                    "frame_count": 30
+                                },
+                                "57": {
+                                    "frame_count": 42
+                                }
+                            }
+                        }
+                    }
+                },
+                "1": {
+                    "configuration_buses": {
+                        "BLOCK_RAM": {
+                            "configuration_columns": {
+                                "0": {
+                                    "frame_count": 128
+                                },
+                                "1": {
+                                    "frame_count": 128
+                                },
+                                "2": {
+                                    "frame_count": 128
+                                }
+                            }
+                        },
+                        "CLB_IO_CLK": {
+                            "configuration_columns": {
+                                "0": {
+                                    "frame_count": 42
+                                },
+                                "1": {
+                                    "frame_count": 30
+                                },
+                                "2": {
+                                    "frame_count": 36
+                                },
+                                "3": {
+                                    "frame_count": 36
+                                },
+                                "4": {
+                                    "frame_count": 36
+                                },
+                                "5": {
+                                    "frame_count": 36
+                                },
+                                "6": {
+                                    "frame_count": 28
+                                },
+                                "7": {
+                                    "frame_count": 36
+                                },
+                                "8": {
+                                    "frame_count": 36
+                                },
+                                "9": {
+                                    "frame_count": 28
+                                },
+                                "10": {
+                                    "frame_count": 36
+                                },
+                                "11": {
+                                    "frame_count": 36
+                                },
+                                "12": {
+                                    "frame_count": 36
+                                },
+                                "13": {
+                                    "frame_count": 36
+                                },
+                                "14": {
+                                    "frame_count": 36
+                                },
+                                "15": {
+                                    "frame_count": 36
+                                },
+                                "16": {
+                                    "frame_count": 36
+                                },
+                                "17": {
+                                    "frame_count": 36
+                                },
+                                "18": {
+                                    "frame_count": 30
+                                },
+                                "19": {
+                                    "frame_count": 36
+                                },
+                                "20": {
+                                    "frame_count": 36
+                                },
+                                "21": {
+                                    "frame_count": 36
+                                },
+                                "22": {
+                                    "frame_count": 36
+                                },
+                                "23": {
+                                    "frame_count": 36
+                                },
+                                "24": {
+                                    "frame_count": 36
+                                },
+                                "25": {
+                                    "frame_count": 36
+                                },
+                                "26": {
+                                    "frame_count": 36
+                                },
+                                "27": {
+                                    "frame_count": 36
+                                },
+                                "28": {
+                                    "frame_count": 36
+                                },
+                                "29": {
+                                    "frame_count": 36
+                                },
+                                "30": {
+                                    "frame_count": 36
+                                },
+                                "31": {
+                                    "frame_count": 30
+                                },
+                                "32": {
+                                    "frame_count": 36
+                                },
+                                "33": {
+                                    "frame_count": 36
+                                },
+                                "34": {
+                                    "frame_count": 36
+                                },
+                                "35": {
+                                    "frame_count": 28
+                                },
+                                "36": {
+                                    "frame_count": 36
+                                },
+                                "37": {
+                                    "frame_count": 36
+                                },
+                                "38": {
+                                    "frame_count": 28
+                                },
+                                "39": {
+                                    "frame_count": 36
+                                },
+                                "40": {
+                                    "frame_count": 36
+                                },
+                                "41": {
+                                    "frame_count": 36
+                                },
+                                "42": {
+                                    "frame_count": 36
+                                },
+                                "43": {
+                                    "frame_count": 36
+                                },
+                                "44": {
+                                    "frame_count": 28
+                                },
+                                "45": {
+                                    "frame_count": 36
+                                },
+                                "46": {
+                                    "frame_count": 36
+                                },
+                                "47": {
+                                    "frame_count": 36
+                                },
+                                "48": {
+                                    "frame_count": 28
+                                },
+                                "49": {
+                                    "frame_count": 36
+                                },
+                                "50": {
+                                    "frame_count": 36
+                                },
+                                "51": {
+                                    "frame_count": 32
+                                }
+                            }
+                        }
+                    }
+                }
+            }
+        }
+    },
+    "idcode": 56823955,
+    "iobanks": {
+        "0": "X1Y130",
+        "13": "X1Y26",
+        "14": "X1Y78",
+        "15": "X1Y130",
+        "16": "X1Y182",
+        "34": "X146Y78",
+        "35": "X146Y130"
+    }
+}

diff --git a/artix7/xc7a100tfgg484-2/part.yaml b/artix7/xc7a100tfgg484-2/part.yaml
new file mode 100644
index 0000000..44833bb
--- /dev/null
+++ b/artix7/xc7a100tfgg484-2/part.yaml

@@ -0,0 +1,499 @@
+!<xilinx/xc7series/part>
+idcode: 0x3631093
+global_clock_regions:
+  top: !<xilinx/xc7series/global_clock_region>
+    rows:
+      0: !<xilinx/xc7series/row>
+        configuration_buses:
+          CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
+            configuration_columns:
+              0: !<xilinx/xc7series/configuration_column>
+                frame_count: 42
+              1: !<xilinx/xc7series/configuration_column>
+                frame_count: 30
+              2: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              3: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              4: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              5: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              6: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              7: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              8: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              9: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              10: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              11: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              12: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              13: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              14: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              15: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              16: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              17: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              18: !<xilinx/xc7series/configuration_column>
+                frame_count: 30
+              19: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              20: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              21: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              22: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              23: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              24: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              25: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              26: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              27: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              28: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              29: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              30: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              31: !<xilinx/xc7series/configuration_column>
+                frame_count: 30
+              32: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              33: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              34: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              35: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              36: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              37: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              38: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              39: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              40: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              41: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              42: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              43: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              44: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              45: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              46: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              47: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              48: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              49: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              50: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              51: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              52: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              53: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              54: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              55: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              56: !<xilinx/xc7series/configuration_column>
+                frame_count: 30
+              57: !<xilinx/xc7series/configuration_column>
+                frame_count: 42
+          BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
+            configuration_columns:
+              0: !<xilinx/xc7series/configuration_column>
+                frame_count: 128
+              1: !<xilinx/xc7series/configuration_column>
+                frame_count: 128
+              2: !<xilinx/xc7series/configuration_column>
+                frame_count: 128
+              3: !<xilinx/xc7series/configuration_column>
+                frame_count: 128
+      1: !<xilinx/xc7series/row>
+        configuration_buses:
+          CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
+            configuration_columns:
+              0: !<xilinx/xc7series/configuration_column>
+                frame_count: 42
+              1: !<xilinx/xc7series/configuration_column>
+                frame_count: 30
+              2: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              3: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              4: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              5: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              6: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              7: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              8: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              9: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              10: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              11: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              12: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              13: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              14: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              15: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              16: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              17: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              18: !<xilinx/xc7series/configuration_column>
+                frame_count: 30
+              19: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              20: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              21: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              22: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              23: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              24: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              25: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              26: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              27: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              28: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              29: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              30: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              31: !<xilinx/xc7series/configuration_column>
+                frame_count: 30
+              32: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              33: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              34: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              35: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              36: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              37: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              38: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              39: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              40: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              41: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              42: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              43: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              44: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              45: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              46: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              47: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              48: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              49: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              50: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              51: !<xilinx/xc7series/configuration_column>
+                frame_count: 32
+          BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
+            configuration_columns:
+              0: !<xilinx/xc7series/configuration_column>
+                frame_count: 128
+              1: !<xilinx/xc7series/configuration_column>
+                frame_count: 128
+              2: !<xilinx/xc7series/configuration_column>
+                frame_count: 128
+  bottom: !<xilinx/xc7series/global_clock_region>
+    rows:
+      0: !<xilinx/xc7series/row>
+        configuration_buses:
+          CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
+            configuration_columns:
+              0: !<xilinx/xc7series/configuration_column>
+                frame_count: 42
+              1: !<xilinx/xc7series/configuration_column>
+                frame_count: 30
+              2: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              3: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              4: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              5: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              6: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              7: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              8: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              9: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              10: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              11: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              12: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              13: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              14: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              15: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              16: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              17: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              18: !<xilinx/xc7series/configuration_column>
+                frame_count: 30
+              19: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              20: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              21: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              22: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              23: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              24: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              25: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              26: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              27: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              28: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              29: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              30: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              31: !<xilinx/xc7series/configuration_column>
+                frame_count: 30
+              32: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              33: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              34: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              35: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              36: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              37: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              38: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              39: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              40: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              41: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              42: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              43: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              44: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              45: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              46: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              47: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              48: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              49: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              50: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              51: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              52: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              53: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              54: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              55: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              56: !<xilinx/xc7series/configuration_column>
+                frame_count: 30
+              57: !<xilinx/xc7series/configuration_column>
+                frame_count: 42
+          BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
+            configuration_columns:
+              0: !<xilinx/xc7series/configuration_column>
+                frame_count: 128
+              1: !<xilinx/xc7series/configuration_column>
+                frame_count: 128
+              2: !<xilinx/xc7series/configuration_column>
+                frame_count: 128
+              3: !<xilinx/xc7series/configuration_column>
+                frame_count: 128
+      1: !<xilinx/xc7series/row>
+        configuration_buses:
+          CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
+            configuration_columns:
+              0: !<xilinx/xc7series/configuration_column>
+                frame_count: 42
+              1: !<xilinx/xc7series/configuration_column>
+                frame_count: 30
+              2: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              3: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              4: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              5: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              6: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              7: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              8: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              9: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              10: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              11: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              12: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              13: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              14: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              15: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              16: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              17: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              18: !<xilinx/xc7series/configuration_column>
+                frame_count: 30
+              19: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              20: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              21: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              22: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              23: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              24: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              25: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              26: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              27: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              28: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              29: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              30: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              31: !<xilinx/xc7series/configuration_column>
+                frame_count: 30
+              32: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              33: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              34: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              35: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              36: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              37: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              38: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              39: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              40: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              41: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              42: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              43: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              44: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              45: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              46: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              47: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              48: !<xilinx/xc7series/configuration_column>
+                frame_count: 28
+              49: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              50: !<xilinx/xc7series/configuration_column>
+                frame_count: 36
+              51: !<xilinx/xc7series/configuration_column>
+                frame_count: 32
+          BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
+            configuration_columns:
+              0: !<xilinx/xc7series/configuration_column>
+                frame_count: 128
+              1: !<xilinx/xc7series/configuration_column>
+                frame_count: 128
+              2: !<xilinx/xc7series/configuration_column>
+                frame_count: 128

diff --git a/artix7/xc7a200t/tilegrid.json b/artix7/xc7a200t/tilegrid.json
index 1b101d8..2068ee2 100644
--- a/artix7/xc7a200t/tilegrid.json
+++ b/artix7/xc7a200t/tilegrid.json

@@ -382290,7 +382290,14 @@
         "type": "GTP_COMMON_MID_RIGHT"
     },
     "GTP_INT_INTERFACE_L_X74Y0": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 259,
         "pin_functions": {},
@@ -382299,7 +382306,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y1": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 258,
         "pin_functions": {},
@@ -382308,7 +382322,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y2": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 257,
         "pin_functions": {},
@@ -382317,7 +382338,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y3": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 256,
         "pin_functions": {},
@@ -382326,7 +382354,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y4": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 255,
         "pin_functions": {},
@@ -382335,7 +382370,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y5": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 254,
         "pin_functions": {},
@@ -382344,7 +382386,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y6": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 253,
         "pin_functions": {},
@@ -382353,7 +382402,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y7": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 252,
         "pin_functions": {},
@@ -382362,7 +382418,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y8": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 251,
         "pin_functions": {},
@@ -382371,7 +382434,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y9": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 250,
         "pin_functions": {},
@@ -382380,7 +382450,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y10": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 249,
         "pin_functions": {},
@@ -382389,7 +382466,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y11": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 248,
         "pin_functions": {},
@@ -382398,7 +382482,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y12": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 247,
         "pin_functions": {},
@@ -382407,7 +382498,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y13": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 246,
         "pin_functions": {},
@@ -382416,7 +382514,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y14": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 245,
         "pin_functions": {},
@@ -382425,7 +382530,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y15": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 244,
         "pin_functions": {},
@@ -382434,7 +382546,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y16": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 243,
         "pin_functions": {},
@@ -382443,7 +382562,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y17": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 242,
         "pin_functions": {},
@@ -382452,7 +382578,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y18": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 241,
         "pin_functions": {},
@@ -382461,7 +382594,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y19": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 240,
         "pin_functions": {},
@@ -382470,7 +382610,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y20": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 239,
         "pin_functions": {},
@@ -382479,7 +382626,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y21": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 238,
         "pin_functions": {},
@@ -382488,7 +382642,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y22": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 237,
         "pin_functions": {},
@@ -382497,7 +382658,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y23": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 236,
         "pin_functions": {},
@@ -382506,7 +382674,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y24": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 235,
         "pin_functions": {},
@@ -382515,7 +382690,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y25": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 51,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 233,
         "pin_functions": {},
@@ -382524,7 +382706,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y26": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 53,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 232,
         "pin_functions": {},
@@ -382533,7 +382722,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y27": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 55,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 231,
         "pin_functions": {},
@@ -382542,7 +382738,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y28": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 57,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 230,
         "pin_functions": {},
@@ -382551,7 +382754,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y29": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 59,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 229,
         "pin_functions": {},
@@ -382560,7 +382770,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y30": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 61,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 228,
         "pin_functions": {},
@@ -382569,7 +382786,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y31": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 63,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 227,
         "pin_functions": {},
@@ -382578,7 +382802,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y32": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 65,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 226,
         "pin_functions": {},
@@ -382587,7 +382818,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y33": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 67,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 225,
         "pin_functions": {},
@@ -382596,7 +382834,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y34": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 69,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 224,
         "pin_functions": {},
@@ -382605,7 +382850,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y35": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 71,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 223,
         "pin_functions": {},
@@ -382614,7 +382866,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y36": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 73,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 222,
         "pin_functions": {},
@@ -382623,7 +382882,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y37": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 75,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 221,
         "pin_functions": {},
@@ -382632,7 +382898,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y38": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 77,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 220,
         "pin_functions": {},
@@ -382641,7 +382914,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y39": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 79,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 219,
         "pin_functions": {},
@@ -382650,7 +382930,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y40": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 81,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 218,
         "pin_functions": {},
@@ -382659,7 +382946,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y41": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 83,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 217,
         "pin_functions": {},
@@ -382668,7 +382962,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y42": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 85,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 216,
         "pin_functions": {},
@@ -382677,7 +382978,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y43": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 87,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 215,
         "pin_functions": {},
@@ -382686,7 +382994,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y44": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 89,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 214,
         "pin_functions": {},
@@ -382695,7 +383010,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y45": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 91,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 213,
         "pin_functions": {},
@@ -382704,7 +383026,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y46": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 93,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 212,
         "pin_functions": {},
@@ -382713,7 +383042,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y47": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 95,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 211,
         "pin_functions": {},
@@ -382722,7 +383058,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y48": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 97,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 210,
         "pin_functions": {},
@@ -382731,7 +383074,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y49": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00442500",
+                "frames": 28,
+                "offset": 99,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 209,
         "pin_functions": {},
@@ -382740,7 +383090,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y200": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 51,
         "pin_functions": {},
@@ -382749,7 +383106,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y201": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 50,
         "pin_functions": {},
@@ -382758,7 +383122,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y202": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 49,
         "pin_functions": {},
@@ -382767,7 +383138,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y203": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 48,
         "pin_functions": {},
@@ -382776,7 +383154,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y204": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 47,
         "pin_functions": {},
@@ -382785,7 +383170,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y205": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 46,
         "pin_functions": {},
@@ -382794,7 +383186,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y206": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 45,
         "pin_functions": {},
@@ -382803,7 +383202,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y207": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 44,
         "pin_functions": {},
@@ -382812,7 +383218,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y208": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 43,
         "pin_functions": {},
@@ -382821,7 +383234,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y209": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 42,
         "pin_functions": {},
@@ -382830,7 +383250,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y210": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 41,
         "pin_functions": {},
@@ -382839,7 +383266,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y211": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 40,
         "pin_functions": {},
@@ -382848,7 +383282,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y212": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 39,
         "pin_functions": {},
@@ -382857,7 +383298,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y213": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 38,
         "pin_functions": {},
@@ -382866,7 +383314,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y214": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 37,
         "pin_functions": {},
@@ -382875,7 +383330,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y215": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 36,
         "pin_functions": {},
@@ -382884,7 +383346,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y216": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 35,
         "pin_functions": {},
@@ -382893,7 +383362,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y217": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 34,
         "pin_functions": {},
@@ -382902,7 +383378,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y218": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 33,
         "pin_functions": {},
@@ -382911,7 +383394,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y219": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 32,
         "pin_functions": {},
@@ -382920,7 +383410,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y220": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 31,
         "pin_functions": {},
@@ -382929,7 +383426,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y221": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 30,
         "pin_functions": {},
@@ -382938,7 +383442,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y222": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 29,
         "pin_functions": {},
@@ -382947,7 +383458,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y223": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 28,
         "pin_functions": {},
@@ -382956,7 +383474,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y224": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 27,
         "pin_functions": {},
@@ -382965,7 +383490,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y225": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 51,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 25,
         "pin_functions": {},
@@ -382974,7 +383506,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y226": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 53,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 24,
         "pin_functions": {},
@@ -382983,7 +383522,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y227": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 55,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 23,
         "pin_functions": {},
@@ -382992,7 +383538,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y228": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 57,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 22,
         "pin_functions": {},
@@ -383001,7 +383554,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y229": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 59,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 21,
         "pin_functions": {},
@@ -383010,7 +383570,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y230": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 61,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 20,
         "pin_functions": {},
@@ -383019,7 +383586,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y231": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 63,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 19,
         "pin_functions": {},
@@ -383028,7 +383602,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y232": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 65,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 18,
         "pin_functions": {},
@@ -383037,7 +383618,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y233": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 67,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 17,
         "pin_functions": {},
@@ -383046,7 +383634,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y234": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 69,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 16,
         "pin_functions": {},
@@ -383055,7 +383650,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y235": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 71,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 15,
         "pin_functions": {},
@@ -383064,7 +383666,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y236": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 73,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 14,
         "pin_functions": {},
@@ -383073,7 +383682,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y237": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 75,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 13,
         "pin_functions": {},
@@ -383082,7 +383698,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y238": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 77,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 12,
         "pin_functions": {},
@@ -383091,7 +383714,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y239": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 79,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 11,
         "pin_functions": {},
@@ -383100,7 +383730,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y240": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 81,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 10,
         "pin_functions": {},
@@ -383109,7 +383746,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y241": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 83,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 9,
         "pin_functions": {},
@@ -383118,7 +383762,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y242": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 85,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 8,
         "pin_functions": {},
@@ -383127,7 +383778,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y243": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 87,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 7,
         "pin_functions": {},
@@ -383136,7 +383794,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y244": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 89,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 6,
         "pin_functions": {},
@@ -383145,7 +383810,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y245": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 91,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 5,
         "pin_functions": {},
@@ -383154,7 +383826,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y246": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 93,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 4,
         "pin_functions": {},
@@ -383163,7 +383842,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y247": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 95,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 3,
         "pin_functions": {},
@@ -383172,7 +383858,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y248": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 97,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 2,
         "pin_functions": {},
@@ -383181,7 +383874,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_L_X74Y249": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00022500",
+                "frames": 28,
+                "offset": 99,
+                "words": 2
+            }
+        },
         "grid_x": 185,
         "grid_y": 1,
         "pin_functions": {},
@@ -383190,7 +383890,14 @@
         "type": "GTP_INT_INTERFACE_L"
     },
     "GTP_INT_INTERFACE_R_X35Y0": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 259,
         "pin_functions": {},
@@ -383199,7 +383906,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y1": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 258,
         "pin_functions": {},
@@ -383208,7 +383922,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y2": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 257,
         "pin_functions": {},
@@ -383217,7 +383938,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y3": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 256,
         "pin_functions": {},
@@ -383226,7 +383954,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y4": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 255,
         "pin_functions": {},
@@ -383235,7 +383970,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y5": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 254,
         "pin_functions": {},
@@ -383244,7 +383986,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y6": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 253,
         "pin_functions": {},
@@ -383253,7 +384002,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y7": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 252,
         "pin_functions": {},
@@ -383262,7 +384018,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y8": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 251,
         "pin_functions": {},
@@ -383271,7 +384034,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y9": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 250,
         "pin_functions": {},
@@ -383280,7 +384050,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y10": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 249,
         "pin_functions": {},
@@ -383289,7 +384066,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y11": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 248,
         "pin_functions": {},
@@ -383298,7 +384082,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y12": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 247,
         "pin_functions": {},
@@ -383307,7 +384098,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y13": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 246,
         "pin_functions": {},
@@ -383316,7 +384114,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y14": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 245,
         "pin_functions": {},
@@ -383325,7 +384130,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y15": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 244,
         "pin_functions": {},
@@ -383334,7 +384146,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y16": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 243,
         "pin_functions": {},
@@ -383343,7 +384162,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y17": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 242,
         "pin_functions": {},
@@ -383352,7 +384178,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y18": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 241,
         "pin_functions": {},
@@ -383361,7 +384194,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y19": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 240,
         "pin_functions": {},
@@ -383370,7 +384210,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y20": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 239,
         "pin_functions": {},
@@ -383379,7 +384226,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y21": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 238,
         "pin_functions": {},
@@ -383388,7 +384242,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y22": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 237,
         "pin_functions": {},
@@ -383397,7 +384258,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y23": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 236,
         "pin_functions": {},
@@ -383406,7 +384274,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y24": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 235,
         "pin_functions": {},
@@ -383415,7 +384290,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y25": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 51,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 233,
         "pin_functions": {},
@@ -383424,7 +384306,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y26": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 53,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 232,
         "pin_functions": {},
@@ -383433,7 +384322,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y27": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 55,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 231,
         "pin_functions": {},
@@ -383442,7 +384338,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y28": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 57,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 230,
         "pin_functions": {},
@@ -383451,7 +384354,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y29": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 59,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 229,
         "pin_functions": {},
@@ -383460,7 +384370,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y30": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 61,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 228,
         "pin_functions": {},
@@ -383469,7 +384386,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y31": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 63,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 227,
         "pin_functions": {},
@@ -383478,7 +384402,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y32": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 65,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 226,
         "pin_functions": {},
@@ -383487,7 +384418,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y33": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 67,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 225,
         "pin_functions": {},
@@ -383496,7 +384434,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y34": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 69,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 224,
         "pin_functions": {},
@@ -383505,7 +384450,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y35": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 71,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 223,
         "pin_functions": {},
@@ -383514,7 +384466,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y36": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 73,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 222,
         "pin_functions": {},
@@ -383523,7 +384482,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y37": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 75,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 221,
         "pin_functions": {},
@@ -383532,7 +384498,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y38": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 77,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 220,
         "pin_functions": {},
@@ -383541,7 +384514,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y39": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 79,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 219,
         "pin_functions": {},
@@ -383550,7 +384530,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y40": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 81,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 218,
         "pin_functions": {},
@@ -383559,7 +384546,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y41": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 83,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 217,
         "pin_functions": {},
@@ -383568,7 +384562,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y42": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 85,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 216,
         "pin_functions": {},
@@ -383577,7 +384578,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y43": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 87,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 215,
         "pin_functions": {},
@@ -383586,7 +384594,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y44": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 89,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 214,
         "pin_functions": {},
@@ -383595,7 +384610,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y45": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 91,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 213,
         "pin_functions": {},
@@ -383604,7 +384626,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y46": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 93,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 212,
         "pin_functions": {},
@@ -383613,7 +384642,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y47": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 95,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 211,
         "pin_functions": {},
@@ -383622,7 +384658,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y48": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 97,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 210,
         "pin_functions": {},
@@ -383631,7 +384674,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y49": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441180",
+                "frames": 28,
+                "offset": 99,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 209,
         "pin_functions": {},
@@ -383640,7 +384690,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y200": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 51,
         "pin_functions": {},
@@ -383649,7 +384706,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y201": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 50,
         "pin_functions": {},
@@ -383658,7 +384722,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y202": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 49,
         "pin_functions": {},
@@ -383667,7 +384738,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y203": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 48,
         "pin_functions": {},
@@ -383676,7 +384754,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y204": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 47,
         "pin_functions": {},
@@ -383685,7 +384770,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y205": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 46,
         "pin_functions": {},
@@ -383694,7 +384786,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y206": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 45,
         "pin_functions": {},
@@ -383703,7 +384802,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y207": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 44,
         "pin_functions": {},
@@ -383712,7 +384818,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y208": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 43,
         "pin_functions": {},
@@ -383721,7 +384834,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y209": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 42,
         "pin_functions": {},
@@ -383730,7 +384850,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y210": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 41,
         "pin_functions": {},
@@ -383739,7 +384866,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y211": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 40,
         "pin_functions": {},
@@ -383748,7 +384882,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y212": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 39,
         "pin_functions": {},
@@ -383757,7 +384898,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y213": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 38,
         "pin_functions": {},
@@ -383766,7 +384914,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y214": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 37,
         "pin_functions": {},
@@ -383775,7 +384930,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y215": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 36,
         "pin_functions": {},
@@ -383784,7 +384946,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y216": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 35,
         "pin_functions": {},
@@ -383793,7 +384962,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y217": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 34,
         "pin_functions": {},
@@ -383802,7 +384978,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y218": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 33,
         "pin_functions": {},
@@ -383811,7 +384994,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y219": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 32,
         "pin_functions": {},
@@ -383820,7 +385010,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y220": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 31,
         "pin_functions": {},
@@ -383829,7 +385026,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y221": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 30,
         "pin_functions": {},
@@ -383838,7 +385042,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y222": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 29,
         "pin_functions": {},
@@ -383847,7 +385058,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y223": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 28,
         "pin_functions": {},
@@ -383856,7 +385074,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y224": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 27,
         "pin_functions": {},
@@ -383865,7 +385090,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y225": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 51,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 25,
         "pin_functions": {},
@@ -383874,7 +385106,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y226": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 53,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 24,
         "pin_functions": {},
@@ -383883,7 +385122,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y227": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 55,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 23,
         "pin_functions": {},
@@ -383892,7 +385138,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y228": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 57,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 22,
         "pin_functions": {},
@@ -383901,7 +385154,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y229": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 59,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 21,
         "pin_functions": {},
@@ -383910,7 +385170,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y230": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 61,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 20,
         "pin_functions": {},
@@ -383919,7 +385186,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y231": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 63,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 19,
         "pin_functions": {},
@@ -383928,7 +385202,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y232": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 65,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 18,
         "pin_functions": {},
@@ -383937,7 +385218,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y233": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 67,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 17,
         "pin_functions": {},
@@ -383946,7 +385234,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y234": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 69,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 16,
         "pin_functions": {},
@@ -383955,7 +385250,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y235": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 71,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 15,
         "pin_functions": {},
@@ -383964,7 +385266,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y236": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 73,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 14,
         "pin_functions": {},
@@ -383973,7 +385282,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y237": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 75,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 13,
         "pin_functions": {},
@@ -383982,7 +385298,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y238": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 77,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 12,
         "pin_functions": {},
@@ -383991,7 +385314,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y239": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 79,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 11,
         "pin_functions": {},
@@ -384000,7 +385330,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y240": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 81,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 10,
         "pin_functions": {},
@@ -384009,7 +385346,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y241": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 83,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 9,
         "pin_functions": {},
@@ -384018,7 +385362,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y242": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 85,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 8,
         "pin_functions": {},
@@ -384027,7 +385378,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y243": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 87,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 7,
         "pin_functions": {},
@@ -384036,7 +385394,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y244": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 89,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 6,
         "pin_functions": {},
@@ -384045,7 +385410,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y245": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 91,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 5,
         "pin_functions": {},
@@ -384054,7 +385426,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y246": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 93,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 4,
         "pin_functions": {},
@@ -384063,7 +385442,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y247": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 95,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 3,
         "pin_functions": {},
@@ -384072,7 +385458,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y248": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 97,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 2,
         "pin_functions": {},
@@ -384081,7 +385474,14 @@
         "type": "GTP_INT_INTERFACE_R"
     },
     "GTP_INT_INTERFACE_R_X35Y249": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021180",
+                "frames": 28,
+                "offset": 99,
+                "words": 2
+            }
+        },
         "grid_x": 90,
         "grid_y": 1,
         "pin_functions": {},
@@ -996233,7 +997633,14 @@
         "type": "PCIE_BOT"
     },
     "PCIE_INT_INTERFACE_L_X28Y200": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 51,
         "pin_functions": {},
@@ -996242,7 +997649,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y201": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 50,
         "pin_functions": {},
@@ -996251,7 +997665,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y202": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 49,
         "pin_functions": {},
@@ -996260,7 +997681,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y203": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 48,
         "pin_functions": {},
@@ -996269,7 +997697,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y204": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 47,
         "pin_functions": {},
@@ -996278,7 +997713,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y205": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 46,
         "pin_functions": {},
@@ -996287,7 +997729,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y206": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 45,
         "pin_functions": {},
@@ -996296,7 +997745,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y207": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 44,
         "pin_functions": {},
@@ -996305,7 +997761,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y208": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 43,
         "pin_functions": {},
@@ -996314,7 +997777,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y209": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 42,
         "pin_functions": {},
@@ -996323,7 +997793,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y210": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 41,
         "pin_functions": {},
@@ -996332,7 +997809,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y211": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 40,
         "pin_functions": {},
@@ -996341,7 +997825,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y212": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 39,
         "pin_functions": {},
@@ -996350,7 +997841,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y213": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 38,
         "pin_functions": {},
@@ -996359,7 +997857,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y214": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 37,
         "pin_functions": {},
@@ -996368,7 +997873,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y215": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 36,
         "pin_functions": {},
@@ -996377,7 +997889,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y216": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 35,
         "pin_functions": {},
@@ -996386,7 +997905,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y217": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 34,
         "pin_functions": {},
@@ -996395,7 +997921,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y218": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 33,
         "pin_functions": {},
@@ -996404,7 +997937,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y219": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 32,
         "pin_functions": {},
@@ -996413,7 +997953,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y220": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 31,
         "pin_functions": {},
@@ -996422,7 +997969,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y221": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 30,
         "pin_functions": {},
@@ -996431,7 +997985,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y222": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 29,
         "pin_functions": {},
@@ -996440,7 +998001,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y223": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 28,
         "pin_functions": {},
@@ -996449,7 +998017,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X28Y224": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020E00",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "grid_x": 72,
         "grid_y": 27,
         "pin_functions": {},
@@ -996458,7 +998033,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_R_X25Y200": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 51,
         "pin_functions": {},
@@ -996467,7 +998049,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y201": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 50,
         "pin_functions": {},
@@ -996476,7 +998065,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y202": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 49,
         "pin_functions": {},
@@ -996485,7 +998081,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y203": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 48,
         "pin_functions": {},
@@ -996494,7 +998097,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y204": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 47,
         "pin_functions": {},
@@ -996503,7 +998113,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y205": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 46,
         "pin_functions": {},
@@ -996512,7 +998129,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y206": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 45,
         "pin_functions": {},
@@ -996521,7 +998145,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y207": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 44,
         "pin_functions": {},
@@ -996530,7 +998161,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y208": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 43,
         "pin_functions": {},
@@ -996539,7 +998177,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y209": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 42,
         "pin_functions": {},
@@ -996548,7 +998193,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y210": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 41,
         "pin_functions": {},
@@ -996557,7 +998209,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y211": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 40,
         "pin_functions": {},
@@ -996566,7 +998225,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y212": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 39,
         "pin_functions": {},
@@ -996575,7 +998241,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y213": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 38,
         "pin_functions": {},
@@ -996584,7 +998257,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y214": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 37,
         "pin_functions": {},
@@ -996593,7 +998273,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y215": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 36,
         "pin_functions": {},
@@ -996602,7 +998289,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y216": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 35,
         "pin_functions": {},
@@ -996611,7 +998305,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y217": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 34,
         "pin_functions": {},
@@ -996620,7 +998321,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y218": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 33,
         "pin_functions": {},
@@ -996629,7 +998337,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y219": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 32,
         "pin_functions": {},
@@ -996638,7 +998353,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y220": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 31,
         "pin_functions": {},
@@ -996647,7 +998369,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y221": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 30,
         "pin_functions": {},
@@ -996656,7 +998385,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y222": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 29,
         "pin_functions": {},
@@ -996665,7 +998401,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y223": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 28,
         "pin_functions": {},
@@ -996674,7 +998417,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X25Y224": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020C80",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "grid_x": 66,
         "grid_y": 27,
         "pin_functions": {},

diff --git a/artix7/xc7a50t/tilegrid.json b/artix7/xc7a50t/tilegrid.json
index d5715cf..2e13c08 100644
--- a/artix7/xc7a50t/tilegrid.json
+++ b/artix7/xc7a50t/tilegrid.json

@@ -91891,7 +91891,14 @@
         "type": "GTP_COMMON"
     },
     "GTP_INT_INTERFACE_X37Y100": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 51,
         "pin_functions": {},
@@ -91900,7 +91907,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y101": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 50,
         "pin_functions": {},
@@ -91909,7 +91923,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y102": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 49,
         "pin_functions": {},
@@ -91918,7 +91939,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y103": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 48,
         "pin_functions": {},
@@ -91927,7 +91955,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y104": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 47,
         "pin_functions": {},
@@ -91936,7 +91971,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y105": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 46,
         "pin_functions": {},
@@ -91945,7 +91987,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y106": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 45,
         "pin_functions": {},
@@ -91954,7 +92003,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y107": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 44,
         "pin_functions": {},
@@ -91963,7 +92019,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y108": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 43,
         "pin_functions": {},
@@ -91972,7 +92035,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y109": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 42,
         "pin_functions": {},
@@ -91981,7 +92051,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y110": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 41,
         "pin_functions": {},
@@ -91990,7 +92067,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y111": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 40,
         "pin_functions": {},
@@ -91999,7 +92083,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y112": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 39,
         "pin_functions": {},
@@ -92008,7 +92099,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y113": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 38,
         "pin_functions": {},
@@ -92017,7 +92115,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y114": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 37,
         "pin_functions": {},
@@ -92026,7 +92131,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y115": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 36,
         "pin_functions": {},
@@ -92035,7 +92147,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y116": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 35,
         "pin_functions": {},
@@ -92044,7 +92163,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y117": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 34,
         "pin_functions": {},
@@ -92053,7 +92179,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y118": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 33,
         "pin_functions": {},
@@ -92062,7 +92195,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y119": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 32,
         "pin_functions": {},
@@ -92071,7 +92211,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y120": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 31,
         "pin_functions": {},
@@ -92080,7 +92227,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y121": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 30,
         "pin_functions": {},
@@ -92089,7 +92243,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y122": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 29,
         "pin_functions": {},
@@ -92098,7 +92259,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y123": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 28,
         "pin_functions": {},
@@ -92107,7 +92275,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y124": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 27,
         "pin_functions": {},
@@ -92116,7 +92291,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y125": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 51,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 25,
         "pin_functions": {},
@@ -92125,7 +92307,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y126": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 53,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 24,
         "pin_functions": {},
@@ -92134,7 +92323,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y127": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 55,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 23,
         "pin_functions": {},
@@ -92143,7 +92339,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y128": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 57,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 22,
         "pin_functions": {},
@@ -92152,7 +92355,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y129": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 59,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 21,
         "pin_functions": {},
@@ -92161,7 +92371,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y130": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 61,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 20,
         "pin_functions": {},
@@ -92170,7 +92387,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y131": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 63,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 19,
         "pin_functions": {},
@@ -92179,7 +92403,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y132": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 65,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 18,
         "pin_functions": {},
@@ -92188,7 +92419,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y133": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 67,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 17,
         "pin_functions": {},
@@ -92197,7 +92435,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y134": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 69,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 16,
         "pin_functions": {},
@@ -92206,7 +92451,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y135": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 71,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 15,
         "pin_functions": {},
@@ -92215,7 +92467,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y136": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 73,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 14,
         "pin_functions": {},
@@ -92224,7 +92483,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y137": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 75,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 13,
         "pin_functions": {},
@@ -92233,7 +92499,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y138": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 77,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 12,
         "pin_functions": {},
@@ -92242,7 +92515,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y139": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 79,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 11,
         "pin_functions": {},
@@ -92251,7 +92531,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y140": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 81,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 10,
         "pin_functions": {},
@@ -92260,7 +92547,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y141": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 83,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 9,
         "pin_functions": {},
@@ -92269,7 +92563,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y142": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 85,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 8,
         "pin_functions": {},
@@ -92278,7 +92579,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y143": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 87,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 7,
         "pin_functions": {},
@@ -92287,7 +92595,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y144": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 89,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 6,
         "pin_functions": {},
@@ -92296,7 +92611,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y145": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 91,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 5,
         "pin_functions": {},
@@ -92305,7 +92627,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y146": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 93,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 4,
         "pin_functions": {},
@@ -92314,7 +92643,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y147": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 95,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 3,
         "pin_functions": {},
@@ -92323,7 +92659,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y148": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 97,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 2,
         "pin_functions": {},
@@ -92332,7 +92675,14 @@
         "type": "GTP_INT_INTERFACE"
     },
     "GTP_INT_INTERFACE_X37Y149": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 99,
+                "words": 2
+            }
+        },
         "grid_x": 94,
         "grid_y": 1,
         "pin_functions": {},
@@ -251114,7 +251464,14 @@
         "type": "PCIE_BOT"
     },
     "PCIE_INT_INTERFACE_L_X30Y100": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 51,
         "pin_functions": {},
@@ -251123,7 +251480,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y101": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 50,
         "pin_functions": {},
@@ -251132,7 +251496,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y102": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 49,
         "pin_functions": {},
@@ -251141,7 +251512,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y103": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 48,
         "pin_functions": {},
@@ -251150,7 +251528,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y104": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 47,
         "pin_functions": {},
@@ -251159,7 +251544,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y105": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 46,
         "pin_functions": {},
@@ -251168,7 +251560,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y106": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 45,
         "pin_functions": {},
@@ -251177,7 +251576,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y107": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 44,
         "pin_functions": {},
@@ -251186,7 +251592,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y108": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 43,
         "pin_functions": {},
@@ -251195,7 +251608,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y109": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 42,
         "pin_functions": {},
@@ -251204,7 +251624,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y110": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 41,
         "pin_functions": {},
@@ -251213,7 +251640,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y111": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 40,
         "pin_functions": {},
@@ -251222,7 +251656,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y112": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 39,
         "pin_functions": {},
@@ -251231,7 +251672,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y113": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 38,
         "pin_functions": {},
@@ -251240,7 +251688,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y114": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 37,
         "pin_functions": {},
@@ -251249,7 +251704,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y115": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 36,
         "pin_functions": {},
@@ -251258,7 +251720,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y116": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 35,
         "pin_functions": {},
@@ -251267,7 +251736,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y117": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 34,
         "pin_functions": {},
@@ -251276,7 +251752,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y118": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 33,
         "pin_functions": {},
@@ -251285,7 +251768,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y119": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 32,
         "pin_functions": {},
@@ -251294,7 +251784,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y120": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 31,
         "pin_functions": {},
@@ -251303,7 +251800,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y121": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 30,
         "pin_functions": {},
@@ -251312,7 +251816,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y122": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 29,
         "pin_functions": {},
@@ -251321,7 +251832,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y123": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 28,
         "pin_functions": {},
@@ -251330,7 +251848,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_L_X30Y124": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020F00",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "grid_x": 76,
         "grid_y": 27,
         "pin_functions": {},
@@ -251339,7 +251864,14 @@
         "type": "PCIE_INT_INTERFACE_L"
     },
     "PCIE_INT_INTERFACE_R_X27Y100": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 51,
         "pin_functions": {},
@@ -251348,7 +251880,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y101": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 50,
         "pin_functions": {},
@@ -251357,7 +251896,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y102": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 49,
         "pin_functions": {},
@@ -251366,7 +251912,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y103": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 48,
         "pin_functions": {},
@@ -251375,7 +251928,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y104": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 47,
         "pin_functions": {},
@@ -251384,7 +251944,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y105": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 46,
         "pin_functions": {},
@@ -251393,7 +251960,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y106": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 45,
         "pin_functions": {},
@@ -251402,7 +251976,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y107": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 44,
         "pin_functions": {},
@@ -251411,7 +251992,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y108": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 43,
         "pin_functions": {},
@@ -251420,7 +252008,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y109": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 42,
         "pin_functions": {},
@@ -251429,7 +252024,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y110": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 41,
         "pin_functions": {},
@@ -251438,7 +252040,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y111": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 40,
         "pin_functions": {},
@@ -251447,7 +252056,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y112": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 39,
         "pin_functions": {},
@@ -251456,7 +252072,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y113": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 38,
         "pin_functions": {},
@@ -251465,7 +252088,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y114": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 37,
         "pin_functions": {},
@@ -251474,7 +252104,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y115": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 36,
         "pin_functions": {},
@@ -251483,7 +252120,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y116": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 35,
         "pin_functions": {},
@@ -251492,7 +252136,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y117": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 34,
         "pin_functions": {},
@@ -251501,7 +252152,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y118": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 33,
         "pin_functions": {},
@@ -251510,7 +252168,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y119": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 32,
         "pin_functions": {},
@@ -251519,7 +252184,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y120": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 31,
         "pin_functions": {},
@@ -251528,7 +252200,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y121": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 30,
         "pin_functions": {},
@@ -251537,7 +252216,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y122": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 29,
         "pin_functions": {},
@@ -251546,7 +252232,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y123": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 28,
         "pin_functions": {},
@@ -251555,7 +252248,14 @@
         "type": "PCIE_INT_INTERFACE_R"
     },
     "PCIE_INT_INTERFACE_R_X27Y124": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00020D80",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "grid_x": 70,
         "grid_y": 27,
         "pin_functions": {},

diff --git a/kintex7/mask_liob33.db b/kintex7/mask_liob33.db
index 1de8776..bf0a21e 100644
--- a/kintex7/mask_liob33.db
+++ b/kintex7/mask_liob33.db

@@ -17,11 +17,16 @@
 bit 38_44
 bit 38_62
 bit 38_64
+bit 38_74
+bit 38_76
 bit 38_82
 bit 38_84
 bit 38_86
 bit 38_92
 bit 38_94
+bit 38_98
+bit 38_100
+bit 38_102
 bit 38_106
 bit 38_110
 bit 38_112
@@ -45,12 +50,15 @@
 bit 39_61
 bit 39_63
 bit 39_65
+bit 39_75
 bit 39_83
 bit 39_85
 bit 39_87
 bit 39_89
 bit 39_93
 bit 39_95
+bit 39_97
+bit 39_101
 bit 39_105
 bit 39_107
 bit 39_109

diff --git a/kintex7/mask_riob33.db b/kintex7/mask_riob33.db
index 1de8776..bf0a21e 100644
--- a/kintex7/mask_riob33.db
+++ b/kintex7/mask_riob33.db

@@ -17,11 +17,16 @@
 bit 38_44
 bit 38_62
 bit 38_64
+bit 38_74
+bit 38_76
 bit 38_82
 bit 38_84
 bit 38_86
 bit 38_92
 bit 38_94
+bit 38_98
+bit 38_100
+bit 38_102
 bit 38_106
 bit 38_110
 bit 38_112
@@ -45,12 +50,15 @@
 bit 39_61
 bit 39_63
 bit 39_65
+bit 39_75
 bit 39_83
 bit 39_85
 bit 39_87
 bit 39_89
 bit 39_93
 bit 39_95
+bit 39_97
+bit 39_101
 bit 39_105
 bit 39_107
 bit 39_109

diff --git a/kintex7/segbits_dsp_l.db b/kintex7/segbits_dsp_l.db
index 55c2f6b..6b0e0f2 100644
--- a/kintex7/segbits_dsp_l.db
+++ b/kintex7/segbits_dsp_l.db

@@ -1,3 +1,159 @@
+DSP_L.DSP_0_CEAD.DSP_GND_L 26_63
+DSP_L.DSP_0_CEAD.DSP_VCC_L 27_62
+DSP_L.DSP_0_CEALUMODE.DSP_GND_L 27_51
+DSP_L.DSP_0_CEALUMODE.DSP_VCC_L 26_50
+DSP_L.DSP_0_CED.DSP_GND_L 27_72
+DSP_L.DSP_0_CED.DSP_VCC_L 26_72
+DSP_L.DSP_0_CEINMODE.DSP_GND_L 26_69
+DSP_L.DSP_0_CEINMODE.DSP_VCC_L 26_67
+DSP_L.DSP_0_RSTD.DSP_GND_L 27_96
+DSP_L.DSP_0_RSTD.DSP_VCC_L 27_85
+DSP_L.DSP_0_ALUMODE2.DSP_GND_L 27_56
+DSP_L.DSP_0_ALUMODE2.DSP_VCC_L 26_55
+DSP_L.DSP_0_ALUMODE3.DSP_GND_L 27_60
+DSP_L.DSP_0_ALUMODE3.DSP_VCC_L 26_53
+DSP_L.DSP_0_CARRYINSEL2.DSP_GND_L 26_17
+DSP_L.DSP_0_CARRYINSEL2.DSP_VCC_L 27_18
+DSP_L.DSP_0_D0.DSP_GND_L 26_65
+DSP_L.DSP_0_D0.DSP_VCC_L 27_64
+DSP_L.DSP_0_D1.DSP_GND_L 27_68
+DSP_L.DSP_0_D1.DSP_VCC_L 27_74
+DSP_L.DSP_0_D2.DSP_GND_L 27_71
+DSP_L.DSP_0_D2.DSP_VCC_L 27_70
+DSP_L.DSP_0_D3.DSP_GND_L 26_75
+DSP_L.DSP_0_D3.DSP_VCC_L 26_73
+DSP_L.DSP_0_D4.DSP_GND_L 27_78
+DSP_L.DSP_0_D4.DSP_VCC_L 26_77
+DSP_L.DSP_0_D5.DSP_GND_L 26_82
+DSP_L.DSP_0_D5.DSP_VCC_L 26_81
+DSP_L.DSP_0_D6.DSP_GND_L 26_89
+DSP_L.DSP_0_D6.DSP_VCC_L 27_89
+DSP_L.DSP_0_D7.DSP_GND_L 27_91
+DSP_L.DSP_0_D7.DSP_VCC_L 26_91
+DSP_L.DSP_0_D8.DSP_GND_L 26_98
+DSP_L.DSP_0_D8.DSP_VCC_L 27_97
+DSP_L.DSP_0_D9.DSP_GND_L 26_101
+DSP_L.DSP_0_D9.DSP_VCC_L 26_99
+DSP_L.DSP_0_D10.DSP_GND_L 26_105
+DSP_L.DSP_0_D10.DSP_VCC_L 26_103
+DSP_L.DSP_0_D11.DSP_GND_L 27_107
+DSP_L.DSP_0_D11.DSP_VCC_L 27_105
+DSP_L.DSP_0_D12.DSP_GND_L 26_107
+DSP_L.DSP_0_D12.DSP_VCC_L 26_111
+DSP_L.DSP_0_D13.DSP_GND_L 27_113
+DSP_L.DSP_0_D13.DSP_VCC_L 26_114
+DSP_L.DSP_0_D14.DSP_GND_L 26_118
+DSP_L.DSP_0_D14.DSP_VCC_L 27_116
+DSP_L.DSP_0_D15.DSP_GND_L 27_122
+DSP_L.DSP_0_D15.DSP_VCC_L 27_120
+DSP_L.DSP_0_D16.DSP_GND_L 27_125
+DSP_L.DSP_0_D16.DSP_VCC_L 26_125
+DSP_L.DSP_0_D17.DSP_GND_L 27_128
+DSP_L.DSP_0_D17.DSP_VCC_L 27_126
+DSP_L.DSP_0_D18.DSP_GND_L 26_135
+DSP_L.DSP_0_D18.DSP_VCC_L 26_131
+DSP_L.DSP_0_D19.DSP_GND_L 27_140
+DSP_L.DSP_0_D19.DSP_VCC_L 26_140
+DSP_L.DSP_0_D20.DSP_GND_L 26_145
+DSP_L.DSP_0_D20.DSP_VCC_L 27_143
+DSP_L.DSP_0_D21.DSP_GND_L 27_147
+DSP_L.DSP_0_D21.DSP_VCC_L 26_147
+DSP_L.DSP_0_D22.DSP_GND_L 27_151
+DSP_L.DSP_0_D22.DSP_VCC_L 26_150
+DSP_L.DSP_0_D23.DSP_GND_L 27_154
+DSP_L.DSP_0_D23.DSP_VCC_L 27_153
+DSP_L.DSP_0_D24.DSP_GND_L 27_158
+DSP_L.DSP_0_D24.DSP_VCC_L 27_155
+DSP_L.DSP_0_INMODE0.DSP_GND_L 27_134
+DSP_L.DSP_0_INMODE0.DSP_VCC_L 27_130
+DSP_L.DSP_0_INMODE1.DSP_GND_L 26_133
+DSP_L.DSP_0_INMODE1.DSP_VCC_L 27_145
+DSP_L.DSP_0_INMODE2.DSP_GND_L 27_80
+DSP_L.DSP_0_INMODE2.DSP_VCC_L 26_71
+DSP_L.DSP_0_INMODE3.DSP_GND_L 27_79
+DSP_L.DSP_0_INMODE3.DSP_VCC_L 26_70
+DSP_L.DSP_0_INMODE4.DSP_GND_L 26_58
+DSP_L.DSP_0_INMODE4.DSP_VCC_L 26_46
+DSP_L.DSP_0_OPMODE6.DSP_GND_L 27_12
+DSP_L.DSP_0_OPMODE6.DSP_VCC_L 27_20
+DSP_L.DSP_1_CEAD.DSP_GND_L 26_223
+DSP_L.DSP_1_CEAD.DSP_VCC_L 27_222
+DSP_L.DSP_1_CEALUMODE.DSP_GND_L 27_211
+DSP_L.DSP_1_CEALUMODE.DSP_VCC_L 26_210
+DSP_L.DSP_1_CED.DSP_GND_L 27_232
+DSP_L.DSP_1_CED.DSP_VCC_L 26_232
+DSP_L.DSP_1_CEINMODE.DSP_GND_L 26_229
+DSP_L.DSP_1_CEINMODE.DSP_VCC_L 26_227
+DSP_L.DSP_1_RSTD.DSP_GND_L 27_256
+DSP_L.DSP_1_RSTD.DSP_VCC_L 27_245
+DSP_L.DSP_1_ALUMODE2.DSP_GND_L 27_216
+DSP_L.DSP_1_ALUMODE2.DSP_VCC_L 26_215
+DSP_L.DSP_1_ALUMODE3.DSP_GND_L 27_220
+DSP_L.DSP_1_ALUMODE3.DSP_VCC_L 26_213
+DSP_L.DSP_1_CARRYINSEL2.DSP_GND_L 26_177
+DSP_L.DSP_1_CARRYINSEL2.DSP_VCC_L 27_178
+DSP_L.DSP_1_D0.DSP_GND_L 26_225
+DSP_L.DSP_1_D0.DSP_VCC_L 27_224
+DSP_L.DSP_1_D1.DSP_GND_L 27_228
+DSP_L.DSP_1_D1.DSP_VCC_L 27_234
+DSP_L.DSP_1_D2.DSP_GND_L 27_231
+DSP_L.DSP_1_D2.DSP_VCC_L 27_230
+DSP_L.DSP_1_D3.DSP_GND_L 26_235
+DSP_L.DSP_1_D3.DSP_VCC_L 26_233
+DSP_L.DSP_1_D4.DSP_GND_L 27_238
+DSP_L.DSP_1_D4.DSP_VCC_L 26_237
+DSP_L.DSP_1_D5.DSP_GND_L 26_242
+DSP_L.DSP_1_D5.DSP_VCC_L 26_241
+DSP_L.DSP_1_D6.DSP_GND_L 26_249
+DSP_L.DSP_1_D6.DSP_VCC_L 27_249
+DSP_L.DSP_1_D7.DSP_GND_L 27_251
+DSP_L.DSP_1_D7.DSP_VCC_L 26_251
+DSP_L.DSP_1_D8.DSP_GND_L 26_258
+DSP_L.DSP_1_D8.DSP_VCC_L 27_257
+DSP_L.DSP_1_D9.DSP_GND_L 26_261
+DSP_L.DSP_1_D9.DSP_VCC_L 26_259
+DSP_L.DSP_1_D10.DSP_GND_L 26_265
+DSP_L.DSP_1_D10.DSP_VCC_L 26_263
+DSP_L.DSP_1_D11.DSP_GND_L 27_267
+DSP_L.DSP_1_D11.DSP_VCC_L 27_265
+DSP_L.DSP_1_D12.DSP_GND_L 26_267
+DSP_L.DSP_1_D12.DSP_VCC_L 26_271
+DSP_L.DSP_1_D13.DSP_GND_L 27_273
+DSP_L.DSP_1_D13.DSP_VCC_L 26_274
+DSP_L.DSP_1_D14.DSP_GND_L 26_278
+DSP_L.DSP_1_D14.DSP_VCC_L 27_276
+DSP_L.DSP_1_D15.DSP_GND_L 27_282
+DSP_L.DSP_1_D15.DSP_VCC_L 27_280
+DSP_L.DSP_1_D16.DSP_GND_L 27_285
+DSP_L.DSP_1_D16.DSP_VCC_L 26_285
+DSP_L.DSP_1_D17.DSP_GND_L 27_288
+DSP_L.DSP_1_D17.DSP_VCC_L 27_286
+DSP_L.DSP_1_D18.DSP_GND_L 26_295
+DSP_L.DSP_1_D18.DSP_VCC_L 26_291
+DSP_L.DSP_1_D19.DSP_GND_L 27_300
+DSP_L.DSP_1_D19.DSP_VCC_L 26_300
+DSP_L.DSP_1_D20.DSP_GND_L 26_305
+DSP_L.DSP_1_D20.DSP_VCC_L 27_303
+DSP_L.DSP_1_D21.DSP_GND_L 27_307
+DSP_L.DSP_1_D21.DSP_VCC_L 26_307
+DSP_L.DSP_1_D22.DSP_GND_L 27_311
+DSP_L.DSP_1_D22.DSP_VCC_L 26_310
+DSP_L.DSP_1_D23.DSP_GND_L 27_314
+DSP_L.DSP_1_D23.DSP_VCC_L 27_313
+DSP_L.DSP_1_D24.DSP_GND_L 27_318
+DSP_L.DSP_1_D24.DSP_VCC_L 27_315
+DSP_L.DSP_1_INMODE0.DSP_GND_L 27_294
+DSP_L.DSP_1_INMODE0.DSP_VCC_L 27_290
+DSP_L.DSP_1_INMODE1.DSP_GND_L 26_293
+DSP_L.DSP_1_INMODE1.DSP_VCC_L 27_305
+DSP_L.DSP_1_INMODE2.DSP_GND_L 27_240
+DSP_L.DSP_1_INMODE2.DSP_VCC_L 26_231
+DSP_L.DSP_1_INMODE3.DSP_GND_L 27_239
+DSP_L.DSP_1_INMODE3.DSP_VCC_L 26_230
+DSP_L.DSP_1_INMODE4.DSP_GND_L 26_218
+DSP_L.DSP_1_INMODE4.DSP_VCC_L 26_206
+DSP_L.DSP_1_OPMODE6.DSP_GND_L 27_172
+DSP_L.DSP_1_OPMODE6.DSP_VCC_L 27_180
 DSP_L.DSP48.DSP_0.A_INPUT[0] 27_84
 DSP_L.DSP48.DSP_0.AREG_0 26_113 26_137 27_111
 DSP_L.DSP48.DSP_0.AREG_2 27_136

diff --git a/kintex7/segbits_dsp_l.origin_info.db b/kintex7/segbits_dsp_l.origin_info.db
index 53f2e7f..b4a192d 100644
--- a/kintex7/segbits_dsp_l.origin_info.db
+++ b/kintex7/segbits_dsp_l.origin_info.db

@@ -1,3 +1,159 @@
+DSP_L.DSP_0_CEAD.DSP_GND_L origin:101-dsp-pips 26_63
+DSP_L.DSP_0_CEAD.DSP_VCC_L origin:101-dsp-pips 27_62
+DSP_L.DSP_0_CEALUMODE.DSP_GND_L origin:101-dsp-pips 27_51
+DSP_L.DSP_0_CEALUMODE.DSP_VCC_L origin:101-dsp-pips 26_50
+DSP_L.DSP_0_CED.DSP_GND_L origin:101-dsp-pips 27_72
+DSP_L.DSP_0_CED.DSP_VCC_L origin:101-dsp-pips 26_72
+DSP_L.DSP_0_CEINMODE.DSP_GND_L origin:101-dsp-pips 26_69
+DSP_L.DSP_0_CEINMODE.DSP_VCC_L origin:101-dsp-pips 26_67
+DSP_L.DSP_0_RSTD.DSP_GND_L origin:101-dsp-pips 27_96
+DSP_L.DSP_0_RSTD.DSP_VCC_L origin:101-dsp-pips 27_85
+DSP_L.DSP_0_ALUMODE2.DSP_GND_L origin:101-dsp-pips 27_56
+DSP_L.DSP_0_ALUMODE2.DSP_VCC_L origin:101-dsp-pips 26_55
+DSP_L.DSP_0_ALUMODE3.DSP_GND_L origin:101-dsp-pips 27_60
+DSP_L.DSP_0_ALUMODE3.DSP_VCC_L origin:101-dsp-pips 26_53
+DSP_L.DSP_0_CARRYINSEL2.DSP_GND_L origin:101-dsp-pips 26_17
+DSP_L.DSP_0_CARRYINSEL2.DSP_VCC_L origin:101-dsp-pips 27_18
+DSP_L.DSP_0_D0.DSP_GND_L origin:101-dsp-pips 26_65
+DSP_L.DSP_0_D0.DSP_VCC_L origin:101-dsp-pips 27_64
+DSP_L.DSP_0_D1.DSP_GND_L origin:101-dsp-pips 27_68
+DSP_L.DSP_0_D1.DSP_VCC_L origin:101-dsp-pips 27_74
+DSP_L.DSP_0_D2.DSP_GND_L origin:101-dsp-pips 27_71
+DSP_L.DSP_0_D2.DSP_VCC_L origin:101-dsp-pips 27_70
+DSP_L.DSP_0_D3.DSP_GND_L origin:101-dsp-pips 26_75
+DSP_L.DSP_0_D3.DSP_VCC_L origin:101-dsp-pips 26_73
+DSP_L.DSP_0_D4.DSP_GND_L origin:101-dsp-pips 27_78
+DSP_L.DSP_0_D4.DSP_VCC_L origin:101-dsp-pips 26_77
+DSP_L.DSP_0_D5.DSP_GND_L origin:101-dsp-pips 26_82
+DSP_L.DSP_0_D5.DSP_VCC_L origin:101-dsp-pips 26_81
+DSP_L.DSP_0_D6.DSP_GND_L origin:101-dsp-pips 26_89
+DSP_L.DSP_0_D6.DSP_VCC_L origin:101-dsp-pips 27_89
+DSP_L.DSP_0_D7.DSP_GND_L origin:101-dsp-pips 27_91
+DSP_L.DSP_0_D7.DSP_VCC_L origin:101-dsp-pips 26_91
+DSP_L.DSP_0_D8.DSP_GND_L origin:101-dsp-pips 26_98
+DSP_L.DSP_0_D8.DSP_VCC_L origin:101-dsp-pips 27_97
+DSP_L.DSP_0_D9.DSP_GND_L origin:101-dsp-pips 26_101
+DSP_L.DSP_0_D9.DSP_VCC_L origin:101-dsp-pips 26_99
+DSP_L.DSP_0_D10.DSP_GND_L origin:101-dsp-pips 26_105
+DSP_L.DSP_0_D10.DSP_VCC_L origin:101-dsp-pips 26_103
+DSP_L.DSP_0_D11.DSP_GND_L origin:101-dsp-pips 27_107
+DSP_L.DSP_0_D11.DSP_VCC_L origin:101-dsp-pips 27_105
+DSP_L.DSP_0_D12.DSP_GND_L origin:101-dsp-pips 26_107
+DSP_L.DSP_0_D12.DSP_VCC_L origin:101-dsp-pips 26_111
+DSP_L.DSP_0_D13.DSP_GND_L origin:101-dsp-pips 27_113
+DSP_L.DSP_0_D13.DSP_VCC_L origin:101-dsp-pips 26_114
+DSP_L.DSP_0_D14.DSP_GND_L origin:101-dsp-pips 26_118
+DSP_L.DSP_0_D14.DSP_VCC_L origin:101-dsp-pips 27_116
+DSP_L.DSP_0_D15.DSP_GND_L origin:101-dsp-pips 27_122
+DSP_L.DSP_0_D15.DSP_VCC_L origin:101-dsp-pips 27_120
+DSP_L.DSP_0_D16.DSP_GND_L origin:101-dsp-pips 27_125
+DSP_L.DSP_0_D16.DSP_VCC_L origin:101-dsp-pips 26_125
+DSP_L.DSP_0_D17.DSP_GND_L origin:101-dsp-pips 27_128
+DSP_L.DSP_0_D17.DSP_VCC_L origin:101-dsp-pips 27_126
+DSP_L.DSP_0_D18.DSP_GND_L origin:101-dsp-pips 26_135
+DSP_L.DSP_0_D18.DSP_VCC_L origin:101-dsp-pips 26_131
+DSP_L.DSP_0_D19.DSP_GND_L origin:101-dsp-pips 27_140
+DSP_L.DSP_0_D19.DSP_VCC_L origin:101-dsp-pips 26_140
+DSP_L.DSP_0_D20.DSP_GND_L origin:101-dsp-pips 26_145
+DSP_L.DSP_0_D20.DSP_VCC_L origin:101-dsp-pips 27_143
+DSP_L.DSP_0_D21.DSP_GND_L origin:101-dsp-pips 27_147
+DSP_L.DSP_0_D21.DSP_VCC_L origin:101-dsp-pips 26_147
+DSP_L.DSP_0_D22.DSP_GND_L origin:101-dsp-pips 27_151
+DSP_L.DSP_0_D22.DSP_VCC_L origin:101-dsp-pips 26_150
+DSP_L.DSP_0_D23.DSP_GND_L origin:101-dsp-pips 27_154
+DSP_L.DSP_0_D23.DSP_VCC_L origin:101-dsp-pips 27_153
+DSP_L.DSP_0_D24.DSP_GND_L origin:101-dsp-pips 27_158
+DSP_L.DSP_0_D24.DSP_VCC_L origin:101-dsp-pips 27_155
+DSP_L.DSP_0_INMODE0.DSP_GND_L origin:101-dsp-pips 27_134
+DSP_L.DSP_0_INMODE0.DSP_VCC_L origin:101-dsp-pips 27_130
+DSP_L.DSP_0_INMODE1.DSP_GND_L origin:101-dsp-pips 26_133
+DSP_L.DSP_0_INMODE1.DSP_VCC_L origin:101-dsp-pips 27_145
+DSP_L.DSP_0_INMODE2.DSP_GND_L origin:101-dsp-pips 27_80
+DSP_L.DSP_0_INMODE2.DSP_VCC_L origin:101-dsp-pips 26_71
+DSP_L.DSP_0_INMODE3.DSP_GND_L origin:101-dsp-pips 27_79
+DSP_L.DSP_0_INMODE3.DSP_VCC_L origin:101-dsp-pips 26_70
+DSP_L.DSP_0_INMODE4.DSP_GND_L origin:101-dsp-pips 26_58
+DSP_L.DSP_0_INMODE4.DSP_VCC_L origin:101-dsp-pips 26_46
+DSP_L.DSP_0_OPMODE6.DSP_GND_L origin:101-dsp-pips 27_12
+DSP_L.DSP_0_OPMODE6.DSP_VCC_L origin:101-dsp-pips 27_20
+DSP_L.DSP_1_CEAD.DSP_GND_L origin:101-dsp-pips 26_223
+DSP_L.DSP_1_CEAD.DSP_VCC_L origin:101-dsp-pips 27_222
+DSP_L.DSP_1_CEALUMODE.DSP_GND_L origin:101-dsp-pips 27_211
+DSP_L.DSP_1_CEALUMODE.DSP_VCC_L origin:101-dsp-pips 26_210
+DSP_L.DSP_1_CED.DSP_GND_L origin:101-dsp-pips 27_232
+DSP_L.DSP_1_CED.DSP_VCC_L origin:101-dsp-pips 26_232
+DSP_L.DSP_1_CEINMODE.DSP_GND_L origin:101-dsp-pips 26_229
+DSP_L.DSP_1_CEINMODE.DSP_VCC_L origin:101-dsp-pips 26_227
+DSP_L.DSP_1_RSTD.DSP_GND_L origin:101-dsp-pips 27_256
+DSP_L.DSP_1_RSTD.DSP_VCC_L origin:101-dsp-pips 27_245
+DSP_L.DSP_1_ALUMODE2.DSP_GND_L origin:101-dsp-pips 27_216
+DSP_L.DSP_1_ALUMODE2.DSP_VCC_L origin:101-dsp-pips 26_215
+DSP_L.DSP_1_ALUMODE3.DSP_GND_L origin:101-dsp-pips 27_220
+DSP_L.DSP_1_ALUMODE3.DSP_VCC_L origin:101-dsp-pips 26_213
+DSP_L.DSP_1_CARRYINSEL2.DSP_GND_L origin:101-dsp-pips 26_177
+DSP_L.DSP_1_CARRYINSEL2.DSP_VCC_L origin:101-dsp-pips 27_178
+DSP_L.DSP_1_D0.DSP_GND_L origin:101-dsp-pips 26_225
+DSP_L.DSP_1_D0.DSP_VCC_L origin:101-dsp-pips 27_224
+DSP_L.DSP_1_D1.DSP_GND_L origin:101-dsp-pips 27_228
+DSP_L.DSP_1_D1.DSP_VCC_L origin:101-dsp-pips 27_234
+DSP_L.DSP_1_D2.DSP_GND_L origin:101-dsp-pips 27_231
+DSP_L.DSP_1_D2.DSP_VCC_L origin:101-dsp-pips 27_230
+DSP_L.DSP_1_D3.DSP_GND_L origin:101-dsp-pips 26_235
+DSP_L.DSP_1_D3.DSP_VCC_L origin:101-dsp-pips 26_233
+DSP_L.DSP_1_D4.DSP_GND_L origin:101-dsp-pips 27_238
+DSP_L.DSP_1_D4.DSP_VCC_L origin:101-dsp-pips 26_237
+DSP_L.DSP_1_D5.DSP_GND_L origin:101-dsp-pips 26_242
+DSP_L.DSP_1_D5.DSP_VCC_L origin:101-dsp-pips 26_241
+DSP_L.DSP_1_D6.DSP_GND_L origin:101-dsp-pips 26_249
+DSP_L.DSP_1_D6.DSP_VCC_L origin:101-dsp-pips 27_249
+DSP_L.DSP_1_D7.DSP_GND_L origin:101-dsp-pips 27_251
+DSP_L.DSP_1_D7.DSP_VCC_L origin:101-dsp-pips 26_251
+DSP_L.DSP_1_D8.DSP_GND_L origin:101-dsp-pips 26_258
+DSP_L.DSP_1_D8.DSP_VCC_L origin:101-dsp-pips 27_257
+DSP_L.DSP_1_D9.DSP_GND_L origin:101-dsp-pips 26_261
+DSP_L.DSP_1_D9.DSP_VCC_L origin:101-dsp-pips 26_259
+DSP_L.DSP_1_D10.DSP_GND_L origin:101-dsp-pips 26_265
+DSP_L.DSP_1_D10.DSP_VCC_L origin:101-dsp-pips 26_263
+DSP_L.DSP_1_D11.DSP_GND_L origin:101-dsp-pips 27_267
+DSP_L.DSP_1_D11.DSP_VCC_L origin:101-dsp-pips 27_265
+DSP_L.DSP_1_D12.DSP_GND_L origin:101-dsp-pips 26_267
+DSP_L.DSP_1_D12.DSP_VCC_L origin:101-dsp-pips 26_271
+DSP_L.DSP_1_D13.DSP_GND_L origin:101-dsp-pips 27_273
+DSP_L.DSP_1_D13.DSP_VCC_L origin:101-dsp-pips 26_274
+DSP_L.DSP_1_D14.DSP_GND_L origin:101-dsp-pips 26_278
+DSP_L.DSP_1_D14.DSP_VCC_L origin:101-dsp-pips 27_276
+DSP_L.DSP_1_D15.DSP_GND_L origin:101-dsp-pips 27_282
+DSP_L.DSP_1_D15.DSP_VCC_L origin:101-dsp-pips 27_280
+DSP_L.DSP_1_D16.DSP_GND_L origin:101-dsp-pips 27_285
+DSP_L.DSP_1_D16.DSP_VCC_L origin:101-dsp-pips 26_285
+DSP_L.DSP_1_D17.DSP_GND_L origin:101-dsp-pips 27_288
+DSP_L.DSP_1_D17.DSP_VCC_L origin:101-dsp-pips 27_286
+DSP_L.DSP_1_D18.DSP_GND_L origin:101-dsp-pips 26_295
+DSP_L.DSP_1_D18.DSP_VCC_L origin:101-dsp-pips 26_291
+DSP_L.DSP_1_D19.DSP_GND_L origin:101-dsp-pips 27_300
+DSP_L.DSP_1_D19.DSP_VCC_L origin:101-dsp-pips 26_300
+DSP_L.DSP_1_D20.DSP_GND_L origin:101-dsp-pips 26_305
+DSP_L.DSP_1_D20.DSP_VCC_L origin:101-dsp-pips 27_303
+DSP_L.DSP_1_D21.DSP_GND_L origin:101-dsp-pips 27_307
+DSP_L.DSP_1_D21.DSP_VCC_L origin:101-dsp-pips 26_307
+DSP_L.DSP_1_D22.DSP_GND_L origin:101-dsp-pips 27_311
+DSP_L.DSP_1_D22.DSP_VCC_L origin:101-dsp-pips 26_310
+DSP_L.DSP_1_D23.DSP_GND_L origin:101-dsp-pips 27_314
+DSP_L.DSP_1_D23.DSP_VCC_L origin:101-dsp-pips 27_313
+DSP_L.DSP_1_D24.DSP_GND_L origin:101-dsp-pips 27_318
+DSP_L.DSP_1_D24.DSP_VCC_L origin:101-dsp-pips 27_315
+DSP_L.DSP_1_INMODE0.DSP_GND_L origin:101-dsp-pips 27_294
+DSP_L.DSP_1_INMODE0.DSP_VCC_L origin:101-dsp-pips 27_290
+DSP_L.DSP_1_INMODE1.DSP_GND_L origin:101-dsp-pips 26_293
+DSP_L.DSP_1_INMODE1.DSP_VCC_L origin:101-dsp-pips 27_305
+DSP_L.DSP_1_INMODE2.DSP_GND_L origin:101-dsp-pips 27_240
+DSP_L.DSP_1_INMODE2.DSP_VCC_L origin:101-dsp-pips 26_231
+DSP_L.DSP_1_INMODE3.DSP_GND_L origin:101-dsp-pips 27_239
+DSP_L.DSP_1_INMODE3.DSP_VCC_L origin:101-dsp-pips 26_230
+DSP_L.DSP_1_INMODE4.DSP_GND_L origin:101-dsp-pips 26_218
+DSP_L.DSP_1_INMODE4.DSP_VCC_L origin:101-dsp-pips 26_206
+DSP_L.DSP_1_OPMODE6.DSP_GND_L origin:101-dsp-pips 27_172
+DSP_L.DSP_1_OPMODE6.DSP_VCC_L origin:101-dsp-pips 27_180
 DSP_L.DSP48.DSP_0.A_INPUT[0] origin:100-dsp-mskpat 27_84
 DSP_L.DSP48.DSP_0.AREG_0 origin:100-dsp-mskpat 26_113 26_137 27_111
 DSP_L.DSP48.DSP_0.AREG_2 origin:100-dsp-mskpat 27_136

diff --git a/kintex7/segbits_dsp_r.db b/kintex7/segbits_dsp_r.db
index 956b1b3..cc796f2 100644
--- a/kintex7/segbits_dsp_r.db
+++ b/kintex7/segbits_dsp_r.db

@@ -1,3 +1,159 @@
+DSP_R.DSP_0_CEAD.DSP_GND_R 26_63
+DSP_R.DSP_0_CEAD.DSP_VCC_R 27_62
+DSP_R.DSP_0_CEALUMODE.DSP_GND_R 27_51
+DSP_R.DSP_0_CEALUMODE.DSP_VCC_R 26_50
+DSP_R.DSP_0_CED.DSP_GND_R 27_72
+DSP_R.DSP_0_CED.DSP_VCC_R 26_72
+DSP_R.DSP_0_CEINMODE.DSP_GND_R 26_69
+DSP_R.DSP_0_CEINMODE.DSP_VCC_R 26_67
+DSP_R.DSP_0_RSTD.DSP_GND_R 27_96
+DSP_R.DSP_0_RSTD.DSP_VCC_R 27_85
+DSP_R.DSP_0_ALUMODE2.DSP_GND_R 27_56
+DSP_R.DSP_0_ALUMODE2.DSP_VCC_R 26_55
+DSP_R.DSP_0_ALUMODE3.DSP_GND_R 27_60
+DSP_R.DSP_0_ALUMODE3.DSP_VCC_R 26_53
+DSP_R.DSP_0_CARRYINSEL2.DSP_GND_R 26_17
+DSP_R.DSP_0_CARRYINSEL2.DSP_VCC_R 27_18
+DSP_R.DSP_0_D0.DSP_GND_R 26_65
+DSP_R.DSP_0_D0.DSP_VCC_R 27_64
+DSP_R.DSP_0_D1.DSP_GND_R 27_68
+DSP_R.DSP_0_D1.DSP_VCC_R 27_74
+DSP_R.DSP_0_D2.DSP_GND_R 27_71
+DSP_R.DSP_0_D2.DSP_VCC_R 27_70
+DSP_R.DSP_0_D3.DSP_GND_R 26_75
+DSP_R.DSP_0_D3.DSP_VCC_R 26_73
+DSP_R.DSP_0_D4.DSP_GND_R 27_78
+DSP_R.DSP_0_D4.DSP_VCC_R 26_77
+DSP_R.DSP_0_D5.DSP_GND_R 26_82
+DSP_R.DSP_0_D5.DSP_VCC_R 26_81
+DSP_R.DSP_0_D6.DSP_GND_R 26_89
+DSP_R.DSP_0_D6.DSP_VCC_R 27_89
+DSP_R.DSP_0_D7.DSP_GND_R 27_91
+DSP_R.DSP_0_D7.DSP_VCC_R 26_91
+DSP_R.DSP_0_D8.DSP_GND_R 26_98
+DSP_R.DSP_0_D8.DSP_VCC_R 27_97
+DSP_R.DSP_0_D9.DSP_GND_R 26_101
+DSP_R.DSP_0_D9.DSP_VCC_R 26_99
+DSP_R.DSP_0_D10.DSP_GND_R 26_105
+DSP_R.DSP_0_D10.DSP_VCC_R 26_103
+DSP_R.DSP_0_D11.DSP_GND_R 27_107
+DSP_R.DSP_0_D11.DSP_VCC_R 27_105
+DSP_R.DSP_0_D12.DSP_GND_R 26_107
+DSP_R.DSP_0_D12.DSP_VCC_R 26_111
+DSP_R.DSP_0_D13.DSP_GND_R 27_113
+DSP_R.DSP_0_D13.DSP_VCC_R 26_114
+DSP_R.DSP_0_D14.DSP_GND_R 26_118
+DSP_R.DSP_0_D14.DSP_VCC_R 27_116
+DSP_R.DSP_0_D15.DSP_GND_R 27_122
+DSP_R.DSP_0_D15.DSP_VCC_R 27_120
+DSP_R.DSP_0_D16.DSP_GND_R 27_125
+DSP_R.DSP_0_D16.DSP_VCC_R 26_125
+DSP_R.DSP_0_D17.DSP_GND_R 27_128
+DSP_R.DSP_0_D17.DSP_VCC_R 27_126
+DSP_R.DSP_0_D18.DSP_GND_R 26_135
+DSP_R.DSP_0_D18.DSP_VCC_R 26_131
+DSP_R.DSP_0_D19.DSP_GND_R 27_140
+DSP_R.DSP_0_D19.DSP_VCC_R 26_140
+DSP_R.DSP_0_D20.DSP_GND_R 26_145
+DSP_R.DSP_0_D20.DSP_VCC_R 27_143
+DSP_R.DSP_0_D21.DSP_GND_R 27_147
+DSP_R.DSP_0_D21.DSP_VCC_R 26_147
+DSP_R.DSP_0_D22.DSP_GND_R 27_151
+DSP_R.DSP_0_D22.DSP_VCC_R 26_150
+DSP_R.DSP_0_D23.DSP_GND_R 27_154
+DSP_R.DSP_0_D23.DSP_VCC_R 27_153
+DSP_R.DSP_0_D24.DSP_GND_R 27_158
+DSP_R.DSP_0_D24.DSP_VCC_R 27_155
+DSP_R.DSP_0_INMODE0.DSP_GND_R 27_134
+DSP_R.DSP_0_INMODE0.DSP_VCC_R 27_130
+DSP_R.DSP_0_INMODE1.DSP_GND_R 26_133
+DSP_R.DSP_0_INMODE1.DSP_VCC_R 27_145
+DSP_R.DSP_0_INMODE2.DSP_GND_R 27_80
+DSP_R.DSP_0_INMODE2.DSP_VCC_R 26_71
+DSP_R.DSP_0_INMODE3.DSP_GND_R 27_79
+DSP_R.DSP_0_INMODE3.DSP_VCC_R 26_70
+DSP_R.DSP_0_INMODE4.DSP_GND_R 26_58
+DSP_R.DSP_0_INMODE4.DSP_VCC_R 26_46
+DSP_R.DSP_0_OPMODE6.DSP_GND_R 27_12
+DSP_R.DSP_0_OPMODE6.DSP_VCC_R 27_20
+DSP_R.DSP_1_CEAD.DSP_GND_R 26_223
+DSP_R.DSP_1_CEAD.DSP_VCC_R 27_222
+DSP_R.DSP_1_CEALUMODE.DSP_GND_R 27_211
+DSP_R.DSP_1_CEALUMODE.DSP_VCC_R 26_210
+DSP_R.DSP_1_CED.DSP_GND_R 27_232
+DSP_R.DSP_1_CED.DSP_VCC_R 26_232
+DSP_R.DSP_1_CEINMODE.DSP_GND_R 26_229
+DSP_R.DSP_1_CEINMODE.DSP_VCC_R 26_227
+DSP_R.DSP_1_RSTD.DSP_GND_R 27_256
+DSP_R.DSP_1_RSTD.DSP_VCC_R 27_245
+DSP_R.DSP_1_ALUMODE2.DSP_GND_R 27_216
+DSP_R.DSP_1_ALUMODE2.DSP_VCC_R 26_215
+DSP_R.DSP_1_ALUMODE3.DSP_GND_R 27_220
+DSP_R.DSP_1_ALUMODE3.DSP_VCC_R 26_213
+DSP_R.DSP_1_CARRYINSEL2.DSP_GND_R 26_177
+DSP_R.DSP_1_CARRYINSEL2.DSP_VCC_R 27_178
+DSP_R.DSP_1_D0.DSP_GND_R 26_225
+DSP_R.DSP_1_D0.DSP_VCC_R 27_224
+DSP_R.DSP_1_D1.DSP_GND_R 27_228
+DSP_R.DSP_1_D1.DSP_VCC_R 27_234
+DSP_R.DSP_1_D2.DSP_GND_R 27_231
+DSP_R.DSP_1_D2.DSP_VCC_R 27_230
+DSP_R.DSP_1_D3.DSP_GND_R 26_235
+DSP_R.DSP_1_D3.DSP_VCC_R 26_233
+DSP_R.DSP_1_D4.DSP_GND_R 27_238
+DSP_R.DSP_1_D4.DSP_VCC_R 26_237
+DSP_R.DSP_1_D5.DSP_GND_R 26_242
+DSP_R.DSP_1_D5.DSP_VCC_R 26_241
+DSP_R.DSP_1_D6.DSP_GND_R 26_249
+DSP_R.DSP_1_D6.DSP_VCC_R 27_249
+DSP_R.DSP_1_D7.DSP_GND_R 27_251
+DSP_R.DSP_1_D7.DSP_VCC_R 26_251
+DSP_R.DSP_1_D8.DSP_GND_R 26_258
+DSP_R.DSP_1_D8.DSP_VCC_R 27_257
+DSP_R.DSP_1_D9.DSP_GND_R 26_261
+DSP_R.DSP_1_D9.DSP_VCC_R 26_259
+DSP_R.DSP_1_D10.DSP_GND_R 26_265
+DSP_R.DSP_1_D10.DSP_VCC_R 26_263
+DSP_R.DSP_1_D11.DSP_GND_R 27_267
+DSP_R.DSP_1_D11.DSP_VCC_R 27_265
+DSP_R.DSP_1_D12.DSP_GND_R 26_267
+DSP_R.DSP_1_D12.DSP_VCC_R 26_271
+DSP_R.DSP_1_D13.DSP_GND_R 27_273
+DSP_R.DSP_1_D13.DSP_VCC_R 26_274
+DSP_R.DSP_1_D14.DSP_GND_R 26_278
+DSP_R.DSP_1_D14.DSP_VCC_R 27_276
+DSP_R.DSP_1_D15.DSP_GND_R 27_282
+DSP_R.DSP_1_D15.DSP_VCC_R 27_280
+DSP_R.DSP_1_D16.DSP_GND_R 27_285
+DSP_R.DSP_1_D16.DSP_VCC_R 26_285
+DSP_R.DSP_1_D17.DSP_GND_R 27_288
+DSP_R.DSP_1_D17.DSP_VCC_R 27_286
+DSP_R.DSP_1_D18.DSP_GND_R 26_295
+DSP_R.DSP_1_D18.DSP_VCC_R 26_291
+DSP_R.DSP_1_D19.DSP_GND_R 27_300
+DSP_R.DSP_1_D19.DSP_VCC_R 26_300
+DSP_R.DSP_1_D20.DSP_GND_R 26_305
+DSP_R.DSP_1_D20.DSP_VCC_R 27_303
+DSP_R.DSP_1_D21.DSP_GND_R 27_307
+DSP_R.DSP_1_D21.DSP_VCC_R 26_307
+DSP_R.DSP_1_D22.DSP_GND_R 27_311
+DSP_R.DSP_1_D22.DSP_VCC_R 26_310
+DSP_R.DSP_1_D23.DSP_GND_R 27_314
+DSP_R.DSP_1_D23.DSP_VCC_R 27_313
+DSP_R.DSP_1_D24.DSP_GND_R 27_318
+DSP_R.DSP_1_D24.DSP_VCC_R 27_315
+DSP_R.DSP_1_INMODE0.DSP_GND_R 27_294
+DSP_R.DSP_1_INMODE0.DSP_VCC_R 27_290
+DSP_R.DSP_1_INMODE1.DSP_GND_R 26_293
+DSP_R.DSP_1_INMODE1.DSP_VCC_R 27_305
+DSP_R.DSP_1_INMODE2.DSP_GND_R 27_240
+DSP_R.DSP_1_INMODE2.DSP_VCC_R 26_231
+DSP_R.DSP_1_INMODE3.DSP_GND_R 27_239
+DSP_R.DSP_1_INMODE3.DSP_VCC_R 26_230
+DSP_R.DSP_1_INMODE4.DSP_GND_R 26_218
+DSP_R.DSP_1_INMODE4.DSP_VCC_R 26_206
+DSP_R.DSP_1_OPMODE6.DSP_GND_R 27_172
+DSP_R.DSP_1_OPMODE6.DSP_VCC_R 27_180
 DSP_R.DSP48.DSP_0.A_INPUT[0] 27_84
 DSP_R.DSP48.DSP_0.AREG_0 26_113 26_137 27_111
 DSP_R.DSP48.DSP_0.AREG_2 27_136

diff --git a/kintex7/segbits_dsp_r.origin_info.db b/kintex7/segbits_dsp_r.origin_info.db
index e3ac198..f2d5d0f 100644
--- a/kintex7/segbits_dsp_r.origin_info.db
+++ b/kintex7/segbits_dsp_r.origin_info.db

@@ -1,3 +1,159 @@
+DSP_R.DSP_0_CEAD.DSP_GND_R origin:101-dsp-pips 26_63
+DSP_R.DSP_0_CEAD.DSP_VCC_R origin:101-dsp-pips 27_62
+DSP_R.DSP_0_CEALUMODE.DSP_GND_R origin:101-dsp-pips 27_51
+DSP_R.DSP_0_CEALUMODE.DSP_VCC_R origin:101-dsp-pips 26_50
+DSP_R.DSP_0_CED.DSP_GND_R origin:101-dsp-pips 27_72
+DSP_R.DSP_0_CED.DSP_VCC_R origin:101-dsp-pips 26_72
+DSP_R.DSP_0_CEINMODE.DSP_GND_R origin:101-dsp-pips 26_69
+DSP_R.DSP_0_CEINMODE.DSP_VCC_R origin:101-dsp-pips 26_67
+DSP_R.DSP_0_RSTD.DSP_GND_R origin:101-dsp-pips 27_96
+DSP_R.DSP_0_RSTD.DSP_VCC_R origin:101-dsp-pips 27_85
+DSP_R.DSP_0_ALUMODE2.DSP_GND_R origin:101-dsp-pips 27_56
+DSP_R.DSP_0_ALUMODE2.DSP_VCC_R origin:101-dsp-pips 26_55
+DSP_R.DSP_0_ALUMODE3.DSP_GND_R origin:101-dsp-pips 27_60
+DSP_R.DSP_0_ALUMODE3.DSP_VCC_R origin:101-dsp-pips 26_53
+DSP_R.DSP_0_CARRYINSEL2.DSP_GND_R origin:101-dsp-pips 26_17
+DSP_R.DSP_0_CARRYINSEL2.DSP_VCC_R origin:101-dsp-pips 27_18
+DSP_R.DSP_0_D0.DSP_GND_R origin:101-dsp-pips 26_65
+DSP_R.DSP_0_D0.DSP_VCC_R origin:101-dsp-pips 27_64
+DSP_R.DSP_0_D1.DSP_GND_R origin:101-dsp-pips 27_68
+DSP_R.DSP_0_D1.DSP_VCC_R origin:101-dsp-pips 27_74
+DSP_R.DSP_0_D2.DSP_GND_R origin:101-dsp-pips 27_71
+DSP_R.DSP_0_D2.DSP_VCC_R origin:101-dsp-pips 27_70
+DSP_R.DSP_0_D3.DSP_GND_R origin:101-dsp-pips 26_75
+DSP_R.DSP_0_D3.DSP_VCC_R origin:101-dsp-pips 26_73
+DSP_R.DSP_0_D4.DSP_GND_R origin:101-dsp-pips 27_78
+DSP_R.DSP_0_D4.DSP_VCC_R origin:101-dsp-pips 26_77
+DSP_R.DSP_0_D5.DSP_GND_R origin:101-dsp-pips 26_82
+DSP_R.DSP_0_D5.DSP_VCC_R origin:101-dsp-pips 26_81
+DSP_R.DSP_0_D6.DSP_GND_R origin:101-dsp-pips 26_89
+DSP_R.DSP_0_D6.DSP_VCC_R origin:101-dsp-pips 27_89
+DSP_R.DSP_0_D7.DSP_GND_R origin:101-dsp-pips 27_91
+DSP_R.DSP_0_D7.DSP_VCC_R origin:101-dsp-pips 26_91
+DSP_R.DSP_0_D8.DSP_GND_R origin:101-dsp-pips 26_98
+DSP_R.DSP_0_D8.DSP_VCC_R origin:101-dsp-pips 27_97
+DSP_R.DSP_0_D9.DSP_GND_R origin:101-dsp-pips 26_101
+DSP_R.DSP_0_D9.DSP_VCC_R origin:101-dsp-pips 26_99
+DSP_R.DSP_0_D10.DSP_GND_R origin:101-dsp-pips 26_105
+DSP_R.DSP_0_D10.DSP_VCC_R origin:101-dsp-pips 26_103
+DSP_R.DSP_0_D11.DSP_GND_R origin:101-dsp-pips 27_107
+DSP_R.DSP_0_D11.DSP_VCC_R origin:101-dsp-pips 27_105
+DSP_R.DSP_0_D12.DSP_GND_R origin:101-dsp-pips 26_107
+DSP_R.DSP_0_D12.DSP_VCC_R origin:101-dsp-pips 26_111
+DSP_R.DSP_0_D13.DSP_GND_R origin:101-dsp-pips 27_113
+DSP_R.DSP_0_D13.DSP_VCC_R origin:101-dsp-pips 26_114
+DSP_R.DSP_0_D14.DSP_GND_R origin:101-dsp-pips 26_118
+DSP_R.DSP_0_D14.DSP_VCC_R origin:101-dsp-pips 27_116
+DSP_R.DSP_0_D15.DSP_GND_R origin:101-dsp-pips 27_122
+DSP_R.DSP_0_D15.DSP_VCC_R origin:101-dsp-pips 27_120
+DSP_R.DSP_0_D16.DSP_GND_R origin:101-dsp-pips 27_125
+DSP_R.DSP_0_D16.DSP_VCC_R origin:101-dsp-pips 26_125
+DSP_R.DSP_0_D17.DSP_GND_R origin:101-dsp-pips 27_128
+DSP_R.DSP_0_D17.DSP_VCC_R origin:101-dsp-pips 27_126
+DSP_R.DSP_0_D18.DSP_GND_R origin:101-dsp-pips 26_135
+DSP_R.DSP_0_D18.DSP_VCC_R origin:101-dsp-pips 26_131
+DSP_R.DSP_0_D19.DSP_GND_R origin:101-dsp-pips 27_140
+DSP_R.DSP_0_D19.DSP_VCC_R origin:101-dsp-pips 26_140
+DSP_R.DSP_0_D20.DSP_GND_R origin:101-dsp-pips 26_145
+DSP_R.DSP_0_D20.DSP_VCC_R origin:101-dsp-pips 27_143
+DSP_R.DSP_0_D21.DSP_GND_R origin:101-dsp-pips 27_147
+DSP_R.DSP_0_D21.DSP_VCC_R origin:101-dsp-pips 26_147
+DSP_R.DSP_0_D22.DSP_GND_R origin:101-dsp-pips 27_151
+DSP_R.DSP_0_D22.DSP_VCC_R origin:101-dsp-pips 26_150
+DSP_R.DSP_0_D23.DSP_GND_R origin:101-dsp-pips 27_154
+DSP_R.DSP_0_D23.DSP_VCC_R origin:101-dsp-pips 27_153
+DSP_R.DSP_0_D24.DSP_GND_R origin:101-dsp-pips 27_158
+DSP_R.DSP_0_D24.DSP_VCC_R origin:101-dsp-pips 27_155
+DSP_R.DSP_0_INMODE0.DSP_GND_R origin:101-dsp-pips 27_134
+DSP_R.DSP_0_INMODE0.DSP_VCC_R origin:101-dsp-pips 27_130
+DSP_R.DSP_0_INMODE1.DSP_GND_R origin:101-dsp-pips 26_133
+DSP_R.DSP_0_INMODE1.DSP_VCC_R origin:101-dsp-pips 27_145
+DSP_R.DSP_0_INMODE2.DSP_GND_R origin:101-dsp-pips 27_80
+DSP_R.DSP_0_INMODE2.DSP_VCC_R origin:101-dsp-pips 26_71
+DSP_R.DSP_0_INMODE3.DSP_GND_R origin:101-dsp-pips 27_79
+DSP_R.DSP_0_INMODE3.DSP_VCC_R origin:101-dsp-pips 26_70
+DSP_R.DSP_0_INMODE4.DSP_GND_R origin:101-dsp-pips 26_58
+DSP_R.DSP_0_INMODE4.DSP_VCC_R origin:101-dsp-pips 26_46
+DSP_R.DSP_0_OPMODE6.DSP_GND_R origin:101-dsp-pips 27_12
+DSP_R.DSP_0_OPMODE6.DSP_VCC_R origin:101-dsp-pips 27_20
+DSP_R.DSP_1_CEAD.DSP_GND_R origin:101-dsp-pips 26_223
+DSP_R.DSP_1_CEAD.DSP_VCC_R origin:101-dsp-pips 27_222
+DSP_R.DSP_1_CEALUMODE.DSP_GND_R origin:101-dsp-pips 27_211
+DSP_R.DSP_1_CEALUMODE.DSP_VCC_R origin:101-dsp-pips 26_210
+DSP_R.DSP_1_CED.DSP_GND_R origin:101-dsp-pips 27_232
+DSP_R.DSP_1_CED.DSP_VCC_R origin:101-dsp-pips 26_232
+DSP_R.DSP_1_CEINMODE.DSP_GND_R origin:101-dsp-pips 26_229
+DSP_R.DSP_1_CEINMODE.DSP_VCC_R origin:101-dsp-pips 26_227
+DSP_R.DSP_1_RSTD.DSP_GND_R origin:101-dsp-pips 27_256
+DSP_R.DSP_1_RSTD.DSP_VCC_R origin:101-dsp-pips 27_245
+DSP_R.DSP_1_ALUMODE2.DSP_GND_R origin:101-dsp-pips 27_216
+DSP_R.DSP_1_ALUMODE2.DSP_VCC_R origin:101-dsp-pips 26_215
+DSP_R.DSP_1_ALUMODE3.DSP_GND_R origin:101-dsp-pips 27_220
+DSP_R.DSP_1_ALUMODE3.DSP_VCC_R origin:101-dsp-pips 26_213
+DSP_R.DSP_1_CARRYINSEL2.DSP_GND_R origin:101-dsp-pips 26_177
+DSP_R.DSP_1_CARRYINSEL2.DSP_VCC_R origin:101-dsp-pips 27_178
+DSP_R.DSP_1_D0.DSP_GND_R origin:101-dsp-pips 26_225
+DSP_R.DSP_1_D0.DSP_VCC_R origin:101-dsp-pips 27_224
+DSP_R.DSP_1_D1.DSP_GND_R origin:101-dsp-pips 27_228
+DSP_R.DSP_1_D1.DSP_VCC_R origin:101-dsp-pips 27_234
+DSP_R.DSP_1_D2.DSP_GND_R origin:101-dsp-pips 27_231
+DSP_R.DSP_1_D2.DSP_VCC_R origin:101-dsp-pips 27_230
+DSP_R.DSP_1_D3.DSP_GND_R origin:101-dsp-pips 26_235
+DSP_R.DSP_1_D3.DSP_VCC_R origin:101-dsp-pips 26_233
+DSP_R.DSP_1_D4.DSP_GND_R origin:101-dsp-pips 27_238
+DSP_R.DSP_1_D4.DSP_VCC_R origin:101-dsp-pips 26_237
+DSP_R.DSP_1_D5.DSP_GND_R origin:101-dsp-pips 26_242
+DSP_R.DSP_1_D5.DSP_VCC_R origin:101-dsp-pips 26_241
+DSP_R.DSP_1_D6.DSP_GND_R origin:101-dsp-pips 26_249
+DSP_R.DSP_1_D6.DSP_VCC_R origin:101-dsp-pips 27_249
+DSP_R.DSP_1_D7.DSP_GND_R origin:101-dsp-pips 27_251
+DSP_R.DSP_1_D7.DSP_VCC_R origin:101-dsp-pips 26_251
+DSP_R.DSP_1_D8.DSP_GND_R origin:101-dsp-pips 26_258
+DSP_R.DSP_1_D8.DSP_VCC_R origin:101-dsp-pips 27_257
+DSP_R.DSP_1_D9.DSP_GND_R origin:101-dsp-pips 26_261
+DSP_R.DSP_1_D9.DSP_VCC_R origin:101-dsp-pips 26_259
+DSP_R.DSP_1_D10.DSP_GND_R origin:101-dsp-pips 26_265
+DSP_R.DSP_1_D10.DSP_VCC_R origin:101-dsp-pips 26_263
+DSP_R.DSP_1_D11.DSP_GND_R origin:101-dsp-pips 27_267
+DSP_R.DSP_1_D11.DSP_VCC_R origin:101-dsp-pips 27_265
+DSP_R.DSP_1_D12.DSP_GND_R origin:101-dsp-pips 26_267
+DSP_R.DSP_1_D12.DSP_VCC_R origin:101-dsp-pips 26_271
+DSP_R.DSP_1_D13.DSP_GND_R origin:101-dsp-pips 27_273
+DSP_R.DSP_1_D13.DSP_VCC_R origin:101-dsp-pips 26_274
+DSP_R.DSP_1_D14.DSP_GND_R origin:101-dsp-pips 26_278
+DSP_R.DSP_1_D14.DSP_VCC_R origin:101-dsp-pips 27_276
+DSP_R.DSP_1_D15.DSP_GND_R origin:101-dsp-pips 27_282
+DSP_R.DSP_1_D15.DSP_VCC_R origin:101-dsp-pips 27_280
+DSP_R.DSP_1_D16.DSP_GND_R origin:101-dsp-pips 27_285
+DSP_R.DSP_1_D16.DSP_VCC_R origin:101-dsp-pips 26_285
+DSP_R.DSP_1_D17.DSP_GND_R origin:101-dsp-pips 27_288
+DSP_R.DSP_1_D17.DSP_VCC_R origin:101-dsp-pips 27_286
+DSP_R.DSP_1_D18.DSP_GND_R origin:101-dsp-pips 26_295
+DSP_R.DSP_1_D18.DSP_VCC_R origin:101-dsp-pips 26_291
+DSP_R.DSP_1_D19.DSP_GND_R origin:101-dsp-pips 27_300
+DSP_R.DSP_1_D19.DSP_VCC_R origin:101-dsp-pips 26_300
+DSP_R.DSP_1_D20.DSP_GND_R origin:101-dsp-pips 26_305
+DSP_R.DSP_1_D20.DSP_VCC_R origin:101-dsp-pips 27_303
+DSP_R.DSP_1_D21.DSP_GND_R origin:101-dsp-pips 27_307
+DSP_R.DSP_1_D21.DSP_VCC_R origin:101-dsp-pips 26_307
+DSP_R.DSP_1_D22.DSP_GND_R origin:101-dsp-pips 27_311
+DSP_R.DSP_1_D22.DSP_VCC_R origin:101-dsp-pips 26_310
+DSP_R.DSP_1_D23.DSP_GND_R origin:101-dsp-pips 27_314
+DSP_R.DSP_1_D23.DSP_VCC_R origin:101-dsp-pips 27_313
+DSP_R.DSP_1_D24.DSP_GND_R origin:101-dsp-pips 27_318
+DSP_R.DSP_1_D24.DSP_VCC_R origin:101-dsp-pips 27_315
+DSP_R.DSP_1_INMODE0.DSP_GND_R origin:101-dsp-pips 27_294
+DSP_R.DSP_1_INMODE0.DSP_VCC_R origin:101-dsp-pips 27_290
+DSP_R.DSP_1_INMODE1.DSP_GND_R origin:101-dsp-pips 26_293
+DSP_R.DSP_1_INMODE1.DSP_VCC_R origin:101-dsp-pips 27_305
+DSP_R.DSP_1_INMODE2.DSP_GND_R origin:101-dsp-pips 27_240
+DSP_R.DSP_1_INMODE2.DSP_VCC_R origin:101-dsp-pips 26_231
+DSP_R.DSP_1_INMODE3.DSP_GND_R origin:101-dsp-pips 27_239
+DSP_R.DSP_1_INMODE3.DSP_VCC_R origin:101-dsp-pips 26_230
+DSP_R.DSP_1_INMODE4.DSP_GND_R origin:101-dsp-pips 26_218
+DSP_R.DSP_1_INMODE4.DSP_VCC_R origin:101-dsp-pips 26_206
+DSP_R.DSP_1_OPMODE6.DSP_GND_R origin:101-dsp-pips 27_172
+DSP_R.DSP_1_OPMODE6.DSP_VCC_R origin:101-dsp-pips 27_180
 DSP_R.DSP48.DSP_0.A_INPUT[0] origin:100-dsp-mskpat 27_84
 DSP_R.DSP48.DSP_0.AREG_0 origin:100-dsp-mskpat 26_113 26_137 27_111
 DSP_R.DSP48.DSP_0.AREG_2 origin:100-dsp-mskpat 27_136

diff --git a/kintex7/segbits_hclk_ioi3.db b/kintex7/segbits_hclk_ioi3.db
index 443583e..a775abe 100644
--- a/kintex7/segbits_hclk_ioi3.db
+++ b/kintex7/segbits_hclk_ioi3.db

@@ -242,7 +242,10 @@
 HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK1 32_19 35_21
 HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK2 31_20 32_19
 HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK3 32_19 35_19
+HCLK_IOI3.LVDS_25_IN_USE 38_23 38_24 38_25 41_14 41_15 41_17 41_18 41_27 41_28 41_29
+HCLK_IOI3.ONLY_DIFF_IN_USE 38_27 39_23 40_25 40_27 40_29 40_30 41_16 41_31
 HCLK_IOI3.STEPDOWN 38_15 39_14 39_15 39_16
+HCLK_IOI3.TMDS_33_IN_USE 38_28 41_19
 HCLK_IOI3.VREF.V_600_MV 38_26 39_30
 HCLK_IOI3.VREF.V_675_MV 38_26 39_22
 HCLK_IOI3.VREF.V_750_MV 38_26 39_24

diff --git a/kintex7/segbits_hclk_ioi3.origin_info.db b/kintex7/segbits_hclk_ioi3.origin_info.db
index d2ea9e1..df5951b 100644
--- a/kintex7/segbits_hclk_ioi3.origin_info.db
+++ b/kintex7/segbits_hclk_ioi3.origin_info.db

@@ -242,7 +242,10 @@
 HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK1 origin:047-hclk-ioi-pips 32_19 35_21
 HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK2 origin:047-hclk-ioi-pips 31_20 32_19
 HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK3 origin:047-hclk-ioi-pips 32_19 35_19
+HCLK_IOI3.LVDS_25_IN_USE origin:030-iob 38_23 38_24 38_25 41_14 41_15 41_17 41_18 41_27 41_28 41_29
+HCLK_IOI3.ONLY_DIFF_IN_USE origin:030-iob 38_27 39_23 40_25 40_27 40_29 40_30 41_16 41_31
 HCLK_IOI3.STEPDOWN origin:030-iob 38_15 39_14 39_15 39_16
+HCLK_IOI3.TMDS_33_IN_USE origin:030-iob 38_28 41_19
 HCLK_IOI3.VREF.V_600_MV origin:030-iob 38_26 39_30
 HCLK_IOI3.VREF.V_675_MV origin:030-iob 38_26 39_22
 HCLK_IOI3.VREF.V_750_MV origin:030-iob 38_26 39_24

diff --git a/kintex7/segbits_int_l.origin_info.db b/kintex7/segbits_int_l.origin_info.db
index dc6e4c4..a42a1c9 100644
--- a/kintex7/segbits_int_l.origin_info.db
+++ b/kintex7/segbits_int_l.origin_info.db

@@ -170,7 +170,7 @@
 INT_L.BYP_ALT7.BYP_BOUNCE6 origin:050-pip-seed !22_63 !23_63 !25_63 21_63 24_63
 INT_L.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63
 INT_L.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63
-INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:056-pip-rem !22_63 21_63 23_63 24_63 25_63
+INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63
 INT_L.BYP_ALT7.LOGIC_OUTS_L3 origin:051-pip-imuxlout-bypalts !22_63 20_63 23_63 24_63 25_63
 INT_L.BYP_ALT7.LOGIC_OUTS_L15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63
 INT_L.BYP_ALT7.LOGIC_OUTS_L21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63
@@ -1917,7 +1917,7 @@
 INT_L.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
 INT_L.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
 INT_L.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
-INT_L.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43
+INT_L.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
 INT_L.EE4BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 02_57 07_57
 INT_L.EE4BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_57 04_58
 INT_L.EE4BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_56 04_58
@@ -3603,7 +3603,7 @@
 INT_L.WW4BEG2.LVB_L0 origin:056-pip-rem 04_34 05_32
 INT_L.WW4BEG2.LVB_L12 origin:056-pip-rem 05_32 07_33
 INT_L.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
-INT_L.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
+INT_L.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
 INT_L.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
 INT_L.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
 INT_L.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33

diff --git a/kintex7/segbits_int_r.origin_info.db b/kintex7/segbits_int_r.origin_info.db
index 5d50542..43e1106 100644
--- a/kintex7/segbits_int_r.origin_info.db
+++ b/kintex7/segbits_int_r.origin_info.db

@@ -705,7 +705,7 @@
 INT_R.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
 INT_R.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
 INT_R.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
-INT_R.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43
+INT_R.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
 INT_R.EE4BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_57 07_57
 INT_R.EE4BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_57 04_58
 INT_R.EE4BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_56 04_58
@@ -3321,7 +3321,7 @@
 INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44
 INT_R.SW6BEG2.LOGIC_OUTS20 origin:050-pip-seed 06_44 07_45
 INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
-INT_R.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
+INT_R.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
 INT_R.SW6BEG2.LVB0 origin:056-pip-rem 04_46 05_44
 INT_R.SW6BEG2.LVB12 origin:056-pip-rem 05_44 07_45
 INT_R.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47
@@ -3603,7 +3603,7 @@
 INT_R.WW4BEG2.LVB0 origin:056-pip-rem 04_34 05_32
 INT_R.WW4BEG2.LVB12 origin:056-pip-rem 05_32 07_33
 INT_R.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
-INT_R.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
+INT_R.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
 INT_R.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
 INT_R.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
 INT_R.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
@@ -3623,7 +3623,7 @@
 INT_R.WW4BEG3.LH0 origin:056-pip-rem 04_50 05_48
 INT_R.WW4BEG3.LV18 origin:056-pip-rem 05_48 07_49
 INT_R.WW4BEG3.NE2END3 origin:050-pip-seed 02_49 05_51
-INT_R.WW4BEG3.NE6END3 origin:050-pip-seed 05_48 05_51
+INT_R.WW4BEG3.NE6END3 origin:056-pip-rem 05_48 05_51
 INT_R.WW4BEG3.NN2END3 origin:050-pip-seed 03_48 05_51
 INT_R.WW4BEG3.NN6END3 origin:050-pip-seed 05_51 06_48
 INT_R.WW4BEG3.NW2END3 origin:050-pip-seed 02_49 03_49

diff --git a/kintex7/segbits_liob33.db b/kintex7/segbits_liob33.db
index d9ad4de..940d83b 100644
--- a/kintex7/segbits_liob33.db
+++ b/kintex7/segbits_liob33.db

@@ -1,14 +1,21 @@
+LIOB33.DIFF.ZIBUF_LOW_PWR 38_44 39_83
 LIOB33.IOB_Y0.IBUFDISABLE.I 38_82
 LIOB33.IOB_Y0.IN_TERM.NONE !38_120 !38_122 !39_121 !39_123
 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 38_120 38_122 39_121 39_123
 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 !39_121 39_123
 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 !38_122 !39_121 39_123
 LIOB33.IOB_Y0.INTERMDISABLE.I 39_89
+LIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED 38_64 38_74 38_76 38_98 38_100 38_102 38_118 39_65 39_75 39_97 !39_101 39_113 39_119 39_125
+LIOB33.IOB_Y0.LVDS_25.IN 38_86 39_87
+LIOB33.IOB_Y0.LVDS_25.OUT 38_64 38_74 38_76 38_98 38_102 39_65 39_75 !39_101
 LIOB33.IOB_Y0.LVTTL.DRIVE.I24 38_64 !38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127
 LIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93
 LIOB33.IOB_Y0.PULLTYPE.NONE !38_92 38_94 !39_93
 LIOB33.IOB_Y0.PULLTYPE.PULLDOWN !38_92 !38_94 !39_93
 LIOB33.IOB_Y0.PULLTYPE.PULLUP !38_92 38_94 39_93
+LIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED 38_64 !38_74 !38_76 !38_98 !38_100 !38_102 38_118 39_65 !39_75 !39_97 39_101 39_113 39_119 39_125
+LIOB33.IOB_Y0.TMDS_33.IN 38_86 !39_87
+LIOB33.IOB_Y0.TMDS_33.OUT 38_64 !38_74 !38_76 !38_98 !38_102 39_65 !39_75 39_101
 LIOB33.IOB_Y0.ZIBUF_LOW_PWR 38_84
 LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 !39_127
 LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127

diff --git a/kintex7/segbits_liob33.origin_info.db b/kintex7/segbits_liob33.origin_info.db
index 0490cb8..b07739c 100644
--- a/kintex7/segbits_liob33.origin_info.db
+++ b/kintex7/segbits_liob33.origin_info.db

@@ -1,14 +1,21 @@
+LIOB33.DIFF.ZIBUF_LOW_PWR origin:030-iob 38_44 39_83
 LIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82
 LIOB33.IOB_Y0.IN_TERM.NONE origin:030-iob !38_120 !38_122 !39_121 !39_123
 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123
 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !39_121 38_120 38_122 39_123
 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_122 !39_121 38_120 39_123
 LIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89
+LIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED origin:030-iob !39_101 38_100 38_102 38_118 38_64 38_74 38_76 38_98 39_113 39_119 39_125 39_65 39_75 39_97
+LIOB33.IOB_Y0.LVDS_25.IN origin:030-iob 38_86 39_87
+LIOB33.IOB_Y0.LVDS_25.OUT origin:030-iob !39_101 38_102 38_64 38_74 38_76 38_98 39_65 39_75
 LIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65
 LIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94
 LIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94
 LIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93
 LIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93
+LIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED origin:030-iob !38_100 !38_102 !38_74 !38_76 !38_98 !39_75 !39_97 38_118 38_64 39_101 39_113 39_119 39_125 39_65
+LIOB33.IOB_Y0.TMDS_33.IN origin:030-iob !39_87 38_86
+LIOB33.IOB_Y0.TMDS_33.OUT origin:030-iob !38_102 !38_74 !38_76 !38_98 !39_75 38_64 39_101 39_65
 LIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84
 LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_113 39_125 39_65
 LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65

diff --git a/kintex7/segbits_riob33.db b/kintex7/segbits_riob33.db
index b07295c..9e24932 100644
--- a/kintex7/segbits_riob33.db
+++ b/kintex7/segbits_riob33.db

@@ -1,14 +1,21 @@
+RIOB33.DIFF.ZIBUF_LOW_PWR 38_44 39_83
 RIOB33.IOB_Y0.IBUFDISABLE.I 38_82
 RIOB33.IOB_Y0.IN_TERM.NONE !38_120 !38_122 !39_121 !39_123
 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 38_120 38_122 39_121 39_123
 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 !39_121 39_123
 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 !38_122 !39_121 39_123
 RIOB33.IOB_Y0.INTERMDISABLE.I 39_89
+RIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED 38_64 38_74 38_76 38_98 38_100 38_102 38_118 39_65 39_75 39_97 !39_101 39_113 39_119 39_125
+RIOB33.IOB_Y0.LVDS_25.IN 38_86 39_87
+RIOB33.IOB_Y0.LVDS_25.OUT 38_64 38_74 38_76 38_98 38_102 39_65 39_75 !39_101
 RIOB33.IOB_Y0.LVTTL.DRIVE.I24 38_64 !38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127
 RIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93
 RIOB33.IOB_Y0.PULLTYPE.NONE !38_92 38_94 !39_93
 RIOB33.IOB_Y0.PULLTYPE.PULLDOWN !38_92 !38_94 !39_93
 RIOB33.IOB_Y0.PULLTYPE.PULLUP !38_92 38_94 39_93
+RIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED 38_64 !38_74 !38_76 !38_98 !38_100 !38_102 38_118 39_65 !39_75 !39_97 39_101 39_113 39_119 39_125
+RIOB33.IOB_Y0.TMDS_33.IN 38_86 !39_87
+RIOB33.IOB_Y0.TMDS_33.OUT 38_64 !38_74 !38_76 !38_98 !38_102 39_65 !39_75 39_101
 RIOB33.IOB_Y0.ZIBUF_LOW_PWR 38_84
 RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 !39_127
 RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127

diff --git a/kintex7/segbits_riob33.origin_info.db b/kintex7/segbits_riob33.origin_info.db
index 8db23c8..d2b5b14 100644
--- a/kintex7/segbits_riob33.origin_info.db
+++ b/kintex7/segbits_riob33.origin_info.db

@@ -1,14 +1,21 @@
+RIOB33.DIFF.ZIBUF_LOW_PWR origin:030-iob 38_44 39_83
 RIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82
 RIOB33.IOB_Y0.IN_TERM.NONE origin:030-iob !38_120 !38_122 !39_121 !39_123
 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123
 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !39_121 38_120 38_122 39_123
 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_122 !39_121 38_120 39_123
 RIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89
+RIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED origin:030-iob !39_101 38_100 38_102 38_118 38_64 38_74 38_76 38_98 39_113 39_119 39_125 39_65 39_75 39_97
+RIOB33.IOB_Y0.LVDS_25.IN origin:030-iob 38_86 39_87
+RIOB33.IOB_Y0.LVDS_25.OUT origin:030-iob !39_101 38_102 38_64 38_74 38_76 38_98 39_65 39_75
 RIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65
 RIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94
 RIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94
 RIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93
 RIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93
+RIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED origin:030-iob !38_100 !38_102 !38_74 !38_76 !38_98 !39_75 !39_97 38_118 38_64 39_101 39_113 39_119 39_125 39_65
+RIOB33.IOB_Y0.TMDS_33.IN origin:030-iob !39_87 38_86
+RIOB33.IOB_Y0.TMDS_33.OUT origin:030-iob !38_102 !38_74 !38_76 !38_98 !39_75 38_64 39_101 39_65
 RIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84
 RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_113 39_125 39_65
 RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65

diff --git a/zynq7/mask_liob33.db b/zynq7/mask_liob33.db
index 1de8776..bf0a21e 100644
--- a/zynq7/mask_liob33.db
+++ b/zynq7/mask_liob33.db

@@ -17,11 +17,16 @@
 bit 38_44
 bit 38_62
 bit 38_64
+bit 38_74
+bit 38_76
 bit 38_82
 bit 38_84
 bit 38_86
 bit 38_92
 bit 38_94
+bit 38_98
+bit 38_100
+bit 38_102
 bit 38_106
 bit 38_110
 bit 38_112
@@ -45,12 +50,15 @@
 bit 39_61
 bit 39_63
 bit 39_65
+bit 39_75
 bit 39_83
 bit 39_85
 bit 39_87
 bit 39_89
 bit 39_93
 bit 39_95
+bit 39_97
+bit 39_101
 bit 39_105
 bit 39_107
 bit 39_109

diff --git a/zynq7/mask_riob33.db b/zynq7/mask_riob33.db
index 1de8776..bf0a21e 100644
--- a/zynq7/mask_riob33.db
+++ b/zynq7/mask_riob33.db

@@ -17,11 +17,16 @@
 bit 38_44
 bit 38_62
 bit 38_64
+bit 38_74
+bit 38_76
 bit 38_82
 bit 38_84
 bit 38_86
 bit 38_92
 bit 38_94
+bit 38_98
+bit 38_100
+bit 38_102
 bit 38_106
 bit 38_110
 bit 38_112
@@ -45,12 +50,15 @@
 bit 39_61
 bit 39_63
 bit 39_65
+bit 39_75
 bit 39_83
 bit 39_85
 bit 39_87
 bit 39_89
 bit 39_93
 bit 39_95
+bit 39_97
+bit 39_101
 bit 39_105
 bit 39_107
 bit 39_109

diff --git a/zynq7/segbits_cmt_top_l_lower_b.db b/zynq7/segbits_cmt_top_l_lower_b.db
index 0a0670d..2dee80d 100644
--- a/zynq7/segbits_cmt_top_l_lower_b.db
+++ b/zynq7/segbits_cmt_top_l_lower_b.db

@@ -5,12 +5,12 @@
 CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_IN3_HCLK 28_1012 !28_1013 29_979 !29_1012
 CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_IN3_INT 28_1012 28_1013 29_979 !29_1012
 CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_LR_LOWER_B_CLKFBOUT2IN 28_980 28_981 29_980
-CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB0 28_1014 28_1015 !29_1013 29_1014
-CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB1 28_1014 !28_1015 !29_1013 !29_1014
-CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB2 !28_1014 !28_1015 !29_1013 29_1014
-CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB3 !28_1014 !28_1015 !29_1013 !29_1014
-CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_IN1_HCLK !28_1014 !28_1015 29_1013 !29_1014
-CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_IN1_INT !28_1014 !28_1015 29_1013 29_1014
+CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB0 28_1014 !29_1013 29_1014
+CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB1 28_1014 !29_1013 !29_1014
+CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB2 !28_1014 !29_1013 29_1014
+CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB3 !28_1014 !29_1013 !29_1014
+CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_IN1_HCLK !28_1014 29_1013 !29_1014
+CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_IN1_INT !28_1014 29_1013 29_1014
 CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_L_LOWER_B_CLK_FREQ_BB0 !28_1015 28_1016 29_1015
 CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_L_LOWER_B_CLK_FREQ_BB1 !28_1015 !28_1016 29_1015
 CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_L_LOWER_B_CLK_FREQ_BB2 !28_1015 28_1016 !29_1015

diff --git a/zynq7/segbits_cmt_top_l_lower_b.origin_info.db b/zynq7/segbits_cmt_top_l_lower_b.origin_info.db
index 40d8d29..9a3a102 100644
--- a/zynq7/segbits_cmt_top_l_lower_b.origin_info.db
+++ b/zynq7/segbits_cmt_top_l_lower_b.origin_info.db

@@ -5,12 +5,12 @@
 CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_IN3_HCLK origin:034b-cmt-mmcm-pips !28_1013 !29_1012 28_1012 29_979
 CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_IN3_INT origin:034b-cmt-mmcm-pips !29_1012 28_1012 28_1013 29_979
 CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_LR_LOWER_B_CLKFBOUT2IN origin:034b-cmt-mmcm-pips 28_980 28_981 29_980
-CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB0 origin:034b-cmt-mmcm-pips !29_1013 28_1014 28_1015 29_1014
-CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB1 origin:034b-cmt-mmcm-pips !28_1015 !29_1013 !29_1014 28_1014
-CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB2 origin:034b-cmt-mmcm-pips !28_1014 !28_1015 !29_1013 29_1014
-CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB3 origin:034b-cmt-mmcm-pips !28_1014 !28_1015 !29_1013 !29_1014
-CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_IN1_HCLK origin:034b-cmt-mmcm-pips !28_1014 !28_1015 !29_1014 29_1013
-CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_IN1_INT origin:034b-cmt-mmcm-pips !28_1014 !28_1015 29_1013 29_1014
+CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB0 origin:034b-cmt-mmcm-pips !29_1013 28_1014 29_1014
+CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB1 origin:034b-cmt-mmcm-pips !29_1013 !29_1014 28_1014
+CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB2 origin:034b-cmt-mmcm-pips !28_1014 !29_1013 29_1014
+CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB3 origin:034b-cmt-mmcm-pips !28_1014 !29_1013 !29_1014
+CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_IN1_HCLK origin:034b-cmt-mmcm-pips !28_1014 !29_1014 29_1013
+CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_IN1_INT origin:034b-cmt-mmcm-pips !28_1014 29_1013 29_1014
 CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_L_LOWER_B_CLK_FREQ_BB0 origin:034b-cmt-mmcm-pips !28_1015 28_1016 29_1015
 CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_L_LOWER_B_CLK_FREQ_BB1 origin:034b-cmt-mmcm-pips !28_1015 !28_1016 29_1015
 CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_L_LOWER_B_CLK_FREQ_BB2 origin:034b-cmt-mmcm-pips !28_1015 !29_1015 28_1016

diff --git a/zynq7/segbits_cmt_top_r_lower_b.db b/zynq7/segbits_cmt_top_r_lower_b.db
index ede8a96..6bc69a2 100644
--- a/zynq7/segbits_cmt_top_r_lower_b.db
+++ b/zynq7/segbits_cmt_top_r_lower_b.db

@@ -5,12 +5,12 @@
 CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB3 !28_1012 !28_1013 29_979 !29_1012
 CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_IN3_HCLK 28_1012 !28_1013 29_979 !29_1012
 CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_IN3_INT 28_1012 28_1013 29_979 !29_1012
-CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB0 28_1014 28_1015 !29_1013 29_1014
-CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB1 28_1014 !28_1015 !29_1013 !29_1014
-CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB2 !28_1014 !28_1015 !29_1013 29_1014
-CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB3 !28_1014 !28_1015 !29_1013 !29_1014
-CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_IN1_HCLK !28_1014 !28_1015 29_1013 !29_1014
-CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_IN1_INT !28_1014 !28_1015 29_1013 29_1014
+CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB0 28_1014 !29_1013 29_1014
+CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB1 28_1014 !29_1013 !29_1014
+CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB2 !28_1014 !29_1013 29_1014
+CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB3 !28_1014 !29_1013 !29_1014
+CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_IN1_HCLK !28_1014 29_1013 !29_1014
+CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_IN1_INT !28_1014 29_1013 29_1014
 CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_R_LOWER_B_CLK_FREQ_BB0 !28_1015 28_1016 29_1015
 CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_R_LOWER_B_CLK_FREQ_BB1 !28_1015 !28_1016 29_1015
 CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_R_LOWER_B_CLK_FREQ_BB2 !28_1015 28_1016 !29_1015

diff --git a/zynq7/segbits_cmt_top_r_lower_b.origin_info.db b/zynq7/segbits_cmt_top_r_lower_b.origin_info.db
index dbd78ac..cb581bc 100644
--- a/zynq7/segbits_cmt_top_r_lower_b.origin_info.db
+++ b/zynq7/segbits_cmt_top_r_lower_b.origin_info.db

@@ -5,12 +5,12 @@
 CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB3 origin:034b-cmt-mmcm-pips !28_1012 !28_1013 !29_1012 29_979
 CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_IN3_HCLK origin:034b-cmt-mmcm-pips !28_1013 !29_1012 28_1012 29_979
 CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_IN3_INT origin:034b-cmt-mmcm-pips !29_1012 28_1012 28_1013 29_979
-CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB0 origin:034b-cmt-mmcm-pips !29_1013 28_1014 28_1015 29_1014
-CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB1 origin:034b-cmt-mmcm-pips !28_1015 !29_1013 !29_1014 28_1014
-CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB2 origin:034b-cmt-mmcm-pips !28_1014 !28_1015 !29_1013 29_1014
-CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB3 origin:034b-cmt-mmcm-pips !28_1014 !28_1015 !29_1013 !29_1014
-CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_IN1_HCLK origin:034b-cmt-mmcm-pips !28_1014 !28_1015 !29_1014 29_1013
-CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_IN1_INT origin:034b-cmt-mmcm-pips !28_1014 !28_1015 29_1013 29_1014
+CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB0 origin:034b-cmt-mmcm-pips !29_1013 28_1014 29_1014
+CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB1 origin:034b-cmt-mmcm-pips !29_1013 !29_1014 28_1014
+CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB2 origin:034b-cmt-mmcm-pips !28_1014 !29_1013 29_1014
+CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB3 origin:034b-cmt-mmcm-pips !28_1014 !29_1013 !29_1014
+CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_IN1_HCLK origin:034b-cmt-mmcm-pips !28_1014 !29_1014 29_1013
+CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_IN1_INT origin:034b-cmt-mmcm-pips !28_1014 29_1013 29_1014
 CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_R_LOWER_B_CLK_FREQ_BB0 origin:034b-cmt-mmcm-pips !28_1015 28_1016 29_1015
 CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_R_LOWER_B_CLK_FREQ_BB1 origin:034b-cmt-mmcm-pips !28_1015 !28_1016 29_1015
 CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_R_LOWER_B_CLK_FREQ_BB2 origin:034b-cmt-mmcm-pips !28_1015 !29_1015 28_1016

diff --git a/zynq7/segbits_dsp_l.db b/zynq7/segbits_dsp_l.db
index 55c2f6b..6b0e0f2 100644
--- a/zynq7/segbits_dsp_l.db
+++ b/zynq7/segbits_dsp_l.db

@@ -1,3 +1,159 @@
+DSP_L.DSP_0_CEAD.DSP_GND_L 26_63
+DSP_L.DSP_0_CEAD.DSP_VCC_L 27_62
+DSP_L.DSP_0_CEALUMODE.DSP_GND_L 27_51
+DSP_L.DSP_0_CEALUMODE.DSP_VCC_L 26_50
+DSP_L.DSP_0_CED.DSP_GND_L 27_72
+DSP_L.DSP_0_CED.DSP_VCC_L 26_72
+DSP_L.DSP_0_CEINMODE.DSP_GND_L 26_69
+DSP_L.DSP_0_CEINMODE.DSP_VCC_L 26_67
+DSP_L.DSP_0_RSTD.DSP_GND_L 27_96
+DSP_L.DSP_0_RSTD.DSP_VCC_L 27_85
+DSP_L.DSP_0_ALUMODE2.DSP_GND_L 27_56
+DSP_L.DSP_0_ALUMODE2.DSP_VCC_L 26_55
+DSP_L.DSP_0_ALUMODE3.DSP_GND_L 27_60
+DSP_L.DSP_0_ALUMODE3.DSP_VCC_L 26_53
+DSP_L.DSP_0_CARRYINSEL2.DSP_GND_L 26_17
+DSP_L.DSP_0_CARRYINSEL2.DSP_VCC_L 27_18
+DSP_L.DSP_0_D0.DSP_GND_L 26_65
+DSP_L.DSP_0_D0.DSP_VCC_L 27_64
+DSP_L.DSP_0_D1.DSP_GND_L 27_68
+DSP_L.DSP_0_D1.DSP_VCC_L 27_74
+DSP_L.DSP_0_D2.DSP_GND_L 27_71
+DSP_L.DSP_0_D2.DSP_VCC_L 27_70
+DSP_L.DSP_0_D3.DSP_GND_L 26_75
+DSP_L.DSP_0_D3.DSP_VCC_L 26_73
+DSP_L.DSP_0_D4.DSP_GND_L 27_78
+DSP_L.DSP_0_D4.DSP_VCC_L 26_77
+DSP_L.DSP_0_D5.DSP_GND_L 26_82
+DSP_L.DSP_0_D5.DSP_VCC_L 26_81
+DSP_L.DSP_0_D6.DSP_GND_L 26_89
+DSP_L.DSP_0_D6.DSP_VCC_L 27_89
+DSP_L.DSP_0_D7.DSP_GND_L 27_91
+DSP_L.DSP_0_D7.DSP_VCC_L 26_91
+DSP_L.DSP_0_D8.DSP_GND_L 26_98
+DSP_L.DSP_0_D8.DSP_VCC_L 27_97
+DSP_L.DSP_0_D9.DSP_GND_L 26_101
+DSP_L.DSP_0_D9.DSP_VCC_L 26_99
+DSP_L.DSP_0_D10.DSP_GND_L 26_105
+DSP_L.DSP_0_D10.DSP_VCC_L 26_103
+DSP_L.DSP_0_D11.DSP_GND_L 27_107
+DSP_L.DSP_0_D11.DSP_VCC_L 27_105
+DSP_L.DSP_0_D12.DSP_GND_L 26_107
+DSP_L.DSP_0_D12.DSP_VCC_L 26_111
+DSP_L.DSP_0_D13.DSP_GND_L 27_113
+DSP_L.DSP_0_D13.DSP_VCC_L 26_114
+DSP_L.DSP_0_D14.DSP_GND_L 26_118
+DSP_L.DSP_0_D14.DSP_VCC_L 27_116
+DSP_L.DSP_0_D15.DSP_GND_L 27_122
+DSP_L.DSP_0_D15.DSP_VCC_L 27_120
+DSP_L.DSP_0_D16.DSP_GND_L 27_125
+DSP_L.DSP_0_D16.DSP_VCC_L 26_125
+DSP_L.DSP_0_D17.DSP_GND_L 27_128
+DSP_L.DSP_0_D17.DSP_VCC_L 27_126
+DSP_L.DSP_0_D18.DSP_GND_L 26_135
+DSP_L.DSP_0_D18.DSP_VCC_L 26_131
+DSP_L.DSP_0_D19.DSP_GND_L 27_140
+DSP_L.DSP_0_D19.DSP_VCC_L 26_140
+DSP_L.DSP_0_D20.DSP_GND_L 26_145
+DSP_L.DSP_0_D20.DSP_VCC_L 27_143
+DSP_L.DSP_0_D21.DSP_GND_L 27_147
+DSP_L.DSP_0_D21.DSP_VCC_L 26_147
+DSP_L.DSP_0_D22.DSP_GND_L 27_151
+DSP_L.DSP_0_D22.DSP_VCC_L 26_150
+DSP_L.DSP_0_D23.DSP_GND_L 27_154
+DSP_L.DSP_0_D23.DSP_VCC_L 27_153
+DSP_L.DSP_0_D24.DSP_GND_L 27_158
+DSP_L.DSP_0_D24.DSP_VCC_L 27_155
+DSP_L.DSP_0_INMODE0.DSP_GND_L 27_134
+DSP_L.DSP_0_INMODE0.DSP_VCC_L 27_130
+DSP_L.DSP_0_INMODE1.DSP_GND_L 26_133
+DSP_L.DSP_0_INMODE1.DSP_VCC_L 27_145
+DSP_L.DSP_0_INMODE2.DSP_GND_L 27_80
+DSP_L.DSP_0_INMODE2.DSP_VCC_L 26_71
+DSP_L.DSP_0_INMODE3.DSP_GND_L 27_79
+DSP_L.DSP_0_INMODE3.DSP_VCC_L 26_70
+DSP_L.DSP_0_INMODE4.DSP_GND_L 26_58
+DSP_L.DSP_0_INMODE4.DSP_VCC_L 26_46
+DSP_L.DSP_0_OPMODE6.DSP_GND_L 27_12
+DSP_L.DSP_0_OPMODE6.DSP_VCC_L 27_20
+DSP_L.DSP_1_CEAD.DSP_GND_L 26_223
+DSP_L.DSP_1_CEAD.DSP_VCC_L 27_222
+DSP_L.DSP_1_CEALUMODE.DSP_GND_L 27_211
+DSP_L.DSP_1_CEALUMODE.DSP_VCC_L 26_210
+DSP_L.DSP_1_CED.DSP_GND_L 27_232
+DSP_L.DSP_1_CED.DSP_VCC_L 26_232
+DSP_L.DSP_1_CEINMODE.DSP_GND_L 26_229
+DSP_L.DSP_1_CEINMODE.DSP_VCC_L 26_227
+DSP_L.DSP_1_RSTD.DSP_GND_L 27_256
+DSP_L.DSP_1_RSTD.DSP_VCC_L 27_245
+DSP_L.DSP_1_ALUMODE2.DSP_GND_L 27_216
+DSP_L.DSP_1_ALUMODE2.DSP_VCC_L 26_215
+DSP_L.DSP_1_ALUMODE3.DSP_GND_L 27_220
+DSP_L.DSP_1_ALUMODE3.DSP_VCC_L 26_213
+DSP_L.DSP_1_CARRYINSEL2.DSP_GND_L 26_177
+DSP_L.DSP_1_CARRYINSEL2.DSP_VCC_L 27_178
+DSP_L.DSP_1_D0.DSP_GND_L 26_225
+DSP_L.DSP_1_D0.DSP_VCC_L 27_224
+DSP_L.DSP_1_D1.DSP_GND_L 27_228
+DSP_L.DSP_1_D1.DSP_VCC_L 27_234
+DSP_L.DSP_1_D2.DSP_GND_L 27_231
+DSP_L.DSP_1_D2.DSP_VCC_L 27_230
+DSP_L.DSP_1_D3.DSP_GND_L 26_235
+DSP_L.DSP_1_D3.DSP_VCC_L 26_233
+DSP_L.DSP_1_D4.DSP_GND_L 27_238
+DSP_L.DSP_1_D4.DSP_VCC_L 26_237
+DSP_L.DSP_1_D5.DSP_GND_L 26_242
+DSP_L.DSP_1_D5.DSP_VCC_L 26_241
+DSP_L.DSP_1_D6.DSP_GND_L 26_249
+DSP_L.DSP_1_D6.DSP_VCC_L 27_249
+DSP_L.DSP_1_D7.DSP_GND_L 27_251
+DSP_L.DSP_1_D7.DSP_VCC_L 26_251
+DSP_L.DSP_1_D8.DSP_GND_L 26_258
+DSP_L.DSP_1_D8.DSP_VCC_L 27_257
+DSP_L.DSP_1_D9.DSP_GND_L 26_261
+DSP_L.DSP_1_D9.DSP_VCC_L 26_259
+DSP_L.DSP_1_D10.DSP_GND_L 26_265
+DSP_L.DSP_1_D10.DSP_VCC_L 26_263
+DSP_L.DSP_1_D11.DSP_GND_L 27_267
+DSP_L.DSP_1_D11.DSP_VCC_L 27_265
+DSP_L.DSP_1_D12.DSP_GND_L 26_267
+DSP_L.DSP_1_D12.DSP_VCC_L 26_271
+DSP_L.DSP_1_D13.DSP_GND_L 27_273
+DSP_L.DSP_1_D13.DSP_VCC_L 26_274
+DSP_L.DSP_1_D14.DSP_GND_L 26_278
+DSP_L.DSP_1_D14.DSP_VCC_L 27_276
+DSP_L.DSP_1_D15.DSP_GND_L 27_282
+DSP_L.DSP_1_D15.DSP_VCC_L 27_280
+DSP_L.DSP_1_D16.DSP_GND_L 27_285
+DSP_L.DSP_1_D16.DSP_VCC_L 26_285
+DSP_L.DSP_1_D17.DSP_GND_L 27_288
+DSP_L.DSP_1_D17.DSP_VCC_L 27_286
+DSP_L.DSP_1_D18.DSP_GND_L 26_295
+DSP_L.DSP_1_D18.DSP_VCC_L 26_291
+DSP_L.DSP_1_D19.DSP_GND_L 27_300
+DSP_L.DSP_1_D19.DSP_VCC_L 26_300
+DSP_L.DSP_1_D20.DSP_GND_L 26_305
+DSP_L.DSP_1_D20.DSP_VCC_L 27_303
+DSP_L.DSP_1_D21.DSP_GND_L 27_307
+DSP_L.DSP_1_D21.DSP_VCC_L 26_307
+DSP_L.DSP_1_D22.DSP_GND_L 27_311
+DSP_L.DSP_1_D22.DSP_VCC_L 26_310
+DSP_L.DSP_1_D23.DSP_GND_L 27_314
+DSP_L.DSP_1_D23.DSP_VCC_L 27_313
+DSP_L.DSP_1_D24.DSP_GND_L 27_318
+DSP_L.DSP_1_D24.DSP_VCC_L 27_315
+DSP_L.DSP_1_INMODE0.DSP_GND_L 27_294
+DSP_L.DSP_1_INMODE0.DSP_VCC_L 27_290
+DSP_L.DSP_1_INMODE1.DSP_GND_L 26_293
+DSP_L.DSP_1_INMODE1.DSP_VCC_L 27_305
+DSP_L.DSP_1_INMODE2.DSP_GND_L 27_240
+DSP_L.DSP_1_INMODE2.DSP_VCC_L 26_231
+DSP_L.DSP_1_INMODE3.DSP_GND_L 27_239
+DSP_L.DSP_1_INMODE3.DSP_VCC_L 26_230
+DSP_L.DSP_1_INMODE4.DSP_GND_L 26_218
+DSP_L.DSP_1_INMODE4.DSP_VCC_L 26_206
+DSP_L.DSP_1_OPMODE6.DSP_GND_L 27_172
+DSP_L.DSP_1_OPMODE6.DSP_VCC_L 27_180
 DSP_L.DSP48.DSP_0.A_INPUT[0] 27_84
 DSP_L.DSP48.DSP_0.AREG_0 26_113 26_137 27_111
 DSP_L.DSP48.DSP_0.AREG_2 27_136

diff --git a/zynq7/segbits_dsp_l.origin_info.db b/zynq7/segbits_dsp_l.origin_info.db
index 53f2e7f..b4a192d 100644
--- a/zynq7/segbits_dsp_l.origin_info.db
+++ b/zynq7/segbits_dsp_l.origin_info.db

@@ -1,3 +1,159 @@
+DSP_L.DSP_0_CEAD.DSP_GND_L origin:101-dsp-pips 26_63
+DSP_L.DSP_0_CEAD.DSP_VCC_L origin:101-dsp-pips 27_62
+DSP_L.DSP_0_CEALUMODE.DSP_GND_L origin:101-dsp-pips 27_51
+DSP_L.DSP_0_CEALUMODE.DSP_VCC_L origin:101-dsp-pips 26_50
+DSP_L.DSP_0_CED.DSP_GND_L origin:101-dsp-pips 27_72
+DSP_L.DSP_0_CED.DSP_VCC_L origin:101-dsp-pips 26_72
+DSP_L.DSP_0_CEINMODE.DSP_GND_L origin:101-dsp-pips 26_69
+DSP_L.DSP_0_CEINMODE.DSP_VCC_L origin:101-dsp-pips 26_67
+DSP_L.DSP_0_RSTD.DSP_GND_L origin:101-dsp-pips 27_96
+DSP_L.DSP_0_RSTD.DSP_VCC_L origin:101-dsp-pips 27_85
+DSP_L.DSP_0_ALUMODE2.DSP_GND_L origin:101-dsp-pips 27_56
+DSP_L.DSP_0_ALUMODE2.DSP_VCC_L origin:101-dsp-pips 26_55
+DSP_L.DSP_0_ALUMODE3.DSP_GND_L origin:101-dsp-pips 27_60
+DSP_L.DSP_0_ALUMODE3.DSP_VCC_L origin:101-dsp-pips 26_53
+DSP_L.DSP_0_CARRYINSEL2.DSP_GND_L origin:101-dsp-pips 26_17
+DSP_L.DSP_0_CARRYINSEL2.DSP_VCC_L origin:101-dsp-pips 27_18
+DSP_L.DSP_0_D0.DSP_GND_L origin:101-dsp-pips 26_65
+DSP_L.DSP_0_D0.DSP_VCC_L origin:101-dsp-pips 27_64
+DSP_L.DSP_0_D1.DSP_GND_L origin:101-dsp-pips 27_68
+DSP_L.DSP_0_D1.DSP_VCC_L origin:101-dsp-pips 27_74
+DSP_L.DSP_0_D2.DSP_GND_L origin:101-dsp-pips 27_71
+DSP_L.DSP_0_D2.DSP_VCC_L origin:101-dsp-pips 27_70
+DSP_L.DSP_0_D3.DSP_GND_L origin:101-dsp-pips 26_75
+DSP_L.DSP_0_D3.DSP_VCC_L origin:101-dsp-pips 26_73
+DSP_L.DSP_0_D4.DSP_GND_L origin:101-dsp-pips 27_78
+DSP_L.DSP_0_D4.DSP_VCC_L origin:101-dsp-pips 26_77
+DSP_L.DSP_0_D5.DSP_GND_L origin:101-dsp-pips 26_82
+DSP_L.DSP_0_D5.DSP_VCC_L origin:101-dsp-pips 26_81
+DSP_L.DSP_0_D6.DSP_GND_L origin:101-dsp-pips 26_89
+DSP_L.DSP_0_D6.DSP_VCC_L origin:101-dsp-pips 27_89
+DSP_L.DSP_0_D7.DSP_GND_L origin:101-dsp-pips 27_91
+DSP_L.DSP_0_D7.DSP_VCC_L origin:101-dsp-pips 26_91
+DSP_L.DSP_0_D8.DSP_GND_L origin:101-dsp-pips 26_98
+DSP_L.DSP_0_D8.DSP_VCC_L origin:101-dsp-pips 27_97
+DSP_L.DSP_0_D9.DSP_GND_L origin:101-dsp-pips 26_101
+DSP_L.DSP_0_D9.DSP_VCC_L origin:101-dsp-pips 26_99
+DSP_L.DSP_0_D10.DSP_GND_L origin:101-dsp-pips 26_105
+DSP_L.DSP_0_D10.DSP_VCC_L origin:101-dsp-pips 26_103
+DSP_L.DSP_0_D11.DSP_GND_L origin:101-dsp-pips 27_107
+DSP_L.DSP_0_D11.DSP_VCC_L origin:101-dsp-pips 27_105
+DSP_L.DSP_0_D12.DSP_GND_L origin:101-dsp-pips 26_107
+DSP_L.DSP_0_D12.DSP_VCC_L origin:101-dsp-pips 26_111
+DSP_L.DSP_0_D13.DSP_GND_L origin:101-dsp-pips 27_113
+DSP_L.DSP_0_D13.DSP_VCC_L origin:101-dsp-pips 26_114
+DSP_L.DSP_0_D14.DSP_GND_L origin:101-dsp-pips 26_118
+DSP_L.DSP_0_D14.DSP_VCC_L origin:101-dsp-pips 27_116
+DSP_L.DSP_0_D15.DSP_GND_L origin:101-dsp-pips 27_122
+DSP_L.DSP_0_D15.DSP_VCC_L origin:101-dsp-pips 27_120
+DSP_L.DSP_0_D16.DSP_GND_L origin:101-dsp-pips 27_125
+DSP_L.DSP_0_D16.DSP_VCC_L origin:101-dsp-pips 26_125
+DSP_L.DSP_0_D17.DSP_GND_L origin:101-dsp-pips 27_128
+DSP_L.DSP_0_D17.DSP_VCC_L origin:101-dsp-pips 27_126
+DSP_L.DSP_0_D18.DSP_GND_L origin:101-dsp-pips 26_135
+DSP_L.DSP_0_D18.DSP_VCC_L origin:101-dsp-pips 26_131
+DSP_L.DSP_0_D19.DSP_GND_L origin:101-dsp-pips 27_140
+DSP_L.DSP_0_D19.DSP_VCC_L origin:101-dsp-pips 26_140
+DSP_L.DSP_0_D20.DSP_GND_L origin:101-dsp-pips 26_145
+DSP_L.DSP_0_D20.DSP_VCC_L origin:101-dsp-pips 27_143
+DSP_L.DSP_0_D21.DSP_GND_L origin:101-dsp-pips 27_147
+DSP_L.DSP_0_D21.DSP_VCC_L origin:101-dsp-pips 26_147
+DSP_L.DSP_0_D22.DSP_GND_L origin:101-dsp-pips 27_151
+DSP_L.DSP_0_D22.DSP_VCC_L origin:101-dsp-pips 26_150
+DSP_L.DSP_0_D23.DSP_GND_L origin:101-dsp-pips 27_154
+DSP_L.DSP_0_D23.DSP_VCC_L origin:101-dsp-pips 27_153
+DSP_L.DSP_0_D24.DSP_GND_L origin:101-dsp-pips 27_158
+DSP_L.DSP_0_D24.DSP_VCC_L origin:101-dsp-pips 27_155
+DSP_L.DSP_0_INMODE0.DSP_GND_L origin:101-dsp-pips 27_134
+DSP_L.DSP_0_INMODE0.DSP_VCC_L origin:101-dsp-pips 27_130
+DSP_L.DSP_0_INMODE1.DSP_GND_L origin:101-dsp-pips 26_133
+DSP_L.DSP_0_INMODE1.DSP_VCC_L origin:101-dsp-pips 27_145
+DSP_L.DSP_0_INMODE2.DSP_GND_L origin:101-dsp-pips 27_80
+DSP_L.DSP_0_INMODE2.DSP_VCC_L origin:101-dsp-pips 26_71
+DSP_L.DSP_0_INMODE3.DSP_GND_L origin:101-dsp-pips 27_79
+DSP_L.DSP_0_INMODE3.DSP_VCC_L origin:101-dsp-pips 26_70
+DSP_L.DSP_0_INMODE4.DSP_GND_L origin:101-dsp-pips 26_58
+DSP_L.DSP_0_INMODE4.DSP_VCC_L origin:101-dsp-pips 26_46
+DSP_L.DSP_0_OPMODE6.DSP_GND_L origin:101-dsp-pips 27_12
+DSP_L.DSP_0_OPMODE6.DSP_VCC_L origin:101-dsp-pips 27_20
+DSP_L.DSP_1_CEAD.DSP_GND_L origin:101-dsp-pips 26_223
+DSP_L.DSP_1_CEAD.DSP_VCC_L origin:101-dsp-pips 27_222
+DSP_L.DSP_1_CEALUMODE.DSP_GND_L origin:101-dsp-pips 27_211
+DSP_L.DSP_1_CEALUMODE.DSP_VCC_L origin:101-dsp-pips 26_210
+DSP_L.DSP_1_CED.DSP_GND_L origin:101-dsp-pips 27_232
+DSP_L.DSP_1_CED.DSP_VCC_L origin:101-dsp-pips 26_232
+DSP_L.DSP_1_CEINMODE.DSP_GND_L origin:101-dsp-pips 26_229
+DSP_L.DSP_1_CEINMODE.DSP_VCC_L origin:101-dsp-pips 26_227
+DSP_L.DSP_1_RSTD.DSP_GND_L origin:101-dsp-pips 27_256
+DSP_L.DSP_1_RSTD.DSP_VCC_L origin:101-dsp-pips 27_245
+DSP_L.DSP_1_ALUMODE2.DSP_GND_L origin:101-dsp-pips 27_216
+DSP_L.DSP_1_ALUMODE2.DSP_VCC_L origin:101-dsp-pips 26_215
+DSP_L.DSP_1_ALUMODE3.DSP_GND_L origin:101-dsp-pips 27_220
+DSP_L.DSP_1_ALUMODE3.DSP_VCC_L origin:101-dsp-pips 26_213
+DSP_L.DSP_1_CARRYINSEL2.DSP_GND_L origin:101-dsp-pips 26_177
+DSP_L.DSP_1_CARRYINSEL2.DSP_VCC_L origin:101-dsp-pips 27_178
+DSP_L.DSP_1_D0.DSP_GND_L origin:101-dsp-pips 26_225
+DSP_L.DSP_1_D0.DSP_VCC_L origin:101-dsp-pips 27_224
+DSP_L.DSP_1_D1.DSP_GND_L origin:101-dsp-pips 27_228
+DSP_L.DSP_1_D1.DSP_VCC_L origin:101-dsp-pips 27_234
+DSP_L.DSP_1_D2.DSP_GND_L origin:101-dsp-pips 27_231
+DSP_L.DSP_1_D2.DSP_VCC_L origin:101-dsp-pips 27_230
+DSP_L.DSP_1_D3.DSP_GND_L origin:101-dsp-pips 26_235
+DSP_L.DSP_1_D3.DSP_VCC_L origin:101-dsp-pips 26_233
+DSP_L.DSP_1_D4.DSP_GND_L origin:101-dsp-pips 27_238
+DSP_L.DSP_1_D4.DSP_VCC_L origin:101-dsp-pips 26_237
+DSP_L.DSP_1_D5.DSP_GND_L origin:101-dsp-pips 26_242
+DSP_L.DSP_1_D5.DSP_VCC_L origin:101-dsp-pips 26_241
+DSP_L.DSP_1_D6.DSP_GND_L origin:101-dsp-pips 26_249
+DSP_L.DSP_1_D6.DSP_VCC_L origin:101-dsp-pips 27_249
+DSP_L.DSP_1_D7.DSP_GND_L origin:101-dsp-pips 27_251
+DSP_L.DSP_1_D7.DSP_VCC_L origin:101-dsp-pips 26_251
+DSP_L.DSP_1_D8.DSP_GND_L origin:101-dsp-pips 26_258
+DSP_L.DSP_1_D8.DSP_VCC_L origin:101-dsp-pips 27_257
+DSP_L.DSP_1_D9.DSP_GND_L origin:101-dsp-pips 26_261
+DSP_L.DSP_1_D9.DSP_VCC_L origin:101-dsp-pips 26_259
+DSP_L.DSP_1_D10.DSP_GND_L origin:101-dsp-pips 26_265
+DSP_L.DSP_1_D10.DSP_VCC_L origin:101-dsp-pips 26_263
+DSP_L.DSP_1_D11.DSP_GND_L origin:101-dsp-pips 27_267
+DSP_L.DSP_1_D11.DSP_VCC_L origin:101-dsp-pips 27_265
+DSP_L.DSP_1_D12.DSP_GND_L origin:101-dsp-pips 26_267
+DSP_L.DSP_1_D12.DSP_VCC_L origin:101-dsp-pips 26_271
+DSP_L.DSP_1_D13.DSP_GND_L origin:101-dsp-pips 27_273
+DSP_L.DSP_1_D13.DSP_VCC_L origin:101-dsp-pips 26_274
+DSP_L.DSP_1_D14.DSP_GND_L origin:101-dsp-pips 26_278
+DSP_L.DSP_1_D14.DSP_VCC_L origin:101-dsp-pips 27_276
+DSP_L.DSP_1_D15.DSP_GND_L origin:101-dsp-pips 27_282
+DSP_L.DSP_1_D15.DSP_VCC_L origin:101-dsp-pips 27_280
+DSP_L.DSP_1_D16.DSP_GND_L origin:101-dsp-pips 27_285
+DSP_L.DSP_1_D16.DSP_VCC_L origin:101-dsp-pips 26_285
+DSP_L.DSP_1_D17.DSP_GND_L origin:101-dsp-pips 27_288
+DSP_L.DSP_1_D17.DSP_VCC_L origin:101-dsp-pips 27_286
+DSP_L.DSP_1_D18.DSP_GND_L origin:101-dsp-pips 26_295
+DSP_L.DSP_1_D18.DSP_VCC_L origin:101-dsp-pips 26_291
+DSP_L.DSP_1_D19.DSP_GND_L origin:101-dsp-pips 27_300
+DSP_L.DSP_1_D19.DSP_VCC_L origin:101-dsp-pips 26_300
+DSP_L.DSP_1_D20.DSP_GND_L origin:101-dsp-pips 26_305
+DSP_L.DSP_1_D20.DSP_VCC_L origin:101-dsp-pips 27_303
+DSP_L.DSP_1_D21.DSP_GND_L origin:101-dsp-pips 27_307
+DSP_L.DSP_1_D21.DSP_VCC_L origin:101-dsp-pips 26_307
+DSP_L.DSP_1_D22.DSP_GND_L origin:101-dsp-pips 27_311
+DSP_L.DSP_1_D22.DSP_VCC_L origin:101-dsp-pips 26_310
+DSP_L.DSP_1_D23.DSP_GND_L origin:101-dsp-pips 27_314
+DSP_L.DSP_1_D23.DSP_VCC_L origin:101-dsp-pips 27_313
+DSP_L.DSP_1_D24.DSP_GND_L origin:101-dsp-pips 27_318
+DSP_L.DSP_1_D24.DSP_VCC_L origin:101-dsp-pips 27_315
+DSP_L.DSP_1_INMODE0.DSP_GND_L origin:101-dsp-pips 27_294
+DSP_L.DSP_1_INMODE0.DSP_VCC_L origin:101-dsp-pips 27_290
+DSP_L.DSP_1_INMODE1.DSP_GND_L origin:101-dsp-pips 26_293
+DSP_L.DSP_1_INMODE1.DSP_VCC_L origin:101-dsp-pips 27_305
+DSP_L.DSP_1_INMODE2.DSP_GND_L origin:101-dsp-pips 27_240
+DSP_L.DSP_1_INMODE2.DSP_VCC_L origin:101-dsp-pips 26_231
+DSP_L.DSP_1_INMODE3.DSP_GND_L origin:101-dsp-pips 27_239
+DSP_L.DSP_1_INMODE3.DSP_VCC_L origin:101-dsp-pips 26_230
+DSP_L.DSP_1_INMODE4.DSP_GND_L origin:101-dsp-pips 26_218
+DSP_L.DSP_1_INMODE4.DSP_VCC_L origin:101-dsp-pips 26_206
+DSP_L.DSP_1_OPMODE6.DSP_GND_L origin:101-dsp-pips 27_172
+DSP_L.DSP_1_OPMODE6.DSP_VCC_L origin:101-dsp-pips 27_180
 DSP_L.DSP48.DSP_0.A_INPUT[0] origin:100-dsp-mskpat 27_84
 DSP_L.DSP48.DSP_0.AREG_0 origin:100-dsp-mskpat 26_113 26_137 27_111
 DSP_L.DSP48.DSP_0.AREG_2 origin:100-dsp-mskpat 27_136

diff --git a/zynq7/segbits_dsp_r.db b/zynq7/segbits_dsp_r.db
index 956b1b3..cc796f2 100644
--- a/zynq7/segbits_dsp_r.db
+++ b/zynq7/segbits_dsp_r.db

@@ -1,3 +1,159 @@
+DSP_R.DSP_0_CEAD.DSP_GND_R 26_63
+DSP_R.DSP_0_CEAD.DSP_VCC_R 27_62
+DSP_R.DSP_0_CEALUMODE.DSP_GND_R 27_51
+DSP_R.DSP_0_CEALUMODE.DSP_VCC_R 26_50
+DSP_R.DSP_0_CED.DSP_GND_R 27_72
+DSP_R.DSP_0_CED.DSP_VCC_R 26_72
+DSP_R.DSP_0_CEINMODE.DSP_GND_R 26_69
+DSP_R.DSP_0_CEINMODE.DSP_VCC_R 26_67
+DSP_R.DSP_0_RSTD.DSP_GND_R 27_96
+DSP_R.DSP_0_RSTD.DSP_VCC_R 27_85
+DSP_R.DSP_0_ALUMODE2.DSP_GND_R 27_56
+DSP_R.DSP_0_ALUMODE2.DSP_VCC_R 26_55
+DSP_R.DSP_0_ALUMODE3.DSP_GND_R 27_60
+DSP_R.DSP_0_ALUMODE3.DSP_VCC_R 26_53
+DSP_R.DSP_0_CARRYINSEL2.DSP_GND_R 26_17
+DSP_R.DSP_0_CARRYINSEL2.DSP_VCC_R 27_18
+DSP_R.DSP_0_D0.DSP_GND_R 26_65
+DSP_R.DSP_0_D0.DSP_VCC_R 27_64
+DSP_R.DSP_0_D1.DSP_GND_R 27_68
+DSP_R.DSP_0_D1.DSP_VCC_R 27_74
+DSP_R.DSP_0_D2.DSP_GND_R 27_71
+DSP_R.DSP_0_D2.DSP_VCC_R 27_70
+DSP_R.DSP_0_D3.DSP_GND_R 26_75
+DSP_R.DSP_0_D3.DSP_VCC_R 26_73
+DSP_R.DSP_0_D4.DSP_GND_R 27_78
+DSP_R.DSP_0_D4.DSP_VCC_R 26_77
+DSP_R.DSP_0_D5.DSP_GND_R 26_82
+DSP_R.DSP_0_D5.DSP_VCC_R 26_81
+DSP_R.DSP_0_D6.DSP_GND_R 26_89
+DSP_R.DSP_0_D6.DSP_VCC_R 27_89
+DSP_R.DSP_0_D7.DSP_GND_R 27_91
+DSP_R.DSP_0_D7.DSP_VCC_R 26_91
+DSP_R.DSP_0_D8.DSP_GND_R 26_98
+DSP_R.DSP_0_D8.DSP_VCC_R 27_97
+DSP_R.DSP_0_D9.DSP_GND_R 26_101
+DSP_R.DSP_0_D9.DSP_VCC_R 26_99
+DSP_R.DSP_0_D10.DSP_GND_R 26_105
+DSP_R.DSP_0_D10.DSP_VCC_R 26_103
+DSP_R.DSP_0_D11.DSP_GND_R 27_107
+DSP_R.DSP_0_D11.DSP_VCC_R 27_105
+DSP_R.DSP_0_D12.DSP_GND_R 26_107
+DSP_R.DSP_0_D12.DSP_VCC_R 26_111
+DSP_R.DSP_0_D13.DSP_GND_R 27_113
+DSP_R.DSP_0_D13.DSP_VCC_R 26_114
+DSP_R.DSP_0_D14.DSP_GND_R 26_118
+DSP_R.DSP_0_D14.DSP_VCC_R 27_116
+DSP_R.DSP_0_D15.DSP_GND_R 27_122
+DSP_R.DSP_0_D15.DSP_VCC_R 27_120
+DSP_R.DSP_0_D16.DSP_GND_R 27_125
+DSP_R.DSP_0_D16.DSP_VCC_R 26_125
+DSP_R.DSP_0_D17.DSP_GND_R 27_128
+DSP_R.DSP_0_D17.DSP_VCC_R 27_126
+DSP_R.DSP_0_D18.DSP_GND_R 26_135
+DSP_R.DSP_0_D18.DSP_VCC_R 26_131
+DSP_R.DSP_0_D19.DSP_GND_R 27_140
+DSP_R.DSP_0_D19.DSP_VCC_R 26_140
+DSP_R.DSP_0_D20.DSP_GND_R 26_145
+DSP_R.DSP_0_D20.DSP_VCC_R 27_143
+DSP_R.DSP_0_D21.DSP_GND_R 27_147
+DSP_R.DSP_0_D21.DSP_VCC_R 26_147
+DSP_R.DSP_0_D22.DSP_GND_R 27_151
+DSP_R.DSP_0_D22.DSP_VCC_R 26_150
+DSP_R.DSP_0_D23.DSP_GND_R 27_154
+DSP_R.DSP_0_D23.DSP_VCC_R 27_153
+DSP_R.DSP_0_D24.DSP_GND_R 27_158
+DSP_R.DSP_0_D24.DSP_VCC_R 27_155
+DSP_R.DSP_0_INMODE0.DSP_GND_R 27_134
+DSP_R.DSP_0_INMODE0.DSP_VCC_R 27_130
+DSP_R.DSP_0_INMODE1.DSP_GND_R 26_133
+DSP_R.DSP_0_INMODE1.DSP_VCC_R 27_145
+DSP_R.DSP_0_INMODE2.DSP_GND_R 27_80
+DSP_R.DSP_0_INMODE2.DSP_VCC_R 26_71
+DSP_R.DSP_0_INMODE3.DSP_GND_R 27_79
+DSP_R.DSP_0_INMODE3.DSP_VCC_R 26_70
+DSP_R.DSP_0_INMODE4.DSP_GND_R 26_58
+DSP_R.DSP_0_INMODE4.DSP_VCC_R 26_46
+DSP_R.DSP_0_OPMODE6.DSP_GND_R 27_12
+DSP_R.DSP_0_OPMODE6.DSP_VCC_R 27_20
+DSP_R.DSP_1_CEAD.DSP_GND_R 26_223
+DSP_R.DSP_1_CEAD.DSP_VCC_R 27_222
+DSP_R.DSP_1_CEALUMODE.DSP_GND_R 27_211
+DSP_R.DSP_1_CEALUMODE.DSP_VCC_R 26_210
+DSP_R.DSP_1_CED.DSP_GND_R 27_232
+DSP_R.DSP_1_CED.DSP_VCC_R 26_232
+DSP_R.DSP_1_CEINMODE.DSP_GND_R 26_229
+DSP_R.DSP_1_CEINMODE.DSP_VCC_R 26_227
+DSP_R.DSP_1_RSTD.DSP_GND_R 27_256
+DSP_R.DSP_1_RSTD.DSP_VCC_R 27_245
+DSP_R.DSP_1_ALUMODE2.DSP_GND_R 27_216
+DSP_R.DSP_1_ALUMODE2.DSP_VCC_R 26_215
+DSP_R.DSP_1_ALUMODE3.DSP_GND_R 27_220
+DSP_R.DSP_1_ALUMODE3.DSP_VCC_R 26_213
+DSP_R.DSP_1_CARRYINSEL2.DSP_GND_R 26_177
+DSP_R.DSP_1_CARRYINSEL2.DSP_VCC_R 27_178
+DSP_R.DSP_1_D0.DSP_GND_R 26_225
+DSP_R.DSP_1_D0.DSP_VCC_R 27_224
+DSP_R.DSP_1_D1.DSP_GND_R 27_228
+DSP_R.DSP_1_D1.DSP_VCC_R 27_234
+DSP_R.DSP_1_D2.DSP_GND_R 27_231
+DSP_R.DSP_1_D2.DSP_VCC_R 27_230
+DSP_R.DSP_1_D3.DSP_GND_R 26_235
+DSP_R.DSP_1_D3.DSP_VCC_R 26_233
+DSP_R.DSP_1_D4.DSP_GND_R 27_238
+DSP_R.DSP_1_D4.DSP_VCC_R 26_237
+DSP_R.DSP_1_D5.DSP_GND_R 26_242
+DSP_R.DSP_1_D5.DSP_VCC_R 26_241
+DSP_R.DSP_1_D6.DSP_GND_R 26_249
+DSP_R.DSP_1_D6.DSP_VCC_R 27_249
+DSP_R.DSP_1_D7.DSP_GND_R 27_251
+DSP_R.DSP_1_D7.DSP_VCC_R 26_251
+DSP_R.DSP_1_D8.DSP_GND_R 26_258
+DSP_R.DSP_1_D8.DSP_VCC_R 27_257
+DSP_R.DSP_1_D9.DSP_GND_R 26_261
+DSP_R.DSP_1_D9.DSP_VCC_R 26_259
+DSP_R.DSP_1_D10.DSP_GND_R 26_265
+DSP_R.DSP_1_D10.DSP_VCC_R 26_263
+DSP_R.DSP_1_D11.DSP_GND_R 27_267
+DSP_R.DSP_1_D11.DSP_VCC_R 27_265
+DSP_R.DSP_1_D12.DSP_GND_R 26_267
+DSP_R.DSP_1_D12.DSP_VCC_R 26_271
+DSP_R.DSP_1_D13.DSP_GND_R 27_273
+DSP_R.DSP_1_D13.DSP_VCC_R 26_274
+DSP_R.DSP_1_D14.DSP_GND_R 26_278
+DSP_R.DSP_1_D14.DSP_VCC_R 27_276
+DSP_R.DSP_1_D15.DSP_GND_R 27_282
+DSP_R.DSP_1_D15.DSP_VCC_R 27_280
+DSP_R.DSP_1_D16.DSP_GND_R 27_285
+DSP_R.DSP_1_D16.DSP_VCC_R 26_285
+DSP_R.DSP_1_D17.DSP_GND_R 27_288
+DSP_R.DSP_1_D17.DSP_VCC_R 27_286
+DSP_R.DSP_1_D18.DSP_GND_R 26_295
+DSP_R.DSP_1_D18.DSP_VCC_R 26_291
+DSP_R.DSP_1_D19.DSP_GND_R 27_300
+DSP_R.DSP_1_D19.DSP_VCC_R 26_300
+DSP_R.DSP_1_D20.DSP_GND_R 26_305
+DSP_R.DSP_1_D20.DSP_VCC_R 27_303
+DSP_R.DSP_1_D21.DSP_GND_R 27_307
+DSP_R.DSP_1_D21.DSP_VCC_R 26_307
+DSP_R.DSP_1_D22.DSP_GND_R 27_311
+DSP_R.DSP_1_D22.DSP_VCC_R 26_310
+DSP_R.DSP_1_D23.DSP_GND_R 27_314
+DSP_R.DSP_1_D23.DSP_VCC_R 27_313
+DSP_R.DSP_1_D24.DSP_GND_R 27_318
+DSP_R.DSP_1_D24.DSP_VCC_R 27_315
+DSP_R.DSP_1_INMODE0.DSP_GND_R 27_294
+DSP_R.DSP_1_INMODE0.DSP_VCC_R 27_290
+DSP_R.DSP_1_INMODE1.DSP_GND_R 26_293
+DSP_R.DSP_1_INMODE1.DSP_VCC_R 27_305
+DSP_R.DSP_1_INMODE2.DSP_GND_R 27_240
+DSP_R.DSP_1_INMODE2.DSP_VCC_R 26_231
+DSP_R.DSP_1_INMODE3.DSP_GND_R 27_239
+DSP_R.DSP_1_INMODE3.DSP_VCC_R 26_230
+DSP_R.DSP_1_INMODE4.DSP_GND_R 26_218
+DSP_R.DSP_1_INMODE4.DSP_VCC_R 26_206
+DSP_R.DSP_1_OPMODE6.DSP_GND_R 27_172
+DSP_R.DSP_1_OPMODE6.DSP_VCC_R 27_180
 DSP_R.DSP48.DSP_0.A_INPUT[0] 27_84
 DSP_R.DSP48.DSP_0.AREG_0 26_113 26_137 27_111
 DSP_R.DSP48.DSP_0.AREG_2 27_136

diff --git a/zynq7/segbits_dsp_r.origin_info.db b/zynq7/segbits_dsp_r.origin_info.db
index e3ac198..f2d5d0f 100644
--- a/zynq7/segbits_dsp_r.origin_info.db
+++ b/zynq7/segbits_dsp_r.origin_info.db

@@ -1,3 +1,159 @@
+DSP_R.DSP_0_CEAD.DSP_GND_R origin:101-dsp-pips 26_63
+DSP_R.DSP_0_CEAD.DSP_VCC_R origin:101-dsp-pips 27_62
+DSP_R.DSP_0_CEALUMODE.DSP_GND_R origin:101-dsp-pips 27_51
+DSP_R.DSP_0_CEALUMODE.DSP_VCC_R origin:101-dsp-pips 26_50
+DSP_R.DSP_0_CED.DSP_GND_R origin:101-dsp-pips 27_72
+DSP_R.DSP_0_CED.DSP_VCC_R origin:101-dsp-pips 26_72
+DSP_R.DSP_0_CEINMODE.DSP_GND_R origin:101-dsp-pips 26_69
+DSP_R.DSP_0_CEINMODE.DSP_VCC_R origin:101-dsp-pips 26_67
+DSP_R.DSP_0_RSTD.DSP_GND_R origin:101-dsp-pips 27_96
+DSP_R.DSP_0_RSTD.DSP_VCC_R origin:101-dsp-pips 27_85
+DSP_R.DSP_0_ALUMODE2.DSP_GND_R origin:101-dsp-pips 27_56
+DSP_R.DSP_0_ALUMODE2.DSP_VCC_R origin:101-dsp-pips 26_55
+DSP_R.DSP_0_ALUMODE3.DSP_GND_R origin:101-dsp-pips 27_60
+DSP_R.DSP_0_ALUMODE3.DSP_VCC_R origin:101-dsp-pips 26_53
+DSP_R.DSP_0_CARRYINSEL2.DSP_GND_R origin:101-dsp-pips 26_17
+DSP_R.DSP_0_CARRYINSEL2.DSP_VCC_R origin:101-dsp-pips 27_18
+DSP_R.DSP_0_D0.DSP_GND_R origin:101-dsp-pips 26_65
+DSP_R.DSP_0_D0.DSP_VCC_R origin:101-dsp-pips 27_64
+DSP_R.DSP_0_D1.DSP_GND_R origin:101-dsp-pips 27_68
+DSP_R.DSP_0_D1.DSP_VCC_R origin:101-dsp-pips 27_74
+DSP_R.DSP_0_D2.DSP_GND_R origin:101-dsp-pips 27_71
+DSP_R.DSP_0_D2.DSP_VCC_R origin:101-dsp-pips 27_70
+DSP_R.DSP_0_D3.DSP_GND_R origin:101-dsp-pips 26_75
+DSP_R.DSP_0_D3.DSP_VCC_R origin:101-dsp-pips 26_73
+DSP_R.DSP_0_D4.DSP_GND_R origin:101-dsp-pips 27_78
+DSP_R.DSP_0_D4.DSP_VCC_R origin:101-dsp-pips 26_77
+DSP_R.DSP_0_D5.DSP_GND_R origin:101-dsp-pips 26_82
+DSP_R.DSP_0_D5.DSP_VCC_R origin:101-dsp-pips 26_81
+DSP_R.DSP_0_D6.DSP_GND_R origin:101-dsp-pips 26_89
+DSP_R.DSP_0_D6.DSP_VCC_R origin:101-dsp-pips 27_89
+DSP_R.DSP_0_D7.DSP_GND_R origin:101-dsp-pips 27_91
+DSP_R.DSP_0_D7.DSP_VCC_R origin:101-dsp-pips 26_91
+DSP_R.DSP_0_D8.DSP_GND_R origin:101-dsp-pips 26_98
+DSP_R.DSP_0_D8.DSP_VCC_R origin:101-dsp-pips 27_97
+DSP_R.DSP_0_D9.DSP_GND_R origin:101-dsp-pips 26_101
+DSP_R.DSP_0_D9.DSP_VCC_R origin:101-dsp-pips 26_99
+DSP_R.DSP_0_D10.DSP_GND_R origin:101-dsp-pips 26_105
+DSP_R.DSP_0_D10.DSP_VCC_R origin:101-dsp-pips 26_103
+DSP_R.DSP_0_D11.DSP_GND_R origin:101-dsp-pips 27_107
+DSP_R.DSP_0_D11.DSP_VCC_R origin:101-dsp-pips 27_105
+DSP_R.DSP_0_D12.DSP_GND_R origin:101-dsp-pips 26_107
+DSP_R.DSP_0_D12.DSP_VCC_R origin:101-dsp-pips 26_111
+DSP_R.DSP_0_D13.DSP_GND_R origin:101-dsp-pips 27_113
+DSP_R.DSP_0_D13.DSP_VCC_R origin:101-dsp-pips 26_114
+DSP_R.DSP_0_D14.DSP_GND_R origin:101-dsp-pips 26_118
+DSP_R.DSP_0_D14.DSP_VCC_R origin:101-dsp-pips 27_116
+DSP_R.DSP_0_D15.DSP_GND_R origin:101-dsp-pips 27_122
+DSP_R.DSP_0_D15.DSP_VCC_R origin:101-dsp-pips 27_120
+DSP_R.DSP_0_D16.DSP_GND_R origin:101-dsp-pips 27_125
+DSP_R.DSP_0_D16.DSP_VCC_R origin:101-dsp-pips 26_125
+DSP_R.DSP_0_D17.DSP_GND_R origin:101-dsp-pips 27_128
+DSP_R.DSP_0_D17.DSP_VCC_R origin:101-dsp-pips 27_126
+DSP_R.DSP_0_D18.DSP_GND_R origin:101-dsp-pips 26_135
+DSP_R.DSP_0_D18.DSP_VCC_R origin:101-dsp-pips 26_131
+DSP_R.DSP_0_D19.DSP_GND_R origin:101-dsp-pips 27_140
+DSP_R.DSP_0_D19.DSP_VCC_R origin:101-dsp-pips 26_140
+DSP_R.DSP_0_D20.DSP_GND_R origin:101-dsp-pips 26_145
+DSP_R.DSP_0_D20.DSP_VCC_R origin:101-dsp-pips 27_143
+DSP_R.DSP_0_D21.DSP_GND_R origin:101-dsp-pips 27_147
+DSP_R.DSP_0_D21.DSP_VCC_R origin:101-dsp-pips 26_147
+DSP_R.DSP_0_D22.DSP_GND_R origin:101-dsp-pips 27_151
+DSP_R.DSP_0_D22.DSP_VCC_R origin:101-dsp-pips 26_150
+DSP_R.DSP_0_D23.DSP_GND_R origin:101-dsp-pips 27_154
+DSP_R.DSP_0_D23.DSP_VCC_R origin:101-dsp-pips 27_153
+DSP_R.DSP_0_D24.DSP_GND_R origin:101-dsp-pips 27_158
+DSP_R.DSP_0_D24.DSP_VCC_R origin:101-dsp-pips 27_155
+DSP_R.DSP_0_INMODE0.DSP_GND_R origin:101-dsp-pips 27_134
+DSP_R.DSP_0_INMODE0.DSP_VCC_R origin:101-dsp-pips 27_130
+DSP_R.DSP_0_INMODE1.DSP_GND_R origin:101-dsp-pips 26_133
+DSP_R.DSP_0_INMODE1.DSP_VCC_R origin:101-dsp-pips 27_145
+DSP_R.DSP_0_INMODE2.DSP_GND_R origin:101-dsp-pips 27_80
+DSP_R.DSP_0_INMODE2.DSP_VCC_R origin:101-dsp-pips 26_71
+DSP_R.DSP_0_INMODE3.DSP_GND_R origin:101-dsp-pips 27_79
+DSP_R.DSP_0_INMODE3.DSP_VCC_R origin:101-dsp-pips 26_70
+DSP_R.DSP_0_INMODE4.DSP_GND_R origin:101-dsp-pips 26_58
+DSP_R.DSP_0_INMODE4.DSP_VCC_R origin:101-dsp-pips 26_46
+DSP_R.DSP_0_OPMODE6.DSP_GND_R origin:101-dsp-pips 27_12
+DSP_R.DSP_0_OPMODE6.DSP_VCC_R origin:101-dsp-pips 27_20
+DSP_R.DSP_1_CEAD.DSP_GND_R origin:101-dsp-pips 26_223
+DSP_R.DSP_1_CEAD.DSP_VCC_R origin:101-dsp-pips 27_222
+DSP_R.DSP_1_CEALUMODE.DSP_GND_R origin:101-dsp-pips 27_211
+DSP_R.DSP_1_CEALUMODE.DSP_VCC_R origin:101-dsp-pips 26_210
+DSP_R.DSP_1_CED.DSP_GND_R origin:101-dsp-pips 27_232
+DSP_R.DSP_1_CED.DSP_VCC_R origin:101-dsp-pips 26_232
+DSP_R.DSP_1_CEINMODE.DSP_GND_R origin:101-dsp-pips 26_229
+DSP_R.DSP_1_CEINMODE.DSP_VCC_R origin:101-dsp-pips 26_227
+DSP_R.DSP_1_RSTD.DSP_GND_R origin:101-dsp-pips 27_256
+DSP_R.DSP_1_RSTD.DSP_VCC_R origin:101-dsp-pips 27_245
+DSP_R.DSP_1_ALUMODE2.DSP_GND_R origin:101-dsp-pips 27_216
+DSP_R.DSP_1_ALUMODE2.DSP_VCC_R origin:101-dsp-pips 26_215
+DSP_R.DSP_1_ALUMODE3.DSP_GND_R origin:101-dsp-pips 27_220
+DSP_R.DSP_1_ALUMODE3.DSP_VCC_R origin:101-dsp-pips 26_213
+DSP_R.DSP_1_CARRYINSEL2.DSP_GND_R origin:101-dsp-pips 26_177
+DSP_R.DSP_1_CARRYINSEL2.DSP_VCC_R origin:101-dsp-pips 27_178
+DSP_R.DSP_1_D0.DSP_GND_R origin:101-dsp-pips 26_225
+DSP_R.DSP_1_D0.DSP_VCC_R origin:101-dsp-pips 27_224
+DSP_R.DSP_1_D1.DSP_GND_R origin:101-dsp-pips 27_228
+DSP_R.DSP_1_D1.DSP_VCC_R origin:101-dsp-pips 27_234
+DSP_R.DSP_1_D2.DSP_GND_R origin:101-dsp-pips 27_231
+DSP_R.DSP_1_D2.DSP_VCC_R origin:101-dsp-pips 27_230
+DSP_R.DSP_1_D3.DSP_GND_R origin:101-dsp-pips 26_235
+DSP_R.DSP_1_D3.DSP_VCC_R origin:101-dsp-pips 26_233
+DSP_R.DSP_1_D4.DSP_GND_R origin:101-dsp-pips 27_238
+DSP_R.DSP_1_D4.DSP_VCC_R origin:101-dsp-pips 26_237
+DSP_R.DSP_1_D5.DSP_GND_R origin:101-dsp-pips 26_242
+DSP_R.DSP_1_D5.DSP_VCC_R origin:101-dsp-pips 26_241
+DSP_R.DSP_1_D6.DSP_GND_R origin:101-dsp-pips 26_249
+DSP_R.DSP_1_D6.DSP_VCC_R origin:101-dsp-pips 27_249
+DSP_R.DSP_1_D7.DSP_GND_R origin:101-dsp-pips 27_251
+DSP_R.DSP_1_D7.DSP_VCC_R origin:101-dsp-pips 26_251
+DSP_R.DSP_1_D8.DSP_GND_R origin:101-dsp-pips 26_258
+DSP_R.DSP_1_D8.DSP_VCC_R origin:101-dsp-pips 27_257
+DSP_R.DSP_1_D9.DSP_GND_R origin:101-dsp-pips 26_261
+DSP_R.DSP_1_D9.DSP_VCC_R origin:101-dsp-pips 26_259
+DSP_R.DSP_1_D10.DSP_GND_R origin:101-dsp-pips 26_265
+DSP_R.DSP_1_D10.DSP_VCC_R origin:101-dsp-pips 26_263
+DSP_R.DSP_1_D11.DSP_GND_R origin:101-dsp-pips 27_267
+DSP_R.DSP_1_D11.DSP_VCC_R origin:101-dsp-pips 27_265
+DSP_R.DSP_1_D12.DSP_GND_R origin:101-dsp-pips 26_267
+DSP_R.DSP_1_D12.DSP_VCC_R origin:101-dsp-pips 26_271
+DSP_R.DSP_1_D13.DSP_GND_R origin:101-dsp-pips 27_273
+DSP_R.DSP_1_D13.DSP_VCC_R origin:101-dsp-pips 26_274
+DSP_R.DSP_1_D14.DSP_GND_R origin:101-dsp-pips 26_278
+DSP_R.DSP_1_D14.DSP_VCC_R origin:101-dsp-pips 27_276
+DSP_R.DSP_1_D15.DSP_GND_R origin:101-dsp-pips 27_282
+DSP_R.DSP_1_D15.DSP_VCC_R origin:101-dsp-pips 27_280
+DSP_R.DSP_1_D16.DSP_GND_R origin:101-dsp-pips 27_285
+DSP_R.DSP_1_D16.DSP_VCC_R origin:101-dsp-pips 26_285
+DSP_R.DSP_1_D17.DSP_GND_R origin:101-dsp-pips 27_288
+DSP_R.DSP_1_D17.DSP_VCC_R origin:101-dsp-pips 27_286
+DSP_R.DSP_1_D18.DSP_GND_R origin:101-dsp-pips 26_295
+DSP_R.DSP_1_D18.DSP_VCC_R origin:101-dsp-pips 26_291
+DSP_R.DSP_1_D19.DSP_GND_R origin:101-dsp-pips 27_300
+DSP_R.DSP_1_D19.DSP_VCC_R origin:101-dsp-pips 26_300
+DSP_R.DSP_1_D20.DSP_GND_R origin:101-dsp-pips 26_305
+DSP_R.DSP_1_D20.DSP_VCC_R origin:101-dsp-pips 27_303
+DSP_R.DSP_1_D21.DSP_GND_R origin:101-dsp-pips 27_307
+DSP_R.DSP_1_D21.DSP_VCC_R origin:101-dsp-pips 26_307
+DSP_R.DSP_1_D22.DSP_GND_R origin:101-dsp-pips 27_311
+DSP_R.DSP_1_D22.DSP_VCC_R origin:101-dsp-pips 26_310
+DSP_R.DSP_1_D23.DSP_GND_R origin:101-dsp-pips 27_314
+DSP_R.DSP_1_D23.DSP_VCC_R origin:101-dsp-pips 27_313
+DSP_R.DSP_1_D24.DSP_GND_R origin:101-dsp-pips 27_318
+DSP_R.DSP_1_D24.DSP_VCC_R origin:101-dsp-pips 27_315
+DSP_R.DSP_1_INMODE0.DSP_GND_R origin:101-dsp-pips 27_294
+DSP_R.DSP_1_INMODE0.DSP_VCC_R origin:101-dsp-pips 27_290
+DSP_R.DSP_1_INMODE1.DSP_GND_R origin:101-dsp-pips 26_293
+DSP_R.DSP_1_INMODE1.DSP_VCC_R origin:101-dsp-pips 27_305
+DSP_R.DSP_1_INMODE2.DSP_GND_R origin:101-dsp-pips 27_240
+DSP_R.DSP_1_INMODE2.DSP_VCC_R origin:101-dsp-pips 26_231
+DSP_R.DSP_1_INMODE3.DSP_GND_R origin:101-dsp-pips 27_239
+DSP_R.DSP_1_INMODE3.DSP_VCC_R origin:101-dsp-pips 26_230
+DSP_R.DSP_1_INMODE4.DSP_GND_R origin:101-dsp-pips 26_218
+DSP_R.DSP_1_INMODE4.DSP_VCC_R origin:101-dsp-pips 26_206
+DSP_R.DSP_1_OPMODE6.DSP_GND_R origin:101-dsp-pips 27_172
+DSP_R.DSP_1_OPMODE6.DSP_VCC_R origin:101-dsp-pips 27_180
 DSP_R.DSP48.DSP_0.A_INPUT[0] origin:100-dsp-mskpat 27_84
 DSP_R.DSP48.DSP_0.AREG_0 origin:100-dsp-mskpat 26_113 26_137 27_111
 DSP_R.DSP48.DSP_0.AREG_2 origin:100-dsp-mskpat 27_136

diff --git a/zynq7/segbits_hclk_ioi3.db b/zynq7/segbits_hclk_ioi3.db
index 443583e..a775abe 100644
--- a/zynq7/segbits_hclk_ioi3.db
+++ b/zynq7/segbits_hclk_ioi3.db

@@ -242,7 +242,10 @@
 HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK1 32_19 35_21
 HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK2 31_20 32_19
 HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK3 32_19 35_19
+HCLK_IOI3.LVDS_25_IN_USE 38_23 38_24 38_25 41_14 41_15 41_17 41_18 41_27 41_28 41_29
+HCLK_IOI3.ONLY_DIFF_IN_USE 38_27 39_23 40_25 40_27 40_29 40_30 41_16 41_31
 HCLK_IOI3.STEPDOWN 38_15 39_14 39_15 39_16
+HCLK_IOI3.TMDS_33_IN_USE 38_28 41_19
 HCLK_IOI3.VREF.V_600_MV 38_26 39_30
 HCLK_IOI3.VREF.V_675_MV 38_26 39_22
 HCLK_IOI3.VREF.V_750_MV 38_26 39_24

diff --git a/zynq7/segbits_hclk_ioi3.origin_info.db b/zynq7/segbits_hclk_ioi3.origin_info.db
index d2ea9e1..df5951b 100644
--- a/zynq7/segbits_hclk_ioi3.origin_info.db
+++ b/zynq7/segbits_hclk_ioi3.origin_info.db

@@ -242,7 +242,10 @@
 HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK1 origin:047-hclk-ioi-pips 32_19 35_21
 HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK2 origin:047-hclk-ioi-pips 31_20 32_19
 HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK3 origin:047-hclk-ioi-pips 32_19 35_19
+HCLK_IOI3.LVDS_25_IN_USE origin:030-iob 38_23 38_24 38_25 41_14 41_15 41_17 41_18 41_27 41_28 41_29
+HCLK_IOI3.ONLY_DIFF_IN_USE origin:030-iob 38_27 39_23 40_25 40_27 40_29 40_30 41_16 41_31
 HCLK_IOI3.STEPDOWN origin:030-iob 38_15 39_14 39_15 39_16
+HCLK_IOI3.TMDS_33_IN_USE origin:030-iob 38_28 41_19
 HCLK_IOI3.VREF.V_600_MV origin:030-iob 38_26 39_30
 HCLK_IOI3.VREF.V_675_MV origin:030-iob 38_26 39_22
 HCLK_IOI3.VREF.V_750_MV origin:030-iob 38_26 39_24

diff --git a/zynq7/segbits_int_l.origin_info.db b/zynq7/segbits_int_l.origin_info.db
index cc0d34f..91c522c 100644
--- a/zynq7/segbits_int_l.origin_info.db
+++ b/zynq7/segbits_int_l.origin_info.db

@@ -393,7 +393,7 @@
 INT_L.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08
 INT_L.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08
 INT_L.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
-INT_L.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
+INT_L.FAN_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_08 20_08 23_08 24_08 25_08
 INT_L.FAN_ALT4.LOGIC_OUTS_L4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
 INT_L.FAN_ALT4.LOGIC_OUTS_L8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
 INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
@@ -2273,7 +2273,7 @@
 INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
 INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
 INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
-INT_L.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
+INT_L.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
 INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17
 INT_L.NL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_17 14_17
 INT_L.NL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_17 13_17
@@ -2491,7 +2491,7 @@
 INT_L.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52
 INT_L.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55
 INT_L.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54
-INT_L.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55
+INT_L.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55
 INT_L.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52
 INT_L.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55
 INT_L.NR1BEG0.LOGIC_OUTS_L0 origin:050-pip-seed 11_07 14_07
@@ -3345,7 +3345,7 @@
 INT_L.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60
 INT_L.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63
 INT_L.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61
-INT_L.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60
+INT_L.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60
 INT_L.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60
 INT_L.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61
 INT_L.SW6BEG3.SE6END3 origin:050-pip-seed 04_61 06_60
@@ -3603,7 +3603,7 @@
 INT_L.WW4BEG2.LVB_L0 origin:056-pip-rem 04_34 05_32
 INT_L.WW4BEG2.LVB_L12 origin:056-pip-rem 05_32 07_33
 INT_L.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
-INT_L.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
+INT_L.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
 INT_L.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
 INT_L.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
 INT_L.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33

diff --git a/zynq7/segbits_int_r.origin_info.db b/zynq7/segbits_int_r.origin_info.db
index d5181e8..4283207 100644
--- a/zynq7/segbits_int_r.origin_info.db
+++ b/zynq7/segbits_int_r.origin_info.db

@@ -329,7 +329,7 @@
 INT_R.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08
 INT_R.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08
 INT_R.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
-INT_R.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
+INT_R.FAN_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_08 20_08 23_08 24_08 25_08
 INT_R.FAN_ALT4.LOGIC_OUTS4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
 INT_R.FAN_ALT4.LOGIC_OUTS8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
 INT_R.FAN_ALT4.LOGIC_OUTS18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
@@ -685,7 +685,7 @@
 INT_R.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27
 INT_R.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24
 INT_R.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27
-INT_R.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27
+INT_R.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27
 INT_R.EE4BEG2.LOGIC_OUTS2 origin:050-pip-seed 02_41 04_42
 INT_R.EE4BEG2.LOGIC_OUTS6 origin:050-pip-seed 02_41 07_41
 INT_R.EE4BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_40 07_41
@@ -725,7 +725,7 @@
 INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
 INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
 INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
-INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
+INT_R.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
 INT_R.EL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_20 14_21
 INT_R.EL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_21 14_21
 INT_R.EL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_21 13_21
@@ -2471,7 +2471,7 @@
 INT_R.NN6BEG2.NW2END2 origin:050-pip-seed 03_38 04_36
 INT_R.NN6BEG2.NW6END2 origin:050-pip-seed 04_36 07_39
 INT_R.NN6BEG2.SE2END2 origin:050-pip-seed 03_38 05_38
-INT_R.NN6BEG2.SE6END2 origin:056-pip-rem 05_38 07_39
+INT_R.NN6BEG2.SE6END2 origin:050-pip-seed 05_38 07_39
 INT_R.NN6BEG2.WW2END1 origin:050-pip-seed 02_39 04_36
 INT_R.NN6BEG2.WW4END2 origin:050-pip-seed 04_36 04_39
 INT_R.NN6BEG3.LOGIC_OUTS3 origin:050-pip-seed 03_54 06_54
@@ -3568,7 +3568,7 @@
 INT_R.WW4BEG0.LH12 origin:056-pip-rem 05_00 07_01
 INT_R.WW4BEG0.LV0 origin:056-pip-rem 04_02 05_00
 INT_R.WW4BEG0.NE2END0 origin:050-pip-seed 02_01 05_03
-INT_R.WW4BEG0.NE6END0 origin:056-pip-rem 05_00 05_03
+INT_R.WW4BEG0.NE6END0 origin:050-pip-seed 05_00 05_03
 INT_R.WW4BEG0.NN2END0 origin:050-pip-seed 03_00 05_03
 INT_R.WW4BEG0.NN6END0 origin:050-pip-seed 05_03 06_00
 INT_R.WW4BEG0.NW2END0 origin:050-pip-seed 02_01 03_01
@@ -3603,7 +3603,7 @@
 INT_R.WW4BEG2.LVB0 origin:056-pip-rem 04_34 05_32
 INT_R.WW4BEG2.LVB12 origin:056-pip-rem 05_32 07_33
 INT_R.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
-INT_R.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
+INT_R.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
 INT_R.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
 INT_R.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
 INT_R.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
@@ -3623,7 +3623,7 @@
 INT_R.WW4BEG3.LH0 origin:056-pip-rem 04_50 05_48
 INT_R.WW4BEG3.LV18 origin:056-pip-rem 05_48 07_49
 INT_R.WW4BEG3.NE2END3 origin:050-pip-seed 02_49 05_51
-INT_R.WW4BEG3.NE6END3 origin:056-pip-rem 05_48 05_51
+INT_R.WW4BEG3.NE6END3 origin:050-pip-seed 05_48 05_51
 INT_R.WW4BEG3.NN2END3 origin:050-pip-seed 03_48 05_51
 INT_R.WW4BEG3.NN6END3 origin:050-pip-seed 05_51 06_48
 INT_R.WW4BEG3.NW2END3 origin:050-pip-seed 02_49 03_49

diff --git a/zynq7/segbits_liob33.db b/zynq7/segbits_liob33.db
index d9ad4de..cc77648 100644
--- a/zynq7/segbits_liob33.db
+++ b/zynq7/segbits_liob33.db

@@ -1,14 +1,21 @@
+LIOB33.DIFF.ZIBUF_LOW_PWR 38_44 39_83
 LIOB33.IOB_Y0.IBUFDISABLE.I 38_82
 LIOB33.IOB_Y0.IN_TERM.NONE !38_120 !38_122 !39_121 !39_123
 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 38_120 38_122 39_121 39_123
 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 !39_121 39_123
 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 !38_122 !39_121 39_123
 LIOB33.IOB_Y0.INTERMDISABLE.I 39_89
+LIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED 38_64 38_74 38_76 38_98 38_100 38_102 38_118 39_65 39_75 39_97 !39_101 39_113 39_119 39_125
+LIOB33.IOB_Y0.LVDS_25.IN 38_86 39_87
+LIOB33.IOB_Y0.LVDS_25.OUT 38_64 38_74 38_76 38_98 38_102 39_65 39_75 !39_101
 LIOB33.IOB_Y0.LVTTL.DRIVE.I24 38_64 !38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127
 LIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93
 LIOB33.IOB_Y0.PULLTYPE.NONE !38_92 38_94 !39_93
 LIOB33.IOB_Y0.PULLTYPE.PULLDOWN !38_92 !38_94 !39_93
 LIOB33.IOB_Y0.PULLTYPE.PULLUP !38_92 38_94 39_93
+LIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED 38_64 !38_74 !38_76 !38_98 !38_100 !38_102 38_118 39_65 !39_75 !39_97 39_101 39_113 39_119 39_125
+LIOB33.IOB_Y0.TMDS_33.IN 38_86 !39_87
+LIOB33.IOB_Y0.TMDS_33.OUT 38_64 !38_74 !38_76 !38_98 !38_102 39_65 !39_75 39_101
 LIOB33.IOB_Y0.ZIBUF_LOW_PWR 38_84
 LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 !39_127
 LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
@@ -52,7 +59,7 @@
 LIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 38_00 !38_02 !38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN !38_40 38_42 39_41
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_63
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_33 !39_63
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW !38_16 38_18 !38_20 38_22 39_17 39_21
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN 38_32
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 !38_00 !38_02 38_08 !38_10 38_14 38_62 !39_01 !39_09 39_15 39_63
@@ -70,6 +77,7 @@
 LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 38_00 38_02 !38_08 !38_10 38_62 !39_01 39_09 !39_15 39_63
 LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 !38_00 38_02 38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
 LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 38_00 38_02 !38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
+LIOB33.IOB_Y1.SSTL15.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 39_33 !39_63
 LIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED 38_00 !38_02 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 LIOB33.IOB_Y1.SSTL135_SSTL15.IN 38_40 !38_42 !39_41
 LIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF 38_40 !38_42 39_41

diff --git a/zynq7/segbits_liob33.origin_info.db b/zynq7/segbits_liob33.origin_info.db
index 0490cb8..b3b6685 100644
--- a/zynq7/segbits_liob33.origin_info.db
+++ b/zynq7/segbits_liob33.origin_info.db

@@ -1,14 +1,21 @@
+LIOB33.DIFF.ZIBUF_LOW_PWR origin:030-iob 38_44 39_83
 LIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82
 LIOB33.IOB_Y0.IN_TERM.NONE origin:030-iob !38_120 !38_122 !39_121 !39_123
 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123
 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !39_121 38_120 38_122 39_123
 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_122 !39_121 38_120 39_123
 LIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89
+LIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED origin:030-iob !39_101 38_100 38_102 38_118 38_64 38_74 38_76 38_98 39_113 39_119 39_125 39_65 39_75 39_97
+LIOB33.IOB_Y0.LVDS_25.IN origin:030-iob 38_86 39_87
+LIOB33.IOB_Y0.LVDS_25.OUT origin:030-iob !39_101 38_102 38_64 38_74 38_76 38_98 39_65 39_75
 LIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65
 LIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94
 LIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94
 LIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93
 LIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93
+LIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED origin:030-iob !38_100 !38_102 !38_74 !38_76 !38_98 !39_75 !39_97 38_118 38_64 39_101 39_113 39_119 39_125 39_65
+LIOB33.IOB_Y0.TMDS_33.IN origin:030-iob !39_87 38_86
+LIOB33.IOB_Y0.TMDS_33.OUT origin:030-iob !38_102 !38_74 !38_76 !38_98 !39_75 38_64 39_101 39_65
 LIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84
 LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_113 39_125 39_65
 LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65
@@ -52,7 +59,7 @@
 LIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_09 38_00 38_14 38_62 39_01 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !38_40 38_42 39_41
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_33 !39_63 38_02 38_08 38_14 39_09
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW origin:030-iob !38_16 !38_20 38_18 38_22 39_17 39_21
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN origin:030-iob 38_32
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_00 !38_02 !38_10 !39_01 !39_09 38_08 38_14 38_62 39_15 39_63
@@ -70,6 +77,7 @@
 LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 !39_15 38_00 38_02 38_62 39_09 39_63
 LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 !39_15 38_02 38_08 38_62 39_01 39_63
 LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_08 !38_10 !39_09 !39_15 38_00 38_02 38_62 39_01 39_63
+LIOB33.IOB_Y1.SSTL15.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09 39_33
 LIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED origin:030-iob !38_02 38_00 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 LIOB33.IOB_Y1.SSTL135_SSTL15.IN origin:030-iob !38_42 !39_41 38_40
 LIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF origin:030-iob !38_42 38_40 39_41

diff --git a/zynq7/segbits_riob33.db b/zynq7/segbits_riob33.db
index b07295c..0e355eb 100644
--- a/zynq7/segbits_riob33.db
+++ b/zynq7/segbits_riob33.db

@@ -1,14 +1,21 @@
+RIOB33.DIFF.ZIBUF_LOW_PWR 38_44 39_83
 RIOB33.IOB_Y0.IBUFDISABLE.I 38_82
 RIOB33.IOB_Y0.IN_TERM.NONE !38_120 !38_122 !39_121 !39_123
 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 38_120 38_122 39_121 39_123
 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 !39_121 39_123
 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 !38_122 !39_121 39_123
 RIOB33.IOB_Y0.INTERMDISABLE.I 39_89
+RIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED 38_64 38_74 38_76 38_98 38_100 38_102 38_118 39_65 39_75 39_97 !39_101 39_113 39_119 39_125
+RIOB33.IOB_Y0.LVDS_25.IN 38_86 39_87
+RIOB33.IOB_Y0.LVDS_25.OUT 38_64 38_74 38_76 38_98 38_102 39_65 39_75 !39_101
 RIOB33.IOB_Y0.LVTTL.DRIVE.I24 38_64 !38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127
 RIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93
 RIOB33.IOB_Y0.PULLTYPE.NONE !38_92 38_94 !39_93
 RIOB33.IOB_Y0.PULLTYPE.PULLDOWN !38_92 !38_94 !39_93
 RIOB33.IOB_Y0.PULLTYPE.PULLUP !38_92 38_94 39_93
+RIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED 38_64 !38_74 !38_76 !38_98 !38_100 !38_102 38_118 39_65 !39_75 !39_97 39_101 39_113 39_119 39_125
+RIOB33.IOB_Y0.TMDS_33.IN 38_86 !39_87
+RIOB33.IOB_Y0.TMDS_33.OUT 38_64 !38_74 !38_76 !38_98 !38_102 39_65 !39_75 39_101
 RIOB33.IOB_Y0.ZIBUF_LOW_PWR 38_84
 RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 !39_127
 RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
@@ -52,7 +59,7 @@
 RIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 38_00 !38_02 !38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN !38_40 38_42 39_41
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_63
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_33 !39_63
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW !38_16 38_18 !38_20 38_22 39_17 39_21
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN 38_32
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 !38_00 !38_02 38_08 !38_10 38_14 38_62 !39_01 !39_09 39_15 39_63
@@ -70,6 +77,7 @@
 RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 38_00 38_02 !38_08 !38_10 38_62 !39_01 39_09 !39_15 39_63
 RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 !38_00 38_02 38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
 RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 38_00 38_02 !38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
+RIOB33.IOB_Y1.SSTL15.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 39_33 !39_63
 RIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED 38_00 !38_02 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 RIOB33.IOB_Y1.SSTL135_SSTL15.IN 38_40 !38_42 !39_41
 RIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF 38_40 !38_42 39_41

diff --git a/zynq7/segbits_riob33.origin_info.db b/zynq7/segbits_riob33.origin_info.db
index 8db23c8..ca4fd48 100644
--- a/zynq7/segbits_riob33.origin_info.db
+++ b/zynq7/segbits_riob33.origin_info.db

@@ -1,14 +1,21 @@
+RIOB33.DIFF.ZIBUF_LOW_PWR origin:030-iob 38_44 39_83
 RIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82
 RIOB33.IOB_Y0.IN_TERM.NONE origin:030-iob !38_120 !38_122 !39_121 !39_123
 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123
 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !39_121 38_120 38_122 39_123
 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_122 !39_121 38_120 39_123
 RIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89
+RIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED origin:030-iob !39_101 38_100 38_102 38_118 38_64 38_74 38_76 38_98 39_113 39_119 39_125 39_65 39_75 39_97
+RIOB33.IOB_Y0.LVDS_25.IN origin:030-iob 38_86 39_87
+RIOB33.IOB_Y0.LVDS_25.OUT origin:030-iob !39_101 38_102 38_64 38_74 38_76 38_98 39_65 39_75
 RIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65
 RIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94
 RIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94
 RIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93
 RIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93
+RIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED origin:030-iob !38_100 !38_102 !38_74 !38_76 !38_98 !39_75 !39_97 38_118 38_64 39_101 39_113 39_119 39_125 39_65
+RIOB33.IOB_Y0.TMDS_33.IN origin:030-iob !39_87 38_86
+RIOB33.IOB_Y0.TMDS_33.OUT origin:030-iob !38_102 !38_74 !38_76 !38_98 !39_75 38_64 39_101 39_65
 RIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84
 RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_113 39_125 39_65
 RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65
@@ -52,7 +59,7 @@
 RIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_09 38_00 38_14 38_62 39_01 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !38_40 38_42 39_41
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_33 !39_63 38_02 38_08 38_14 39_09
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW origin:030-iob !38_16 !38_20 38_18 38_22 39_17 39_21
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN origin:030-iob 38_32
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_00 !38_02 !38_10 !39_01 !39_09 38_08 38_14 38_62 39_15 39_63
@@ -70,6 +77,7 @@
 RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 !39_15 38_00 38_02 38_62 39_09 39_63
 RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 !39_15 38_02 38_08 38_62 39_01 39_63
 RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_08 !38_10 !39_09 !39_15 38_00 38_02 38_62 39_01 39_63
+RIOB33.IOB_Y1.SSTL15.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09 39_33
 RIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED origin:030-iob !38_02 38_00 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 RIOB33.IOB_Y1.SSTL135_SSTL15.IN origin:030-iob !38_42 !39_41 38_40
 RIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF origin:030-iob !38_42 38_40 39_41