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                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
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        "grid_y": 57,
        "sites": {
            "RAMB18_X1Y18": "FIFO18E1",
            "RAMB18_X1Y19": "RAMB18E1",
            "RAMB36_X1Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
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                "offset": 10,
                "words": 10
            },
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                "words": 10
            }
        },
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        "grid_y": 98,
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            "RAMB36_X1Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y50": {
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            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
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                "offset": 0,
                "words": 10
            },
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                "offset": 0,
                "words": 10
            }
        },
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        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y55": {
        "bits": {
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                "baseaddr": "0x00800180",
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                "words": 10
            },
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                "words": 10
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        },
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        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y60": {
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                "words": 10
            },
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                "words": 10
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        },
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        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y65": {
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            },
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        },
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        },
        "type": "BRAM_L"
    },
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                "words": 10
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        },
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        "type": "BRAM_L"
    },
    "BRAM_L_X18Y75": {
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                "words": 10
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        },
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        "type": "BRAM_L"
    },
    "BRAM_L_X18Y80": {
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        },
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        "type": "BRAM_L"
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        },
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        "type": "BRAM_L"
    },
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        },
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        "type": "BRAM_L"
    },
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        },
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        "type": "BRAM_L"
    },
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        "type": "BRAM_L"
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        "type": "BRAM_L"
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                "words": 10
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                "words": 10
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                "words": 10
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        "type": "BRAM_L"
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    "BRAM_L_X4Y65": {
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        "type": "BRAM_L"
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                "words": 10
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        "type": "BRAM_L"
    },
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                "offset": 51,
                "words": 10
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                "offset": 51,
                "words": 10
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        "sites": {
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            "RAMB36_X0Y15": "RAMBFIFO36E1"
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        "type": "BRAM_L"
    },
    "BRAM_L_X4Y80": {
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                "offset": 61,
                "words": 10
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                "offset": 61,
                "words": 10
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        },
        "grid_x": 40,
        "grid_y": 20,
        "sites": {
            "RAMB18_X0Y32": "FIFO18E1",
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        "type": "BRAM_L"
    },
    "BRAM_L_X4Y85": {
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                "offset": 71,
                "words": 10
            },
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                "offset": 71,
                "words": 10
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        "grid_x": 40,
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        "sites": {
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            "RAMB36_X0Y17": "RAMBFIFO36E1"
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        "type": "BRAM_L"
    },
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                "offset": 81,
                "words": 10
            },
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                "offset": 81,
                "words": 10
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        },
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        "sites": {
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            "RAMB36_X0Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y95": {
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                "offset": 91,
                "words": 10
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                "offset": 91,
                "words": 10
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        },
        "grid_x": 40,
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        "sites": {
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            "RAMB36_X0Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
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                "baseaddr": "0x00C00200",
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                "offset": 0,
                "words": 10
            },
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                "baseaddr": "0x00401880",
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                "offset": 0,
                "words": 10
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        },
        "grid_x": 108,
        "grid_y": 103,
        "sites": {
            "RAMB18_X2Y0": "FIFO18E1",
            "RAMB18_X2Y1": "RAMB18E1",
            "RAMB36_X2Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y10": {
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                "baseaddr": "0x00C00200",
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                "offset": 20,
                "words": 10
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                "baseaddr": "0x00401880",
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                "offset": 20,
                "words": 10
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        },
        "grid_x": 108,
        "grid_y": 93,
        "sites": {
            "RAMB18_X2Y4": "FIFO18E1",
            "RAMB18_X2Y5": "RAMB18E1",
            "RAMB36_X2Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y15": {
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                "baseaddr": "0x00C00200",
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                "offset": 30,
                "words": 10
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                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 30,
                "words": 10
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        },
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        "type": "CLK_FEED"
    },
    "CLK_FEED_X82Y97": {
        "bits": {},
        "grid_x": 82,
        "grid_y": 7,
        "sites": {},
        "type": "CLK_FEED"
    },
    "CLK_FEED_X82Y98": {
        "bits": {},
        "grid_x": 82,
        "grid_y": 6,
        "sites": {},
        "type": "CLK_FEED"
    },
    "CLK_FEED_X82Y99": {
        "bits": {},
        "grid_x": 82,
        "grid_y": 5,
        "sites": {},
        "type": "CLK_FEED"
    },
    "CLK_HROW_BOT_R_X82Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
                "frames": 30,
                "offset": 42,
                "words": 18
            }
        },
        "grid_x": 82,
        "grid_y": 78,
        "sites": {
            "BUFHCE_X0Y0": "BUFHCE",
            "BUFHCE_X0Y1": "BUFHCE",
            "BUFHCE_X0Y10": "BUFHCE",
            "BUFHCE_X0Y11": "BUFHCE",
            "BUFHCE_X0Y2": "BUFHCE",
            "BUFHCE_X0Y3": "BUFHCE",
            "BUFHCE_X0Y4": "BUFHCE",
            "BUFHCE_X0Y5": "BUFHCE",
            "BUFHCE_X0Y6": "BUFHCE",
            "BUFHCE_X0Y7": "BUFHCE",
            "BUFHCE_X0Y8": "BUFHCE",
            "BUFHCE_X0Y9": "BUFHCE",
            "BUFHCE_X1Y0": "BUFHCE",
            "BUFHCE_X1Y1": "BUFHCE",
            "BUFHCE_X1Y10": "BUFHCE",
            "BUFHCE_X1Y11": "BUFHCE",
            "BUFHCE_X1Y2": "BUFHCE",
            "BUFHCE_X1Y3": "BUFHCE",
            "BUFHCE_X1Y4": "BUFHCE",
            "BUFHCE_X1Y5": "BUFHCE",
            "BUFHCE_X1Y6": "BUFHCE",
            "BUFHCE_X1Y7": "BUFHCE",
            "BUFHCE_X1Y8": "BUFHCE",
            "BUFHCE_X1Y9": "BUFHCE"
        },
        "type": "CLK_HROW_BOT_R"
    },
    "CLK_HROW_TOP_R_X82Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001380",
                "frames": 30,
                "offset": 42,
                "words": 18
            }
        },
        "grid_x": 82,
        "grid_y": 26,
        "sites": {
            "BUFHCE_X0Y12": "BUFHCE",
            "BUFHCE_X0Y13": "BUFHCE",
            "BUFHCE_X0Y14": "BUFHCE",
            "BUFHCE_X0Y15": "BUFHCE",
            "BUFHCE_X0Y16": "BUFHCE",
            "BUFHCE_X0Y17": "BUFHCE",
            "BUFHCE_X0Y18": "BUFHCE",
            "BUFHCE_X0Y19": "BUFHCE",
            "BUFHCE_X0Y20": "BUFHCE",
            "BUFHCE_X0Y21": "BUFHCE",
            "BUFHCE_X0Y22": "BUFHCE",
            "BUFHCE_X0Y23": "BUFHCE",
            "BUFHCE_X1Y12": "BUFHCE",
            "BUFHCE_X1Y13": "BUFHCE",
            "BUFHCE_X1Y14": "BUFHCE",
            "BUFHCE_X1Y15": "BUFHCE",
            "BUFHCE_X1Y16": "BUFHCE",
            "BUFHCE_X1Y17": "BUFHCE",
            "BUFHCE_X1Y18": "BUFHCE",
            "BUFHCE_X1Y19": "BUFHCE",
            "BUFHCE_X1Y20": "BUFHCE",
            "BUFHCE_X1Y21": "BUFHCE",
            "BUFHCE_X1Y22": "BUFHCE",
            "BUFHCE_X1Y23": "BUFHCE"
        },
        "type": "CLK_HROW_TOP_R"
    },
    "CLK_MTBF2_X82Y47": {
        "bits": {},
        "grid_x": 82,
        "grid_y": 57,
        "sites": {},
        "type": "CLK_MTBF2"
    },
    "CLK_PMV2_SVT_X82Y34": {
        "bits": {},
        "grid_x": 82,
        "grid_y": 70,
        "sites": {},
        "type": "CLK_PMV2_SVT"
    },
    "CLK_PMV2_X82Y43": {
        "bits": {},
        "grid_x": 82,
        "grid_y": 61,
        "sites": {
            "PMV_X0Y2": "PMV2"
        },
        "type": "CLK_PMV2"
    },
    "CLK_PMVIOB_X82Y18": {
        "bits": {},
        "grid_x": 82,
        "grid_y": 86,
        "sites": {},
        "type": "CLK_PMVIOB"
    },
    "CLK_PMV_X82Y2": {
        "bits": {},
        "grid_x": 82,
        "grid_y": 102,
        "sites": {},
        "type": "CLK_PMV"
    },
    "CLK_TERM_X82Y0": {
        "bits": {},
        "grid_x": 82,
        "grid_y": 104,
        "sites": {},
        "type": "CLK_TERM"
    },
    "CLK_TERM_X82Y104": {
        "bits": {},
        "grid_x": 82,
        "grid_y": 0,
        "sites": {},
        "type": "CLK_TERM"
    },
    "CMT_FIFO_L_X120Y20": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 84,
        "sites": {
            "IN_FIFO_X0Y1": "IN_FIFO",
            "OUT_FIFO_X0Y1": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X120Y33": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 71,
        "sites": {
            "IN_FIFO_X0Y2": "IN_FIFO",
            "OUT_FIFO_X0Y2": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X120Y45": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 59,
        "sites": {
            "IN_FIFO_X0Y3": "IN_FIFO",
            "OUT_FIFO_X0Y3": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X120Y60": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 44,
        "sites": {
            "IN_FIFO_X0Y4": "IN_FIFO",
            "OUT_FIFO_X0Y4": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X120Y72": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 32,
        "sites": {
            "IN_FIFO_X0Y5": "IN_FIFO",
            "OUT_FIFO_X0Y5": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X120Y8": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 96,
        "sites": {
            "IN_FIFO_X0Y0": "IN_FIFO",
            "OUT_FIFO_X0Y0": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X120Y85": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 19,
        "sites": {
            "IN_FIFO_X0Y6": "IN_FIFO",
            "OUT_FIFO_X0Y6": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X120Y97": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 7,
        "sites": {
            "IN_FIFO_X0Y7": "IN_FIFO",
            "OUT_FIFO_X0Y7": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_PMV_L_X120Y1": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 103,
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X120Y103": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 1,
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X120Y51": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 53,
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X120Y53": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 51,
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_TOP_L_LOWER_B_X119Y61": {
        "bits": {},
        "grid_x": 119,
        "grid_y": 43,
        "sites": {
            "MMCME2_ADV_X0Y1": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_B_X119Y9": {
        "bits": {},
        "grid_x": 119,
        "grid_y": 95,
        "sites": {
            "MMCME2_ADV_X0Y0": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_T_X119Y18": {
        "bits": {},
        "grid_x": 119,
        "grid_y": 86,
        "sites": {
            "PHASER_IN_PHY_X0Y0": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y1": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y0": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y1": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_LOWER_T_X119Y70": {
        "bits": {},
        "grid_x": 119,
        "grid_y": 34,
        "sites": {
            "PHASER_IN_PHY_X0Y4": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y5": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y4": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y5": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_UPPER_B_X119Y31": {
        "bits": {},
        "grid_x": 119,
        "grid_y": 73,
        "sites": {
            "PHASER_IN_PHY_X0Y2": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y3": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y2": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y3": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y0": "PHASER_REF",
            "PHY_CONTROL_X0Y0": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_B_X119Y83": {
        "bits": {},
        "grid_x": 119,
        "grid_y": 21,
        "sites": {
            "PHASER_IN_PHY_X0Y6": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y7": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y6": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y7": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y1": "PHASER_REF",
            "PHY_CONTROL_X0Y1": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_T_X119Y44": {
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                "baseaddr": "0x00401B00",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "grid_x": 119,
        "grid_y": 60,
        "sites": {
            "PLLE2_ADV_X0Y0": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "CMT_TOP_L_UPPER_T_X119Y96": {
        "bits": {
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                "baseaddr": "0x00001B00",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "grid_x": 119,
        "grid_y": 8,
        "sites": {
            "PLLE2_ADV_X0Y1": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "DSP_L_X22Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 103,
        "sites": {
            "DSP48_X1Y0": "DSP48E1",
            "DSP48_X1Y1": "DSP48E1",
            "TIEOFF_X23Y0": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 93,
        "sites": {
            "DSP48_X1Y4": "DSP48E1",
            "DSP48_X1Y5": "DSP48E1",
            "TIEOFF_X23Y10": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 88,
        "sites": {
            "DSP48_X1Y6": "DSP48E1",
            "DSP48_X1Y7": "DSP48E1",
            "TIEOFF_X23Y15": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 83,
        "sites": {
            "DSP48_X1Y8": "DSP48E1",
            "DSP48_X1Y9": "DSP48E1",
            "TIEOFF_X23Y20": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 77,
        "sites": {
            "DSP48_X1Y10": "DSP48E1",
            "DSP48_X1Y11": "DSP48E1",
            "TIEOFF_X23Y25": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 72,
        "sites": {
            "DSP48_X1Y12": "DSP48E1",
            "DSP48_X1Y13": "DSP48E1",
            "TIEOFF_X23Y30": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 67,
        "sites": {
            "DSP48_X1Y14": "DSP48E1",
            "DSP48_X1Y15": "DSP48E1",
            "TIEOFF_X23Y35": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 62,
        "sites": {
            "DSP48_X1Y16": "DSP48E1",
            "DSP48_X1Y17": "DSP48E1",
            "TIEOFF_X23Y40": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 57,
        "sites": {
            "DSP48_X1Y18": "DSP48E1",
            "DSP48_X1Y19": "DSP48E1",
            "TIEOFF_X23Y45": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 98,
        "sites": {
            "DSP48_X1Y2": "DSP48E1",
            "DSP48_X1Y3": "DSP48E1",
            "TIEOFF_X23Y5": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 51,
        "sites": {
            "DSP48_X1Y20": "DSP48E1",
            "DSP48_X1Y21": "DSP48E1",
            "TIEOFF_X23Y50": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 46,
        "sites": {
            "DSP48_X1Y22": "DSP48E1",
            "DSP48_X1Y23": "DSP48E1",
            "TIEOFF_X23Y55": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 41,
        "sites": {
            "DSP48_X1Y24": "DSP48E1",
            "DSP48_X1Y25": "DSP48E1",
            "TIEOFF_X23Y60": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 36,
        "sites": {
            "DSP48_X1Y26": "DSP48E1",
            "DSP48_X1Y27": "DSP48E1",
            "TIEOFF_X23Y65": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 31,
        "sites": {
            "DSP48_X1Y28": "DSP48E1",
            "DSP48_X1Y29": "DSP48E1",
            "TIEOFF_X23Y70": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 25,
        "sites": {
            "DSP48_X1Y30": "DSP48E1",
            "DSP48_X1Y31": "DSP48E1",
            "TIEOFF_X23Y75": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 20,
        "sites": {
            "DSP48_X1Y32": "DSP48E1",
            "DSP48_X1Y33": "DSP48E1",
            "TIEOFF_X23Y80": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 15,
        "sites": {
            "DSP48_X1Y34": "DSP48E1",
            "DSP48_X1Y35": "DSP48E1",
            "TIEOFF_X23Y85": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 10,
        "sites": {
            "DSP48_X1Y36": "DSP48E1",
            "DSP48_X1Y37": "DSP48E1",
            "TIEOFF_X23Y90": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "grid_x": 99,
        "grid_y": 5,
        "sites": {
            "DSP48_X1Y38": "DSP48E1",
            "DSP48_X1Y39": "DSP48E1",
            "TIEOFF_X23Y95": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_R_X7Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
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