Updating all based on "Merge pull request #969 from antmicro/calculate-carry-timings".

See [Info File](Info.md) for details.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
diff --git a/Info.md b/Info.md
index 0002fff..b7d3a96 100644
--- a/Info.md
+++ b/Info.md
@@ -37,20 +37,20 @@
 
 # Details
 
-Last updated on Mon 22 Jul 2019 08:48:11 PM UTC (2019-07-22T20:48:11+00:00).
+Last updated on Thu 25 Jul 2019 01:20:13 AM UTC (2019-07-25T01:20:13+00:00).
 
-Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [ae52698](https://github.com/SymbiFlow/prjxray/commit/ae526981a278ffbc70b200cd6f26fc47ce171134).
+Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [e3b58d6](https://github.com/SymbiFlow/prjxray/commit/e3b58d631eefe1beaccad3c6bcd50c47f9118550).
 
 Latest commit was;
 ```
-commit ae526981a278ffbc70b200cd6f26fc47ce171134
-Merge: 1752fce b659a16
+commit e3b58d631eefe1beaccad3c6bcd50c47f9118550
+Merge: 19305ba 2b93883
 Author: litghost <537074+litghost@users.noreply.github.com>
-Date:   Mon Jul 22 10:04:36 2019 -0700
+Date:   Tue Jul 23 17:23:46 2019 -0700
 
-    Merge pull request #946 from antmicro/idelay-fuzzer
+    Merge pull request #969 from antmicro/calculate-carry-timings
     
-    Fuzzer for IDELAY
+    Calculate carry timings
 ```
 
 
@@ -59,7 +59,7 @@
 
 ### Settings
 
-Created using following [settings/artix7.sh (sha256: 26e1ff93657132928a3b583c95347267d7afeb18a7b7036f0d7a6ea3367ae803)](https://github.com/SymbiFlow/prjxray/blob/ae526981a278ffbc70b200cd6f26fc47ce171134/settings/artix7.sh)
+Created using following [settings/artix7.sh (sha256: 26e1ff93657132928a3b583c95347267d7afeb18a7b7036f0d7a6ea3367ae803)](https://github.com/SymbiFlow/prjxray/blob/e3b58d631eefe1beaccad3c6bcd50c47f9118550/settings/artix7.sh)
 ```shell
 export XRAY_DATABASE="artix7"
 export XRAY_PART="xc7a50tfgg484-1"
@@ -138,14 +138,14 @@
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/mask_dsp_r.origin_info.db`](./artix7/mask_dsp_r.origin_info.db)
  * [`be757fb834be7ff84a2873c0ac6621c909a5e85362b397667760edde86616f84  ./artix7/mask_hclk_cmt.db`](./artix7/mask_hclk_cmt.db)
  * [`be757fb834be7ff84a2873c0ac6621c909a5e85362b397667760edde86616f84  ./artix7/mask_hclk_cmt_l.db`](./artix7/mask_hclk_cmt_l.db)
- * [`32e608b61adb61c466eecd661af4cfb42f140e395b7d10dfe87466c55802365f  ./artix7/mask_hclk_ioi.db`](./artix7/mask_hclk_ioi.db)
+ * [`c70d69a8d3830458cf3e98faedb41c49ed87f27e7507a5aaa60bb7ec674044e7  ./artix7/mask_hclk_ioi.db`](./artix7/mask_hclk_ioi.db)
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./artix7/mask_hclk_l.db`](./artix7/mask_hclk_l.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/mask_hclk_l.origin_info.db`](./artix7/mask_hclk_l.origin_info.db)
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./artix7/mask_hclk_r.db`](./artix7/mask_hclk_r.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/mask_hclk_r.origin_info.db`](./artix7/mask_hclk_r.origin_info.db)
- * [`c768394699c35bdb6334164a6d2fa2a01ce8041ba77a10a63387ec496cbcc91c  ./artix7/mask_liob33.db`](./artix7/mask_liob33.db)
+ * [`b9b54e190c518860a1a4c2b072493866e4d5a1a3f707e5c3221f1671caf58990  ./artix7/mask_liob33.db`](./artix7/mask_liob33.db)
  * [`a9a4c51e55a48511d10fd9009a8e699136b87ad347b560e9618957e1ab924550  ./artix7/mask_lioi3.db`](./artix7/mask_lioi3.db)
- * [`c768394699c35bdb6334164a6d2fa2a01ce8041ba77a10a63387ec496cbcc91c  ./artix7/mask_riob33.db`](./artix7/mask_riob33.db)
+ * [`b9b54e190c518860a1a4c2b072493866e4d5a1a3f707e5c3221f1671caf58990  ./artix7/mask_riob33.db`](./artix7/mask_riob33.db)
  * [`a9a4c51e55a48511d10fd9009a8e699136b87ad347b560e9618957e1ab924550  ./artix7/mask_rioi3.db`](./artix7/mask_rioi3.db)
  * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf  ./artix7/ppips_bram_int_interface_l.db`](./artix7/ppips_bram_int_interface_l.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/ppips_bram_int_interface_l.origin_info.db`](./artix7/ppips_bram_int_interface_l.origin_info.db)
@@ -237,17 +237,17 @@
  * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9  ./artix7/segbits_hclk_r.db`](./artix7/segbits_hclk_r.db)
  * [`0e9b5da6def4776e2ca8dd59af8f4334bf5cfb88d99b323be25dd6ba2e3386f7  ./artix7/segbits_hclk_r.origin_info.db`](./artix7/segbits_hclk_r.origin_info.db)
  * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520  ./artix7/segbits_int_l.db`](./artix7/segbits_int_l.db)
- * [`8bcecca9f265dc6d40bc00caecfc14a2ea43217ec8ceb36ece26f1572119fae7  ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db)
+ * [`aad3e59e6d4b9cdec47ca977c0ec68c6a8d8182ec9688f6fe7599a23b2b549d1  ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db)
  * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556  ./artix7/segbits_int_r.db`](./artix7/segbits_int_r.db)
- * [`f71ff4a63cef9b6bc7d2d10bcb9f2ed70ebdd82558e720d13ffa90d02826887d  ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db)
- * [`216bf1f206b5e98e453f2d4b4d64de01788d050238f427c975d9b8559eae55b0  ./artix7/segbits_liob33.db`](./artix7/segbits_liob33.db)
- * [`90f81fd31255224e6dd4725832c690159a59fb168c83e59fdae10fd6d291ddcb  ./artix7/segbits_liob33.origin_info.db`](./artix7/segbits_liob33.origin_info.db)
- * [`feaa2d0489fb622fabac7e9bdb278ab68209f06547ae1ba879b6a2c75d05246d  ./artix7/segbits_lioi3.db`](./artix7/segbits_lioi3.db)
- * [`5d470052ad7267cea477cbb9b5569be40a02194fa98c6f46a7fb6365188e6966  ./artix7/segbits_lioi3.origin_info.db`](./artix7/segbits_lioi3.origin_info.db)
- * [`6382b44bc537fca6c822cab52f93a7486b402db753743168a462abbb067662e1  ./artix7/segbits_riob33.db`](./artix7/segbits_riob33.db)
- * [`f651df59cf27fa9883dd8487653b0f571cb199311106a78e23f7588cc94bf917  ./artix7/segbits_riob33.origin_info.db`](./artix7/segbits_riob33.origin_info.db)
- * [`88428934d07b722141efc7708a4771f7cfc168278ab2584a3ede97458075f31a  ./artix7/segbits_rioi3.db`](./artix7/segbits_rioi3.db)
- * [`496717bb379cfea1710b0234316952fc23986bb4e2304cf122fcd5f642e859c0  ./artix7/segbits_rioi3.origin_info.db`](./artix7/segbits_rioi3.origin_info.db)
+ * [`ce9c86d3f3ef2b75b630de576298802409caf07e75537afec3ed5945f26331fa  ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db)
+ * [`2e5d2753bcc1b54bf0e794d07ddc24b7bd824f4db7568ef9acc1a6883396c427  ./artix7/segbits_liob33.db`](./artix7/segbits_liob33.db)
+ * [`540c766fd833f087506d1138268ea44844560c2cb7a58ed9675e5b276639bcdb  ./artix7/segbits_liob33.origin_info.db`](./artix7/segbits_liob33.origin_info.db)
+ * [`af84687a55ce9bbb6baa0513e4261a8f3f1d67ae6536e0e28e6253c7e33bfdc1  ./artix7/segbits_lioi3.db`](./artix7/segbits_lioi3.db)
+ * [`d8130e8aa164989714d29fc4593e65daf2f2aabf48851b997e387f65ef7ef58d  ./artix7/segbits_lioi3.origin_info.db`](./artix7/segbits_lioi3.origin_info.db)
+ * [`c6e1b3b74335a12b984109ea5211e2a05041e2f960e77c719879272217f7978e  ./artix7/segbits_riob33.db`](./artix7/segbits_riob33.db)
+ * [`0373a4f2503ff8921b6e281d2cfb1b75cc8920e7daec0a8525b8a0561a60c0bc  ./artix7/segbits_riob33.origin_info.db`](./artix7/segbits_riob33.origin_info.db)
+ * [`c25e93dd8cfcbbf805d9d7c65b782f0db668848569e2fa56d9507166bfc1e1c5  ./artix7/segbits_rioi3.db`](./artix7/segbits_rioi3.db)
+ * [`e089bb9f6427d68a5fc07d21dcaed4021c3e862a7d483f17cd0ad7e83963633b  ./artix7/segbits_rioi3.origin_info.db`](./artix7/segbits_rioi3.origin_info.db)
  * [`2bc07bf06b86af1985fe1c76da7bd6d858768dd6d9e99344a3c52d490b797cdb  ./artix7/settings.sh`](./artix7/settings.sh)
  * [`ac6ba9ad814503f0fdc1dabb4292aaccd1a2195f5b348276cfee12aed3d96a70  ./artix7/site_type_BSCAN.json`](./artix7/site_type_BSCAN.json)
  * [`64724ba2f8af98df5e1d92e5c2da2e6d5a41eec6580f796405e271dadb4e63be  ./artix7/site_type_BUFGCTRL.json`](./artix7/site_type_BUFGCTRL.json)
@@ -451,8 +451,10 @@
  * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1  ./artix7/timings/RIOI3_SING.sdf`](./artix7/timings/RIOI3_SING.sdf)
  * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1  ./artix7/timings/RIOI3_TBYTESRC.sdf`](./artix7/timings/RIOI3_TBYTESRC.sdf)
  * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1  ./artix7/timings/RIOI3_TBYTETERM.sdf`](./artix7/timings/RIOI3_TBYTETERM.sdf)
- * [`9967c68e76e3db1c2780577c947cb094b23c8a59fdcd27bc499c5414922d7f4a  ./artix7/timings/slicel.sdf`](./artix7/timings/slicel.sdf)
- * [`4f83614fb956e124d53f85825c797fe43c4c68a1a1c3f59f2e35f0532fdb1b03  ./artix7/timings/slicem.sdf`](./artix7/timings/slicem.sdf)
+ * [`feb5cf787894379d158c5218ba44af20458c8008a1e75e30df00adde8aa97108  ./artix7/timings/carry4_slicel.sdf`](./artix7/timings/carry4_slicel.sdf)
+ * [`626d9e188a1c4874f7ac657e82c64df8d52f819624e8ee4f9ed9e557d85ad3f2  ./artix7/timings/carry4_slicem.sdf`](./artix7/timings/carry4_slicem.sdf)
+ * [`fd31d66077f869d01f13d9fabbd0dcd38b4aab0322179ecf9ac190a3b70c5456  ./artix7/timings/slicel.sdf`](./artix7/timings/slicel.sdf)
+ * [`3d2da5714d8c81165fa51403fb719b3ddd9e7ea7ab79280ae4e157d11a29172e  ./artix7/timings/slicem.sdf`](./artix7/timings/slicem.sdf)
  * [`4c20ee41ea32668919b7d91a7fabe38960e0ee4d5b3b83f1d18102d48895bf1c  ./artix7/xc7a35tcpg236-1.json`](./artix7/xc7a35tcpg236-1.json)
  * [`ef0724733da87455426a0f833642d96e9d206d047f4eb97072c3093f80c40d7d  ./artix7/xc7a35tcpg236-1.yaml`](./artix7/xc7a35tcpg236-1.yaml)
  * [`ac928ee3c50e91facacb4173fdf70384f56e046bb14581bf75f760e406fe4f78  ./artix7/xc7a35tcpg236-1_package_pins.csv`](./artix7/xc7a35tcpg236-1_package_pins.csv)
@@ -468,7 +470,7 @@
 
 ### Settings
 
-Created using following [settings/kintex7.sh (sha256: 794538b550d399255cbafeeb1b5ff183dc66ebc6cd8dc0f725e3f6a3977f757d)](https://github.com/SymbiFlow/prjxray/blob/ae526981a278ffbc70b200cd6f26fc47ce171134/settings/kintex7.sh)
+Created using following [settings/kintex7.sh (sha256: 794538b550d399255cbafeeb1b5ff183dc66ebc6cd8dc0f725e3f6a3977f757d)](https://github.com/SymbiFlow/prjxray/blob/e3b58d631eefe1beaccad3c6bcd50c47f9118550/settings/kintex7.sh)
 ```shell
 export XRAY_DATABASE="kintex7"
 export XRAY_PART="xc7k70tfbg676-2"
@@ -534,8 +536,10 @@
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./kintex7/mask_hclk_l.origin_info.db`](./kintex7/mask_hclk_l.origin_info.db)
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./kintex7/mask_hclk_r.db`](./kintex7/mask_hclk_r.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./kintex7/mask_hclk_r.origin_info.db`](./kintex7/mask_hclk_r.origin_info.db)
- * [`2cb1aa17c344c30290179b74dbc1b793e1289477cfa9ab69cadec07813367a76  ./kintex7/mask_liob33.db`](./kintex7/mask_liob33.db)
- * [`2cb1aa17c344c30290179b74dbc1b793e1289477cfa9ab69cadec07813367a76  ./kintex7/mask_riob33.db`](./kintex7/mask_riob33.db)
+ * [`9deba4943daabbbd0eaf7d0a2a6479ed1f738c3c8c3abed8b8217610d8f14551  ./kintex7/mask_liob33.db`](./kintex7/mask_liob33.db)
+ * [`c814235c80b5b9011825936b9c402e1ac23f4fe1a3bf6c13610123d0ca3d8c7d  ./kintex7/mask_lioi3.db`](./kintex7/mask_lioi3.db)
+ * [`9deba4943daabbbd0eaf7d0a2a6479ed1f738c3c8c3abed8b8217610d8f14551  ./kintex7/mask_riob33.db`](./kintex7/mask_riob33.db)
+ * [`c814235c80b5b9011825936b9c402e1ac23f4fe1a3bf6c13610123d0ca3d8c7d  ./kintex7/mask_rioi3.db`](./kintex7/mask_rioi3.db)
  * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf  ./kintex7/ppips_bram_int_interface_l.db`](./kintex7/ppips_bram_int_interface_l.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./kintex7/ppips_bram_int_interface_l.origin_info.db`](./kintex7/ppips_bram_int_interface_l.origin_info.db)
  * [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae  ./kintex7/ppips_bram_int_interface_r.db`](./kintex7/ppips_bram_int_interface_r.db)
@@ -622,13 +626,17 @@
  * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9  ./kintex7/segbits_hclk_r.db`](./kintex7/segbits_hclk_r.db)
  * [`0e9b5da6def4776e2ca8dd59af8f4334bf5cfb88d99b323be25dd6ba2e3386f7  ./kintex7/segbits_hclk_r.origin_info.db`](./kintex7/segbits_hclk_r.origin_info.db)
  * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520  ./kintex7/segbits_int_l.db`](./kintex7/segbits_int_l.db)
- * [`21e2b94e9e0e72aaf8189a36453658e36eef8e93c7160117bddc82efa3834169  ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db)
+ * [`6938468e5aaa1183bafcef2254d8242f121c81c64763a3a3c4c117429a55fa86  ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db)
  * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556  ./kintex7/segbits_int_r.db`](./kintex7/segbits_int_r.db)
- * [`257a57a73af177a47f67583d5eca8869ff06e70b4722c262ac468486ea491bc4  ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db)
- * [`7f7678239ee07a0a6e14f485125edcf3113283c32fdf30ef476380a6a03855ec  ./kintex7/segbits_liob33.db`](./kintex7/segbits_liob33.db)
- * [`f3d41676543f572882ae48a2fad5f63dfaa3b39be46c051ae167e571f787734f  ./kintex7/segbits_liob33.origin_info.db`](./kintex7/segbits_liob33.origin_info.db)
- * [`f9ee96e8ec2bc5ec3385894c5f27be07946f4f7e954eac1614cbadc0652948ed  ./kintex7/segbits_riob33.db`](./kintex7/segbits_riob33.db)
- * [`1945f23947816d901036e054895b21b7e911554976974601e3e75d112b100e41  ./kintex7/segbits_riob33.origin_info.db`](./kintex7/segbits_riob33.origin_info.db)
+ * [`7125d91bf6f43f8fd328e5258de65c71e0c7f66a722c49fc719ffdba29753e0e  ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db)
+ * [`72cbbfe2b7c1a1fe4720bba5a2fe5a0064ab6af050dbc950ecb54ed50838cc06  ./kintex7/segbits_liob33.db`](./kintex7/segbits_liob33.db)
+ * [`483556d5de32b467820288d66394e99dab104848e63e2fd7ae47fecc8f0e678a  ./kintex7/segbits_liob33.origin_info.db`](./kintex7/segbits_liob33.origin_info.db)
+ * [`af84687a55ce9bbb6baa0513e4261a8f3f1d67ae6536e0e28e6253c7e33bfdc1  ./kintex7/segbits_lioi3.db`](./kintex7/segbits_lioi3.db)
+ * [`d8130e8aa164989714d29fc4593e65daf2f2aabf48851b997e387f65ef7ef58d  ./kintex7/segbits_lioi3.origin_info.db`](./kintex7/segbits_lioi3.origin_info.db)
+ * [`85a5c109dedf931403947cbad0f4b6b45a7dc7b576899d2448ede03b0c3309f5  ./kintex7/segbits_riob33.db`](./kintex7/segbits_riob33.db)
+ * [`38002484f7d69bd49cbcdd8f55f6aa313ab2b4ab8814b63196fa08ff619f051e  ./kintex7/segbits_riob33.origin_info.db`](./kintex7/segbits_riob33.origin_info.db)
+ * [`c25e93dd8cfcbbf805d9d7c65b782f0db668848569e2fa56d9507166bfc1e1c5  ./kintex7/segbits_rioi3.db`](./kintex7/segbits_rioi3.db)
+ * [`e089bb9f6427d68a5fc07d21dcaed4021c3e862a7d483f17cd0ad7e83963633b  ./kintex7/segbits_rioi3.origin_info.db`](./kintex7/segbits_rioi3.origin_info.db)
  * [`c4fe49753a5ba6b4abc688337d5df26f2101ccfca3dd4270ca77e39e5221bfe9  ./kintex7/settings.sh`](./kintex7/settings.sh)
  * [`ac6ba9ad814503f0fdc1dabb4292aaccd1a2195f5b348276cfee12aed3d96a70  ./kintex7/site_type_BSCAN.json`](./kintex7/site_type_BSCAN.json)
  * [`64724ba2f8af98df5e1d92e5c2da2e6d5a41eec6580f796405e271dadb4e63be  ./kintex7/site_type_BUFGCTRL.json`](./kintex7/site_type_BUFGCTRL.json)
@@ -805,7 +813,7 @@
 
 ### Settings
 
-Created using following [settings/zynq7.sh (sha256: 61298e89dcc873eadba47f5c2f9f72a38fa022583b2c7ff89246b2e051585ad8)](https://github.com/SymbiFlow/prjxray/blob/ae526981a278ffbc70b200cd6f26fc47ce171134/settings/zynq7.sh)
+Created using following [settings/zynq7.sh (sha256: 61298e89dcc873eadba47f5c2f9f72a38fa022583b2c7ff89246b2e051585ad8)](https://github.com/SymbiFlow/prjxray/blob/e3b58d631eefe1beaccad3c6bcd50c47f9118550/settings/zynq7.sh)
 ```shell
 export XRAY_DATABASE="zynq7"
 export XRAY_PART="xc7z010clg400-1"
@@ -870,14 +878,14 @@
  * [`aab2e5f20890d805b6a78db6e6fd68d6024a140ac5e960feb4162d7e49582ca8  ./zynq7/mask_dsp_r.db`](./zynq7/mask_dsp_r.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./zynq7/mask_dsp_r.origin_info.db`](./zynq7/mask_dsp_r.origin_info.db)
  * [`be757fb834be7ff84a2873c0ac6621c909a5e85362b397667760edde86616f84  ./zynq7/mask_hclk_cmt_l.db`](./zynq7/mask_hclk_cmt_l.db)
- * [`8d17396fe0311b3e55043297221920fec78575629275b3d71aafdf04f8a36af3  ./zynq7/mask_hclk_ioi.db`](./zynq7/mask_hclk_ioi.db)
+ * [`26e8b98f5e5d3a27bc2cb2a6a87211dc580a54bf96f0f9ec536ea891ade0d6af  ./zynq7/mask_hclk_ioi.db`](./zynq7/mask_hclk_ioi.db)
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./zynq7/mask_hclk_l.db`](./zynq7/mask_hclk_l.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./zynq7/mask_hclk_l.origin_info.db`](./zynq7/mask_hclk_l.origin_info.db)
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./zynq7/mask_hclk_r.db`](./zynq7/mask_hclk_r.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./zynq7/mask_hclk_r.origin_info.db`](./zynq7/mask_hclk_r.origin_info.db)
- * [`296d3816fba68b43550119bff03319f35aeeeef5f1669ab071be87343381abd7  ./zynq7/mask_liob33.db`](./zynq7/mask_liob33.db)
+ * [`302b10ddaaf40f71a92a7b85bbcc7ddfcbcfb8e6b48909473e7e938e0bcae94e  ./zynq7/mask_liob33.db`](./zynq7/mask_liob33.db)
  * [`4fd0d3891456bb0dd2376908ec4d98bb4f3ff944d9a2bdf053cd9e4f82e56149  ./zynq7/mask_lioi3.db`](./zynq7/mask_lioi3.db)
- * [`156aecfb582b570c2a2cd17f43a8608f782f0996d83925151e34e01dbaa35188  ./zynq7/mask_riob33.db`](./zynq7/mask_riob33.db)
+ * [`bdb18c6d047dd475e4bf091793835505093fd7c8426e4e466e42bf99b8787237  ./zynq7/mask_riob33.db`](./zynq7/mask_riob33.db)
  * [`4fd0d3891456bb0dd2376908ec4d98bb4f3ff944d9a2bdf053cd9e4f82e56149  ./zynq7/mask_rioi3.db`](./zynq7/mask_rioi3.db)
  * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf  ./zynq7/ppips_bram_int_interface_l.db`](./zynq7/ppips_bram_int_interface_l.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./zynq7/ppips_bram_int_interface_l.origin_info.db`](./zynq7/ppips_bram_int_interface_l.origin_info.db)
@@ -962,17 +970,17 @@
  * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9  ./zynq7/segbits_hclk_r.db`](./zynq7/segbits_hclk_r.db)
  * [`0e9b5da6def4776e2ca8dd59af8f4334bf5cfb88d99b323be25dd6ba2e3386f7  ./zynq7/segbits_hclk_r.origin_info.db`](./zynq7/segbits_hclk_r.origin_info.db)
  * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520  ./zynq7/segbits_int_l.db`](./zynq7/segbits_int_l.db)
- * [`74f9491d521cfa92e0d56879899fd21d50095eca4a8b8211665d8113041a0c9a  ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db)
+ * [`4ff853a846a455ece3b0123dbd87c278158581ce98d219647a306e2be4977966  ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db)
  * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556  ./zynq7/segbits_int_r.db`](./zynq7/segbits_int_r.db)
- * [`6691414ce4c85c2c71e86fd7bf1aebbd91d45aeb0ff57699d83fad69244cae9e  ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db)
- * [`f85762b3e63eabe167710bb6d6273810f3a4e3e11d78513677b403db459b9e44  ./zynq7/segbits_liob33.db`](./zynq7/segbits_liob33.db)
- * [`b37fd628a5530efb3e2de4bab01b2c9db5917e8083ca9a361700714a45d2cf63  ./zynq7/segbits_liob33.origin_info.db`](./zynq7/segbits_liob33.origin_info.db)
- * [`feaa2d0489fb622fabac7e9bdb278ab68209f06547ae1ba879b6a2c75d05246d  ./zynq7/segbits_lioi3.db`](./zynq7/segbits_lioi3.db)
- * [`5d470052ad7267cea477cbb9b5569be40a02194fa98c6f46a7fb6365188e6966  ./zynq7/segbits_lioi3.origin_info.db`](./zynq7/segbits_lioi3.origin_info.db)
- * [`6382b44bc537fca6c822cab52f93a7486b402db753743168a462abbb067662e1  ./zynq7/segbits_riob33.db`](./zynq7/segbits_riob33.db)
- * [`f651df59cf27fa9883dd8487653b0f571cb199311106a78e23f7588cc94bf917  ./zynq7/segbits_riob33.origin_info.db`](./zynq7/segbits_riob33.origin_info.db)
- * [`88428934d07b722141efc7708a4771f7cfc168278ab2584a3ede97458075f31a  ./zynq7/segbits_rioi3.db`](./zynq7/segbits_rioi3.db)
- * [`496717bb379cfea1710b0234316952fc23986bb4e2304cf122fcd5f642e859c0  ./zynq7/segbits_rioi3.origin_info.db`](./zynq7/segbits_rioi3.origin_info.db)
+ * [`d960499e90401555f02eb6a33ee0d2883f1a3c60a4955d91f355d4369d107fc5  ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db)
+ * [`8bdba7407e84e20ff862f92c65fade1923ad6838eb2e81fc121abf9852b97158  ./zynq7/segbits_liob33.db`](./zynq7/segbits_liob33.db)
+ * [`afb1f77d6ae23a6c336eea071b4b237292d6f86114de6d30b30bb35a4c457e7e  ./zynq7/segbits_liob33.origin_info.db`](./zynq7/segbits_liob33.origin_info.db)
+ * [`af84687a55ce9bbb6baa0513e4261a8f3f1d67ae6536e0e28e6253c7e33bfdc1  ./zynq7/segbits_lioi3.db`](./zynq7/segbits_lioi3.db)
+ * [`d8130e8aa164989714d29fc4593e65daf2f2aabf48851b997e387f65ef7ef58d  ./zynq7/segbits_lioi3.origin_info.db`](./zynq7/segbits_lioi3.origin_info.db)
+ * [`c6e1b3b74335a12b984109ea5211e2a05041e2f960e77c719879272217f7978e  ./zynq7/segbits_riob33.db`](./zynq7/segbits_riob33.db)
+ * [`0373a4f2503ff8921b6e281d2cfb1b75cc8920e7daec0a8525b8a0561a60c0bc  ./zynq7/segbits_riob33.origin_info.db`](./zynq7/segbits_riob33.origin_info.db)
+ * [`c25e93dd8cfcbbf805d9d7c65b782f0db668848569e2fa56d9507166bfc1e1c5  ./zynq7/segbits_rioi3.db`](./zynq7/segbits_rioi3.db)
+ * [`e089bb9f6427d68a5fc07d21dcaed4021c3e862a7d483f17cd0ad7e83963633b  ./zynq7/segbits_rioi3.origin_info.db`](./zynq7/segbits_rioi3.origin_info.db)
  * [`ee26e7dbf78c2a37118c49ce7edb5fa44afd51850a24824ba8b68e34366f0787  ./zynq7/settings.sh`](./zynq7/settings.sh)
  * [`ac6ba9ad814503f0fdc1dabb4292aaccd1a2195f5b348276cfee12aed3d96a70  ./zynq7/site_type_BSCAN.json`](./zynq7/site_type_BSCAN.json)
  * [`64724ba2f8af98df5e1d92e5c2da2e6d5a41eec6580f796405e271dadb4e63be  ./zynq7/site_type_BUFGCTRL.json`](./zynq7/site_type_BUFGCTRL.json)
@@ -1134,8 +1142,10 @@
  * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1  ./zynq7/timings/RIOI3_SING.sdf`](./zynq7/timings/RIOI3_SING.sdf)
  * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1  ./zynq7/timings/RIOI3_TBYTESRC.sdf`](./zynq7/timings/RIOI3_TBYTESRC.sdf)
  * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1  ./zynq7/timings/RIOI3_TBYTETERM.sdf`](./zynq7/timings/RIOI3_TBYTETERM.sdf)
- * [`9967c68e76e3db1c2780577c947cb094b23c8a59fdcd27bc499c5414922d7f4a  ./zynq7/timings/slicel.sdf`](./zynq7/timings/slicel.sdf)
- * [`4f83614fb956e124d53f85825c797fe43c4c68a1a1c3f59f2e35f0532fdb1b03  ./zynq7/timings/slicem.sdf`](./zynq7/timings/slicem.sdf)
+ * [`feb5cf787894379d158c5218ba44af20458c8008a1e75e30df00adde8aa97108  ./zynq7/timings/carry4_slicel.sdf`](./zynq7/timings/carry4_slicel.sdf)
+ * [`626d9e188a1c4874f7ac657e82c64df8d52f819624e8ee4f9ed9e557d85ad3f2  ./zynq7/timings/carry4_slicem.sdf`](./zynq7/timings/carry4_slicem.sdf)
+ * [`fd31d66077f869d01f13d9fabbd0dcd38b4aab0322179ecf9ac190a3b70c5456  ./zynq7/timings/slicel.sdf`](./zynq7/timings/slicel.sdf)
+ * [`3d2da5714d8c81165fa51403fb719b3ddd9e7ea7ab79280ae4e157d11a29172e  ./zynq7/timings/slicem.sdf`](./zynq7/timings/slicem.sdf)
  * [`f3704845c7559e0289c9a1c6f42a7874be6d5d7aef3e0f285647b8ca62a154b3  ./zynq7/xc7z010clg400-1.json`](./zynq7/xc7z010clg400-1.json)
  * [`43a136f26603c51bd97e9489d223bbc80f278fcc234225ed9fde404402f22683  ./zynq7/xc7z010clg400-1.yaml`](./zynq7/xc7z010clg400-1.yaml)
  * [`d9914c14b3a8d59c76dd5992c4727e4002acd5e14b32c1afe49f7be8798e4db9  ./zynq7/xc7z010clg400-1_package_pins.csv`](./zynq7/xc7z010clg400-1_package_pins.csv)
diff --git a/artix7/mask_hclk_ioi.db b/artix7/mask_hclk_ioi.db
index 2e9cc6e..8c47745 100644
--- a/artix7/mask_hclk_ioi.db
+++ b/artix7/mask_hclk_ioi.db
@@ -94,12 +94,13 @@
 bit 28_74
 bit 28_79
 bit 28_84
-bit 28_85
 bit 28_88
 bit 28_92
 bit 28_99
 bit 28_104
+bit 28_107
 bit 28_108
+bit 28_113
 bit 28_118
 bit 28_126
 bit 28_142
@@ -148,16 +149,13 @@
 bit 29_49
 bit 29_65
 bit 29_73
-bit 29_78
+bit 29_82
 bit 29_83
-bit 29_84
 bit 29_87
 bit 29_92
 bit 29_99
 bit 29_103
-bit 29_106
 bit 29_107
-bit 29_112
 bit 29_117
 bit 29_125
 bit 29_155
@@ -202,11 +200,8 @@
 bit 29_285
 bit 29_315
 bit 29_317
-bit 30_78
-bit 30_84
+bit 30_82
 bit 30_92
-bit 30_106
-bit 30_112
 bit 30_174
 bit 30_175
 bit 30_176
@@ -234,8 +229,9 @@
 bit 30_270
 bit 30_272
 bit 31_79
-bit 31_85
 bit 31_99
+bit 31_107
+bit 31_113
 bit 31_174
 bit 31_175
 bit 31_176
diff --git a/artix7/mask_liob33.db b/artix7/mask_liob33.db
index be1b40b..2555a8e 100644
--- a/artix7/mask_liob33.db
+++ b/artix7/mask_liob33.db
@@ -1,4 +1,3 @@
-bit 00_10
 bit 00_11
 bit 00_14
 bit 00_17
@@ -7,7 +6,6 @@
 bit 00_35
 bit 00_38
 bit 00_39
-bit 00_74
 bit 00_75
 bit 00_78
 bit 00_81
@@ -32,20 +30,19 @@
 bit 01_101
 bit 01_102
 bit 01_104
-bit 02_07
-bit 02_39
+bit 02_103
 bit 03_116
-bit 04_04
-bit 04_36
 bit 04_48
 bit 04_51
+bit 05_102
 bit 05_119
 bit 06_01
 bit 06_03
 bit 06_17
+bit 06_27
+bit 06_29
 bit 06_33
 bit 06_35
-bit 06_39
 bit 06_43
 bit 06_49
 bit 06_51
@@ -60,7 +57,6 @@
 bit 06_91
 bit 06_97
 bit 06_99
-bit 06_103
 bit 06_107
 bit 06_113
 bit 06_115
@@ -79,7 +75,6 @@
 bit 07_28
 bit 07_30
 bit 07_32
-bit 07_34
 bit 07_36
 bit 07_38
 bit 07_40
@@ -103,6 +98,7 @@
 bit 07_88
 bit 07_92
 bit 07_94
+bit 07_96
 bit 07_98
 bit 07_100
 bit 07_102
@@ -110,6 +106,7 @@
 bit 07_108
 bit 07_110
 bit 07_112
+bit 07_116
 bit 07_118
 bit 07_120
 bit 07_124
@@ -120,11 +117,11 @@
 bit 08_03
 bit 08_04
 bit 08_05
+bit 08_06
 bit 08_07
 bit 08_08
 bit 08_09
 bit 08_10
-bit 08_11
 bit 08_14
 bit 08_15
 bit 08_16
@@ -135,12 +132,15 @@
 bit 08_23
 bit 08_24
 bit 08_25
+bit 08_26
+bit 08_27
 bit 08_30
 bit 08_31
 bit 08_32
 bit 08_33
 bit 08_34
 bit 08_35
+bit 08_36
 bit 08_38
 bit 08_39
 bit 08_40
@@ -164,6 +164,8 @@
 bit 08_65
 bit 08_66
 bit 08_67
+bit 08_68
+bit 08_69
 bit 08_71
 bit 08_72
 bit 08_73
@@ -206,7 +208,6 @@
 bit 08_125
 bit 08_126
 bit 08_127
-bit 09_00
 bit 09_02
 bit 09_03
 bit 09_04
@@ -216,9 +217,9 @@
 bit 09_13
 bit 09_14
 bit 09_16
+bit 09_18
 bit 09_19
 bit 09_20
-bit 09_21
 bit 09_27
 bit 09_28
 bit 09_29
@@ -231,7 +232,6 @@
 bit 09_45
 bit 09_48
 bit 09_49
-bit 09_50
 bit 09_51
 bit 09_52
 bit 09_58
@@ -247,15 +247,14 @@
 bit 09_82
 bit 09_83
 bit 09_84
-bit 09_90
 bit 09_91
 bit 09_92
 bit 09_93
 bit 09_94
-bit 09_96
 bit 09_98
 bit 09_99
 bit 09_100
+bit 09_106
 bit 09_107
 bit 09_108
 bit 09_109
@@ -270,6 +269,7 @@
 bit 10_00
 bit 10_01
 bit 10_02
+bit 10_04
 bit 10_05
 bit 10_07
 bit 10_09
@@ -280,10 +280,9 @@
 bit 10_17
 bit 10_18
 bit 10_20
-bit 10_21
 bit 10_23
-bit 10_25
 bit 10_26
+bit 10_29
 bit 10_31
 bit 10_32
 bit 10_33
@@ -296,7 +295,9 @@
 bit 10_48
 bit 10_49
 bit 10_50
+bit 10_53
 bit 10_55
+bit 10_56
 bit 10_57
 bit 10_58
 bit 10_63
@@ -314,6 +315,8 @@
 bit 10_82
 bit 10_87
 bit 10_88
+bit 10_89
+bit 10_90
 bit 10_93
 bit 10_95
 bit 10_96
@@ -324,6 +327,7 @@
 bit 10_104
 bit 10_105
 bit 10_106
+bit 10_109
 bit 10_111
 bit 10_112
 bit 10_113
@@ -333,10 +337,8 @@
 bit 10_120
 bit 10_121
 bit 10_122
-bit 10_125
 bit 10_127
 bit 11_01
-bit 11_02
 bit 11_03
 bit 11_05
 bit 11_07
@@ -346,14 +348,13 @@
 bit 11_15
 bit 11_17
 bit 11_19
-bit 11_20
+bit 11_22
 bit 11_23
 bit 11_25
 bit 11_27
 bit 11_29
 bit 11_30
 bit 11_31
-bit 11_32
 bit 11_33
 bit 11_35
 bit 11_39
@@ -365,17 +366,14 @@
 bit 11_48
 bit 11_49
 bit 11_51
-bit 11_52
 bit 11_55
 bit 11_57
 bit 11_59
-bit 11_60
 bit 11_61
 bit 11_63
 bit 11_64
 bit 11_65
 bit 11_67
-bit 11_68
 bit 11_69
 bit 11_71
 bit 11_73
@@ -392,6 +390,7 @@
 bit 11_95
 bit 11_96
 bit 11_97
+bit 11_98
 bit 11_99
 bit 11_100
 bit 11_101
@@ -424,12 +423,13 @@
 bit 12_15
 bit 12_16
 bit 12_17
+bit 12_18
 bit 12_19
-bit 12_21
 bit 12_23
 bit 12_25
 bit 12_26
 bit 12_27
+bit 12_28
 bit 12_29
 bit 12_31
 bit 12_33
@@ -446,7 +446,9 @@
 bit 12_49
 bit 12_50
 bit 12_51
+bit 12_53
 bit 12_55
+bit 12_56
 bit 12_57
 bit 12_58
 bit 12_59
@@ -461,6 +463,7 @@
 bit 12_73
 bit 12_74
 bit 12_75
+bit 12_76
 bit 12_77
 bit 12_79
 bit 12_81
@@ -483,6 +486,7 @@
 bit 12_107
 bit 12_109
 bit 12_111
+bit 12_112
 bit 12_113
 bit 12_114
 bit 12_115
@@ -509,6 +513,7 @@
 bit 13_18
 bit 13_19
 bit 13_20
+bit 13_22
 bit 13_23
 bit 13_25
 bit 13_28
@@ -518,11 +523,9 @@
 bit 13_33
 bit 13_34
 bit 13_35
-bit 13_36
-bit 13_38
+bit 13_37
 bit 13_39
 bit 13_41
-bit 13_42
 bit 13_44
 bit 13_46
 bit 13_47
@@ -539,14 +542,13 @@
 bit 13_65
 bit 13_66
 bit 13_67
-bit 13_68
+bit 13_69
 bit 13_71
 bit 13_72
 bit 13_73
 bit 13_74
 bit 13_75
 bit 13_76
-bit 13_77
 bit 13_79
 bit 13_80
 bit 13_81
@@ -566,13 +568,13 @@
 bit 13_99
 bit 13_100
 bit 13_101
-bit 13_102
 bit 13_103
 bit 13_104
 bit 13_105
 bit 13_106
 bit 13_107
 bit 13_108
+bit 13_109
 bit 13_110
 bit 13_111
 bit 13_112
@@ -602,7 +604,6 @@
 bit 14_50
 bit 14_52
 bit 14_58
-bit 14_60
 bit 14_64
 bit 14_66
 bit 14_68
@@ -630,7 +631,6 @@
 bit 15_05
 bit 15_07
 bit 15_09
-bit 15_11
 bit 15_13
 bit 15_15
 bit 15_17
@@ -682,6 +682,7 @@
 bit 15_111
 bit 15_113
 bit 15_115
+bit 15_117
 bit 15_119
 bit 15_121
 bit 15_123
@@ -794,7 +795,6 @@
 bit 17_111
 bit 17_112
 bit 17_118
-bit 17_119
 bit 17_120
 bit 17_121
 bit 17_122
@@ -812,7 +812,6 @@
 bit 18_25
 bit 18_30
 bit 18_31
-bit 18_33
 bit 18_38
 bit 18_39
 bit 18_41
@@ -857,6 +856,7 @@
 bit 18_125
 bit 18_127
 bit 19_03
+bit 19_06
 bit 19_07
 bit 19_08
 bit 19_14
@@ -877,6 +877,7 @@
 bit 19_46
 bit 19_47
 bit 19_49
+bit 19_54
 bit 19_55
 bit 19_56
 bit 19_57
@@ -938,6 +939,7 @@
 bit 20_107
 bit 20_108
 bit 20_110
+bit 20_112
 bit 20_118
 bit 20_121
 bit 20_122
@@ -986,9 +988,7 @@
 bit 22_24
 bit 22_30
 bit 22_31
-bit 22_32
 bit 22_38
-bit 22_39
 bit 22_42
 bit 22_43
 bit 22_44
@@ -996,6 +996,7 @@
 bit 22_47
 bit 22_48
 bit 22_54
+bit 22_55
 bit 22_56
 bit 22_57
 bit 22_58
@@ -1023,6 +1024,7 @@
 bit 22_111
 bit 22_112
 bit 22_118
+bit 22_120
 bit 22_121
 bit 22_122
 bit 22_124
@@ -1134,7 +1136,6 @@
 bit 24_111
 bit 24_112
 bit 24_118
-bit 24_119
 bit 24_120
 bit 24_121
 bit 24_122
@@ -1143,6 +1144,7 @@
 bit 25_02
 bit 25_06
 bit 25_07
+bit 25_08
 bit 25_09
 bit 25_15
 bit 25_16
@@ -1168,6 +1170,7 @@
 bit 25_51
 bit 25_52
 bit 25_54
+bit 25_55
 bit 25_56
 bit 25_57
 bit 25_58
diff --git a/artix7/mask_riob33.db b/artix7/mask_riob33.db
index be1b40b..2555a8e 100644
--- a/artix7/mask_riob33.db
+++ b/artix7/mask_riob33.db
@@ -1,4 +1,3 @@
-bit 00_10
 bit 00_11
 bit 00_14
 bit 00_17
@@ -7,7 +6,6 @@
 bit 00_35
 bit 00_38
 bit 00_39
-bit 00_74
 bit 00_75
 bit 00_78
 bit 00_81
@@ -32,20 +30,19 @@
 bit 01_101
 bit 01_102
 bit 01_104
-bit 02_07
-bit 02_39
+bit 02_103
 bit 03_116
-bit 04_04
-bit 04_36
 bit 04_48
 bit 04_51
+bit 05_102
 bit 05_119
 bit 06_01
 bit 06_03
 bit 06_17
+bit 06_27
+bit 06_29
 bit 06_33
 bit 06_35
-bit 06_39
 bit 06_43
 bit 06_49
 bit 06_51
@@ -60,7 +57,6 @@
 bit 06_91
 bit 06_97
 bit 06_99
-bit 06_103
 bit 06_107
 bit 06_113
 bit 06_115
@@ -79,7 +75,6 @@
 bit 07_28
 bit 07_30
 bit 07_32
-bit 07_34
 bit 07_36
 bit 07_38
 bit 07_40
@@ -103,6 +98,7 @@
 bit 07_88
 bit 07_92
 bit 07_94
+bit 07_96
 bit 07_98
 bit 07_100
 bit 07_102
@@ -110,6 +106,7 @@
 bit 07_108
 bit 07_110
 bit 07_112
+bit 07_116
 bit 07_118
 bit 07_120
 bit 07_124
@@ -120,11 +117,11 @@
 bit 08_03
 bit 08_04
 bit 08_05
+bit 08_06
 bit 08_07
 bit 08_08
 bit 08_09
 bit 08_10
-bit 08_11
 bit 08_14
 bit 08_15
 bit 08_16
@@ -135,12 +132,15 @@
 bit 08_23
 bit 08_24
 bit 08_25
+bit 08_26
+bit 08_27
 bit 08_30
 bit 08_31
 bit 08_32
 bit 08_33
 bit 08_34
 bit 08_35
+bit 08_36
 bit 08_38
 bit 08_39
 bit 08_40
@@ -164,6 +164,8 @@
 bit 08_65
 bit 08_66
 bit 08_67
+bit 08_68
+bit 08_69
 bit 08_71
 bit 08_72
 bit 08_73
@@ -206,7 +208,6 @@
 bit 08_125
 bit 08_126
 bit 08_127
-bit 09_00
 bit 09_02
 bit 09_03
 bit 09_04
@@ -216,9 +217,9 @@
 bit 09_13
 bit 09_14
 bit 09_16
+bit 09_18
 bit 09_19
 bit 09_20
-bit 09_21
 bit 09_27
 bit 09_28
 bit 09_29
@@ -231,7 +232,6 @@
 bit 09_45
 bit 09_48
 bit 09_49
-bit 09_50
 bit 09_51
 bit 09_52
 bit 09_58
@@ -247,15 +247,14 @@
 bit 09_82
 bit 09_83
 bit 09_84
-bit 09_90
 bit 09_91
 bit 09_92
 bit 09_93
 bit 09_94
-bit 09_96
 bit 09_98
 bit 09_99
 bit 09_100
+bit 09_106
 bit 09_107
 bit 09_108
 bit 09_109
@@ -270,6 +269,7 @@
 bit 10_00
 bit 10_01
 bit 10_02
+bit 10_04
 bit 10_05
 bit 10_07
 bit 10_09
@@ -280,10 +280,9 @@
 bit 10_17
 bit 10_18
 bit 10_20
-bit 10_21
 bit 10_23
-bit 10_25
 bit 10_26
+bit 10_29
 bit 10_31
 bit 10_32
 bit 10_33
@@ -296,7 +295,9 @@
 bit 10_48
 bit 10_49
 bit 10_50
+bit 10_53
 bit 10_55
+bit 10_56
 bit 10_57
 bit 10_58
 bit 10_63
@@ -314,6 +315,8 @@
 bit 10_82
 bit 10_87
 bit 10_88
+bit 10_89
+bit 10_90
 bit 10_93
 bit 10_95
 bit 10_96
@@ -324,6 +327,7 @@
 bit 10_104
 bit 10_105
 bit 10_106
+bit 10_109
 bit 10_111
 bit 10_112
 bit 10_113
@@ -333,10 +337,8 @@
 bit 10_120
 bit 10_121
 bit 10_122
-bit 10_125
 bit 10_127
 bit 11_01
-bit 11_02
 bit 11_03
 bit 11_05
 bit 11_07
@@ -346,14 +348,13 @@
 bit 11_15
 bit 11_17
 bit 11_19
-bit 11_20
+bit 11_22
 bit 11_23
 bit 11_25
 bit 11_27
 bit 11_29
 bit 11_30
 bit 11_31
-bit 11_32
 bit 11_33
 bit 11_35
 bit 11_39
@@ -365,17 +366,14 @@
 bit 11_48
 bit 11_49
 bit 11_51
-bit 11_52
 bit 11_55
 bit 11_57
 bit 11_59
-bit 11_60
 bit 11_61
 bit 11_63
 bit 11_64
 bit 11_65
 bit 11_67
-bit 11_68
 bit 11_69
 bit 11_71
 bit 11_73
@@ -392,6 +390,7 @@
 bit 11_95
 bit 11_96
 bit 11_97
+bit 11_98
 bit 11_99
 bit 11_100
 bit 11_101
@@ -424,12 +423,13 @@
 bit 12_15
 bit 12_16
 bit 12_17
+bit 12_18
 bit 12_19
-bit 12_21
 bit 12_23
 bit 12_25
 bit 12_26
 bit 12_27
+bit 12_28
 bit 12_29
 bit 12_31
 bit 12_33
@@ -446,7 +446,9 @@
 bit 12_49
 bit 12_50
 bit 12_51
+bit 12_53
 bit 12_55
+bit 12_56
 bit 12_57
 bit 12_58
 bit 12_59
@@ -461,6 +463,7 @@
 bit 12_73
 bit 12_74
 bit 12_75
+bit 12_76
 bit 12_77
 bit 12_79
 bit 12_81
@@ -483,6 +486,7 @@
 bit 12_107
 bit 12_109
 bit 12_111
+bit 12_112
 bit 12_113
 bit 12_114
 bit 12_115
@@ -509,6 +513,7 @@
 bit 13_18
 bit 13_19
 bit 13_20
+bit 13_22
 bit 13_23
 bit 13_25
 bit 13_28
@@ -518,11 +523,9 @@
 bit 13_33
 bit 13_34
 bit 13_35
-bit 13_36
-bit 13_38
+bit 13_37
 bit 13_39
 bit 13_41
-bit 13_42
 bit 13_44
 bit 13_46
 bit 13_47
@@ -539,14 +542,13 @@
 bit 13_65
 bit 13_66
 bit 13_67
-bit 13_68
+bit 13_69
 bit 13_71
 bit 13_72
 bit 13_73
 bit 13_74
 bit 13_75
 bit 13_76
-bit 13_77
 bit 13_79
 bit 13_80
 bit 13_81
@@ -566,13 +568,13 @@
 bit 13_99
 bit 13_100
 bit 13_101
-bit 13_102
 bit 13_103
 bit 13_104
 bit 13_105
 bit 13_106
 bit 13_107
 bit 13_108
+bit 13_109
 bit 13_110
 bit 13_111
 bit 13_112
@@ -602,7 +604,6 @@
 bit 14_50
 bit 14_52
 bit 14_58
-bit 14_60
 bit 14_64
 bit 14_66
 bit 14_68
@@ -630,7 +631,6 @@
 bit 15_05
 bit 15_07
 bit 15_09
-bit 15_11
 bit 15_13
 bit 15_15
 bit 15_17
@@ -682,6 +682,7 @@
 bit 15_111
 bit 15_113
 bit 15_115
+bit 15_117
 bit 15_119
 bit 15_121
 bit 15_123
@@ -794,7 +795,6 @@
 bit 17_111
 bit 17_112
 bit 17_118
-bit 17_119
 bit 17_120
 bit 17_121
 bit 17_122
@@ -812,7 +812,6 @@
 bit 18_25
 bit 18_30
 bit 18_31
-bit 18_33
 bit 18_38
 bit 18_39
 bit 18_41
@@ -857,6 +856,7 @@
 bit 18_125
 bit 18_127
 bit 19_03
+bit 19_06
 bit 19_07
 bit 19_08
 bit 19_14
@@ -877,6 +877,7 @@
 bit 19_46
 bit 19_47
 bit 19_49
+bit 19_54
 bit 19_55
 bit 19_56
 bit 19_57
@@ -938,6 +939,7 @@
 bit 20_107
 bit 20_108
 bit 20_110
+bit 20_112
 bit 20_118
 bit 20_121
 bit 20_122
@@ -986,9 +988,7 @@
 bit 22_24
 bit 22_30
 bit 22_31
-bit 22_32
 bit 22_38
-bit 22_39
 bit 22_42
 bit 22_43
 bit 22_44
@@ -996,6 +996,7 @@
 bit 22_47
 bit 22_48
 bit 22_54
+bit 22_55
 bit 22_56
 bit 22_57
 bit 22_58
@@ -1023,6 +1024,7 @@
 bit 22_111
 bit 22_112
 bit 22_118
+bit 22_120
 bit 22_121
 bit 22_122
 bit 22_124
@@ -1134,7 +1136,6 @@
 bit 24_111
 bit 24_112
 bit 24_118
-bit 24_119
 bit 24_120
 bit 24_121
 bit 24_122
@@ -1143,6 +1144,7 @@
 bit 25_02
 bit 25_06
 bit 25_07
+bit 25_08
 bit 25_09
 bit 25_15
 bit 25_16
@@ -1168,6 +1170,7 @@
 bit 25_51
 bit 25_52
 bit 25_54
+bit 25_55
 bit 25_56
 bit 25_57
 bit 25_58
diff --git a/artix7/segbits_int_l.origin_info.db b/artix7/segbits_int_l.origin_info.db
index 075ad15..7ff3029 100644
--- a/artix7/segbits_int_l.origin_info.db
+++ b/artix7/segbits_int_l.origin_info.db
@@ -172,7 +172,7 @@
 INT_L.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63
 INT_L.BYP_ALT7.ER1END3 origin:050-pip-seed !22_63 16_63 23_63 24_63 25_63
 INT_L.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63
-INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63
+INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:056-pip-rem !22_63 21_63 23_63 24_63 25_63
 INT_L.BYP_ALT7.GFAN1 origin:054-pip-fan-alt !22_63 !23_63 !25_63 20_63 24_63
 INT_L.BYP_ALT7.LOGIC_OUTS_L15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63
 INT_L.BYP_ALT7.LOGIC_OUTS_L21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63
@@ -678,7 +678,7 @@
 INT_L.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
 INT_L.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
 INT_L.FAN_ALT4.GFAN0 origin:054-pip-fan-alt !22_08 !23_08 !24_08 21_08 25_08
-INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
+INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:056-pip-rem !22_08 !23_08 !25_08 21_08 24_08
 INT_L.FAN_ALT4.LOGIC_OUTS_L4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
 INT_L.FAN_ALT4.LOGIC_OUTS_L8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
 INT_L.FAN_ALT4.NE2END0 origin:050-pip-seed !22_08 !23_08 !25_08 17_08 24_08
@@ -2411,7 +2411,7 @@
 INT_L.NN6BEG2.NW2END2 origin:050-pip-seed 03_38 04_36
 INT_L.NN6BEG2.NW6END2 origin:050-pip-seed 04_36 07_39
 INT_L.NN6BEG2.SE2END2 origin:050-pip-seed 03_38 05_38
-INT_L.NN6BEG2.SE6END2 origin:050-pip-seed 05_38 07_39
+INT_L.NN6BEG2.SE6END2 origin:056-pip-rem 05_38 07_39
 INT_L.NN6BEG2.WW2END1 origin:050-pip-seed 02_39 04_36
 INT_L.NN6BEG2.WW4END2 origin:050-pip-seed 04_36 04_39
 INT_L.NN6BEG3.EE2END3 origin:050-pip-seed 02_55 05_54
@@ -3275,7 +3275,7 @@
 INT_L.SW6BEG1.WW2END1 origin:050-pip-seed 03_28 05_31
 INT_L.SW6BEG1.WW4END2 origin:050-pip-seed 05_28 05_31
 INT_L.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
-INT_L.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
+INT_L.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
 INT_L.SW6BEG2.LOGIC_OUTS_L10 origin:050-pip-seed 03_44 04_46
 INT_L.SW6BEG2.LOGIC_OUTS_L14 origin:050-pip-seed 03_44 07_45
 INT_L.SW6BEG2.LOGIC_OUTS_L16 origin:050-pip-seed 04_46 06_44
diff --git a/artix7/segbits_int_r.origin_info.db b/artix7/segbits_int_r.origin_info.db
index ca04ba8..7b48ef6 100644
--- a/artix7/segbits_int_r.origin_info.db
+++ b/artix7/segbits_int_r.origin_info.db
@@ -172,7 +172,7 @@
 INT_R.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63
 INT_R.BYP_ALT7.ER1END3 origin:050-pip-seed !22_63 16_63 23_63 24_63 25_63
 INT_R.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63
-INT_R.BYP_ALT7.FAN_BOUNCE_S3_6 origin:056-pip-rem !22_63 21_63 23_63 24_63 25_63
+INT_R.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63
 INT_R.BYP_ALT7.GFAN1 origin:054-pip-fan-alt !22_63 !23_63 !25_63 20_63 24_63
 INT_R.BYP_ALT7.LOGIC_OUTS15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63
 INT_R.BYP_ALT7.LOGIC_OUTS21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63
@@ -3275,7 +3275,7 @@
 INT_R.SW6BEG1.WW2END1 origin:050-pip-seed 03_28 05_31
 INT_R.SW6BEG1.WW4END2 origin:050-pip-seed 05_28 05_31
 INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
-INT_R.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
+INT_R.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
 INT_R.SW6BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_44 04_46
 INT_R.SW6BEG2.LOGIC_OUTS14 origin:050-pip-seed 03_44 07_45
 INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44
diff --git a/artix7/segbits_liob33.db b/artix7/segbits_liob33.db
index 207cb3a..8a3c45c 100644
--- a/artix7/segbits_liob33.db
+++ b/artix7/segbits_liob33.db
@@ -27,6 +27,8 @@
 LIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE !31_92
 LIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE 31_92
 LIOB33.IOB_Y0.OFF.ZINIT_Q 33_97
+LIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.DDR 33_91
+LIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.SDR 33_93
 LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.BUF 32_66
 LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.DDR 32_70
 LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.SDR 33_69
@@ -96,6 +98,8 @@
 LIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE !30_35
 LIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE 30_35
 LIOB33.IOB_Y1.OFF.ZINIT_Q 32_30
+LIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.DDR 32_36
+LIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.SDR 32_34
 LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.BUF 33_61
 LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.DDR 33_57
 LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.SDR 32_58
diff --git a/artix7/segbits_liob33.origin_info.db b/artix7/segbits_liob33.origin_info.db
index 703b24f..c8664fa 100644
--- a/artix7/segbits_liob33.origin_info.db
+++ b/artix7/segbits_liob33.origin_info.db
@@ -49,6 +49,8 @@
 LIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE origin:036-iob-ologic !31_92
 LIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE origin:036-iob-ologic 31_92
 LIOB33.IOB_Y0.OFF.ZINIT_Q origin:036-iob-ologic 33_97
+LIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.DDR origin:036-iob-ologic 33_91
+LIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.SDR origin:036-iob-ologic 33_93
 LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.BUF origin:036-iob-ologic 32_66
 LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.DDR origin:036-iob-ologic 32_70
 LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.SDR origin:036-iob-ologic 33_69
@@ -118,6 +120,8 @@
 LIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE origin:036-iob-ologic !30_35
 LIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE origin:036-iob-ologic 30_35
 LIOB33.IOB_Y1.OFF.ZINIT_Q origin:036-iob-ologic 32_30
+LIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.DDR origin:036-iob-ologic 32_36
+LIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.SDR origin:036-iob-ologic 32_34
 LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.BUF origin:036-iob-ologic 33_61
 LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.DDR origin:036-iob-ologic 33_57
 LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.SDR origin:036-iob-ologic 32_58
diff --git a/artix7/segbits_lioi3.db b/artix7/segbits_lioi3.db
index fa685e6..ec2ad75 100644
--- a/artix7/segbits_lioi3.db
+++ b/artix7/segbits_lioi3.db
@@ -1,26 +1,40 @@
 LIOI3.IDELAY_Y0.CINVCTRL_SEL 35_89
-LIOI3.IDELAY_Y0.DELAY_SRC_DATAIN 35_69
-LIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN 34_72
+LIOI3.IDELAY_Y0.DELAY_SRC_DATAIN !34_72 35_69
+LIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN 34_72 !35_69
 LIOI3.IDELAY_Y0.HIGH_PERFORMANCE_MODE 32_109
-LIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD 35_113
-LIOI3.IDELAY_Y0.IDELAY_VALUE[0] 34_122
-LIOI3.IDELAY_Y0.IDELAY_VALUE[1] 34_116
-LIOI3.IDELAY_Y0.IDELAY_VALUE[2] 34_110
-LIOI3.IDELAY_Y0.IDELAY_VALUE[3] 34_102
-LIOI3.IDELAY_Y0.IDELAY_VALUE[4] 34_96
+LIOI3.IDELAY_Y0.IDELAY_TYPE_FIXED !35_113 !35_119
+LIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD 35_113 35_119
+LIOI3.IDELAY_Y0.IDELAY_TYPE_VARIABLE !35_113 35_119
+LIOI3.IDELAY_Y0.IDELAY_VALUE[0] !34_120 34_122
+LIOI3.IDELAY_Y0.IDELAY_VALUE[1] !34_114 34_116
+LIOI3.IDELAY_Y0.IDELAY_VALUE[2] !34_108 34_110
+LIOI3.IDELAY_Y0.IDELAY_VALUE[3] !34_100 34_102
+LIOI3.IDELAY_Y0.IDELAY_VALUE[4] !34_94 34_96
 LIOI3.IDELAY_Y0.IS_DATAIN_INVERTED 35_81
 LIOI3.IDELAY_Y0.IS_IDATAIN_INVERTED 33_72
 LIOI3.IDELAY_Y0.PIPE_SEL 34_106
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[0] 34_120 !34_122
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[1] 34_114 !34_116
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[2] 34_108 !34_110
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[3] 34_100 !34_102
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[4] 34_94 !34_96
 LIOI3.IDELAY_Y1.CINVCTRL_SEL 34_38
-LIOI3.IDELAY_Y1.DELAY_SRC_DATAIN 34_58
-LIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN 35_55
+LIOI3.IDELAY_Y1.DELAY_SRC_DATAIN 34_58 !35_55
+LIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN !34_58 35_55
 LIOI3.IDELAY_Y1.HIGH_PERFORMANCE_MODE 33_18
-LIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD 34_14
-LIOI3.IDELAY_Y1.IDELAY_VALUE[0] 35_05
-LIOI3.IDELAY_Y1.IDELAY_VALUE[1] 35_11
-LIOI3.IDELAY_Y1.IDELAY_VALUE[2] 35_17
-LIOI3.IDELAY_Y1.IDELAY_VALUE[3] 35_25
-LIOI3.IDELAY_Y1.IDELAY_VALUE[4] 35_31
+LIOI3.IDELAY_Y1.IDELAY_TYPE_FIXED !34_08 !34_14
+LIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD 34_08 34_14
+LIOI3.IDELAY_Y1.IDELAY_TYPE_VARIABLE 34_08 !34_14
+LIOI3.IDELAY_Y1.IDELAY_VALUE[0] 35_05 !35_07
+LIOI3.IDELAY_Y1.IDELAY_VALUE[1] 35_11 !35_13
+LIOI3.IDELAY_Y1.IDELAY_VALUE[2] 35_17 !35_19
+LIOI3.IDELAY_Y1.IDELAY_VALUE[3] 35_25 !35_27
+LIOI3.IDELAY_Y1.IDELAY_VALUE[4] 35_31 !35_33
 LIOI3.IDELAY_Y1.IS_DATAIN_INVERTED 34_46
 LIOI3.IDELAY_Y1.IS_IDATAIN_INVERTED 32_55
 LIOI3.IDELAY_Y1.PIPE_SEL 35_21
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[0] !35_05 35_07
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[1] !35_11 35_13
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[2] !35_17 35_19
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[3] !35_25 35_27
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[4] !35_31 35_33
diff --git a/artix7/segbits_lioi3.origin_info.db b/artix7/segbits_lioi3.origin_info.db
index 7227b82..d69e673 100644
--- a/artix7/segbits_lioi3.origin_info.db
+++ b/artix7/segbits_lioi3.origin_info.db
@@ -1,26 +1,40 @@
 LIOI3.IDELAY_Y0.CINVCTRL_SEL origin:035a-iob-idelay 35_89
-LIOI3.IDELAY_Y0.DELAY_SRC_DATAIN origin:035a-iob-idelay 35_69
-LIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN origin:035a-iob-idelay 34_72
+LIOI3.IDELAY_Y0.DELAY_SRC_DATAIN origin:035a-iob-idelay !34_72 35_69
+LIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN origin:035a-iob-idelay !35_69 34_72
 LIOI3.IDELAY_Y0.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 32_109
-LIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 35_113
-LIOI3.IDELAY_Y0.IDELAY_VALUE[0] origin:035a-iob-idelay 34_122
-LIOI3.IDELAY_Y0.IDELAY_VALUE[1] origin:035a-iob-idelay 34_116
-LIOI3.IDELAY_Y0.IDELAY_VALUE[2] origin:035a-iob-idelay 34_110
-LIOI3.IDELAY_Y0.IDELAY_VALUE[3] origin:035a-iob-idelay 34_102
-LIOI3.IDELAY_Y0.IDELAY_VALUE[4] origin:035a-iob-idelay 34_96
+LIOI3.IDELAY_Y0.IDELAY_TYPE_FIXED origin:035a-iob-idelay !35_113 !35_119
+LIOI3.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !35_113 35_119
+LIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 35_113 35_119
+LIOI3.IDELAY_Y0.IDELAY_VALUE[0] origin:035a-iob-idelay !34_120 34_122
+LIOI3.IDELAY_Y0.IDELAY_VALUE[1] origin:035a-iob-idelay !34_114 34_116
+LIOI3.IDELAY_Y0.IDELAY_VALUE[2] origin:035a-iob-idelay !34_108 34_110
+LIOI3.IDELAY_Y0.IDELAY_VALUE[3] origin:035a-iob-idelay !34_100 34_102
+LIOI3.IDELAY_Y0.IDELAY_VALUE[4] origin:035a-iob-idelay !34_94 34_96
 LIOI3.IDELAY_Y0.IS_DATAIN_INVERTED origin:035a-iob-idelay 35_81
 LIOI3.IDELAY_Y0.IS_IDATAIN_INVERTED origin:035a-iob-idelay 33_72
 LIOI3.IDELAY_Y0.PIPE_SEL origin:035a-iob-idelay 34_106
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[0] origin:035a-iob-idelay !34_122 34_120
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[1] origin:035a-iob-idelay !34_116 34_114
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[2] origin:035a-iob-idelay !34_110 34_108
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[3] origin:035a-iob-idelay !34_102 34_100
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[4] origin:035a-iob-idelay !34_96 34_94
 LIOI3.IDELAY_Y1.CINVCTRL_SEL origin:035a-iob-idelay 34_38
-LIOI3.IDELAY_Y1.DELAY_SRC_DATAIN origin:035a-iob-idelay 34_58
-LIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN origin:035a-iob-idelay 35_55
+LIOI3.IDELAY_Y1.DELAY_SRC_DATAIN origin:035a-iob-idelay !35_55 34_58
+LIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN origin:035a-iob-idelay !34_58 35_55
 LIOI3.IDELAY_Y1.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 33_18
-LIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 34_14
-LIOI3.IDELAY_Y1.IDELAY_VALUE[0] origin:035a-iob-idelay 35_05
-LIOI3.IDELAY_Y1.IDELAY_VALUE[1] origin:035a-iob-idelay 35_11
-LIOI3.IDELAY_Y1.IDELAY_VALUE[2] origin:035a-iob-idelay 35_17
-LIOI3.IDELAY_Y1.IDELAY_VALUE[3] origin:035a-iob-idelay 35_25
-LIOI3.IDELAY_Y1.IDELAY_VALUE[4] origin:035a-iob-idelay 35_31
+LIOI3.IDELAY_Y1.IDELAY_TYPE_FIXED origin:035a-iob-idelay !34_08 !34_14
+LIOI3.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !34_14 34_08
+LIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 34_08 34_14
+LIOI3.IDELAY_Y1.IDELAY_VALUE[0] origin:035a-iob-idelay !35_07 35_05
+LIOI3.IDELAY_Y1.IDELAY_VALUE[1] origin:035a-iob-idelay !35_13 35_11
+LIOI3.IDELAY_Y1.IDELAY_VALUE[2] origin:035a-iob-idelay !35_19 35_17
+LIOI3.IDELAY_Y1.IDELAY_VALUE[3] origin:035a-iob-idelay !35_27 35_25
+LIOI3.IDELAY_Y1.IDELAY_VALUE[4] origin:035a-iob-idelay !35_33 35_31
 LIOI3.IDELAY_Y1.IS_DATAIN_INVERTED origin:035a-iob-idelay 34_46
 LIOI3.IDELAY_Y1.IS_IDATAIN_INVERTED origin:035a-iob-idelay 32_55
 LIOI3.IDELAY_Y1.PIPE_SEL origin:035a-iob-idelay 35_21
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[0] origin:035a-iob-idelay !35_05 35_07
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[1] origin:035a-iob-idelay !35_11 35_13
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[2] origin:035a-iob-idelay !35_17 35_19
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[3] origin:035a-iob-idelay !35_25 35_27
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[4] origin:035a-iob-idelay !35_31 35_33
diff --git a/artix7/segbits_riob33.db b/artix7/segbits_riob33.db
index a046b59..0ae85bb 100644
--- a/artix7/segbits_riob33.db
+++ b/artix7/segbits_riob33.db
@@ -27,6 +27,8 @@
 RIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE !31_92
 RIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE 31_92
 RIOB33.IOB_Y0.OFF.ZINIT_Q 33_97
+RIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.DDR 33_91
+RIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.SDR 33_93
 RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.BUF 32_66
 RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.DDR 32_70
 RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.SDR 33_69
@@ -96,6 +98,8 @@
 RIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE !30_35
 RIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE 30_35
 RIOB33.IOB_Y1.OFF.ZINIT_Q 32_30
+RIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.DDR 32_36
+RIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.SDR 32_34
 RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.BUF 33_61
 RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.DDR 33_57
 RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.SDR 32_58
diff --git a/artix7/segbits_riob33.origin_info.db b/artix7/segbits_riob33.origin_info.db
index 20af015..b28dfd3 100644
--- a/artix7/segbits_riob33.origin_info.db
+++ b/artix7/segbits_riob33.origin_info.db
@@ -49,6 +49,8 @@
 RIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE origin:036-iob-ologic !31_92
 RIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE origin:036-iob-ologic 31_92
 RIOB33.IOB_Y0.OFF.ZINIT_Q origin:036-iob-ologic 33_97
+RIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.DDR origin:036-iob-ologic 33_91
+RIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.SDR origin:036-iob-ologic 33_93
 RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.BUF origin:036-iob-ologic 32_66
 RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.DDR origin:036-iob-ologic 32_70
 RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.SDR origin:036-iob-ologic 33_69
@@ -118,6 +120,8 @@
 RIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE origin:036-iob-ologic !30_35
 RIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE origin:036-iob-ologic 30_35
 RIOB33.IOB_Y1.OFF.ZINIT_Q origin:036-iob-ologic 32_30
+RIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.DDR origin:036-iob-ologic 32_36
+RIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.SDR origin:036-iob-ologic 32_34
 RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.BUF origin:036-iob-ologic 33_61
 RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.DDR origin:036-iob-ologic 33_57
 RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.SDR origin:036-iob-ologic 32_58
diff --git a/artix7/segbits_rioi3.db b/artix7/segbits_rioi3.db
index 3a14a05..6e4dcac 100644
--- a/artix7/segbits_rioi3.db
+++ b/artix7/segbits_rioi3.db
@@ -1,26 +1,40 @@
 RIOI3.IDELAY_Y0.CINVCTRL_SEL 35_89
-RIOI3.IDELAY_Y0.DELAY_SRC_DATAIN 35_69
-RIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN 34_72
+RIOI3.IDELAY_Y0.DELAY_SRC_DATAIN !34_72 35_69
+RIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN 34_72 !35_69
 RIOI3.IDELAY_Y0.HIGH_PERFORMANCE_MODE 32_109
-RIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD 35_113
-RIOI3.IDELAY_Y0.IDELAY_VALUE[0] 34_122
-RIOI3.IDELAY_Y0.IDELAY_VALUE[1] 34_116
-RIOI3.IDELAY_Y0.IDELAY_VALUE[2] 34_110
-RIOI3.IDELAY_Y0.IDELAY_VALUE[3] 34_102
-RIOI3.IDELAY_Y0.IDELAY_VALUE[4] 34_96
+RIOI3.IDELAY_Y0.IDELAY_TYPE_FIXED !35_113 !35_119
+RIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD 35_113 35_119
+RIOI3.IDELAY_Y0.IDELAY_TYPE_VARIABLE !35_113 35_119
+RIOI3.IDELAY_Y0.IDELAY_VALUE[0] !34_120 34_122
+RIOI3.IDELAY_Y0.IDELAY_VALUE[1] !34_114 34_116
+RIOI3.IDELAY_Y0.IDELAY_VALUE[2] !34_108 34_110
+RIOI3.IDELAY_Y0.IDELAY_VALUE[3] !34_100 34_102
+RIOI3.IDELAY_Y0.IDELAY_VALUE[4] !34_94 34_96
 RIOI3.IDELAY_Y0.IS_DATAIN_INVERTED 35_81
 RIOI3.IDELAY_Y0.IS_IDATAIN_INVERTED 33_72
 RIOI3.IDELAY_Y0.PIPE_SEL 34_106
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[0] 34_120 !34_122
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[1] 34_114 !34_116
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[2] 34_108 !34_110
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[3] 34_100 !34_102
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[4] 34_94 !34_96
 RIOI3.IDELAY_Y1.CINVCTRL_SEL 34_38
-RIOI3.IDELAY_Y1.DELAY_SRC_DATAIN 34_58
-RIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN 35_55
+RIOI3.IDELAY_Y1.DELAY_SRC_DATAIN 34_58 !35_55
+RIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN !34_58 35_55
 RIOI3.IDELAY_Y1.HIGH_PERFORMANCE_MODE 33_18
-RIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD 34_14
-RIOI3.IDELAY_Y1.IDELAY_VALUE[0] 35_05
-RIOI3.IDELAY_Y1.IDELAY_VALUE[1] 35_11
-RIOI3.IDELAY_Y1.IDELAY_VALUE[2] 35_17
-RIOI3.IDELAY_Y1.IDELAY_VALUE[3] 35_25
-RIOI3.IDELAY_Y1.IDELAY_VALUE[4] 35_31
+RIOI3.IDELAY_Y1.IDELAY_TYPE_FIXED !34_08 !34_14
+RIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD 34_08 34_14
+RIOI3.IDELAY_Y1.IDELAY_TYPE_VARIABLE 34_08 !34_14
+RIOI3.IDELAY_Y1.IDELAY_VALUE[0] 35_05 !35_07
+RIOI3.IDELAY_Y1.IDELAY_VALUE[1] 35_11 !35_13
+RIOI3.IDELAY_Y1.IDELAY_VALUE[2] 35_17 !35_19
+RIOI3.IDELAY_Y1.IDELAY_VALUE[3] 35_25 !35_27
+RIOI3.IDELAY_Y1.IDELAY_VALUE[4] 35_31 !35_33
 RIOI3.IDELAY_Y1.IS_DATAIN_INVERTED 34_46
 RIOI3.IDELAY_Y1.IS_IDATAIN_INVERTED 32_55
 RIOI3.IDELAY_Y1.PIPE_SEL 35_21
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[0] !35_05 35_07
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[1] !35_11 35_13
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[2] !35_17 35_19
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[3] !35_25 35_27
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[4] !35_31 35_33
diff --git a/artix7/segbits_rioi3.origin_info.db b/artix7/segbits_rioi3.origin_info.db
index b2f1985..1f0460f 100644
--- a/artix7/segbits_rioi3.origin_info.db
+++ b/artix7/segbits_rioi3.origin_info.db
@@ -1,26 +1,40 @@
 RIOI3.IDELAY_Y0.CINVCTRL_SEL origin:035a-iob-idelay 35_89
-RIOI3.IDELAY_Y0.DELAY_SRC_DATAIN origin:035a-iob-idelay 35_69
-RIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN origin:035a-iob-idelay 34_72
+RIOI3.IDELAY_Y0.DELAY_SRC_DATAIN origin:035a-iob-idelay !34_72 35_69
+RIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN origin:035a-iob-idelay !35_69 34_72
 RIOI3.IDELAY_Y0.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 32_109
-RIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 35_113
-RIOI3.IDELAY_Y0.IDELAY_VALUE[0] origin:035a-iob-idelay 34_122
-RIOI3.IDELAY_Y0.IDELAY_VALUE[1] origin:035a-iob-idelay 34_116
-RIOI3.IDELAY_Y0.IDELAY_VALUE[2] origin:035a-iob-idelay 34_110
-RIOI3.IDELAY_Y0.IDELAY_VALUE[3] origin:035a-iob-idelay 34_102
-RIOI3.IDELAY_Y0.IDELAY_VALUE[4] origin:035a-iob-idelay 34_96
+RIOI3.IDELAY_Y0.IDELAY_TYPE_FIXED origin:035a-iob-idelay !35_113 !35_119
+RIOI3.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !35_113 35_119
+RIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 35_113 35_119
+RIOI3.IDELAY_Y0.IDELAY_VALUE[0] origin:035a-iob-idelay !34_120 34_122
+RIOI3.IDELAY_Y0.IDELAY_VALUE[1] origin:035a-iob-idelay !34_114 34_116
+RIOI3.IDELAY_Y0.IDELAY_VALUE[2] origin:035a-iob-idelay !34_108 34_110
+RIOI3.IDELAY_Y0.IDELAY_VALUE[3] origin:035a-iob-idelay !34_100 34_102
+RIOI3.IDELAY_Y0.IDELAY_VALUE[4] origin:035a-iob-idelay !34_94 34_96
 RIOI3.IDELAY_Y0.IS_DATAIN_INVERTED origin:035a-iob-idelay 35_81
 RIOI3.IDELAY_Y0.IS_IDATAIN_INVERTED origin:035a-iob-idelay 33_72
 RIOI3.IDELAY_Y0.PIPE_SEL origin:035a-iob-idelay 34_106
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[0] origin:035a-iob-idelay !34_122 34_120
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[1] origin:035a-iob-idelay !34_116 34_114
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[2] origin:035a-iob-idelay !34_110 34_108
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[3] origin:035a-iob-idelay !34_102 34_100
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[4] origin:035a-iob-idelay !34_96 34_94
 RIOI3.IDELAY_Y1.CINVCTRL_SEL origin:035a-iob-idelay 34_38
-RIOI3.IDELAY_Y1.DELAY_SRC_DATAIN origin:035a-iob-idelay 34_58
-RIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN origin:035a-iob-idelay 35_55
+RIOI3.IDELAY_Y1.DELAY_SRC_DATAIN origin:035a-iob-idelay !35_55 34_58
+RIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN origin:035a-iob-idelay !34_58 35_55
 RIOI3.IDELAY_Y1.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 33_18
-RIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 34_14
-RIOI3.IDELAY_Y1.IDELAY_VALUE[0] origin:035a-iob-idelay 35_05
-RIOI3.IDELAY_Y1.IDELAY_VALUE[1] origin:035a-iob-idelay 35_11
-RIOI3.IDELAY_Y1.IDELAY_VALUE[2] origin:035a-iob-idelay 35_17
-RIOI3.IDELAY_Y1.IDELAY_VALUE[3] origin:035a-iob-idelay 35_25
-RIOI3.IDELAY_Y1.IDELAY_VALUE[4] origin:035a-iob-idelay 35_31
+RIOI3.IDELAY_Y1.IDELAY_TYPE_FIXED origin:035a-iob-idelay !34_08 !34_14
+RIOI3.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !34_14 34_08
+RIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 34_08 34_14
+RIOI3.IDELAY_Y1.IDELAY_VALUE[0] origin:035a-iob-idelay !35_07 35_05
+RIOI3.IDELAY_Y1.IDELAY_VALUE[1] origin:035a-iob-idelay !35_13 35_11
+RIOI3.IDELAY_Y1.IDELAY_VALUE[2] origin:035a-iob-idelay !35_19 35_17
+RIOI3.IDELAY_Y1.IDELAY_VALUE[3] origin:035a-iob-idelay !35_27 35_25
+RIOI3.IDELAY_Y1.IDELAY_VALUE[4] origin:035a-iob-idelay !35_33 35_31
 RIOI3.IDELAY_Y1.IS_DATAIN_INVERTED origin:035a-iob-idelay 34_46
 RIOI3.IDELAY_Y1.IS_IDATAIN_INVERTED origin:035a-iob-idelay 32_55
 RIOI3.IDELAY_Y1.PIPE_SEL origin:035a-iob-idelay 35_21
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[0] origin:035a-iob-idelay !35_05 35_07
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[1] origin:035a-iob-idelay !35_11 35_13
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[2] origin:035a-iob-idelay !35_17 35_19
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[3] origin:035a-iob-idelay !35_25 35_27
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[4] origin:035a-iob-idelay !35_31 35_33
diff --git a/artix7/timings/carry4_slicel.sdf b/artix7/timings/carry4_slicel.sdf
new file mode 100644
index 0000000..6dc9c4f
--- /dev/null
+++ b/artix7/timings/carry4_slicel.sdf
@@ -0,0 +1,41 @@
+(DELAYFILE
+    (SDFVERSION "3.0")
+    (TIMESCALE 1ps)
+
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEL/ACY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT ax di0 (0.096::0.096)(0.096::0.096))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEL/BCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT bx di1 (0.091::0.091)(0.091::0.091))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEL/CCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT cx di2 (0.094::0.094)(0.094::0.094))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEL/DCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT dx di3 (0.058::0.058)(0.058::0.058))
+            )
+        )
+    )
+)
\ No newline at end of file
diff --git a/artix7/timings/carry4_slicem.sdf b/artix7/timings/carry4_slicem.sdf
new file mode 100644
index 0000000..10e0aad
--- /dev/null
+++ b/artix7/timings/carry4_slicem.sdf
@@ -0,0 +1,41 @@
+(DELAYFILE
+    (SDFVERSION "3.0")
+    (TIMESCALE 1ps)
+
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEM/ACY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT ax di0 (0.111::0.111)(0.111::0.111))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEM/BCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT bx di1 (0.098::0.098)(0.098::0.098))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEM/CCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT cx di2 (0.105::0.105)(0.105::0.105))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEM/DCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT dx di3 (0.091::0.091)(0.091::0.091))
+            )
+        )
+    )
+)
\ No newline at end of file
diff --git a/artix7/timings/slicel.sdf b/artix7/timings/slicel.sdf
index f852498..581455b 100644
--- a/artix7/timings/slicel.sdf
+++ b/artix7/timings/slicel.sdf
@@ -511,6 +511,15 @@
     )
     (CELL
         (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEL/ACY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT ax di0 (0.096::0.096)(0.096::0.096))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
         (INSTANCE SLICEL/AFF)
         (DELAY
             (ABSOLUTE
@@ -637,6 +646,15 @@
     )
     (CELL
         (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEL/BCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT bx di1 (0.091::0.091)(0.091::0.091))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
         (INSTANCE SLICEL/BFF)
         (DELAY
             (ABSOLUTE
@@ -779,6 +797,15 @@
     )
     (CELL
         (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEL/CCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT cx di2 (0.094::0.094)(0.094::0.094))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
         (INSTANCE SLICEL/CFF)
         (DELAY
             (ABSOLUTE
@@ -910,6 +937,15 @@
     )
     (CELL
         (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEL/DCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT dx di3 (0.058::0.058)(0.058::0.058))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
         (INSTANCE SLICEL/DFF)
         (DELAY
             (ABSOLUTE
diff --git a/artix7/timings/slicem.sdf b/artix7/timings/slicem.sdf
index c78371e..ef8d635 100644
--- a/artix7/timings/slicem.sdf
+++ b/artix7/timings/slicem.sdf
@@ -756,6 +756,15 @@
     )
     (CELL
         (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEM/ACY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT ax di0 (0.111::0.111)(0.111::0.111))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
         (INSTANCE SLICEM/AFF)
         (DELAY
             (ABSOLUTE
@@ -904,6 +913,15 @@
     )
     (CELL
         (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEM/BCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT bx di1 (0.098::0.098)(0.098::0.098))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
         (INSTANCE SLICEM/BFF)
         (DELAY
             (ABSOLUTE
@@ -1067,6 +1085,15 @@
     )
     (CELL
         (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEM/CCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT cx di2 (0.105::0.105)(0.105::0.105))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
         (INSTANCE SLICEM/CFF)
         (DELAY
             (ABSOLUTE
@@ -1226,6 +1253,15 @@
     )
     (CELL
         (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEM/DCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT dx di3 (0.091::0.091)(0.091::0.091))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
         (INSTANCE SLICEM/DFF)
         (DELAY
             (ABSOLUTE
diff --git a/kintex7/mask_liob33.db b/kintex7/mask_liob33.db
index 51a2f9d..b5316d9 100644
--- a/kintex7/mask_liob33.db
+++ b/kintex7/mask_liob33.db
@@ -31,6 +31,8 @@
 bit 01_102
 bit 01_104
 bit 02_55
+bit 04_32
+bit 04_35
 bit 04_52
 bit 06_01
 bit 06_03
@@ -42,7 +44,6 @@
 bit 06_61
 bit 06_65
 bit 06_67
-bit 06_77
 bit 06_81
 bit 06_83
 bit 06_97
@@ -57,11 +58,9 @@
 bit 07_14
 bit 07_16
 bit 07_22
-bit 07_24
 bit 07_28
 bit 07_30
 bit 07_32
-bit 07_34
 bit 07_38
 bit 07_40
 bit 07_44
@@ -77,6 +76,7 @@
 bit 07_76
 bit 07_78
 bit 07_80
+bit 07_82
 bit 07_86
 bit 07_88
 bit 07_92
@@ -95,8 +95,6 @@
 bit 08_00
 bit 08_01
 bit 08_02
-bit 08_03
-bit 08_06
 bit 08_07
 bit 08_08
 bit 08_09
@@ -121,7 +119,6 @@
 bit 08_40
 bit 08_41
 bit 08_46
-bit 08_47
 bit 08_48
 bit 08_49
 bit 08_50
@@ -154,10 +151,12 @@
 bit 08_97
 bit 08_98
 bit 08_99
+bit 08_102
 bit 08_103
 bit 08_104
 bit 08_105
 bit 08_110
+bit 08_111
 bit 08_112
 bit 08_113
 bit 08_114
@@ -182,6 +181,7 @@
 bit 09_34
 bit 09_35
 bit 09_36
+bit 09_42
 bit 09_43
 bit 09_44
 bit 09_45
@@ -193,21 +193,21 @@
 bit 09_59
 bit 09_60
 bit 09_61
+bit 09_66
 bit 09_67
-bit 09_74
+bit 09_68
 bit 09_75
 bit 09_76
 bit 09_77
 bit 09_78
+bit 09_82
 bit 09_83
 bit 09_91
 bit 09_92
 bit 09_93
-bit 09_94
 bit 09_96
 bit 09_98
-bit 09_99
-bit 09_106
+bit 09_100
 bit 09_107
 bit 09_108
 bit 09_109
@@ -220,6 +220,7 @@
 bit 10_01
 bit 10_02
 bit 10_07
+bit 10_09
 bit 10_13
 bit 10_15
 bit 10_16
@@ -233,7 +234,6 @@
 bit 10_34
 bit 10_39
 bit 10_41
-bit 10_45
 bit 10_47
 bit 10_48
 bit 10_49
@@ -246,6 +246,7 @@
 bit 10_67
 bit 10_71
 bit 10_73
+bit 10_74
 bit 10_77
 bit 10_79
 bit 10_80
@@ -266,6 +267,7 @@
 bit 10_119
 bit 10_121
 bit 10_122
+bit 10_125
 bit 10_127
 bit 11_01
 bit 11_02
@@ -284,6 +286,7 @@
 bit 11_29
 bit 11_30
 bit 11_31
+bit 11_32
 bit 11_33
 bit 11_35
 bit 11_39
@@ -332,7 +335,6 @@
 bit 12_02
 bit 12_03
 bit 12_07
-bit 12_09
 bit 12_10
 bit 12_13
 bit 12_15
@@ -365,7 +367,6 @@
 bit 12_67
 bit 12_71
 bit 12_73
-bit 12_76
 bit 12_77
 bit 12_79
 bit 12_81
@@ -373,10 +374,10 @@
 bit 12_83
 bit 12_87
 bit 12_89
+bit 12_90
 bit 12_93
 bit 12_95
 bit 12_96
-bit 12_97
 bit 12_98
 bit 12_99
 bit 12_103
@@ -407,7 +408,6 @@
 bit 13_23
 bit 13_25
 bit 13_28
-bit 13_29
 bit 13_30
 bit 13_31
 bit 13_32
@@ -417,7 +417,6 @@
 bit 13_36
 bit 13_39
 bit 13_41
-bit 13_42
 bit 13_44
 bit 13_46
 bit 13_47
@@ -432,8 +431,10 @@
 bit 13_65
 bit 13_66
 bit 13_67
+bit 13_68
 bit 13_71
 bit 13_73
+bit 13_74
 bit 13_76
 bit 13_78
 bit 13_79
@@ -444,15 +445,13 @@
 bit 13_89
 bit 13_92
 bit 13_93
-bit 13_94
 bit 13_95
 bit 13_96
 bit 13_97
-bit 13_98
 bit 13_99
+bit 13_100
 bit 13_103
 bit 13_105
-bit 13_106
 bit 13_108
 bit 13_109
 bit 13_110
@@ -477,6 +476,7 @@
 bit 14_32
 bit 14_34
 bit 14_42
+bit 14_44
 bit 14_48
 bit 14_50
 bit 14_58
@@ -574,6 +574,7 @@
 bit 16_62
 bit 16_66
 bit 16_70
+bit 16_71
 bit 16_73
 bit 16_79
 bit 16_80
@@ -586,11 +587,11 @@
 bit 16_96
 bit 16_102
 bit 16_103
+bit 16_104
 bit 16_106
 bit 16_107
 bit 16_108
 bit 16_110
-bit 16_111
 bit 16_112
 bit 16_118
 bit 16_120
@@ -603,6 +604,7 @@
 bit 17_07
 bit 17_09
 bit 17_15
+bit 17_16
 bit 17_21
 bit 17_22
 bit 17_23
@@ -690,8 +692,9 @@
 bit 18_87
 bit 18_94
 bit 18_95
-bit 18_97
+bit 18_102
 bit 18_103
+bit 18_105
 bit 18_106
 bit 18_107
 bit 18_109
@@ -724,6 +727,7 @@
 bit 19_46
 bit 19_47
 bit 19_49
+bit 19_54
 bit 19_55
 bit 19_56
 bit 19_57
@@ -786,6 +790,7 @@
 bit 20_107
 bit 20_108
 bit 20_110
+bit 20_112
 bit 20_118
 bit 20_121
 bit 20_122
@@ -835,6 +840,7 @@
 bit 22_31
 bit 22_32
 bit 22_38
+bit 22_39
 bit 22_42
 bit 22_43
 bit 22_44
@@ -849,7 +855,6 @@
 bit 22_62
 bit 22_66
 bit 22_70
-bit 22_71
 bit 22_73
 bit 22_79
 bit 22_80
@@ -859,14 +864,12 @@
 bit 22_88
 bit 22_94
 bit 22_95
-bit 22_96
 bit 22_102
-bit 22_103
+bit 22_104
 bit 22_106
 bit 22_107
 bit 22_108
 bit 22_110
-bit 22_111
 bit 22_112
 bit 22_118
 bit 22_120
@@ -910,6 +913,7 @@
 bit 23_85
 bit 23_86
 bit 23_87
+bit 23_88
 bit 23_94
 bit 23_95
 bit 23_96
@@ -989,6 +993,7 @@
 bit 25_02
 bit 25_06
 bit 25_07
+bit 25_08
 bit 25_09
 bit 25_15
 bit 25_16
diff --git a/kintex7/mask_lioi3.db b/kintex7/mask_lioi3.db
new file mode 100644
index 0000000..af7a5a9
--- /dev/null
+++ b/kintex7/mask_lioi3.db
@@ -0,0 +1,144 @@
+bit 00_11
+bit 00_17
+bit 00_27
+bit 00_75
+bit 00_81
+bit 00_91
+bit 00_93
+bit 01_13
+bit 01_14
+bit 01_25
+bit 01_77
+bit 01_78
+bit 01_89
+bit 01_90
+bit 04_67
+bit 05_66
+bit 06_68
+bit 06_71
+bit 06_74
+bit 07_66
+bit 07_69
+bit 07_75
+bit 08_68
+bit 10_06
+bit 11_15
+bit 11_68
+bit 12_67
+bit 13_15
+bit 13_68
+bit 14_69
+bit 15_06
+bit 15_70
+bit 18_20
+bit 19_84
+bit 20_05
+bit 20_13
+bit 20_55
+bit 20_69
+bit 20_77
+bit 20_119
+bit 21_20
+bit 21_34
+bit 21_52
+bit 21_84
+bit 21_98
+bit 21_116
+bit 23_85
+bit 24_05
+bit 24_13
+bit 24_21
+bit 24_55
+bit 24_69
+bit 24_77
+bit 24_85
+bit 24_119
+bit 25_20
+bit 25_34
+bit 25_52
+bit 25_84
+bit 25_85
+bit 25_98
+bit 25_116
+bit 28_26
+bit 29_101
+bit 30_41
+bit 31_86
+bit 32_16
+bit 32_55
+bit 32_66
+bit 32_73
+bit 32_109
+bit 33_18
+bit 33_54
+bit 33_61
+bit 33_72
+bit 33_111
+bit 34_08
+bit 34_14
+bit 34_38
+bit 34_46
+bit 34_58
+bit 34_72
+bit 34_88
+bit 34_94
+bit 34_96
+bit 34_100
+bit 34_102
+bit 34_106
+bit 34_108
+bit 34_110
+bit 34_114
+bit 34_116
+bit 34_120
+bit 34_122
+bit 35_05
+bit 35_07
+bit 35_11
+bit 35_13
+bit 35_17
+bit 35_19
+bit 35_21
+bit 35_25
+bit 35_27
+bit 35_31
+bit 35_33
+bit 35_39
+bit 35_55
+bit 35_69
+bit 35_81
+bit 35_89
+bit 35_113
+bit 35_119
+bit 38_02
+bit 38_08
+bit 38_14
+bit 38_18
+bit 38_22
+bit 38_32
+bit 38_42
+bit 38_62
+bit 38_64
+bit 38_86
+bit 38_94
+bit 38_106
+bit 38_110
+bit 38_112
+bit 38_118
+bit 38_126
+bit 39_01
+bit 39_09
+bit 39_15
+bit 39_17
+bit 39_21
+bit 39_33
+bit 39_41
+bit 39_63
+bit 39_65
+bit 39_85
+bit 39_95
+bit 39_105
+bit 39_109
+bit 39_113
+bit 39_119
+bit 39_125
diff --git a/kintex7/mask_riob33.db b/kintex7/mask_riob33.db
index 51a2f9d..b5316d9 100644
--- a/kintex7/mask_riob33.db
+++ b/kintex7/mask_riob33.db
@@ -31,6 +31,8 @@
 bit 01_102
 bit 01_104
 bit 02_55
+bit 04_32
+bit 04_35
 bit 04_52
 bit 06_01
 bit 06_03
@@ -42,7 +44,6 @@
 bit 06_61
 bit 06_65
 bit 06_67
-bit 06_77
 bit 06_81
 bit 06_83
 bit 06_97
@@ -57,11 +58,9 @@
 bit 07_14
 bit 07_16
 bit 07_22
-bit 07_24
 bit 07_28
 bit 07_30
 bit 07_32
-bit 07_34
 bit 07_38
 bit 07_40
 bit 07_44
@@ -77,6 +76,7 @@
 bit 07_76
 bit 07_78
 bit 07_80
+bit 07_82
 bit 07_86
 bit 07_88
 bit 07_92
@@ -95,8 +95,6 @@
 bit 08_00
 bit 08_01
 bit 08_02
-bit 08_03
-bit 08_06
 bit 08_07
 bit 08_08
 bit 08_09
@@ -121,7 +119,6 @@
 bit 08_40
 bit 08_41
 bit 08_46
-bit 08_47
 bit 08_48
 bit 08_49
 bit 08_50
@@ -154,10 +151,12 @@
 bit 08_97
 bit 08_98
 bit 08_99
+bit 08_102
 bit 08_103
 bit 08_104
 bit 08_105
 bit 08_110
+bit 08_111
 bit 08_112
 bit 08_113
 bit 08_114
@@ -182,6 +181,7 @@
 bit 09_34
 bit 09_35
 bit 09_36
+bit 09_42
 bit 09_43
 bit 09_44
 bit 09_45
@@ -193,21 +193,21 @@
 bit 09_59
 bit 09_60
 bit 09_61
+bit 09_66
 bit 09_67
-bit 09_74
+bit 09_68
 bit 09_75
 bit 09_76
 bit 09_77
 bit 09_78
+bit 09_82
 bit 09_83
 bit 09_91
 bit 09_92
 bit 09_93
-bit 09_94
 bit 09_96
 bit 09_98
-bit 09_99
-bit 09_106
+bit 09_100
 bit 09_107
 bit 09_108
 bit 09_109
@@ -220,6 +220,7 @@
 bit 10_01
 bit 10_02
 bit 10_07
+bit 10_09
 bit 10_13
 bit 10_15
 bit 10_16
@@ -233,7 +234,6 @@
 bit 10_34
 bit 10_39
 bit 10_41
-bit 10_45
 bit 10_47
 bit 10_48
 bit 10_49
@@ -246,6 +246,7 @@
 bit 10_67
 bit 10_71
 bit 10_73
+bit 10_74
 bit 10_77
 bit 10_79
 bit 10_80
@@ -266,6 +267,7 @@
 bit 10_119
 bit 10_121
 bit 10_122
+bit 10_125
 bit 10_127
 bit 11_01
 bit 11_02
@@ -284,6 +286,7 @@
 bit 11_29
 bit 11_30
 bit 11_31
+bit 11_32
 bit 11_33
 bit 11_35
 bit 11_39
@@ -332,7 +335,6 @@
 bit 12_02
 bit 12_03
 bit 12_07
-bit 12_09
 bit 12_10
 bit 12_13
 bit 12_15
@@ -365,7 +367,6 @@
 bit 12_67
 bit 12_71
 bit 12_73
-bit 12_76
 bit 12_77
 bit 12_79
 bit 12_81
@@ -373,10 +374,10 @@
 bit 12_83
 bit 12_87
 bit 12_89
+bit 12_90
 bit 12_93
 bit 12_95
 bit 12_96
-bit 12_97
 bit 12_98
 bit 12_99
 bit 12_103
@@ -407,7 +408,6 @@
 bit 13_23
 bit 13_25
 bit 13_28
-bit 13_29
 bit 13_30
 bit 13_31
 bit 13_32
@@ -417,7 +417,6 @@
 bit 13_36
 bit 13_39
 bit 13_41
-bit 13_42
 bit 13_44
 bit 13_46
 bit 13_47
@@ -432,8 +431,10 @@
 bit 13_65
 bit 13_66
 bit 13_67
+bit 13_68
 bit 13_71
 bit 13_73
+bit 13_74
 bit 13_76
 bit 13_78
 bit 13_79
@@ -444,15 +445,13 @@
 bit 13_89
 bit 13_92
 bit 13_93
-bit 13_94
 bit 13_95
 bit 13_96
 bit 13_97
-bit 13_98
 bit 13_99
+bit 13_100
 bit 13_103
 bit 13_105
-bit 13_106
 bit 13_108
 bit 13_109
 bit 13_110
@@ -477,6 +476,7 @@
 bit 14_32
 bit 14_34
 bit 14_42
+bit 14_44
 bit 14_48
 bit 14_50
 bit 14_58
@@ -574,6 +574,7 @@
 bit 16_62
 bit 16_66
 bit 16_70
+bit 16_71
 bit 16_73
 bit 16_79
 bit 16_80
@@ -586,11 +587,11 @@
 bit 16_96
 bit 16_102
 bit 16_103
+bit 16_104
 bit 16_106
 bit 16_107
 bit 16_108
 bit 16_110
-bit 16_111
 bit 16_112
 bit 16_118
 bit 16_120
@@ -603,6 +604,7 @@
 bit 17_07
 bit 17_09
 bit 17_15
+bit 17_16
 bit 17_21
 bit 17_22
 bit 17_23
@@ -690,8 +692,9 @@
 bit 18_87
 bit 18_94
 bit 18_95
-bit 18_97
+bit 18_102
 bit 18_103
+bit 18_105
 bit 18_106
 bit 18_107
 bit 18_109
@@ -724,6 +727,7 @@
 bit 19_46
 bit 19_47
 bit 19_49
+bit 19_54
 bit 19_55
 bit 19_56
 bit 19_57
@@ -786,6 +790,7 @@
 bit 20_107
 bit 20_108
 bit 20_110
+bit 20_112
 bit 20_118
 bit 20_121
 bit 20_122
@@ -835,6 +840,7 @@
 bit 22_31
 bit 22_32
 bit 22_38
+bit 22_39
 bit 22_42
 bit 22_43
 bit 22_44
@@ -849,7 +855,6 @@
 bit 22_62
 bit 22_66
 bit 22_70
-bit 22_71
 bit 22_73
 bit 22_79
 bit 22_80
@@ -859,14 +864,12 @@
 bit 22_88
 bit 22_94
 bit 22_95
-bit 22_96
 bit 22_102
-bit 22_103
+bit 22_104
 bit 22_106
 bit 22_107
 bit 22_108
 bit 22_110
-bit 22_111
 bit 22_112
 bit 22_118
 bit 22_120
@@ -910,6 +913,7 @@
 bit 23_85
 bit 23_86
 bit 23_87
+bit 23_88
 bit 23_94
 bit 23_95
 bit 23_96
@@ -989,6 +993,7 @@
 bit 25_02
 bit 25_06
 bit 25_07
+bit 25_08
 bit 25_09
 bit 25_15
 bit 25_16
diff --git a/kintex7/mask_rioi3.db b/kintex7/mask_rioi3.db
new file mode 100644
index 0000000..af7a5a9
--- /dev/null
+++ b/kintex7/mask_rioi3.db
@@ -0,0 +1,144 @@
+bit 00_11
+bit 00_17
+bit 00_27
+bit 00_75
+bit 00_81
+bit 00_91
+bit 00_93
+bit 01_13
+bit 01_14
+bit 01_25
+bit 01_77
+bit 01_78
+bit 01_89
+bit 01_90
+bit 04_67
+bit 05_66
+bit 06_68
+bit 06_71
+bit 06_74
+bit 07_66
+bit 07_69
+bit 07_75
+bit 08_68
+bit 10_06
+bit 11_15
+bit 11_68
+bit 12_67
+bit 13_15
+bit 13_68
+bit 14_69
+bit 15_06
+bit 15_70
+bit 18_20
+bit 19_84
+bit 20_05
+bit 20_13
+bit 20_55
+bit 20_69
+bit 20_77
+bit 20_119
+bit 21_20
+bit 21_34
+bit 21_52
+bit 21_84
+bit 21_98
+bit 21_116
+bit 23_85
+bit 24_05
+bit 24_13
+bit 24_21
+bit 24_55
+bit 24_69
+bit 24_77
+bit 24_85
+bit 24_119
+bit 25_20
+bit 25_34
+bit 25_52
+bit 25_84
+bit 25_85
+bit 25_98
+bit 25_116
+bit 28_26
+bit 29_101
+bit 30_41
+bit 31_86
+bit 32_16
+bit 32_55
+bit 32_66
+bit 32_73
+bit 32_109
+bit 33_18
+bit 33_54
+bit 33_61
+bit 33_72
+bit 33_111
+bit 34_08
+bit 34_14
+bit 34_38
+bit 34_46
+bit 34_58
+bit 34_72
+bit 34_88
+bit 34_94
+bit 34_96
+bit 34_100
+bit 34_102
+bit 34_106
+bit 34_108
+bit 34_110
+bit 34_114
+bit 34_116
+bit 34_120
+bit 34_122
+bit 35_05
+bit 35_07
+bit 35_11
+bit 35_13
+bit 35_17
+bit 35_19
+bit 35_21
+bit 35_25
+bit 35_27
+bit 35_31
+bit 35_33
+bit 35_39
+bit 35_55
+bit 35_69
+bit 35_81
+bit 35_89
+bit 35_113
+bit 35_119
+bit 38_02
+bit 38_08
+bit 38_14
+bit 38_18
+bit 38_22
+bit 38_32
+bit 38_42
+bit 38_62
+bit 38_64
+bit 38_86
+bit 38_94
+bit 38_106
+bit 38_110
+bit 38_112
+bit 38_118
+bit 38_126
+bit 39_01
+bit 39_09
+bit 39_15
+bit 39_17
+bit 39_21
+bit 39_33
+bit 39_41
+bit 39_63
+bit 39_65
+bit 39_85
+bit 39_95
+bit 39_105
+bit 39_109
+bit 39_113
+bit 39_119
+bit 39_125
diff --git a/kintex7/segbits_int_l.origin_info.db b/kintex7/segbits_int_l.origin_info.db
index 7dbc53d..6851bda 100644
--- a/kintex7/segbits_int_l.origin_info.db
+++ b/kintex7/segbits_int_l.origin_info.db
@@ -373,7 +373,7 @@
 INT_L.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27
 INT_L.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24
 INT_L.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27
-INT_L.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27
+INT_L.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27
 INT_L.EE4BEG2.EE2END2 origin:050-pip-seed 03_40 03_41
 INT_L.EE4BEG2.EE4END2 origin:050-pip-seed 03_41 05_40
 INT_L.EE4BEG2.LOGIC_OUTS_L10 origin:050-pip-seed 03_40 07_41
@@ -2193,7 +2193,7 @@
 INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
 INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
 INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
-INT_L.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
+INT_L.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
 INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17
 INT_L.NL1BEG0.LOGIC_OUTS_L13 origin:050-pip-seed 10_17 14_17
 INT_L.NL1BEG0.LOGIC_OUTS_L19 origin:050-pip-seed 08_17 14_17
diff --git a/kintex7/segbits_int_r.origin_info.db b/kintex7/segbits_int_r.origin_info.db
index 49d57dc..f7c6293 100644
--- a/kintex7/segbits_int_r.origin_info.db
+++ b/kintex7/segbits_int_r.origin_info.db
@@ -413,7 +413,7 @@
 INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
 INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
 INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
-INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
+INT_R.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
 INT_R.EL1BEG0.EE2END1 origin:050-pip-seed 07_20 15_21
 INT_R.EL1BEG0.EE4END1 origin:050-pip-seed 07_20 12_21
 INT_R.EL1BEG0.EL1END1 origin:050-pip-seed 11_21 13_21
@@ -3275,7 +3275,7 @@
 INT_R.SW6BEG1.WW2END1 origin:050-pip-seed 03_28 05_31
 INT_R.SW6BEG1.WW4END2 origin:050-pip-seed 05_28 05_31
 INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
-INT_R.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
+INT_R.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
 INT_R.SW6BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_44 04_46
 INT_R.SW6BEG2.LOGIC_OUTS14 origin:050-pip-seed 03_44 07_45
 INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44
@@ -3603,7 +3603,7 @@
 INT_R.WW4BEG2.LVB0 origin:056-pip-rem 04_34 05_32
 INT_R.WW4BEG2.LVB12 origin:056-pip-rem 05_32 07_33
 INT_R.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
-INT_R.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
+INT_R.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
 INT_R.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
 INT_R.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
 INT_R.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
@@ -3623,7 +3623,7 @@
 INT_R.WW4BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_49 04_50
 INT_R.WW4BEG3.LV18 origin:056-pip-rem 05_48 07_49
 INT_R.WW4BEG3.NE2END3 origin:050-pip-seed 02_49 05_51
-INT_R.WW4BEG3.NE6END3 origin:050-pip-seed 05_48 05_51
+INT_R.WW4BEG3.NE6END3 origin:056-pip-rem 05_48 05_51
 INT_R.WW4BEG3.NN2END3 origin:050-pip-seed 03_48 05_51
 INT_R.WW4BEG3.NN6END3 origin:050-pip-seed 05_51 06_48
 INT_R.WW4BEG3.NW2END3 origin:050-pip-seed 02_49 03_49
diff --git a/kintex7/segbits_liob33.db b/kintex7/segbits_liob33.db
index 0857100..596742a 100644
--- a/kintex7/segbits_liob33.db
+++ b/kintex7/segbits_liob33.db
@@ -26,6 +26,8 @@
 LIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE !31_92
 LIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE 31_92
 LIOB33.IOB_Y0.OFF.ZINIT_Q 33_97
+LIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.DDR 33_91
+LIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.SDR 33_93
 LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.BUF 32_66
 LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.DDR 32_70
 LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.SDR 33_69
@@ -93,6 +95,8 @@
 LIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE !30_35
 LIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE 30_35
 LIOB33.IOB_Y1.OFF.ZINIT_Q 32_30
+LIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.DDR 32_36
+LIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.SDR 32_34
 LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.BUF 33_61
 LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.DDR 33_57
 LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.SDR 32_58
diff --git a/kintex7/segbits_liob33.origin_info.db b/kintex7/segbits_liob33.origin_info.db
index 0ab0920..f37436b 100644
--- a/kintex7/segbits_liob33.origin_info.db
+++ b/kintex7/segbits_liob33.origin_info.db
@@ -46,6 +46,8 @@
 LIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE origin:036-iob-ologic !31_92
 LIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE origin:036-iob-ologic 31_92
 LIOB33.IOB_Y0.OFF.ZINIT_Q origin:036-iob-ologic 33_97
+LIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.DDR origin:036-iob-ologic 33_91
+LIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.SDR origin:036-iob-ologic 33_93
 LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.BUF origin:036-iob-ologic 32_66
 LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.DDR origin:036-iob-ologic 32_70
 LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.SDR origin:036-iob-ologic 33_69
@@ -115,6 +117,8 @@
 LIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE origin:036-iob-ologic !30_35
 LIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE origin:036-iob-ologic 30_35
 LIOB33.IOB_Y1.OFF.ZINIT_Q origin:036-iob-ologic 32_30
+LIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.DDR origin:036-iob-ologic 32_36
+LIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.SDR origin:036-iob-ologic 32_34
 LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.BUF origin:036-iob-ologic 33_61
 LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.DDR origin:036-iob-ologic 33_57
 LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.SDR origin:036-iob-ologic 32_58
diff --git a/kintex7/segbits_lioi3.db b/kintex7/segbits_lioi3.db
new file mode 100644
index 0000000..ec2ad75
--- /dev/null
+++ b/kintex7/segbits_lioi3.db
@@ -0,0 +1,40 @@
+LIOI3.IDELAY_Y0.CINVCTRL_SEL 35_89
+LIOI3.IDELAY_Y0.DELAY_SRC_DATAIN !34_72 35_69
+LIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN 34_72 !35_69
+LIOI3.IDELAY_Y0.HIGH_PERFORMANCE_MODE 32_109
+LIOI3.IDELAY_Y0.IDELAY_TYPE_FIXED !35_113 !35_119
+LIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD 35_113 35_119
+LIOI3.IDELAY_Y0.IDELAY_TYPE_VARIABLE !35_113 35_119
+LIOI3.IDELAY_Y0.IDELAY_VALUE[0] !34_120 34_122
+LIOI3.IDELAY_Y0.IDELAY_VALUE[1] !34_114 34_116
+LIOI3.IDELAY_Y0.IDELAY_VALUE[2] !34_108 34_110
+LIOI3.IDELAY_Y0.IDELAY_VALUE[3] !34_100 34_102
+LIOI3.IDELAY_Y0.IDELAY_VALUE[4] !34_94 34_96
+LIOI3.IDELAY_Y0.IS_DATAIN_INVERTED 35_81
+LIOI3.IDELAY_Y0.IS_IDATAIN_INVERTED 33_72
+LIOI3.IDELAY_Y0.PIPE_SEL 34_106
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[0] 34_120 !34_122
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[1] 34_114 !34_116
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[2] 34_108 !34_110
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[3] 34_100 !34_102
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[4] 34_94 !34_96
+LIOI3.IDELAY_Y1.CINVCTRL_SEL 34_38
+LIOI3.IDELAY_Y1.DELAY_SRC_DATAIN 34_58 !35_55
+LIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN !34_58 35_55
+LIOI3.IDELAY_Y1.HIGH_PERFORMANCE_MODE 33_18
+LIOI3.IDELAY_Y1.IDELAY_TYPE_FIXED !34_08 !34_14
+LIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD 34_08 34_14
+LIOI3.IDELAY_Y1.IDELAY_TYPE_VARIABLE 34_08 !34_14
+LIOI3.IDELAY_Y1.IDELAY_VALUE[0] 35_05 !35_07
+LIOI3.IDELAY_Y1.IDELAY_VALUE[1] 35_11 !35_13
+LIOI3.IDELAY_Y1.IDELAY_VALUE[2] 35_17 !35_19
+LIOI3.IDELAY_Y1.IDELAY_VALUE[3] 35_25 !35_27
+LIOI3.IDELAY_Y1.IDELAY_VALUE[4] 35_31 !35_33
+LIOI3.IDELAY_Y1.IS_DATAIN_INVERTED 34_46
+LIOI3.IDELAY_Y1.IS_IDATAIN_INVERTED 32_55
+LIOI3.IDELAY_Y1.PIPE_SEL 35_21
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[0] !35_05 35_07
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[1] !35_11 35_13
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[2] !35_17 35_19
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[3] !35_25 35_27
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[4] !35_31 35_33
diff --git a/kintex7/segbits_lioi3.origin_info.db b/kintex7/segbits_lioi3.origin_info.db
new file mode 100644
index 0000000..d69e673
--- /dev/null
+++ b/kintex7/segbits_lioi3.origin_info.db
@@ -0,0 +1,40 @@
+LIOI3.IDELAY_Y0.CINVCTRL_SEL origin:035a-iob-idelay 35_89
+LIOI3.IDELAY_Y0.DELAY_SRC_DATAIN origin:035a-iob-idelay !34_72 35_69
+LIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN origin:035a-iob-idelay !35_69 34_72
+LIOI3.IDELAY_Y0.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 32_109
+LIOI3.IDELAY_Y0.IDELAY_TYPE_FIXED origin:035a-iob-idelay !35_113 !35_119
+LIOI3.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !35_113 35_119
+LIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 35_113 35_119
+LIOI3.IDELAY_Y0.IDELAY_VALUE[0] origin:035a-iob-idelay !34_120 34_122
+LIOI3.IDELAY_Y0.IDELAY_VALUE[1] origin:035a-iob-idelay !34_114 34_116
+LIOI3.IDELAY_Y0.IDELAY_VALUE[2] origin:035a-iob-idelay !34_108 34_110
+LIOI3.IDELAY_Y0.IDELAY_VALUE[3] origin:035a-iob-idelay !34_100 34_102
+LIOI3.IDELAY_Y0.IDELAY_VALUE[4] origin:035a-iob-idelay !34_94 34_96
+LIOI3.IDELAY_Y0.IS_DATAIN_INVERTED origin:035a-iob-idelay 35_81
+LIOI3.IDELAY_Y0.IS_IDATAIN_INVERTED origin:035a-iob-idelay 33_72
+LIOI3.IDELAY_Y0.PIPE_SEL origin:035a-iob-idelay 34_106
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[0] origin:035a-iob-idelay !34_122 34_120
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[1] origin:035a-iob-idelay !34_116 34_114
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[2] origin:035a-iob-idelay !34_110 34_108
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[3] origin:035a-iob-idelay !34_102 34_100
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[4] origin:035a-iob-idelay !34_96 34_94
+LIOI3.IDELAY_Y1.CINVCTRL_SEL origin:035a-iob-idelay 34_38
+LIOI3.IDELAY_Y1.DELAY_SRC_DATAIN origin:035a-iob-idelay !35_55 34_58
+LIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN origin:035a-iob-idelay !34_58 35_55
+LIOI3.IDELAY_Y1.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 33_18
+LIOI3.IDELAY_Y1.IDELAY_TYPE_FIXED origin:035a-iob-idelay !34_08 !34_14
+LIOI3.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !34_14 34_08
+LIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 34_08 34_14
+LIOI3.IDELAY_Y1.IDELAY_VALUE[0] origin:035a-iob-idelay !35_07 35_05
+LIOI3.IDELAY_Y1.IDELAY_VALUE[1] origin:035a-iob-idelay !35_13 35_11
+LIOI3.IDELAY_Y1.IDELAY_VALUE[2] origin:035a-iob-idelay !35_19 35_17
+LIOI3.IDELAY_Y1.IDELAY_VALUE[3] origin:035a-iob-idelay !35_27 35_25
+LIOI3.IDELAY_Y1.IDELAY_VALUE[4] origin:035a-iob-idelay !35_33 35_31
+LIOI3.IDELAY_Y1.IS_DATAIN_INVERTED origin:035a-iob-idelay 34_46
+LIOI3.IDELAY_Y1.IS_IDATAIN_INVERTED origin:035a-iob-idelay 32_55
+LIOI3.IDELAY_Y1.PIPE_SEL origin:035a-iob-idelay 35_21
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[0] origin:035a-iob-idelay !35_05 35_07
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[1] origin:035a-iob-idelay !35_11 35_13
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[2] origin:035a-iob-idelay !35_17 35_19
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[3] origin:035a-iob-idelay !35_25 35_27
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[4] origin:035a-iob-idelay !35_31 35_33
diff --git a/kintex7/segbits_riob33.db b/kintex7/segbits_riob33.db
index f23f63d..1ff1e7e 100644
--- a/kintex7/segbits_riob33.db
+++ b/kintex7/segbits_riob33.db
@@ -26,6 +26,8 @@
 RIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE !31_92
 RIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE 31_92
 RIOB33.IOB_Y0.OFF.ZINIT_Q 33_97
+RIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.DDR 33_91
+RIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.SDR 33_93
 RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.BUF 32_66
 RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.DDR 32_70
 RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.SDR 33_69
@@ -93,6 +95,8 @@
 RIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE !30_35
 RIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE 30_35
 RIOB33.IOB_Y1.OFF.ZINIT_Q 32_30
+RIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.DDR 32_36
+RIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.SDR 32_34
 RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.BUF 33_61
 RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.DDR 33_57
 RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.SDR 32_58
diff --git a/kintex7/segbits_riob33.origin_info.db b/kintex7/segbits_riob33.origin_info.db
index f56fd42..ed04c9a 100644
--- a/kintex7/segbits_riob33.origin_info.db
+++ b/kintex7/segbits_riob33.origin_info.db
@@ -46,6 +46,8 @@
 RIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE origin:036-iob-ologic !31_92
 RIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE origin:036-iob-ologic 31_92
 RIOB33.IOB_Y0.OFF.ZINIT_Q origin:036-iob-ologic 33_97
+RIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.DDR origin:036-iob-ologic 33_91
+RIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.SDR origin:036-iob-ologic 33_93
 RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.BUF origin:036-iob-ologic 32_66
 RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.DDR origin:036-iob-ologic 32_70
 RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.SDR origin:036-iob-ologic 33_69
@@ -115,6 +117,8 @@
 RIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE origin:036-iob-ologic !30_35
 RIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE origin:036-iob-ologic 30_35
 RIOB33.IOB_Y1.OFF.ZINIT_Q origin:036-iob-ologic 32_30
+RIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.DDR origin:036-iob-ologic 32_36
+RIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.SDR origin:036-iob-ologic 32_34
 RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.BUF origin:036-iob-ologic 33_61
 RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.DDR origin:036-iob-ologic 33_57
 RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.SDR origin:036-iob-ologic 32_58
diff --git a/kintex7/segbits_rioi3.db b/kintex7/segbits_rioi3.db
new file mode 100644
index 0000000..6e4dcac
--- /dev/null
+++ b/kintex7/segbits_rioi3.db
@@ -0,0 +1,40 @@
+RIOI3.IDELAY_Y0.CINVCTRL_SEL 35_89
+RIOI3.IDELAY_Y0.DELAY_SRC_DATAIN !34_72 35_69
+RIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN 34_72 !35_69
+RIOI3.IDELAY_Y0.HIGH_PERFORMANCE_MODE 32_109
+RIOI3.IDELAY_Y0.IDELAY_TYPE_FIXED !35_113 !35_119
+RIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD 35_113 35_119
+RIOI3.IDELAY_Y0.IDELAY_TYPE_VARIABLE !35_113 35_119
+RIOI3.IDELAY_Y0.IDELAY_VALUE[0] !34_120 34_122
+RIOI3.IDELAY_Y0.IDELAY_VALUE[1] !34_114 34_116
+RIOI3.IDELAY_Y0.IDELAY_VALUE[2] !34_108 34_110
+RIOI3.IDELAY_Y0.IDELAY_VALUE[3] !34_100 34_102
+RIOI3.IDELAY_Y0.IDELAY_VALUE[4] !34_94 34_96
+RIOI3.IDELAY_Y0.IS_DATAIN_INVERTED 35_81
+RIOI3.IDELAY_Y0.IS_IDATAIN_INVERTED 33_72
+RIOI3.IDELAY_Y0.PIPE_SEL 34_106
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[0] 34_120 !34_122
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[1] 34_114 !34_116
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[2] 34_108 !34_110
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[3] 34_100 !34_102
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[4] 34_94 !34_96
+RIOI3.IDELAY_Y1.CINVCTRL_SEL 34_38
+RIOI3.IDELAY_Y1.DELAY_SRC_DATAIN 34_58 !35_55
+RIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN !34_58 35_55
+RIOI3.IDELAY_Y1.HIGH_PERFORMANCE_MODE 33_18
+RIOI3.IDELAY_Y1.IDELAY_TYPE_FIXED !34_08 !34_14
+RIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD 34_08 34_14
+RIOI3.IDELAY_Y1.IDELAY_TYPE_VARIABLE 34_08 !34_14
+RIOI3.IDELAY_Y1.IDELAY_VALUE[0] 35_05 !35_07
+RIOI3.IDELAY_Y1.IDELAY_VALUE[1] 35_11 !35_13
+RIOI3.IDELAY_Y1.IDELAY_VALUE[2] 35_17 !35_19
+RIOI3.IDELAY_Y1.IDELAY_VALUE[3] 35_25 !35_27
+RIOI3.IDELAY_Y1.IDELAY_VALUE[4] 35_31 !35_33
+RIOI3.IDELAY_Y1.IS_DATAIN_INVERTED 34_46
+RIOI3.IDELAY_Y1.IS_IDATAIN_INVERTED 32_55
+RIOI3.IDELAY_Y1.PIPE_SEL 35_21
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[0] !35_05 35_07
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[1] !35_11 35_13
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[2] !35_17 35_19
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[3] !35_25 35_27
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[4] !35_31 35_33
diff --git a/kintex7/segbits_rioi3.origin_info.db b/kintex7/segbits_rioi3.origin_info.db
new file mode 100644
index 0000000..1f0460f
--- /dev/null
+++ b/kintex7/segbits_rioi3.origin_info.db
@@ -0,0 +1,40 @@
+RIOI3.IDELAY_Y0.CINVCTRL_SEL origin:035a-iob-idelay 35_89
+RIOI3.IDELAY_Y0.DELAY_SRC_DATAIN origin:035a-iob-idelay !34_72 35_69
+RIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN origin:035a-iob-idelay !35_69 34_72
+RIOI3.IDELAY_Y0.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 32_109
+RIOI3.IDELAY_Y0.IDELAY_TYPE_FIXED origin:035a-iob-idelay !35_113 !35_119
+RIOI3.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !35_113 35_119
+RIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 35_113 35_119
+RIOI3.IDELAY_Y0.IDELAY_VALUE[0] origin:035a-iob-idelay !34_120 34_122
+RIOI3.IDELAY_Y0.IDELAY_VALUE[1] origin:035a-iob-idelay !34_114 34_116
+RIOI3.IDELAY_Y0.IDELAY_VALUE[2] origin:035a-iob-idelay !34_108 34_110
+RIOI3.IDELAY_Y0.IDELAY_VALUE[3] origin:035a-iob-idelay !34_100 34_102
+RIOI3.IDELAY_Y0.IDELAY_VALUE[4] origin:035a-iob-idelay !34_94 34_96
+RIOI3.IDELAY_Y0.IS_DATAIN_INVERTED origin:035a-iob-idelay 35_81
+RIOI3.IDELAY_Y0.IS_IDATAIN_INVERTED origin:035a-iob-idelay 33_72
+RIOI3.IDELAY_Y0.PIPE_SEL origin:035a-iob-idelay 34_106
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[0] origin:035a-iob-idelay !34_122 34_120
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[1] origin:035a-iob-idelay !34_116 34_114
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[2] origin:035a-iob-idelay !34_110 34_108
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[3] origin:035a-iob-idelay !34_102 34_100
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[4] origin:035a-iob-idelay !34_96 34_94
+RIOI3.IDELAY_Y1.CINVCTRL_SEL origin:035a-iob-idelay 34_38
+RIOI3.IDELAY_Y1.DELAY_SRC_DATAIN origin:035a-iob-idelay !35_55 34_58
+RIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN origin:035a-iob-idelay !34_58 35_55
+RIOI3.IDELAY_Y1.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 33_18
+RIOI3.IDELAY_Y1.IDELAY_TYPE_FIXED origin:035a-iob-idelay !34_08 !34_14
+RIOI3.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !34_14 34_08
+RIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 34_08 34_14
+RIOI3.IDELAY_Y1.IDELAY_VALUE[0] origin:035a-iob-idelay !35_07 35_05
+RIOI3.IDELAY_Y1.IDELAY_VALUE[1] origin:035a-iob-idelay !35_13 35_11
+RIOI3.IDELAY_Y1.IDELAY_VALUE[2] origin:035a-iob-idelay !35_19 35_17
+RIOI3.IDELAY_Y1.IDELAY_VALUE[3] origin:035a-iob-idelay !35_27 35_25
+RIOI3.IDELAY_Y1.IDELAY_VALUE[4] origin:035a-iob-idelay !35_33 35_31
+RIOI3.IDELAY_Y1.IS_DATAIN_INVERTED origin:035a-iob-idelay 34_46
+RIOI3.IDELAY_Y1.IS_IDATAIN_INVERTED origin:035a-iob-idelay 32_55
+RIOI3.IDELAY_Y1.PIPE_SEL origin:035a-iob-idelay 35_21
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[0] origin:035a-iob-idelay !35_05 35_07
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[1] origin:035a-iob-idelay !35_11 35_13
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[2] origin:035a-iob-idelay !35_17 35_19
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[3] origin:035a-iob-idelay !35_25 35_27
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[4] origin:035a-iob-idelay !35_31 35_33
diff --git a/zynq7/mask_hclk_ioi.db b/zynq7/mask_hclk_ioi.db
index 77622ae..c2c57de 100644
--- a/zynq7/mask_hclk_ioi.db
+++ b/zynq7/mask_hclk_ioi.db
@@ -2,12 +2,6 @@
 bit 26_11
 bit 26_19
 bit 26_25
-bit 26_49
-bit 26_51
-bit 26_57
-bit 26_61
-bit 26_79
-bit 26_89
 bit 26_103
 bit 26_133
 bit 26_139
@@ -46,11 +40,6 @@
 bit 27_06
 bit 27_12
 bit 27_14
-bit 27_38
-bit 27_44
-bit 27_52
-bit 27_58
-bit 27_88
 bit 27_102
 bit 27_112
 bit 27_130
@@ -88,18 +77,11 @@
 bit 27_302
 bit 28_14
 bit 28_30
-bit 28_34
-bit 28_36
-bit 28_66
-bit 28_74
-bit 28_84
-bit 28_88
-bit 28_92
 bit 28_99
 bit 28_104
 bit 28_107
 bit 28_108
-bit 28_113
+bit 28_111
 bit 28_118
 bit 28_126
 bit 28_142
@@ -144,15 +126,6 @@
 bit 28_318
 bit 29_27
 bit 29_29
-bit 29_33
-bit 29_49
-bit 29_65
-bit 29_73
-bit 29_78
-bit 29_83
-bit 29_84
-bit 29_87
-bit 29_92
 bit 29_99
 bit 29_103
 bit 29_107
@@ -200,9 +173,6 @@
 bit 29_285
 bit 29_315
 bit 29_317
-bit 30_78
-bit 30_84
-bit 30_92
 bit 30_174
 bit 30_175
 bit 30_176
@@ -231,7 +201,7 @@
 bit 30_272
 bit 31_99
 bit 31_107
-bit 31_113
+bit 31_111
 bit 31_174
 bit 31_175
 bit 31_176
diff --git a/zynq7/mask_liob33.db b/zynq7/mask_liob33.db
index 208ecc1..ced83c1 100644
--- a/zynq7/mask_liob33.db
+++ b/zynq7/mask_liob33.db
@@ -2,7 +2,6 @@
 bit 00_11
 bit 00_14
 bit 00_17
-bit 00_18
 bit 00_19
 bit 00_34
 bit 00_35
@@ -32,31 +31,33 @@
 bit 01_101
 bit 01_102
 bit 01_104
-bit 02_55
 bit 02_87
+bit 03_04
 bit 03_116
-bit 05_54
+bit 05_07
 bit 05_70
 bit 05_86
 bit 05_119
 bit 06_01
 bit 06_03
 bit 06_05
+bit 06_07
+bit 06_11
 bit 06_17
+bit 06_23
 bit 06_27
 bit 06_43
 bit 06_59
-bit 06_65
+bit 06_71
+bit 06_75
 bit 06_87
 bit 06_89
 bit 06_91
 bit 06_103
 bit 06_107
-bit 06_113
 bit 06_121
 bit 06_123
 bit 07_00
-bit 07_02
 bit 07_04
 bit 07_06
 bit 07_08
@@ -70,14 +71,11 @@
 bit 07_36
 bit 07_38
 bit 07_40
-bit 07_42
 bit 07_46
 bit 07_48
 bit 07_54
 bit 07_56
-bit 07_62
 bit 07_64
-bit 07_66
 bit 07_68
 bit 07_70
 bit 07_71
@@ -87,6 +85,7 @@
 bit 07_86
 bit 07_88
 bit 07_94
+bit 07_96
 bit 07_100
 bit 07_102
 bit 07_104
@@ -99,7 +98,6 @@
 bit 08_01
 bit 08_04
 bit 08_05
-bit 08_06
 bit 08_07
 bit 08_08
 bit 08_09
@@ -110,6 +108,8 @@
 bit 08_23
 bit 08_24
 bit 08_25
+bit 08_26
+bit 08_27
 bit 08_30
 bit 08_31
 bit 08_32
@@ -119,6 +119,7 @@
 bit 08_40
 bit 08_41
 bit 08_42
+bit 08_43
 bit 08_47
 bit 08_49
 bit 08_54
@@ -131,7 +132,6 @@
 bit 08_63
 bit 08_64
 bit 08_65
-bit 08_71
 bit 08_72
 bit 08_73
 bit 08_74
@@ -140,6 +140,8 @@
 bit 08_79
 bit 08_80
 bit 08_81
+bit 08_86
+bit 08_87
 bit 08_88
 bit 08_89
 bit 08_90
@@ -159,6 +161,7 @@
 bit 08_120
 bit 08_121
 bit 08_122
+bit 08_123
 bit 08_126
 bit 08_127
 bit 09_02
@@ -167,25 +170,27 @@
 bit 09_05
 bit 09_19
 bit 09_20
+bit 09_21
 bit 09_34
 bit 09_35
 bit 09_36
 bit 09_37
+bit 09_50
 bit 09_51
 bit 09_52
 bit 09_58
+bit 09_66
 bit 09_67
 bit 09_68
 bit 09_75
 bit 09_82
 bit 09_83
 bit 09_84
+bit 09_85
 bit 09_91
-bit 09_98
 bit 09_99
 bit 09_100
 bit 09_101
-bit 09_106
 bit 09_107
 bit 09_114
 bit 09_115
@@ -197,10 +202,10 @@
 bit 10_09
 bit 10_10
 bit 10_15
+bit 10_17
 bit 10_18
 bit 10_21
 bit 10_23
-bit 10_25
 bit 10_26
 bit 10_31
 bit 10_33
@@ -224,9 +229,9 @@
 bit 10_69
 bit 10_71
 bit 10_72
-bit 10_73
 bit 10_74
 bit 10_79
+bit 10_81
 bit 10_82
 bit 10_87
 bit 10_88
@@ -236,7 +241,6 @@
 bit 10_103
 bit 10_104
 bit 10_105
-bit 10_106
 bit 10_111
 bit 10_114
 bit 10_117
@@ -252,12 +256,13 @@
 bit 11_09
 bit 11_15
 bit 11_17
+bit 11_20
+bit 11_21
 bit 11_23
 bit 11_25
 bit 11_27
 bit 11_31
 bit 11_33
-bit 11_36
 bit 11_39
 bit 11_41
 bit 11_43
@@ -265,21 +270,20 @@
 bit 11_49
 bit 11_52
 bit 11_55
+bit 11_56
 bit 11_57
 bit 11_59
 bit 11_63
 bit 11_65
 bit 11_68
-bit 11_69
 bit 11_71
+bit 11_73
 bit 11_75
 bit 11_79
 bit 11_81
 bit 11_87
-bit 11_89
 bit 11_91
 bit 11_95
-bit 11_97
 bit 11_98
 bit 11_100
 bit 11_101
@@ -295,7 +299,6 @@
 bit 11_127
 bit 12_01
 bit 12_02
-bit 12_03
 bit 12_04
 bit 12_05
 bit 12_07
@@ -303,6 +306,7 @@
 bit 12_10
 bit 12_15
 bit 12_17
+bit 12_20
 bit 12_21
 bit 12_23
 bit 12_25
@@ -310,7 +314,6 @@
 bit 12_27
 bit 12_31
 bit 12_33
-bit 12_34
 bit 12_37
 bit 12_39
 bit 12_41
@@ -318,6 +321,7 @@
 bit 12_43
 bit 12_47
 bit 12_49
+bit 12_50
 bit 12_52
 bit 12_53
 bit 12_55
@@ -326,14 +330,15 @@
 bit 12_59
 bit 12_63
 bit 12_65
-bit 12_67
 bit 12_69
 bit 12_71
 bit 12_73
+bit 12_74
 bit 12_75
 bit 12_79
 bit 12_81
 bit 12_82
+bit 12_84
 bit 12_87
 bit 12_89
 bit 12_90
@@ -350,6 +355,7 @@
 bit 12_113
 bit 12_114
 bit 12_117
+bit 12_119
 bit 12_121
 bit 12_122
 bit 12_123
@@ -359,12 +365,15 @@
 bit 13_02
 bit 13_04
 bit 13_05
+bit 13_06
 bit 13_07
 bit 13_09
 bit 13_15
 bit 13_16
 bit 13_17
 bit 13_18
+bit 13_20
+bit 13_22
 bit 13_23
 bit 13_25
 bit 13_31
@@ -382,10 +391,10 @@
 bit 13_57
 bit 13_59
 bit 13_63
-bit 13_64
 bit 13_65
 bit 13_66
 bit 13_68
+bit 13_70
 bit 13_71
 bit 13_72
 bit 13_73
@@ -399,7 +408,6 @@
 bit 13_88
 bit 13_89
 bit 13_90
-bit 13_91
 bit 13_95
 bit 13_97
 bit 13_98
@@ -412,13 +420,13 @@
 bit 13_106
 bit 13_107
 bit 13_111
-bit 13_112
 bit 13_113
 bit 13_114
 bit 13_116
 bit 13_119
 bit 13_120
 bit 13_121
+bit 13_123
 bit 13_127
 bit 14_02
 bit 14_04
@@ -500,7 +508,6 @@
 bit 16_24
 bit 16_30
 bit 16_31
-bit 16_32
 bit 16_38
 bit 16_40
 bit 16_42
@@ -552,7 +559,6 @@
 bit 17_24
 bit 17_30
 bit 17_31
-bit 17_32
 bit 17_38
 bit 17_39
 bit 17_40
@@ -564,16 +570,15 @@
 bit 17_48
 bit 17_54
 bit 17_55
-bit 17_56
 bit 17_57
 bit 17_58
 bit 17_60
 bit 17_62
 bit 17_66
 bit 17_70
-bit 17_71
 bit 17_73
 bit 17_79
+bit 17_80
 bit 17_85
 bit 17_86
 bit 17_87
@@ -604,7 +609,6 @@
 bit 18_20
 bit 18_22
 bit 18_23
-bit 18_25
 bit 18_30
 bit 18_31
 bit 18_33
@@ -619,7 +623,6 @@
 bit 18_54
 bit 18_55
 bit 18_56
-bit 18_57
 bit 18_59
 bit 18_61
 bit 18_63
@@ -670,6 +673,7 @@
 bit 19_46
 bit 19_47
 bit 19_49
+bit 19_54
 bit 19_55
 bit 19_56
 bit 19_57
@@ -734,6 +738,7 @@
 bit 20_122
 bit 20_124
 bit 20_126
+bit 21_02
 bit 21_06
 bit 21_09
 bit 21_21
@@ -773,8 +778,8 @@
 bit 22_23
 bit 22_30
 bit 22_31
-bit 22_32
 bit 22_38
+bit 22_40
 bit 22_42
 bit 22_43
 bit 22_44
@@ -782,6 +787,7 @@
 bit 22_47
 bit 22_48
 bit 22_54
+bit 22_55
 bit 22_56
 bit 22_57
 bit 22_58
@@ -804,7 +810,6 @@
 bit 22_108
 bit 22_110
 bit 22_111
-bit 22_112
 bit 22_118
 bit 22_121
 bit 22_122
@@ -839,7 +844,6 @@
 bit 23_62
 bit 23_66
 bit 23_70
-bit 23_71
 bit 23_73
 bit 23_79
 bit 23_80
@@ -849,6 +853,7 @@
 bit 23_88
 bit 23_94
 bit 23_95
+bit 23_96
 bit 23_102
 bit 23_103
 bit 23_104
@@ -950,6 +955,7 @@
 bit 25_51
 bit 25_52
 bit 25_54
+bit 25_55
 bit 25_56
 bit 25_57
 bit 25_58
diff --git a/zynq7/mask_riob33.db b/zynq7/mask_riob33.db
index 4b40dee..4333ff2 100644
--- a/zynq7/mask_riob33.db
+++ b/zynq7/mask_riob33.db
@@ -2,7 +2,6 @@
 bit 00_11
 bit 00_14
 bit 00_17
-bit 00_18
 bit 00_19
 bit 00_34
 bit 00_35
@@ -32,31 +31,33 @@
 bit 01_101
 bit 01_102
 bit 01_104
-bit 02_55
 bit 02_87
+bit 03_04
 bit 03_116
-bit 05_54
+bit 05_07
 bit 05_70
 bit 05_86
 bit 05_119
 bit 06_01
 bit 06_03
 bit 06_05
+bit 06_07
+bit 06_11
 bit 06_17
+bit 06_23
 bit 06_27
 bit 06_43
 bit 06_59
-bit 06_65
+bit 06_71
+bit 06_75
 bit 06_87
 bit 06_89
 bit 06_91
 bit 06_103
 bit 06_107
-bit 06_113
 bit 06_121
 bit 06_123
 bit 07_00
-bit 07_02
 bit 07_04
 bit 07_06
 bit 07_08
@@ -70,14 +71,11 @@
 bit 07_36
 bit 07_38
 bit 07_40
-bit 07_42
 bit 07_46
 bit 07_48
 bit 07_54
 bit 07_56
-bit 07_62
 bit 07_64
-bit 07_66
 bit 07_68
 bit 07_70
 bit 07_71
@@ -87,6 +85,7 @@
 bit 07_86
 bit 07_88
 bit 07_94
+bit 07_96
 bit 07_100
 bit 07_102
 bit 07_104
@@ -99,7 +98,6 @@
 bit 08_01
 bit 08_04
 bit 08_05
-bit 08_06
 bit 08_07
 bit 08_08
 bit 08_09
@@ -110,6 +108,8 @@
 bit 08_23
 bit 08_24
 bit 08_25
+bit 08_26
+bit 08_27
 bit 08_30
 bit 08_31
 bit 08_32
@@ -119,6 +119,7 @@
 bit 08_40
 bit 08_41
 bit 08_42
+bit 08_43
 bit 08_47
 bit 08_49
 bit 08_54
@@ -131,7 +132,6 @@
 bit 08_63
 bit 08_64
 bit 08_65
-bit 08_71
 bit 08_72
 bit 08_73
 bit 08_74
@@ -140,6 +140,8 @@
 bit 08_79
 bit 08_80
 bit 08_81
+bit 08_86
+bit 08_87
 bit 08_88
 bit 08_89
 bit 08_90
@@ -159,6 +161,7 @@
 bit 08_120
 bit 08_121
 bit 08_122
+bit 08_123
 bit 08_126
 bit 08_127
 bit 09_02
@@ -167,25 +170,27 @@
 bit 09_05
 bit 09_19
 bit 09_20
+bit 09_21
 bit 09_34
 bit 09_35
 bit 09_36
 bit 09_37
+bit 09_50
 bit 09_51
 bit 09_52
 bit 09_58
+bit 09_66
 bit 09_67
 bit 09_68
 bit 09_75
 bit 09_82
 bit 09_83
 bit 09_84
+bit 09_85
 bit 09_91
-bit 09_98
 bit 09_99
 bit 09_100
 bit 09_101
-bit 09_106
 bit 09_107
 bit 09_114
 bit 09_115
@@ -197,10 +202,10 @@
 bit 10_09
 bit 10_10
 bit 10_15
+bit 10_17
 bit 10_18
 bit 10_21
 bit 10_23
-bit 10_25
 bit 10_26
 bit 10_31
 bit 10_33
@@ -224,9 +229,9 @@
 bit 10_69
 bit 10_71
 bit 10_72
-bit 10_73
 bit 10_74
 bit 10_79
+bit 10_81
 bit 10_82
 bit 10_87
 bit 10_88
@@ -236,7 +241,6 @@
 bit 10_103
 bit 10_104
 bit 10_105
-bit 10_106
 bit 10_111
 bit 10_114
 bit 10_117
@@ -252,12 +256,13 @@
 bit 11_09
 bit 11_15
 bit 11_17
+bit 11_20
+bit 11_21
 bit 11_23
 bit 11_25
 bit 11_27
 bit 11_31
 bit 11_33
-bit 11_36
 bit 11_39
 bit 11_41
 bit 11_43
@@ -265,21 +270,20 @@
 bit 11_49
 bit 11_52
 bit 11_55
+bit 11_56
 bit 11_57
 bit 11_59
 bit 11_63
 bit 11_65
 bit 11_68
-bit 11_69
 bit 11_71
+bit 11_73
 bit 11_75
 bit 11_79
 bit 11_81
 bit 11_87
-bit 11_89
 bit 11_91
 bit 11_95
-bit 11_97
 bit 11_98
 bit 11_100
 bit 11_101
@@ -295,7 +299,6 @@
 bit 11_127
 bit 12_01
 bit 12_02
-bit 12_03
 bit 12_04
 bit 12_05
 bit 12_07
@@ -303,6 +306,7 @@
 bit 12_10
 bit 12_15
 bit 12_17
+bit 12_20
 bit 12_21
 bit 12_23
 bit 12_25
@@ -310,7 +314,6 @@
 bit 12_27
 bit 12_31
 bit 12_33
-bit 12_34
 bit 12_37
 bit 12_39
 bit 12_41
@@ -318,6 +321,7 @@
 bit 12_43
 bit 12_47
 bit 12_49
+bit 12_50
 bit 12_52
 bit 12_53
 bit 12_55
@@ -326,14 +330,15 @@
 bit 12_59
 bit 12_63
 bit 12_65
-bit 12_67
 bit 12_69
 bit 12_71
 bit 12_73
+bit 12_74
 bit 12_75
 bit 12_79
 bit 12_81
 bit 12_82
+bit 12_84
 bit 12_87
 bit 12_89
 bit 12_90
@@ -350,6 +355,7 @@
 bit 12_113
 bit 12_114
 bit 12_117
+bit 12_119
 bit 12_121
 bit 12_122
 bit 12_123
@@ -359,12 +365,15 @@
 bit 13_02
 bit 13_04
 bit 13_05
+bit 13_06
 bit 13_07
 bit 13_09
 bit 13_15
 bit 13_16
 bit 13_17
 bit 13_18
+bit 13_20
+bit 13_22
 bit 13_23
 bit 13_25
 bit 13_31
@@ -382,10 +391,10 @@
 bit 13_57
 bit 13_59
 bit 13_63
-bit 13_64
 bit 13_65
 bit 13_66
 bit 13_68
+bit 13_70
 bit 13_71
 bit 13_72
 bit 13_73
@@ -399,7 +408,6 @@
 bit 13_88
 bit 13_89
 bit 13_90
-bit 13_91
 bit 13_95
 bit 13_97
 bit 13_98
@@ -412,13 +420,13 @@
 bit 13_106
 bit 13_107
 bit 13_111
-bit 13_112
 bit 13_113
 bit 13_114
 bit 13_116
 bit 13_119
 bit 13_120
 bit 13_121
+bit 13_123
 bit 13_127
 bit 14_02
 bit 14_04
@@ -500,7 +508,6 @@
 bit 16_24
 bit 16_30
 bit 16_31
-bit 16_32
 bit 16_38
 bit 16_40
 bit 16_42
@@ -552,7 +559,6 @@
 bit 17_24
 bit 17_30
 bit 17_31
-bit 17_32
 bit 17_38
 bit 17_39
 bit 17_40
@@ -564,16 +570,15 @@
 bit 17_48
 bit 17_54
 bit 17_55
-bit 17_56
 bit 17_57
 bit 17_58
 bit 17_60
 bit 17_62
 bit 17_66
 bit 17_70
-bit 17_71
 bit 17_73
 bit 17_79
+bit 17_80
 bit 17_85
 bit 17_86
 bit 17_87
@@ -604,7 +609,6 @@
 bit 18_20
 bit 18_22
 bit 18_23
-bit 18_25
 bit 18_30
 bit 18_31
 bit 18_33
@@ -619,7 +623,6 @@
 bit 18_54
 bit 18_55
 bit 18_56
-bit 18_57
 bit 18_59
 bit 18_61
 bit 18_63
@@ -670,6 +673,7 @@
 bit 19_46
 bit 19_47
 bit 19_49
+bit 19_54
 bit 19_55
 bit 19_56
 bit 19_57
@@ -734,6 +738,7 @@
 bit 20_122
 bit 20_124
 bit 20_126
+bit 21_02
 bit 21_06
 bit 21_09
 bit 21_21
@@ -773,8 +778,8 @@
 bit 22_23
 bit 22_30
 bit 22_31
-bit 22_32
 bit 22_38
+bit 22_40
 bit 22_42
 bit 22_43
 bit 22_44
@@ -782,6 +787,7 @@
 bit 22_47
 bit 22_48
 bit 22_54
+bit 22_55
 bit 22_56
 bit 22_57
 bit 22_58
@@ -804,7 +810,6 @@
 bit 22_108
 bit 22_110
 bit 22_111
-bit 22_112
 bit 22_118
 bit 22_121
 bit 22_122
@@ -839,7 +844,6 @@
 bit 23_62
 bit 23_66
 bit 23_70
-bit 23_71
 bit 23_73
 bit 23_79
 bit 23_80
@@ -849,6 +853,7 @@
 bit 23_88
 bit 23_94
 bit 23_95
+bit 23_96
 bit 23_102
 bit 23_103
 bit 23_104
@@ -950,6 +955,7 @@
 bit 25_51
 bit 25_52
 bit 25_54
+bit 25_55
 bit 25_56
 bit 25_57
 bit 25_58
diff --git a/zynq7/segbits_int_l.origin_info.db b/zynq7/segbits_int_l.origin_info.db
index 961e46c..c1e47f8 100644
--- a/zynq7/segbits_int_l.origin_info.db
+++ b/zynq7/segbits_int_l.origin_info.db
@@ -353,7 +353,7 @@
 INT_L.EE4BEG0.SS2END0 origin:050-pip-seed 03_08 05_11
 INT_L.EE4BEG0.SS6END0 origin:050-pip-seed 05_11 06_08
 INT_L.EE4BEG0.SW2END0 origin:050-pip-seed 02_09 05_11
-INT_L.EE4BEG0.SW6END0 origin:050-pip-seed 05_08 05_11
+INT_L.EE4BEG0.SW6END0 origin:056-pip-rem 05_08 05_11
 INT_L.EE4BEG1.EE2END1 origin:050-pip-seed 03_24 03_25
 INT_L.EE4BEG1.EE4END1 origin:050-pip-seed 03_25 05_24
 INT_L.EE4BEG1.LH6 origin:056-pip-rem 05_24 07_25
@@ -373,7 +373,7 @@
 INT_L.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27
 INT_L.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24
 INT_L.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27
-INT_L.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27
+INT_L.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27
 INT_L.EE4BEG2.EE2END2 origin:050-pip-seed 03_40 03_41
 INT_L.EE4BEG2.EE4END2 origin:050-pip-seed 03_41 05_40
 INT_L.EE4BEG2.LOGIC_OUTS_L10 origin:050-pip-seed 03_40 07_41
@@ -413,7 +413,7 @@
 INT_L.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
 INT_L.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
 INT_L.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
-INT_L.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
+INT_L.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
 INT_L.EL1BEG0.EE2END1 origin:050-pip-seed 07_20 15_21
 INT_L.EL1BEG0.EE4END1 origin:050-pip-seed 07_20 12_21
 INT_L.EL1BEG0.EL1END1 origin:050-pip-seed 11_21 13_21
@@ -651,7 +651,7 @@
 INT_L.FAN_ALT3.EE2END3 origin:050-pip-seed !22_56 !23_56 !24_56 16_56 25_56
 INT_L.FAN_ALT3.EL1END3 origin:050-pip-seed !22_56 16_56 23_56 24_56 25_56
 INT_L.FAN_ALT3.ER1END3 origin:050-pip-seed !23_56 17_56 22_56 24_56 25_56
-INT_L.FAN_ALT3.FAN_BOUNCE_S3_0 origin:050-pip-seed !22_56 20_56 23_56 24_56 25_56
+INT_L.FAN_ALT3.FAN_BOUNCE_S3_0 origin:056-pip-rem !22_56 20_56 23_56 24_56 25_56
 INT_L.FAN_ALT3.FAN_BOUNCE_S3_2 origin:050-pip-seed !23_56 20_56 22_56 24_56 25_56
 INT_L.FAN_ALT3.GFAN1 origin:054-pip-fan-alt !22_56 !23_56 !24_56 21_56 25_56
 INT_L.FAN_ALT3.LOGIC_OUTS_L15 origin:050-pip-seed !22_56 21_56 23_56 24_56 25_56
@@ -2193,7 +2193,7 @@
 INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
 INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
 INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
-INT_L.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
+INT_L.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
 INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17
 INT_L.NL1BEG0.LOGIC_OUTS_L13 origin:050-pip-seed 10_17 14_17
 INT_L.NL1BEG0.LOGIC_OUTS_L19 origin:050-pip-seed 08_17 14_17
@@ -2411,7 +2411,7 @@
 INT_L.NN6BEG2.NW2END2 origin:050-pip-seed 03_38 04_36
 INT_L.NN6BEG2.NW6END2 origin:050-pip-seed 04_36 07_39
 INT_L.NN6BEG2.SE2END2 origin:050-pip-seed 03_38 05_38
-INT_L.NN6BEG2.SE6END2 origin:050-pip-seed 05_38 07_39
+INT_L.NN6BEG2.SE6END2 origin:056-pip-rem 05_38 07_39
 INT_L.NN6BEG2.WW2END1 origin:050-pip-seed 02_39 04_36
 INT_L.NN6BEG2.WW4END2 origin:050-pip-seed 04_36 04_39
 INT_L.NN6BEG3.EE2END3 origin:050-pip-seed 02_55 05_54
@@ -3255,7 +3255,7 @@
 INT_L.SW6BEG0.WW2END0 origin:050-pip-seed 03_12 05_15
 INT_L.SW6BEG0.WW4END1 origin:050-pip-seed 05_12 05_15
 INT_L.SW6BEG1.EE2END1 origin:050-pip-seed 03_28 04_29
-INT_L.SW6BEG1.EE4END1 origin:056-pip-rem 04_29 05_28
+INT_L.SW6BEG1.EE4END1 origin:050-pip-seed 04_29 05_28
 INT_L.SW6BEG1.LH6 origin:056-pip-rem 05_28 07_29
 INT_L.SW6BEG1.LOGIC_OUTS_L1 origin:050-pip-seed 02_29 04_30
 INT_L.SW6BEG1.LOGIC_OUTS_L13 origin:050-pip-seed 03_28 04_30
@@ -3275,7 +3275,7 @@
 INT_L.SW6BEG1.WW2END1 origin:050-pip-seed 03_28 05_31
 INT_L.SW6BEG1.WW4END2 origin:050-pip-seed 05_28 05_31
 INT_L.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
-INT_L.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
+INT_L.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
 INT_L.SW6BEG2.LOGIC_OUTS_L10 origin:050-pip-seed 03_44 04_46
 INT_L.SW6BEG2.LOGIC_OUTS_L14 origin:050-pip-seed 03_44 07_45
 INT_L.SW6BEG2.LOGIC_OUTS_L16 origin:050-pip-seed 04_46 06_44
diff --git a/zynq7/segbits_int_r.origin_info.db b/zynq7/segbits_int_r.origin_info.db
index 45b28a0..dcad677 100644
--- a/zynq7/segbits_int_r.origin_info.db
+++ b/zynq7/segbits_int_r.origin_info.db
@@ -172,7 +172,7 @@
 INT_R.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63
 INT_R.BYP_ALT7.ER1END3 origin:050-pip-seed !22_63 16_63 23_63 24_63 25_63
 INT_R.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63
-INT_R.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63
+INT_R.BYP_ALT7.FAN_BOUNCE_S3_6 origin:056-pip-rem !22_63 21_63 23_63 24_63 25_63
 INT_R.BYP_ALT7.GFAN1 origin:054-pip-fan-alt !22_63 !23_63 !25_63 20_63 24_63
 INT_R.BYP_ALT7.LOGIC_OUTS15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63
 INT_R.BYP_ALT7.LOGIC_OUTS21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63
@@ -373,7 +373,7 @@
 INT_R.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27
 INT_R.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24
 INT_R.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27
-INT_R.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27
+INT_R.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27
 INT_R.EE4BEG2.EE2END2 origin:050-pip-seed 03_40 03_41
 INT_R.EE4BEG2.EE4END2 origin:050-pip-seed 03_41 05_40
 INT_R.EE4BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_40 07_41
@@ -393,7 +393,7 @@
 INT_R.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
 INT_R.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
 INT_R.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
-INT_R.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
+INT_R.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43
 INT_R.EE4BEG3.EE2END3 origin:050-pip-seed 03_56 03_57
 INT_R.EE4BEG3.EE4END3 origin:050-pip-seed 03_57 05_56
 INT_R.EE4BEG3.LH0 origin:056-pip-rem 04_58 05_56
@@ -413,7 +413,7 @@
 INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
 INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
 INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
-INT_R.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
+INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
 INT_R.EL1BEG0.EE2END1 origin:050-pip-seed 07_20 15_21
 INT_R.EL1BEG0.EE4END1 origin:050-pip-seed 07_20 12_21
 INT_R.EL1BEG0.EL1END1 origin:050-pip-seed 11_21 13_21
@@ -3603,7 +3603,7 @@
 INT_R.WW4BEG2.LVB0 origin:056-pip-rem 04_34 05_32
 INT_R.WW4BEG2.LVB12 origin:056-pip-rem 05_32 07_33
 INT_R.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
-INT_R.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
+INT_R.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
 INT_R.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
 INT_R.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
 INT_R.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
diff --git a/zynq7/segbits_liob33.db b/zynq7/segbits_liob33.db
index e8fc88d..57ce3a3 100644
--- a/zynq7/segbits_liob33.db
+++ b/zynq7/segbits_liob33.db
@@ -22,6 +22,8 @@
 LIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE !31_92
 LIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE 31_92
 LIOB33.IOB_Y0.OFF.ZINIT_Q 33_97
+LIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.DDR 33_91
+LIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.SDR 33_93
 LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.BUF 32_66
 LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.DDR 32_70
 LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.SDR 33_69
@@ -60,6 +62,8 @@
 LIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE !30_35
 LIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE 30_35
 LIOB33.IOB_Y1.OFF.ZINIT_Q 32_30
+LIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.DDR 32_36
+LIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.SDR 32_34
 LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.BUF 33_61
 LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.DDR 33_57
 LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.SDR 32_58
diff --git a/zynq7/segbits_liob33.origin_info.db b/zynq7/segbits_liob33.origin_info.db
index 5b5dbe0..b99d303 100644
--- a/zynq7/segbits_liob33.origin_info.db
+++ b/zynq7/segbits_liob33.origin_info.db
@@ -24,6 +24,8 @@
 LIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE origin:036-iob-ologic !31_92
 LIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE origin:036-iob-ologic 31_92
 LIOB33.IOB_Y0.OFF.ZINIT_Q origin:036-iob-ologic 33_97
+LIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.DDR origin:036-iob-ologic 33_91
+LIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.SDR origin:036-iob-ologic 33_93
 LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.BUF origin:036-iob-ologic 32_66
 LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.DDR origin:036-iob-ologic 32_70
 LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.SDR origin:036-iob-ologic 33_69
@@ -62,6 +64,8 @@
 LIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE origin:036-iob-ologic !30_35
 LIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE origin:036-iob-ologic 30_35
 LIOB33.IOB_Y1.OFF.ZINIT_Q origin:036-iob-ologic 32_30
+LIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.DDR origin:036-iob-ologic 32_36
+LIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.SDR origin:036-iob-ologic 32_34
 LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.BUF origin:036-iob-ologic 33_61
 LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.DDR origin:036-iob-ologic 33_57
 LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.SDR origin:036-iob-ologic 32_58
diff --git a/zynq7/segbits_lioi3.db b/zynq7/segbits_lioi3.db
index fa685e6..ec2ad75 100644
--- a/zynq7/segbits_lioi3.db
+++ b/zynq7/segbits_lioi3.db
@@ -1,26 +1,40 @@
 LIOI3.IDELAY_Y0.CINVCTRL_SEL 35_89
-LIOI3.IDELAY_Y0.DELAY_SRC_DATAIN 35_69
-LIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN 34_72
+LIOI3.IDELAY_Y0.DELAY_SRC_DATAIN !34_72 35_69
+LIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN 34_72 !35_69
 LIOI3.IDELAY_Y0.HIGH_PERFORMANCE_MODE 32_109
-LIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD 35_113
-LIOI3.IDELAY_Y0.IDELAY_VALUE[0] 34_122
-LIOI3.IDELAY_Y0.IDELAY_VALUE[1] 34_116
-LIOI3.IDELAY_Y0.IDELAY_VALUE[2] 34_110
-LIOI3.IDELAY_Y0.IDELAY_VALUE[3] 34_102
-LIOI3.IDELAY_Y0.IDELAY_VALUE[4] 34_96
+LIOI3.IDELAY_Y0.IDELAY_TYPE_FIXED !35_113 !35_119
+LIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD 35_113 35_119
+LIOI3.IDELAY_Y0.IDELAY_TYPE_VARIABLE !35_113 35_119
+LIOI3.IDELAY_Y0.IDELAY_VALUE[0] !34_120 34_122
+LIOI3.IDELAY_Y0.IDELAY_VALUE[1] !34_114 34_116
+LIOI3.IDELAY_Y0.IDELAY_VALUE[2] !34_108 34_110
+LIOI3.IDELAY_Y0.IDELAY_VALUE[3] !34_100 34_102
+LIOI3.IDELAY_Y0.IDELAY_VALUE[4] !34_94 34_96
 LIOI3.IDELAY_Y0.IS_DATAIN_INVERTED 35_81
 LIOI3.IDELAY_Y0.IS_IDATAIN_INVERTED 33_72
 LIOI3.IDELAY_Y0.PIPE_SEL 34_106
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[0] 34_120 !34_122
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[1] 34_114 !34_116
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[2] 34_108 !34_110
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[3] 34_100 !34_102
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[4] 34_94 !34_96
 LIOI3.IDELAY_Y1.CINVCTRL_SEL 34_38
-LIOI3.IDELAY_Y1.DELAY_SRC_DATAIN 34_58
-LIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN 35_55
+LIOI3.IDELAY_Y1.DELAY_SRC_DATAIN 34_58 !35_55
+LIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN !34_58 35_55
 LIOI3.IDELAY_Y1.HIGH_PERFORMANCE_MODE 33_18
-LIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD 34_14
-LIOI3.IDELAY_Y1.IDELAY_VALUE[0] 35_05
-LIOI3.IDELAY_Y1.IDELAY_VALUE[1] 35_11
-LIOI3.IDELAY_Y1.IDELAY_VALUE[2] 35_17
-LIOI3.IDELAY_Y1.IDELAY_VALUE[3] 35_25
-LIOI3.IDELAY_Y1.IDELAY_VALUE[4] 35_31
+LIOI3.IDELAY_Y1.IDELAY_TYPE_FIXED !34_08 !34_14
+LIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD 34_08 34_14
+LIOI3.IDELAY_Y1.IDELAY_TYPE_VARIABLE 34_08 !34_14
+LIOI3.IDELAY_Y1.IDELAY_VALUE[0] 35_05 !35_07
+LIOI3.IDELAY_Y1.IDELAY_VALUE[1] 35_11 !35_13
+LIOI3.IDELAY_Y1.IDELAY_VALUE[2] 35_17 !35_19
+LIOI3.IDELAY_Y1.IDELAY_VALUE[3] 35_25 !35_27
+LIOI3.IDELAY_Y1.IDELAY_VALUE[4] 35_31 !35_33
 LIOI3.IDELAY_Y1.IS_DATAIN_INVERTED 34_46
 LIOI3.IDELAY_Y1.IS_IDATAIN_INVERTED 32_55
 LIOI3.IDELAY_Y1.PIPE_SEL 35_21
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[0] !35_05 35_07
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[1] !35_11 35_13
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[2] !35_17 35_19
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[3] !35_25 35_27
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[4] !35_31 35_33
diff --git a/zynq7/segbits_lioi3.origin_info.db b/zynq7/segbits_lioi3.origin_info.db
index 7227b82..d69e673 100644
--- a/zynq7/segbits_lioi3.origin_info.db
+++ b/zynq7/segbits_lioi3.origin_info.db
@@ -1,26 +1,40 @@
 LIOI3.IDELAY_Y0.CINVCTRL_SEL origin:035a-iob-idelay 35_89
-LIOI3.IDELAY_Y0.DELAY_SRC_DATAIN origin:035a-iob-idelay 35_69
-LIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN origin:035a-iob-idelay 34_72
+LIOI3.IDELAY_Y0.DELAY_SRC_DATAIN origin:035a-iob-idelay !34_72 35_69
+LIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN origin:035a-iob-idelay !35_69 34_72
 LIOI3.IDELAY_Y0.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 32_109
-LIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 35_113
-LIOI3.IDELAY_Y0.IDELAY_VALUE[0] origin:035a-iob-idelay 34_122
-LIOI3.IDELAY_Y0.IDELAY_VALUE[1] origin:035a-iob-idelay 34_116
-LIOI3.IDELAY_Y0.IDELAY_VALUE[2] origin:035a-iob-idelay 34_110
-LIOI3.IDELAY_Y0.IDELAY_VALUE[3] origin:035a-iob-idelay 34_102
-LIOI3.IDELAY_Y0.IDELAY_VALUE[4] origin:035a-iob-idelay 34_96
+LIOI3.IDELAY_Y0.IDELAY_TYPE_FIXED origin:035a-iob-idelay !35_113 !35_119
+LIOI3.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !35_113 35_119
+LIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 35_113 35_119
+LIOI3.IDELAY_Y0.IDELAY_VALUE[0] origin:035a-iob-idelay !34_120 34_122
+LIOI3.IDELAY_Y0.IDELAY_VALUE[1] origin:035a-iob-idelay !34_114 34_116
+LIOI3.IDELAY_Y0.IDELAY_VALUE[2] origin:035a-iob-idelay !34_108 34_110
+LIOI3.IDELAY_Y0.IDELAY_VALUE[3] origin:035a-iob-idelay !34_100 34_102
+LIOI3.IDELAY_Y0.IDELAY_VALUE[4] origin:035a-iob-idelay !34_94 34_96
 LIOI3.IDELAY_Y0.IS_DATAIN_INVERTED origin:035a-iob-idelay 35_81
 LIOI3.IDELAY_Y0.IS_IDATAIN_INVERTED origin:035a-iob-idelay 33_72
 LIOI3.IDELAY_Y0.PIPE_SEL origin:035a-iob-idelay 34_106
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[0] origin:035a-iob-idelay !34_122 34_120
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[1] origin:035a-iob-idelay !34_116 34_114
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[2] origin:035a-iob-idelay !34_110 34_108
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[3] origin:035a-iob-idelay !34_102 34_100
+LIOI3.IDELAY_Y0.ZIDELAY_VALUE[4] origin:035a-iob-idelay !34_96 34_94
 LIOI3.IDELAY_Y1.CINVCTRL_SEL origin:035a-iob-idelay 34_38
-LIOI3.IDELAY_Y1.DELAY_SRC_DATAIN origin:035a-iob-idelay 34_58
-LIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN origin:035a-iob-idelay 35_55
+LIOI3.IDELAY_Y1.DELAY_SRC_DATAIN origin:035a-iob-idelay !35_55 34_58
+LIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN origin:035a-iob-idelay !34_58 35_55
 LIOI3.IDELAY_Y1.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 33_18
-LIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 34_14
-LIOI3.IDELAY_Y1.IDELAY_VALUE[0] origin:035a-iob-idelay 35_05
-LIOI3.IDELAY_Y1.IDELAY_VALUE[1] origin:035a-iob-idelay 35_11
-LIOI3.IDELAY_Y1.IDELAY_VALUE[2] origin:035a-iob-idelay 35_17
-LIOI3.IDELAY_Y1.IDELAY_VALUE[3] origin:035a-iob-idelay 35_25
-LIOI3.IDELAY_Y1.IDELAY_VALUE[4] origin:035a-iob-idelay 35_31
+LIOI3.IDELAY_Y1.IDELAY_TYPE_FIXED origin:035a-iob-idelay !34_08 !34_14
+LIOI3.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !34_14 34_08
+LIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 34_08 34_14
+LIOI3.IDELAY_Y1.IDELAY_VALUE[0] origin:035a-iob-idelay !35_07 35_05
+LIOI3.IDELAY_Y1.IDELAY_VALUE[1] origin:035a-iob-idelay !35_13 35_11
+LIOI3.IDELAY_Y1.IDELAY_VALUE[2] origin:035a-iob-idelay !35_19 35_17
+LIOI3.IDELAY_Y1.IDELAY_VALUE[3] origin:035a-iob-idelay !35_27 35_25
+LIOI3.IDELAY_Y1.IDELAY_VALUE[4] origin:035a-iob-idelay !35_33 35_31
 LIOI3.IDELAY_Y1.IS_DATAIN_INVERTED origin:035a-iob-idelay 34_46
 LIOI3.IDELAY_Y1.IS_IDATAIN_INVERTED origin:035a-iob-idelay 32_55
 LIOI3.IDELAY_Y1.PIPE_SEL origin:035a-iob-idelay 35_21
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[0] origin:035a-iob-idelay !35_05 35_07
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[1] origin:035a-iob-idelay !35_11 35_13
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[2] origin:035a-iob-idelay !35_17 35_19
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[3] origin:035a-iob-idelay !35_25 35_27
+LIOI3.IDELAY_Y1.ZIDELAY_VALUE[4] origin:035a-iob-idelay !35_31 35_33
diff --git a/zynq7/segbits_riob33.db b/zynq7/segbits_riob33.db
index a046b59..0ae85bb 100644
--- a/zynq7/segbits_riob33.db
+++ b/zynq7/segbits_riob33.db
@@ -27,6 +27,8 @@
 RIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE !31_92
 RIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE 31_92
 RIOB33.IOB_Y0.OFF.ZINIT_Q 33_97
+RIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.DDR 33_91
+RIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.SDR 33_93
 RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.BUF 32_66
 RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.DDR 32_70
 RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.SDR 33_69
@@ -96,6 +98,8 @@
 RIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE !30_35
 RIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE 30_35
 RIOB33.IOB_Y1.OFF.ZINIT_Q 32_30
+RIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.DDR 32_36
+RIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.SDR 32_34
 RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.BUF 33_61
 RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.DDR 33_57
 RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.SDR 32_58
diff --git a/zynq7/segbits_riob33.origin_info.db b/zynq7/segbits_riob33.origin_info.db
index 20af015..b28dfd3 100644
--- a/zynq7/segbits_riob33.origin_info.db
+++ b/zynq7/segbits_riob33.origin_info.db
@@ -49,6 +49,8 @@
 RIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE origin:036-iob-ologic !31_92
 RIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE origin:036-iob-ologic 31_92
 RIOB33.IOB_Y0.OFF.ZINIT_Q origin:036-iob-ologic 33_97
+RIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.DDR origin:036-iob-ologic 33_91
+RIOB33.IOB_Y0.OSERDESE.DATA_RATE_OQ.SDR origin:036-iob-ologic 33_93
 RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.BUF origin:036-iob-ologic 32_66
 RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.DDR origin:036-iob-ologic 32_70
 RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.SDR origin:036-iob-ologic 33_69
@@ -118,6 +120,8 @@
 RIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE origin:036-iob-ologic !30_35
 RIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE origin:036-iob-ologic 30_35
 RIOB33.IOB_Y1.OFF.ZINIT_Q origin:036-iob-ologic 32_30
+RIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.DDR origin:036-iob-ologic 32_36
+RIOB33.IOB_Y1.OSERDESE.DATA_RATE_OQ.SDR origin:036-iob-ologic 32_34
 RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.BUF origin:036-iob-ologic 33_61
 RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.DDR origin:036-iob-ologic 33_57
 RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.SDR origin:036-iob-ologic 32_58
diff --git a/zynq7/segbits_rioi3.db b/zynq7/segbits_rioi3.db
index 3a14a05..6e4dcac 100644
--- a/zynq7/segbits_rioi3.db
+++ b/zynq7/segbits_rioi3.db
@@ -1,26 +1,40 @@
 RIOI3.IDELAY_Y0.CINVCTRL_SEL 35_89
-RIOI3.IDELAY_Y0.DELAY_SRC_DATAIN 35_69
-RIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN 34_72
+RIOI3.IDELAY_Y0.DELAY_SRC_DATAIN !34_72 35_69
+RIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN 34_72 !35_69
 RIOI3.IDELAY_Y0.HIGH_PERFORMANCE_MODE 32_109
-RIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD 35_113
-RIOI3.IDELAY_Y0.IDELAY_VALUE[0] 34_122
-RIOI3.IDELAY_Y0.IDELAY_VALUE[1] 34_116
-RIOI3.IDELAY_Y0.IDELAY_VALUE[2] 34_110
-RIOI3.IDELAY_Y0.IDELAY_VALUE[3] 34_102
-RIOI3.IDELAY_Y0.IDELAY_VALUE[4] 34_96
+RIOI3.IDELAY_Y0.IDELAY_TYPE_FIXED !35_113 !35_119
+RIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD 35_113 35_119
+RIOI3.IDELAY_Y0.IDELAY_TYPE_VARIABLE !35_113 35_119
+RIOI3.IDELAY_Y0.IDELAY_VALUE[0] !34_120 34_122
+RIOI3.IDELAY_Y0.IDELAY_VALUE[1] !34_114 34_116
+RIOI3.IDELAY_Y0.IDELAY_VALUE[2] !34_108 34_110
+RIOI3.IDELAY_Y0.IDELAY_VALUE[3] !34_100 34_102
+RIOI3.IDELAY_Y0.IDELAY_VALUE[4] !34_94 34_96
 RIOI3.IDELAY_Y0.IS_DATAIN_INVERTED 35_81
 RIOI3.IDELAY_Y0.IS_IDATAIN_INVERTED 33_72
 RIOI3.IDELAY_Y0.PIPE_SEL 34_106
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[0] 34_120 !34_122
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[1] 34_114 !34_116
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[2] 34_108 !34_110
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[3] 34_100 !34_102
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[4] 34_94 !34_96
 RIOI3.IDELAY_Y1.CINVCTRL_SEL 34_38
-RIOI3.IDELAY_Y1.DELAY_SRC_DATAIN 34_58
-RIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN 35_55
+RIOI3.IDELAY_Y1.DELAY_SRC_DATAIN 34_58 !35_55
+RIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN !34_58 35_55
 RIOI3.IDELAY_Y1.HIGH_PERFORMANCE_MODE 33_18
-RIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD 34_14
-RIOI3.IDELAY_Y1.IDELAY_VALUE[0] 35_05
-RIOI3.IDELAY_Y1.IDELAY_VALUE[1] 35_11
-RIOI3.IDELAY_Y1.IDELAY_VALUE[2] 35_17
-RIOI3.IDELAY_Y1.IDELAY_VALUE[3] 35_25
-RIOI3.IDELAY_Y1.IDELAY_VALUE[4] 35_31
+RIOI3.IDELAY_Y1.IDELAY_TYPE_FIXED !34_08 !34_14
+RIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD 34_08 34_14
+RIOI3.IDELAY_Y1.IDELAY_TYPE_VARIABLE 34_08 !34_14
+RIOI3.IDELAY_Y1.IDELAY_VALUE[0] 35_05 !35_07
+RIOI3.IDELAY_Y1.IDELAY_VALUE[1] 35_11 !35_13
+RIOI3.IDELAY_Y1.IDELAY_VALUE[2] 35_17 !35_19
+RIOI3.IDELAY_Y1.IDELAY_VALUE[3] 35_25 !35_27
+RIOI3.IDELAY_Y1.IDELAY_VALUE[4] 35_31 !35_33
 RIOI3.IDELAY_Y1.IS_DATAIN_INVERTED 34_46
 RIOI3.IDELAY_Y1.IS_IDATAIN_INVERTED 32_55
 RIOI3.IDELAY_Y1.PIPE_SEL 35_21
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[0] !35_05 35_07
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[1] !35_11 35_13
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[2] !35_17 35_19
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[3] !35_25 35_27
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[4] !35_31 35_33
diff --git a/zynq7/segbits_rioi3.origin_info.db b/zynq7/segbits_rioi3.origin_info.db
index b2f1985..1f0460f 100644
--- a/zynq7/segbits_rioi3.origin_info.db
+++ b/zynq7/segbits_rioi3.origin_info.db
@@ -1,26 +1,40 @@
 RIOI3.IDELAY_Y0.CINVCTRL_SEL origin:035a-iob-idelay 35_89
-RIOI3.IDELAY_Y0.DELAY_SRC_DATAIN origin:035a-iob-idelay 35_69
-RIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN origin:035a-iob-idelay 34_72
+RIOI3.IDELAY_Y0.DELAY_SRC_DATAIN origin:035a-iob-idelay !34_72 35_69
+RIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN origin:035a-iob-idelay !35_69 34_72
 RIOI3.IDELAY_Y0.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 32_109
-RIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 35_113
-RIOI3.IDELAY_Y0.IDELAY_VALUE[0] origin:035a-iob-idelay 34_122
-RIOI3.IDELAY_Y0.IDELAY_VALUE[1] origin:035a-iob-idelay 34_116
-RIOI3.IDELAY_Y0.IDELAY_VALUE[2] origin:035a-iob-idelay 34_110
-RIOI3.IDELAY_Y0.IDELAY_VALUE[3] origin:035a-iob-idelay 34_102
-RIOI3.IDELAY_Y0.IDELAY_VALUE[4] origin:035a-iob-idelay 34_96
+RIOI3.IDELAY_Y0.IDELAY_TYPE_FIXED origin:035a-iob-idelay !35_113 !35_119
+RIOI3.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !35_113 35_119
+RIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 35_113 35_119
+RIOI3.IDELAY_Y0.IDELAY_VALUE[0] origin:035a-iob-idelay !34_120 34_122
+RIOI3.IDELAY_Y0.IDELAY_VALUE[1] origin:035a-iob-idelay !34_114 34_116
+RIOI3.IDELAY_Y0.IDELAY_VALUE[2] origin:035a-iob-idelay !34_108 34_110
+RIOI3.IDELAY_Y0.IDELAY_VALUE[3] origin:035a-iob-idelay !34_100 34_102
+RIOI3.IDELAY_Y0.IDELAY_VALUE[4] origin:035a-iob-idelay !34_94 34_96
 RIOI3.IDELAY_Y0.IS_DATAIN_INVERTED origin:035a-iob-idelay 35_81
 RIOI3.IDELAY_Y0.IS_IDATAIN_INVERTED origin:035a-iob-idelay 33_72
 RIOI3.IDELAY_Y0.PIPE_SEL origin:035a-iob-idelay 34_106
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[0] origin:035a-iob-idelay !34_122 34_120
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[1] origin:035a-iob-idelay !34_116 34_114
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[2] origin:035a-iob-idelay !34_110 34_108
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[3] origin:035a-iob-idelay !34_102 34_100
+RIOI3.IDELAY_Y0.ZIDELAY_VALUE[4] origin:035a-iob-idelay !34_96 34_94
 RIOI3.IDELAY_Y1.CINVCTRL_SEL origin:035a-iob-idelay 34_38
-RIOI3.IDELAY_Y1.DELAY_SRC_DATAIN origin:035a-iob-idelay 34_58
-RIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN origin:035a-iob-idelay 35_55
+RIOI3.IDELAY_Y1.DELAY_SRC_DATAIN origin:035a-iob-idelay !35_55 34_58
+RIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN origin:035a-iob-idelay !34_58 35_55
 RIOI3.IDELAY_Y1.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 33_18
-RIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 34_14
-RIOI3.IDELAY_Y1.IDELAY_VALUE[0] origin:035a-iob-idelay 35_05
-RIOI3.IDELAY_Y1.IDELAY_VALUE[1] origin:035a-iob-idelay 35_11
-RIOI3.IDELAY_Y1.IDELAY_VALUE[2] origin:035a-iob-idelay 35_17
-RIOI3.IDELAY_Y1.IDELAY_VALUE[3] origin:035a-iob-idelay 35_25
-RIOI3.IDELAY_Y1.IDELAY_VALUE[4] origin:035a-iob-idelay 35_31
+RIOI3.IDELAY_Y1.IDELAY_TYPE_FIXED origin:035a-iob-idelay !34_08 !34_14
+RIOI3.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !34_14 34_08
+RIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 34_08 34_14
+RIOI3.IDELAY_Y1.IDELAY_VALUE[0] origin:035a-iob-idelay !35_07 35_05
+RIOI3.IDELAY_Y1.IDELAY_VALUE[1] origin:035a-iob-idelay !35_13 35_11
+RIOI3.IDELAY_Y1.IDELAY_VALUE[2] origin:035a-iob-idelay !35_19 35_17
+RIOI3.IDELAY_Y1.IDELAY_VALUE[3] origin:035a-iob-idelay !35_27 35_25
+RIOI3.IDELAY_Y1.IDELAY_VALUE[4] origin:035a-iob-idelay !35_33 35_31
 RIOI3.IDELAY_Y1.IS_DATAIN_INVERTED origin:035a-iob-idelay 34_46
 RIOI3.IDELAY_Y1.IS_IDATAIN_INVERTED origin:035a-iob-idelay 32_55
 RIOI3.IDELAY_Y1.PIPE_SEL origin:035a-iob-idelay 35_21
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[0] origin:035a-iob-idelay !35_05 35_07
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[1] origin:035a-iob-idelay !35_11 35_13
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[2] origin:035a-iob-idelay !35_17 35_19
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[3] origin:035a-iob-idelay !35_25 35_27
+RIOI3.IDELAY_Y1.ZIDELAY_VALUE[4] origin:035a-iob-idelay !35_31 35_33
diff --git a/zynq7/timings/carry4_slicel.sdf b/zynq7/timings/carry4_slicel.sdf
new file mode 100644
index 0000000..6dc9c4f
--- /dev/null
+++ b/zynq7/timings/carry4_slicel.sdf
@@ -0,0 +1,41 @@
+(DELAYFILE
+    (SDFVERSION "3.0")
+    (TIMESCALE 1ps)
+
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEL/ACY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT ax di0 (0.096::0.096)(0.096::0.096))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEL/BCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT bx di1 (0.091::0.091)(0.091::0.091))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEL/CCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT cx di2 (0.094::0.094)(0.094::0.094))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEL/DCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT dx di3 (0.058::0.058)(0.058::0.058))
+            )
+        )
+    )
+)
\ No newline at end of file
diff --git a/zynq7/timings/carry4_slicem.sdf b/zynq7/timings/carry4_slicem.sdf
new file mode 100644
index 0000000..10e0aad
--- /dev/null
+++ b/zynq7/timings/carry4_slicem.sdf
@@ -0,0 +1,41 @@
+(DELAYFILE
+    (SDFVERSION "3.0")
+    (TIMESCALE 1ps)
+
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEM/ACY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT ax di0 (0.111::0.111)(0.111::0.111))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEM/BCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT bx di1 (0.098::0.098)(0.098::0.098))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEM/CCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT cx di2 (0.105::0.105)(0.105::0.105))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEM/DCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT dx di3 (0.091::0.091)(0.091::0.091))
+            )
+        )
+    )
+)
\ No newline at end of file
diff --git a/zynq7/timings/slicel.sdf b/zynq7/timings/slicel.sdf
index f852498..581455b 100644
--- a/zynq7/timings/slicel.sdf
+++ b/zynq7/timings/slicel.sdf
@@ -511,6 +511,15 @@
     )
     (CELL
         (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEL/ACY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT ax di0 (0.096::0.096)(0.096::0.096))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
         (INSTANCE SLICEL/AFF)
         (DELAY
             (ABSOLUTE
@@ -637,6 +646,15 @@
     )
     (CELL
         (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEL/BCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT bx di1 (0.091::0.091)(0.091::0.091))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
         (INSTANCE SLICEL/BFF)
         (DELAY
             (ABSOLUTE
@@ -779,6 +797,15 @@
     )
     (CELL
         (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEL/CCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT cx di2 (0.094::0.094)(0.094::0.094))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
         (INSTANCE SLICEL/CFF)
         (DELAY
             (ABSOLUTE
@@ -910,6 +937,15 @@
     )
     (CELL
         (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEL/DCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT dx di3 (0.058::0.058)(0.058::0.058))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
         (INSTANCE SLICEL/DFF)
         (DELAY
             (ABSOLUTE
diff --git a/zynq7/timings/slicem.sdf b/zynq7/timings/slicem.sdf
index c78371e..ef8d635 100644
--- a/zynq7/timings/slicem.sdf
+++ b/zynq7/timings/slicem.sdf
@@ -756,6 +756,15 @@
     )
     (CELL
         (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEM/ACY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT ax di0 (0.111::0.111)(0.111::0.111))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
         (INSTANCE SLICEM/AFF)
         (DELAY
             (ABSOLUTE
@@ -904,6 +913,15 @@
     )
     (CELL
         (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEM/BCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT bx di1 (0.098::0.098)(0.098::0.098))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
         (INSTANCE SLICEM/BFF)
         (DELAY
             (ABSOLUTE
@@ -1067,6 +1085,15 @@
     )
     (CELL
         (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEM/CCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT cx di2 (0.105::0.105)(0.105::0.105))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
         (INSTANCE SLICEM/CFF)
         (DELAY
             (ABSOLUTE
@@ -1226,6 +1253,15 @@
     )
     (CELL
         (CELLTYPE "ROUTING_BEL")
+        (INSTANCE SLICEM/DCY0)
+        (DELAY
+            (ABSOLUTE
+                (INTERCONNECT dx di3 (0.091::0.091)(0.091::0.091))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "ROUTING_BEL")
         (INSTANCE SLICEM/DFF)
         (DELAY
             (ABSOLUTE