diff --git a/Info.md b/Info.md
index 3ea6657..a991903 100644
--- a/Info.md
+++ b/Info.md
@@ -37,20 +37,20 @@
 
 # Details
 
-Last updated on Sun Jun  2 16:24:13 UTC 2019 (2019-06-02T16:24:13+00:00).
+Last updated on Wed 12 Jun 2019 11:10:45 AM UTC (2019-06-12T11:10:45+00:00).
 
-Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [0bddcaf9](https://github.com/SymbiFlow/prjxray/commit/0bddcaf90872d961f6aaf21848cb97c3777ff307).
+Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [d31319cc](https://github.com/SymbiFlow/prjxray/commit/d31319ccaa6f6fc4d1106890f9d72d908fa03b52).
 
 Latest commit was;
 ```
-commit 0bddcaf90872d961f6aaf21848cb97c3777ff307
-Merge: 84e168c9 0dc13173
+commit d31319ccaa6f6fc4d1106890f9d72d908fa03b52
+Merge: 80f42b7e 2ad76619
 Author: litghost <537074+litghost@users.noreply.github.com>
-Date:   Thu May 30 18:20:43 2019 -0700
+Date:   Tue Jun 11 14:59:41 2019 -0700
 
-    Merge pull request #858 from litghost/timing_fuzzer
+    Merge pull request #879 from litghost/avoid_full_dict_build
     
-    Add wire, pip, and site pin timing information.
+    Avoid building full speed_model dict.
 ```
 
 
@@ -59,7 +59,7 @@
 
 ### Settings
 
-Created using following [settings/artix7.sh (sha256: 26e1ff93657132928a3b583c95347267d7afeb18a7b7036f0d7a6ea3367ae803)](https://github.com/SymbiFlow/prjxray/blob/0bddcaf90872d961f6aaf21848cb97c3777ff307/settings/artix7.sh)
+Created using following [settings/artix7.sh (sha256: 26e1ff93657132928a3b583c95347267d7afeb18a7b7036f0d7a6ea3367ae803)](https://github.com/SymbiFlow/prjxray/blob/d31319ccaa6f6fc4d1106890f9d72d908fa03b52/settings/artix7.sh)
 ```shell
 export XRAY_DATABASE="artix7"
 export XRAY_PART="xc7a50tfgg484-1"
@@ -132,8 +132,8 @@
  * [`be757fb834be7ff84a2873c0ac6621c909a5e85362b397667760edde86616f84  ./artix7/mask_hclk_cmt_l.db`](./artix7/mask_hclk_cmt_l.db)
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./artix7/mask_hclk_l.db`](./artix7/mask_hclk_l.db)
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./artix7/mask_hclk_r.db`](./artix7/mask_hclk_r.db)
- * [`5cd5494b388d2b4974b8126ee87dccdf45d67506a35ca6456442ec5886db273e  ./artix7/mask_liob33.db`](./artix7/mask_liob33.db)
- * [`5cd5494b388d2b4974b8126ee87dccdf45d67506a35ca6456442ec5886db273e  ./artix7/mask_riob33.db`](./artix7/mask_riob33.db)
+ * [`7efda5faeec347ea5d07fcf38fbf8dc3ef36661b77af7837639999bc4b50bc45  ./artix7/mask_liob33.db`](./artix7/mask_liob33.db)
+ * [`7efda5faeec347ea5d07fcf38fbf8dc3ef36661b77af7837639999bc4b50bc45  ./artix7/mask_riob33.db`](./artix7/mask_riob33.db)
  * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf  ./artix7/ppips_bram_int_interface_l.db`](./artix7/ppips_bram_int_interface_l.db)
  * [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae  ./artix7/ppips_bram_int_interface_r.db`](./artix7/ppips_bram_int_interface_r.db)
  * [`2c68f8b128aeb79197013c3a1774522143a3507a8fa595a98c22dba2553fd5ce  ./artix7/ppips_bram_l.db`](./artix7/ppips_bram_l.db)
@@ -202,9 +202,9 @@
  * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9  ./artix7/segbits_hclk_r.db`](./artix7/segbits_hclk_r.db)
  * [`0e9b5da6def4776e2ca8dd59af8f4334bf5cfb88d99b323be25dd6ba2e3386f7  ./artix7/segbits_hclk_r.origin_info.db`](./artix7/segbits_hclk_r.origin_info.db)
  * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520  ./artix7/segbits_int_l.db`](./artix7/segbits_int_l.db)
- * [`d8ad010de57b14e0fa25ce80097256ea04c08acb84b26056a3f68b49001a25c9  ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db)
+ * [`dd0ebe0f4d00c4f4535c573b570baca6b38701af8ba457b28c0d37a802de9277  ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db)
  * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556  ./artix7/segbits_int_r.db`](./artix7/segbits_int_r.db)
- * [`bedd575a2e7f86e6435df4b9dc051c69297bb39847f3fe199b568f97a6871402  ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db)
+ * [`12d72fb4b64a10d66c3df120c7755432455c1e4509e75ee0c4a32337178b7d91  ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db)
  * [`6ece030404b8fd09095382730639d261e0402e2c513bf07d9ec301a7311ceb7e  ./artix7/segbits_liob33.db`](./artix7/segbits_liob33.db)
  * [`f100a6e9abd51bbddb7aacb810c00b7240b2f50a25b3f331121d923198d43d8f  ./artix7/segbits_liob33.origin_info.db`](./artix7/segbits_liob33.origin_info.db)
  * [`32cae09e1ab0ba143570d702cfee2a3e04948c131f6511e6040c684638c67ed4  ./artix7/segbits_riob33.db`](./artix7/segbits_riob33.db)
@@ -367,7 +367,7 @@
  * [`5fb8795e142a7bc6955e6c50089540c890aeb3b3a6c326e6e24a6e4983d91f62  ./artix7/tile_type_VBRK_EXT.json`](./artix7/tile_type_VBRK_EXT.json)
  * [`63851d7ed48855486ee7e04a6332935799e8d2f3524ec6d627ea6e5d2e7cbfa4  ./artix7/tile_type_VFRAME.json`](./artix7/tile_type_VFRAME.json)
  * [`1604d48580815e26069c2b4909fcc50e8e8f974ad0beb349ced2329c302bb06b  ./artix7/tileconn.json`](./artix7/tileconn.json)
- * [`08912d58cee8057f7557c307700162b1d3437766adeb95a79980bf3602a7a779  ./artix7/tilegrid.json`](./artix7/tilegrid.json)
+ * [`c748caf9267da80149d743f50ffa0684c41f6dcf153ba6fb14ea9f605bd0c7f8  ./artix7/tilegrid.json`](./artix7/tilegrid.json)
  * [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4  ./artix7/timings/BRAM_INT_INTERFACE_L.sdf`](./artix7/timings/BRAM_INT_INTERFACE_L.sdf)
  * [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4  ./artix7/timings/BRAM_INT_INTERFACE_R.sdf`](./artix7/timings/BRAM_INT_INTERFACE_R.sdf)
  * [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4  ./artix7/timings/BRAM_L.sdf`](./artix7/timings/BRAM_L.sdf)
@@ -406,18 +406,18 @@
  * [`366802adb3810a1cecf1674f01fe1a97f1338a7455d7a6e4796aa004311b9c8a  ./artix7/timings/CMT_FIFO_R.sdf`](./artix7/timings/CMT_FIFO_R.sdf)
  * [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4  ./artix7/timings/CMT_PMV.sdf`](./artix7/timings/CMT_PMV.sdf)
  * [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4  ./artix7/timings/CMT_PMV_L.sdf`](./artix7/timings/CMT_PMV_L.sdf)
- * [`c2e66425da5018d6e7aa2b0aec721bcecfdba26bfa26016598cd28e3112fffc4  ./artix7/timings/CMT_TOP_L_LOWER_B.sdf`](./artix7/timings/CMT_TOP_L_LOWER_B.sdf)
+ * [`8c641a845fdd56842eec7c5fe72ddbd26654593313516137b88dcb5ea83a1920  ./artix7/timings/CMT_TOP_L_LOWER_B.sdf`](./artix7/timings/CMT_TOP_L_LOWER_B.sdf)
  * [`35863307207f2f40fdbf61f5a5065b0112305594d5375a758491ee52e2a848a8  ./artix7/timings/CMT_TOP_L_LOWER_T.sdf`](./artix7/timings/CMT_TOP_L_LOWER_T.sdf)
  * [`e8fdd4747aa8be4e39fe2ae27f51c8442c754485c8506fc5b021150f08289e95  ./artix7/timings/CMT_TOP_L_UPPER_B.sdf`](./artix7/timings/CMT_TOP_L_UPPER_B.sdf)
  * [`5a70eb78c2a91cef8d2322645ac12acef53241d264ce548017620963e396a8a9  ./artix7/timings/CMT_TOP_L_UPPER_T.sdf`](./artix7/timings/CMT_TOP_L_UPPER_T.sdf)
- * [`c2e66425da5018d6e7aa2b0aec721bcecfdba26bfa26016598cd28e3112fffc4  ./artix7/timings/CMT_TOP_R_LOWER_B.sdf`](./artix7/timings/CMT_TOP_R_LOWER_B.sdf)
+ * [`8c641a845fdd56842eec7c5fe72ddbd26654593313516137b88dcb5ea83a1920  ./artix7/timings/CMT_TOP_R_LOWER_B.sdf`](./artix7/timings/CMT_TOP_R_LOWER_B.sdf)
  * [`35863307207f2f40fdbf61f5a5065b0112305594d5375a758491ee52e2a848a8  ./artix7/timings/CMT_TOP_R_LOWER_T.sdf`](./artix7/timings/CMT_TOP_R_LOWER_T.sdf)
  * [`e8fdd4747aa8be4e39fe2ae27f51c8442c754485c8506fc5b021150f08289e95  ./artix7/timings/CMT_TOP_R_UPPER_B.sdf`](./artix7/timings/CMT_TOP_R_UPPER_B.sdf)
  * [`5a70eb78c2a91cef8d2322645ac12acef53241d264ce548017620963e396a8a9  ./artix7/timings/CMT_TOP_R_UPPER_T.sdf`](./artix7/timings/CMT_TOP_R_UPPER_T.sdf)
- * [`b370f0075dfa4e4355433f9e06daf50f53b174cbd4d4e1a3e7a031db644b5af7  ./artix7/timings/GTP_CHANNEL_0.sdf`](./artix7/timings/GTP_CHANNEL_0.sdf)
- * [`b370f0075dfa4e4355433f9e06daf50f53b174cbd4d4e1a3e7a031db644b5af7  ./artix7/timings/GTP_CHANNEL_1.sdf`](./artix7/timings/GTP_CHANNEL_1.sdf)
- * [`b370f0075dfa4e4355433f9e06daf50f53b174cbd4d4e1a3e7a031db644b5af7  ./artix7/timings/GTP_CHANNEL_2.sdf`](./artix7/timings/GTP_CHANNEL_2.sdf)
- * [`b370f0075dfa4e4355433f9e06daf50f53b174cbd4d4e1a3e7a031db644b5af7  ./artix7/timings/GTP_CHANNEL_3.sdf`](./artix7/timings/GTP_CHANNEL_3.sdf)
+ * [`6e723a9ad0acfa2a322e4fb2fed8b94c9f188d72bdf4e370e0e79860f1cbba92  ./artix7/timings/GTP_CHANNEL_0.sdf`](./artix7/timings/GTP_CHANNEL_0.sdf)
+ * [`6e723a9ad0acfa2a322e4fb2fed8b94c9f188d72bdf4e370e0e79860f1cbba92  ./artix7/timings/GTP_CHANNEL_1.sdf`](./artix7/timings/GTP_CHANNEL_1.sdf)
+ * [`6e723a9ad0acfa2a322e4fb2fed8b94c9f188d72bdf4e370e0e79860f1cbba92  ./artix7/timings/GTP_CHANNEL_2.sdf`](./artix7/timings/GTP_CHANNEL_2.sdf)
+ * [`6e723a9ad0acfa2a322e4fb2fed8b94c9f188d72bdf4e370e0e79860f1cbba92  ./artix7/timings/GTP_CHANNEL_3.sdf`](./artix7/timings/GTP_CHANNEL_3.sdf)
  * [`aa79f422942e6767be523045374d542a4a51262eb7af8a5bd6c64312ff1b2927  ./artix7/timings/GTP_COMMON.sdf`](./artix7/timings/GTP_COMMON.sdf)
  * [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4  ./artix7/timings/GTP_INT_INTERFACE.sdf`](./artix7/timings/GTP_INT_INTERFACE.sdf)
  * [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4  ./artix7/timings/HCLK_BRAM.sdf`](./artix7/timings/HCLK_BRAM.sdf)
@@ -451,10 +451,10 @@
  * [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4  ./artix7/timings/IO_INT_INTERFACE_R.sdf`](./artix7/timings/IO_INT_INTERFACE_R.sdf)
  * [`9313a012de7cbb7120baf15fe30bf8d44b238cad6226ece1a9776746e2857863  ./artix7/timings/LIOB33.sdf`](./artix7/timings/LIOB33.sdf)
  * [`0fdaf6a593346b5cac8899eebf4f62d1732d6d6fb0a17c9f4b6a4e54e03c3523  ./artix7/timings/LIOB33_SING.sdf`](./artix7/timings/LIOB33_SING.sdf)
- * [`fcde8675e577127516c2362f39a19ae75e6674eb53662a31b42ffddefdd8e8e4  ./artix7/timings/LIOI3.sdf`](./artix7/timings/LIOI3.sdf)
- * [`fcde8675e577127516c2362f39a19ae75e6674eb53662a31b42ffddefdd8e8e4  ./artix7/timings/LIOI3_SING.sdf`](./artix7/timings/LIOI3_SING.sdf)
- * [`fcde8675e577127516c2362f39a19ae75e6674eb53662a31b42ffddefdd8e8e4  ./artix7/timings/LIOI3_TBYTESRC.sdf`](./artix7/timings/LIOI3_TBYTESRC.sdf)
- * [`fcde8675e577127516c2362f39a19ae75e6674eb53662a31b42ffddefdd8e8e4  ./artix7/timings/LIOI3_TBYTETERM.sdf`](./artix7/timings/LIOI3_TBYTETERM.sdf)
+ * [`02c0fd3d714b5b7f4ba97d3575ae517360cb6a010f0a2a562a3be824b7d0b401  ./artix7/timings/LIOI3.sdf`](./artix7/timings/LIOI3.sdf)
+ * [`02c0fd3d714b5b7f4ba97d3575ae517360cb6a010f0a2a562a3be824b7d0b401  ./artix7/timings/LIOI3_SING.sdf`](./artix7/timings/LIOI3_SING.sdf)
+ * [`02c0fd3d714b5b7f4ba97d3575ae517360cb6a010f0a2a562a3be824b7d0b401  ./artix7/timings/LIOI3_TBYTESRC.sdf`](./artix7/timings/LIOI3_TBYTESRC.sdf)
+ * [`02c0fd3d714b5b7f4ba97d3575ae517360cb6a010f0a2a562a3be824b7d0b401  ./artix7/timings/LIOI3_TBYTETERM.sdf`](./artix7/timings/LIOI3_TBYTETERM.sdf)
  * [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4  ./artix7/timings/L_TERM_INT.sdf`](./artix7/timings/L_TERM_INT.sdf)
  * [`2af03d31603e237767ecaef977f8b6050c71d32a7632330ac8f42909dc22befc  ./artix7/timings/MONITOR_BOT.sdf`](./artix7/timings/MONITOR_BOT.sdf)
  * [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4  ./artix7/timings/MONITOR_MID.sdf`](./artix7/timings/MONITOR_MID.sdf)
@@ -466,10 +466,10 @@
  * [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4  ./artix7/timings/PCIE_TOP.sdf`](./artix7/timings/PCIE_TOP.sdf)
  * [`9313a012de7cbb7120baf15fe30bf8d44b238cad6226ece1a9776746e2857863  ./artix7/timings/RIOB33.sdf`](./artix7/timings/RIOB33.sdf)
  * [`0fdaf6a593346b5cac8899eebf4f62d1732d6d6fb0a17c9f4b6a4e54e03c3523  ./artix7/timings/RIOB33_SING.sdf`](./artix7/timings/RIOB33_SING.sdf)
- * [`fcde8675e577127516c2362f39a19ae75e6674eb53662a31b42ffddefdd8e8e4  ./artix7/timings/RIOI3.sdf`](./artix7/timings/RIOI3.sdf)
- * [`fcde8675e577127516c2362f39a19ae75e6674eb53662a31b42ffddefdd8e8e4  ./artix7/timings/RIOI3_SING.sdf`](./artix7/timings/RIOI3_SING.sdf)
- * [`fcde8675e577127516c2362f39a19ae75e6674eb53662a31b42ffddefdd8e8e4  ./artix7/timings/RIOI3_TBYTESRC.sdf`](./artix7/timings/RIOI3_TBYTESRC.sdf)
- * [`fcde8675e577127516c2362f39a19ae75e6674eb53662a31b42ffddefdd8e8e4  ./artix7/timings/RIOI3_TBYTETERM.sdf`](./artix7/timings/RIOI3_TBYTETERM.sdf)
+ * [`02c0fd3d714b5b7f4ba97d3575ae517360cb6a010f0a2a562a3be824b7d0b401  ./artix7/timings/RIOI3.sdf`](./artix7/timings/RIOI3.sdf)
+ * [`02c0fd3d714b5b7f4ba97d3575ae517360cb6a010f0a2a562a3be824b7d0b401  ./artix7/timings/RIOI3_SING.sdf`](./artix7/timings/RIOI3_SING.sdf)
+ * [`02c0fd3d714b5b7f4ba97d3575ae517360cb6a010f0a2a562a3be824b7d0b401  ./artix7/timings/RIOI3_TBYTESRC.sdf`](./artix7/timings/RIOI3_TBYTESRC.sdf)
+ * [`02c0fd3d714b5b7f4ba97d3575ae517360cb6a010f0a2a562a3be824b7d0b401  ./artix7/timings/RIOI3_TBYTETERM.sdf`](./artix7/timings/RIOI3_TBYTETERM.sdf)
  * [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4  ./artix7/timings/R_TERM_INT.sdf`](./artix7/timings/R_TERM_INT.sdf)
  * [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4  ./artix7/timings/R_TERM_INT_GTX.sdf`](./artix7/timings/R_TERM_INT_GTX.sdf)
  * [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4  ./artix7/timings/TERM_CMT.sdf`](./artix7/timings/TERM_CMT.sdf)
@@ -494,7 +494,7 @@
 
 ### Settings
 
-Created using following [settings/kintex7.sh (sha256: 794538b550d399255cbafeeb1b5ff183dc66ebc6cd8dc0f725e3f6a3977f757d)](https://github.com/SymbiFlow/prjxray/blob/0bddcaf90872d961f6aaf21848cb97c3777ff307/settings/kintex7.sh)
+Created using following [settings/kintex7.sh (sha256: 794538b550d399255cbafeeb1b5ff183dc66ebc6cd8dc0f725e3f6a3977f757d)](https://github.com/SymbiFlow/prjxray/blob/d31319ccaa6f6fc4d1106890f9d72d908fa03b52/settings/kintex7.sh)
 ```shell
 export XRAY_DATABASE="kintex7"
 export XRAY_PART="xc7k70tfbg676-2"
@@ -798,7 +798,7 @@
 
 ### Settings
 
-Created using following [settings/zynq7.sh (sha256: 61298e89dcc873eadba47f5c2f9f72a38fa022583b2c7ff89246b2e051585ad8)](https://github.com/SymbiFlow/prjxray/blob/0bddcaf90872d961f6aaf21848cb97c3777ff307/settings/zynq7.sh)
+Created using following [settings/zynq7.sh (sha256: 61298e89dcc873eadba47f5c2f9f72a38fa022583b2c7ff89246b2e051585ad8)](https://github.com/SymbiFlow/prjxray/blob/d31319ccaa6f6fc4d1106890f9d72d908fa03b52/settings/zynq7.sh)
 ```shell
 export XRAY_DATABASE="zynq7"
 export XRAY_PART="xc7z010clg400-1"
diff --git a/artix7/mask_liob33.db b/artix7/mask_liob33.db
index 9a74b2f..d0c3d87 100644
--- a/artix7/mask_liob33.db
+++ b/artix7/mask_liob33.db
@@ -1,7 +1,6 @@
 bit 00_02
 bit 00_07
 bit 00_09
-bit 00_10
 bit 00_11
 bit 00_14
 bit 00_17
@@ -49,8 +48,10 @@
 bit 01_38
 bit 01_40
 bit 01_41
+bit 01_42
 bit 01_44
 bit 01_50
+bit 01_52
 bit 01_58
 bit 01_64
 bit 01_65
@@ -75,6 +76,7 @@
 bit 02_05
 bit 02_06
 bit 02_07
+bit 02_09
 bit 02_10
 bit 02_11
 bit 02_13
@@ -84,20 +86,17 @@
 bit 02_22
 bit 02_23
 bit 02_30
-bit 02_31
 bit 02_34
 bit 02_35
 bit 02_38
 bit 02_39
 bit 02_46
-bit 02_47
 bit 02_50
 bit 02_51
 bit 02_54
 bit 02_55
 bit 02_62
 bit 02_63
-bit 02_66
 bit 02_69
 bit 02_70
 bit 02_71
@@ -110,6 +109,7 @@
 bit 02_87
 bit 02_94
 bit 02_95
+bit 02_98
 bit 02_102
 bit 02_103
 bit 02_114
@@ -119,20 +119,19 @@
 bit 02_126
 bit 02_127
 bit 03_02
-bit 03_05
 bit 03_06
 bit 03_10
 bit 03_13
 bit 03_14
 bit 03_21
 bit 03_29
+bit 03_36
 bit 03_37
 bit 03_38
 bit 03_45
 bit 03_52
 bit 03_53
 bit 03_54
-bit 03_60
 bit 03_61
 bit 03_62
 bit 03_66
@@ -146,13 +145,14 @@
 bit 03_93
 bit 03_102
 bit 03_109
-bit 03_114
 bit 03_116
 bit 03_117
 bit 03_118
-bit 03_126
+bit 04_04
+bit 04_05
 bit 04_06
 bit 04_07
+bit 04_10
 bit 04_11
 bit 04_12
 bit 04_14
@@ -172,18 +172,15 @@
 bit 04_39
 bit 04_44
 bit 04_47
-bit 04_48
 bit 04_51
 bit 04_52
 bit 04_53
 bit 04_55
-bit 04_60
 bit 04_63
 bit 04_66
 bit 04_68
 bit 04_69
 bit 04_70
-bit 04_71
 bit 04_74
 bit 04_75
 bit 04_76
@@ -194,7 +191,6 @@
 bit 04_85
 bit 04_86
 bit 04_87
-bit 04_92
 bit 04_94
 bit 04_95
 bit 04_100
@@ -204,7 +200,6 @@
 bit 04_116
 bit 04_117
 bit 04_119
-bit 04_124
 bit 05_01
 bit 05_02
 bit 05_05
@@ -216,7 +211,6 @@
 bit 05_14
 bit 05_17
 bit 05_18
-bit 05_20
 bit 05_22
 bit 05_25
 bit 05_26
@@ -226,9 +220,7 @@
 bit 05_36
 bit 05_37
 bit 05_38
-bit 05_42
 bit 05_44
-bit 05_46
 bit 05_49
 bit 05_50
 bit 05_52
@@ -237,7 +229,6 @@
 bit 05_58
 bit 05_60
 bit 05_62
-bit 05_63
 bit 05_65
 bit 05_66
 bit 05_69
@@ -249,6 +240,8 @@
 bit 05_82
 bit 05_86
 bit 05_89
+bit 05_90
+bit 05_98
 bit 05_101
 bit 05_102
 bit 05_108
@@ -265,14 +258,15 @@
 bit 06_05
 bit 06_06
 bit 06_10
-bit 06_11
 bit 06_12
 bit 06_13
 bit 06_14
 bit 06_15
 bit 06_17
 bit 06_20
+bit 06_21
 bit 06_22
+bit 06_24
 bit 06_28
 bit 06_29
 bit 06_30
@@ -281,7 +275,6 @@
 bit 06_35
 bit 06_36
 bit 06_37
-bit 06_39
 bit 06_43
 bit 06_46
 bit 06_49
@@ -315,22 +308,18 @@
 bit 06_89
 bit 06_91
 bit 06_92
-bit 06_93
 bit 06_94
 bit 06_97
 bit 06_99
 bit 06_100
 bit 06_101
-bit 06_103
 bit 06_107
 bit 06_113
 bit 06_115
 bit 06_116
-bit 06_117
 bit 06_119
 bit 06_121
 bit 06_123
-bit 06_125
 bit 07_00
 bit 07_02
 bit 07_03
@@ -351,6 +340,7 @@
 bit 07_22
 bit 07_23
 bit 07_24
+bit 07_25
 bit 07_26
 bit 07_27
 bit 07_28
@@ -364,13 +354,13 @@
 bit 07_38
 bit 07_39
 bit 07_40
-bit 07_43
 bit 07_44
 bit 07_46
 bit 07_47
 bit 07_48
 bit 07_50
 bit 07_51
+bit 07_52
 bit 07_53
 bit 07_54
 bit 07_55
@@ -381,12 +371,15 @@
 bit 07_62
 bit 07_63
 bit 07_64
+bit 07_65
 bit 07_67
 bit 07_68
 bit 07_69
 bit 07_70
 bit 07_71
 bit 07_72
+bit 07_73
+bit 07_74
 bit 07_75
 bit 07_76
 bit 07_77
@@ -405,6 +398,7 @@
 bit 07_95
 bit 07_96
 bit 07_98
+bit 07_99
 bit 07_100
 bit 07_102
 bit 07_103
@@ -440,22 +434,20 @@
 bit 08_16
 bit 08_17
 bit 08_18
-bit 08_19
 bit 08_20
-bit 08_21
 bit 08_22
 bit 08_23
 bit 08_24
 bit 08_25
 bit 08_26
 bit 08_28
-bit 08_29
 bit 08_30
 bit 08_31
 bit 08_32
 bit 08_33
 bit 08_34
 bit 08_35
+bit 08_36
 bit 08_38
 bit 08_39
 bit 08_40
@@ -506,7 +498,6 @@
 bit 08_89
 bit 08_90
 bit 08_92
-bit 08_93
 bit 08_94
 bit 08_95
 bit 08_96
@@ -552,12 +543,11 @@
 bit 09_13
 bit 09_15
 bit 09_16
-bit 09_18
 bit 09_19
 bit 09_20
 bit 09_21
 bit 09_23
-bit 09_25
+bit 09_24
 bit 09_26
 bit 09_27
 bit 09_28
@@ -579,7 +569,6 @@
 bit 09_50
 bit 09_51
 bit 09_52
-bit 09_55
 bit 09_56
 bit 09_57
 bit 09_58
@@ -587,6 +576,7 @@
 bit 09_60
 bit 09_61
 bit 09_63
+bit 09_64
 bit 09_65
 bit 09_66
 bit 09_67
@@ -595,9 +585,12 @@
 bit 09_71
 bit 09_72
 bit 09_73
+bit 09_74
 bit 09_75
+bit 09_76
 bit 09_77
 bit 09_79
+bit 09_80
 bit 09_82
 bit 09_83
 bit 09_84
@@ -607,7 +600,6 @@
 bit 09_92
 bit 09_93
 bit 09_94
-bit 09_95
 bit 09_96
 bit 09_98
 bit 09_99
@@ -649,7 +641,6 @@
 bit 10_18
 bit 10_19
 bit 10_20
-bit 10_21
 bit 10_22
 bit 10_23
 bit 10_24
@@ -677,11 +668,11 @@
 bit 10_50
 bit 10_51
 bit 10_52
-bit 10_53
 bit 10_54
 bit 10_55
 bit 10_57
 bit 10_58
+bit 10_60
 bit 10_61
 bit 10_62
 bit 10_63
@@ -719,11 +710,11 @@
 bit 10_97
 bit 10_98
 bit 10_99
+bit 10_100
 bit 10_101
 bit 10_103
 bit 10_104
 bit 10_106
-bit 10_109
 bit 10_110
 bit 10_111
 bit 10_113
@@ -735,12 +726,12 @@
 bit 10_120
 bit 10_121
 bit 10_122
+bit 10_124
 bit 10_125
 bit 10_127
 bit 11_01
 bit 11_02
 bit 11_03
-bit 11_04
 bit 11_05
 bit 11_07
 bit 11_09
@@ -770,8 +761,8 @@
 bit 11_36
 bit 11_39
 bit 11_41
+bit 11_42
 bit 11_43
-bit 11_44
 bit 11_45
 bit 11_46
 bit 11_47
@@ -807,6 +798,7 @@
 bit 11_89
 bit 11_90
 bit 11_91
+bit 11_92
 bit 11_93
 bit 11_95
 bit 11_96
@@ -818,6 +810,7 @@
 bit 11_103
 bit 11_105
 bit 11_107
+bit 11_108
 bit 11_109
 bit 11_111
 bit 11_112
@@ -849,9 +842,7 @@
 bit 12_15
 bit 12_16
 bit 12_17
-bit 12_18
 bit 12_19
-bit 12_21
 bit 12_22
 bit 12_23
 bit 12_25
@@ -878,6 +869,7 @@
 bit 12_49
 bit 12_50
 bit 12_51
+bit 12_52
 bit 12_53
 bit 12_54
 bit 12_55
@@ -895,7 +887,6 @@
 bit 12_69
 bit 12_70
 bit 12_71
-bit 12_72
 bit 12_73
 bit 12_74
 bit 12_75
@@ -918,6 +909,7 @@
 bit 12_97
 bit 12_98
 bit 12_99
+bit 12_100
 bit 12_101
 bit 12_103
 bit 12_105
@@ -926,17 +918,16 @@
 bit 12_109
 bit 12_110
 bit 12_111
-bit 12_112
 bit 12_113
 bit 12_114
 bit 12_115
 bit 12_117
 bit 12_118
 bit 12_119
+bit 12_120
 bit 12_121
 bit 12_122
 bit 12_123
-bit 12_124
 bit 12_125
 bit 12_127
 bit 13_00
@@ -974,7 +965,7 @@
 bit 13_34
 bit 13_35
 bit 13_36
-bit 13_38
+bit 13_37
 bit 13_39
 bit 13_41
 bit 13_42
@@ -984,6 +975,7 @@
 bit 13_48
 bit 13_49
 bit 13_50
+bit 13_51
 bit 13_52
 bit 13_53
 bit 13_54
@@ -1008,7 +1000,6 @@
 bit 13_74
 bit 13_75
 bit 13_76
-bit 13_77
 bit 13_78
 bit 13_79
 bit 13_80
@@ -1032,7 +1023,6 @@
 bit 13_99
 bit 13_100
 bit 13_101
-bit 13_102
 bit 13_103
 bit 13_104
 bit 13_105
@@ -1080,6 +1070,7 @@
 bit 14_23
 bit 14_26
 bit 14_27
+bit 14_28
 bit 14_29
 bit 14_30
 bit 14_31
@@ -1179,6 +1170,7 @@
 bit 15_47
 bit 15_49
 bit 15_51
+bit 15_53
 bit 15_55
 bit 15_57
 bit 15_59
@@ -1202,6 +1194,7 @@
 bit 15_79
 bit 15_80
 bit 15_81
+bit 15_82
 bit 15_83
 bit 15_84
 bit 15_85
@@ -1225,6 +1218,7 @@
 bit 15_111
 bit 15_113
 bit 15_115
+bit 15_117
 bit 15_119
 bit 15_121
 bit 15_123
@@ -1326,14 +1320,12 @@
 bit 17_71
 bit 17_73
 bit 17_79
-bit 17_80
 bit 17_85
 bit 17_86
 bit 17_87
 bit 17_88
 bit 17_94
 bit 17_95
-bit 17_96
 bit 17_99
 bit 17_102
 bit 17_103
@@ -1356,6 +1348,7 @@
 bit 18_06
 bit 18_07
 bit 18_08
+bit 18_09
 bit 18_14
 bit 18_17
 bit 18_20
@@ -1413,7 +1406,6 @@
 bit 18_125
 bit 18_127
 bit 19_03
-bit 19_06
 bit 19_07
 bit 19_08
 bit 19_09
@@ -1437,6 +1429,7 @@
 bit 19_47
 bit 19_49
 bit 19_50
+bit 19_54
 bit 19_55
 bit 19_56
 bit 19_57
@@ -1522,7 +1515,6 @@
 bit 21_20
 bit 21_21
 bit 21_22
-bit 21_23
 bit 21_30
 bit 21_34
 bit 21_35
@@ -1557,10 +1549,10 @@
 bit 21_118
 bit 21_121
 bit 21_122
-bit 21_124
 bit 21_126
 bit 22_02
 bit 22_06
+bit 22_07
 bit 22_09
 bit 22_15
 bit 22_16
@@ -1574,7 +1566,6 @@
 bit 22_35
 bit 22_38
 bit 22_39
-bit 22_40
 bit 22_42
 bit 22_43
 bit 22_44
@@ -1583,6 +1574,7 @@
 bit 22_48
 bit 22_51
 bit 22_54
+bit 22_55
 bit 22_56
 bit 22_57
 bit 22_58
@@ -1603,7 +1595,7 @@
 bit 22_96
 bit 22_99
 bit 22_102
-bit 22_104
+bit 22_103
 bit 22_106
 bit 22_107
 bit 22_108
@@ -1642,7 +1634,6 @@
 bit 23_48
 bit 23_51
 bit 23_54
-bit 23_55
 bit 23_56
 bit 23_57
 bit 23_58
@@ -1682,6 +1673,7 @@
 bit 24_05
 bit 24_06
 bit 24_07
+bit 24_08
 bit 24_09
 bit 24_13
 bit 24_15
diff --git a/artix7/mask_riob33.db b/artix7/mask_riob33.db
index 9a74b2f..d0c3d87 100644
--- a/artix7/mask_riob33.db
+++ b/artix7/mask_riob33.db
@@ -1,7 +1,6 @@
 bit 00_02
 bit 00_07
 bit 00_09
-bit 00_10
 bit 00_11
 bit 00_14
 bit 00_17
@@ -49,8 +48,10 @@
 bit 01_38
 bit 01_40
 bit 01_41
+bit 01_42
 bit 01_44
 bit 01_50
+bit 01_52
 bit 01_58
 bit 01_64
 bit 01_65
@@ -75,6 +76,7 @@
 bit 02_05
 bit 02_06
 bit 02_07
+bit 02_09
 bit 02_10
 bit 02_11
 bit 02_13
@@ -84,20 +86,17 @@
 bit 02_22
 bit 02_23
 bit 02_30
-bit 02_31
 bit 02_34
 bit 02_35
 bit 02_38
 bit 02_39
 bit 02_46
-bit 02_47
 bit 02_50
 bit 02_51
 bit 02_54
 bit 02_55
 bit 02_62
 bit 02_63
-bit 02_66
 bit 02_69
 bit 02_70
 bit 02_71
@@ -110,6 +109,7 @@
 bit 02_87
 bit 02_94
 bit 02_95
+bit 02_98
 bit 02_102
 bit 02_103
 bit 02_114
@@ -119,20 +119,19 @@
 bit 02_126
 bit 02_127
 bit 03_02
-bit 03_05
 bit 03_06
 bit 03_10
 bit 03_13
 bit 03_14
 bit 03_21
 bit 03_29
+bit 03_36
 bit 03_37
 bit 03_38
 bit 03_45
 bit 03_52
 bit 03_53
 bit 03_54
-bit 03_60
 bit 03_61
 bit 03_62
 bit 03_66
@@ -146,13 +145,14 @@
 bit 03_93
 bit 03_102
 bit 03_109
-bit 03_114
 bit 03_116
 bit 03_117
 bit 03_118
-bit 03_126
+bit 04_04
+bit 04_05
 bit 04_06
 bit 04_07
+bit 04_10
 bit 04_11
 bit 04_12
 bit 04_14
@@ -172,18 +172,15 @@
 bit 04_39
 bit 04_44
 bit 04_47
-bit 04_48
 bit 04_51
 bit 04_52
 bit 04_53
 bit 04_55
-bit 04_60
 bit 04_63
 bit 04_66
 bit 04_68
 bit 04_69
 bit 04_70
-bit 04_71
 bit 04_74
 bit 04_75
 bit 04_76
@@ -194,7 +191,6 @@
 bit 04_85
 bit 04_86
 bit 04_87
-bit 04_92
 bit 04_94
 bit 04_95
 bit 04_100
@@ -204,7 +200,6 @@
 bit 04_116
 bit 04_117
 bit 04_119
-bit 04_124
 bit 05_01
 bit 05_02
 bit 05_05
@@ -216,7 +211,6 @@
 bit 05_14
 bit 05_17
 bit 05_18
-bit 05_20
 bit 05_22
 bit 05_25
 bit 05_26
@@ -226,9 +220,7 @@
 bit 05_36
 bit 05_37
 bit 05_38
-bit 05_42
 bit 05_44
-bit 05_46
 bit 05_49
 bit 05_50
 bit 05_52
@@ -237,7 +229,6 @@
 bit 05_58
 bit 05_60
 bit 05_62
-bit 05_63
 bit 05_65
 bit 05_66
 bit 05_69
@@ -249,6 +240,8 @@
 bit 05_82
 bit 05_86
 bit 05_89
+bit 05_90
+bit 05_98
 bit 05_101
 bit 05_102
 bit 05_108
@@ -265,14 +258,15 @@
 bit 06_05
 bit 06_06
 bit 06_10
-bit 06_11
 bit 06_12
 bit 06_13
 bit 06_14
 bit 06_15
 bit 06_17
 bit 06_20
+bit 06_21
 bit 06_22
+bit 06_24
 bit 06_28
 bit 06_29
 bit 06_30
@@ -281,7 +275,6 @@
 bit 06_35
 bit 06_36
 bit 06_37
-bit 06_39
 bit 06_43
 bit 06_46
 bit 06_49
@@ -315,22 +308,18 @@
 bit 06_89
 bit 06_91
 bit 06_92
-bit 06_93
 bit 06_94
 bit 06_97
 bit 06_99
 bit 06_100
 bit 06_101
-bit 06_103
 bit 06_107
 bit 06_113
 bit 06_115
 bit 06_116
-bit 06_117
 bit 06_119
 bit 06_121
 bit 06_123
-bit 06_125
 bit 07_00
 bit 07_02
 bit 07_03
@@ -351,6 +340,7 @@
 bit 07_22
 bit 07_23
 bit 07_24
+bit 07_25
 bit 07_26
 bit 07_27
 bit 07_28
@@ -364,13 +354,13 @@
 bit 07_38
 bit 07_39
 bit 07_40
-bit 07_43
 bit 07_44
 bit 07_46
 bit 07_47
 bit 07_48
 bit 07_50
 bit 07_51
+bit 07_52
 bit 07_53
 bit 07_54
 bit 07_55
@@ -381,12 +371,15 @@
 bit 07_62
 bit 07_63
 bit 07_64
+bit 07_65
 bit 07_67
 bit 07_68
 bit 07_69
 bit 07_70
 bit 07_71
 bit 07_72
+bit 07_73
+bit 07_74
 bit 07_75
 bit 07_76
 bit 07_77
@@ -405,6 +398,7 @@
 bit 07_95
 bit 07_96
 bit 07_98
+bit 07_99
 bit 07_100
 bit 07_102
 bit 07_103
@@ -440,22 +434,20 @@
 bit 08_16
 bit 08_17
 bit 08_18
-bit 08_19
 bit 08_20
-bit 08_21
 bit 08_22
 bit 08_23
 bit 08_24
 bit 08_25
 bit 08_26
 bit 08_28
-bit 08_29
 bit 08_30
 bit 08_31
 bit 08_32
 bit 08_33
 bit 08_34
 bit 08_35
+bit 08_36
 bit 08_38
 bit 08_39
 bit 08_40
@@ -506,7 +498,6 @@
 bit 08_89
 bit 08_90
 bit 08_92
-bit 08_93
 bit 08_94
 bit 08_95
 bit 08_96
@@ -552,12 +543,11 @@
 bit 09_13
 bit 09_15
 bit 09_16
-bit 09_18
 bit 09_19
 bit 09_20
 bit 09_21
 bit 09_23
-bit 09_25
+bit 09_24
 bit 09_26
 bit 09_27
 bit 09_28
@@ -579,7 +569,6 @@
 bit 09_50
 bit 09_51
 bit 09_52
-bit 09_55
 bit 09_56
 bit 09_57
 bit 09_58
@@ -587,6 +576,7 @@
 bit 09_60
 bit 09_61
 bit 09_63
+bit 09_64
 bit 09_65
 bit 09_66
 bit 09_67
@@ -595,9 +585,12 @@
 bit 09_71
 bit 09_72
 bit 09_73
+bit 09_74
 bit 09_75
+bit 09_76
 bit 09_77
 bit 09_79
+bit 09_80
 bit 09_82
 bit 09_83
 bit 09_84
@@ -607,7 +600,6 @@
 bit 09_92
 bit 09_93
 bit 09_94
-bit 09_95
 bit 09_96
 bit 09_98
 bit 09_99
@@ -649,7 +641,6 @@
 bit 10_18
 bit 10_19
 bit 10_20
-bit 10_21
 bit 10_22
 bit 10_23
 bit 10_24
@@ -677,11 +668,11 @@
 bit 10_50
 bit 10_51
 bit 10_52
-bit 10_53
 bit 10_54
 bit 10_55
 bit 10_57
 bit 10_58
+bit 10_60
 bit 10_61
 bit 10_62
 bit 10_63
@@ -719,11 +710,11 @@
 bit 10_97
 bit 10_98
 bit 10_99
+bit 10_100
 bit 10_101
 bit 10_103
 bit 10_104
 bit 10_106
-bit 10_109
 bit 10_110
 bit 10_111
 bit 10_113
@@ -735,12 +726,12 @@
 bit 10_120
 bit 10_121
 bit 10_122
+bit 10_124
 bit 10_125
 bit 10_127
 bit 11_01
 bit 11_02
 bit 11_03
-bit 11_04
 bit 11_05
 bit 11_07
 bit 11_09
@@ -770,8 +761,8 @@
 bit 11_36
 bit 11_39
 bit 11_41
+bit 11_42
 bit 11_43
-bit 11_44
 bit 11_45
 bit 11_46
 bit 11_47
@@ -807,6 +798,7 @@
 bit 11_89
 bit 11_90
 bit 11_91
+bit 11_92
 bit 11_93
 bit 11_95
 bit 11_96
@@ -818,6 +810,7 @@
 bit 11_103
 bit 11_105
 bit 11_107
+bit 11_108
 bit 11_109
 bit 11_111
 bit 11_112
@@ -849,9 +842,7 @@
 bit 12_15
 bit 12_16
 bit 12_17
-bit 12_18
 bit 12_19
-bit 12_21
 bit 12_22
 bit 12_23
 bit 12_25
@@ -878,6 +869,7 @@
 bit 12_49
 bit 12_50
 bit 12_51
+bit 12_52
 bit 12_53
 bit 12_54
 bit 12_55
@@ -895,7 +887,6 @@
 bit 12_69
 bit 12_70
 bit 12_71
-bit 12_72
 bit 12_73
 bit 12_74
 bit 12_75
@@ -918,6 +909,7 @@
 bit 12_97
 bit 12_98
 bit 12_99
+bit 12_100
 bit 12_101
 bit 12_103
 bit 12_105
@@ -926,17 +918,16 @@
 bit 12_109
 bit 12_110
 bit 12_111
-bit 12_112
 bit 12_113
 bit 12_114
 bit 12_115
 bit 12_117
 bit 12_118
 bit 12_119
+bit 12_120
 bit 12_121
 bit 12_122
 bit 12_123
-bit 12_124
 bit 12_125
 bit 12_127
 bit 13_00
@@ -974,7 +965,7 @@
 bit 13_34
 bit 13_35
 bit 13_36
-bit 13_38
+bit 13_37
 bit 13_39
 bit 13_41
 bit 13_42
@@ -984,6 +975,7 @@
 bit 13_48
 bit 13_49
 bit 13_50
+bit 13_51
 bit 13_52
 bit 13_53
 bit 13_54
@@ -1008,7 +1000,6 @@
 bit 13_74
 bit 13_75
 bit 13_76
-bit 13_77
 bit 13_78
 bit 13_79
 bit 13_80
@@ -1032,7 +1023,6 @@
 bit 13_99
 bit 13_100
 bit 13_101
-bit 13_102
 bit 13_103
 bit 13_104
 bit 13_105
@@ -1080,6 +1070,7 @@
 bit 14_23
 bit 14_26
 bit 14_27
+bit 14_28
 bit 14_29
 bit 14_30
 bit 14_31
@@ -1179,6 +1170,7 @@
 bit 15_47
 bit 15_49
 bit 15_51
+bit 15_53
 bit 15_55
 bit 15_57
 bit 15_59
@@ -1202,6 +1194,7 @@
 bit 15_79
 bit 15_80
 bit 15_81
+bit 15_82
 bit 15_83
 bit 15_84
 bit 15_85
@@ -1225,6 +1218,7 @@
 bit 15_111
 bit 15_113
 bit 15_115
+bit 15_117
 bit 15_119
 bit 15_121
 bit 15_123
@@ -1326,14 +1320,12 @@
 bit 17_71
 bit 17_73
 bit 17_79
-bit 17_80
 bit 17_85
 bit 17_86
 bit 17_87
 bit 17_88
 bit 17_94
 bit 17_95
-bit 17_96
 bit 17_99
 bit 17_102
 bit 17_103
@@ -1356,6 +1348,7 @@
 bit 18_06
 bit 18_07
 bit 18_08
+bit 18_09
 bit 18_14
 bit 18_17
 bit 18_20
@@ -1413,7 +1406,6 @@
 bit 18_125
 bit 18_127
 bit 19_03
-bit 19_06
 bit 19_07
 bit 19_08
 bit 19_09
@@ -1437,6 +1429,7 @@
 bit 19_47
 bit 19_49
 bit 19_50
+bit 19_54
 bit 19_55
 bit 19_56
 bit 19_57
@@ -1522,7 +1515,6 @@
 bit 21_20
 bit 21_21
 bit 21_22
-bit 21_23
 bit 21_30
 bit 21_34
 bit 21_35
@@ -1557,10 +1549,10 @@
 bit 21_118
 bit 21_121
 bit 21_122
-bit 21_124
 bit 21_126
 bit 22_02
 bit 22_06
+bit 22_07
 bit 22_09
 bit 22_15
 bit 22_16
@@ -1574,7 +1566,6 @@
 bit 22_35
 bit 22_38
 bit 22_39
-bit 22_40
 bit 22_42
 bit 22_43
 bit 22_44
@@ -1583,6 +1574,7 @@
 bit 22_48
 bit 22_51
 bit 22_54
+bit 22_55
 bit 22_56
 bit 22_57
 bit 22_58
@@ -1603,7 +1595,7 @@
 bit 22_96
 bit 22_99
 bit 22_102
-bit 22_104
+bit 22_103
 bit 22_106
 bit 22_107
 bit 22_108
@@ -1642,7 +1634,6 @@
 bit 23_48
 bit 23_51
 bit 23_54
-bit 23_55
 bit 23_56
 bit 23_57
 bit 23_58
@@ -1682,6 +1673,7 @@
 bit 24_05
 bit 24_06
 bit 24_07
+bit 24_08
 bit 24_09
 bit 24_13
 bit 24_15
diff --git a/artix7/segbits_int_l.origin_info.db b/artix7/segbits_int_l.origin_info.db
index b55716d..9e81f16 100644
--- a/artix7/segbits_int_l.origin_info.db
+++ b/artix7/segbits_int_l.origin_info.db
@@ -6,9 +6,9 @@
 INT_L.BYP_ALT0.FAN_BOUNCE2 origin:050-pip-seed !22_07 21_07 23_07 24_07 25_07
 INT_L.BYP_ALT0.FAN_BOUNCE7 origin:050-pip-seed !23_07 21_07 22_07 24_07 25_07
 INT_L.BYP_ALT0.GFAN0 origin:054-pip-fan-alt !22_07 !23_07 !25_07 20_07 24_07
-INT_L.BYP_ALT0.LOGIC_OUTS_L0 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_07 20_07 23_07 24_07 25_07
-INT_L.BYP_ALT0.LOGIC_OUTS_L12 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_07 20_07 22_07 24_07 25_07
-INT_L.BYP_ALT0.LOGIC_OUTS_L22 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_07 !23_07 !24_07 20_07 25_07
+INT_L.BYP_ALT0.LOGIC_OUTS_L0 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_07 20_07 23_07 24_07 25_07
+INT_L.BYP_ALT0.LOGIC_OUTS_L12 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_07 20_07 22_07 24_07 25_07
+INT_L.BYP_ALT0.LOGIC_OUTS_L22 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_07 !23_07 !24_07 20_07 25_07
 INT_L.BYP_ALT0.NE2END0 origin:050-pip-seed !22_07 !23_07 !24_07 19_06 25_07
 INT_L.BYP_ALT0.NL1END0 origin:050-pip-seed !23_07 18_06 22_07 24_07 25_07
 INT_L.BYP_ALT0.NN2END0 origin:050-pip-seed !22_07 !23_07 !25_07 19_06 24_07
@@ -30,9 +30,9 @@
 INT_L.BYP_ALT1.FAN_BOUNCE5 origin:050-pip-seed !23_15 21_15 22_15 24_15 25_15
 INT_L.BYP_ALT1.FAN_BOUNCE6 origin:050-pip-seed !22_15 21_15 23_15 24_15 25_15
 INT_L.BYP_ALT1.GFAN0 origin:054-pip-fan-alt !22_15 !23_15 !25_15 20_15 24_15
-INT_L.BYP_ALT1.LOGIC_OUTS_L18 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_15 !23_15 !24_15 20_15 25_15
-INT_L.BYP_ALT1.LOGIC_OUTS_L4 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_15 20_15 23_15 24_15 25_15
-INT_L.BYP_ALT1.LOGIC_OUTS_L8 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_15 20_15 22_15 24_15 25_15
+INT_L.BYP_ALT1.LOGIC_OUTS_L18 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_15 !23_15 !24_15 20_15 25_15
+INT_L.BYP_ALT1.LOGIC_OUTS_L4 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_15 20_15 23_15 24_15 25_15
+INT_L.BYP_ALT1.LOGIC_OUTS_L8 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_15 20_15 22_15 24_15 25_15
 INT_L.BYP_ALT1.NE2END1 origin:050-pip-seed !22_15 !23_15 !24_15 16_15 25_15
 INT_L.BYP_ALT1.NL1END1 origin:050-pip-seed !23_15 18_14 22_15 24_15 25_15
 INT_L.BYP_ALT1.NN2END1 origin:050-pip-seed !22_15 !23_15 !25_15 16_15 24_15
@@ -54,9 +54,9 @@
 INT_L.BYP_ALT2.FAN_BOUNCE1 origin:050-pip-seed !23_39 21_39 22_39 24_39 25_39
 INT_L.BYP_ALT2.FAN_BOUNCE_S3_0 origin:050-pip-seed !22_39 21_39 23_39 24_39 25_39
 INT_L.BYP_ALT2.GFAN1 origin:054-pip-fan-alt !22_39 !23_39 !25_39 20_39 24_39
-INT_L.BYP_ALT2.LOGIC_OUTS_L14 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_39 20_39 22_39 24_39 25_39
-INT_L.BYP_ALT2.LOGIC_OUTS_L2 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_39 20_39 23_39 24_39 25_39
-INT_L.BYP_ALT2.LOGIC_OUTS_L20 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_39 !23_39 !24_39 20_39 25_39
+INT_L.BYP_ALT2.LOGIC_OUTS_L14 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_39 20_39 22_39 24_39 25_39
+INT_L.BYP_ALT2.LOGIC_OUTS_L2 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_39 20_39 23_39 24_39 25_39
+INT_L.BYP_ALT2.LOGIC_OUTS_L20 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_39 !23_39 !24_39 20_39 25_39
 INT_L.BYP_ALT2.NE2END2 origin:050-pip-seed !22_39 !23_39 !24_39 19_38 25_39
 INT_L.BYP_ALT2.NL1END2 origin:050-pip-seed !23_39 18_38 22_39 24_39 25_39
 INT_L.BYP_ALT2.NN2END2 origin:050-pip-seed !22_39 !23_39 !25_39 19_38 24_39
@@ -78,9 +78,9 @@
 INT_L.BYP_ALT3.FAN_BOUNCE3 origin:050-pip-seed !23_47 21_47 22_47 24_47 25_47
 INT_L.BYP_ALT3.FAN_BOUNCE_S3_4 origin:050-pip-seed !22_47 21_47 23_47 24_47 25_47
 INT_L.BYP_ALT3.GFAN1 origin:054-pip-fan-alt !22_47 !23_47 !25_47 20_47 24_47
-INT_L.BYP_ALT3.LOGIC_OUTS_L10 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_47 20_47 22_47 24_47 25_47
-INT_L.BYP_ALT3.LOGIC_OUTS_L16 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_47 !23_47 !24_47 20_47 25_47
-INT_L.BYP_ALT3.LOGIC_OUTS_L6 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_47 20_47 23_47 24_47 25_47
+INT_L.BYP_ALT3.LOGIC_OUTS_L10 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_47 20_47 22_47 24_47 25_47
+INT_L.BYP_ALT3.LOGIC_OUTS_L16 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_47 !23_47 !24_47 20_47 25_47
+INT_L.BYP_ALT3.LOGIC_OUTS_L6 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_47 20_47 23_47 24_47 25_47
 INT_L.BYP_ALT3.NE2END3 origin:050-pip-seed !22_47 !23_47 !24_47 16_47 25_47
 INT_L.BYP_ALT3.NL1BEG_N3 origin:050-pip-seed !23_47 18_46 22_47 24_47 25_47
 INT_L.BYP_ALT3.NN2END3 origin:050-pip-seed !22_47 !23_47 !25_47 16_47 24_47
@@ -102,9 +102,9 @@
 INT_L.BYP_ALT4.FAN_BOUNCE1 origin:050-pip-seed !23_23 21_23 22_23 24_23 25_23
 INT_L.BYP_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_23 21_23 23_23 24_23 25_23
 INT_L.BYP_ALT4.GFAN0 origin:054-pip-fan-alt !22_23 !23_23 !25_23 20_23 24_23
-INT_L.BYP_ALT4.LOGIC_OUTS_L19 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_23 !23_23 !24_23 20_23 25_23
-INT_L.BYP_ALT4.LOGIC_OUTS_L5 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_23 20_23 23_23 24_23 25_23
-INT_L.BYP_ALT4.LOGIC_OUTS_L9 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_23 20_23 22_23 24_23 25_23
+INT_L.BYP_ALT4.LOGIC_OUTS_L19 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_23 !23_23 !24_23 20_23 25_23
+INT_L.BYP_ALT4.LOGIC_OUTS_L5 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_23 20_23 23_23 24_23 25_23
+INT_L.BYP_ALT4.LOGIC_OUTS_L9 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_23 20_23 22_23 24_23 25_23
 INT_L.BYP_ALT4.NE2END1 origin:050-pip-seed !22_23 !23_23 !24_23 19_22 25_23
 INT_L.BYP_ALT4.NL1END1 origin:050-pip-seed !23_23 18_22 22_23 24_23 25_23
 INT_L.BYP_ALT4.NN2END1 origin:050-pip-seed !22_23 !23_23 !25_23 19_22 24_23
@@ -126,9 +126,9 @@
 INT_L.BYP_ALT5.FAN_BOUNCE3 origin:050-pip-seed !23_31 21_31 22_31 24_31 25_31
 INT_L.BYP_ALT5.FAN_BOUNCE5 origin:050-pip-seed !22_31 21_31 23_31 24_31 25_31
 INT_L.BYP_ALT5.GFAN0 origin:054-pip-fan-alt !22_31 !23_31 !25_31 20_31 24_31
-INT_L.BYP_ALT5.LOGIC_OUTS_L1 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_31 20_31 23_31 24_31 25_31
-INT_L.BYP_ALT5.LOGIC_OUTS_L13 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_31 20_31 22_31 24_31 25_31
-INT_L.BYP_ALT5.LOGIC_OUTS_L23 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_31 !23_31 !24_31 20_31 25_31
+INT_L.BYP_ALT5.LOGIC_OUTS_L1 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_31 20_31 23_31 24_31 25_31
+INT_L.BYP_ALT5.LOGIC_OUTS_L13 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_31 20_31 22_31 24_31 25_31
+INT_L.BYP_ALT5.LOGIC_OUTS_L23 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_31 !23_31 !24_31 20_31 25_31
 INT_L.BYP_ALT5.NE2END2 origin:050-pip-seed !22_31 !23_31 !24_31 16_31 25_31
 INT_L.BYP_ALT5.NL1END2 origin:050-pip-seed !23_31 18_30 22_31 24_31 25_31
 INT_L.BYP_ALT5.NN2END2 origin:050-pip-seed !22_31 !23_31 !25_31 16_31 24_31
@@ -150,8 +150,8 @@
 INT_L.BYP_ALT6.FAN_BOUNCE_S3_0 origin:050-pip-seed !23_55 21_55 22_55 24_55 25_55
 INT_L.BYP_ALT6.FAN_BOUNCE_S3_2 origin:050-pip-seed !22_55 21_55 23_55 24_55 25_55
 INT_L.BYP_ALT6.GFAN1 origin:054-pip-fan-alt !22_55 !23_55 !25_55 20_55 24_55
-INT_L.BYP_ALT6.LOGIC_OUTS_L11 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_55 20_55 22_55 24_55 25_55
-INT_L.BYP_ALT6.LOGIC_OUTS_L17 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_55 !23_55 !24_55 20_55 25_55
+INT_L.BYP_ALT6.LOGIC_OUTS_L11 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_55 20_55 22_55 24_55 25_55
+INT_L.BYP_ALT6.LOGIC_OUTS_L17 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_55 !23_55 !24_55 20_55 25_55
 INT_L.BYP_ALT6.LOGIC_OUTS_L7 origin:051-pip-imuxlout-bypalts !22_55 20_55 23_55 24_55 25_55
 INT_L.BYP_ALT6.NE2END3 origin:050-pip-seed !22_55 !23_55 !24_55 19_54 25_55
 INT_L.BYP_ALT6.NL1BEG_N3 origin:050-pip-seed !23_55 18_54 22_55 24_55 25_55
@@ -174,8 +174,8 @@
 INT_L.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63
 INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63
 INT_L.BYP_ALT7.GFAN1 origin:054-pip-fan-alt !22_63 !23_63 !25_63 20_63 24_63
-INT_L.BYP_ALT7.LOGIC_OUTS_L15 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63
-INT_L.BYP_ALT7.LOGIC_OUTS_L21 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63
+INT_L.BYP_ALT7.LOGIC_OUTS_L15 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_63 20_63 22_63 24_63 25_63
+INT_L.BYP_ALT7.LOGIC_OUTS_L21 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_63 !23_63 !24_63 20_63 25_63
 INT_L.BYP_ALT7.LOGIC_OUTS_L3 origin:051-pip-imuxlout-bypalts !22_63 20_63 23_63 24_63 25_63
 INT_L.BYP_ALT7.NE2END_S3_0 origin:050-pip-seed !22_63 !23_63 !24_63 16_63 25_63
 INT_L.BYP_ALT7.NL1END_S3_0 origin:050-pip-seed !23_63 18_62 22_63 24_63 25_63
@@ -393,7 +393,7 @@
 INT_L.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
 INT_L.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
 INT_L.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
-INT_L.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
+INT_L.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43
 INT_L.EE4BEG3.EE2END3 origin:050-pip-seed 03_56 03_57
 INT_L.EE4BEG3.EE4END3 origin:050-pip-seed 03_57 05_56
 INT_L.EE4BEG3.LH0 origin:056-pip-rem 04_58 05_56
@@ -574,8 +574,8 @@
 INT_L.ER1BEG_S0.SW6END3 origin:050-pip-seed 07_58 12_59
 INT_L.ER1BEG_S0.WW2END3 origin:050-pip-seed 11_59 15_59
 INT_L.ER1BEG_S0.WW4END_S0_0 origin:050-pip-seed 11_59 12_59
-INT_L.FAN_ALT0.BYP_BOUNCE_N3_2 origin:050-pip-seed !22_00 !23_00 !25_00 20_00 24_00
-INT_L.FAN_ALT0.BYP_BOUNCE_N3_6 origin:056-pip-rem !22_00 !23_00 !24_00 20_00 25_00
+INT_L.FAN_ALT0.BYP_BOUNCE_N3_2 origin:059-pip-byp-bounce !22_00 !23_00 !25_00 20_00 24_00
+INT_L.FAN_ALT0.BYP_BOUNCE_N3_6 origin:059-pip-byp-bounce !22_00 !23_00 !24_00 20_00 25_00
 INT_L.FAN_ALT0.EE2END0 origin:050-pip-seed !22_00 !23_00 !24_00 19_01 25_00
 INT_L.FAN_ALT0.EL1END0 origin:050-pip-seed !22_00 17_00 23_00 24_00 25_00
 INT_L.FAN_ALT0.ER1END_N3_3 origin:050-pip-seed !23_00 16_00 22_00 24_00 25_00
@@ -598,8 +598,8 @@
 INT_L.FAN_ALT0.WL1END_N1_3 origin:050-pip-seed !22_00 16_00 23_00 24_00 25_00
 INT_L.FAN_ALT0.WR1END0 origin:050-pip-seed !23_00 17_00 22_00 24_00 25_00
 INT_L.FAN_ALT0.WW2END_N0_3 origin:050-pip-seed !22_00 !23_00 !24_00 16_00 25_00
-INT_L.FAN_ALT1.BYP_BOUNCE2 origin:050-pip-seed !22_48 !23_48 !25_48 20_48 24_48
-INT_L.FAN_ALT1.BYP_BOUNCE4 origin:050-pip-seed !22_48 !23_48 !24_48 20_48 25_48
+INT_L.FAN_ALT1.BYP_BOUNCE2 origin:059-pip-byp-bounce !22_48 !23_48 !25_48 20_48 24_48
+INT_L.FAN_ALT1.BYP_BOUNCE4 origin:059-pip-byp-bounce !22_48 !23_48 !24_48 20_48 25_48
 INT_L.FAN_ALT1.EE2END3 origin:050-pip-seed !22_48 !23_48 !24_48 19_49 25_48
 INT_L.FAN_ALT1.EL1END3 origin:050-pip-seed !22_48 17_48 23_48 24_48 25_48
 INT_L.FAN_ALT1.ER1END2 origin:050-pip-seed !23_48 16_48 22_48 24_48 25_48
@@ -622,8 +622,8 @@
 INT_L.FAN_ALT1.WL1END2 origin:050-pip-seed !22_48 16_48 23_48 24_48 25_48
 INT_L.FAN_ALT1.WR1END3 origin:050-pip-seed !23_48 17_48 22_48 24_48 25_48
 INT_L.FAN_ALT1.WW2END2 origin:050-pip-seed !22_48 !23_48 !24_48 16_48 25_48
-INT_L.FAN_ALT2.BYP_BOUNCE0 origin:050-pip-seed !22_16 !23_16 !24_16 20_16 25_16
-INT_L.FAN_ALT2.BYP_BOUNCE_N3_6 origin:050-pip-seed !22_16 !23_16 !25_16 20_16 24_16
+INT_L.FAN_ALT2.BYP_BOUNCE0 origin:059-pip-byp-bounce !22_16 !23_16 !24_16 20_16 25_16
+INT_L.FAN_ALT2.BYP_BOUNCE_N3_6 origin:059-pip-byp-bounce !22_16 !23_16 !25_16 20_16 24_16
 INT_L.FAN_ALT2.EE2END1 origin:050-pip-seed !22_16 !23_16 !24_16 19_17 25_16
 INT_L.FAN_ALT2.EL1END1 origin:050-pip-seed !22_16 17_16 23_16 24_16 25_16
 INT_L.FAN_ALT2.ER1END0 origin:050-pip-seed !23_16 16_16 22_16 24_16 25_16
@@ -646,8 +646,8 @@
 INT_L.FAN_ALT2.WL1END0 origin:050-pip-seed !22_16 16_16 23_16 24_16 25_16
 INT_L.FAN_ALT2.WR1END1 origin:050-pip-seed !23_16 17_16 22_16 24_16 25_16
 INT_L.FAN_ALT2.WW2END0 origin:050-pip-seed !22_16 !23_16 !24_16 16_16 25_16
-INT_L.FAN_ALT3.BYP_BOUNCE3 origin:050-pip-seed !22_56 !23_56 !25_56 20_56 24_56
-INT_L.FAN_ALT3.BYP_BOUNCE5 origin:050-pip-seed !22_56 !23_56 !24_56 20_56 25_56
+INT_L.FAN_ALT3.BYP_BOUNCE3 origin:059-pip-byp-bounce !22_56 !23_56 !25_56 20_56 24_56
+INT_L.FAN_ALT3.BYP_BOUNCE5 origin:059-pip-byp-bounce !22_56 !23_56 !24_56 20_56 25_56
 INT_L.FAN_ALT3.EE2END3 origin:050-pip-seed !22_56 !23_56 !24_56 16_56 25_56
 INT_L.FAN_ALT3.EL1END3 origin:050-pip-seed !22_56 16_56 23_56 24_56 25_56
 INT_L.FAN_ALT3.ER1END3 origin:050-pip-seed !23_56 17_56 22_56 24_56 25_56
@@ -670,15 +670,15 @@
 INT_L.FAN_ALT3.WL1END3 origin:050-pip-seed !22_56 17_56 23_56 24_56 25_56
 INT_L.FAN_ALT3.WR1END3 origin:050-pip-seed !23_56 16_56 22_56 24_56 25_56
 INT_L.FAN_ALT3.WW2END3 origin:050-pip-seed !22_56 !23_56 !24_56 19_57 25_56
-INT_L.FAN_ALT4.BYP_BOUNCE_N3_3 origin:056-pip-rem !22_08 !23_08 !24_08 20_08 25_08
-INT_L.FAN_ALT4.BYP_BOUNCE_N3_7 origin:056-pip-rem !22_08 !23_08 !25_08 20_08 24_08
+INT_L.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08
+INT_L.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08
 INT_L.FAN_ALT4.EE2END0 origin:050-pip-seed !22_08 !23_08 !24_08 16_08 25_08
 INT_L.FAN_ALT4.EL1END0 origin:050-pip-seed !22_08 16_08 23_08 24_08 25_08
 INT_L.FAN_ALT4.ER1END0 origin:050-pip-seed !23_08 17_08 22_08 24_08 25_08
 INT_L.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
-INT_L.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
+INT_L.FAN_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_08 20_08 23_08 24_08 25_08
 INT_L.FAN_ALT4.GFAN0 origin:054-pip-fan-alt !22_08 !23_08 !24_08 21_08 25_08
-INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:056-pip-rem !22_08 !23_08 !25_08 21_08 24_08
+INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
 INT_L.FAN_ALT4.LOGIC_OUTS_L4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
 INT_L.FAN_ALT4.LOGIC_OUTS_L8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
 INT_L.FAN_ALT4.NE2END0 origin:050-pip-seed !22_08 !23_08 !25_08 17_08 24_08
@@ -694,8 +694,8 @@
 INT_L.FAN_ALT4.WL1END0 origin:050-pip-seed !22_08 17_08 23_08 24_08 25_08
 INT_L.FAN_ALT4.WR1END0 origin:050-pip-seed !23_08 16_08 22_08 24_08 25_08
 INT_L.FAN_ALT4.WW2END0 origin:050-pip-seed !22_08 !23_08 !24_08 19_09 25_08
-INT_L.FAN_ALT5.BYP_BOUNCE1 origin:056-pip-rem !22_40 !23_40 !25_40 20_40 24_40
-INT_L.FAN_ALT5.BYP_BOUNCE5 origin:050-pip-seed !22_40 !23_40 !24_40 20_40 25_40
+INT_L.FAN_ALT5.BYP_BOUNCE1 origin:059-pip-byp-bounce !22_40 !23_40 !25_40 20_40 24_40
+INT_L.FAN_ALT5.BYP_BOUNCE5 origin:059-pip-byp-bounce !22_40 !23_40 !24_40 20_40 25_40
 INT_L.FAN_ALT5.EE2END2 origin:050-pip-seed !22_40 !23_40 !24_40 16_40 25_40
 INT_L.FAN_ALT5.EL1END2 origin:050-pip-seed !22_40 16_40 23_40 24_40 25_40
 INT_L.FAN_ALT5.ER1END2 origin:050-pip-seed !23_40 17_40 22_40 24_40 25_40
@@ -718,8 +718,8 @@
 INT_L.FAN_ALT5.WL1END2 origin:050-pip-seed !22_40 17_40 23_40 24_40 25_40
 INT_L.FAN_ALT5.WR1END2 origin:050-pip-seed !23_40 16_40 22_40 24_40 25_40
 INT_L.FAN_ALT5.WW2END2 origin:050-pip-seed !22_40 !23_40 !24_40 19_41 25_40
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+INT_L.FAN_ALT6.BYP_BOUNCE1 origin:059-pip-byp-bounce !22_24 !23_24 !24_24 20_24 25_24
+INT_L.FAN_ALT6.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_24 !23_24 !25_24 20_24 24_24
 INT_L.FAN_ALT6.EE2END1 origin:050-pip-seed !22_24 !23_24 !24_24 16_24 25_24
 INT_L.FAN_ALT6.EL1END1 origin:050-pip-seed !22_24 16_24 23_24 24_24 25_24
 INT_L.FAN_ALT6.ER1END1 origin:050-pip-seed !23_24 17_24 22_24 24_24 25_24
@@ -742,8 +742,8 @@
 INT_L.FAN_ALT6.WL1END1 origin:050-pip-seed !22_24 17_24 23_24 24_24 25_24
 INT_L.FAN_ALT6.WR1END1 origin:050-pip-seed !23_24 16_24 22_24 24_24 25_24
 INT_L.FAN_ALT6.WW2END1 origin:050-pip-seed !22_24 !23_24 !24_24 19_25 25_24
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-INT_L.FAN_ALT7.BYP_BOUNCE4 origin:050-pip-seed !22_32 !23_32 !25_32 20_32 24_32
+INT_L.FAN_ALT7.BYP_BOUNCE0 origin:059-pip-byp-bounce !22_32 !23_32 !24_32 20_32 25_32
+INT_L.FAN_ALT7.BYP_BOUNCE4 origin:059-pip-byp-bounce !22_32 !23_32 !25_32 20_32 24_32
 INT_L.FAN_ALT7.EE2END2 origin:050-pip-seed !22_32 !23_32 !24_32 19_33 25_32
 INT_L.FAN_ALT7.EL1END2 origin:050-pip-seed !22_32 17_32 23_32 24_32 25_32
 INT_L.FAN_ALT7.ER1END1 origin:050-pip-seed !23_32 16_32 22_32 24_32 25_32
@@ -806,9 +806,9 @@
 INT_L.IMUX_L0.FAN_BOUNCE2 origin:050-pip-seed !22_01 21_01 23_01 24_01 25_01
 INT_L.IMUX_L0.FAN_BOUNCE7 origin:050-pip-seed !23_01 21_01 22_01 24_01 25_01
 INT_L.IMUX_L0.GFAN0 origin:049-int-imux-gfan !22_01 !23_01 !25_01 20_01 24_01
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 INT_L.IMUX_L0.NE2END0 origin:050-pip-seed !22_01 !23_01 !24_01 16_01 25_01
 INT_L.IMUX_L0.NL1END0 origin:050-pip-seed !23_01 17_01 22_01 24_01 25_01
 INT_L.IMUX_L0.NN2END0 origin:050-pip-seed !22_01 !23_01 !25_01 16_01 24_01
@@ -830,9 +830,9 @@
 INT_L.IMUX_L1.FAN_BOUNCE5 origin:050-pip-seed !23_09 21_09 22_09 24_09 25_09
 INT_L.IMUX_L1.FAN_BOUNCE6 origin:050-pip-seed !22_09 21_09 23_09 24_09 25_09
 INT_L.IMUX_L1.GFAN0 origin:049-int-imux-gfan !22_09 !23_09 !25_09 20_09 24_09
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 INT_L.IMUX_L1.NE2END0 origin:050-pip-seed !22_09 !23_09 !24_09 19_08 25_09
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 INT_L.IMUX_L1.NN2END0 origin:050-pip-seed !22_09 !23_09 !25_09 19_08 24_09
@@ -854,9 +854,9 @@
 INT_L.IMUX_L10.FAN_BOUNCE1 origin:050-pip-seed !22_18 20_18 23_18 24_18 25_18
 INT_L.IMUX_L10.FAN_BOUNCE7 origin:050-pip-seed !23_18 20_18 22_18 24_18 25_18
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 INT_L.IMUX_L10.NE2END1 origin:050-pip-seed !22_18 !23_18 !25_18 17_18 24_18
 INT_L.IMUX_L10.NL1END1 origin:050-pip-seed !22_18 16_18 23_18 24_18 25_18
 INT_L.IMUX_L10.NN2END1 origin:050-pip-seed !22_18 !23_18 !24_18 17_18 25_18
@@ -878,9 +878,9 @@
 INT_L.IMUX_L11.FAN_BOUNCE3 origin:050-pip-seed !22_26 20_26 23_26 24_26 25_26
 INT_L.IMUX_L11.FAN_BOUNCE5 origin:050-pip-seed !23_26 20_26 22_26 24_26 25_26
 INT_L.IMUX_L11.GFAN0 origin:049-int-imux-gfan !22_26 !23_26 !24_26 21_26 25_26
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-INT_L.IMUX_L11.LOGIC_OUTS_L23 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_26 !23_26 !25_26 21_26 24_26
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 INT_L.IMUX_L11.NE2END1 origin:050-pip-seed !22_26 !23_26 !25_26 16_26 24_26
 INT_L.IMUX_L11.NL1END2 origin:050-pip-seed !22_26 16_26 23_26 24_26 25_26
 INT_L.IMUX_L11.NN2END1 origin:050-pip-seed !22_26 !23_26 !24_26 16_26 25_26
@@ -902,9 +902,9 @@
 INT_L.IMUX_L12.FAN_BOUNCE1 origin:050-pip-seed !22_34 20_34 23_34 24_34 25_34
 INT_L.IMUX_L12.FAN_BOUNCE_S3_0 origin:050-pip-seed !23_34 20_34 22_34 24_34 25_34
 INT_L.IMUX_L12.GFAN1 origin:049-int-imux-gfan !22_34 !23_34 !24_34 21_34 25_34
-INT_L.IMUX_L12.LOGIC_OUTS_L14 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_34 21_34 23_34 24_34 25_34
-INT_L.IMUX_L12.LOGIC_OUTS_L2 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_34 21_34 22_34 24_34 25_34
-INT_L.IMUX_L12.LOGIC_OUTS_L20 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_34 !23_34 !25_34 21_34 24_34
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+INT_L.IMUX_L12.LOGIC_OUTS_L2 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_34 21_34 22_34 24_34 25_34
+INT_L.IMUX_L12.LOGIC_OUTS_L20 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_34 !23_34 !25_34 21_34 24_34
 INT_L.IMUX_L12.NE2END2 origin:050-pip-seed !22_34 !23_34 !25_34 17_34 24_34
 INT_L.IMUX_L12.NL1END2 origin:050-pip-seed !22_34 16_34 23_34 24_34 25_34
 INT_L.IMUX_L12.NN2END2 origin:050-pip-seed !22_34 !23_34 !24_34 17_34 25_34
@@ -926,9 +926,9 @@
 INT_L.IMUX_L13.FAN_BOUNCE3 origin:050-pip-seed !22_42 20_42 23_42 24_42 25_42
 INT_L.IMUX_L13.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_42 20_42 22_42 24_42 25_42
 INT_L.IMUX_L13.GFAN1 origin:049-int-imux-gfan !22_42 !23_42 !24_42 21_42 25_42
-INT_L.IMUX_L13.LOGIC_OUTS_L10 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_42 21_42 23_42 24_42 25_42
-INT_L.IMUX_L13.LOGIC_OUTS_L16 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_42 !23_42 !25_42 21_42 24_42
-INT_L.IMUX_L13.LOGIC_OUTS_L6 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_42 21_42 22_42 24_42 25_42
+INT_L.IMUX_L13.LOGIC_OUTS_L10 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_42 21_42 23_42 24_42 25_42
+INT_L.IMUX_L13.LOGIC_OUTS_L16 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_42 !23_42 !25_42 21_42 24_42
+INT_L.IMUX_L13.LOGIC_OUTS_L6 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_42 21_42 22_42 24_42 25_42
 INT_L.IMUX_L13.NE2END2 origin:050-pip-seed !22_42 !23_42 !25_42 16_42 24_42
 INT_L.IMUX_L13.NL1BEG_N3 origin:050-pip-seed !22_42 16_42 23_42 24_42 25_42
 INT_L.IMUX_L13.NN2END2 origin:050-pip-seed !22_42 !23_42 !24_42 16_42 25_42
@@ -950,9 +950,9 @@
 INT_L.IMUX_L14.FAN_BOUNCE_S3_0 origin:050-pip-seed !22_50 20_50 23_50 24_50 25_50
 INT_L.IMUX_L14.FAN_BOUNCE_S3_2 origin:050-pip-seed !23_50 20_50 22_50 24_50 25_50
 INT_L.IMUX_L14.GFAN1 origin:049-int-imux-gfan !22_50 !23_50 !24_50 21_50 25_50
-INT_L.IMUX_L14.LOGIC_OUTS_L11 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_50 21_50 23_50 24_50 25_50
+INT_L.IMUX_L14.LOGIC_OUTS_L11 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_50 21_50 23_50 24_50 25_50
 INT_L.IMUX_L14.LOGIC_OUTS_L17 origin:051-pip-imuxlout-bypalts !22_50 !23_50 !25_50 21_50 24_50
-INT_L.IMUX_L14.LOGIC_OUTS_L7 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_50 21_50 22_50 24_50 25_50
+INT_L.IMUX_L14.LOGIC_OUTS_L7 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_50 21_50 22_50 24_50 25_50
 INT_L.IMUX_L14.NE2END3 origin:050-pip-seed !22_50 !23_50 !25_50 17_50 24_50
 INT_L.IMUX_L14.NL1BEG_N3 origin:050-pip-seed !22_50 16_50 23_50 24_50 25_50
 INT_L.IMUX_L14.NN2END3 origin:050-pip-seed !22_50 !23_50 !24_50 17_50 25_50
@@ -974,9 +974,9 @@
 INT_L.IMUX_L15.FAN_BOUNCE_S3_4 origin:050-pip-seed !22_58 20_58 23_58 24_58 25_58
 INT_L.IMUX_L15.FAN_BOUNCE_S3_6 origin:050-pip-seed !23_58 20_58 22_58 24_58 25_58
 INT_L.IMUX_L15.GFAN1 origin:049-int-imux-gfan !22_58 !23_58 !24_58 21_58 25_58
-INT_L.IMUX_L15.LOGIC_OUTS_L15 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_58 21_58 23_58 24_58 25_58
+INT_L.IMUX_L15.LOGIC_OUTS_L15 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_58 21_58 23_58 24_58 25_58
 INT_L.IMUX_L15.LOGIC_OUTS_L21 origin:051-pip-imuxlout-bypalts !22_58 !23_58 !25_58 21_58 24_58
-INT_L.IMUX_L15.LOGIC_OUTS_L3 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_58 21_58 22_58 24_58 25_58
+INT_L.IMUX_L15.LOGIC_OUTS_L3 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_58 21_58 22_58 24_58 25_58
 INT_L.IMUX_L15.NE2END3 origin:050-pip-seed !22_58 !23_58 !25_58 16_58 24_58
 INT_L.IMUX_L15.NL1END_S3_0 origin:050-pip-seed !22_58 16_58 23_58 24_58 25_58
 INT_L.IMUX_L15.NN2END3 origin:050-pip-seed !22_58 !23_58 !24_58 16_58 25_58
@@ -998,9 +998,9 @@
 INT_L.IMUX_L16.FAN_BOUNCE2 origin:050-pip-seed !22_03 21_03 23_03 24_03 25_03
 INT_L.IMUX_L16.FAN_BOUNCE7 origin:050-pip-seed !23_03 21_03 22_03 24_03 25_03
 INT_L.IMUX_L16.GFAN0 origin:049-int-imux-gfan !22_03 !23_03 !25_03 20_03 24_03
-INT_L.IMUX_L16.LOGIC_OUTS_L0 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_03 20_03 23_03 24_03 25_03
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-INT_L.IMUX_L16.LOGIC_OUTS_L22 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_03 !23_03 !24_03 20_03 25_03
+INT_L.IMUX_L16.LOGIC_OUTS_L0 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_03 20_03 23_03 24_03 25_03
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 INT_L.IMUX_L16.NE2END0 origin:050-pip-seed !22_03 !23_03 !24_03 19_02 25_03
 INT_L.IMUX_L16.NL1END0 origin:050-pip-seed !23_03 18_02 22_03 24_03 25_03
 INT_L.IMUX_L16.NN2END0 origin:050-pip-seed !22_03 !23_03 !25_03 19_02 24_03
@@ -1022,9 +1022,9 @@
 INT_L.IMUX_L17.FAN_BOUNCE5 origin:050-pip-seed !23_11 21_11 22_11 24_11 25_11
 INT_L.IMUX_L17.FAN_BOUNCE6 origin:050-pip-seed !22_11 21_11 23_11 24_11 25_11
 INT_L.IMUX_L17.GFAN0 origin:049-int-imux-gfan !22_11 !23_11 !25_11 20_11 24_11
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-INT_L.IMUX_L17.LOGIC_OUTS_L8 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_11 20_11 22_11 24_11 25_11
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 INT_L.IMUX_L17.NE2END0 origin:050-pip-seed !22_11 !23_11 !24_11 18_10 25_11
 INT_L.IMUX_L17.NL1END1 origin:050-pip-seed !23_11 18_10 22_11 24_11 25_11
 INT_L.IMUX_L17.NN2END0 origin:050-pip-seed !22_11 !23_11 !25_11 18_10 24_11
@@ -1046,9 +1046,9 @@
 INT_L.IMUX_L18.FAN_BOUNCE1 origin:050-pip-seed !23_19 21_19 22_19 24_19 25_19
 INT_L.IMUX_L18.FAN_BOUNCE7 origin:050-pip-seed !22_19 21_19 23_19 24_19 25_19
 INT_L.IMUX_L18.GFAN0 origin:049-int-imux-gfan !22_19 !23_19 !25_19 20_19 24_19
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-INT_L.IMUX_L18.LOGIC_OUTS_L9 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_19 20_19 22_19 24_19 25_19
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 INT_L.IMUX_L18.NE2END1 origin:050-pip-seed !22_19 !23_19 !24_19 19_18 25_19
 INT_L.IMUX_L18.NL1END1 origin:050-pip-seed !23_19 18_18 22_19 24_19 25_19
 INT_L.IMUX_L18.NN2END1 origin:050-pip-seed !22_19 !23_19 !25_19 19_18 24_19
@@ -1070,9 +1070,9 @@
 INT_L.IMUX_L19.FAN_BOUNCE3 origin:050-pip-seed !23_27 21_27 22_27 24_27 25_27
 INT_L.IMUX_L19.FAN_BOUNCE5 origin:050-pip-seed !22_27 21_27 23_27 24_27 25_27
 INT_L.IMUX_L19.GFAN0 origin:049-int-imux-gfan !22_27 !23_27 !25_27 20_27 24_27
-INT_L.IMUX_L19.LOGIC_OUTS_L1 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_27 20_27 23_27 24_27 25_27
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-INT_L.IMUX_L19.LOGIC_OUTS_L23 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_27 !23_27 !24_27 20_27 25_27
+INT_L.IMUX_L19.LOGIC_OUTS_L1 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_27 20_27 23_27 24_27 25_27
+INT_L.IMUX_L19.LOGIC_OUTS_L13 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_27 20_27 22_27 24_27 25_27
+INT_L.IMUX_L19.LOGIC_OUTS_L23 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_27 !23_27 !24_27 20_27 25_27
 INT_L.IMUX_L19.NE2END1 origin:050-pip-seed !22_27 !23_27 !24_27 18_26 25_27
 INT_L.IMUX_L19.NL1END2 origin:050-pip-seed !23_27 18_26 22_27 24_27 25_27
 INT_L.IMUX_L19.NN2END1 origin:050-pip-seed !22_27 !23_27 !25_27 18_26 24_27
@@ -1094,9 +1094,9 @@
 INT_L.IMUX_L2.FAN_BOUNCE1 origin:050-pip-seed !23_17 21_17 22_17 24_17 25_17
 INT_L.IMUX_L2.FAN_BOUNCE7 origin:050-pip-seed !22_17 21_17 23_17 24_17 25_17
 INT_L.IMUX_L2.GFAN0 origin:049-int-imux-gfan !22_17 !23_17 !25_17 20_17 24_17
-INT_L.IMUX_L2.LOGIC_OUTS_L19 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_17 !23_17 !24_17 20_17 25_17
-INT_L.IMUX_L2.LOGIC_OUTS_L5 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_17 20_17 23_17 24_17 25_17
-INT_L.IMUX_L2.LOGIC_OUTS_L9 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_17 20_17 22_17 24_17 25_17
+INT_L.IMUX_L2.LOGIC_OUTS_L19 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_17 !23_17 !24_17 20_17 25_17
+INT_L.IMUX_L2.LOGIC_OUTS_L5 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_17 20_17 23_17 24_17 25_17
+INT_L.IMUX_L2.LOGIC_OUTS_L9 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_17 20_17 22_17 24_17 25_17
 INT_L.IMUX_L2.NE2END1 origin:050-pip-seed !22_17 !23_17 !24_17 16_17 25_17
 INT_L.IMUX_L2.NL1END1 origin:050-pip-seed !23_17 17_17 22_17 24_17 25_17
 INT_L.IMUX_L2.NN2END1 origin:050-pip-seed !22_17 !23_17 !25_17 16_17 24_17
@@ -1118,9 +1118,9 @@
 INT_L.IMUX_L20.FAN_BOUNCE1 origin:050-pip-seed !23_35 21_35 22_35 24_35 25_35
 INT_L.IMUX_L20.FAN_BOUNCE_S3_0 origin:050-pip-seed !22_35 21_35 23_35 24_35 25_35
 INT_L.IMUX_L20.GFAN1 origin:049-int-imux-gfan !22_35 !23_35 !25_35 20_35 24_35
-INT_L.IMUX_L20.LOGIC_OUTS_L14 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_35 20_35 22_35 24_35 25_35
-INT_L.IMUX_L20.LOGIC_OUTS_L2 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_35 20_35 23_35 24_35 25_35
-INT_L.IMUX_L20.LOGIC_OUTS_L20 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_35 !23_35 !24_35 20_35 25_35
+INT_L.IMUX_L20.LOGIC_OUTS_L14 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_35 20_35 22_35 24_35 25_35
+INT_L.IMUX_L20.LOGIC_OUTS_L2 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_35 20_35 23_35 24_35 25_35
+INT_L.IMUX_L20.LOGIC_OUTS_L20 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_35 !23_35 !24_35 20_35 25_35
 INT_L.IMUX_L20.NE2END2 origin:050-pip-seed !22_35 !23_35 !24_35 19_34 25_35
 INT_L.IMUX_L20.NL1END2 origin:050-pip-seed !23_35 18_34 22_35 24_35 25_35
 INT_L.IMUX_L20.NN2END2 origin:050-pip-seed !22_35 !23_35 !25_35 19_34 24_35
@@ -1143,8 +1143,8 @@
 INT_L.IMUX_L21.FAN_BOUNCE_S3_4 origin:050-pip-seed !22_43 21_43 23_43 24_43 25_43
 INT_L.IMUX_L21.GFAN1 origin:049-int-imux-gfan !22_43 !23_43 !25_43 20_43 24_43
 INT_L.IMUX_L21.LOGIC_OUTS_L10 origin:051-pip-imuxlout-bypalts !23_43 20_43 22_43 24_43 25_43
-INT_L.IMUX_L21.LOGIC_OUTS_L16 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_43 !23_43 !24_43 20_43 25_43
-INT_L.IMUX_L21.LOGIC_OUTS_L6 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_43 20_43 23_43 24_43 25_43
+INT_L.IMUX_L21.LOGIC_OUTS_L16 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_43 !23_43 !24_43 20_43 25_43
+INT_L.IMUX_L21.LOGIC_OUTS_L6 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_43 20_43 23_43 24_43 25_43
 INT_L.IMUX_L21.NE2END2 origin:050-pip-seed !22_43 !23_43 !24_43 18_42 25_43
 INT_L.IMUX_L21.NL1BEG_N3 origin:050-pip-seed !23_43 18_42 22_43 24_43 25_43
 INT_L.IMUX_L21.NN2END2 origin:050-pip-seed !22_43 !23_43 !25_43 18_42 24_43
@@ -1166,9 +1166,9 @@
 INT_L.IMUX_L22.FAN_BOUNCE_S3_0 origin:050-pip-seed !23_51 21_51 22_51 24_51 25_51
 INT_L.IMUX_L22.FAN_BOUNCE_S3_2 origin:050-pip-seed !22_51 21_51 23_51 24_51 25_51
 INT_L.IMUX_L22.GFAN1 origin:049-int-imux-gfan !22_51 !23_51 !25_51 20_51 24_51
-INT_L.IMUX_L22.LOGIC_OUTS_L11 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_51 20_51 22_51 24_51 25_51
-INT_L.IMUX_L22.LOGIC_OUTS_L17 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_51 !23_51 !24_51 20_51 25_51
-INT_L.IMUX_L22.LOGIC_OUTS_L7 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_51 20_51 23_51 24_51 25_51
+INT_L.IMUX_L22.LOGIC_OUTS_L11 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_51 20_51 22_51 24_51 25_51
+INT_L.IMUX_L22.LOGIC_OUTS_L17 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_51 !23_51 !24_51 20_51 25_51
+INT_L.IMUX_L22.LOGIC_OUTS_L7 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_51 20_51 23_51 24_51 25_51
 INT_L.IMUX_L22.NE2END3 origin:050-pip-seed !22_51 !23_51 !24_51 19_50 25_51
 INT_L.IMUX_L22.NL1BEG_N3 origin:050-pip-seed !23_51 18_50 22_51 24_51 25_51
 INT_L.IMUX_L22.NN2END3 origin:050-pip-seed !22_51 !23_51 !25_51 19_50 24_51
@@ -1190,9 +1190,9 @@
 INT_L.IMUX_L23.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_59 21_59 22_59 24_59 25_59
 INT_L.IMUX_L23.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_59 21_59 23_59 24_59 25_59
 INT_L.IMUX_L23.GFAN1 origin:049-int-imux-gfan !22_59 !23_59 !25_59 20_59 24_59
-INT_L.IMUX_L23.LOGIC_OUTS_L15 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_59 20_59 22_59 24_59 25_59
-INT_L.IMUX_L23.LOGIC_OUTS_L21 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_59 !23_59 !24_59 20_59 25_59
-INT_L.IMUX_L23.LOGIC_OUTS_L3 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_59 20_59 23_59 24_59 25_59
+INT_L.IMUX_L23.LOGIC_OUTS_L15 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_59 20_59 22_59 24_59 25_59
+INT_L.IMUX_L23.LOGIC_OUTS_L21 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_59 !23_59 !24_59 20_59 25_59
+INT_L.IMUX_L23.LOGIC_OUTS_L3 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_59 20_59 23_59 24_59 25_59
 INT_L.IMUX_L23.NE2END3 origin:050-pip-seed !22_59 !23_59 !24_59 18_58 25_59
 INT_L.IMUX_L23.NL1END_S3_0 origin:050-pip-seed !23_59 18_58 22_59 24_59 25_59
 INT_L.IMUX_L23.NN2END3 origin:050-pip-seed !22_59 !23_59 !25_59 18_58 24_59
@@ -1214,9 +1214,9 @@
 INT_L.IMUX_L24.FAN_BOUNCE2 origin:050-pip-seed !23_04 20_04 22_04 24_04 25_04
 INT_L.IMUX_L24.FAN_BOUNCE7 origin:050-pip-seed !22_04 20_04 23_04 24_04 25_04
 INT_L.IMUX_L24.GFAN0 origin:049-int-imux-gfan !22_04 !23_04 !24_04 21_04 25_04
-INT_L.IMUX_L24.LOGIC_OUTS_L0 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_04 21_04 22_04 24_04 25_04
-INT_L.IMUX_L24.LOGIC_OUTS_L12 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_04 21_04 23_04 24_04 25_04
-INT_L.IMUX_L24.LOGIC_OUTS_L22 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_04 !23_04 !25_04 21_04 24_04
+INT_L.IMUX_L24.LOGIC_OUTS_L0 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_04 21_04 22_04 24_04 25_04
+INT_L.IMUX_L24.LOGIC_OUTS_L12 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_04 21_04 23_04 24_04 25_04
+INT_L.IMUX_L24.LOGIC_OUTS_L22 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_04 !23_04 !25_04 21_04 24_04
 INT_L.IMUX_L24.NE2END0 origin:050-pip-seed !22_04 !23_04 !25_04 18_05 24_04
 INT_L.IMUX_L24.NL1END0 origin:050-pip-seed !22_04 19_05 23_04 24_04 25_04
 INT_L.IMUX_L24.NN2END0 origin:050-pip-seed !22_04 !23_04 !24_04 18_05 25_04
@@ -1238,9 +1238,9 @@
 INT_L.IMUX_L25.FAN_BOUNCE5 origin:050-pip-seed !22_12 20_12 23_12 24_12 25_12
 INT_L.IMUX_L25.FAN_BOUNCE6 origin:050-pip-seed !23_12 20_12 22_12 24_12 25_12
 INT_L.IMUX_L25.GFAN0 origin:049-int-imux-gfan !22_12 !23_12 !24_12 21_12 25_12
-INT_L.IMUX_L25.LOGIC_OUTS_L18 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_12 !23_12 !25_12 21_12 24_12
-INT_L.IMUX_L25.LOGIC_OUTS_L4 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_12 21_12 22_12 24_12 25_12
-INT_L.IMUX_L25.LOGIC_OUTS_L8 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_12 21_12 23_12 24_12 25_12
+INT_L.IMUX_L25.LOGIC_OUTS_L18 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_12 !23_12 !25_12 21_12 24_12
+INT_L.IMUX_L25.LOGIC_OUTS_L4 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_12 21_12 22_12 24_12 25_12
+INT_L.IMUX_L25.LOGIC_OUTS_L8 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_12 21_12 23_12 24_12 25_12
 INT_L.IMUX_L25.NE2END1 origin:050-pip-seed !22_12 !23_12 !25_12 19_13 24_12
 INT_L.IMUX_L25.NL1END1 origin:050-pip-seed !22_12 19_13 23_12 24_12 25_12
 INT_L.IMUX_L25.NN2END1 origin:050-pip-seed !22_12 !23_12 !24_12 19_13 25_12
@@ -1262,8 +1262,8 @@
 INT_L.IMUX_L26.FAN_BOUNCE1 origin:050-pip-seed !22_20 20_20 23_20 24_20 25_20
 INT_L.IMUX_L26.FAN_BOUNCE7 origin:050-pip-seed !23_20 20_20 22_20 24_20 25_20
 INT_L.IMUX_L26.GFAN0 origin:049-int-imux-gfan !22_20 !23_20 !24_20 21_20 25_20
-INT_L.IMUX_L26.LOGIC_OUTS_L19 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_20 !23_20 !25_20 21_20 24_20
-INT_L.IMUX_L26.LOGIC_OUTS_L5 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_20 21_20 22_20 24_20 25_20
+INT_L.IMUX_L26.LOGIC_OUTS_L19 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_20 !23_20 !25_20 21_20 24_20
+INT_L.IMUX_L26.LOGIC_OUTS_L5 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_20 21_20 22_20 24_20 25_20
 INT_L.IMUX_L26.LOGIC_OUTS_L9 origin:051-pip-imuxlout-bypalts !22_20 21_20 23_20 24_20 25_20
 INT_L.IMUX_L26.NE2END1 origin:050-pip-seed !22_20 !23_20 !25_20 18_21 24_20
 INT_L.IMUX_L26.NL1END1 origin:050-pip-seed !22_20 19_21 23_20 24_20 25_20
@@ -1286,9 +1286,9 @@
 INT_L.IMUX_L27.FAN_BOUNCE3 origin:050-pip-seed !22_28 20_28 23_28 24_28 25_28
 INT_L.IMUX_L27.FAN_BOUNCE5 origin:050-pip-seed !23_28 20_28 22_28 24_28 25_28
 INT_L.IMUX_L27.GFAN0 origin:049-int-imux-gfan !22_28 !23_28 !24_28 21_28 25_28
-INT_L.IMUX_L27.LOGIC_OUTS_L1 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_28 21_28 22_28 24_28 25_28
+INT_L.IMUX_L27.LOGIC_OUTS_L1 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_28 21_28 22_28 24_28 25_28
 INT_L.IMUX_L27.LOGIC_OUTS_L13 origin:051-pip-imuxlout-bypalts !22_28 21_28 23_28 24_28 25_28
-INT_L.IMUX_L27.LOGIC_OUTS_L23 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_28 !23_28 !25_28 21_28 24_28
+INT_L.IMUX_L27.LOGIC_OUTS_L23 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_28 !23_28 !25_28 21_28 24_28
 INT_L.IMUX_L27.NE2END2 origin:050-pip-seed !22_28 !23_28 !25_28 19_29 24_28
 INT_L.IMUX_L27.NL1END2 origin:050-pip-seed !22_28 19_29 23_28 24_28 25_28
 INT_L.IMUX_L27.NN2END2 origin:050-pip-seed !22_28 !23_28 !24_28 19_29 25_28
@@ -1311,8 +1311,8 @@
 INT_L.IMUX_L28.FAN_BOUNCE_S3_0 origin:050-pip-seed !23_36 20_36 22_36 24_36 25_36
 INT_L.IMUX_L28.GFAN1 origin:049-int-imux-gfan !22_36 !23_36 !24_36 21_36 25_36
 INT_L.IMUX_L28.LOGIC_OUTS_L14 origin:051-pip-imuxlout-bypalts !22_36 21_36 23_36 24_36 25_36
-INT_L.IMUX_L28.LOGIC_OUTS_L2 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_36 21_36 22_36 24_36 25_36
-INT_L.IMUX_L28.LOGIC_OUTS_L20 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_36 !23_36 !25_36 21_36 24_36
+INT_L.IMUX_L28.LOGIC_OUTS_L2 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_36 21_36 22_36 24_36 25_36
+INT_L.IMUX_L28.LOGIC_OUTS_L20 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_36 !23_36 !25_36 21_36 24_36
 INT_L.IMUX_L28.NE2END2 origin:050-pip-seed !22_36 !23_36 !25_36 18_37 24_36
 INT_L.IMUX_L28.NL1END2 origin:050-pip-seed !22_36 19_37 23_36 24_36 25_36
 INT_L.IMUX_L28.NN2END2 origin:050-pip-seed !22_36 !23_36 !24_36 18_37 25_36
@@ -1334,9 +1334,9 @@
 INT_L.IMUX_L29.FAN_BOUNCE3 origin:050-pip-seed !22_44 20_44 23_44 24_44 25_44
 INT_L.IMUX_L29.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_44 20_44 22_44 24_44 25_44
 INT_L.IMUX_L29.GFAN1 origin:049-int-imux-gfan !22_44 !23_44 !24_44 21_44 25_44
-INT_L.IMUX_L29.LOGIC_OUTS_L10 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_44 21_44 23_44 24_44 25_44
-INT_L.IMUX_L29.LOGIC_OUTS_L16 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_44 !23_44 !25_44 21_44 24_44
-INT_L.IMUX_L29.LOGIC_OUTS_L6 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_44 21_44 22_44 24_44 25_44
+INT_L.IMUX_L29.LOGIC_OUTS_L10 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_44 21_44 23_44 24_44 25_44
+INT_L.IMUX_L29.LOGIC_OUTS_L16 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_44 !23_44 !25_44 21_44 24_44
+INT_L.IMUX_L29.LOGIC_OUTS_L6 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_44 21_44 22_44 24_44 25_44
 INT_L.IMUX_L29.NE2END3 origin:050-pip-seed !22_44 !23_44 !25_44 19_45 24_44
 INT_L.IMUX_L29.NL1BEG_N3 origin:050-pip-seed !22_44 19_45 23_44 24_44 25_44
 INT_L.IMUX_L29.NN2END3 origin:050-pip-seed !22_44 !23_44 !24_44 19_45 25_44
@@ -1358,9 +1358,9 @@
 INT_L.IMUX_L3.FAN_BOUNCE3 origin:050-pip-seed !23_25 21_25 22_25 24_25 25_25
 INT_L.IMUX_L3.FAN_BOUNCE5 origin:050-pip-seed !22_25 21_25 23_25 24_25 25_25
 INT_L.IMUX_L3.GFAN0 origin:049-int-imux-gfan !22_25 !23_25 !25_25 20_25 24_25
-INT_L.IMUX_L3.LOGIC_OUTS_L1 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_25 20_25 23_25 24_25 25_25
-INT_L.IMUX_L3.LOGIC_OUTS_L13 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_25 20_25 22_25 24_25 25_25
-INT_L.IMUX_L3.LOGIC_OUTS_L23 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_25 !23_25 !24_25 20_25 25_25
+INT_L.IMUX_L3.LOGIC_OUTS_L1 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_25 20_25 23_25 24_25 25_25
+INT_L.IMUX_L3.LOGIC_OUTS_L13 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_25 20_25 22_25 24_25 25_25
+INT_L.IMUX_L3.LOGIC_OUTS_L23 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_25 !23_25 !24_25 20_25 25_25
 INT_L.IMUX_L3.NE2END1 origin:050-pip-seed !22_25 !23_25 !24_25 19_24 25_25
 INT_L.IMUX_L3.NL1END2 origin:050-pip-seed !23_25 17_25 22_25 24_25 25_25
 INT_L.IMUX_L3.NN2END1 origin:050-pip-seed !22_25 !23_25 !25_25 19_24 24_25
@@ -1382,9 +1382,9 @@
 INT_L.IMUX_L30.FAN_BOUNCE_S3_0 origin:050-pip-seed !22_52 20_52 23_52 24_52 25_52
 INT_L.IMUX_L30.FAN_BOUNCE_S3_2 origin:050-pip-seed !23_52 20_52 22_52 24_52 25_52
 INT_L.IMUX_L30.GFAN1 origin:049-int-imux-gfan !22_52 !23_52 !24_52 21_52 25_52
-INT_L.IMUX_L30.LOGIC_OUTS_L11 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_52 21_52 23_52 24_52 25_52
-INT_L.IMUX_L30.LOGIC_OUTS_L17 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_52 !23_52 !25_52 21_52 24_52
-INT_L.IMUX_L30.LOGIC_OUTS_L7 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_52 21_52 22_52 24_52 25_52
+INT_L.IMUX_L30.LOGIC_OUTS_L11 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_52 21_52 23_52 24_52 25_52
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+INT_L.IMUX_L30.LOGIC_OUTS_L7 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_52 21_52 22_52 24_52 25_52
 INT_L.IMUX_L30.NE2END3 origin:050-pip-seed !22_52 !23_52 !25_52 18_53 24_52
 INT_L.IMUX_L30.NL1BEG_N3 origin:050-pip-seed !22_52 19_53 23_52 24_52 25_52
 INT_L.IMUX_L30.NN2END3 origin:050-pip-seed !22_52 !23_52 !24_52 18_53 25_52
@@ -1406,9 +1406,9 @@
 INT_L.IMUX_L31.FAN_BOUNCE_S3_4 origin:050-pip-seed !22_60 20_60 23_60 24_60 25_60
 INT_L.IMUX_L31.FAN_BOUNCE_S3_6 origin:050-pip-seed !23_60 20_60 22_60 24_60 25_60
 INT_L.IMUX_L31.GFAN1 origin:049-int-imux-gfan !22_60 !23_60 !24_60 21_60 25_60
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 INT_L.IMUX_L31.NE2END_S3_0 origin:050-pip-seed !22_60 !23_60 !25_60 19_61 24_60
 INT_L.IMUX_L31.NL1END_S3_0 origin:050-pip-seed !22_60 19_61 23_60 24_60 25_60
 INT_L.IMUX_L31.NN2END_S2_0 origin:050-pip-seed !22_60 !23_60 !24_60 19_61 25_60
@@ -1430,8 +1430,8 @@
 INT_L.IMUX_L32.FAN_BOUNCE2 origin:050-pip-seed !22_05 21_05 23_05 24_05 25_05
 INT_L.IMUX_L32.FAN_BOUNCE7 origin:050-pip-seed !23_05 21_05 22_05 24_05 25_05
 INT_L.IMUX_L32.GFAN0 origin:049-int-imux-gfan !22_05 !23_05 !25_05 20_05 24_05
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 INT_L.IMUX_L32.LOGIC_OUTS_L22 origin:051-pip-imuxlout-bypalts !22_05 !23_05 !24_05 20_05 25_05
 INT_L.IMUX_L32.NE2END0 origin:050-pip-seed !22_05 !23_05 !24_05 16_05 25_05
 INT_L.IMUX_L32.NL1END0 origin:050-pip-seed !23_05 17_05 22_05 24_05 25_05
@@ -1455,8 +1455,8 @@
 INT_L.IMUX_L33.FAN_BOUNCE6 origin:050-pip-seed !22_13 21_13 23_13 24_13 25_13
 INT_L.IMUX_L33.GFAN0 origin:049-int-imux-gfan !22_13 !23_13 !25_13 20_13 24_13
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-INT_L.IMUX_L33.LOGIC_OUTS_L8 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_13 20_13 22_13 24_13 25_13
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+INT_L.IMUX_L33.LOGIC_OUTS_L8 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_13 20_13 22_13 24_13 25_13
 INT_L.IMUX_L33.NE2END1 origin:050-pip-seed !22_13 !23_13 !24_13 17_13 25_13
 INT_L.IMUX_L33.NL1END1 origin:050-pip-seed !23_13 17_13 22_13 24_13 25_13
 INT_L.IMUX_L33.NN2END1 origin:050-pip-seed !22_13 !23_13 !25_13 17_13 24_13
@@ -1478,9 +1478,9 @@
 INT_L.IMUX_L34.FAN_BOUNCE1 origin:050-pip-seed !23_21 21_21 22_21 24_21 25_21
 INT_L.IMUX_L34.FAN_BOUNCE7 origin:050-pip-seed !22_21 21_21 23_21 24_21 25_21
 INT_L.IMUX_L34.GFAN0 origin:049-int-imux-gfan !22_21 !23_21 !25_21 20_21 24_21
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 INT_L.IMUX_L34.NE2END1 origin:050-pip-seed !22_21 !23_21 !24_21 16_21 25_21
 INT_L.IMUX_L34.NL1END1 origin:050-pip-seed !23_21 17_21 22_21 24_21 25_21
 INT_L.IMUX_L34.NN2END1 origin:050-pip-seed !22_21 !23_21 !25_21 16_21 24_21
@@ -1502,9 +1502,9 @@
 INT_L.IMUX_L35.FAN_BOUNCE3 origin:050-pip-seed !23_29 21_29 22_29 24_29 25_29
 INT_L.IMUX_L35.FAN_BOUNCE5 origin:050-pip-seed !22_29 21_29 23_29 24_29 25_29
 INT_L.IMUX_L35.GFAN0 origin:049-int-imux-gfan !22_29 !23_29 !25_29 20_29 24_29
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 INT_L.IMUX_L35.NE2END2 origin:050-pip-seed !22_29 !23_29 !24_29 17_29 25_29
 INT_L.IMUX_L35.NL1END2 origin:050-pip-seed !23_29 17_29 22_29 24_29 25_29
 INT_L.IMUX_L35.NN2END2 origin:050-pip-seed !22_29 !23_29 !25_29 17_29 24_29
@@ -1526,9 +1526,9 @@
 INT_L.IMUX_L36.FAN_BOUNCE1 origin:050-pip-seed !23_37 21_37 22_37 24_37 25_37
 INT_L.IMUX_L36.FAN_BOUNCE_S3_0 origin:050-pip-seed !22_37 21_37 23_37 24_37 25_37
 INT_L.IMUX_L36.GFAN1 origin:049-int-imux-gfan !22_37 !23_37 !25_37 20_37 24_37
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-INT_L.IMUX_L36.LOGIC_OUTS_L20 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_37 !23_37 !24_37 20_37 25_37
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 INT_L.IMUX_L36.NE2END2 origin:050-pip-seed !22_37 !23_37 !24_37 16_37 25_37
 INT_L.IMUX_L36.NL1END2 origin:050-pip-seed !23_37 17_37 22_37 24_37 25_37
 INT_L.IMUX_L36.NN2END2 origin:050-pip-seed !22_37 !23_37 !25_37 16_37 24_37
@@ -1550,9 +1550,9 @@
 INT_L.IMUX_L37.FAN_BOUNCE3 origin:050-pip-seed !23_45 21_45 22_45 24_45 25_45
 INT_L.IMUX_L37.FAN_BOUNCE_S3_4 origin:050-pip-seed !22_45 21_45 23_45 24_45 25_45
 INT_L.IMUX_L37.GFAN1 origin:049-int-imux-gfan !22_45 !23_45 !25_45 20_45 24_45
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-INT_L.IMUX_L37.LOGIC_OUTS_L6 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_45 20_45 23_45 24_45 25_45
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+INT_L.IMUX_L37.LOGIC_OUTS_L6 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_45 20_45 23_45 24_45 25_45
 INT_L.IMUX_L37.NE2END3 origin:050-pip-seed !22_45 !23_45 !24_45 17_45 25_45
 INT_L.IMUX_L37.NL1BEG_N3 origin:050-pip-seed !23_45 17_45 22_45 24_45 25_45
 INT_L.IMUX_L37.NN2END3 origin:050-pip-seed !22_45 !23_45 !25_45 17_45 24_45
@@ -1574,9 +1574,9 @@
 INT_L.IMUX_L38.FAN_BOUNCE_S3_0 origin:050-pip-seed !23_53 21_53 22_53 24_53 25_53
 INT_L.IMUX_L38.FAN_BOUNCE_S3_2 origin:050-pip-seed !22_53 21_53 23_53 24_53 25_53
 INT_L.IMUX_L38.GFAN1 origin:049-int-imux-gfan !22_53 !23_53 !25_53 20_53 24_53
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-INT_L.IMUX_L38.LOGIC_OUTS_L7 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_53 20_53 23_53 24_53 25_53
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+INT_L.IMUX_L38.LOGIC_OUTS_L7 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_53 20_53 23_53 24_53 25_53
 INT_L.IMUX_L38.NE2END3 origin:050-pip-seed !22_53 !23_53 !24_53 16_53 25_53
 INT_L.IMUX_L38.NL1BEG_N3 origin:050-pip-seed !23_53 17_53 22_53 24_53 25_53
 INT_L.IMUX_L38.NN2END3 origin:050-pip-seed !22_53 !23_53 !25_53 16_53 24_53
@@ -1598,9 +1598,9 @@
 INT_L.IMUX_L39.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_61 21_61 22_61 24_61 25_61
 INT_L.IMUX_L39.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_61 21_61 23_61 24_61 25_61
 INT_L.IMUX_L39.GFAN1 origin:049-int-imux-gfan !22_61 !23_61 !25_61 20_61 24_61
-INT_L.IMUX_L39.LOGIC_OUTS_L15 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_61 20_61 22_61 24_61 25_61
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-INT_L.IMUX_L39.LOGIC_OUTS_L3 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_61 20_61 23_61 24_61 25_61
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+INT_L.IMUX_L39.LOGIC_OUTS_L3 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_61 20_61 23_61 24_61 25_61
 INT_L.IMUX_L39.NE2END_S3_0 origin:050-pip-seed !22_61 !23_61 !24_61 17_61 25_61
 INT_L.IMUX_L39.NL1END_S3_0 origin:050-pip-seed !23_61 17_61 22_61 24_61 25_61
 INT_L.IMUX_L39.NN2END_S2_0 origin:050-pip-seed !22_61 !23_61 !25_61 17_61 24_61
@@ -1622,9 +1622,9 @@
 INT_L.IMUX_L4.FAN_BOUNCE1 origin:050-pip-seed !23_33 21_33 22_33 24_33 25_33
 INT_L.IMUX_L4.FAN_BOUNCE_S3_0 origin:050-pip-seed !22_33 21_33 23_33 24_33 25_33
 INT_L.IMUX_L4.GFAN1 origin:049-int-imux-gfan !22_33 !23_33 !25_33 20_33 24_33
-INT_L.IMUX_L4.LOGIC_OUTS_L14 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_33 20_33 22_33 24_33 25_33
-INT_L.IMUX_L4.LOGIC_OUTS_L2 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_33 20_33 23_33 24_33 25_33
-INT_L.IMUX_L4.LOGIC_OUTS_L20 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_33 !23_33 !24_33 20_33 25_33
+INT_L.IMUX_L4.LOGIC_OUTS_L14 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_33 20_33 22_33 24_33 25_33
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 INT_L.IMUX_L4.NE2END2 origin:050-pip-seed !22_33 !23_33 !24_33 16_33 25_33
 INT_L.IMUX_L4.NL1END2 origin:050-pip-seed !23_33 17_33 22_33 24_33 25_33
 INT_L.IMUX_L4.NN2END2 origin:050-pip-seed !22_33 !23_33 !25_33 16_33 24_33
@@ -1646,9 +1646,9 @@
 INT_L.IMUX_L40.FAN_BOUNCE2 origin:050-pip-seed !23_06 20_06 22_06 24_06 25_06
 INT_L.IMUX_L40.FAN_BOUNCE7 origin:050-pip-seed !22_06 20_06 23_06 24_06 25_06
 INT_L.IMUX_L40.GFAN0 origin:049-int-imux-gfan !22_06 !23_06 !24_06 21_06 25_06
-INT_L.IMUX_L40.LOGIC_OUTS_L0 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_06 21_06 22_06 24_06 25_06
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 INT_L.IMUX_L40.NE2END0 origin:050-pip-seed !22_06 !23_06 !25_06 17_06 24_06
 INT_L.IMUX_L40.NL1END0 origin:050-pip-seed !22_06 16_06 23_06 24_06 25_06
 INT_L.IMUX_L40.NN2END0 origin:050-pip-seed !22_06 !23_06 !24_06 17_06 25_06
@@ -1670,9 +1670,9 @@
 INT_L.IMUX_L41.FAN_BOUNCE5 origin:050-pip-seed !22_14 20_14 23_14 24_14 25_14
 INT_L.IMUX_L41.FAN_BOUNCE6 origin:050-pip-seed !23_14 20_14 22_14 24_14 25_14
 INT_L.IMUX_L41.GFAN0 origin:049-int-imux-gfan !22_14 !23_14 !24_14 21_14 25_14
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-INT_L.IMUX_L41.LOGIC_OUTS_L8 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_14 21_14 23_14 24_14 25_14
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 INT_L.IMUX_L41.NE2END1 origin:050-pip-seed !22_14 !23_14 !25_14 18_15 24_14
 INT_L.IMUX_L41.NL1END1 origin:050-pip-seed !22_14 16_14 23_14 24_14 25_14
 INT_L.IMUX_L41.NN2END1 origin:050-pip-seed !22_14 !23_14 !24_14 18_15 25_14
@@ -1695,8 +1695,8 @@
 INT_L.IMUX_L42.FAN_BOUNCE7 origin:050-pip-seed !23_22 20_22 22_22 24_22 25_22
 INT_L.IMUX_L42.GFAN0 origin:049-int-imux-gfan !22_22 !23_22 !24_22 21_22 25_22
 INT_L.IMUX_L42.LOGIC_OUTS_L19 origin:051-pip-imuxlout-bypalts !22_22 !23_22 !25_22 21_22 24_22
-INT_L.IMUX_L42.LOGIC_OUTS_L5 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_22 21_22 22_22 24_22 25_22
-INT_L.IMUX_L42.LOGIC_OUTS_L9 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_22 21_22 23_22 24_22 25_22
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 INT_L.IMUX_L42.NE2END1 origin:050-pip-seed !22_22 !23_22 !25_22 17_22 24_22
 INT_L.IMUX_L42.NL1END1 origin:050-pip-seed !22_22 16_22 23_22 24_22 25_22
 INT_L.IMUX_L42.NN2END1 origin:050-pip-seed !22_22 !23_22 !24_22 17_22 25_22
@@ -1718,8 +1718,8 @@
 INT_L.IMUX_L43.FAN_BOUNCE3 origin:050-pip-seed !22_30 20_30 23_30 24_30 25_30
 INT_L.IMUX_L43.FAN_BOUNCE5 origin:050-pip-seed !23_30 20_30 22_30 24_30 25_30
 INT_L.IMUX_L43.GFAN0 origin:049-int-imux-gfan !22_30 !23_30 !24_30 21_30 25_30
-INT_L.IMUX_L43.LOGIC_OUTS_L1 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_30 21_30 22_30 24_30 25_30
-INT_L.IMUX_L43.LOGIC_OUTS_L13 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_30 21_30 23_30 24_30 25_30
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 INT_L.IMUX_L43.LOGIC_OUTS_L23 origin:051-pip-imuxlout-bypalts !22_30 !23_30 !25_30 21_30 24_30
 INT_L.IMUX_L43.NE2END2 origin:050-pip-seed !22_30 !23_30 !25_30 18_31 24_30
 INT_L.IMUX_L43.NL1END2 origin:050-pip-seed !22_30 16_30 23_30 24_30 25_30
@@ -1742,9 +1742,9 @@
 INT_L.IMUX_L44.FAN_BOUNCE1 origin:050-pip-seed !22_38 20_38 23_38 24_38 25_38
 INT_L.IMUX_L44.FAN_BOUNCE_S3_0 origin:050-pip-seed !23_38 20_38 22_38 24_38 25_38
 INT_L.IMUX_L44.GFAN1 origin:049-int-imux-gfan !22_38 !23_38 !24_38 21_38 25_38
-INT_L.IMUX_L44.LOGIC_OUTS_L14 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_38 21_38 23_38 24_38 25_38
-INT_L.IMUX_L44.LOGIC_OUTS_L2 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_38 21_38 22_38 24_38 25_38
-INT_L.IMUX_L44.LOGIC_OUTS_L20 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_38 !23_38 !25_38 21_38 24_38
+INT_L.IMUX_L44.LOGIC_OUTS_L14 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_38 21_38 23_38 24_38 25_38
+INT_L.IMUX_L44.LOGIC_OUTS_L2 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_38 21_38 22_38 24_38 25_38
+INT_L.IMUX_L44.LOGIC_OUTS_L20 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_38 !23_38 !25_38 21_38 24_38
 INT_L.IMUX_L44.NE2END2 origin:050-pip-seed !22_38 !23_38 !25_38 17_38 24_38
 INT_L.IMUX_L44.NL1END2 origin:050-pip-seed !22_38 16_38 23_38 24_38 25_38
 INT_L.IMUX_L44.NN2END2 origin:050-pip-seed !22_38 !23_38 !24_38 17_38 25_38
@@ -1766,9 +1766,9 @@
 INT_L.IMUX_L45.FAN_BOUNCE3 origin:050-pip-seed !22_46 20_46 23_46 24_46 25_46
 INT_L.IMUX_L45.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_46 20_46 22_46 24_46 25_46
 INT_L.IMUX_L45.GFAN1 origin:049-int-imux-gfan !22_46 !23_46 !24_46 21_46 25_46
-INT_L.IMUX_L45.LOGIC_OUTS_L10 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_46 21_46 23_46 24_46 25_46
-INT_L.IMUX_L45.LOGIC_OUTS_L16 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_46 !23_46 !25_46 21_46 24_46
-INT_L.IMUX_L45.LOGIC_OUTS_L6 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_46 21_46 22_46 24_46 25_46
+INT_L.IMUX_L45.LOGIC_OUTS_L10 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_46 21_46 23_46 24_46 25_46
+INT_L.IMUX_L45.LOGIC_OUTS_L16 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_46 !23_46 !25_46 21_46 24_46
+INT_L.IMUX_L45.LOGIC_OUTS_L6 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_46 21_46 22_46 24_46 25_46
 INT_L.IMUX_L45.NE2END3 origin:050-pip-seed !22_46 !23_46 !25_46 18_47 24_46
 INT_L.IMUX_L45.NL1BEG_N3 origin:050-pip-seed !22_46 16_46 23_46 24_46 25_46
 INT_L.IMUX_L45.NN2END3 origin:050-pip-seed !22_46 !23_46 !24_46 18_47 25_46
@@ -1791,8 +1791,8 @@
 INT_L.IMUX_L46.FAN_BOUNCE_S3_2 origin:050-pip-seed !23_54 20_54 22_54 24_54 25_54
 INT_L.IMUX_L46.GFAN1 origin:049-int-imux-gfan !22_54 !23_54 !24_54 21_54 25_54
 INT_L.IMUX_L46.LOGIC_OUTS_L11 origin:051-pip-imuxlout-bypalts !22_54 21_54 23_54 24_54 25_54
-INT_L.IMUX_L46.LOGIC_OUTS_L17 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_54 !23_54 !25_54 21_54 24_54
-INT_L.IMUX_L46.LOGIC_OUTS_L7 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_54 21_54 22_54 24_54 25_54
+INT_L.IMUX_L46.LOGIC_OUTS_L17 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_54 !23_54 !25_54 21_54 24_54
+INT_L.IMUX_L46.LOGIC_OUTS_L7 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_54 21_54 22_54 24_54 25_54
 INT_L.IMUX_L46.NE2END3 origin:050-pip-seed !22_54 !23_54 !25_54 17_54 24_54
 INT_L.IMUX_L46.NL1BEG_N3 origin:050-pip-seed !22_54 16_54 23_54 24_54 25_54
 INT_L.IMUX_L46.NN2END3 origin:050-pip-seed !22_54 !23_54 !24_54 17_54 25_54
@@ -1815,8 +1815,8 @@
 INT_L.IMUX_L47.FAN_BOUNCE_S3_6 origin:050-pip-seed !23_62 20_62 22_62 24_62 25_62
 INT_L.IMUX_L47.GFAN1 origin:049-int-imux-gfan !22_62 !23_62 !24_62 21_62 25_62
 INT_L.IMUX_L47.LOGIC_OUTS_L15 origin:051-pip-imuxlout-bypalts !22_62 21_62 23_62 24_62 25_62
-INT_L.IMUX_L47.LOGIC_OUTS_L21 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_62 !23_62 !25_62 21_62 24_62
-INT_L.IMUX_L47.LOGIC_OUTS_L3 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_62 21_62 22_62 24_62 25_62
+INT_L.IMUX_L47.LOGIC_OUTS_L21 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_62 !23_62 !25_62 21_62 24_62
+INT_L.IMUX_L47.LOGIC_OUTS_L3 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_62 21_62 22_62 24_62 25_62
 INT_L.IMUX_L47.NE2END_S3_0 origin:050-pip-seed !22_62 !23_62 !25_62 18_63 24_62
 INT_L.IMUX_L47.NL1END_S3_0 origin:050-pip-seed !22_62 16_62 23_62 24_62 25_62
 INT_L.IMUX_L47.NN2END_S2_0 origin:050-pip-seed !22_62 !23_62 !24_62 18_63 25_62
@@ -1838,9 +1838,9 @@
 INT_L.IMUX_L5.FAN_BOUNCE3 origin:050-pip-seed !23_41 21_41 22_41 24_41 25_41
 INT_L.IMUX_L5.FAN_BOUNCE_S3_4 origin:050-pip-seed !22_41 21_41 23_41 24_41 25_41
 INT_L.IMUX_L5.GFAN1 origin:049-int-imux-gfan !22_41 !23_41 !25_41 20_41 24_41
-INT_L.IMUX_L5.LOGIC_OUTS_L10 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_41 20_41 22_41 24_41 25_41
-INT_L.IMUX_L5.LOGIC_OUTS_L16 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_41 !23_41 !24_41 20_41 25_41
-INT_L.IMUX_L5.LOGIC_OUTS_L6 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_41 20_41 23_41 24_41 25_41
+INT_L.IMUX_L5.LOGIC_OUTS_L10 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_41 20_41 22_41 24_41 25_41
+INT_L.IMUX_L5.LOGIC_OUTS_L16 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_41 !23_41 !24_41 20_41 25_41
+INT_L.IMUX_L5.LOGIC_OUTS_L6 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_41 20_41 23_41 24_41 25_41
 INT_L.IMUX_L5.NE2END2 origin:050-pip-seed !22_41 !23_41 !24_41 19_40 25_41
 INT_L.IMUX_L5.NL1BEG_N3 origin:050-pip-seed !23_41 17_41 22_41 24_41 25_41
 INT_L.IMUX_L5.NN2END2 origin:050-pip-seed !22_41 !23_41 !25_41 19_40 24_41
@@ -1862,9 +1862,9 @@
 INT_L.IMUX_L6.FAN_BOUNCE_S3_0 origin:050-pip-seed !23_49 21_49 22_49 24_49 25_49
 INT_L.IMUX_L6.FAN_BOUNCE_S3_2 origin:050-pip-seed !22_49 21_49 23_49 24_49 25_49
 INT_L.IMUX_L6.GFAN1 origin:049-int-imux-gfan !22_49 !23_49 !25_49 20_49 24_49
-INT_L.IMUX_L6.LOGIC_OUTS_L11 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_49 20_49 22_49 24_49 25_49
-INT_L.IMUX_L6.LOGIC_OUTS_L17 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_49 !23_49 !24_49 20_49 25_49
-INT_L.IMUX_L6.LOGIC_OUTS_L7 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_49 20_49 23_49 24_49 25_49
+INT_L.IMUX_L6.LOGIC_OUTS_L11 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_49 20_49 22_49 24_49 25_49
+INT_L.IMUX_L6.LOGIC_OUTS_L17 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_49 !23_49 !24_49 20_49 25_49
+INT_L.IMUX_L6.LOGIC_OUTS_L7 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_49 20_49 23_49 24_49 25_49
 INT_L.IMUX_L6.NE2END3 origin:050-pip-seed !22_49 !23_49 !24_49 16_49 25_49
 INT_L.IMUX_L6.NL1BEG_N3 origin:050-pip-seed !23_49 17_49 22_49 24_49 25_49
 INT_L.IMUX_L6.NN2END3 origin:050-pip-seed !22_49 !23_49 !25_49 16_49 24_49
@@ -1886,9 +1886,9 @@
 INT_L.IMUX_L7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_57 21_57 22_57 24_57 25_57
 INT_L.IMUX_L7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_57 21_57 23_57 24_57 25_57
 INT_L.IMUX_L7.GFAN1 origin:049-int-imux-gfan !22_57 !23_57 !25_57 20_57 24_57
-INT_L.IMUX_L7.LOGIC_OUTS_L15 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_57 20_57 22_57 24_57 25_57
-INT_L.IMUX_L7.LOGIC_OUTS_L21 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_57 !23_57 !24_57 20_57 25_57
-INT_L.IMUX_L7.LOGIC_OUTS_L3 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_57 20_57 23_57 24_57 25_57
+INT_L.IMUX_L7.LOGIC_OUTS_L15 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_57 20_57 22_57 24_57 25_57
+INT_L.IMUX_L7.LOGIC_OUTS_L21 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_57 !23_57 !24_57 20_57 25_57
+INT_L.IMUX_L7.LOGIC_OUTS_L3 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_57 20_57 23_57 24_57 25_57
 INT_L.IMUX_L7.NE2END3 origin:050-pip-seed !22_57 !23_57 !24_57 19_56 25_57
 INT_L.IMUX_L7.NL1END_S3_0 origin:050-pip-seed !23_57 17_57 22_57 24_57 25_57
 INT_L.IMUX_L7.NN2END3 origin:050-pip-seed !22_57 !23_57 !25_57 19_56 24_57
@@ -1910,9 +1910,9 @@
 INT_L.IMUX_L8.FAN_BOUNCE2 origin:050-pip-seed !23_02 20_02 22_02 24_02 25_02
 INT_L.IMUX_L8.FAN_BOUNCE7 origin:050-pip-seed !22_02 20_02 23_02 24_02 25_02
 INT_L.IMUX_L8.GFAN0 origin:049-int-imux-gfan !22_02 !23_02 !24_02 21_02 25_02
-INT_L.IMUX_L8.LOGIC_OUTS_L0 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_02 21_02 22_02 24_02 25_02
+INT_L.IMUX_L8.LOGIC_OUTS_L0 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_02 21_02 22_02 24_02 25_02
 INT_L.IMUX_L8.LOGIC_OUTS_L12 origin:051-pip-imuxlout-bypalts !22_02 21_02 23_02 24_02 25_02
-INT_L.IMUX_L8.LOGIC_OUTS_L22 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_02 !23_02 !25_02 21_02 24_02
+INT_L.IMUX_L8.LOGIC_OUTS_L22 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_02 !23_02 !25_02 21_02 24_02
 INT_L.IMUX_L8.NE2END0 origin:050-pip-seed !22_02 !23_02 !25_02 17_02 24_02
 INT_L.IMUX_L8.NL1END0 origin:050-pip-seed !22_02 16_02 23_02 24_02 25_02
 INT_L.IMUX_L8.NN2END0 origin:050-pip-seed !22_02 !23_02 !24_02 17_02 25_02
@@ -1934,8 +1934,8 @@
 INT_L.IMUX_L9.FAN_BOUNCE5 origin:050-pip-seed !22_10 20_10 23_10 24_10 25_10
 INT_L.IMUX_L9.FAN_BOUNCE6 origin:050-pip-seed !23_10 20_10 22_10 24_10 25_10
 INT_L.IMUX_L9.GFAN0 origin:049-int-imux-gfan !22_10 !23_10 !24_10 21_10 25_10
-INT_L.IMUX_L9.LOGIC_OUTS_L18 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_10 !23_10 !25_10 21_10 24_10
-INT_L.IMUX_L9.LOGIC_OUTS_L4 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_10 21_10 22_10 24_10 25_10
+INT_L.IMUX_L9.LOGIC_OUTS_L18 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_10 !23_10 !25_10 21_10 24_10
+INT_L.IMUX_L9.LOGIC_OUTS_L4 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_10 21_10 22_10 24_10 25_10
 INT_L.IMUX_L9.LOGIC_OUTS_L8 origin:051-pip-imuxlout-bypalts !22_10 21_10 23_10 24_10 25_10
 INT_L.IMUX_L9.NE2END0 origin:050-pip-seed !22_10 !23_10 !25_10 16_10 24_10
 INT_L.IMUX_L9.NL1END1 origin:050-pip-seed !22_10 16_10 23_10 24_10 25_10
@@ -1952,6 +1952,9 @@
 INT_L.IMUX_L9.WW2END0 origin:050-pip-seed !22_10 !23_10 !24_10 18_11 25_10
 INT_L.LH0.EE4END3 origin:056-pip-rem 00_58 01_61
 INT_L.LH0.ER1END3 origin:056-pip-rem 00_57 01_54
+INT_L.LH0.LH12 origin:057-pip-bi 01_54 01_56
+INT_L.LH0.LV_L0 origin:057-pip-bi 01_56 01_58
+INT_L.LH0.LV_L18 origin:057-pip-bi 01_56 01_61
 INT_L.LH0.LV_L9 origin:056-pip-rem 00_59 01_56
 INT_L.LH0.NE2END3 origin:056-pip-rem 00_58 00_59
 INT_L.LH0.NE6END3 origin:056-pip-rem 00_58 01_58
@@ -1961,6 +1964,9 @@
 INT_L.LH0.SW6END3 origin:056-pip-rem 00_57 01_61
 INT_L.LH12.EE4END3 origin:056-pip-rem 01_60 01_62
 INT_L.LH12.ER1END3 origin:056-pip-rem 00_63 01_60
+INT_L.LH12.LH0 origin:057-pip-bi 00_61 00_63
+INT_L.LH12.LV_L0 origin:057-pip-bi 00_55 00_62
+INT_L.LH12.LV_L18 origin:057-pip-bi 00_62 01_62
 INT_L.LH12.LV_L9 origin:056-pip-rem 00_62 01_57
 INT_L.LH12.NE2END3 origin:056-pip-rem 01_57 01_60
 INT_L.LH12.NE6END3 origin:056-pip-rem 00_55 01_60
@@ -1971,6 +1977,7 @@
 INT_L.LVB_L0.LH0 origin:056-pip-rem 00_43 00_51
 INT_L.LVB_L0.LH12 origin:056-pip-rem 00_50 00_51
 INT_L.LVB_L0.LH6 origin:056-pip-rem 00_51 00_53
+INT_L.LVB_L0.LVB_L12 origin:057-pip-bi 00_51 00_54
 INT_L.LVB_L0.LV_L0 origin:056-pip-rem 00_47 01_52
 INT_L.LVB_L0.LV_L18 origin:056-pip-rem 01_42 01_52
 INT_L.LVB_L0.NE2END2 origin:056-pip-rem 00_53 01_52
@@ -1988,6 +1995,7 @@
 INT_L.LVB_L12.LH0 origin:056-pip-rem 00_46 00_49
 INT_L.LVB_L12.LH12 origin:056-pip-rem 00_46 01_53
 INT_L.LVB_L12.LH6 origin:056-pip-rem 00_46 01_49
+INT_L.LVB_L12.LVB_L0 origin:057-pip-bi 00_45 01_45
 INT_L.LVB_L12.LV_L0 origin:056-pip-rem 00_45 01_44
 INT_L.LVB_L12.LV_L18 origin:056-pip-rem 00_45 01_48
 INT_L.LVB_L12.NE2END2 origin:056-pip-rem 00_45 01_49
@@ -2003,7 +2011,10 @@
 INT_L.LVB_L12.WR1END3 origin:056-pip-rem 01_46 01_48
 INT_L.LVB_L12.WW4END3 origin:056-pip-rem 01_46 01_49
 INT_L.LV_L0.ER1END0 origin:056-pip-rem 01_04 01_05
+INT_L.LV_L0.LH0 origin:057-pip-bi 00_02 01_06
+INT_L.LV_L0.LH12 origin:057-pip-bi 00_05 01_06
 INT_L.LV_L0.LH6 origin:056-pip-rem 01_04 01_06
+INT_L.LV_L0.LV_L18 origin:057-pip-bi 00_09 01_06
 INT_L.LV_L0.NN6END0 origin:056-pip-rem 00_07 00_09
 INT_L.LV_L0.NR1END0 origin:056-pip-rem 00_02 01_05
 INT_L.LV_L0.NW6END0 origin:056-pip-rem 00_07 01_04
@@ -2012,7 +2023,10 @@
 INT_L.LV_L0.WR1END0 origin:056-pip-rem 00_02 00_07
 INT_L.LV_L0.WW4END0 origin:056-pip-rem 00_05 00_07
 INT_L.LV_L18.ER1END0 origin:056-pip-rem 00_03 00_06
+INT_L.LV_L18.LH0 origin:057-pip-bi 00_01 01_02
+INT_L.LV_L18.LH12 origin:057-pip-bi 01_02 01_08
 INT_L.LV_L18.LH6 origin:056-pip-rem 00_06 01_02
+INT_L.LV_L18.LV_L0 origin:057-pip-bi 01_00 01_01
 INT_L.LV_L18.NN6END0 origin:056-pip-rem 00_03 01_00
 INT_L.LV_L18.NR1END0 origin:056-pip-rem 00_01 00_03
 INT_L.LV_L18.NW6END0 origin:056-pip-rem 00_06 01_01
@@ -2595,7 +2609,7 @@
 INT_L.NW6BEG0.NW2END0 origin:050-pip-seed 02_02 03_02
 INT_L.NW6BEG0.NW6END0 origin:050-pip-seed 02_02 07_03
 INT_L.NW6BEG0.SS2END_N0_3 origin:050-pip-seed 02_03 04_00
-INT_L.NW6BEG0.SS6END_N0_3 origin:056-pip-rem 04_00 07_03
+INT_L.NW6BEG0.SS6END_N0_3 origin:050-pip-seed 04_00 07_03
 INT_L.NW6BEG0.SW2END_N0_3 origin:050-pip-seed 03_02 04_00
 INT_L.NW6BEG0.SW6END_N0_3 origin:050-pip-seed 04_00 04_03
 INT_L.NW6BEG0.WW2END_N0_3 origin:050-pip-seed 02_02 02_03
@@ -2813,7 +2827,7 @@
 INT_L.SE6BEG3.NE2END3 origin:050-pip-seed 03_58 04_56
 INT_L.SE6BEG3.NE6END3 origin:050-pip-seed 04_56 04_59
 INT_L.SE6BEG3.NN2END3 origin:050-pip-seed 02_59 04_56
-INT_L.SE6BEG3.NN6END3 origin:056-pip-rem 04_56 07_59
+INT_L.SE6BEG3.NN6END3 origin:050-pip-seed 04_56 07_59
 INT_L.SE6BEG3.SE2END3 origin:050-pip-seed 02_58 03_58
 INT_L.SE6BEG3.SE6END3 origin:050-pip-seed 02_58 07_59
 INT_L.SE6BEG3.SS2END3 origin:050-pip-seed 02_59 05_58
@@ -3281,7 +3295,7 @@
 INT_L.SW6BEG2.WW2END2 origin:050-pip-seed 03_44 05_47
 INT_L.SW6BEG2.WW4END3 origin:050-pip-seed 05_44 05_47
 INT_L.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61
-INT_L.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60
+INT_L.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60
 INT_L.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60
 INT_L.SW6BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_60 07_61
 INT_L.SW6BEG3.LOGIC_OUTS_L15 origin:050-pip-seed 03_60 04_62
@@ -3589,7 +3603,7 @@
 INT_L.WW4BEG2.LVB_L0 origin:056-pip-rem 04_34 05_32
 INT_L.WW4BEG2.LVB_L12 origin:056-pip-rem 05_32 07_33
 INT_L.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
-INT_L.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
+INT_L.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
 INT_L.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
 INT_L.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
 INT_L.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
diff --git a/artix7/segbits_int_r.origin_info.db b/artix7/segbits_int_r.origin_info.db
index 7a2629d..61a6fd2 100644
--- a/artix7/segbits_int_r.origin_info.db
+++ b/artix7/segbits_int_r.origin_info.db
@@ -6,9 +6,9 @@
 INT_R.BYP_ALT0.FAN_BOUNCE2 origin:050-pip-seed !22_07 21_07 23_07 24_07 25_07
 INT_R.BYP_ALT0.FAN_BOUNCE7 origin:050-pip-seed !23_07 21_07 22_07 24_07 25_07
 INT_R.BYP_ALT0.GFAN0 origin:054-pip-fan-alt !22_07 !23_07 !25_07 20_07 24_07
-INT_R.BYP_ALT0.LOGIC_OUTS0 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_07 20_07 23_07 24_07 25_07
-INT_R.BYP_ALT0.LOGIC_OUTS12 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_07 20_07 22_07 24_07 25_07
-INT_R.BYP_ALT0.LOGIC_OUTS22 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_07 !23_07 !24_07 20_07 25_07
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 INT_R.BYP_ALT0.NE2END0 origin:050-pip-seed !22_07 !23_07 !24_07 19_06 25_07
 INT_R.BYP_ALT0.NL1END0 origin:050-pip-seed !23_07 18_06 22_07 24_07 25_07
 INT_R.BYP_ALT0.NN2END0 origin:050-pip-seed !22_07 !23_07 !25_07 19_06 24_07
@@ -30,9 +30,9 @@
 INT_R.BYP_ALT1.FAN_BOUNCE5 origin:050-pip-seed !23_15 21_15 22_15 24_15 25_15
 INT_R.BYP_ALT1.FAN_BOUNCE6 origin:050-pip-seed !22_15 21_15 23_15 24_15 25_15
 INT_R.BYP_ALT1.GFAN0 origin:054-pip-fan-alt !22_15 !23_15 !25_15 20_15 24_15
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 INT_R.BYP_ALT1.NE2END1 origin:050-pip-seed !22_15 !23_15 !24_15 16_15 25_15
 INT_R.BYP_ALT1.NL1END1 origin:050-pip-seed !23_15 18_14 22_15 24_15 25_15
 INT_R.BYP_ALT1.NN2END1 origin:050-pip-seed !22_15 !23_15 !25_15 16_15 24_15
@@ -54,9 +54,9 @@
 INT_R.BYP_ALT2.FAN_BOUNCE1 origin:050-pip-seed !23_39 21_39 22_39 24_39 25_39
 INT_R.BYP_ALT2.FAN_BOUNCE_S3_0 origin:050-pip-seed !22_39 21_39 23_39 24_39 25_39
 INT_R.BYP_ALT2.GFAN1 origin:054-pip-fan-alt !22_39 !23_39 !25_39 20_39 24_39
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-INT_R.BYP_ALT2.LOGIC_OUTS20 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_39 !23_39 !24_39 20_39 25_39
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 INT_R.BYP_ALT2.NE2END2 origin:050-pip-seed !22_39 !23_39 !24_39 19_38 25_39
 INT_R.BYP_ALT2.NL1END2 origin:050-pip-seed !23_39 18_38 22_39 24_39 25_39
 INT_R.BYP_ALT2.NN2END2 origin:050-pip-seed !22_39 !23_39 !25_39 19_38 24_39
@@ -78,9 +78,9 @@
 INT_R.BYP_ALT3.FAN_BOUNCE3 origin:050-pip-seed !23_47 21_47 22_47 24_47 25_47
 INT_R.BYP_ALT3.FAN_BOUNCE_S3_4 origin:050-pip-seed !22_47 21_47 23_47 24_47 25_47
 INT_R.BYP_ALT3.GFAN1 origin:054-pip-fan-alt !22_47 !23_47 !25_47 20_47 24_47
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-INT_R.BYP_ALT3.LOGIC_OUTS6 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_47 20_47 23_47 24_47 25_47
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+INT_R.BYP_ALT3.LOGIC_OUTS6 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_47 20_47 23_47 24_47 25_47
 INT_R.BYP_ALT3.NE2END3 origin:050-pip-seed !22_47 !23_47 !24_47 16_47 25_47
 INT_R.BYP_ALT3.NL1BEG_N3 origin:050-pip-seed !23_47 18_46 22_47 24_47 25_47
 INT_R.BYP_ALT3.NN2END3 origin:050-pip-seed !22_47 !23_47 !25_47 16_47 24_47
@@ -102,9 +102,9 @@
 INT_R.BYP_ALT4.FAN_BOUNCE1 origin:050-pip-seed !23_23 21_23 22_23 24_23 25_23
 INT_R.BYP_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_23 21_23 23_23 24_23 25_23
 INT_R.BYP_ALT4.GFAN0 origin:054-pip-fan-alt !22_23 !23_23 !25_23 20_23 24_23
-INT_R.BYP_ALT4.LOGIC_OUTS19 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_23 !23_23 !24_23 20_23 25_23
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-INT_R.BYP_ALT4.LOGIC_OUTS9 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_23 20_23 22_23 24_23 25_23
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 INT_R.BYP_ALT4.NE2END1 origin:050-pip-seed !22_23 !23_23 !24_23 19_22 25_23
 INT_R.BYP_ALT4.NL1END1 origin:050-pip-seed !23_23 18_22 22_23 24_23 25_23
 INT_R.BYP_ALT4.NN2END1 origin:050-pip-seed !22_23 !23_23 !25_23 19_22 24_23
@@ -126,9 +126,9 @@
 INT_R.BYP_ALT5.FAN_BOUNCE3 origin:050-pip-seed !23_31 21_31 22_31 24_31 25_31
 INT_R.BYP_ALT5.FAN_BOUNCE5 origin:050-pip-seed !22_31 21_31 23_31 24_31 25_31
 INT_R.BYP_ALT5.GFAN0 origin:054-pip-fan-alt !22_31 !23_31 !25_31 20_31 24_31
-INT_R.BYP_ALT5.LOGIC_OUTS1 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_31 20_31 23_31 24_31 25_31
-INT_R.BYP_ALT5.LOGIC_OUTS13 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_31 20_31 22_31 24_31 25_31
-INT_R.BYP_ALT5.LOGIC_OUTS23 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_31 !23_31 !24_31 20_31 25_31
+INT_R.BYP_ALT5.LOGIC_OUTS1 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_31 20_31 23_31 24_31 25_31
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+INT_R.BYP_ALT5.LOGIC_OUTS23 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_31 !23_31 !24_31 20_31 25_31
 INT_R.BYP_ALT5.NE2END2 origin:050-pip-seed !22_31 !23_31 !24_31 16_31 25_31
 INT_R.BYP_ALT5.NL1END2 origin:050-pip-seed !23_31 18_30 22_31 24_31 25_31
 INT_R.BYP_ALT5.NN2END2 origin:050-pip-seed !22_31 !23_31 !25_31 16_31 24_31
@@ -150,8 +150,8 @@
 INT_R.BYP_ALT6.FAN_BOUNCE_S3_0 origin:050-pip-seed !23_55 21_55 22_55 24_55 25_55
 INT_R.BYP_ALT6.FAN_BOUNCE_S3_2 origin:050-pip-seed !22_55 21_55 23_55 24_55 25_55
 INT_R.BYP_ALT6.GFAN1 origin:054-pip-fan-alt !22_55 !23_55 !25_55 20_55 24_55
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-INT_R.BYP_ALT6.LOGIC_OUTS17 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_55 !23_55 !24_55 20_55 25_55
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 INT_R.BYP_ALT6.LOGIC_OUTS7 origin:051-pip-imuxlout-bypalts !22_55 20_55 23_55 24_55 25_55
 INT_R.BYP_ALT6.NE2END3 origin:050-pip-seed !22_55 !23_55 !24_55 19_54 25_55
 INT_R.BYP_ALT6.NL1BEG_N3 origin:050-pip-seed !23_55 18_54 22_55 24_55 25_55
@@ -174,8 +174,8 @@
 INT_R.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63
 INT_R.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63
 INT_R.BYP_ALT7.GFAN1 origin:054-pip-fan-alt !22_63 !23_63 !25_63 20_63 24_63
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 INT_R.BYP_ALT7.LOGIC_OUTS3 origin:051-pip-imuxlout-bypalts !22_63 20_63 23_63 24_63 25_63
 INT_R.BYP_ALT7.NE2END_S3_0 origin:050-pip-seed !22_63 !23_63 !24_63 16_63 25_63
 INT_R.BYP_ALT7.NL1END_S3_0 origin:050-pip-seed !23_63 18_62 22_63 24_63 25_63
@@ -393,7 +393,7 @@
 INT_R.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
 INT_R.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
 INT_R.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
-INT_R.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
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 INT_R.EE4BEG3.EE2END3 origin:050-pip-seed 03_56 03_57
 INT_R.EE4BEG3.EE4END3 origin:050-pip-seed 03_57 05_56
 INT_R.EE4BEG3.LH0 origin:056-pip-rem 04_58 05_56
@@ -413,7 +413,7 @@
 INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
 INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
 INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
-INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
+INT_R.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
 INT_R.EL1BEG0.EE2END1 origin:050-pip-seed 07_20 15_21
 INT_R.EL1BEG0.EE4END1 origin:050-pip-seed 07_20 12_21
 INT_R.EL1BEG0.EL1END1 origin:050-pip-seed 11_21 13_21
@@ -574,8 +574,8 @@
 INT_R.ER1BEG_S0.SW6END3 origin:050-pip-seed 07_58 12_59
 INT_R.ER1BEG_S0.WW2END3 origin:050-pip-seed 11_59 15_59
 INT_R.ER1BEG_S0.WW4END_S0_0 origin:050-pip-seed 11_59 12_59
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 INT_R.FAN_ALT0.EE2END0 origin:050-pip-seed !22_00 !23_00 !24_00 19_01 25_00
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 INT_R.FAN_ALT0.ER1END_N3_3 origin:050-pip-seed !23_00 16_00 22_00 24_00 25_00
@@ -598,8 +598,8 @@
 INT_R.FAN_ALT0.WL1END_N1_3 origin:050-pip-seed !22_00 16_00 23_00 24_00 25_00
 INT_R.FAN_ALT0.WR1END0 origin:050-pip-seed !23_00 17_00 22_00 24_00 25_00
 INT_R.FAN_ALT0.WW2END_N0_3 origin:050-pip-seed !22_00 !23_00 !24_00 16_00 25_00
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 INT_R.FAN_ALT1.EE2END3 origin:050-pip-seed !22_48 !23_48 !24_48 19_49 25_48
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 INT_R.FAN_ALT1.ER1END2 origin:050-pip-seed !23_48 16_48 22_48 24_48 25_48
@@ -622,8 +622,8 @@
 INT_R.FAN_ALT1.WL1END2 origin:050-pip-seed !22_48 16_48 23_48 24_48 25_48
 INT_R.FAN_ALT1.WR1END3 origin:050-pip-seed !23_48 17_48 22_48 24_48 25_48
 INT_R.FAN_ALT1.WW2END2 origin:050-pip-seed !22_48 !23_48 !24_48 16_48 25_48
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 INT_R.FAN_ALT2.ER1END0 origin:050-pip-seed !23_16 16_16 22_16 24_16 25_16
@@ -646,8 +646,8 @@
 INT_R.FAN_ALT2.WL1END0 origin:050-pip-seed !22_16 16_16 23_16 24_16 25_16
 INT_R.FAN_ALT2.WR1END1 origin:050-pip-seed !23_16 17_16 22_16 24_16 25_16
 INT_R.FAN_ALT2.WW2END0 origin:050-pip-seed !22_16 !23_16 !24_16 16_16 25_16
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@@ -670,13 +670,13 @@
 INT_R.FAN_ALT3.WL1END3 origin:050-pip-seed !22_56 17_56 23_56 24_56 25_56
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@@ -694,8 +694,8 @@
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@@ -718,8 +718,8 @@
 INT_R.FAN_ALT5.WL1END2 origin:050-pip-seed !22_40 17_40 23_40 24_40 25_40
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 INT_R.FAN_ALT6.EE2END1 origin:050-pip-seed !22_24 !23_24 !24_24 16_24 25_24
 INT_R.FAN_ALT6.EL1END1 origin:050-pip-seed !22_24 16_24 23_24 24_24 25_24
 INT_R.FAN_ALT6.ER1END1 origin:050-pip-seed !23_24 17_24 22_24 24_24 25_24
@@ -742,8 +742,8 @@
 INT_R.FAN_ALT6.WL1END1 origin:050-pip-seed !22_24 17_24 23_24 24_24 25_24
 INT_R.FAN_ALT6.WR1END1 origin:050-pip-seed !23_24 16_24 22_24 24_24 25_24
 INT_R.FAN_ALT6.WW2END1 origin:050-pip-seed !22_24 !23_24 !24_24 19_25 25_24
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 INT_R.FAN_ALT7.EE2END2 origin:050-pip-seed !22_32 !23_32 !24_32 19_33 25_32
 INT_R.FAN_ALT7.EL1END2 origin:050-pip-seed !22_32 17_32 23_32 24_32 25_32
 INT_R.FAN_ALT7.ER1END1 origin:050-pip-seed !23_32 16_32 22_32 24_32 25_32
@@ -806,9 +806,9 @@
 INT_R.IMUX0.FAN_BOUNCE2 origin:050-pip-seed !22_01 21_01 23_01 24_01 25_01
 INT_R.IMUX0.FAN_BOUNCE7 origin:050-pip-seed !23_01 21_01 22_01 24_01 25_01
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 INT_R.IMUX0.NE2END0 origin:050-pip-seed !22_01 !23_01 !24_01 16_01 25_01
 INT_R.IMUX0.NL1END0 origin:050-pip-seed !23_01 17_01 22_01 24_01 25_01
 INT_R.IMUX0.NN2END0 origin:050-pip-seed !22_01 !23_01 !25_01 16_01 24_01
@@ -830,9 +830,9 @@
 INT_R.IMUX1.FAN_BOUNCE5 origin:050-pip-seed !23_09 21_09 22_09 24_09 25_09
 INT_R.IMUX1.FAN_BOUNCE6 origin:050-pip-seed !22_09 21_09 23_09 24_09 25_09
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 INT_R.IMUX1.NE2END0 origin:050-pip-seed !22_09 !23_09 !24_09 19_08 25_09
 INT_R.IMUX1.NL1END1 origin:050-pip-seed !23_09 17_09 22_09 24_09 25_09
 INT_R.IMUX1.NN2END0 origin:050-pip-seed !22_09 !23_09 !25_09 19_08 24_09
@@ -854,9 +854,9 @@
 INT_R.IMUX10.FAN_BOUNCE1 origin:050-pip-seed !22_18 20_18 23_18 24_18 25_18
 INT_R.IMUX10.FAN_BOUNCE7 origin:050-pip-seed !23_18 20_18 22_18 24_18 25_18
 INT_R.IMUX10.GFAN0 origin:049-int-imux-gfan !22_18 !23_18 !24_18 21_18 25_18
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 INT_R.IMUX10.NE2END1 origin:050-pip-seed !22_18 !23_18 !25_18 17_18 24_18
 INT_R.IMUX10.NL1END1 origin:050-pip-seed !22_18 16_18 23_18 24_18 25_18
 INT_R.IMUX10.NN2END1 origin:050-pip-seed !22_18 !23_18 !24_18 17_18 25_18
@@ -878,9 +878,9 @@
 INT_R.IMUX11.FAN_BOUNCE3 origin:050-pip-seed !22_26 20_26 23_26 24_26 25_26
 INT_R.IMUX11.FAN_BOUNCE5 origin:050-pip-seed !23_26 20_26 22_26 24_26 25_26
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 INT_R.IMUX11.NE2END1 origin:050-pip-seed !22_26 !23_26 !25_26 16_26 24_26
 INT_R.IMUX11.NL1END2 origin:050-pip-seed !22_26 16_26 23_26 24_26 25_26
 INT_R.IMUX11.NN2END1 origin:050-pip-seed !22_26 !23_26 !24_26 16_26 25_26
@@ -902,9 +902,9 @@
 INT_R.IMUX12.FAN_BOUNCE1 origin:050-pip-seed !22_34 20_34 23_34 24_34 25_34
 INT_R.IMUX12.FAN_BOUNCE_S3_0 origin:050-pip-seed !23_34 20_34 22_34 24_34 25_34
 INT_R.IMUX12.GFAN1 origin:049-int-imux-gfan !22_34 !23_34 !24_34 21_34 25_34
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 INT_R.IMUX12.NE2END2 origin:050-pip-seed !22_34 !23_34 !25_34 17_34 24_34
 INT_R.IMUX12.NL1END2 origin:050-pip-seed !22_34 16_34 23_34 24_34 25_34
 INT_R.IMUX12.NN2END2 origin:050-pip-seed !22_34 !23_34 !24_34 17_34 25_34
@@ -926,9 +926,9 @@
 INT_R.IMUX13.FAN_BOUNCE3 origin:050-pip-seed !22_42 20_42 23_42 24_42 25_42
 INT_R.IMUX13.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_42 20_42 22_42 24_42 25_42
 INT_R.IMUX13.GFAN1 origin:049-int-imux-gfan !22_42 !23_42 !24_42 21_42 25_42
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 INT_R.IMUX13.NE2END2 origin:050-pip-seed !22_42 !23_42 !25_42 16_42 24_42
 INT_R.IMUX13.NL1BEG_N3 origin:050-pip-seed !22_42 16_42 23_42 24_42 25_42
 INT_R.IMUX13.NN2END2 origin:050-pip-seed !22_42 !23_42 !24_42 16_42 25_42
@@ -950,9 +950,9 @@
 INT_R.IMUX14.FAN_BOUNCE_S3_0 origin:050-pip-seed !22_50 20_50 23_50 24_50 25_50
 INT_R.IMUX14.FAN_BOUNCE_S3_2 origin:050-pip-seed !23_50 20_50 22_50 24_50 25_50
 INT_R.IMUX14.GFAN1 origin:049-int-imux-gfan !22_50 !23_50 !24_50 21_50 25_50
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 INT_R.IMUX14.LOGIC_OUTS17 origin:051-pip-imuxlout-bypalts !22_50 !23_50 !25_50 21_50 24_50
-INT_R.IMUX14.LOGIC_OUTS7 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_50 21_50 22_50 24_50 25_50
+INT_R.IMUX14.LOGIC_OUTS7 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_50 21_50 22_50 24_50 25_50
 INT_R.IMUX14.NE2END3 origin:050-pip-seed !22_50 !23_50 !25_50 17_50 24_50
 INT_R.IMUX14.NL1BEG_N3 origin:050-pip-seed !22_50 16_50 23_50 24_50 25_50
 INT_R.IMUX14.NN2END3 origin:050-pip-seed !22_50 !23_50 !24_50 17_50 25_50
@@ -974,9 +974,9 @@
 INT_R.IMUX15.FAN_BOUNCE_S3_4 origin:050-pip-seed !22_58 20_58 23_58 24_58 25_58
 INT_R.IMUX15.FAN_BOUNCE_S3_6 origin:050-pip-seed !23_58 20_58 22_58 24_58 25_58
 INT_R.IMUX15.GFAN1 origin:049-int-imux-gfan !22_58 !23_58 !24_58 21_58 25_58
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 INT_R.IMUX15.LOGIC_OUTS21 origin:051-pip-imuxlout-bypalts !22_58 !23_58 !25_58 21_58 24_58
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 INT_R.IMUX15.NE2END3 origin:050-pip-seed !22_58 !23_58 !25_58 16_58 24_58
 INT_R.IMUX15.NL1END_S3_0 origin:050-pip-seed !22_58 16_58 23_58 24_58 25_58
 INT_R.IMUX15.NN2END3 origin:050-pip-seed !22_58 !23_58 !24_58 16_58 25_58
@@ -998,9 +998,9 @@
 INT_R.IMUX16.FAN_BOUNCE2 origin:050-pip-seed !22_03 21_03 23_03 24_03 25_03
 INT_R.IMUX16.FAN_BOUNCE7 origin:050-pip-seed !23_03 21_03 22_03 24_03 25_03
 INT_R.IMUX16.GFAN0 origin:049-int-imux-gfan !22_03 !23_03 !25_03 20_03 24_03
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 INT_R.IMUX16.NE2END0 origin:050-pip-seed !22_03 !23_03 !24_03 19_02 25_03
 INT_R.IMUX16.NL1END0 origin:050-pip-seed !23_03 18_02 22_03 24_03 25_03
 INT_R.IMUX16.NN2END0 origin:050-pip-seed !22_03 !23_03 !25_03 19_02 24_03
@@ -1022,9 +1022,9 @@
 INT_R.IMUX17.FAN_BOUNCE5 origin:050-pip-seed !23_11 21_11 22_11 24_11 25_11
 INT_R.IMUX17.FAN_BOUNCE6 origin:050-pip-seed !22_11 21_11 23_11 24_11 25_11
 INT_R.IMUX17.GFAN0 origin:049-int-imux-gfan !22_11 !23_11 !25_11 20_11 24_11
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 INT_R.IMUX17.NE2END0 origin:050-pip-seed !22_11 !23_11 !24_11 18_10 25_11
 INT_R.IMUX17.NL1END1 origin:050-pip-seed !23_11 18_10 22_11 24_11 25_11
 INT_R.IMUX17.NN2END0 origin:050-pip-seed !22_11 !23_11 !25_11 18_10 24_11
@@ -1046,9 +1046,9 @@
 INT_R.IMUX18.FAN_BOUNCE1 origin:050-pip-seed !23_19 21_19 22_19 24_19 25_19
 INT_R.IMUX18.FAN_BOUNCE7 origin:050-pip-seed !22_19 21_19 23_19 24_19 25_19
 INT_R.IMUX18.GFAN0 origin:049-int-imux-gfan !22_19 !23_19 !25_19 20_19 24_19
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 INT_R.IMUX18.NE2END1 origin:050-pip-seed !22_19 !23_19 !24_19 19_18 25_19
 INT_R.IMUX18.NL1END1 origin:050-pip-seed !23_19 18_18 22_19 24_19 25_19
 INT_R.IMUX18.NN2END1 origin:050-pip-seed !22_19 !23_19 !25_19 19_18 24_19
@@ -1070,9 +1070,9 @@
 INT_R.IMUX19.FAN_BOUNCE3 origin:050-pip-seed !23_27 21_27 22_27 24_27 25_27
 INT_R.IMUX19.FAN_BOUNCE5 origin:050-pip-seed !22_27 21_27 23_27 24_27 25_27
 INT_R.IMUX19.GFAN0 origin:049-int-imux-gfan !22_27 !23_27 !25_27 20_27 24_27
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 INT_R.IMUX19.NE2END1 origin:050-pip-seed !22_27 !23_27 !24_27 18_26 25_27
 INT_R.IMUX19.NL1END2 origin:050-pip-seed !23_27 18_26 22_27 24_27 25_27
 INT_R.IMUX19.NN2END1 origin:050-pip-seed !22_27 !23_27 !25_27 18_26 24_27
@@ -1094,9 +1094,9 @@
 INT_R.IMUX2.FAN_BOUNCE1 origin:050-pip-seed !23_17 21_17 22_17 24_17 25_17
 INT_R.IMUX2.FAN_BOUNCE7 origin:050-pip-seed !22_17 21_17 23_17 24_17 25_17
 INT_R.IMUX2.GFAN0 origin:049-int-imux-gfan !22_17 !23_17 !25_17 20_17 24_17
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 INT_R.IMUX2.NE2END1 origin:050-pip-seed !22_17 !23_17 !24_17 16_17 25_17
 INT_R.IMUX2.NL1END1 origin:050-pip-seed !23_17 17_17 22_17 24_17 25_17
 INT_R.IMUX2.NN2END1 origin:050-pip-seed !22_17 !23_17 !25_17 16_17 24_17
@@ -1118,9 +1118,9 @@
 INT_R.IMUX20.FAN_BOUNCE1 origin:050-pip-seed !23_35 21_35 22_35 24_35 25_35
 INT_R.IMUX20.FAN_BOUNCE_S3_0 origin:050-pip-seed !22_35 21_35 23_35 24_35 25_35
 INT_R.IMUX20.GFAN1 origin:049-int-imux-gfan !22_35 !23_35 !25_35 20_35 24_35
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 INT_R.IMUX20.NE2END2 origin:050-pip-seed !22_35 !23_35 !24_35 19_34 25_35
 INT_R.IMUX20.NL1END2 origin:050-pip-seed !23_35 18_34 22_35 24_35 25_35
 INT_R.IMUX20.NN2END2 origin:050-pip-seed !22_35 !23_35 !25_35 19_34 24_35
@@ -1143,8 +1143,8 @@
 INT_R.IMUX21.FAN_BOUNCE_S3_4 origin:050-pip-seed !22_43 21_43 23_43 24_43 25_43
 INT_R.IMUX21.GFAN1 origin:049-int-imux-gfan !22_43 !23_43 !25_43 20_43 24_43
 INT_R.IMUX21.LOGIC_OUTS10 origin:051-pip-imuxlout-bypalts !23_43 20_43 22_43 24_43 25_43
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 INT_R.IMUX21.NE2END2 origin:050-pip-seed !22_43 !23_43 !24_43 18_42 25_43
 INT_R.IMUX21.NL1BEG_N3 origin:050-pip-seed !23_43 18_42 22_43 24_43 25_43
 INT_R.IMUX21.NN2END2 origin:050-pip-seed !22_43 !23_43 !25_43 18_42 24_43
@@ -1166,9 +1166,9 @@
 INT_R.IMUX22.FAN_BOUNCE_S3_0 origin:050-pip-seed !23_51 21_51 22_51 24_51 25_51
 INT_R.IMUX22.FAN_BOUNCE_S3_2 origin:050-pip-seed !22_51 21_51 23_51 24_51 25_51
 INT_R.IMUX22.GFAN1 origin:049-int-imux-gfan !22_51 !23_51 !25_51 20_51 24_51
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 INT_R.IMUX22.NE2END3 origin:050-pip-seed !22_51 !23_51 !24_51 19_50 25_51
 INT_R.IMUX22.NL1BEG_N3 origin:050-pip-seed !23_51 18_50 22_51 24_51 25_51
 INT_R.IMUX22.NN2END3 origin:050-pip-seed !22_51 !23_51 !25_51 19_50 24_51
@@ -1190,9 +1190,9 @@
 INT_R.IMUX23.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_59 21_59 22_59 24_59 25_59
 INT_R.IMUX23.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_59 21_59 23_59 24_59 25_59
 INT_R.IMUX23.GFAN1 origin:049-int-imux-gfan !22_59 !23_59 !25_59 20_59 24_59
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 INT_R.IMUX23.NE2END3 origin:050-pip-seed !22_59 !23_59 !24_59 18_58 25_59
 INT_R.IMUX23.NL1END_S3_0 origin:050-pip-seed !23_59 18_58 22_59 24_59 25_59
 INT_R.IMUX23.NN2END3 origin:050-pip-seed !22_59 !23_59 !25_59 18_58 24_59
@@ -1214,9 +1214,9 @@
 INT_R.IMUX24.FAN_BOUNCE2 origin:050-pip-seed !23_04 20_04 22_04 24_04 25_04
 INT_R.IMUX24.FAN_BOUNCE7 origin:050-pip-seed !22_04 20_04 23_04 24_04 25_04
 INT_R.IMUX24.GFAN0 origin:049-int-imux-gfan !22_04 !23_04 !24_04 21_04 25_04
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 INT_R.IMUX24.NE2END0 origin:050-pip-seed !22_04 !23_04 !25_04 18_05 24_04
 INT_R.IMUX24.NL1END0 origin:050-pip-seed !22_04 19_05 23_04 24_04 25_04
 INT_R.IMUX24.NN2END0 origin:050-pip-seed !22_04 !23_04 !24_04 18_05 25_04
@@ -1238,9 +1238,9 @@
 INT_R.IMUX25.FAN_BOUNCE5 origin:050-pip-seed !22_12 20_12 23_12 24_12 25_12
 INT_R.IMUX25.FAN_BOUNCE6 origin:050-pip-seed !23_12 20_12 22_12 24_12 25_12
 INT_R.IMUX25.GFAN0 origin:049-int-imux-gfan !22_12 !23_12 !24_12 21_12 25_12
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 INT_R.IMUX25.NE2END1 origin:050-pip-seed !22_12 !23_12 !25_12 19_13 24_12
 INT_R.IMUX25.NL1END1 origin:050-pip-seed !22_12 19_13 23_12 24_12 25_12
 INT_R.IMUX25.NN2END1 origin:050-pip-seed !22_12 !23_12 !24_12 19_13 25_12
@@ -1262,8 +1262,8 @@
 INT_R.IMUX26.FAN_BOUNCE1 origin:050-pip-seed !22_20 20_20 23_20 24_20 25_20
 INT_R.IMUX26.FAN_BOUNCE7 origin:050-pip-seed !23_20 20_20 22_20 24_20 25_20
 INT_R.IMUX26.GFAN0 origin:049-int-imux-gfan !22_20 !23_20 !24_20 21_20 25_20
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 INT_R.IMUX26.LOGIC_OUTS9 origin:051-pip-imuxlout-bypalts !22_20 21_20 23_20 24_20 25_20
 INT_R.IMUX26.NE2END1 origin:050-pip-seed !22_20 !23_20 !25_20 18_21 24_20
 INT_R.IMUX26.NL1END1 origin:050-pip-seed !22_20 19_21 23_20 24_20 25_20
@@ -1286,9 +1286,9 @@
 INT_R.IMUX27.FAN_BOUNCE3 origin:050-pip-seed !22_28 20_28 23_28 24_28 25_28
 INT_R.IMUX27.FAN_BOUNCE5 origin:050-pip-seed !23_28 20_28 22_28 24_28 25_28
 INT_R.IMUX27.GFAN0 origin:049-int-imux-gfan !22_28 !23_28 !24_28 21_28 25_28
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 INT_R.IMUX27.LOGIC_OUTS13 origin:051-pip-imuxlout-bypalts !22_28 21_28 23_28 24_28 25_28
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+INT_R.IMUX27.LOGIC_OUTS23 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_28 !23_28 !25_28 21_28 24_28
 INT_R.IMUX27.NE2END2 origin:050-pip-seed !22_28 !23_28 !25_28 19_29 24_28
 INT_R.IMUX27.NL1END2 origin:050-pip-seed !22_28 19_29 23_28 24_28 25_28
 INT_R.IMUX27.NN2END2 origin:050-pip-seed !22_28 !23_28 !24_28 19_29 25_28
@@ -1311,8 +1311,8 @@
 INT_R.IMUX28.FAN_BOUNCE_S3_0 origin:050-pip-seed !23_36 20_36 22_36 24_36 25_36
 INT_R.IMUX28.GFAN1 origin:049-int-imux-gfan !22_36 !23_36 !24_36 21_36 25_36
 INT_R.IMUX28.LOGIC_OUTS14 origin:051-pip-imuxlout-bypalts !22_36 21_36 23_36 24_36 25_36
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 INT_R.IMUX28.NE2END2 origin:050-pip-seed !22_36 !23_36 !25_36 18_37 24_36
 INT_R.IMUX28.NL1END2 origin:050-pip-seed !22_36 19_37 23_36 24_36 25_36
 INT_R.IMUX28.NN2END2 origin:050-pip-seed !22_36 !23_36 !24_36 18_37 25_36
@@ -1334,9 +1334,9 @@
 INT_R.IMUX29.FAN_BOUNCE3 origin:050-pip-seed !22_44 20_44 23_44 24_44 25_44
 INT_R.IMUX29.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_44 20_44 22_44 24_44 25_44
 INT_R.IMUX29.GFAN1 origin:049-int-imux-gfan !22_44 !23_44 !24_44 21_44 25_44
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 INT_R.IMUX29.NE2END3 origin:050-pip-seed !22_44 !23_44 !25_44 19_45 24_44
 INT_R.IMUX29.NL1BEG_N3 origin:050-pip-seed !22_44 19_45 23_44 24_44 25_44
 INT_R.IMUX29.NN2END3 origin:050-pip-seed !22_44 !23_44 !24_44 19_45 25_44
@@ -1358,9 +1358,9 @@
 INT_R.IMUX3.FAN_BOUNCE3 origin:050-pip-seed !23_25 21_25 22_25 24_25 25_25
 INT_R.IMUX3.FAN_BOUNCE5 origin:050-pip-seed !22_25 21_25 23_25 24_25 25_25
 INT_R.IMUX3.GFAN0 origin:049-int-imux-gfan !22_25 !23_25 !25_25 20_25 24_25
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 INT_R.IMUX3.NE2END1 origin:050-pip-seed !22_25 !23_25 !24_25 19_24 25_25
 INT_R.IMUX3.NL1END2 origin:050-pip-seed !23_25 17_25 22_25 24_25 25_25
 INT_R.IMUX3.NN2END1 origin:050-pip-seed !22_25 !23_25 !25_25 19_24 24_25
@@ -1382,9 +1382,9 @@
 INT_R.IMUX30.FAN_BOUNCE_S3_0 origin:050-pip-seed !22_52 20_52 23_52 24_52 25_52
 INT_R.IMUX30.FAN_BOUNCE_S3_2 origin:050-pip-seed !23_52 20_52 22_52 24_52 25_52
 INT_R.IMUX30.GFAN1 origin:049-int-imux-gfan !22_52 !23_52 !24_52 21_52 25_52
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 INT_R.IMUX30.NE2END3 origin:050-pip-seed !22_52 !23_52 !25_52 18_53 24_52
 INT_R.IMUX30.NL1BEG_N3 origin:050-pip-seed !22_52 19_53 23_52 24_52 25_52
 INT_R.IMUX30.NN2END3 origin:050-pip-seed !22_52 !23_52 !24_52 18_53 25_52
@@ -1406,9 +1406,9 @@
 INT_R.IMUX31.FAN_BOUNCE_S3_4 origin:050-pip-seed !22_60 20_60 23_60 24_60 25_60
 INT_R.IMUX31.FAN_BOUNCE_S3_6 origin:050-pip-seed !23_60 20_60 22_60 24_60 25_60
 INT_R.IMUX31.GFAN1 origin:049-int-imux-gfan !22_60 !23_60 !24_60 21_60 25_60
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 INT_R.IMUX31.NE2END_S3_0 origin:050-pip-seed !22_60 !23_60 !25_60 19_61 24_60
 INT_R.IMUX31.NL1END_S3_0 origin:050-pip-seed !22_60 19_61 23_60 24_60 25_60
 INT_R.IMUX31.NN2END_S2_0 origin:050-pip-seed !22_60 !23_60 !24_60 19_61 25_60
@@ -1430,8 +1430,8 @@
 INT_R.IMUX32.FAN_BOUNCE2 origin:050-pip-seed !22_05 21_05 23_05 24_05 25_05
 INT_R.IMUX32.FAN_BOUNCE7 origin:050-pip-seed !23_05 21_05 22_05 24_05 25_05
 INT_R.IMUX32.GFAN0 origin:049-int-imux-gfan !22_05 !23_05 !25_05 20_05 24_05
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 INT_R.IMUX32.LOGIC_OUTS22 origin:051-pip-imuxlout-bypalts !22_05 !23_05 !24_05 20_05 25_05
 INT_R.IMUX32.NE2END0 origin:050-pip-seed !22_05 !23_05 !24_05 16_05 25_05
 INT_R.IMUX32.NL1END0 origin:050-pip-seed !23_05 17_05 22_05 24_05 25_05
@@ -1455,8 +1455,8 @@
 INT_R.IMUX33.FAN_BOUNCE6 origin:050-pip-seed !22_13 21_13 23_13 24_13 25_13
 INT_R.IMUX33.GFAN0 origin:049-int-imux-gfan !22_13 !23_13 !25_13 20_13 24_13
 INT_R.IMUX33.LOGIC_OUTS18 origin:051-pip-imuxlout-bypalts !22_13 !23_13 !24_13 20_13 25_13
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 INT_R.IMUX33.NE2END1 origin:050-pip-seed !22_13 !23_13 !24_13 17_13 25_13
 INT_R.IMUX33.NL1END1 origin:050-pip-seed !23_13 17_13 22_13 24_13 25_13
 INT_R.IMUX33.NN2END1 origin:050-pip-seed !22_13 !23_13 !25_13 17_13 24_13
@@ -1478,9 +1478,9 @@
 INT_R.IMUX34.FAN_BOUNCE1 origin:050-pip-seed !23_21 21_21 22_21 24_21 25_21
 INT_R.IMUX34.FAN_BOUNCE7 origin:050-pip-seed !22_21 21_21 23_21 24_21 25_21
 INT_R.IMUX34.GFAN0 origin:049-int-imux-gfan !22_21 !23_21 !25_21 20_21 24_21
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 INT_R.IMUX34.NN2END1 origin:050-pip-seed !22_21 !23_21 !25_21 16_21 24_21
@@ -1502,9 +1502,9 @@
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 INT_R.IMUX35.NN2END2 origin:050-pip-seed !22_29 !23_29 !25_29 17_29 24_29
@@ -1526,9 +1526,9 @@
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 INT_R.IMUX36.NN2END2 origin:050-pip-seed !22_37 !23_37 !25_37 16_37 24_37
@@ -1550,9 +1550,9 @@
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 INT_R.IMUX37.NN2END3 origin:050-pip-seed !22_45 !23_45 !25_45 17_45 24_45
@@ -1574,9 +1574,9 @@
 INT_R.IMUX38.FAN_BOUNCE_S3_0 origin:050-pip-seed !23_53 21_53 22_53 24_53 25_53
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 INT_R.IMUX38.NN2END3 origin:050-pip-seed !22_53 !23_53 !25_53 16_53 24_53
@@ -1598,9 +1598,9 @@
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 INT_R.IMUX39.NE2END_S3_0 origin:050-pip-seed !22_61 !23_61 !24_61 17_61 25_61
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 INT_R.IMUX39.NN2END_S2_0 origin:050-pip-seed !22_61 !23_61 !25_61 17_61 24_61
@@ -1622,9 +1622,9 @@
 INT_R.IMUX4.FAN_BOUNCE1 origin:050-pip-seed !23_33 21_33 22_33 24_33 25_33
 INT_R.IMUX4.FAN_BOUNCE_S3_0 origin:050-pip-seed !22_33 21_33 23_33 24_33 25_33
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 INT_R.IMUX4.NE2END2 origin:050-pip-seed !22_33 !23_33 !24_33 16_33 25_33
 INT_R.IMUX4.NL1END2 origin:050-pip-seed !23_33 17_33 22_33 24_33 25_33
 INT_R.IMUX4.NN2END2 origin:050-pip-seed !22_33 !23_33 !25_33 16_33 24_33
@@ -1646,9 +1646,9 @@
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@@ -1670,9 +1670,9 @@
 INT_R.IMUX41.FAN_BOUNCE5 origin:050-pip-seed !22_14 20_14 23_14 24_14 25_14
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 INT_R.IMUX41.NE2END1 origin:050-pip-seed !22_14 !23_14 !25_14 18_15 24_14
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 INT_R.IMUX41.NN2END1 origin:050-pip-seed !22_14 !23_14 !24_14 18_15 25_14
@@ -1695,8 +1695,8 @@
 INT_R.IMUX42.FAN_BOUNCE7 origin:050-pip-seed !23_22 20_22 22_22 24_22 25_22
 INT_R.IMUX42.GFAN0 origin:049-int-imux-gfan !22_22 !23_22 !24_22 21_22 25_22
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 INT_R.IMUX42.NE2END1 origin:050-pip-seed !22_22 !23_22 !25_22 17_22 24_22
 INT_R.IMUX42.NL1END1 origin:050-pip-seed !22_22 16_22 23_22 24_22 25_22
 INT_R.IMUX42.NN2END1 origin:050-pip-seed !22_22 !23_22 !24_22 17_22 25_22
@@ -1718,8 +1718,8 @@
 INT_R.IMUX43.FAN_BOUNCE3 origin:050-pip-seed !22_30 20_30 23_30 24_30 25_30
 INT_R.IMUX43.FAN_BOUNCE5 origin:050-pip-seed !23_30 20_30 22_30 24_30 25_30
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 INT_R.IMUX43.NE2END2 origin:050-pip-seed !22_30 !23_30 !25_30 18_31 24_30
 INT_R.IMUX43.NL1END2 origin:050-pip-seed !22_30 16_30 23_30 24_30 25_30
@@ -1742,9 +1742,9 @@
 INT_R.IMUX44.FAN_BOUNCE1 origin:050-pip-seed !22_38 20_38 23_38 24_38 25_38
 INT_R.IMUX44.FAN_BOUNCE_S3_0 origin:050-pip-seed !23_38 20_38 22_38 24_38 25_38
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 INT_R.IMUX44.NE2END2 origin:050-pip-seed !22_38 !23_38 !25_38 17_38 24_38
 INT_R.IMUX44.NL1END2 origin:050-pip-seed !22_38 16_38 23_38 24_38 25_38
 INT_R.IMUX44.NN2END2 origin:050-pip-seed !22_38 !23_38 !24_38 17_38 25_38
@@ -1766,9 +1766,9 @@
 INT_R.IMUX45.FAN_BOUNCE3 origin:050-pip-seed !22_46 20_46 23_46 24_46 25_46
 INT_R.IMUX45.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_46 20_46 22_46 24_46 25_46
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 INT_R.IMUX45.NE2END3 origin:050-pip-seed !22_46 !23_46 !25_46 18_47 24_46
 INT_R.IMUX45.NL1BEG_N3 origin:050-pip-seed !22_46 16_46 23_46 24_46 25_46
 INT_R.IMUX45.NN2END3 origin:050-pip-seed !22_46 !23_46 !24_46 18_47 25_46
@@ -1791,8 +1791,8 @@
 INT_R.IMUX46.FAN_BOUNCE_S3_2 origin:050-pip-seed !23_54 20_54 22_54 24_54 25_54
 INT_R.IMUX46.GFAN1 origin:049-int-imux-gfan !22_54 !23_54 !24_54 21_54 25_54
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 INT_R.IMUX46.NE2END3 origin:050-pip-seed !22_54 !23_54 !25_54 17_54 24_54
 INT_R.IMUX46.NL1BEG_N3 origin:050-pip-seed !22_54 16_54 23_54 24_54 25_54
 INT_R.IMUX46.NN2END3 origin:050-pip-seed !22_54 !23_54 !24_54 17_54 25_54
@@ -1815,8 +1815,8 @@
 INT_R.IMUX47.FAN_BOUNCE_S3_6 origin:050-pip-seed !23_62 20_62 22_62 24_62 25_62
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 INT_R.IMUX47.NE2END_S3_0 origin:050-pip-seed !22_62 !23_62 !25_62 18_63 24_62
 INT_R.IMUX47.NL1END_S3_0 origin:050-pip-seed !22_62 16_62 23_62 24_62 25_62
 INT_R.IMUX47.NN2END_S2_0 origin:050-pip-seed !22_62 !23_62 !24_62 18_63 25_62
@@ -1838,9 +1838,9 @@
 INT_R.IMUX5.FAN_BOUNCE3 origin:050-pip-seed !23_41 21_41 22_41 24_41 25_41
 INT_R.IMUX5.FAN_BOUNCE_S3_4 origin:050-pip-seed !22_41 21_41 23_41 24_41 25_41
 INT_R.IMUX5.GFAN1 origin:049-int-imux-gfan !22_41 !23_41 !25_41 20_41 24_41
-INT_R.IMUX5.LOGIC_OUTS10 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_41 20_41 22_41 24_41 25_41
-INT_R.IMUX5.LOGIC_OUTS16 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_41 !23_41 !24_41 20_41 25_41
-INT_R.IMUX5.LOGIC_OUTS6 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_41 20_41 23_41 24_41 25_41
+INT_R.IMUX5.LOGIC_OUTS10 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_41 20_41 22_41 24_41 25_41
+INT_R.IMUX5.LOGIC_OUTS16 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_41 !23_41 !24_41 20_41 25_41
+INT_R.IMUX5.LOGIC_OUTS6 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_41 20_41 23_41 24_41 25_41
 INT_R.IMUX5.NE2END2 origin:050-pip-seed !22_41 !23_41 !24_41 19_40 25_41
 INT_R.IMUX5.NL1BEG_N3 origin:050-pip-seed !23_41 17_41 22_41 24_41 25_41
 INT_R.IMUX5.NN2END2 origin:050-pip-seed !22_41 !23_41 !25_41 19_40 24_41
@@ -1862,9 +1862,9 @@
 INT_R.IMUX6.FAN_BOUNCE_S3_0 origin:050-pip-seed !23_49 21_49 22_49 24_49 25_49
 INT_R.IMUX6.FAN_BOUNCE_S3_2 origin:050-pip-seed !22_49 21_49 23_49 24_49 25_49
 INT_R.IMUX6.GFAN1 origin:049-int-imux-gfan !22_49 !23_49 !25_49 20_49 24_49
-INT_R.IMUX6.LOGIC_OUTS11 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_49 20_49 22_49 24_49 25_49
-INT_R.IMUX6.LOGIC_OUTS17 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_49 !23_49 !24_49 20_49 25_49
-INT_R.IMUX6.LOGIC_OUTS7 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_49 20_49 23_49 24_49 25_49
+INT_R.IMUX6.LOGIC_OUTS11 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_49 20_49 22_49 24_49 25_49
+INT_R.IMUX6.LOGIC_OUTS17 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_49 !23_49 !24_49 20_49 25_49
+INT_R.IMUX6.LOGIC_OUTS7 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_49 20_49 23_49 24_49 25_49
 INT_R.IMUX6.NE2END3 origin:050-pip-seed !22_49 !23_49 !24_49 16_49 25_49
 INT_R.IMUX6.NL1BEG_N3 origin:050-pip-seed !23_49 17_49 22_49 24_49 25_49
 INT_R.IMUX6.NN2END3 origin:050-pip-seed !22_49 !23_49 !25_49 16_49 24_49
@@ -1886,9 +1886,9 @@
 INT_R.IMUX7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_57 21_57 22_57 24_57 25_57
 INT_R.IMUX7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_57 21_57 23_57 24_57 25_57
 INT_R.IMUX7.GFAN1 origin:049-int-imux-gfan !22_57 !23_57 !25_57 20_57 24_57
-INT_R.IMUX7.LOGIC_OUTS15 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_57 20_57 22_57 24_57 25_57
-INT_R.IMUX7.LOGIC_OUTS21 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_57 !23_57 !24_57 20_57 25_57
-INT_R.IMUX7.LOGIC_OUTS3 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_57 20_57 23_57 24_57 25_57
+INT_R.IMUX7.LOGIC_OUTS15 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_57 20_57 22_57 24_57 25_57
+INT_R.IMUX7.LOGIC_OUTS21 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_57 !23_57 !24_57 20_57 25_57
+INT_R.IMUX7.LOGIC_OUTS3 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_57 20_57 23_57 24_57 25_57
 INT_R.IMUX7.NE2END3 origin:050-pip-seed !22_57 !23_57 !24_57 19_56 25_57
 INT_R.IMUX7.NL1END_S3_0 origin:050-pip-seed !23_57 17_57 22_57 24_57 25_57
 INT_R.IMUX7.NN2END3 origin:050-pip-seed !22_57 !23_57 !25_57 19_56 24_57
@@ -1910,9 +1910,9 @@
 INT_R.IMUX8.FAN_BOUNCE2 origin:050-pip-seed !23_02 20_02 22_02 24_02 25_02
 INT_R.IMUX8.FAN_BOUNCE7 origin:050-pip-seed !22_02 20_02 23_02 24_02 25_02
 INT_R.IMUX8.GFAN0 origin:049-int-imux-gfan !22_02 !23_02 !24_02 21_02 25_02
-INT_R.IMUX8.LOGIC_OUTS0 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_02 21_02 22_02 24_02 25_02
+INT_R.IMUX8.LOGIC_OUTS0 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_02 21_02 22_02 24_02 25_02
 INT_R.IMUX8.LOGIC_OUTS12 origin:051-pip-imuxlout-bypalts !22_02 21_02 23_02 24_02 25_02
-INT_R.IMUX8.LOGIC_OUTS22 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_02 !23_02 !25_02 21_02 24_02
+INT_R.IMUX8.LOGIC_OUTS22 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_02 !23_02 !25_02 21_02 24_02
 INT_R.IMUX8.NE2END0 origin:050-pip-seed !22_02 !23_02 !25_02 17_02 24_02
 INT_R.IMUX8.NL1END0 origin:050-pip-seed !22_02 16_02 23_02 24_02 25_02
 INT_R.IMUX8.NN2END0 origin:050-pip-seed !22_02 !23_02 !24_02 17_02 25_02
@@ -1934,8 +1934,8 @@
 INT_R.IMUX9.FAN_BOUNCE5 origin:050-pip-seed !22_10 20_10 23_10 24_10 25_10
 INT_R.IMUX9.FAN_BOUNCE6 origin:050-pip-seed !23_10 20_10 22_10 24_10 25_10
 INT_R.IMUX9.GFAN0 origin:049-int-imux-gfan !22_10 !23_10 !24_10 21_10 25_10
-INT_R.IMUX9.LOGIC_OUTS18 origin:050-pip-seed,051-pip-imuxlout-bypalts !22_10 !23_10 !25_10 21_10 24_10
-INT_R.IMUX9.LOGIC_OUTS4 origin:050-pip-seed,051-pip-imuxlout-bypalts !23_10 21_10 22_10 24_10 25_10
+INT_R.IMUX9.LOGIC_OUTS18 origin:051-pip-imuxlout-bypalts,050-pip-seed !22_10 !23_10 !25_10 21_10 24_10
+INT_R.IMUX9.LOGIC_OUTS4 origin:051-pip-imuxlout-bypalts,050-pip-seed !23_10 21_10 22_10 24_10 25_10
 INT_R.IMUX9.LOGIC_OUTS8 origin:051-pip-imuxlout-bypalts !22_10 21_10 23_10 24_10 25_10
 INT_R.IMUX9.NE2END0 origin:050-pip-seed !22_10 !23_10 !25_10 16_10 24_10
 INT_R.IMUX9.NL1END1 origin:050-pip-seed !22_10 16_10 23_10 24_10 25_10
@@ -1952,6 +1952,9 @@
 INT_R.IMUX9.WW2END0 origin:050-pip-seed !22_10 !23_10 !24_10 18_11 25_10
 INT_R.LH0.EE4END3 origin:056-pip-rem 00_58 01_61
 INT_R.LH0.ER1END3 origin:056-pip-rem 00_57 01_54
+INT_R.LH0.LH12 origin:057-pip-bi 01_54 01_56
+INT_R.LH0.LV0 origin:057-pip-bi 01_56 01_58
+INT_R.LH0.LV18 origin:057-pip-bi 01_56 01_61
 INT_R.LH0.LV9 origin:056-pip-rem 00_59 01_56
 INT_R.LH0.NE2END3 origin:056-pip-rem 00_58 00_59
 INT_R.LH0.NE6END3 origin:056-pip-rem 00_58 01_58
@@ -1961,6 +1964,9 @@
 INT_R.LH0.SW6END3 origin:056-pip-rem 00_57 01_61
 INT_R.LH12.EE4END3 origin:056-pip-rem 01_60 01_62
 INT_R.LH12.ER1END3 origin:056-pip-rem 00_63 01_60
+INT_R.LH12.LH0 origin:057-pip-bi 00_61 00_63
+INT_R.LH12.LV0 origin:057-pip-bi 00_55 00_62
+INT_R.LH12.LV18 origin:057-pip-bi 00_62 01_62
 INT_R.LH12.LV9 origin:056-pip-rem 00_62 01_57
 INT_R.LH12.NE2END3 origin:056-pip-rem 01_57 01_60
 INT_R.LH12.NE6END3 origin:056-pip-rem 00_55 01_60
@@ -1969,7 +1975,10 @@
 INT_R.LH12.SS6END3 origin:056-pip-rem 00_55 00_61
 INT_R.LH12.SW6END3 origin:056-pip-rem 00_61 01_62
 INT_R.LV0.ER1END0 origin:056-pip-rem 01_04 01_05
+INT_R.LV0.LH0 origin:057-pip-bi 00_02 01_06
+INT_R.LV0.LH12 origin:057-pip-bi 00_05 01_06
 INT_R.LV0.LH6 origin:056-pip-rem 01_04 01_06
+INT_R.LV0.LV18 origin:057-pip-bi 00_09 01_06
 INT_R.LV0.NN6END0 origin:056-pip-rem 00_07 00_09
 INT_R.LV0.NR1END0 origin:056-pip-rem 00_02 01_05
 INT_R.LV0.NW6END0 origin:056-pip-rem 00_07 01_04
@@ -1978,7 +1987,10 @@
 INT_R.LV0.WR1END0 origin:056-pip-rem 00_02 00_07
 INT_R.LV0.WW4END0 origin:056-pip-rem 00_05 00_07
 INT_R.LV18.ER1END0 origin:056-pip-rem 00_03 00_06
+INT_R.LV18.LH0 origin:057-pip-bi 00_01 01_02
+INT_R.LV18.LH12 origin:057-pip-bi 01_02 01_08
 INT_R.LV18.LH6 origin:056-pip-rem 00_06 01_02
+INT_R.LV18.LV0 origin:057-pip-bi 01_00 01_01
 INT_R.LV18.NN6END0 origin:056-pip-rem 00_03 01_00
 INT_R.LV18.NR1END0 origin:056-pip-rem 00_01 00_03
 INT_R.LV18.NW6END0 origin:056-pip-rem 00_06 01_01
@@ -1991,6 +2003,7 @@
 INT_R.LVB0.LH6 origin:056-pip-rem 00_51 00_53
 INT_R.LVB0.LV0 origin:056-pip-rem 00_47 01_52
 INT_R.LVB0.LV18 origin:056-pip-rem 01_42 01_52
+INT_R.LVB0.LVB12 origin:057-pip-bi 00_51 00_54
 INT_R.LVB0.NE2END2 origin:056-pip-rem 00_53 01_52
 INT_R.LVB0.NN6END3 origin:056-pip-rem 00_50 01_50
 INT_R.LVB0.NR1END3 origin:056-pip-rem 00_47 01_50
@@ -2008,6 +2021,7 @@
 INT_R.LVB12.LH6 origin:056-pip-rem 00_46 01_49
 INT_R.LVB12.LV0 origin:056-pip-rem 00_45 01_44
 INT_R.LVB12.LV18 origin:056-pip-rem 00_45 01_48
+INT_R.LVB12.LVB0 origin:057-pip-bi 00_45 01_45
 INT_R.LVB12.NE2END2 origin:056-pip-rem 00_45 01_49
 INT_R.LVB12.NN6END3 origin:056-pip-rem 01_46 01_53
 INT_R.LVB12.NR1END3 origin:056-pip-rem 01_44 01_46
@@ -2179,7 +2193,7 @@
 INT_R.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
 INT_R.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
 INT_R.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
-INT_R.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
+INT_R.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
 INT_R.NL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_16 14_17
 INT_R.NL1BEG0.LOGIC_OUTS13 origin:050-pip-seed 10_17 14_17
 INT_R.NL1BEG0.LOGIC_OUTS19 origin:050-pip-seed 08_17 14_17
@@ -3549,7 +3563,7 @@
 INT_R.WW4BEG0.LOGIC_OUTS8 origin:050-pip-seed 03_00 07_01
 INT_R.WW4BEG0.LV0 origin:056-pip-rem 04_02 05_00
 INT_R.WW4BEG0.NE2END0 origin:050-pip-seed 02_01 05_03
-INT_R.WW4BEG0.NE6END0 origin:056-pip-rem 05_00 05_03
+INT_R.WW4BEG0.NE6END0 origin:050-pip-seed 05_00 05_03
 INT_R.WW4BEG0.NN2END0 origin:050-pip-seed 03_00 05_03
 INT_R.WW4BEG0.NN6END0 origin:050-pip-seed 05_03 06_00
 INT_R.WW4BEG0.NW2END0 origin:050-pip-seed 02_01 03_01
@@ -3589,7 +3603,7 @@
 INT_R.WW4BEG2.LVB0 origin:056-pip-rem 04_34 05_32
 INT_R.WW4BEG2.LVB12 origin:056-pip-rem 05_32 07_33
 INT_R.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
-INT_R.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
+INT_R.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
 INT_R.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
 INT_R.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
 INT_R.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
@@ -3609,7 +3623,7 @@
 INT_R.WW4BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_49 04_50
 INT_R.WW4BEG3.LV18 origin:056-pip-rem 05_48 07_49
 INT_R.WW4BEG3.NE2END3 origin:050-pip-seed 02_49 05_51
-INT_R.WW4BEG3.NE6END3 origin:056-pip-rem 05_48 05_51
+INT_R.WW4BEG3.NE6END3 origin:050-pip-seed 05_48 05_51
 INT_R.WW4BEG3.NN2END3 origin:050-pip-seed 03_48 05_51
 INT_R.WW4BEG3.NN6END3 origin:050-pip-seed 05_51 06_48
 INT_R.WW4BEG3.NW2END3 origin:050-pip-seed 02_49 03_49
diff --git a/artix7/tilegrid.json b/artix7/tilegrid.json
index b4c2134..b30a45e 100644
--- a/artix7/tilegrid.json
+++ b/artix7/tilegrid.json
@@ -5699,7 +5699,14 @@
         "type": "CFG_CENTER_BOT"
     },
     "CFG_CENTER_MID_X46Y32": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00400900",
+                "frames": 30,
+                "offset": 0,
+                "words": 101
+            }
+        },
         "grid_x": 46,
         "grid_y": 124,
         "sites": {
diff --git a/artix7/timings/CMT_TOP_L_LOWER_B.sdf b/artix7/timings/CMT_TOP_L_LOWER_B.sdf
index 7c94cb9..ff5265d 100644
--- a/artix7/timings/CMT_TOP_L_LOWER_B.sdf
+++ b/artix7/timings/CMT_TOP_L_LOWER_B.sdf
@@ -80,6 +80,86 @@
         )
     )
     (CELL
+        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_FALSE_BUF_IN")
+        (INSTANCE MMCME2_ADV)
+        (DELAY
+            (ABSOLUTE
+                (IOPATH COMPENSATION CLKOUT4 (0.255::-0.260)(0.433::-0.240))
+                (IOPATH COMPENSATION CLKOUT4 (0.255::-0.260)(0.433::-0.240))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_FALSE_EXTERNAL")
+        (INSTANCE MMCME2_ADV)
+        (DELAY
+            (ABSOLUTE
+                (IOPATH COMPENSATION CLKOUT4 (0.000::0.000)(0.000::0.000))
+                (IOPATH COMPENSATION CLKOUT4 (0.000::0.000)(0.000::0.000))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_FALSE_INTERNAL")
+        (INSTANCE MMCME2_ADV)
+        (DELAY
+            (ABSOLUTE
+                (IOPATH COMPENSATION CLKOUT4 (0.050::0.053)(0.083::0.088))
+                (IOPATH COMPENSATION CLKOUT4 (0.050::0.053)(0.083::0.088))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_FALSE_ZHOLD")
+        (INSTANCE MMCME2_ADV)
+        (DELAY
+            (ABSOLUTE
+                (IOPATH COMPENSATION CLKOUT4 (0.000::0.000)(0.000::0.000))
+                (IOPATH COMPENSATION CLKOUT4 (0.000::0.000)(0.000::0.000))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_TRUE_BUF_IN")
+        (INSTANCE MMCME2_ADV)
+        (DELAY
+            (ABSOLUTE
+                (IOPATH COMPENSATION CLKOUT4 (0.255::-0.260)(0.433::-0.240))
+                (IOPATH COMPENSATION CLKOUT4 (0.255::-0.260)(0.433::-0.240))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_TRUE_EXTERNAL")
+        (INSTANCE MMCME2_ADV)
+        (DELAY
+            (ABSOLUTE
+                (IOPATH COMPENSATION CLKOUT4 (0.000::0.000)(0.000::0.000))
+                (IOPATH COMPENSATION CLKOUT4 (0.000::0.000)(0.000::0.000))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_TRUE_INTERNAL")
+        (INSTANCE MMCME2_ADV)
+        (DELAY
+            (ABSOLUTE
+                (IOPATH COMPENSATION CLKOUT4 (0.263::0.279)(0.492::0.522))
+                (IOPATH COMPENSATION CLKOUT4 (0.263::0.279)(0.492::0.522))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_TRUE_ZHOLD")
+        (INSTANCE MMCME2_ADV)
+        (DELAY
+            (ABSOLUTE
+                (IOPATH COMPENSATION CLKOUT4 (0.000::0.000)(0.000::0.000))
+                (IOPATH COMPENSATION CLKOUT4 (0.000::0.000)(0.000::0.000))
+            )
+        )
+    )
+    (CELL
         (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_EXTERNAL")
         (INSTANCE MMCME2_ADV)
         (DELAY
@@ -112,46 +192,6 @@
         )
     )
     (CELL
-        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_FALSE_COMPENSATION_BUF_IN")
-        (INSTANCE MMCME2_ADV)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.255::-0.260)(0.433::-0.240))
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.255::-0.260)(0.433::-0.240))
-            )
-        )
-    )
-    (CELL
-        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_FALSE_COMPENSATION_EXTERNAL")
-        (INSTANCE MMCME2_ADV)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.000::0.000)(0.000::0.000))
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.000::0.000)(0.000::0.000))
-            )
-        )
-    )
-    (CELL
-        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_FALSE_COMPENSATION_INTERNAL")
-        (INSTANCE MMCME2_ADV)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.050::0.053)(0.083::0.088))
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.050::0.053)(0.083::0.088))
-            )
-        )
-    )
-    (CELL
-        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_FALSE_COMPENSATION_ZHOLD")
-        (INSTANCE MMCME2_ADV)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.000::0.000)(0.000::0.000))
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.000::0.000)(0.000::0.000))
-            )
-        )
-    )
-    (CELL
         (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_INTERNAL")
         (INSTANCE MMCME2_ADV)
         (DELAY
@@ -184,46 +224,6 @@
         )
     )
     (CELL
-        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_TRUE_COMPENSATION_BUF_IN")
-        (INSTANCE MMCME2_ADV)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.255::-0.260)(0.433::-0.240))
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.255::-0.260)(0.433::-0.240))
-            )
-        )
-    )
-    (CELL
-        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_TRUE_COMPENSATION_EXTERNAL")
-        (INSTANCE MMCME2_ADV)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.000::0.000)(0.000::0.000))
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.000::0.000)(0.000::0.000))
-            )
-        )
-    )
-    (CELL
-        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_TRUE_COMPENSATION_INTERNAL")
-        (INSTANCE MMCME2_ADV)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.263::0.279)(0.492::0.522))
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.263::0.279)(0.492::0.522))
-            )
-        )
-    )
-    (CELL
-        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_TRUE_COMPENSATION_ZHOLD")
-        (INSTANCE MMCME2_ADV)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.000::0.000)(0.000::0.000))
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.000::0.000)(0.000::0.000))
-            )
-        )
-    )
-    (CELL
         (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_ZHOLD")
         (INSTANCE MMCME2_ADV)
         (DELAY
diff --git a/artix7/timings/CMT_TOP_R_LOWER_B.sdf b/artix7/timings/CMT_TOP_R_LOWER_B.sdf
index 7c94cb9..ff5265d 100644
--- a/artix7/timings/CMT_TOP_R_LOWER_B.sdf
+++ b/artix7/timings/CMT_TOP_R_LOWER_B.sdf
@@ -80,6 +80,86 @@
         )
     )
     (CELL
+        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_FALSE_BUF_IN")
+        (INSTANCE MMCME2_ADV)
+        (DELAY
+            (ABSOLUTE
+                (IOPATH COMPENSATION CLKOUT4 (0.255::-0.260)(0.433::-0.240))
+                (IOPATH COMPENSATION CLKOUT4 (0.255::-0.260)(0.433::-0.240))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_FALSE_EXTERNAL")
+        (INSTANCE MMCME2_ADV)
+        (DELAY
+            (ABSOLUTE
+                (IOPATH COMPENSATION CLKOUT4 (0.000::0.000)(0.000::0.000))
+                (IOPATH COMPENSATION CLKOUT4 (0.000::0.000)(0.000::0.000))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_FALSE_INTERNAL")
+        (INSTANCE MMCME2_ADV)
+        (DELAY
+            (ABSOLUTE
+                (IOPATH COMPENSATION CLKOUT4 (0.050::0.053)(0.083::0.088))
+                (IOPATH COMPENSATION CLKOUT4 (0.050::0.053)(0.083::0.088))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_FALSE_ZHOLD")
+        (INSTANCE MMCME2_ADV)
+        (DELAY
+            (ABSOLUTE
+                (IOPATH COMPENSATION CLKOUT4 (0.000::0.000)(0.000::0.000))
+                (IOPATH COMPENSATION CLKOUT4 (0.000::0.000)(0.000::0.000))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_TRUE_BUF_IN")
+        (INSTANCE MMCME2_ADV)
+        (DELAY
+            (ABSOLUTE
+                (IOPATH COMPENSATION CLKOUT4 (0.255::-0.260)(0.433::-0.240))
+                (IOPATH COMPENSATION CLKOUT4 (0.255::-0.260)(0.433::-0.240))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_TRUE_EXTERNAL")
+        (INSTANCE MMCME2_ADV)
+        (DELAY
+            (ABSOLUTE
+                (IOPATH COMPENSATION CLKOUT4 (0.000::0.000)(0.000::0.000))
+                (IOPATH COMPENSATION CLKOUT4 (0.000::0.000)(0.000::0.000))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_TRUE_INTERNAL")
+        (INSTANCE MMCME2_ADV)
+        (DELAY
+            (ABSOLUTE
+                (IOPATH COMPENSATION CLKOUT4 (0.263::0.279)(0.492::0.522))
+                (IOPATH COMPENSATION CLKOUT4 (0.263::0.279)(0.492::0.522))
+            )
+        )
+    )
+    (CELL
+        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_TRUE_ZHOLD")
+        (INSTANCE MMCME2_ADV)
+        (DELAY
+            (ABSOLUTE
+                (IOPATH COMPENSATION CLKOUT4 (0.000::0.000)(0.000::0.000))
+                (IOPATH COMPENSATION CLKOUT4 (0.000::0.000)(0.000::0.000))
+            )
+        )
+    )
+    (CELL
         (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_EXTERNAL")
         (INSTANCE MMCME2_ADV)
         (DELAY
@@ -112,46 +192,6 @@
         )
     )
     (CELL
-        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_FALSE_COMPENSATION_BUF_IN")
-        (INSTANCE MMCME2_ADV)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.255::-0.260)(0.433::-0.240))
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.255::-0.260)(0.433::-0.240))
-            )
-        )
-    )
-    (CELL
-        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_FALSE_COMPENSATION_EXTERNAL")
-        (INSTANCE MMCME2_ADV)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.000::0.000)(0.000::0.000))
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.000::0.000)(0.000::0.000))
-            )
-        )
-    )
-    (CELL
-        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_FALSE_COMPENSATION_INTERNAL")
-        (INSTANCE MMCME2_ADV)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.050::0.053)(0.083::0.088))
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.050::0.053)(0.083::0.088))
-            )
-        )
-    )
-    (CELL
-        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_FALSE_COMPENSATION_ZHOLD")
-        (INSTANCE MMCME2_ADV)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.000::0.000)(0.000::0.000))
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.000::0.000)(0.000::0.000))
-            )
-        )
-    )
-    (CELL
         (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_INTERNAL")
         (INSTANCE MMCME2_ADV)
         (DELAY
@@ -184,46 +224,6 @@
         )
     )
     (CELL
-        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_TRUE_COMPENSATION_BUF_IN")
-        (INSTANCE MMCME2_ADV)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.255::-0.260)(0.433::-0.240))
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.255::-0.260)(0.433::-0.240))
-            )
-        )
-    )
-    (CELL
-        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_TRUE_COMPENSATION_EXTERNAL")
-        (INSTANCE MMCME2_ADV)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.000::0.000)(0.000::0.000))
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.000::0.000)(0.000::0.000))
-            )
-        )
-    )
-    (CELL
-        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_TRUE_COMPENSATION_INTERNAL")
-        (INSTANCE MMCME2_ADV)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.263::0.279)(0.492::0.522))
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.263::0.279)(0.492::0.522))
-            )
-        )
-    )
-    (CELL
-        (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_TRUE_COMPENSATION_ZHOLD")
-        (INSTANCE MMCME2_ADV)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.000::0.000)(0.000::0.000))
-                (IOPATH CLKOUT4_CASCADE CLKOUT4 (0.000::0.000)(0.000::0.000))
-            )
-        )
-    )
-    (CELL
         (CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_ZHOLD")
         (INSTANCE MMCME2_ADV)
         (DELAY
diff --git a/artix7/timings/GTP_CHANNEL_0.sdf b/artix7/timings/GTP_CHANNEL_0.sdf
index 7ebaf18..d846ae0 100644
--- a/artix7/timings/GTP_CHANNEL_0.sdf
+++ b/artix7/timings/GTP_CHANNEL_0.sdf
@@ -144,16 +144,16 @@
         (CELLTYPE "GTPE2_CHANNEL_GTPE2_CHANNELGTPE2_CHANNEL_RXCHBONDI_GEN_TRUE_16")
         (INSTANCE GTPE2_CHANNEL)
         (TIMINGCHECK
-            (HOLD RX_DATA_WIDTH (posedge RXUSRCLK) (0.159::0.183))
-            (SETUP RX_DATA_WIDTH (posedge RXUSRCLK) (0.328::0.378))
+            (HOLD RX_DATA_WIDTH (posedge RXUSRCLK2) (0.159::0.183))
+            (SETUP RX_DATA_WIDTH (posedge RXUSRCLK2) (0.328::0.378))
         )
     )
     (CELL
         (CELLTYPE "GTPE2_CHANNEL_GTPE2_CHANNELGTPE2_CHANNEL_RXCHBONDI_GEN_TRUE_20")
         (INSTANCE GTPE2_CHANNEL)
         (TIMINGCHECK
-            (HOLD RX_DATA_WIDTH (posedge RXUSRCLK) (0.159::0.183))
-            (SETUP RX_DATA_WIDTH (posedge RXUSRCLK) (0.328::0.378))
+            (HOLD RX_DATA_WIDTH (posedge RXUSRCLK2) (0.159::0.183))
+            (SETUP RX_DATA_WIDTH (posedge RXUSRCLK2) (0.328::0.378))
         )
     )
     (CELL
diff --git a/artix7/timings/GTP_CHANNEL_1.sdf b/artix7/timings/GTP_CHANNEL_1.sdf
index 7ebaf18..d846ae0 100644
--- a/artix7/timings/GTP_CHANNEL_1.sdf
+++ b/artix7/timings/GTP_CHANNEL_1.sdf
@@ -144,16 +144,16 @@
         (CELLTYPE "GTPE2_CHANNEL_GTPE2_CHANNELGTPE2_CHANNEL_RXCHBONDI_GEN_TRUE_16")
         (INSTANCE GTPE2_CHANNEL)
         (TIMINGCHECK
-            (HOLD RX_DATA_WIDTH (posedge RXUSRCLK) (0.159::0.183))
-            (SETUP RX_DATA_WIDTH (posedge RXUSRCLK) (0.328::0.378))
+            (HOLD RX_DATA_WIDTH (posedge RXUSRCLK2) (0.159::0.183))
+            (SETUP RX_DATA_WIDTH (posedge RXUSRCLK2) (0.328::0.378))
         )
     )
     (CELL
         (CELLTYPE "GTPE2_CHANNEL_GTPE2_CHANNELGTPE2_CHANNEL_RXCHBONDI_GEN_TRUE_20")
         (INSTANCE GTPE2_CHANNEL)
         (TIMINGCHECK
-            (HOLD RX_DATA_WIDTH (posedge RXUSRCLK) (0.159::0.183))
-            (SETUP RX_DATA_WIDTH (posedge RXUSRCLK) (0.328::0.378))
+            (HOLD RX_DATA_WIDTH (posedge RXUSRCLK2) (0.159::0.183))
+            (SETUP RX_DATA_WIDTH (posedge RXUSRCLK2) (0.328::0.378))
         )
     )
     (CELL
diff --git a/artix7/timings/GTP_CHANNEL_2.sdf b/artix7/timings/GTP_CHANNEL_2.sdf
index 7ebaf18..d846ae0 100644
--- a/artix7/timings/GTP_CHANNEL_2.sdf
+++ b/artix7/timings/GTP_CHANNEL_2.sdf
@@ -144,16 +144,16 @@
         (CELLTYPE "GTPE2_CHANNEL_GTPE2_CHANNELGTPE2_CHANNEL_RXCHBONDI_GEN_TRUE_16")
         (INSTANCE GTPE2_CHANNEL)
         (TIMINGCHECK
-            (HOLD RX_DATA_WIDTH (posedge RXUSRCLK) (0.159::0.183))
-            (SETUP RX_DATA_WIDTH (posedge RXUSRCLK) (0.328::0.378))
+            (HOLD RX_DATA_WIDTH (posedge RXUSRCLK2) (0.159::0.183))
+            (SETUP RX_DATA_WIDTH (posedge RXUSRCLK2) (0.328::0.378))
         )
     )
     (CELL
         (CELLTYPE "GTPE2_CHANNEL_GTPE2_CHANNELGTPE2_CHANNEL_RXCHBONDI_GEN_TRUE_20")
         (INSTANCE GTPE2_CHANNEL)
         (TIMINGCHECK
-            (HOLD RX_DATA_WIDTH (posedge RXUSRCLK) (0.159::0.183))
-            (SETUP RX_DATA_WIDTH (posedge RXUSRCLK) (0.328::0.378))
+            (HOLD RX_DATA_WIDTH (posedge RXUSRCLK2) (0.159::0.183))
+            (SETUP RX_DATA_WIDTH (posedge RXUSRCLK2) (0.328::0.378))
         )
     )
     (CELL
diff --git a/artix7/timings/GTP_CHANNEL_3.sdf b/artix7/timings/GTP_CHANNEL_3.sdf
index 7ebaf18..d846ae0 100644
--- a/artix7/timings/GTP_CHANNEL_3.sdf
+++ b/artix7/timings/GTP_CHANNEL_3.sdf
@@ -144,16 +144,16 @@
         (CELLTYPE "GTPE2_CHANNEL_GTPE2_CHANNELGTPE2_CHANNEL_RXCHBONDI_GEN_TRUE_16")
         (INSTANCE GTPE2_CHANNEL)
         (TIMINGCHECK
-            (HOLD RX_DATA_WIDTH (posedge RXUSRCLK) (0.159::0.183))
-            (SETUP RX_DATA_WIDTH (posedge RXUSRCLK) (0.328::0.378))
+            (HOLD RX_DATA_WIDTH (posedge RXUSRCLK2) (0.159::0.183))
+            (SETUP RX_DATA_WIDTH (posedge RXUSRCLK2) (0.328::0.378))
         )
     )
     (CELL
         (CELLTYPE "GTPE2_CHANNEL_GTPE2_CHANNELGTPE2_CHANNEL_RXCHBONDI_GEN_TRUE_20")
         (INSTANCE GTPE2_CHANNEL)
         (TIMINGCHECK
-            (HOLD RX_DATA_WIDTH (posedge RXUSRCLK) (0.159::0.183))
-            (SETUP RX_DATA_WIDTH (posedge RXUSRCLK) (0.328::0.378))
+            (HOLD RX_DATA_WIDTH (posedge RXUSRCLK2) (0.159::0.183))
+            (SETUP RX_DATA_WIDTH (posedge RXUSRCLK2) (0.328::0.378))
         )
     )
     (CELL
diff --git a/artix7/timings/LIOI3.sdf b/artix7/timings/LIOI3.sdf
index 2deb4e9..ccaf510 100644
--- a/artix7/timings/LIOI3.sdf
+++ b/artix7/timings/LIOI3.sdf
@@ -110,6 +110,13 @@
         )
     )
     (CELL
+        (CELLTYPE "ILOGICE3_IFF_HOLD")
+        (INSTANCE ILOGICE3)
+        (TIMINGCHECK
+            (REMOVAL SR (posedge CK) (-0.409::-0.357))
+        )
+    )
+    (CELL
         (CELLTYPE "ILOGICE3_IFF_LAT")
         (INSTANCE ILOGICE3)
         (DELAY
@@ -149,13 +156,6 @@
         )
     )
     (CELL
-        (CELLTYPE "ILOGICE3_IFF_REMOV")
-        (INSTANCE ILOGICE3)
-        (TIMINGCHECK
-            (HOLD SR (posedge CK) (-0.409::-0.357))
-        )
-    )
-    (CELL
         (CELLTYPE "ILOGICE3_IFF_SAMEEDGE")
         (INSTANCE ILOGICE3)
         (DELAY
diff --git a/artix7/timings/LIOI3_SING.sdf b/artix7/timings/LIOI3_SING.sdf
index 2deb4e9..ccaf510 100644
--- a/artix7/timings/LIOI3_SING.sdf
+++ b/artix7/timings/LIOI3_SING.sdf
@@ -110,6 +110,13 @@
         )
     )
     (CELL
+        (CELLTYPE "ILOGICE3_IFF_HOLD")
+        (INSTANCE ILOGICE3)
+        (TIMINGCHECK
+            (REMOVAL SR (posedge CK) (-0.409::-0.357))
+        )
+    )
+    (CELL
         (CELLTYPE "ILOGICE3_IFF_LAT")
         (INSTANCE ILOGICE3)
         (DELAY
@@ -149,13 +156,6 @@
         )
     )
     (CELL
-        (CELLTYPE "ILOGICE3_IFF_REMOV")
-        (INSTANCE ILOGICE3)
-        (TIMINGCHECK
-            (HOLD SR (posedge CK) (-0.409::-0.357))
-        )
-    )
-    (CELL
         (CELLTYPE "ILOGICE3_IFF_SAMEEDGE")
         (INSTANCE ILOGICE3)
         (DELAY
diff --git a/artix7/timings/LIOI3_TBYTESRC.sdf b/artix7/timings/LIOI3_TBYTESRC.sdf
index 2deb4e9..ccaf510 100644
--- a/artix7/timings/LIOI3_TBYTESRC.sdf
+++ b/artix7/timings/LIOI3_TBYTESRC.sdf
@@ -110,6 +110,13 @@
         )
     )
     (CELL
+        (CELLTYPE "ILOGICE3_IFF_HOLD")
+        (INSTANCE ILOGICE3)
+        (TIMINGCHECK
+            (REMOVAL SR (posedge CK) (-0.409::-0.357))
+        )
+    )
+    (CELL
         (CELLTYPE "ILOGICE3_IFF_LAT")
         (INSTANCE ILOGICE3)
         (DELAY
@@ -149,13 +156,6 @@
         )
     )
     (CELL
-        (CELLTYPE "ILOGICE3_IFF_REMOV")
-        (INSTANCE ILOGICE3)
-        (TIMINGCHECK
-            (HOLD SR (posedge CK) (-0.409::-0.357))
-        )
-    )
-    (CELL
         (CELLTYPE "ILOGICE3_IFF_SAMEEDGE")
         (INSTANCE ILOGICE3)
         (DELAY
diff --git a/artix7/timings/LIOI3_TBYTETERM.sdf b/artix7/timings/LIOI3_TBYTETERM.sdf
index 2deb4e9..ccaf510 100644
--- a/artix7/timings/LIOI3_TBYTETERM.sdf
+++ b/artix7/timings/LIOI3_TBYTETERM.sdf
@@ -110,6 +110,13 @@
         )
     )
     (CELL
+        (CELLTYPE "ILOGICE3_IFF_HOLD")
+        (INSTANCE ILOGICE3)
+        (TIMINGCHECK
+            (REMOVAL SR (posedge CK) (-0.409::-0.357))
+        )
+    )
+    (CELL
         (CELLTYPE "ILOGICE3_IFF_LAT")
         (INSTANCE ILOGICE3)
         (DELAY
@@ -149,13 +156,6 @@
         )
     )
     (CELL
-        (CELLTYPE "ILOGICE3_IFF_REMOV")
-        (INSTANCE ILOGICE3)
-        (TIMINGCHECK
-            (HOLD SR (posedge CK) (-0.409::-0.357))
-        )
-    )
-    (CELL
         (CELLTYPE "ILOGICE3_IFF_SAMEEDGE")
         (INSTANCE ILOGICE3)
         (DELAY
diff --git a/artix7/timings/RIOI3.sdf b/artix7/timings/RIOI3.sdf
index 2deb4e9..ccaf510 100644
--- a/artix7/timings/RIOI3.sdf
+++ b/artix7/timings/RIOI3.sdf
@@ -110,6 +110,13 @@
         )
     )
     (CELL
+        (CELLTYPE "ILOGICE3_IFF_HOLD")
+        (INSTANCE ILOGICE3)
+        (TIMINGCHECK
+            (REMOVAL SR (posedge CK) (-0.409::-0.357))
+        )
+    )
+    (CELL
         (CELLTYPE "ILOGICE3_IFF_LAT")
         (INSTANCE ILOGICE3)
         (DELAY
@@ -149,13 +156,6 @@
         )
     )
     (CELL
-        (CELLTYPE "ILOGICE3_IFF_REMOV")
-        (INSTANCE ILOGICE3)
-        (TIMINGCHECK
-            (HOLD SR (posedge CK) (-0.409::-0.357))
-        )
-    )
-    (CELL
         (CELLTYPE "ILOGICE3_IFF_SAMEEDGE")
         (INSTANCE ILOGICE3)
         (DELAY
diff --git a/artix7/timings/RIOI3_SING.sdf b/artix7/timings/RIOI3_SING.sdf
index 2deb4e9..ccaf510 100644
--- a/artix7/timings/RIOI3_SING.sdf
+++ b/artix7/timings/RIOI3_SING.sdf
@@ -110,6 +110,13 @@
         )
     )
     (CELL
+        (CELLTYPE "ILOGICE3_IFF_HOLD")
+        (INSTANCE ILOGICE3)
+        (TIMINGCHECK
+            (REMOVAL SR (posedge CK) (-0.409::-0.357))
+        )
+    )
+    (CELL
         (CELLTYPE "ILOGICE3_IFF_LAT")
         (INSTANCE ILOGICE3)
         (DELAY
@@ -149,13 +156,6 @@
         )
     )
     (CELL
-        (CELLTYPE "ILOGICE3_IFF_REMOV")
-        (INSTANCE ILOGICE3)
-        (TIMINGCHECK
-            (HOLD SR (posedge CK) (-0.409::-0.357))
-        )
-    )
-    (CELL
         (CELLTYPE "ILOGICE3_IFF_SAMEEDGE")
         (INSTANCE ILOGICE3)
         (DELAY
diff --git a/artix7/timings/RIOI3_TBYTESRC.sdf b/artix7/timings/RIOI3_TBYTESRC.sdf
index 2deb4e9..ccaf510 100644
--- a/artix7/timings/RIOI3_TBYTESRC.sdf
+++ b/artix7/timings/RIOI3_TBYTESRC.sdf
@@ -110,6 +110,13 @@
         )
     )
     (CELL
+        (CELLTYPE "ILOGICE3_IFF_HOLD")
+        (INSTANCE ILOGICE3)
+        (TIMINGCHECK
+            (REMOVAL SR (posedge CK) (-0.409::-0.357))
+        )
+    )
+    (CELL
         (CELLTYPE "ILOGICE3_IFF_LAT")
         (INSTANCE ILOGICE3)
         (DELAY
@@ -149,13 +156,6 @@
         )
     )
     (CELL
-        (CELLTYPE "ILOGICE3_IFF_REMOV")
-        (INSTANCE ILOGICE3)
-        (TIMINGCHECK
-            (HOLD SR (posedge CK) (-0.409::-0.357))
-        )
-    )
-    (CELL
         (CELLTYPE "ILOGICE3_IFF_SAMEEDGE")
         (INSTANCE ILOGICE3)
         (DELAY
diff --git a/artix7/timings/RIOI3_TBYTETERM.sdf b/artix7/timings/RIOI3_TBYTETERM.sdf
index 2deb4e9..ccaf510 100644
--- a/artix7/timings/RIOI3_TBYTETERM.sdf
+++ b/artix7/timings/RIOI3_TBYTETERM.sdf
@@ -110,6 +110,13 @@
         )
     )
     (CELL
+        (CELLTYPE "ILOGICE3_IFF_HOLD")
+        (INSTANCE ILOGICE3)
+        (TIMINGCHECK
+            (REMOVAL SR (posedge CK) (-0.409::-0.357))
+        )
+    )
+    (CELL
         (CELLTYPE "ILOGICE3_IFF_LAT")
         (INSTANCE ILOGICE3)
         (DELAY
@@ -149,13 +156,6 @@
         )
     )
     (CELL
-        (CELLTYPE "ILOGICE3_IFF_REMOV")
-        (INSTANCE ILOGICE3)
-        (TIMINGCHECK
-            (HOLD SR (posedge CK) (-0.409::-0.357))
-        )
-    )
-    (CELL
         (CELLTYPE "ILOGICE3_IFF_SAMEEDGE")
         (INSTANCE ILOGICE3)
         (DELAY