Updating all based on "Merge pull request #1142 from antmicro/pll_bit_conflict_fix". See [Info File](Info.md) for details. Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>

commit: a11a64c2fd2627dea6fe596ab24775519b0e5012 [log] [tgz]
author: Tim 'mithro' Ansell <me@mith.ro> Sat Nov 16 11:18:44 2019 -0800
committer: Tim 'mithro' Ansell <me@mith.ro> Sat Nov 16 11:18:44 2019 -0800
tree: dab8bb95be7c800f94edb225113e3402706edfb9
parent: ca781e739d725938cb5a17b8586a5375ca263ca2 [diff]
diff --git a/Info.md b/Info.md
index 1ce9e1c..b9ce98e 100644
--- a/Info.md
+++ b/Info.md

@@ -37,20 +37,20 @@
 
 # Details
 
-Last updated on Fri 08 Nov 2019 05:06:47 AM UTC (2019-11-08T05:06:47+00:00).
+Last updated on Sat 16 Nov 2019 07:07:06 PM UTC (2019-11-16T19:07:06+00:00).
 
-Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [aa9393b1](https://github.com/SymbiFlow/prjxray/commit/aa9393b199e34ce8cd8f3671c2b8c51714bf0b70).
+Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [d8780782](https://github.com/SymbiFlow/prjxray/commit/d87807822edd23841c96a5b6c2534cd906f8e14c).
 
 Latest commit was;
 ```
-commit aa9393b199e34ce8cd8f3671c2b8c51714bf0b70
-Merge: 4cec0817 99d31d2e
+commit d87807822edd23841c96a5b6c2534cd906f8e14c
+Merge: 65ccddb6 cc7ba29c
 Author: litghost <537074+litghost@users.noreply.github.com>
-Date:   Thu Nov 7 10:07:03 2019 -0800
+Date:   Fri Nov 15 07:48:54 2019 -0800
 
-    Merge pull request #1135 from antmicro/fix-071-hclk-ioi-ppips
+    Merge pull request #1142 from antmicro/pll_bit_conflict_fix
     
-    071-ppips: skip HCLK_IOI_CK_IGCLK[0-9] ppips addition
+    Update to 032 which fixes conflict with 034
 ```
 
 
@@ -59,7 +59,7 @@
 
 ### Settings
 
-Created using following [settings/artix7.sh (sha256: 26e1ff93657132928a3b583c95347267d7afeb18a7b7036f0d7a6ea3367ae803)](https://github.com/SymbiFlow/prjxray/blob/aa9393b199e34ce8cd8f3671c2b8c51714bf0b70/settings/artix7.sh)
+Created using following [settings/artix7.sh (sha256: 26e1ff93657132928a3b583c95347267d7afeb18a7b7036f0d7a6ea3367ae803)](https://github.com/SymbiFlow/prjxray/blob/d87807822edd23841c96a5b6c2534cd906f8e14c/settings/artix7.sh)
 ```shell
 export XRAY_DATABASE="artix7"
 export XRAY_PART="xc7a50tfgg484-1"
@@ -149,13 +149,13 @@
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./artix7/mask_hclk_r.db`](./artix7/mask_hclk_r.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/mask_hclk_r.origin_info.db`](./artix7/mask_hclk_r.origin_info.db)
  * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6  ./artix7/mask_liob33.db`](./artix7/mask_liob33.db)
- * [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4  ./artix7/mask_lioi3.db`](./artix7/mask_lioi3.db)
- * [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4  ./artix7/mask_lioi3_tbytesrc.db`](./artix7/mask_lioi3_tbytesrc.db)
- * [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4  ./artix7/mask_lioi3_tbyteterm.db`](./artix7/mask_lioi3_tbyteterm.db)
+ * [`fcd110b5d9201440949a9dc7e512b82a9fcbcbda45b497a8d01385fe08cdfb2c  ./artix7/mask_lioi3.db`](./artix7/mask_lioi3.db)
+ * [`fcd110b5d9201440949a9dc7e512b82a9fcbcbda45b497a8d01385fe08cdfb2c  ./artix7/mask_lioi3_tbytesrc.db`](./artix7/mask_lioi3_tbytesrc.db)
+ * [`fcd110b5d9201440949a9dc7e512b82a9fcbcbda45b497a8d01385fe08cdfb2c  ./artix7/mask_lioi3_tbyteterm.db`](./artix7/mask_lioi3_tbyteterm.db)
  * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6  ./artix7/mask_riob33.db`](./artix7/mask_riob33.db)
- * [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4  ./artix7/mask_rioi3.db`](./artix7/mask_rioi3.db)
- * [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4  ./artix7/mask_rioi3_tbytesrc.db`](./artix7/mask_rioi3_tbytesrc.db)
- * [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4  ./artix7/mask_rioi3_tbyteterm.db`](./artix7/mask_rioi3_tbyteterm.db)
+ * [`fcd110b5d9201440949a9dc7e512b82a9fcbcbda45b497a8d01385fe08cdfb2c  ./artix7/mask_rioi3.db`](./artix7/mask_rioi3.db)
+ * [`fcd110b5d9201440949a9dc7e512b82a9fcbcbda45b497a8d01385fe08cdfb2c  ./artix7/mask_rioi3_tbytesrc.db`](./artix7/mask_rioi3_tbytesrc.db)
+ * [`fcd110b5d9201440949a9dc7e512b82a9fcbcbda45b497a8d01385fe08cdfb2c  ./artix7/mask_rioi3_tbyteterm.db`](./artix7/mask_rioi3_tbyteterm.db)
  * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf  ./artix7/ppips_bram_int_interface_l.db`](./artix7/ppips_bram_int_interface_l.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/ppips_bram_int_interface_l.origin_info.db`](./artix7/ppips_bram_int_interface_l.origin_info.db)
  * [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae  ./artix7/ppips_bram_int_interface_r.db`](./artix7/ppips_bram_int_interface_r.db)
@@ -239,10 +239,10 @@
  * [`796d0c51db5d34d08e5e63d3c0484cd51b9b693f7b169cf6c7a9faa12ba4b641  ./artix7/segbits_clk_hrow_bot_r.origin_info.db`](./artix7/segbits_clk_hrow_bot_r.origin_info.db)
  * [`8ab24467b7f56fa8ff0dd334c0588cb196a4d875895abb48afcd33e1e2ba1deb  ./artix7/segbits_clk_hrow_top_r.db`](./artix7/segbits_clk_hrow_top_r.db)
  * [`9aaf521930e3632c7e8aac861a3cd3dd48b95401905f7a1cabfabf0caf836045  ./artix7/segbits_clk_hrow_top_r.origin_info.db`](./artix7/segbits_clk_hrow_top_r.origin_info.db)
- * [`58e94fa2c72dc551e01e492d170db05556ac90bfa09fb1c46b38804cb680a196  ./artix7/segbits_cmt_top_l_upper_t.db`](./artix7/segbits_cmt_top_l_upper_t.db)
- * [`0e38f50896c11f0134f79a920fba0906f015305d296d30c45cd20601fad2c57f  ./artix7/segbits_cmt_top_l_upper_t.origin_info.db`](./artix7/segbits_cmt_top_l_upper_t.origin_info.db)
- * [`616a0118601d5541e896267dfecb5409a3704b957946644994ae48061be270aa  ./artix7/segbits_cmt_top_r_upper_t.db`](./artix7/segbits_cmt_top_r_upper_t.db)
- * [`4e8cebea5342f4404affa6c91e3245b960d2f75d1f3a4e3ceb875760a56666c9  ./artix7/segbits_cmt_top_r_upper_t.origin_info.db`](./artix7/segbits_cmt_top_r_upper_t.origin_info.db)
+ * [`b0cdac37283ea6649305d3beca4ebfa99ff1829594da6416e1fa3c5eb9efa079  ./artix7/segbits_cmt_top_l_upper_t.db`](./artix7/segbits_cmt_top_l_upper_t.db)
+ * [`a7126fcf488a1d18a886e01b5dfbf55a2143240a0fcd0c103ebd29b7ebbaf912  ./artix7/segbits_cmt_top_l_upper_t.origin_info.db`](./artix7/segbits_cmt_top_l_upper_t.origin_info.db)
+ * [`ab6513e8e64cac60f33bf52c6d52d4c198b8c61bb8ac63d9a57c6d2f4bbe27d9  ./artix7/segbits_cmt_top_r_upper_t.db`](./artix7/segbits_cmt_top_r_upper_t.db)
+ * [`6d5a520cb89566ca7e1878b0c078ebf7ba1797e9186b4118883c356a3c0cb8fb  ./artix7/segbits_cmt_top_r_upper_t.origin_info.db`](./artix7/segbits_cmt_top_r_upper_t.origin_info.db)
  * [`80c982320812abb7a269a24df2e345f7e333311f3e7de7140f6b2be54ced2d30  ./artix7/segbits_dsp_l.db`](./artix7/segbits_dsp_l.db)
  * [`589a13e6a447c4fa8ce37629db9a8522a2f4fbad940709cd41bde0d7b8f65f61  ./artix7/segbits_dsp_l.origin_info.db`](./artix7/segbits_dsp_l.origin_info.db)
  * [`5f0a2b65537b3ed4893ff44eb8c3a27c7013af4ac6187324bdb7a941f9a283d5  ./artix7/segbits_dsp_r.db`](./artix7/segbits_dsp_r.db)
@@ -258,9 +258,9 @@
  * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9  ./artix7/segbits_hclk_r.db`](./artix7/segbits_hclk_r.db)
  * [`0e9b5da6def4776e2ca8dd59af8f4334bf5cfb88d99b323be25dd6ba2e3386f7  ./artix7/segbits_hclk_r.origin_info.db`](./artix7/segbits_hclk_r.origin_info.db)
  * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520  ./artix7/segbits_int_l.db`](./artix7/segbits_int_l.db)
- * [`14f223d4ff7633592b12fdf28c39e42a40c3dee7d49848c2f576c28ee98a647f  ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db)
+ * [`b583b63aa314aaa0460496d21bdcc7032729853ea8108b6e32ec1cc6e2f4dd1d  ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db)
  * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556  ./artix7/segbits_int_r.db`](./artix7/segbits_int_r.db)
- * [`83f89cadbc56f76e9117a3de1869e7f846255f15dce8dba5117191cc14d7bbb5  ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db)
+ * [`99824a64926b642eef93d653d56b791e9f1e4d1f5045b35a5b5e7bff526e93eb  ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db)
  * [`92913f6d38cfdb14fb9c16e70a47d75e507c0ee4764bcc7941f2e0ac3e784e88  ./artix7/segbits_liob33.db`](./artix7/segbits_liob33.db)
  * [`2772dce8b6a4f6f6691ca0c0b30535c230041ebad17d318ce9962161e607be5c  ./artix7/segbits_liob33.origin_info.db`](./artix7/segbits_liob33.origin_info.db)
  * [`cf4f6a2b44d13e094f588464a902c315080d2150a522e4241c82ca201a4771e0  ./artix7/segbits_lioi3.db`](./artix7/segbits_lioi3.db)
@@ -499,7 +499,7 @@
 
 ### Settings
 
-Created using following [settings/kintex7.sh (sha256: 794538b550d399255cbafeeb1b5ff183dc66ebc6cd8dc0f725e3f6a3977f757d)](https://github.com/SymbiFlow/prjxray/blob/aa9393b199e34ce8cd8f3671c2b8c51714bf0b70/settings/kintex7.sh)
+Created using following [settings/kintex7.sh (sha256: 794538b550d399255cbafeeb1b5ff183dc66ebc6cd8dc0f725e3f6a3977f757d)](https://github.com/SymbiFlow/prjxray/blob/d87807822edd23841c96a5b6c2534cd906f8e14c/settings/kintex7.sh)
 ```shell
 export XRAY_DATABASE="kintex7"
 export XRAY_PART="xc7k70tfbg676-2"
@@ -567,13 +567,13 @@
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./kintex7/mask_hclk_r.db`](./kintex7/mask_hclk_r.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./kintex7/mask_hclk_r.origin_info.db`](./kintex7/mask_hclk_r.origin_info.db)
  * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6  ./kintex7/mask_liob33.db`](./kintex7/mask_liob33.db)
- * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8  ./kintex7/mask_lioi3.db`](./kintex7/mask_lioi3.db)
- * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8  ./kintex7/mask_lioi3_tbytesrc.db`](./kintex7/mask_lioi3_tbytesrc.db)
- * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8  ./kintex7/mask_lioi3_tbyteterm.db`](./kintex7/mask_lioi3_tbyteterm.db)
+ * [`919dd02f5275750fd8bc8ace4707ecd94f1fad7deb8c67879894c0b7d6a8ae2f  ./kintex7/mask_lioi3.db`](./kintex7/mask_lioi3.db)
+ * [`919dd02f5275750fd8bc8ace4707ecd94f1fad7deb8c67879894c0b7d6a8ae2f  ./kintex7/mask_lioi3_tbytesrc.db`](./kintex7/mask_lioi3_tbytesrc.db)
+ * [`919dd02f5275750fd8bc8ace4707ecd94f1fad7deb8c67879894c0b7d6a8ae2f  ./kintex7/mask_lioi3_tbyteterm.db`](./kintex7/mask_lioi3_tbyteterm.db)
  * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6  ./kintex7/mask_riob33.db`](./kintex7/mask_riob33.db)
- * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8  ./kintex7/mask_rioi3.db`](./kintex7/mask_rioi3.db)
- * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8  ./kintex7/mask_rioi3_tbytesrc.db`](./kintex7/mask_rioi3_tbytesrc.db)
- * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8  ./kintex7/mask_rioi3_tbyteterm.db`](./kintex7/mask_rioi3_tbyteterm.db)
+ * [`919dd02f5275750fd8bc8ace4707ecd94f1fad7deb8c67879894c0b7d6a8ae2f  ./kintex7/mask_rioi3.db`](./kintex7/mask_rioi3.db)
+ * [`919dd02f5275750fd8bc8ace4707ecd94f1fad7deb8c67879894c0b7d6a8ae2f  ./kintex7/mask_rioi3_tbytesrc.db`](./kintex7/mask_rioi3_tbytesrc.db)
+ * [`919dd02f5275750fd8bc8ace4707ecd94f1fad7deb8c67879894c0b7d6a8ae2f  ./kintex7/mask_rioi3_tbyteterm.db`](./kintex7/mask_rioi3_tbyteterm.db)
  * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf  ./kintex7/ppips_bram_int_interface_l.db`](./kintex7/ppips_bram_int_interface_l.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./kintex7/ppips_bram_int_interface_l.origin_info.db`](./kintex7/ppips_bram_int_interface_l.origin_info.db)
  * [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae  ./kintex7/ppips_bram_int_interface_r.db`](./kintex7/ppips_bram_int_interface_r.db)
@@ -653,10 +653,10 @@
  * [`98a0bebc0686e678d32b844f2675e81ea11d6236d161da1a1362b8745633f8bd  ./kintex7/segbits_clk_hrow_bot_r.origin_info.db`](./kintex7/segbits_clk_hrow_bot_r.origin_info.db)
  * [`89ca5e5d4e9bc222815bd81e6d94cbff6950b99e3d2e80ac677334dcde40e4c2  ./kintex7/segbits_clk_hrow_top_r.db`](./kintex7/segbits_clk_hrow_top_r.db)
  * [`ba635ce2ad2f1e907c65f943bd4c5500e9c6b135a7f0b2334e7a0a021ed07389  ./kintex7/segbits_clk_hrow_top_r.origin_info.db`](./kintex7/segbits_clk_hrow_top_r.origin_info.db)
- * [`2a7535f456758251b4d8bc9d5a8b4d3ea803b88bbb30572e08ae552d92d209f1  ./kintex7/segbits_cmt_top_l_upper_t.db`](./kintex7/segbits_cmt_top_l_upper_t.db)
- * [`d3db1fc1c0a06f0cbea022affc6376c51960636e1fcd739b07851f87cb4c673d  ./kintex7/segbits_cmt_top_l_upper_t.origin_info.db`](./kintex7/segbits_cmt_top_l_upper_t.origin_info.db)
- * [`fda7e0c2805de552580b0c4740534d6ae7e8974aee15fc7adc82ec8f8bbe9653  ./kintex7/segbits_cmt_top_r_upper_t.db`](./kintex7/segbits_cmt_top_r_upper_t.db)
- * [`15270ddb444e16c84f678eb03f0e704a90c60ba3e7c94d191dc6545ebce1cac1  ./kintex7/segbits_cmt_top_r_upper_t.origin_info.db`](./kintex7/segbits_cmt_top_r_upper_t.origin_info.db)
+ * [`8593ce8b4d8dc5b3c44bcb6b917188fe0ad374e8cce1054a286738e4dbb3bbc1  ./kintex7/segbits_cmt_top_l_upper_t.db`](./kintex7/segbits_cmt_top_l_upper_t.db)
+ * [`60c009464f6d7d08b7f79df857a06badc176324e4efcfd96e7a4485bd2ffbbea  ./kintex7/segbits_cmt_top_l_upper_t.origin_info.db`](./kintex7/segbits_cmt_top_l_upper_t.origin_info.db)
+ * [`712a8f426c47b5d02483404d8e7bfd816a26a99787c82b01966b9f04fbd28b87  ./kintex7/segbits_cmt_top_r_upper_t.db`](./kintex7/segbits_cmt_top_r_upper_t.db)
+ * [`89232805120ea7d3352a24ffd475f4e4a87a357ae03c8f491f7af933b76373eb  ./kintex7/segbits_cmt_top_r_upper_t.origin_info.db`](./kintex7/segbits_cmt_top_r_upper_t.origin_info.db)
  * [`80c982320812abb7a269a24df2e345f7e333311f3e7de7140f6b2be54ced2d30  ./kintex7/segbits_dsp_l.db`](./kintex7/segbits_dsp_l.db)
  * [`589a13e6a447c4fa8ce37629db9a8522a2f4fbad940709cd41bde0d7b8f65f61  ./kintex7/segbits_dsp_l.origin_info.db`](./kintex7/segbits_dsp_l.origin_info.db)
  * [`5f0a2b65537b3ed4893ff44eb8c3a27c7013af4ac6187324bdb7a941f9a283d5  ./kintex7/segbits_dsp_r.db`](./kintex7/segbits_dsp_r.db)
@@ -671,20 +671,20 @@
  * [`39179dfde43c6dd677c705082e1e7373d1866390cae064062f6eee50e7cd6ef6  ./kintex7/segbits_hclk_l.origin_info.db`](./kintex7/segbits_hclk_l.origin_info.db)
  * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9  ./kintex7/segbits_hclk_r.db`](./kintex7/segbits_hclk_r.db)
  * [`0e9b5da6def4776e2ca8dd59af8f4334bf5cfb88d99b323be25dd6ba2e3386f7  ./kintex7/segbits_hclk_r.origin_info.db`](./kintex7/segbits_hclk_r.origin_info.db)
- * [`bae9b062392e6204562c62f166d1ebc957aad14a6e24294954bd5aecf4a4cb46  ./kintex7/segbits_int_l.db`](./kintex7/segbits_int_l.db)
- * [`0e5f4b3a08b7ab2a049356fb3c91b7719f403da06e8c5352f2b37a969d5bfd54  ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db)
+ * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520  ./kintex7/segbits_int_l.db`](./kintex7/segbits_int_l.db)
+ * [`991256bb80056adaebe300fa9cf0bdffe546b36f531382a9feeb2398331ec83d  ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db)
  * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556  ./kintex7/segbits_int_r.db`](./kintex7/segbits_int_r.db)
- * [`98ef344878edd67a8e6e861dc0e307aa3030f5caa4b2517c9a23fdce287b2fce  ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db)
- * [`e8840ad59adecd3c2d5cc79b8e9d11555d6346b6fef6e8e94ad5ef8a6aafde0e  ./kintex7/segbits_liob33.db`](./kintex7/segbits_liob33.db)
- * [`e56502cee5fbad067e49b09eb1e3bf308ffae383feede7366174c7920c83e75b  ./kintex7/segbits_liob33.origin_info.db`](./kintex7/segbits_liob33.origin_info.db)
+ * [`2c9ab4b601a47c18074444ff0bc7a0d5f36b33bae90a856041f27415c86ddc88  ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db)
+ * [`01cd7426da888ca40c5cc422a29fa9daf3d8de1901ed32ea118abd41def9d3da  ./kintex7/segbits_liob33.db`](./kintex7/segbits_liob33.db)
+ * [`1c214645a8a02faacd8f463ba93414ce37f082a56095eee55b39fadea2169d07  ./kintex7/segbits_liob33.origin_info.db`](./kintex7/segbits_liob33.origin_info.db)
  * [`87adc9bb57b446e57722145e6461085763a5f0e690558e96c2581ea623b36071  ./kintex7/segbits_lioi3.db`](./kintex7/segbits_lioi3.db)
  * [`95f41262a22641a56176ea6ce78f44751ea676605e8eb1ecc72b90dc2aed3a9c  ./kintex7/segbits_lioi3.origin_info.db`](./kintex7/segbits_lioi3.origin_info.db)
  * [`5ce44e654b750b72090c2f3f00fbacb5acc338f9647ffb061b336331f812b488  ./kintex7/segbits_lioi3_tbytesrc.db`](./kintex7/segbits_lioi3_tbytesrc.db)
  * [`feb497770c76d905ffc3c4c5805ef8bfd1c4a6d2829c9d67a64128ffe90b201c  ./kintex7/segbits_lioi3_tbytesrc.origin_info.db`](./kintex7/segbits_lioi3_tbytesrc.origin_info.db)
  * [`23ee01e24c5831233c4213234eec53e5f0b55a291a8205e8954275d0da1363ae  ./kintex7/segbits_lioi3_tbyteterm.db`](./kintex7/segbits_lioi3_tbyteterm.db)
  * [`c7a45daa6d00cdec99eb29ef4eec682fd7d126082df050f8d65e1136e2a2b86a  ./kintex7/segbits_lioi3_tbyteterm.origin_info.db`](./kintex7/segbits_lioi3_tbyteterm.origin_info.db)
- * [`2841f2e3620817d44789c10cc314885a60d7671e034b2d5ea574f15b4ae69f3a  ./kintex7/segbits_riob33.db`](./kintex7/segbits_riob33.db)
- * [`d2b1bf4082a373c5a05e2ab3da031b61b86b0234d810601915003c1dd6cec174  ./kintex7/segbits_riob33.origin_info.db`](./kintex7/segbits_riob33.origin_info.db)
+ * [`b6be0b91d37dd1299a16d0f132f156290b798b329280875e407a07d8c06a554f  ./kintex7/segbits_riob33.db`](./kintex7/segbits_riob33.db)
+ * [`2b6063565e930b6184b986564c3e5551d865fc6ab3527f6e6b5f717b3811c571  ./kintex7/segbits_riob33.origin_info.db`](./kintex7/segbits_riob33.origin_info.db)
  * [`4210f9eb79cffe057f850a853b49e3cf18f7378e7e9e081d4a05afa534be9bf2  ./kintex7/segbits_rioi3.db`](./kintex7/segbits_rioi3.db)
  * [`21b603a381111c063aba34838e0bb9381c7a66ead4f2ae75c3e5669a9ac6862f  ./kintex7/segbits_rioi3.origin_info.db`](./kintex7/segbits_rioi3.origin_info.db)
  * [`d4d3718a5759779146849fd66e663409d5a20b9ec045350933722292f67e6c4a  ./kintex7/segbits_rioi3_tbytesrc.db`](./kintex7/segbits_rioi3_tbytesrc.db)
@@ -867,7 +867,7 @@
 
 ### Settings
 
-Created using following [settings/zynq7.sh (sha256: 61298e89dcc873eadba47f5c2f9f72a38fa022583b2c7ff89246b2e051585ad8)](https://github.com/SymbiFlow/prjxray/blob/aa9393b199e34ce8cd8f3671c2b8c51714bf0b70/settings/zynq7.sh)
+Created using following [settings/zynq7.sh (sha256: 61298e89dcc873eadba47f5c2f9f72a38fa022583b2c7ff89246b2e051585ad8)](https://github.com/SymbiFlow/prjxray/blob/d87807822edd23841c96a5b6c2534cd906f8e14c/settings/zynq7.sh)
 ```shell
 export XRAY_DATABASE="zynq7"
 export XRAY_PART="xc7z010clg400-1"
@@ -938,13 +938,13 @@
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./zynq7/mask_hclk_l.origin_info.db`](./zynq7/mask_hclk_l.origin_info.db)
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./zynq7/mask_hclk_r.db`](./zynq7/mask_hclk_r.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./zynq7/mask_hclk_r.origin_info.db`](./zynq7/mask_hclk_r.origin_info.db)
- * [`75166de110e574743ad0cdac380699701c93b1e6bd26dd3b60657553f7ccf4b1  ./zynq7/mask_lioi3.db`](./zynq7/mask_lioi3.db)
- * [`75166de110e574743ad0cdac380699701c93b1e6bd26dd3b60657553f7ccf4b1  ./zynq7/mask_lioi3_tbytesrc.db`](./zynq7/mask_lioi3_tbytesrc.db)
- * [`75166de110e574743ad0cdac380699701c93b1e6bd26dd3b60657553f7ccf4b1  ./zynq7/mask_lioi3_tbyteterm.db`](./zynq7/mask_lioi3_tbyteterm.db)
+ * [`6e695f32d16b6e949f48155b0cce5365db7800a66141138e1eb55da181c77744  ./zynq7/mask_lioi3.db`](./zynq7/mask_lioi3.db)
+ * [`6e695f32d16b6e949f48155b0cce5365db7800a66141138e1eb55da181c77744  ./zynq7/mask_lioi3_tbytesrc.db`](./zynq7/mask_lioi3_tbytesrc.db)
+ * [`6e695f32d16b6e949f48155b0cce5365db7800a66141138e1eb55da181c77744  ./zynq7/mask_lioi3_tbyteterm.db`](./zynq7/mask_lioi3_tbyteterm.db)
  * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6  ./zynq7/mask_riob33.db`](./zynq7/mask_riob33.db)
- * [`75166de110e574743ad0cdac380699701c93b1e6bd26dd3b60657553f7ccf4b1  ./zynq7/mask_rioi3.db`](./zynq7/mask_rioi3.db)
- * [`75166de110e574743ad0cdac380699701c93b1e6bd26dd3b60657553f7ccf4b1  ./zynq7/mask_rioi3_tbytesrc.db`](./zynq7/mask_rioi3_tbytesrc.db)
- * [`75166de110e574743ad0cdac380699701c93b1e6bd26dd3b60657553f7ccf4b1  ./zynq7/mask_rioi3_tbyteterm.db`](./zynq7/mask_rioi3_tbyteterm.db)
+ * [`6e695f32d16b6e949f48155b0cce5365db7800a66141138e1eb55da181c77744  ./zynq7/mask_rioi3.db`](./zynq7/mask_rioi3.db)
+ * [`6e695f32d16b6e949f48155b0cce5365db7800a66141138e1eb55da181c77744  ./zynq7/mask_rioi3_tbytesrc.db`](./zynq7/mask_rioi3_tbytesrc.db)
+ * [`6e695f32d16b6e949f48155b0cce5365db7800a66141138e1eb55da181c77744  ./zynq7/mask_rioi3_tbyteterm.db`](./zynq7/mask_rioi3_tbyteterm.db)
  * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf  ./zynq7/ppips_bram_int_interface_l.db`](./zynq7/ppips_bram_int_interface_l.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./zynq7/ppips_bram_int_interface_l.origin_info.db`](./zynq7/ppips_bram_int_interface_l.origin_info.db)
  * [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae  ./zynq7/ppips_bram_int_interface_r.db`](./zynq7/ppips_bram_int_interface_r.db)
@@ -1018,10 +1018,10 @@
  * [`8454c4735a9df6aed62e15df3a7a6ff53fb4b7aaf14b9ac8d13f4fc913924841  ./zynq7/segbits_clk_hrow_bot_r.origin_info.db`](./zynq7/segbits_clk_hrow_bot_r.origin_info.db)
  * [`063d0e4f5a34a6b65fc7083d47860ebcc548950ac2c39b74f0cc37728d976d6c  ./zynq7/segbits_clk_hrow_top_r.db`](./zynq7/segbits_clk_hrow_top_r.db)
  * [`6b63e363bf0573eb3820db68f1d4a101c5e5f8923b65b97bd0475590b9b0f206  ./zynq7/segbits_clk_hrow_top_r.origin_info.db`](./zynq7/segbits_clk_hrow_top_r.origin_info.db)
- * [`ac4c4b1a3ae7a4ae6ef829a4ac6a7c8a286477e03875c9662ea6dac694f2dde2  ./zynq7/segbits_cmt_top_l_upper_t.db`](./zynq7/segbits_cmt_top_l_upper_t.db)
- * [`e23a62d0f57948dd166b5a33b77afb1699b46c526f72dc4e376da04f36e0e1be  ./zynq7/segbits_cmt_top_l_upper_t.origin_info.db`](./zynq7/segbits_cmt_top_l_upper_t.origin_info.db)
- * [`6b205562d2e870f43d7959a05b1b8fbd75bfbb08878bb7ec5239d6b419ce3117  ./zynq7/segbits_cmt_top_r_upper_t.db`](./zynq7/segbits_cmt_top_r_upper_t.db)
- * [`29023fed85b544c2d849067d1c945cb9cdc64fa2f4070acf6496ea132f9f3997  ./zynq7/segbits_cmt_top_r_upper_t.origin_info.db`](./zynq7/segbits_cmt_top_r_upper_t.origin_info.db)
+ * [`22f319099bf3408e1eaebb9b593feab0118ddf5e1cbaa64e6fe06fd6f59442b2  ./zynq7/segbits_cmt_top_l_upper_t.db`](./zynq7/segbits_cmt_top_l_upper_t.db)
+ * [`e6c75626a2c80b766eec22c6fc7308dd236fc4e28c73c2b9a01799d6270166be  ./zynq7/segbits_cmt_top_l_upper_t.origin_info.db`](./zynq7/segbits_cmt_top_l_upper_t.origin_info.db)
+ * [`d388608cf56023157cc4c92679288cc246a2f2fd0274f85319aa8b34382ce8e5  ./zynq7/segbits_cmt_top_r_upper_t.db`](./zynq7/segbits_cmt_top_r_upper_t.db)
+ * [`4157d406105c9c8fb598234f3dc2eb8b1b659fe0740c40c3cd0b81c27e776796  ./zynq7/segbits_cmt_top_r_upper_t.origin_info.db`](./zynq7/segbits_cmt_top_r_upper_t.origin_info.db)
  * [`80c982320812abb7a269a24df2e345f7e333311f3e7de7140f6b2be54ced2d30  ./zynq7/segbits_dsp_l.db`](./zynq7/segbits_dsp_l.db)
  * [`589a13e6a447c4fa8ce37629db9a8522a2f4fbad940709cd41bde0d7b8f65f61  ./zynq7/segbits_dsp_l.origin_info.db`](./zynq7/segbits_dsp_l.origin_info.db)
  * [`5f0a2b65537b3ed4893ff44eb8c3a27c7013af4ac6187324bdb7a941f9a283d5  ./zynq7/segbits_dsp_r.db`](./zynq7/segbits_dsp_r.db)
@@ -1035,9 +1035,9 @@
  * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9  ./zynq7/segbits_hclk_r.db`](./zynq7/segbits_hclk_r.db)
  * [`0e9b5da6def4776e2ca8dd59af8f4334bf5cfb88d99b323be25dd6ba2e3386f7  ./zynq7/segbits_hclk_r.origin_info.db`](./zynq7/segbits_hclk_r.origin_info.db)
  * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520  ./zynq7/segbits_int_l.db`](./zynq7/segbits_int_l.db)
- * [`ec13df09a687f1025d523b0e8e1d14ce6a62177fa4587c6af1fee4f703ef1884  ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db)
+ * [`cd62e84482472c4812000099698909efd2f90edb3c66b59796b75bfc217aac31  ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db)
  * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556  ./zynq7/segbits_int_r.db`](./zynq7/segbits_int_r.db)
- * [`980402cb5f0ba5fa49b282aa2b7449c869ecab0cd42f13bafa8b8300187b85b5  ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db)
+ * [`99b83cd3dbf5046717ddf4196e72947910e033188c929aee4c3bc722cdc5a2dc  ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./zynq7/segbits_liob33.db`](./zynq7/segbits_liob33.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./zynq7/segbits_liob33.origin_info.db`](./zynq7/segbits_liob33.origin_info.db)
  * [`cf4f6a2b44d13e094f588464a902c315080d2150a522e4241c82ca201a4771e0  ./zynq7/segbits_lioi3.db`](./zynq7/segbits_lioi3.db)

diff --git a/artix7/mask_lioi3.db b/artix7/mask_lioi3.db
index 1c35129..3747b8a 100644
--- a/artix7/mask_lioi3.db
+++ b/artix7/mask_lioi3.db

@@ -1,6 +1,8 @@
 bit 25_07
+bit 25_08
 bit 25_20
 bit 25_21
+bit 25_23
 bit 25_31
 bit 25_32
 bit 25_34
@@ -15,9 +17,9 @@
 bit 25_84
 bit 25_85
 bit 25_95
+bit 25_96
 bit 25_98
 bit 25_99
-bit 25_111
 bit 25_112
 bit 25_115
 bit 25_116

diff --git a/artix7/mask_lioi3_tbytesrc.db b/artix7/mask_lioi3_tbytesrc.db
index 1c35129..3747b8a 100644
--- a/artix7/mask_lioi3_tbytesrc.db
+++ b/artix7/mask_lioi3_tbytesrc.db

@@ -1,6 +1,8 @@
 bit 25_07
+bit 25_08
 bit 25_20
 bit 25_21
+bit 25_23
 bit 25_31
 bit 25_32
 bit 25_34
@@ -15,9 +17,9 @@
 bit 25_84
 bit 25_85
 bit 25_95
+bit 25_96
 bit 25_98
 bit 25_99
-bit 25_111
 bit 25_112
 bit 25_115
 bit 25_116

diff --git a/artix7/mask_lioi3_tbyteterm.db b/artix7/mask_lioi3_tbyteterm.db
index 1c35129..3747b8a 100644
--- a/artix7/mask_lioi3_tbyteterm.db
+++ b/artix7/mask_lioi3_tbyteterm.db

@@ -1,6 +1,8 @@
 bit 25_07
+bit 25_08
 bit 25_20
 bit 25_21
+bit 25_23
 bit 25_31
 bit 25_32
 bit 25_34
@@ -15,9 +17,9 @@
 bit 25_84
 bit 25_85
 bit 25_95
+bit 25_96
 bit 25_98
 bit 25_99
-bit 25_111
 bit 25_112
 bit 25_115
 bit 25_116

diff --git a/artix7/mask_rioi3.db b/artix7/mask_rioi3.db
index 1c35129..3747b8a 100644
--- a/artix7/mask_rioi3.db
+++ b/artix7/mask_rioi3.db

@@ -1,6 +1,8 @@
 bit 25_07
+bit 25_08
 bit 25_20
 bit 25_21
+bit 25_23
 bit 25_31
 bit 25_32
 bit 25_34
@@ -15,9 +17,9 @@
 bit 25_84
 bit 25_85
 bit 25_95
+bit 25_96
 bit 25_98
 bit 25_99
-bit 25_111
 bit 25_112
 bit 25_115
 bit 25_116

diff --git a/artix7/mask_rioi3_tbytesrc.db b/artix7/mask_rioi3_tbytesrc.db
index 1c35129..3747b8a 100644
--- a/artix7/mask_rioi3_tbytesrc.db
+++ b/artix7/mask_rioi3_tbytesrc.db

@@ -1,6 +1,8 @@
 bit 25_07
+bit 25_08
 bit 25_20
 bit 25_21
+bit 25_23
 bit 25_31
 bit 25_32
 bit 25_34
@@ -15,9 +17,9 @@
 bit 25_84
 bit 25_85
 bit 25_95
+bit 25_96
 bit 25_98
 bit 25_99
-bit 25_111
 bit 25_112
 bit 25_115
 bit 25_116

diff --git a/artix7/mask_rioi3_tbyteterm.db b/artix7/mask_rioi3_tbyteterm.db
index 1c35129..3747b8a 100644
--- a/artix7/mask_rioi3_tbyteterm.db
+++ b/artix7/mask_rioi3_tbyteterm.db

@@ -1,6 +1,8 @@
 bit 25_07
+bit 25_08
 bit 25_20
 bit 25_21
+bit 25_23
 bit 25_31
 bit 25_32
 bit 25_34
@@ -15,9 +17,9 @@
 bit 25_84
 bit 25_85
 bit 25_95
+bit 25_96
 bit 25_98
 bit 25_99
-bit 25_111
 bit 25_112
 bit 25_115
 bit 25_116

diff --git a/artix7/segbits_cmt_top_l_upper_t.db b/artix7/segbits_cmt_top_l_upper_t.db
index 59c6d1d..c8d2d71 100644
--- a/artix7/segbits_cmt_top_l_upper_t.db
+++ b/artix7/segbits_cmt_top_l_upper_t.db

@@ -50,8 +50,6 @@
 CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_NO_COUNT[0] 28_171
 CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_RESERVED[0] 29_175
 CMT_TOP_L_UPPER_T.PLLE2.COMP.ZHOLD_NO_CLKIN_BUF_TOP 28_06
-CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.BUF_IN_OR_EXTERNAL_OR_ZHOLD_CLKIN_BUF 28_44
-CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.INTERNAL 28_43 29_42 29_43
 CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.Z_ZHOLD_OR_CLKIN_BUF 29_03 29_44
 CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF 28_41 29_04
 CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF_NO_TOP 29_06
@@ -71,7 +69,7 @@
 CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_NO_COUNT[0] 28_182
 CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[0] 28_183
 CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[1] 29_183
-CMT_TOP_L_UPPER_T.PLLE2.IN_USE 28_05 28_10 28_16 28_42 28_46 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_08 29_16 29_45 29_46 29_47 29_236 29_249 29_250 29_251 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
+CMT_TOP_L_UPPER_T.PLLE2.IN_USE 28_05 28_16 28_42 28_46 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_16 29_45 29_46 29_47 29_236 29_249 29_250 29_251 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
 CMT_TOP_L_UPPER_T.PLLE2.INV_CLKINSEL 28_722
 CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[0] 28_200
 CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[1] 29_200

diff --git a/artix7/segbits_cmt_top_l_upper_t.origin_info.db b/artix7/segbits_cmt_top_l_upper_t.origin_info.db
index e124544..cf51b47 100644
--- a/artix7/segbits_cmt_top_l_upper_t.origin_info.db
+++ b/artix7/segbits_cmt_top_l_upper_t.origin_info.db

@@ -5,18 +5,18 @@
 CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_L_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !28_43 !29_10 !29_11 !29_42 !29_43 28_11 28_44
 CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_L_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !28_43 !29_11 !29_42 !29_43 28_11 28_44 29_10
 CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_L_UPPER_T_PLLE2_CLK_FB_INT origin:034-cmt-pll-pips !28_11 !28_43 !29_42 !29_43 28_44 29_10 29_11
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_CLKIN1 origin:034-cmt-pll-pips !28_9 !29_9 28_10
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_10 !28_9 !29_9
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_10 !29_9 28_9
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !28_10 !28_9 29_9
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !28_10 28_9 29_9
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_PLLE2_CLK_IN1_INT origin:034-cmt-pll-pips !29_9 28_10 28_9
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_CLKIN2 origin:034-cmt-pll-pips !28_8 !29_7 29_8
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_8 !29_7 !29_8
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_8 !29_8 29_7
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !29_7 !29_8 28_8
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !29_8 28_8 29_7
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_PLLE2_CLK_IN2_INT origin:034-cmt-pll-pips !28_8 29_7 29_8
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_CLKIN1 origin:034-cmt-pll-pips !28_09 !29_09 28_10
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_09 !28_10 !29_09
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_10 !29_09 28_09
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !28_09 !28_10 29_09
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !28_10 28_09 29_09
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_PLLE2_CLK_IN1_INT origin:034-cmt-pll-pips !29_09 28_09 28_10
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_CLKIN2 origin:034-cmt-pll-pips !28_08 !29_07 29_08
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_08 !29_07 !29_08
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_08 !29_08 29_07
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !29_07 !29_08 28_08
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !29_08 28_08 29_07
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_PLLE2_CLK_IN2_INT origin:034-cmt-pll-pips !28_08 29_07 29_08
 CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT1_HIGH_TIME[0] origin:032-cmt-pll 28_163
 CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT1_HIGH_TIME[1] origin:032-cmt-pll 29_163
 CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT1_HIGH_TIME[2] origin:032-cmt-pll 28_164
@@ -242,8 +242,6 @@
 CMT_TOP_L_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_NO_COUNT[0] origin:032-cmt-pll 28_59
 CMT_TOP_L_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_RESERVED[0] origin:032-cmt-pll 29_63
 CMT_TOP_L_UPPER_T.PLLE2.COMP.ZHOLD_NO_CLKIN_BUF_TOP origin:032-cmt-pll 28_06
-CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.BUF_IN_OR_EXTERNAL_OR_ZHOLD_CLKIN_BUF origin:032-cmt-pll 28_44
-CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.INTERNAL origin:032-cmt-pll 28_43 29_42 29_43
 CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF origin:032-cmt-pll 28_41 29_04
 CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF_NO_TOP origin:032-cmt-pll 29_06
 CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.Z_ZHOLD_OR_CLKIN_BUF origin:032-cmt-pll 29_03 29_44
@@ -286,7 +284,7 @@
 CMT_TOP_L_UPPER_T.PLLE2.FILTREG2_RESERVED[8] origin:032-cmt-pll 29_638
 CMT_TOP_L_UPPER_T.PLLE2.FILTREG2_RESERVED[9] origin:032-cmt-pll 28_639
 CMT_TOP_L_UPPER_T.PLLE2.INV_CLKINSEL origin:032-cmt-pll 28_722
-CMT_TOP_L_UPPER_T.PLLE2.IN_USE origin:032-cmt-pll 28_05 28_10 28_16 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_42 28_46 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_08 29_16 29_236 29_249 29_250 29_251 29_45 29_46 29_47 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
+CMT_TOP_L_UPPER_T.PLLE2.IN_USE origin:032-cmt-pll 28_05 28_16 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_42 28_46 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_16 29_236 29_249 29_250 29_251 29_45 29_46 29_47 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
 CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[0] origin:032-cmt-pll 28_200
 CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[10] origin:032-cmt-pll 28_208
 CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[11] origin:032-cmt-pll 29_208

diff --git a/artix7/segbits_cmt_top_r_upper_t.db b/artix7/segbits_cmt_top_r_upper_t.db
index a1874b9..e819e75 100644
--- a/artix7/segbits_cmt_top_r_upper_t.db
+++ b/artix7/segbits_cmt_top_r_upper_t.db

@@ -50,8 +50,6 @@
 CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_NO_COUNT[0] 28_171
 CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_RESERVED[0] 29_175
 CMT_TOP_R_UPPER_T.PLLE2.COMP.ZHOLD_NO_CLKIN_BUF_TOP 28_06
-CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.BUF_IN_OR_EXTERNAL_OR_ZHOLD_CLKIN_BUF 28_44
-CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.INTERNAL 28_43 29_42 29_43
 CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.Z_ZHOLD_OR_CLKIN_BUF 29_03 29_44
 CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF 28_41 29_04
 CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF_NO_TOP 29_06
@@ -71,7 +69,7 @@
 CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_NO_COUNT[0] 28_182
 CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[0] 28_183
 CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[1] 29_183
-CMT_TOP_R_UPPER_T.PLLE2.IN_USE 28_05 28_10 28_16 28_42 28_46 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_08 29_16 29_45 29_46 29_47 29_236 29_249 29_250 29_251 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
+CMT_TOP_R_UPPER_T.PLLE2.IN_USE 28_05 28_16 28_42 28_46 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_16 29_45 29_46 29_47 29_236 29_249 29_250 29_251 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
 CMT_TOP_R_UPPER_T.PLLE2.INV_CLKINSEL 28_722
 CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[0] 28_200
 CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[1] 29_200

diff --git a/artix7/segbits_cmt_top_r_upper_t.origin_info.db b/artix7/segbits_cmt_top_r_upper_t.origin_info.db
index f0326b1..69cc2e1 100644
--- a/artix7/segbits_cmt_top_r_upper_t.origin_info.db
+++ b/artix7/segbits_cmt_top_r_upper_t.origin_info.db

@@ -5,18 +5,18 @@
 CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_R_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !28_43 !29_10 !29_11 !29_42 !29_43 28_11 28_44
 CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_R_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !28_43 !29_11 !29_42 !29_43 28_11 28_44 29_10
 CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_R_UPPER_T_PLLE2_CLK_FB_INT origin:034-cmt-pll-pips !28_11 !28_43 !29_42 !29_43 28_44 29_10 29_11
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_CLKIN1 origin:034-cmt-pll-pips !28_9 !29_9 28_10
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_10 !28_9 !29_9
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_10 !29_9 28_9
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !28_10 !28_9 29_9
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !28_10 28_9 29_9
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_PLLE2_CLK_IN1_INT origin:034-cmt-pll-pips !29_9 28_10 28_9
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_CLKIN2 origin:034-cmt-pll-pips !28_8 !29_7 29_8
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_8 !29_7 !29_8
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_8 !29_8 29_7
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !29_7 !29_8 28_8
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !29_8 28_8 29_7
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_PLLE2_CLK_IN2_INT origin:034-cmt-pll-pips !28_8 29_7 29_8
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_CLKIN1 origin:034-cmt-pll-pips !28_09 !29_09 28_10
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_09 !28_10 !29_09
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_10 !29_09 28_09
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !28_09 !28_10 29_09
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !28_10 28_09 29_09
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_PLLE2_CLK_IN1_INT origin:034-cmt-pll-pips !29_09 28_09 28_10
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_CLKIN2 origin:034-cmt-pll-pips !28_08 !29_07 29_08
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_08 !29_07 !29_08
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_08 !29_08 29_07
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !29_07 !29_08 28_08
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !29_08 28_08 29_07
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_PLLE2_CLK_IN2_INT origin:034-cmt-pll-pips !28_08 29_07 29_08
 CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT1_HIGH_TIME[0] origin:032-cmt-pll 28_163
 CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT1_HIGH_TIME[1] origin:032-cmt-pll 29_163
 CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT1_HIGH_TIME[2] origin:032-cmt-pll 28_164
@@ -242,8 +242,6 @@
 CMT_TOP_R_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_NO_COUNT[0] origin:032-cmt-pll 28_59
 CMT_TOP_R_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_RESERVED[0] origin:032-cmt-pll 29_63
 CMT_TOP_R_UPPER_T.PLLE2.COMP.ZHOLD_NO_CLKIN_BUF_TOP origin:032-cmt-pll 28_06
-CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.BUF_IN_OR_EXTERNAL_OR_ZHOLD_CLKIN_BUF origin:032-cmt-pll 28_44
-CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.INTERNAL origin:032-cmt-pll 28_43 29_42 29_43
 CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF origin:032-cmt-pll 28_41 29_04
 CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF_NO_TOP origin:032-cmt-pll 29_06
 CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.Z_ZHOLD_OR_CLKIN_BUF origin:032-cmt-pll 29_03 29_44
@@ -286,7 +284,7 @@
 CMT_TOP_R_UPPER_T.PLLE2.FILTREG2_RESERVED[8] origin:032-cmt-pll 29_638
 CMT_TOP_R_UPPER_T.PLLE2.FILTREG2_RESERVED[9] origin:032-cmt-pll 28_639
 CMT_TOP_R_UPPER_T.PLLE2.INV_CLKINSEL origin:032-cmt-pll 28_722
-CMT_TOP_R_UPPER_T.PLLE2.IN_USE origin:032-cmt-pll 28_05 28_10 28_16 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_42 28_46 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_08 29_16 29_236 29_249 29_250 29_251 29_45 29_46 29_47 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
+CMT_TOP_R_UPPER_T.PLLE2.IN_USE origin:032-cmt-pll 28_05 28_16 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_42 28_46 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_16 29_236 29_249 29_250 29_251 29_45 29_46 29_47 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
 CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[0] origin:032-cmt-pll 28_200
 CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[10] origin:032-cmt-pll 28_208
 CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[11] origin:032-cmt-pll 29_208

diff --git a/artix7/segbits_int_l.origin_info.db b/artix7/segbits_int_l.origin_info.db
index 1a387ef..9997183 100644
--- a/artix7/segbits_int_l.origin_info.db
+++ b/artix7/segbits_int_l.origin_info.db

@@ -172,7 +172,7 @@
 INT_L.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63
 INT_L.BYP_ALT7.ER1END3 origin:050-pip-seed !22_63 16_63 23_63 24_63 25_63
 INT_L.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63
-INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63
+INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:056-pip-rem !22_63 21_63 23_63 24_63 25_63
 INT_L.BYP_ALT7.GFAN1 origin:054-pip-fan-alt !22_63 !23_63 !25_63 20_63 24_63
 INT_L.BYP_ALT7.LOGIC_OUTS_L15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63
 INT_L.BYP_ALT7.LOGIC_OUTS_L21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63
@@ -373,7 +373,7 @@
 INT_L.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27
 INT_L.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24
 INT_L.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27
-INT_L.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27
+INT_L.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27
 INT_L.EE4BEG2.EE2END2 origin:050-pip-seed 03_40 03_41
 INT_L.EE4BEG2.EE4END2 origin:050-pip-seed 03_41 05_40
 INT_L.EE4BEG2.LOGIC_OUTS_L10 origin:050-pip-seed 03_40 07_41
@@ -413,7 +413,7 @@
 INT_L.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
 INT_L.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
 INT_L.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
-INT_L.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
+INT_L.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
 INT_L.EL1BEG0.EE2END1 origin:050-pip-seed 07_20 15_21
 INT_L.EL1BEG0.EE4END1 origin:050-pip-seed 07_20 12_21
 INT_L.EL1BEG0.EL1END1 origin:050-pip-seed 11_21 13_21
@@ -2173,7 +2173,7 @@
 INT_L.NE6BEG2.SE2END2 origin:050-pip-seed 02_37 05_39
 INT_L.NE6BEG2.SE6END2 origin:050-pip-seed 05_39 06_36
 INT_L.NE6BEG2.WW2END1 origin:050-pip-seed 03_36 04_37
-INT_L.NE6BEG2.WW4END2 origin:050-pip-seed 04_37 05_36
+INT_L.NE6BEG2.WW4END2 origin:056-pip-rem 04_37 05_36
 INT_L.NE6BEG3.EE2END3 origin:050-pip-seed 03_52 05_55
 INT_L.NE6BEG3.EE4END3 origin:050-pip-seed 05_52 05_55
 INT_L.NE6BEG3.LH0 origin:056-pip-rem 04_54 05_52
@@ -2191,9 +2191,9 @@
 INT_L.NE6BEG3.NW2END3 origin:050-pip-seed 02_53 04_53
 INT_L.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52
 INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
-INT_L.NE6BEG3.SE6END3 origin:056-pip-rem 05_55 06_52
+INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
 INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
-INT_L.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
+INT_L.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
 INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17
 INT_L.NL1BEG0.LOGIC_OUTS_L13 origin:050-pip-seed 10_17 14_17
 INT_L.NL1BEG0.LOGIC_OUTS_L19 origin:050-pip-seed 08_17 14_17
@@ -3255,7 +3255,7 @@
 INT_L.SW6BEG0.WW2END0 origin:050-pip-seed 03_12 05_15
 INT_L.SW6BEG0.WW4END1 origin:050-pip-seed 05_12 05_15
 INT_L.SW6BEG1.EE2END1 origin:050-pip-seed 03_28 04_29
-INT_L.SW6BEG1.EE4END1 origin:050-pip-seed 04_29 05_28
+INT_L.SW6BEG1.EE4END1 origin:056-pip-rem 04_29 05_28
 INT_L.SW6BEG1.LH6 origin:056-pip-rem 05_28 07_29
 INT_L.SW6BEG1.LOGIC_OUTS_L1 origin:050-pip-seed 02_29 04_30
 INT_L.SW6BEG1.LOGIC_OUTS_L13 origin:050-pip-seed 03_28 04_30
@@ -3275,7 +3275,7 @@
 INT_L.SW6BEG1.WW2END1 origin:050-pip-seed 03_28 05_31
 INT_L.SW6BEG1.WW4END2 origin:050-pip-seed 05_28 05_31
 INT_L.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
-INT_L.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
+INT_L.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
 INT_L.SW6BEG2.LOGIC_OUTS_L10 origin:050-pip-seed 03_44 04_46
 INT_L.SW6BEG2.LOGIC_OUTS_L14 origin:050-pip-seed 03_44 07_45
 INT_L.SW6BEG2.LOGIC_OUTS_L16 origin:050-pip-seed 04_46 06_44

diff --git a/artix7/segbits_int_r.origin_info.db b/artix7/segbits_int_r.origin_info.db
index 9badc50..029aee1 100644
--- a/artix7/segbits_int_r.origin_info.db
+++ b/artix7/segbits_int_r.origin_info.db

@@ -172,7 +172,7 @@
 INT_R.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63
 INT_R.BYP_ALT7.ER1END3 origin:050-pip-seed !22_63 16_63 23_63 24_63 25_63
 INT_R.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63
-INT_R.BYP_ALT7.FAN_BOUNCE_S3_6 origin:056-pip-rem !22_63 21_63 23_63 24_63 25_63
+INT_R.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63
 INT_R.BYP_ALT7.GFAN1 origin:054-pip-fan-alt !22_63 !23_63 !25_63 20_63 24_63
 INT_R.BYP_ALT7.LOGIC_OUTS15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63
 INT_R.BYP_ALT7.LOGIC_OUTS21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63
@@ -353,7 +353,7 @@
 INT_R.EE4BEG0.SS2END0 origin:050-pip-seed 03_08 05_11
 INT_R.EE4BEG0.SS6END0 origin:050-pip-seed 05_11 06_08
 INT_R.EE4BEG0.SW2END0 origin:050-pip-seed 02_09 05_11
-INT_R.EE4BEG0.SW6END0 origin:056-pip-rem 05_08 05_11
+INT_R.EE4BEG0.SW6END0 origin:050-pip-seed 05_08 05_11
 INT_R.EE4BEG1.EE2END1 origin:050-pip-seed 03_24 03_25
 INT_R.EE4BEG1.EE4END1 origin:050-pip-seed 03_25 05_24
 INT_R.EE4BEG1.LH6 origin:056-pip-rem 05_24 07_25
@@ -413,7 +413,7 @@
 INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
 INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
 INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
-INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
+INT_R.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
 INT_R.EL1BEG0.EE2END1 origin:050-pip-seed 07_20 15_21
 INT_R.EL1BEG0.EE4END1 origin:050-pip-seed 07_20 12_21
 INT_R.EL1BEG0.EL1END1 origin:050-pip-seed 11_21 13_21
@@ -2431,7 +2431,7 @@
 INT_R.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52
 INT_R.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55
 INT_R.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54
-INT_R.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55
+INT_R.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55
 INT_R.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52
 INT_R.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55
 INT_R.NR1BEG0.EE2END0 origin:050-pip-seed 10_07 15_07
@@ -3275,7 +3275,7 @@
 INT_R.SW6BEG1.WW2END1 origin:050-pip-seed 03_28 05_31
 INT_R.SW6BEG1.WW4END2 origin:050-pip-seed 05_28 05_31
 INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
-INT_R.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
+INT_R.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
 INT_R.SW6BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_44 04_46
 INT_R.SW6BEG2.LOGIC_OUTS14 origin:050-pip-seed 03_44 07_45
 INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44
@@ -3295,7 +3295,7 @@
 INT_R.SW6BEG2.WW2END2 origin:050-pip-seed 03_44 05_47
 INT_R.SW6BEG2.WW4END3 origin:050-pip-seed 05_44 05_47
 INT_R.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61
-INT_R.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60
+INT_R.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60
 INT_R.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60
 INT_R.SW6BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_60 07_61
 INT_R.SW6BEG3.LOGIC_OUTS15 origin:050-pip-seed 03_60 04_62
@@ -3563,7 +3563,7 @@
 INT_R.WW4BEG0.LOGIC_OUTS8 origin:050-pip-seed 03_00 07_01
 INT_R.WW4BEG0.LV0 origin:056-pip-rem 04_02 05_00
 INT_R.WW4BEG0.NE2END0 origin:050-pip-seed 02_01 05_03
-INT_R.WW4BEG0.NE6END0 origin:050-pip-seed 05_00 05_03
+INT_R.WW4BEG0.NE6END0 origin:056-pip-rem 05_00 05_03
 INT_R.WW4BEG0.NN2END0 origin:050-pip-seed 03_00 05_03
 INT_R.WW4BEG0.NN6END0 origin:050-pip-seed 05_03 06_00
 INT_R.WW4BEG0.NW2END0 origin:050-pip-seed 02_01 03_01

diff --git a/kintex7/mask_lioi3.db b/kintex7/mask_lioi3.db
index 4c3181d..584510c 100644
--- a/kintex7/mask_lioi3.db
+++ b/kintex7/mask_lioi3.db

@@ -1,7 +1,7 @@
 bit 25_07
+bit 25_16
 bit 25_20
 bit 25_21
-bit 25_31
 bit 25_32
 bit 25_34
 bit 25_35

diff --git a/kintex7/mask_lioi3_tbytesrc.db b/kintex7/mask_lioi3_tbytesrc.db
index 4c3181d..584510c 100644
--- a/kintex7/mask_lioi3_tbytesrc.db
+++ b/kintex7/mask_lioi3_tbytesrc.db

@@ -1,7 +1,7 @@
 bit 25_07
+bit 25_16
 bit 25_20
 bit 25_21
-bit 25_31
 bit 25_32
 bit 25_34
 bit 25_35

diff --git a/kintex7/mask_lioi3_tbyteterm.db b/kintex7/mask_lioi3_tbyteterm.db
index 4c3181d..584510c 100644
--- a/kintex7/mask_lioi3_tbyteterm.db
+++ b/kintex7/mask_lioi3_tbyteterm.db

@@ -1,7 +1,7 @@
 bit 25_07
+bit 25_16
 bit 25_20
 bit 25_21
-bit 25_31
 bit 25_32
 bit 25_34
 bit 25_35

diff --git a/kintex7/mask_rioi3.db b/kintex7/mask_rioi3.db
index 4c3181d..584510c 100644
--- a/kintex7/mask_rioi3.db
+++ b/kintex7/mask_rioi3.db

@@ -1,7 +1,7 @@
 bit 25_07
+bit 25_16
 bit 25_20
 bit 25_21
-bit 25_31
 bit 25_32
 bit 25_34
 bit 25_35

diff --git a/kintex7/mask_rioi3_tbytesrc.db b/kintex7/mask_rioi3_tbytesrc.db
index 4c3181d..584510c 100644
--- a/kintex7/mask_rioi3_tbytesrc.db
+++ b/kintex7/mask_rioi3_tbytesrc.db

@@ -1,7 +1,7 @@
 bit 25_07
+bit 25_16
 bit 25_20
 bit 25_21
-bit 25_31
 bit 25_32
 bit 25_34
 bit 25_35

diff --git a/kintex7/mask_rioi3_tbyteterm.db b/kintex7/mask_rioi3_tbyteterm.db
index 4c3181d..584510c 100644
--- a/kintex7/mask_rioi3_tbyteterm.db
+++ b/kintex7/mask_rioi3_tbyteterm.db

@@ -1,7 +1,7 @@
 bit 25_07
+bit 25_16
 bit 25_20
 bit 25_21
-bit 25_31
 bit 25_32
 bit 25_34
 bit 25_35

diff --git a/kintex7/segbits_cmt_top_l_upper_t.db b/kintex7/segbits_cmt_top_l_upper_t.db
index ce2c2b5..c307027 100644
--- a/kintex7/segbits_cmt_top_l_upper_t.db
+++ b/kintex7/segbits_cmt_top_l_upper_t.db

@@ -49,8 +49,6 @@
 CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_MX[1] 29_172
 CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_NO_COUNT[0] 28_171
 CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_RESERVED[0] 29_175
-CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.BUF_IN_OR_EXTERNAL_OR_ZHOLD_CLKIN_BUF 28_44
-CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.INTERNAL 28_43 29_42 29_43
 CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.Z_ZHOLD_OR_CLKIN_BUF 29_03 29_44
 CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF 28_41 29_04
 CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_EDGE[0] 29_182
@@ -69,7 +67,7 @@
 CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_NO_COUNT[0] 28_182
 CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[0] 28_183
 CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[1] 29_183
-CMT_TOP_L_UPPER_T.PLLE2.IN_USE 28_05 28_10 28_16 28_42 28_46 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_08 29_16 29_45 29_46 29_47 29_236 29_249 29_250 29_251 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
+CMT_TOP_L_UPPER_T.PLLE2.IN_USE 28_05 28_16 28_42 28_46 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_16 29_45 29_46 29_47 29_236 29_249 29_250 29_251 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
 CMT_TOP_L_UPPER_T.PLLE2.INV_CLKINSEL 28_722
 CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[0] 28_200
 CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[1] 29_200

diff --git a/kintex7/segbits_cmt_top_l_upper_t.origin_info.db b/kintex7/segbits_cmt_top_l_upper_t.origin_info.db
index 83d816c..2046b36 100644
--- a/kintex7/segbits_cmt_top_l_upper_t.origin_info.db
+++ b/kintex7/segbits_cmt_top_l_upper_t.origin_info.db

@@ -5,18 +5,18 @@
 CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_L_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !28_43 !29_10 !29_11 !29_42 !29_43 28_11 28_44
 CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_L_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !28_43 !29_11 !29_42 !29_43 28_11 28_44 29_10
 CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_L_UPPER_T_PLLE2_CLK_FB_INT origin:034-cmt-pll-pips !28_11 !28_43 !29_42 !29_43 28_44 29_10 29_11
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_CLKIN1 origin:034-cmt-pll-pips !28_9 !29_9 28_10
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_10 !28_9 !29_9
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_10 !29_9 28_9
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !28_10 !28_9 29_9
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !28_10 28_9 29_9
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_PLLE2_CLK_IN1_INT origin:034-cmt-pll-pips !29_9 28_10 28_9
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_CLKIN2 origin:034-cmt-pll-pips !28_8 !29_7 29_8
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_8 !29_7 !29_8
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_8 !29_8 29_7
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !29_7 !29_8 28_8
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !29_8 28_8 29_7
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_PLLE2_CLK_IN2_INT origin:034-cmt-pll-pips !28_8 29_7 29_8
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_CLKIN1 origin:034-cmt-pll-pips !28_09 !29_09 28_10
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_09 !28_10 !29_09
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_10 !29_09 28_09
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !28_09 !28_10 29_09
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !28_10 28_09 29_09
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_PLLE2_CLK_IN1_INT origin:034-cmt-pll-pips !29_09 28_09 28_10
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_CLKIN2 origin:034-cmt-pll-pips !28_08 !29_07 29_08
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_08 !29_07 !29_08
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_08 !29_08 29_07
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !29_07 !29_08 28_08
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !29_08 28_08 29_07
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_PLLE2_CLK_IN2_INT origin:034-cmt-pll-pips !28_08 29_07 29_08
 CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT1_HIGH_TIME[0] origin:032-cmt-pll 28_163
 CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT1_HIGH_TIME[1] origin:032-cmt-pll 29_163
 CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT1_HIGH_TIME[2] origin:032-cmt-pll 28_164
@@ -241,8 +241,6 @@
 CMT_TOP_L_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_MX[1] origin:032-cmt-pll 29_60
 CMT_TOP_L_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_NO_COUNT[0] origin:032-cmt-pll 28_59
 CMT_TOP_L_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_RESERVED[0] origin:032-cmt-pll 29_63
-CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.BUF_IN_OR_EXTERNAL_OR_ZHOLD_CLKIN_BUF origin:032-cmt-pll 28_44
-CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.INTERNAL origin:032-cmt-pll 28_43 29_42 29_43
 CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF origin:032-cmt-pll 28_41 29_04
 CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.Z_ZHOLD_OR_CLKIN_BUF origin:032-cmt-pll 29_03 29_44
 CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_EDGE[0] origin:032-cmt-pll 29_182
@@ -284,7 +282,7 @@
 CMT_TOP_L_UPPER_T.PLLE2.FILTREG2_RESERVED[8] origin:032-cmt-pll 29_638
 CMT_TOP_L_UPPER_T.PLLE2.FILTREG2_RESERVED[9] origin:032-cmt-pll 28_639
 CMT_TOP_L_UPPER_T.PLLE2.INV_CLKINSEL origin:032-cmt-pll 28_722
-CMT_TOP_L_UPPER_T.PLLE2.IN_USE origin:032-cmt-pll 28_05 28_10 28_16 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_42 28_46 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_08 29_16 29_236 29_249 29_250 29_251 29_45 29_46 29_47 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
+CMT_TOP_L_UPPER_T.PLLE2.IN_USE origin:032-cmt-pll 28_05 28_16 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_42 28_46 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_16 29_236 29_249 29_250 29_251 29_45 29_46 29_47 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
 CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[0] origin:032-cmt-pll 28_200
 CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[10] origin:032-cmt-pll 28_208
 CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[11] origin:032-cmt-pll 29_208

diff --git a/kintex7/segbits_cmt_top_r_upper_t.db b/kintex7/segbits_cmt_top_r_upper_t.db
index b688916..315be13 100644
--- a/kintex7/segbits_cmt_top_r_upper_t.db
+++ b/kintex7/segbits_cmt_top_r_upper_t.db

@@ -49,8 +49,6 @@
 CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_MX[1] 29_172
 CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_NO_COUNT[0] 28_171
 CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_RESERVED[0] 29_175
-CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.BUF_IN_OR_EXTERNAL_OR_ZHOLD_CLKIN_BUF 28_44
-CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.INTERNAL 28_43 29_42 29_43
 CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.Z_ZHOLD_OR_CLKIN_BUF 29_03 29_44
 CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF 28_41 29_04
 CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_EDGE[0] 29_182
@@ -69,7 +67,7 @@
 CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_NO_COUNT[0] 28_182
 CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[0] 28_183
 CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[1] 29_183
-CMT_TOP_R_UPPER_T.PLLE2.IN_USE 28_05 28_10 28_16 28_42 28_46 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_08 29_16 29_45 29_46 29_47 29_236 29_249 29_250 29_251 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
+CMT_TOP_R_UPPER_T.PLLE2.IN_USE 28_05 28_16 28_42 28_46 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_16 29_45 29_46 29_47 29_236 29_249 29_250 29_251 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
 CMT_TOP_R_UPPER_T.PLLE2.INV_CLKINSEL 28_722
 CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[0] 28_200
 CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[1] 29_200

diff --git a/kintex7/segbits_cmt_top_r_upper_t.origin_info.db b/kintex7/segbits_cmt_top_r_upper_t.origin_info.db
index bdb2538..1af413b 100644
--- a/kintex7/segbits_cmt_top_r_upper_t.origin_info.db
+++ b/kintex7/segbits_cmt_top_r_upper_t.origin_info.db

@@ -5,18 +5,18 @@
 CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_R_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !28_43 !29_10 !29_11 !29_42 !29_43 28_11 28_44
 CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_R_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !28_43 !29_11 !29_42 !29_43 28_11 28_44 29_10
 CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_R_UPPER_T_PLLE2_CLK_FB_INT origin:034-cmt-pll-pips !28_11 !28_43 !29_42 !29_43 28_44 29_10 29_11
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_CLKIN1 origin:034-cmt-pll-pips !28_9 !29_9 28_10
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_10 !28_9 !29_9
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_10 !29_9 28_9
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !28_10 !28_9 29_9
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !28_10 28_9 29_9
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_PLLE2_CLK_IN1_INT origin:034-cmt-pll-pips !29_9 28_10 28_9
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_CLKIN2 origin:034-cmt-pll-pips !28_8 !29_7 29_8
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_8 !29_7 !29_8
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_8 !29_8 29_7
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !29_7 !29_8 28_8
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !29_8 28_8 29_7
-CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_PLLE2_CLK_IN2_INT origin:034-cmt-pll-pips !28_8 29_7 29_8
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_CLKIN1 origin:034-cmt-pll-pips !28_09 !29_09 28_10
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_09 !28_10 !29_09
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_10 !29_09 28_09
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !28_09 !28_10 29_09
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !28_10 28_09 29_09
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_PLLE2_CLK_IN1_INT origin:034-cmt-pll-pips !29_09 28_09 28_10
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_CLKIN2 origin:034-cmt-pll-pips !28_08 !29_07 29_08
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_08 !29_07 !29_08
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_08 !29_08 29_07
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !29_07 !29_08 28_08
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !29_08 28_08 29_07
+CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_PLLE2_CLK_IN2_INT origin:034-cmt-pll-pips !28_08 29_07 29_08
 CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT1_HIGH_TIME[0] origin:032-cmt-pll 28_163
 CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT1_HIGH_TIME[1] origin:032-cmt-pll 29_163
 CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT1_HIGH_TIME[2] origin:032-cmt-pll 28_164
@@ -241,8 +241,6 @@
 CMT_TOP_R_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_MX[1] origin:032-cmt-pll 29_60
 CMT_TOP_R_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_NO_COUNT[0] origin:032-cmt-pll 28_59
 CMT_TOP_R_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_RESERVED[0] origin:032-cmt-pll 29_63
-CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.BUF_IN_OR_EXTERNAL_OR_ZHOLD_CLKIN_BUF origin:032-cmt-pll 28_44
-CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.INTERNAL origin:032-cmt-pll 28_43 29_42 29_43
 CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF origin:032-cmt-pll 28_41 29_04
 CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.Z_ZHOLD_OR_CLKIN_BUF origin:032-cmt-pll 29_03 29_44
 CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_EDGE[0] origin:032-cmt-pll 29_182
@@ -284,7 +282,7 @@
 CMT_TOP_R_UPPER_T.PLLE2.FILTREG2_RESERVED[8] origin:032-cmt-pll 29_638
 CMT_TOP_R_UPPER_T.PLLE2.FILTREG2_RESERVED[9] origin:032-cmt-pll 28_639
 CMT_TOP_R_UPPER_T.PLLE2.INV_CLKINSEL origin:032-cmt-pll 28_722
-CMT_TOP_R_UPPER_T.PLLE2.IN_USE origin:032-cmt-pll 28_05 28_10 28_16 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_42 28_46 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_08 29_16 29_236 29_249 29_250 29_251 29_45 29_46 29_47 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
+CMT_TOP_R_UPPER_T.PLLE2.IN_USE origin:032-cmt-pll 28_05 28_16 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_42 28_46 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_16 29_236 29_249 29_250 29_251 29_45 29_46 29_47 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
 CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[0] origin:032-cmt-pll 28_200
 CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[10] origin:032-cmt-pll 28_208
 CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[11] origin:032-cmt-pll 29_208

diff --git a/kintex7/segbits_int_l.db b/kintex7/segbits_int_l.db
index 6147fe8..43670e7 100644
--- a/kintex7/segbits_int_l.db
+++ b/kintex7/segbits_int_l.db

@@ -1524,7 +1524,7 @@
 INT_L.IMUX_L43.FAN_BOUNCE5 20_30 22_30 !23_30 24_30 25_30
 INT_L.IMUX_L43.LOGIC_OUTS_L1 21_30 22_30 !23_30 24_30 25_30
 INT_L.IMUX_L43.LOGIC_OUTS_L13 21_30 !22_30 23_30 24_30 25_30
-INT_L.IMUX_L43.LOGIC_OUTS_L23 20_00 21_30 !22_30 !23_30 24_30 !25_30
+INT_L.IMUX_L43.LOGIC_OUTS_L23 21_30 !22_30 !23_30 24_30 !25_30
 INT_L.IMUX_L43.EE2END1 19_31 !22_30 !23_30 !24_30 25_30
 INT_L.IMUX_L43.EL1END2 19_31 !22_30 23_30 24_30 25_30
 INT_L.IMUX_L43.ER1END1 18_31 22_30 !23_30 24_30 25_30

diff --git a/kintex7/segbits_int_l.origin_info.db b/kintex7/segbits_int_l.origin_info.db
index 3a77205..f31ac75 100644
--- a/kintex7/segbits_int_l.origin_info.db
+++ b/kintex7/segbits_int_l.origin_info.db

@@ -1720,7 +1720,7 @@
 INT_L.IMUX_L43.GFAN0 origin:049-int-imux-gfan !22_30 !23_30 !24_30 21_30 25_30
 INT_L.IMUX_L43.LOGIC_OUTS_L1 origin:051-pip-imuxlout-bypalts !23_30 21_30 22_30 24_30 25_30
 INT_L.IMUX_L43.LOGIC_OUTS_L13 origin:051-pip-imuxlout-bypalts !22_30 21_30 23_30 24_30 25_30
-INT_L.IMUX_L43.LOGIC_OUTS_L23 origin:051-pip-imuxlout-bypalts !22_30 !23_30 !25_30 20_00 21_30 24_30
+INT_L.IMUX_L43.LOGIC_OUTS_L23 origin:051-pip-imuxlout-bypalts !22_30 !23_30 !25_30 21_30 24_30
 INT_L.IMUX_L43.NE2END2 origin:050-pip-seed !22_30 !23_30 !25_30 18_31 24_30
 INT_L.IMUX_L43.NL1END2 origin:050-pip-seed !22_30 16_30 23_30 24_30 25_30
 INT_L.IMUX_L43.NN2END2 origin:050-pip-seed !22_30 !23_30 !24_30 18_31 25_30
@@ -2193,7 +2193,7 @@
 INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
 INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
 INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
-INT_L.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
+INT_L.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
 INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17
 INT_L.NL1BEG0.LOGIC_OUTS_L13 origin:050-pip-seed 10_17 14_17
 INT_L.NL1BEG0.LOGIC_OUTS_L19 origin:050-pip-seed 08_17 14_17
@@ -3295,7 +3295,7 @@
 INT_L.SW6BEG2.WW2END2 origin:050-pip-seed 03_44 05_47
 INT_L.SW6BEG2.WW4END3 origin:050-pip-seed 05_44 05_47
 INT_L.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61
-INT_L.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60
+INT_L.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60
 INT_L.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60
 INT_L.SW6BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_60 07_61
 INT_L.SW6BEG3.LOGIC_OUTS_L15 origin:050-pip-seed 03_60 04_62
@@ -3623,7 +3623,7 @@
 INT_L.WW4BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_49 04_50
 INT_L.WW4BEG3.LV_L18 origin:056-pip-rem 05_48 07_49
 INT_L.WW4BEG3.NE2END3 origin:050-pip-seed 02_49 05_51
-INT_L.WW4BEG3.NE6END3 origin:056-pip-rem 05_48 05_51
+INT_L.WW4BEG3.NE6END3 origin:050-pip-seed 05_48 05_51
 INT_L.WW4BEG3.NN2END3 origin:050-pip-seed 03_48 05_51
 INT_L.WW4BEG3.NN6END3 origin:050-pip-seed 05_51 06_48
 INT_L.WW4BEG3.NW2END3 origin:050-pip-seed 02_49 03_49

diff --git a/kintex7/segbits_int_r.origin_info.db b/kintex7/segbits_int_r.origin_info.db
index 9437b3a..357311b 100644
--- a/kintex7/segbits_int_r.origin_info.db
+++ b/kintex7/segbits_int_r.origin_info.db

@@ -393,7 +393,7 @@
 INT_R.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
 INT_R.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
 INT_R.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
-INT_R.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43
+INT_R.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
 INT_R.EE4BEG3.EE2END3 origin:050-pip-seed 03_56 03_57
 INT_R.EE4BEG3.EE4END3 origin:050-pip-seed 03_57 05_56
 INT_R.EE4BEG3.LH0 origin:056-pip-rem 04_58 05_56
@@ -584,7 +584,7 @@
 INT_R.FAN_ALT0.GFAN0 origin:054-pip-fan-alt !22_00 !23_00 !24_00 21_00 25_00
 INT_R.FAN_ALT0.LOGIC_OUTS0 origin:050-pip-seed !23_00 21_00 22_00 24_00 25_00
 INT_R.FAN_ALT0.LOGIC_OUTS12 origin:050-pip-seed !22_00 21_00 23_00 24_00 25_00
-INT_R.FAN_ALT0.LOGIC_OUTS22 origin:056-pip-rem !22_00 !23_00 !25_00 21_00 24_00
+INT_R.FAN_ALT0.LOGIC_OUTS22 origin:050-pip-seed !22_00 !23_00 !25_00 21_00 24_00
 INT_R.FAN_ALT0.NE2END0 origin:050-pip-seed !22_00 !23_00 !25_00 18_01 24_00
 INT_R.FAN_ALT0.NL1END0 origin:050-pip-seed !22_00 19_01 23_00 24_00 25_00
 INT_R.FAN_ALT0.NN2END0 origin:050-pip-seed !22_00 !23_00 !24_00 18_01 25_00
@@ -676,7 +676,7 @@
 INT_R.FAN_ALT4.EL1END0 origin:050-pip-seed !22_08 16_08 23_08 24_08 25_08
 INT_R.FAN_ALT4.ER1END0 origin:050-pip-seed !23_08 17_08 22_08 24_08 25_08
 INT_R.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
-INT_R.FAN_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_08 20_08 23_08 24_08 25_08
+INT_R.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
 INT_R.FAN_ALT4.GFAN0 origin:054-pip-fan-alt !22_08 !23_08 !24_08 21_08 25_08
 INT_R.FAN_ALT4.LOGIC_OUTS18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
 INT_R.FAN_ALT4.LOGIC_OUTS4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
@@ -2191,9 +2191,9 @@
 INT_R.NE6BEG3.NW2END3 origin:050-pip-seed 02_53 04_53
 INT_R.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52
 INT_R.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
-INT_R.NE6BEG3.SE6END3 origin:056-pip-rem 05_55 06_52
+INT_R.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
 INT_R.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
-INT_R.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
+INT_R.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
 INT_R.NL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_16 14_17
 INT_R.NL1BEG0.LOGIC_OUTS13 origin:050-pip-seed 10_17 14_17
 INT_R.NL1BEG0.LOGIC_OUTS19 origin:050-pip-seed 08_17 14_17
@@ -2431,7 +2431,7 @@
 INT_R.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52
 INT_R.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55
 INT_R.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54
-INT_R.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55
+INT_R.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55
 INT_R.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52
 INT_R.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55
 INT_R.NR1BEG0.EE2END0 origin:050-pip-seed 10_07 15_07
@@ -3285,7 +3285,7 @@
 INT_R.SW6BEG2.LVB0 origin:056-pip-rem 04_46 05_44
 INT_R.SW6BEG2.LVB12 origin:056-pip-rem 05_44 07_45
 INT_R.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47
-INT_R.SW6BEG2.NW6END3 origin:050-pip-seed 05_47 06_44
+INT_R.SW6BEG2.NW6END3 origin:056-pip-rem 05_47 06_44
 INT_R.SW6BEG2.SE2END2 origin:050-pip-seed 02_45 04_45
 INT_R.SW6BEG2.SE6END2 origin:050-pip-seed 04_45 06_44
 INT_R.SW6BEG2.SS2END2 origin:050-pip-seed 03_44 03_45
@@ -3295,7 +3295,7 @@
 INT_R.SW6BEG2.WW2END2 origin:050-pip-seed 03_44 05_47
 INT_R.SW6BEG2.WW4END3 origin:050-pip-seed 05_44 05_47
 INT_R.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61
-INT_R.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60
+INT_R.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60
 INT_R.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60
 INT_R.SW6BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_60 07_61
 INT_R.SW6BEG3.LOGIC_OUTS15 origin:050-pip-seed 03_60 04_62
@@ -3563,7 +3563,7 @@
 INT_R.WW4BEG0.LOGIC_OUTS8 origin:050-pip-seed 03_00 07_01
 INT_R.WW4BEG0.LV0 origin:056-pip-rem 04_02 05_00
 INT_R.WW4BEG0.NE2END0 origin:050-pip-seed 02_01 05_03
-INT_R.WW4BEG0.NE6END0 origin:056-pip-rem 05_00 05_03
+INT_R.WW4BEG0.NE6END0 origin:050-pip-seed 05_00 05_03
 INT_R.WW4BEG0.NN2END0 origin:050-pip-seed 03_00 05_03
 INT_R.WW4BEG0.NN6END0 origin:050-pip-seed 05_03 06_00
 INT_R.WW4BEG0.NW2END0 origin:050-pip-seed 02_01 03_01

diff --git a/kintex7/segbits_liob33.db b/kintex7/segbits_liob33.db
index 5e26f36..3693490 100644
--- a/kintex7/segbits_liob33.db
+++ b/kintex7/segbits_liob33.db

@@ -15,16 +15,13 @@
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW 38_106 38_110 39_105 !39_107 39_109 !39_111
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN 39_95
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 38_64 38_112 !38_118 !38_126 39_65 !39_117 39_119 !39_125 !39_127
-LIOB33.IOB_Y0.LVCMOS15.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 39_113 !39_117 !39_119 39_125 39_127
-LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 39_127
-LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
-LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 39_127
-LIOB33.IOB_Y0.LVCMOS15.IN 38_86 39_85 !39_87
-LIOB33.IOB_Y0.LVCMOS15_SSTL135.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127
+LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 38_64 38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 39_127
+LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 !39_117 !39_119 !39_125 39_127
+LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_117 !39_119 !39_125 39_127
+LIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 !39_117 !39_119 39_125 39_127
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 38_64 38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 !39_127
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 38_64 38_112 !38_118 38_126 39_65 !39_117 !39_119 39_125 39_127
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 38_64 38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127
-LIOB33.IOB_Y0.LVCMOS18_LVCMOS25.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 !39_117 !39_119 39_125 39_127
 LIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 !39_117 !39_119 !39_125 !39_127
 LIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_117 !39_119 !39_125 !39_127
 LIOB33.IOB_Y0.LVCMOS33.DRIVE.I16 38_64 !38_112 38_118 !38_126 39_65 39_117 !39_119 !39_125 39_127
@@ -32,8 +29,9 @@
 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 38_64 !38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 !39_127
 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 38_64 !38_112 !38_118 38_126 39_65 !39_117 !39_119 39_125 39_127
 LIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED 38_64 38_112 38_118 38_126 39_65 39_113 39_117 39_119 !39_125 39_127
-LIOB33.IOB_Y0.SSTL135.IN !38_86 !39_85 39_87
-LIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 !39_85 39_87
+LIOB33.IOB_Y0.SSTL135.IN !38_86 39_87
+LIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 39_87
+LIOB33.IOB_Y0.SSTL135.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127
 LIOB33.IOB_Y0.SSTL135.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111
 LIOB33.IOB_Y1.IBUFDISABLE.I 39_45
 LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 38_04 38_06 39_05 39_07

diff --git a/kintex7/segbits_liob33.origin_info.db b/kintex7/segbits_liob33.origin_info.db
index c69e4eb..2a99777 100644
--- a/kintex7/segbits_liob33.origin_info.db
+++ b/kintex7/segbits_liob33.origin_info.db

@@ -9,16 +9,13 @@
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 39_95
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_118 !38_126 !39_117 !39_125 !39_127 38_112 38_64 39_119 39_65
-LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_113 39_127 39_65
-LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65
-LIOB33.IOB_Y0.LVCMOS15.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_113 39_125 39_127 39_65
-LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_113 39_119 39_125 39_127 39_65
-LIOB33.IOB_Y0.LVCMOS15.IN origin:030-iob !39_87 38_86 39_85
-LIOB33.IOB_Y0.LVCMOS15_SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125
+LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_127 39_65
+LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_117 39_127 39_65
+LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_119 39_125 39_127 39_65
+LIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_125 39_127 39_65
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_118 !39_117 !39_127 38_112 38_126 38_64 39_119 39_125 39_65
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 origin:030-iob !38_118 !39_117 !39_119 38_112 38_126 38_64 39_125 39_127 39_65
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 origin:030-iob !38_118 !39_125 !39_127 38_112 38_126 38_64 39_117 39_119 39_65
-LIOB33.IOB_Y0.LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_125 39_127 39_65
 LIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 !39_127 38_112 38_64 39_65
 LIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 origin:030-iob !39_119 !39_125 !39_127 38_112 38_118 38_126 38_64 39_117 39_65
 LIOB33.IOB_Y0.LVCMOS33.DRIVE.I16 origin:030-iob !38_112 !38_126 !39_119 !39_125 38_118 38_64 39_117 39_127 39_65
@@ -31,8 +28,9 @@
 LIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93
 LIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93
 LIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED origin:030-iob !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_119 39_127 39_65
-LIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 !39_85 39_87
-LIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob !39_85 38_86 39_87
+LIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 39_87
+LIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob 38_86 39_87
+LIOB33.IOB_Y0.SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125
 LIOB33.IOB_Y0.SSTL135.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111
 LIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84
 LIOB33.IOB_Y1.IBUFDISABLE.I origin:030-iob 39_45

diff --git a/kintex7/segbits_riob33.db b/kintex7/segbits_riob33.db
index e200eda..08ecab5 100644
--- a/kintex7/segbits_riob33.db
+++ b/kintex7/segbits_riob33.db

@@ -15,16 +15,13 @@
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW 38_106 38_110 39_105 !39_107 39_109 !39_111
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN 39_95
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 38_64 38_112 !38_118 !38_126 39_65 !39_117 39_119 !39_125 !39_127
-RIOB33.IOB_Y0.LVCMOS15.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 39_113 !39_117 !39_119 39_125 39_127
-RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 39_127
-RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
-RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 39_127
-RIOB33.IOB_Y0.LVCMOS15.IN 38_86 39_85 !39_87
-RIOB33.IOB_Y0.LVCMOS15_SSTL135.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127
+RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 38_64 38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 39_127
+RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 !39_117 !39_119 !39_125 39_127
+RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_117 !39_119 !39_125 39_127
+RIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 !39_117 !39_119 39_125 39_127
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 38_64 38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 !39_127
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 38_64 38_112 !38_118 38_126 39_65 !39_117 !39_119 39_125 39_127
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 38_64 38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127
-RIOB33.IOB_Y0.LVCMOS18_LVCMOS25.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 !39_117 !39_119 39_125 39_127
 RIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 !39_117 !39_119 !39_125 !39_127
 RIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_117 !39_119 !39_125 !39_127
 RIOB33.IOB_Y0.LVCMOS33.DRIVE.I16 38_64 !38_112 38_118 !38_126 39_65 39_117 !39_119 !39_125 39_127
@@ -32,8 +29,9 @@
 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 38_64 !38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 !39_127
 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 38_64 !38_112 !38_118 38_126 39_65 !39_117 !39_119 39_125 39_127
 RIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED 38_64 38_112 38_118 38_126 39_65 39_113 39_117 39_119 !39_125 39_127
-RIOB33.IOB_Y0.SSTL135.IN !38_86 !39_85 39_87
-RIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 !39_85 39_87
+RIOB33.IOB_Y0.SSTL135.IN !38_86 39_87
+RIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 39_87
+RIOB33.IOB_Y0.SSTL135.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127
 RIOB33.IOB_Y0.SSTL135.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111
 RIOB33.IOB_Y1.IBUFDISABLE.I 39_45
 RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 38_04 38_06 39_05 39_07

diff --git a/kintex7/segbits_riob33.origin_info.db b/kintex7/segbits_riob33.origin_info.db
index 5704988..29016dc 100644
--- a/kintex7/segbits_riob33.origin_info.db
+++ b/kintex7/segbits_riob33.origin_info.db

@@ -9,16 +9,13 @@
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 39_95
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_118 !38_126 !39_117 !39_125 !39_127 38_112 38_64 39_119 39_65
-RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_113 39_127 39_65
-RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65
-RIOB33.IOB_Y0.LVCMOS15.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_113 39_125 39_127 39_65
-RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_113 39_119 39_125 39_127 39_65
-RIOB33.IOB_Y0.LVCMOS15.IN origin:030-iob !39_87 38_86 39_85
-RIOB33.IOB_Y0.LVCMOS15_SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125
+RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_127 39_65
+RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_117 39_127 39_65
+RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_119 39_125 39_127 39_65
+RIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_125 39_127 39_65
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_118 !39_117 !39_127 38_112 38_126 38_64 39_119 39_125 39_65
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 origin:030-iob !38_118 !39_117 !39_119 38_112 38_126 38_64 39_125 39_127 39_65
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 origin:030-iob !38_118 !39_125 !39_127 38_112 38_126 38_64 39_117 39_119 39_65
-RIOB33.IOB_Y0.LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_125 39_127 39_65
 RIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 !39_127 38_112 38_64 39_65
 RIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 origin:030-iob !39_119 !39_125 !39_127 38_112 38_118 38_126 38_64 39_117 39_65
 RIOB33.IOB_Y0.LVCMOS33.DRIVE.I16 origin:030-iob !38_112 !38_126 !39_119 !39_125 38_118 38_64 39_117 39_127 39_65
@@ -31,8 +28,9 @@
 RIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93
 RIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93
 RIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED origin:030-iob !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_119 39_127 39_65
-RIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 !39_85 39_87
-RIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob !39_85 38_86 39_87
+RIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 39_87
+RIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob 38_86 39_87
+RIOB33.IOB_Y0.SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125
 RIOB33.IOB_Y0.SSTL135.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111
 RIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84
 RIOB33.IOB_Y1.IBUFDISABLE.I origin:030-iob 39_45

diff --git a/zynq7/mask_lioi3.db b/zynq7/mask_lioi3.db
index b6d3cdd..85547f5 100644
--- a/zynq7/mask_lioi3.db
+++ b/zynq7/mask_lioi3.db

@@ -1,7 +1,8 @@
 bit 25_07
-bit 25_16
+bit 25_08
 bit 25_20
 bit 25_21
+bit 25_23
 bit 25_24
 bit 25_31
 bit 25_32
@@ -20,6 +21,7 @@
 bit 25_96
 bit 25_98
 bit 25_99
+bit 25_112
 bit 25_115
 bit 25_116
 bit 25_122

diff --git a/zynq7/mask_lioi3_tbytesrc.db b/zynq7/mask_lioi3_tbytesrc.db
index b6d3cdd..85547f5 100644
--- a/zynq7/mask_lioi3_tbytesrc.db
+++ b/zynq7/mask_lioi3_tbytesrc.db

@@ -1,7 +1,8 @@
 bit 25_07
-bit 25_16
+bit 25_08
 bit 25_20
 bit 25_21
+bit 25_23
 bit 25_24
 bit 25_31
 bit 25_32
@@ -20,6 +21,7 @@
 bit 25_96
 bit 25_98
 bit 25_99
+bit 25_112
 bit 25_115
 bit 25_116
 bit 25_122

diff --git a/zynq7/mask_lioi3_tbyteterm.db b/zynq7/mask_lioi3_tbyteterm.db
index b6d3cdd..85547f5 100644
--- a/zynq7/mask_lioi3_tbyteterm.db
+++ b/zynq7/mask_lioi3_tbyteterm.db

@@ -1,7 +1,8 @@
 bit 25_07
-bit 25_16
+bit 25_08
 bit 25_20
 bit 25_21
+bit 25_23
 bit 25_24
 bit 25_31
 bit 25_32
@@ -20,6 +21,7 @@
 bit 25_96
 bit 25_98
 bit 25_99
+bit 25_112
 bit 25_115
 bit 25_116
 bit 25_122

diff --git a/zynq7/mask_rioi3.db b/zynq7/mask_rioi3.db
index b6d3cdd..85547f5 100644
--- a/zynq7/mask_rioi3.db
+++ b/zynq7/mask_rioi3.db

@@ -1,7 +1,8 @@
 bit 25_07
-bit 25_16
+bit 25_08
 bit 25_20
 bit 25_21
+bit 25_23
 bit 25_24
 bit 25_31
 bit 25_32
@@ -20,6 +21,7 @@
 bit 25_96
 bit 25_98
 bit 25_99
+bit 25_112
 bit 25_115
 bit 25_116
 bit 25_122

diff --git a/zynq7/mask_rioi3_tbytesrc.db b/zynq7/mask_rioi3_tbytesrc.db
index b6d3cdd..85547f5 100644
--- a/zynq7/mask_rioi3_tbytesrc.db
+++ b/zynq7/mask_rioi3_tbytesrc.db

@@ -1,7 +1,8 @@
 bit 25_07
-bit 25_16
+bit 25_08
 bit 25_20
 bit 25_21
+bit 25_23
 bit 25_24
 bit 25_31
 bit 25_32
@@ -20,6 +21,7 @@
 bit 25_96
 bit 25_98
 bit 25_99
+bit 25_112
 bit 25_115
 bit 25_116
 bit 25_122

diff --git a/zynq7/mask_rioi3_tbyteterm.db b/zynq7/mask_rioi3_tbyteterm.db
index b6d3cdd..85547f5 100644
--- a/zynq7/mask_rioi3_tbyteterm.db
+++ b/zynq7/mask_rioi3_tbyteterm.db

@@ -1,7 +1,8 @@
 bit 25_07
-bit 25_16
+bit 25_08
 bit 25_20
 bit 25_21
+bit 25_23
 bit 25_24
 bit 25_31
 bit 25_32
@@ -20,6 +21,7 @@
 bit 25_96
 bit 25_98
 bit 25_99
+bit 25_112
 bit 25_115
 bit 25_116
 bit 25_122

diff --git a/zynq7/segbits_cmt_top_l_upper_t.db b/zynq7/segbits_cmt_top_l_upper_t.db
index e50e31c..336e04f 100644
--- a/zynq7/segbits_cmt_top_l_upper_t.db
+++ b/zynq7/segbits_cmt_top_l_upper_t.db

@@ -49,8 +49,6 @@
 CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_MX[1] 29_172
 CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_NO_COUNT[0] 28_171
 CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_RESERVED[0] 29_175
-CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.BUF_IN_OR_EXTERNAL_OR_ZHOLD_CLKIN_BUF 28_44
-CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.INTERNAL 28_43 29_42 29_43
 CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.Z_ZHOLD_OR_CLKIN_BUF 29_03 29_44
 CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_EDGE[0] 29_182
 CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[0] 28_179
@@ -68,7 +66,7 @@
 CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_NO_COUNT[0] 28_182
 CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[0] 28_183
 CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[1] 29_183
-CMT_TOP_L_UPPER_T.PLLE2.IN_USE 28_05 28_10 28_16 28_42 28_46 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_08 29_16 29_45 29_46 29_47 29_236 29_249 29_250 29_251 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
+CMT_TOP_L_UPPER_T.PLLE2.IN_USE 28_05 28_16 28_42 28_46 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_16 29_45 29_46 29_47 29_236 29_249 29_250 29_251 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
 CMT_TOP_L_UPPER_T.PLLE2.INV_CLKINSEL 28_722
 CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[0] 28_200
 CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[1] 29_200

diff --git a/zynq7/segbits_cmt_top_l_upper_t.origin_info.db b/zynq7/segbits_cmt_top_l_upper_t.origin_info.db
index a2748e6..1becc64 100644
--- a/zynq7/segbits_cmt_top_l_upper_t.origin_info.db
+++ b/zynq7/segbits_cmt_top_l_upper_t.origin_info.db

@@ -5,18 +5,18 @@
 CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_L_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !28_43 !29_10 !29_11 !29_42 !29_43 28_11 28_44
 CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_L_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !28_43 !29_11 !29_42 !29_43 28_11 28_44 29_10
 CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_L_UPPER_T_PLLE2_CLK_FB_INT origin:034-cmt-pll-pips !28_11 !28_43 !29_42 !29_43 28_44 29_10 29_11
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_CLKIN1 origin:034-cmt-pll-pips !28_9 !29_9 28_10
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_10 !28_9 !29_9
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_10 !29_9 28_9
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !28_10 !28_9 29_9
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !28_10 28_9 29_9
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_PLLE2_CLK_IN1_INT origin:034-cmt-pll-pips !29_9 28_10 28_9
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_CLKIN2 origin:034-cmt-pll-pips !28_8 !29_7 29_8
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_8 !29_7 !29_8
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_8 !29_8 29_7
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !29_7 !29_8 28_8
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !29_8 28_8 29_7
-CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_PLLE2_CLK_IN2_INT origin:034-cmt-pll-pips !28_8 29_7 29_8
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_CLKIN1 origin:034-cmt-pll-pips !28_09 !29_09 28_10
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_09 !28_10 !29_09
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_10 !29_09 28_09
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !28_09 !28_10 29_09
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !28_10 28_09 29_09
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_PLLE2_CLK_IN1_INT origin:034-cmt-pll-pips !29_09 28_09 28_10
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_CLKIN2 origin:034-cmt-pll-pips !28_08 !29_07 29_08
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_08 !29_07 !29_08
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_08 !29_08 29_07
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !29_07 !29_08 28_08
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !29_08 28_08 29_07
+CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_PLLE2_CLK_IN2_INT origin:034-cmt-pll-pips !28_08 29_07 29_08
 CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT1_HIGH_TIME[0] origin:032-cmt-pll 28_163
 CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT1_HIGH_TIME[1] origin:032-cmt-pll 29_163
 CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT1_HIGH_TIME[2] origin:032-cmt-pll 28_164
@@ -241,8 +241,6 @@
 CMT_TOP_L_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_MX[1] origin:032-cmt-pll 29_60
 CMT_TOP_L_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_NO_COUNT[0] origin:032-cmt-pll 28_59
 CMT_TOP_L_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_RESERVED[0] origin:032-cmt-pll 29_63
-CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.BUF_IN_OR_EXTERNAL_OR_ZHOLD_CLKIN_BUF origin:032-cmt-pll 28_44
-CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.INTERNAL origin:032-cmt-pll 28_43 29_42 29_43
 CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.Z_ZHOLD_OR_CLKIN_BUF origin:032-cmt-pll 29_03 29_44
 CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_EDGE[0] origin:032-cmt-pll 29_182
 CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[0] origin:032-cmt-pll 28_179
@@ -283,7 +281,7 @@
 CMT_TOP_L_UPPER_T.PLLE2.FILTREG2_RESERVED[8] origin:032-cmt-pll 29_638
 CMT_TOP_L_UPPER_T.PLLE2.FILTREG2_RESERVED[9] origin:032-cmt-pll 28_639
 CMT_TOP_L_UPPER_T.PLLE2.INV_CLKINSEL origin:032-cmt-pll 28_722
-CMT_TOP_L_UPPER_T.PLLE2.IN_USE origin:032-cmt-pll 28_05 28_10 28_16 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_42 28_46 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_08 29_16 29_236 29_249 29_250 29_251 29_45 29_46 29_47 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
+CMT_TOP_L_UPPER_T.PLLE2.IN_USE origin:032-cmt-pll 28_05 28_16 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_42 28_46 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_16 29_236 29_249 29_250 29_251 29_45 29_46 29_47 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
 CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[0] origin:032-cmt-pll 28_200
 CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[10] origin:032-cmt-pll 28_208
 CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[11] origin:032-cmt-pll 29_208

diff --git a/zynq7/segbits_cmt_top_r_upper_t.db b/zynq7/segbits_cmt_top_r_upper_t.db
index 480d571..ca6ed42 100644
--- a/zynq7/segbits_cmt_top_r_upper_t.db
+++ b/zynq7/segbits_cmt_top_r_upper_t.db

@@ -30,8 +30,6 @@
 CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_MX[1] 29_172
 CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_NO_COUNT[0] 28_171
 CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_RESERVED[0] 29_175
-CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.BUF_IN_OR_EXTERNAL_OR_ZHOLD_CLKIN_BUF 28_44
-CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.INTERNAL 28_43 29_42 29_43
 CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.Z_ZHOLD_OR_CLKIN_BUF 29_03 29_44
 CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_EDGE[0] 29_182
 CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[0] 28_179
@@ -49,7 +47,7 @@
 CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_NO_COUNT[0] 28_182
 CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[0] 28_183
 CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[1] 29_183
-CMT_TOP_R_UPPER_T.PLLE2.IN_USE 28_05 28_10 28_16 28_42 28_46 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_08 29_16 29_45 29_46 29_47 29_236 29_249 29_250 29_251 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
+CMT_TOP_R_UPPER_T.PLLE2.IN_USE 28_05 28_16 28_42 28_46 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_16 29_45 29_46 29_47 29_236 29_249 29_250 29_251 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
 CMT_TOP_R_UPPER_T.PLLE2.INV_CLKINSEL 28_722
 CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[0] 28_200
 CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[1] 29_200

diff --git a/zynq7/segbits_cmt_top_r_upper_t.origin_info.db b/zynq7/segbits_cmt_top_r_upper_t.origin_info.db
index 98dc615..5d3385f 100644
--- a/zynq7/segbits_cmt_top_r_upper_t.origin_info.db
+++ b/zynq7/segbits_cmt_top_r_upper_t.origin_info.db

@@ -222,8 +222,6 @@
 CMT_TOP_R_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_MX[1] origin:032-cmt-pll 29_60
 CMT_TOP_R_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_NO_COUNT[0] origin:032-cmt-pll 28_59
 CMT_TOP_R_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_RESERVED[0] origin:032-cmt-pll 29_63
-CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.BUF_IN_OR_EXTERNAL_OR_ZHOLD_CLKIN_BUF origin:032-cmt-pll 28_44
-CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.INTERNAL origin:032-cmt-pll 28_43 29_42 29_43
 CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.Z_ZHOLD_OR_CLKIN_BUF origin:032-cmt-pll 29_03 29_44
 CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_EDGE[0] origin:032-cmt-pll 29_182
 CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[0] origin:032-cmt-pll 28_179
@@ -264,7 +262,7 @@
 CMT_TOP_R_UPPER_T.PLLE2.FILTREG2_RESERVED[8] origin:032-cmt-pll 29_638
 CMT_TOP_R_UPPER_T.PLLE2.FILTREG2_RESERVED[9] origin:032-cmt-pll 28_639
 CMT_TOP_R_UPPER_T.PLLE2.INV_CLKINSEL origin:032-cmt-pll 28_722
-CMT_TOP_R_UPPER_T.PLLE2.IN_USE origin:032-cmt-pll 28_05 28_10 28_16 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_42 28_46 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_08 29_16 29_236 29_249 29_250 29_251 29_45 29_46 29_47 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
+CMT_TOP_R_UPPER_T.PLLE2.IN_USE origin:032-cmt-pll 28_05 28_16 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_42 28_46 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_16 29_236 29_249 29_250 29_251 29_45 29_46 29_47 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
 CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[0] origin:032-cmt-pll 28_200
 CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[10] origin:032-cmt-pll 28_208
 CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[11] origin:032-cmt-pll 29_208

diff --git a/zynq7/segbits_int_l.origin_info.db b/zynq7/segbits_int_l.origin_info.db
index f8fc627..33ffc9a 100644
--- a/zynq7/segbits_int_l.origin_info.db
+++ b/zynq7/segbits_int_l.origin_info.db

@@ -172,7 +172,7 @@
 INT_L.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63
 INT_L.BYP_ALT7.ER1END3 origin:050-pip-seed !22_63 16_63 23_63 24_63 25_63
 INT_L.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63
-INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63
+INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:056-pip-rem !22_63 21_63 23_63 24_63 25_63
 INT_L.BYP_ALT7.GFAN1 origin:054-pip-fan-alt !22_63 !23_63 !25_63 20_63 24_63
 INT_L.BYP_ALT7.LOGIC_OUTS_L15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63
 INT_L.BYP_ALT7.LOGIC_OUTS_L21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63
@@ -413,7 +413,7 @@
 INT_L.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
 INT_L.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
 INT_L.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
-INT_L.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
+INT_L.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
 INT_L.EL1BEG0.EE2END1 origin:050-pip-seed 07_20 15_21
 INT_L.EL1BEG0.EE4END1 origin:050-pip-seed 07_20 12_21
 INT_L.EL1BEG0.EL1END1 origin:050-pip-seed 11_21 13_21
@@ -675,10 +675,10 @@
 INT_L.FAN_ALT4.EE2END0 origin:050-pip-seed !22_08 !23_08 !24_08 16_08 25_08
 INT_L.FAN_ALT4.EL1END0 origin:050-pip-seed !22_08 16_08 23_08 24_08 25_08
 INT_L.FAN_ALT4.ER1END0 origin:050-pip-seed !23_08 17_08 22_08 24_08 25_08
-INT_L.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
+INT_L.FAN_ALT4.FAN_BOUNCE2 origin:056-pip-rem !23_08 20_08 22_08 24_08 25_08
 INT_L.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
 INT_L.FAN_ALT4.GFAN0 origin:054-pip-fan-alt !22_08 !23_08 !24_08 21_08 25_08
-INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
+INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:056-pip-rem !22_08 !23_08 !25_08 21_08 24_08
 INT_L.FAN_ALT4.LOGIC_OUTS_L4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
 INT_L.FAN_ALT4.LOGIC_OUTS_L8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
 INT_L.FAN_ALT4.NE2END0 origin:050-pip-seed !22_08 !23_08 !25_08 17_08 24_08
@@ -3255,7 +3255,7 @@
 INT_L.SW6BEG0.WW2END0 origin:050-pip-seed 03_12 05_15
 INT_L.SW6BEG0.WW4END1 origin:050-pip-seed 05_12 05_15
 INT_L.SW6BEG1.EE2END1 origin:050-pip-seed 03_28 04_29
-INT_L.SW6BEG1.EE4END1 origin:050-pip-seed 04_29 05_28
+INT_L.SW6BEG1.EE4END1 origin:056-pip-rem 04_29 05_28
 INT_L.SW6BEG1.LH6 origin:056-pip-rem 05_28 07_29
 INT_L.SW6BEG1.LOGIC_OUTS_L1 origin:050-pip-seed 02_29 04_30
 INT_L.SW6BEG1.LOGIC_OUTS_L13 origin:050-pip-seed 03_28 04_30
@@ -3563,7 +3563,7 @@
 INT_L.WW4BEG0.LOGIC_OUTS_L8 origin:050-pip-seed 03_00 07_01
 INT_L.WW4BEG0.LV_L0 origin:056-pip-rem 04_02 05_00
 INT_L.WW4BEG0.NE2END0 origin:050-pip-seed 02_01 05_03
-INT_L.WW4BEG0.NE6END0 origin:050-pip-seed 05_00 05_03
+INT_L.WW4BEG0.NE6END0 origin:056-pip-rem 05_00 05_03
 INT_L.WW4BEG0.NN2END0 origin:050-pip-seed 03_00 05_03
 INT_L.WW4BEG0.NN6END0 origin:050-pip-seed 05_03 06_00
 INT_L.WW4BEG0.NW2END0 origin:050-pip-seed 02_01 03_01

diff --git a/zynq7/segbits_int_r.origin_info.db b/zynq7/segbits_int_r.origin_info.db
index 0926399..1faa2e2 100644
--- a/zynq7/segbits_int_r.origin_info.db
+++ b/zynq7/segbits_int_r.origin_info.db

@@ -373,7 +373,7 @@
 INT_R.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27
 INT_R.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24
 INT_R.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27
-INT_R.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27
+INT_R.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27
 INT_R.EE4BEG2.EE2END2 origin:050-pip-seed 03_40 03_41
 INT_R.EE4BEG2.EE4END2 origin:050-pip-seed 03_41 05_40
 INT_R.EE4BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_40 07_41
@@ -413,7 +413,7 @@
 INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
 INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
 INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
-INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
+INT_R.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
 INT_R.EL1BEG0.EE2END1 origin:050-pip-seed 07_20 15_21
 INT_R.EL1BEG0.EE4END1 origin:050-pip-seed 07_20 12_21
 INT_R.EL1BEG0.EL1END1 origin:050-pip-seed 11_21 13_21
@@ -3255,7 +3255,7 @@
 INT_R.SW6BEG0.WW2END0 origin:050-pip-seed 03_12 05_15
 INT_R.SW6BEG0.WW4END1 origin:050-pip-seed 05_12 05_15
 INT_R.SW6BEG1.EE2END1 origin:050-pip-seed 03_28 04_29
-INT_R.SW6BEG1.EE4END1 origin:050-pip-seed 04_29 05_28
+INT_R.SW6BEG1.EE4END1 origin:056-pip-rem 04_29 05_28
 INT_R.SW6BEG1.LH6 origin:056-pip-rem 05_28 07_29
 INT_R.SW6BEG1.LOGIC_OUTS1 origin:050-pip-seed 02_29 04_30
 INT_R.SW6BEG1.LOGIC_OUTS13 origin:050-pip-seed 03_28 04_30
@@ -3603,7 +3603,7 @@
 INT_R.WW4BEG2.LVB0 origin:056-pip-rem 04_34 05_32
 INT_R.WW4BEG2.LVB12 origin:056-pip-rem 05_32 07_33
 INT_R.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
-INT_R.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
+INT_R.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
 INT_R.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
 INT_R.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
 INT_R.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
commit	a11a64c2fd2627dea6fe596ab24775519b0e5012	[log] [tgz]
author	Tim 'mithro' Ansell <me@mith.ro>	Sat Nov 16 11:18:44 2019 -0800
committer	Tim 'mithro' Ansell <me@mith.ro>	Sat Nov 16 11:18:44 2019 -0800
tree	dab8bb95be7c800f94edb225113e3402706edfb9
parent	ca781e739d725938cb5a17b8586a5375ca263ca2 [diff]