diff --git a/Info.md b/Info.md
index ed4c78f..e13d29b 100644
--- a/Info.md
+++ b/Info.md
@@ -37,20 +37,20 @@
 
 # Details
 
-Last updated on Sun 23 Feb 2020 06:01:05 AM UTC (2020-02-23T06:01:05+00:00).
+Last updated on Wed 11 Mar 2020 06:08:13 PM UTC (2020-03-11T18:08:13+00:00).
 
-Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [64379fff](https://github.com/SymbiFlow/prjxray/commit/64379fff5638e2da46aa2b50a1cb7bccc24a8ed2).
+Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [2f274142](https://github.com/SymbiFlow/prjxray/commit/2f2741422ef174d62941f381b9e4ed51b3e521cb).
 
 Latest commit was;
 ```
-commit 64379fff5638e2da46aa2b50a1cb7bccc24a8ed2
-Merge: 586acfef 9e21e951
+commit 2f2741422ef174d62941f381b9e4ed51b3e521cb
+Merge: 717a956d 8964ad3b
 Author: litghost <537074+litghost@users.noreply.github.com>
-Date:   Sat Feb 22 09:02:10 2020 -0800
+Date:   Tue Mar 10 07:41:54 2020 -0700
 
-    Merge pull request #1250 from litghost/fix_remap
+    Merge pull request #1268 from litghost/fix_tilegrid
     
-    Fix remap on new 074 code.
+    Convert CLB/CLB_INT tilegrid fuzzer to workaround prohibited locations.
 ```
 
 
@@ -59,7 +59,7 @@
 
 ### Settings
 
-Created using following [settings/artix7.sh (sha256: 51184f624609564b925e9c029ae13326b7163f65679b5c5e13dbd00144df3732)](https://github.com/SymbiFlow/prjxray/blob/64379fff5638e2da46aa2b50a1cb7bccc24a8ed2/settings/artix7.sh)
+Created using following [settings/artix7.sh (sha256: 51184f624609564b925e9c029ae13326b7163f65679b5c5e13dbd00144df3732)](https://github.com/SymbiFlow/prjxray/blob/2f2741422ef174d62941f381b9e4ed51b3e521cb/settings/artix7.sh)
 ```shell
 export XRAY_DATABASE="artix7"
 export XRAY_PART="xc7a50tfgg484-1"
@@ -153,13 +153,13 @@
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./artix7/mask_hclk_r.db`](./artix7/mask_hclk_r.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/mask_hclk_r.origin_info.db`](./artix7/mask_hclk_r.origin_info.db)
  * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6  ./artix7/mask_liob33.db`](./artix7/mask_liob33.db)
- * [`2c1f7fcba20a4545e1fa58318b49a3d22c09ec5383992925eae0800744afbb93  ./artix7/mask_lioi3.db`](./artix7/mask_lioi3.db)
- * [`2c1f7fcba20a4545e1fa58318b49a3d22c09ec5383992925eae0800744afbb93  ./artix7/mask_lioi3_tbytesrc.db`](./artix7/mask_lioi3_tbytesrc.db)
- * [`2c1f7fcba20a4545e1fa58318b49a3d22c09ec5383992925eae0800744afbb93  ./artix7/mask_lioi3_tbyteterm.db`](./artix7/mask_lioi3_tbyteterm.db)
+ * [`8f4f17231c2ce4ff883c2e50f86725ebc625d284fd67e1dc380edef8f9e1a163  ./artix7/mask_lioi3.db`](./artix7/mask_lioi3.db)
+ * [`8f4f17231c2ce4ff883c2e50f86725ebc625d284fd67e1dc380edef8f9e1a163  ./artix7/mask_lioi3_tbytesrc.db`](./artix7/mask_lioi3_tbytesrc.db)
+ * [`8f4f17231c2ce4ff883c2e50f86725ebc625d284fd67e1dc380edef8f9e1a163  ./artix7/mask_lioi3_tbyteterm.db`](./artix7/mask_lioi3_tbyteterm.db)
  * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6  ./artix7/mask_riob33.db`](./artix7/mask_riob33.db)
- * [`2c1f7fcba20a4545e1fa58318b49a3d22c09ec5383992925eae0800744afbb93  ./artix7/mask_rioi3.db`](./artix7/mask_rioi3.db)
- * [`2c1f7fcba20a4545e1fa58318b49a3d22c09ec5383992925eae0800744afbb93  ./artix7/mask_rioi3_tbytesrc.db`](./artix7/mask_rioi3_tbytesrc.db)
- * [`2c1f7fcba20a4545e1fa58318b49a3d22c09ec5383992925eae0800744afbb93  ./artix7/mask_rioi3_tbyteterm.db`](./artix7/mask_rioi3_tbyteterm.db)
+ * [`8f4f17231c2ce4ff883c2e50f86725ebc625d284fd67e1dc380edef8f9e1a163  ./artix7/mask_rioi3.db`](./artix7/mask_rioi3.db)
+ * [`8f4f17231c2ce4ff883c2e50f86725ebc625d284fd67e1dc380edef8f9e1a163  ./artix7/mask_rioi3_tbytesrc.db`](./artix7/mask_rioi3_tbytesrc.db)
+ * [`8f4f17231c2ce4ff883c2e50f86725ebc625d284fd67e1dc380edef8f9e1a163  ./artix7/mask_rioi3_tbyteterm.db`](./artix7/mask_rioi3_tbyteterm.db)
  * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf  ./artix7/ppips_bram_int_interface_l.db`](./artix7/ppips_bram_int_interface_l.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/ppips_bram_int_interface_l.origin_info.db`](./artix7/ppips_bram_int_interface_l.origin_info.db)
  * [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae  ./artix7/ppips_bram_int_interface_r.db`](./artix7/ppips_bram_int_interface_r.db)
@@ -262,9 +262,9 @@
  * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9  ./artix7/segbits_hclk_r.db`](./artix7/segbits_hclk_r.db)
  * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0  ./artix7/segbits_hclk_r.origin_info.db`](./artix7/segbits_hclk_r.origin_info.db)
  * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520  ./artix7/segbits_int_l.db`](./artix7/segbits_int_l.db)
- * [`3381c3961dffe42e31c1f2f3607b4043a7bd28d4ce3f2e6e2903c16a3ee07416  ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db)
+ * [`851e9031af73305cda8b6c94f702e1857aa4fb3bfc47a9c0065f5318c2e7ed03  ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db)
  * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556  ./artix7/segbits_int_r.db`](./artix7/segbits_int_r.db)
- * [`269c2bbc9742169a90681004876c30a3bb97dd20a7683bfd10f45444e1becd02  ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db)
+ * [`4353f1e8c4ca1325b429808e7f1aa0b84677dafe962d8e73074092e7d2d6cada  ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db)
  * [`cb6ad1ff288077f7430c25ac016d00daf3b5c36dca3f8d5367ea52cc6501b51d  ./artix7/segbits_liob33.db`](./artix7/segbits_liob33.db)
  * [`48b1c11e82e86433446051994d90436b1dba054fe41f8fe43bf18b9a468f6b49  ./artix7/segbits_liob33.origin_info.db`](./artix7/segbits_liob33.origin_info.db)
  * [`cf4f6a2b44d13e094f588464a902c315080d2150a522e4241c82ca201a4771e0  ./artix7/segbits_lioi3.db`](./artix7/segbits_lioi3.db)
@@ -507,13 +507,13 @@
  * [`72dd638f5c8f6c36e74765915c01b2fa28e3c28b2c0afd91871ab7b0490a14f3  ./artix7/xc7a200tffg1156-1/package_pins.csv`](./artix7/xc7a200tffg1156-1/package_pins.csv)
  * [`fe44ca57c10c7b804357ded2cdea392c008b7b4d5a82ad917fa3148a756e4e42  ./artix7/xc7a200tffg1156-1/part.json`](./artix7/xc7a200tffg1156-1/part.json)
  * [`a3d493aef436b9978b2ed1c98c4e1364ab9eb096f824e19acd7cce3f7d920e97  ./artix7/xc7a200tffg1156-1/part.yaml`](./artix7/xc7a200tffg1156-1/part.yaml)
- * [`08c3cb4912d57d0f9702f752d48bc8b4ad1c74caccb3dd27413b86bc3cc4c3bd  ./artix7/xc7a200tffg1156-1/tileconn.json`](./artix7/xc7a200tffg1156-1/tileconn.json)
- * [`029f62c6c8cffb64d41aab8bc47743a41f6b4d5889c398a88c22503bf1dda91b  ./artix7/xc7a200tffg1156-1/tilegrid.json`](./artix7/xc7a200tffg1156-1/tilegrid.json)
+ * [`bed4bf8553b0faa4a63964100e6b4a8b5f9ac77dbcac474a2d2cbe7240aa4617  ./artix7/xc7a200tffg1156-1/tileconn.json`](./artix7/xc7a200tffg1156-1/tileconn.json)
+ * [`43881d45249d5df8f6de87fe61588b419d3553ae80ce65af321cc3e543dd8ed0  ./artix7/xc7a200tffg1156-1/tilegrid.json`](./artix7/xc7a200tffg1156-1/tilegrid.json)
  * [`05ee7ad4ee7b7afd4872ab847708778fedbb76f1ebf9d3659fc4c02bd709064a  ./artix7/xc7a200tsbg484-1/package_pins.csv`](./artix7/xc7a200tsbg484-1/package_pins.csv)
  * [`3261e1163801969f3bfa443040729d1b19a7f5f71c96263e582ffdc0e67b3aa4  ./artix7/xc7a200tsbg484-1/part.json`](./artix7/xc7a200tsbg484-1/part.json)
  * [`a3d493aef436b9978b2ed1c98c4e1364ab9eb096f824e19acd7cce3f7d920e97  ./artix7/xc7a200tsbg484-1/part.yaml`](./artix7/xc7a200tsbg484-1/part.yaml)
- * [`08c3cb4912d57d0f9702f752d48bc8b4ad1c74caccb3dd27413b86bc3cc4c3bd  ./artix7/xc7a200tsbg484-1/tileconn.json`](./artix7/xc7a200tsbg484-1/tileconn.json)
- * [`029f62c6c8cffb64d41aab8bc47743a41f6b4d5889c398a88c22503bf1dda91b  ./artix7/xc7a200tsbg484-1/tilegrid.json`](./artix7/xc7a200tsbg484-1/tilegrid.json)
+ * [`bed4bf8553b0faa4a63964100e6b4a8b5f9ac77dbcac474a2d2cbe7240aa4617  ./artix7/xc7a200tsbg484-1/tileconn.json`](./artix7/xc7a200tsbg484-1/tileconn.json)
+ * [`43881d45249d5df8f6de87fe61588b419d3553ae80ce65af321cc3e543dd8ed0  ./artix7/xc7a200tsbg484-1/tilegrid.json`](./artix7/xc7a200tsbg484-1/tilegrid.json)
  * [`89d8d472bad8232a422a5d52f6dec96215269aad78a16281ed7d2f9cc71e3a71  ./artix7/xc7a35tcpg236-1/package_pins.csv`](./artix7/xc7a35tcpg236-1/package_pins.csv)
  * [`be8a8ab158cf85d4135c64a54577412cc1a99833c11ce331a303d90425b673f2  ./artix7/xc7a35tcpg236-1/part.json`](./artix7/xc7a35tcpg236-1/part.json)
  * [`ef0724733da87455426a0f833642d96e9d206d047f4eb97072c3093f80c40d7d  ./artix7/xc7a35tcpg236-1/part.yaml`](./artix7/xc7a35tcpg236-1/part.yaml)
@@ -540,7 +540,7 @@
 
 ### Settings
 
-Created using following [settings/kintex7.sh (sha256: 845b1414faf8d98843ae2886a273625000548289cc8f0d3635c94599d38cdb81)](https://github.com/SymbiFlow/prjxray/blob/64379fff5638e2da46aa2b50a1cb7bccc24a8ed2/settings/kintex7.sh)
+Created using following [settings/kintex7.sh (sha256: 845b1414faf8d98843ae2886a273625000548289cc8f0d3635c94599d38cdb81)](https://github.com/SymbiFlow/prjxray/blob/2f2741422ef174d62941f381b9e4ed51b3e521cb/settings/kintex7.sh)
 ```shell
 export XRAY_DATABASE="kintex7"
 export XRAY_PART="xc7k70tfbg676-2"
@@ -612,13 +612,13 @@
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./kintex7/mask_hclk_r.db`](./kintex7/mask_hclk_r.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./kintex7/mask_hclk_r.origin_info.db`](./kintex7/mask_hclk_r.origin_info.db)
  * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6  ./kintex7/mask_liob33.db`](./kintex7/mask_liob33.db)
- * [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4  ./kintex7/mask_lioi3.db`](./kintex7/mask_lioi3.db)
- * [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4  ./kintex7/mask_lioi3_tbytesrc.db`](./kintex7/mask_lioi3_tbytesrc.db)
- * [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4  ./kintex7/mask_lioi3_tbyteterm.db`](./kintex7/mask_lioi3_tbyteterm.db)
+ * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8  ./kintex7/mask_lioi3.db`](./kintex7/mask_lioi3.db)
+ * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8  ./kintex7/mask_lioi3_tbytesrc.db`](./kintex7/mask_lioi3_tbytesrc.db)
+ * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8  ./kintex7/mask_lioi3_tbyteterm.db`](./kintex7/mask_lioi3_tbyteterm.db)
  * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6  ./kintex7/mask_riob33.db`](./kintex7/mask_riob33.db)
- * [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4  ./kintex7/mask_rioi3.db`](./kintex7/mask_rioi3.db)
- * [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4  ./kintex7/mask_rioi3_tbytesrc.db`](./kintex7/mask_rioi3_tbytesrc.db)
- * [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4  ./kintex7/mask_rioi3_tbyteterm.db`](./kintex7/mask_rioi3_tbyteterm.db)
+ * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8  ./kintex7/mask_rioi3.db`](./kintex7/mask_rioi3.db)
+ * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8  ./kintex7/mask_rioi3_tbytesrc.db`](./kintex7/mask_rioi3_tbytesrc.db)
+ * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8  ./kintex7/mask_rioi3_tbyteterm.db`](./kintex7/mask_rioi3_tbyteterm.db)
  * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf  ./kintex7/ppips_bram_int_interface_l.db`](./kintex7/ppips_bram_int_interface_l.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./kintex7/ppips_bram_int_interface_l.origin_info.db`](./kintex7/ppips_bram_int_interface_l.origin_info.db)
  * [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae  ./kintex7/ppips_bram_int_interface_r.db`](./kintex7/ppips_bram_int_interface_r.db)
@@ -717,9 +717,9 @@
  * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9  ./kintex7/segbits_hclk_r.db`](./kintex7/segbits_hclk_r.db)
  * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0  ./kintex7/segbits_hclk_r.origin_info.db`](./kintex7/segbits_hclk_r.origin_info.db)
  * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520  ./kintex7/segbits_int_l.db`](./kintex7/segbits_int_l.db)
- * [`d7619b1d57cb11a1dda3cdc91f54795a5952d1432f137fb14e3f3cbcac148d17  ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db)
+ * [`59a4194efa018abc07b9068b19d2e180cba12d7e4d708eaf26bec3500322d0f3  ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db)
  * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556  ./kintex7/segbits_int_r.db`](./kintex7/segbits_int_r.db)
- * [`5aed4ef9daf29424041f171748a83360e154f6abd438f5919af8e0451e48c586  ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db)
+ * [`ebec703e15dc0bf1d308d4abf336e3114b8d3e031fbecd69bcd5a11c52ddad88  ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db)
  * [`cb6ad1ff288077f7430c25ac016d00daf3b5c36dca3f8d5367ea52cc6501b51d  ./kintex7/segbits_liob33.db`](./kintex7/segbits_liob33.db)
  * [`48b1c11e82e86433446051994d90436b1dba054fe41f8fe43bf18b9a468f6b49  ./kintex7/segbits_liob33.origin_info.db`](./kintex7/segbits_liob33.origin_info.db)
  * [`87adc9bb57b446e57722145e6461085763a5f0e690558e96c2581ea623b36071  ./kintex7/segbits_lioi3.db`](./kintex7/segbits_lioi3.db)
@@ -912,7 +912,7 @@
 
 ### Settings
 
-Created using following [settings/zynq7.sh (sha256: b2055ef65885124f2f229a181100b6b73852464aa260b38691a4d84aa351475b)](https://github.com/SymbiFlow/prjxray/blob/64379fff5638e2da46aa2b50a1cb7bccc24a8ed2/settings/zynq7.sh)
+Created using following [settings/zynq7.sh (sha256: b2055ef65885124f2f229a181100b6b73852464aa260b38691a4d84aa351475b)](https://github.com/SymbiFlow/prjxray/blob/2f2741422ef174d62941f381b9e4ed51b3e521cb/settings/zynq7.sh)
 ```shell
 export XRAY_DATABASE="zynq7"
 export XRAY_PART="xc7z020clg484-1"
diff --git a/artix7/mask_lioi3.db b/artix7/mask_lioi3.db
index 5da257f..158fa77 100644
--- a/artix7/mask_lioi3.db
+++ b/artix7/mask_lioi3.db
@@ -3,11 +3,11 @@
 bit 25_20
 bit 25_21
 bit 25_23
+bit 25_24
 bit 25_31
 bit 25_32
 bit 25_34
 bit 25_35
-bit 25_39
 bit 25_47
 bit 25_48
 bit 25_51
diff --git a/artix7/mask_lioi3_tbytesrc.db b/artix7/mask_lioi3_tbytesrc.db
index 5da257f..158fa77 100644
--- a/artix7/mask_lioi3_tbytesrc.db
+++ b/artix7/mask_lioi3_tbytesrc.db
@@ -3,11 +3,11 @@
 bit 25_20
 bit 25_21
 bit 25_23
+bit 25_24
 bit 25_31
 bit 25_32
 bit 25_34
 bit 25_35
-bit 25_39
 bit 25_47
 bit 25_48
 bit 25_51
diff --git a/artix7/mask_lioi3_tbyteterm.db b/artix7/mask_lioi3_tbyteterm.db
index 5da257f..158fa77 100644
--- a/artix7/mask_lioi3_tbyteterm.db
+++ b/artix7/mask_lioi3_tbyteterm.db
@@ -3,11 +3,11 @@
 bit 25_20
 bit 25_21
 bit 25_23
+bit 25_24
 bit 25_31
 bit 25_32
 bit 25_34
 bit 25_35
-bit 25_39
 bit 25_47
 bit 25_48
 bit 25_51
diff --git a/artix7/mask_rioi3.db b/artix7/mask_rioi3.db
index 5da257f..158fa77 100644
--- a/artix7/mask_rioi3.db
+++ b/artix7/mask_rioi3.db
@@ -3,11 +3,11 @@
 bit 25_20
 bit 25_21
 bit 25_23
+bit 25_24
 bit 25_31
 bit 25_32
 bit 25_34
 bit 25_35
-bit 25_39
 bit 25_47
 bit 25_48
 bit 25_51
diff --git a/artix7/mask_rioi3_tbytesrc.db b/artix7/mask_rioi3_tbytesrc.db
index 5da257f..158fa77 100644
--- a/artix7/mask_rioi3_tbytesrc.db
+++ b/artix7/mask_rioi3_tbytesrc.db
@@ -3,11 +3,11 @@
 bit 25_20
 bit 25_21
 bit 25_23
+bit 25_24
 bit 25_31
 bit 25_32
 bit 25_34
 bit 25_35
-bit 25_39
 bit 25_47
 bit 25_48
 bit 25_51
diff --git a/artix7/mask_rioi3_tbyteterm.db b/artix7/mask_rioi3_tbyteterm.db
index 5da257f..158fa77 100644
--- a/artix7/mask_rioi3_tbyteterm.db
+++ b/artix7/mask_rioi3_tbyteterm.db
@@ -3,11 +3,11 @@
 bit 25_20
 bit 25_21
 bit 25_23
+bit 25_24
 bit 25_31
 bit 25_32
 bit 25_34
 bit 25_35
-bit 25_39
 bit 25_47
 bit 25_48
 bit 25_51
diff --git a/artix7/segbits_int_l.origin_info.db b/artix7/segbits_int_l.origin_info.db
index 77f38a0..915152f 100644
--- a/artix7/segbits_int_l.origin_info.db
+++ b/artix7/segbits_int_l.origin_info.db
@@ -170,7 +170,7 @@
 INT_L.BYP_ALT7.BYP_BOUNCE6 origin:050-pip-seed !22_63 !23_63 !25_63 21_63 24_63
 INT_L.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63
 INT_L.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63
-INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63
+INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:056-pip-rem !22_63 21_63 23_63 24_63 25_63
 INT_L.BYP_ALT7.LOGIC_OUTS_L3 origin:051-pip-imuxlout-bypalts !22_63 20_63 23_63 24_63 25_63
 INT_L.BYP_ALT7.LOGIC_OUTS_L15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63
 INT_L.BYP_ALT7.LOGIC_OUTS_L21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63
@@ -301,7 +301,7 @@
 INT_L.FAN_ALT0.FAN_BOUNCE6 origin:050-pip-seed !23_00 20_00 22_00 24_00 25_00
 INT_L.FAN_ALT0.LOGIC_OUTS_L0 origin:050-pip-seed !23_00 21_00 22_00 24_00 25_00
 INT_L.FAN_ALT0.LOGIC_OUTS_L12 origin:050-pip-seed !22_00 21_00 23_00 24_00 25_00
-INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:050-pip-seed !22_00 !23_00 !25_00 21_00 24_00
+INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:056-pip-rem !22_00 !23_00 !25_00 21_00 24_00
 INT_L.FAN_ALT0.SR1END_N3_3 origin:050-pip-seed !23_00 19_01 22_00 24_00 25_00
 INT_L.FAN_ALT0.SS2END_N0_3 origin:050-pip-seed !22_00 !23_00 !24_00 17_00 25_00
 INT_L.FAN_ALT0.SW2END_N0_3 origin:050-pip-seed !22_00 !23_00 !25_00 17_00 24_00
@@ -396,7 +396,7 @@
 INT_L.FAN_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_08 20_08 23_08 24_08 25_08
 INT_L.FAN_ALT4.LOGIC_OUTS_L4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
 INT_L.FAN_ALT4.LOGIC_OUTS_L8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
-INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
+INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:056-pip-rem !22_08 !23_08 !25_08 21_08 24_08
 INT_L.FAN_ALT4.SR1BEG_S0 origin:050-pip-seed !23_08 19_09 22_08 24_08 25_08
 INT_L.FAN_ALT4.EE2END0 origin:050-pip-seed !22_08 !23_08 !24_08 16_08 25_08
 INT_L.FAN_ALT4.EL1END0 origin:050-pip-seed !22_08 16_08 23_08 24_08 25_08
@@ -1897,7 +1897,7 @@
 INT_L.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27
 INT_L.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24
 INT_L.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27
-INT_L.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27
+INT_L.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27
 INT_L.EE4BEG2.LOGIC_OUTS_L2 origin:050-pip-seed 02_41 04_42
 INT_L.EE4BEG2.LOGIC_OUTS_L6 origin:050-pip-seed 02_41 07_41
 INT_L.EE4BEG2.LOGIC_OUTS_L10 origin:050-pip-seed 03_40 07_41
@@ -2253,7 +2253,7 @@
 INT_L.NE6BEG2.SE2END2 origin:050-pip-seed 02_37 05_39
 INT_L.NE6BEG2.SE6END2 origin:050-pip-seed 05_39 06_36
 INT_L.NE6BEG2.WW2END1 origin:050-pip-seed 03_36 04_37
-INT_L.NE6BEG2.WW4END2 origin:050-pip-seed 04_37 05_36
+INT_L.NE6BEG2.WW4END2 origin:056-pip-rem 04_37 05_36
 INT_L.NE6BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 02_53 04_54
 INT_L.NE6BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_53 07_53
 INT_L.NE6BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_52 07_53
@@ -2662,7 +2662,7 @@
 INT_L.NW6BEG0.LOGIC_OUTS_L22 origin:050-pip-seed 06_02 07_03
 INT_L.NW6BEG0.LV_L0 origin:056-pip-rem 04_03 06_02
 INT_L.NW6BEG0.SS2END_N0_3 origin:050-pip-seed 02_03 04_00
-INT_L.NW6BEG0.SS6END_N0_3 origin:056-pip-rem 04_00 07_03
+INT_L.NW6BEG0.SS6END_N0_3 origin:050-pip-seed 04_00 07_03
 INT_L.NW6BEG0.SW2END_N0_3 origin:050-pip-seed 03_02 04_00
 INT_L.NW6BEG0.SW6END_N0_3 origin:050-pip-seed 04_00 04_03
 INT_L.NW6BEG0.WW2END_N0_3 origin:050-pip-seed 02_02 02_03
@@ -2887,7 +2887,7 @@
 INT_L.SE6BEG3.NE2END3 origin:050-pip-seed 03_58 04_56
 INT_L.SE6BEG3.NE6END3 origin:050-pip-seed 04_56 04_59
 INT_L.SE6BEG3.NN2END3 origin:050-pip-seed 02_59 04_56
-INT_L.SE6BEG3.NN6END3 origin:056-pip-rem 04_56 07_59
+INT_L.SE6BEG3.NN6END3 origin:050-pip-seed 04_56 07_59
 INT_L.SE6BEG3.SE2END3 origin:050-pip-seed 02_58 03_58
 INT_L.SE6BEG3.SE6END3 origin:050-pip-seed 02_58 07_59
 INT_L.SE6BEG3.SS2END3 origin:050-pip-seed 02_59 05_58
diff --git a/artix7/segbits_int_r.origin_info.db b/artix7/segbits_int_r.origin_info.db
index a7f2cb1..1994f24 100644
--- a/artix7/segbits_int_r.origin_info.db
+++ b/artix7/segbits_int_r.origin_info.db
@@ -332,7 +332,7 @@
 INT_R.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
 INT_R.FAN_ALT4.LOGIC_OUTS4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
 INT_R.FAN_ALT4.LOGIC_OUTS8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
-INT_R.FAN_ALT4.LOGIC_OUTS18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
+INT_R.FAN_ALT4.LOGIC_OUTS18 origin:056-pip-rem !22_08 !23_08 !25_08 21_08 24_08
 INT_R.FAN_ALT4.SR1BEG_S0 origin:050-pip-seed !23_08 19_09 22_08 24_08 25_08
 INT_R.FAN_ALT4.EE2END0 origin:050-pip-seed !22_08 !23_08 !24_08 16_08 25_08
 INT_R.FAN_ALT4.EL1END0 origin:050-pip-seed !22_08 16_08 23_08 24_08 25_08
@@ -685,7 +685,7 @@
 INT_R.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27
 INT_R.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24
 INT_R.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27
-INT_R.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27
+INT_R.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27
 INT_R.EE4BEG2.LOGIC_OUTS2 origin:050-pip-seed 02_41 04_42
 INT_R.EE4BEG2.LOGIC_OUTS6 origin:050-pip-seed 02_41 07_41
 INT_R.EE4BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_40 07_41
@@ -2253,7 +2253,7 @@
 INT_R.NE6BEG2.SE2END2 origin:050-pip-seed 02_37 05_39
 INT_R.NE6BEG2.SE6END2 origin:050-pip-seed 05_39 06_36
 INT_R.NE6BEG2.WW2END1 origin:050-pip-seed 03_36 04_37
-INT_R.NE6BEG2.WW4END2 origin:056-pip-rem 04_37 05_36
+INT_R.NE6BEG2.WW4END2 origin:050-pip-seed 04_37 05_36
 INT_R.NE6BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_53 04_54
 INT_R.NE6BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_53 07_53
 INT_R.NE6BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_52 07_53
@@ -2491,7 +2491,7 @@
 INT_R.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52
 INT_R.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55
 INT_R.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54
-INT_R.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55
+INT_R.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55
 INT_R.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52
 INT_R.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55
 INT_R.NR1BEG0.LOGIC_OUTS0 origin:050-pip-seed 11_07 14_07
diff --git a/artix7/xc7a200tffg1156-1/tileconn.json b/artix7/xc7a200tffg1156-1/tileconn.json
index 1b39d4e..8c40e7c 100644
--- a/artix7/xc7a200tffg1156-1/tileconn.json
+++ b/artix7/xc7a200tffg1156-1/tileconn.json
@@ -101265,6 +101265,514 @@
     },
     {
         "grid_deltas": [
+            -1,
+            0
+        ],
+        "tile_types": [
+            "CLBLL_L",
+            "GTP_INT_INT_TERM_L"
+        ],
+        "wire_pairs": [
+            [
+                "CLBLL_EE2A0",
+                "L_TERM_INT_WW2A0"
+            ],
+            [
+                "CLBLL_EE2A1",
+                "L_TERM_INT_WW2A1"
+            ],
+            [
+                "CLBLL_EE2A2",
+                "L_TERM_INT_WW2A2"
+            ],
+            [
+                "CLBLL_EE2A3",
+                "L_TERM_INT_WW2A3"
+            ],
+            [
+                "CLBLL_EE2BEG0",
+                "L_TERM_INT_WW2BEG0"
+            ],
+            [
+                "CLBLL_EE2BEG1",
+                "L_TERM_INT_WW2BEG1"
+            ],
+            [
+                "CLBLL_EE2BEG2",
+                "L_TERM_INT_WW2BEG2"
+            ],
+            [
+                "CLBLL_EE2BEG3",
+                "L_TERM_INT_WW2BEG3"
+            ],
+            [
+                "CLBLL_EE4A0",
+                "L_TERM_INT_WW4A0"
+            ],
+            [
+                "CLBLL_EE4A1",
+                "L_TERM_INT_WW4A1"
+            ],
+            [
+                "CLBLL_EE4A2",
+                "L_TERM_INT_WW4A2"
+            ],
+            [
+                "CLBLL_EE4A3",
+                "L_TERM_INT_WW4A3"
+            ],
+            [
+                "CLBLL_EE4B0",
+                "L_TERM_INT_WW4B0"
+            ],
+            [
+                "CLBLL_EE4B1",
+                "L_TERM_INT_WW4B1"
+            ],
+            [
+                "CLBLL_EE4B2",
+                "L_TERM_INT_WW4B2"
+            ],
+            [
+                "CLBLL_EE4B3",
+                "L_TERM_INT_WW4B3"
+            ],
+            [
+                "CLBLL_EE4BEG0",
+                "L_TERM_INT_WW4BEG0"
+            ],
+            [
+                "CLBLL_EE4BEG1",
+                "L_TERM_INT_WW4BEG1"
+            ],
+            [
+                "CLBLL_EE4BEG2",
+                "L_TERM_INT_WW4BEG2"
+            ],
+            [
+                "CLBLL_EE4BEG3",
+                "L_TERM_INT_WW4BEG3"
+            ],
+            [
+                "CLBLL_EE4C0",
+                "L_TERM_INT_WW4C0"
+            ],
+            [
+                "CLBLL_EE4C1",
+                "L_TERM_INT_WW4C1"
+            ],
+            [
+                "CLBLL_EE4C2",
+                "L_TERM_INT_WW4C2"
+            ],
+            [
+                "CLBLL_EE4C3",
+                "L_TERM_INT_WW4C3"
+            ],
+            [
+                "CLBLL_EL1BEG0",
+                "L_TERM_INT_WL1BEG0"
+            ],
+            [
+                "CLBLL_EL1BEG1",
+                "L_TERM_INT_WL1BEG1"
+            ],
+            [
+                "CLBLL_EL1BEG2",
+                "L_TERM_INT_WL1BEG2"
+            ],
+            [
+                "CLBLL_EL1BEG3",
+                "L_TERM_INT_WR1BEG2"
+            ],
+            [
+                "CLBLL_ER1BEG0",
+                "L_TERM_INT_WR1BEG0"
+            ],
+            [
+                "CLBLL_ER1BEG1",
+                "L_TERM_INT_WR1BEG1"
+            ],
+            [
+                "CLBLL_ER1BEG2",
+                "L_TERM_INT_WR1BEG3"
+            ],
+            [
+                "CLBLL_ER1BEG3",
+                "L_TERM_INT_WL1BEG3"
+            ],
+            [
+                "CLBLL_LH1",
+                "L_TERM_INT_LH0"
+            ],
+            [
+                "CLBLL_LH2",
+                "L_TERM_INT_LH1"
+            ],
+            [
+                "CLBLL_LH3",
+                "L_TERM_INT_LH2"
+            ],
+            [
+                "CLBLL_LH4",
+                "L_TERM_INT_LH3"
+            ],
+            [
+                "CLBLL_LH5",
+                "L_TERM_INT_LH4"
+            ],
+            [
+                "CLBLL_LH6",
+                "L_TERM_INT_LH5"
+            ],
+            [
+                "CLBLL_LH7",
+                "L_TERM_INT_LH5"
+            ],
+            [
+                "CLBLL_LH8",
+                "L_TERM_INT_LH4"
+            ],
+            [
+                "CLBLL_LH9",
+                "L_TERM_INT_LH3"
+            ],
+            [
+                "CLBLL_LH10",
+                "L_TERM_INT_LH2"
+            ],
+            [
+                "CLBLL_LH11",
+                "L_TERM_INT_LH1"
+            ],
+            [
+                "CLBLL_LH12",
+                "L_TERM_INT_LH0"
+            ],
+            [
+                "CLBLL_NE2A0",
+                "L_TERM_INT_NW2BEG0"
+            ],
+            [
+                "CLBLL_NE2A1",
+                "L_TERM_INT_NW2BEG1"
+            ],
+            [
+                "CLBLL_NE2A2",
+                "L_TERM_INT_NW2BEG2"
+            ],
+            [
+                "CLBLL_NE2A3",
+                "L_TERM_INT_NW2BEG3"
+            ],
+            [
+                "CLBLL_NE4BEG0",
+                "L_TERM_INT_NW4BEG0"
+            ],
+            [
+                "CLBLL_NE4BEG1",
+                "L_TERM_INT_NW4BEG1"
+            ],
+            [
+                "CLBLL_NE4BEG2",
+                "L_TERM_INT_NW4BEG2"
+            ],
+            [
+                "CLBLL_NE4BEG3",
+                "L_TERM_INT_NW4BEG3"
+            ],
+            [
+                "CLBLL_NE4C0",
+                "L_TERM_INT_NW4C0"
+            ],
+            [
+                "CLBLL_NE4C1",
+                "L_TERM_INT_NW4C1"
+            ],
+            [
+                "CLBLL_NE4C2",
+                "L_TERM_INT_NW4C2"
+            ],
+            [
+                "CLBLL_NE4C3",
+                "L_TERM_INT_NW4C3"
+            ],
+            [
+                "CLBLL_NW2A0",
+                "L_TERM_INT_NW2BEG0"
+            ],
+            [
+                "CLBLL_NW2A1",
+                "L_TERM_INT_NW2BEG1"
+            ],
+            [
+                "CLBLL_NW2A2",
+                "L_TERM_INT_NW2BEG2"
+            ],
+            [
+                "CLBLL_NW2A3",
+                "L_TERM_INT_NW2BEG3"
+            ],
+            [
+                "CLBLL_NW4A0",
+                "L_TERM_INT_NW4BEG0"
+            ],
+            [
+                "CLBLL_NW4A1",
+                "L_TERM_INT_NW4BEG1"
+            ],
+            [
+                "CLBLL_NW4A2",
+                "L_TERM_INT_NW4BEG2"
+            ],
+            [
+                "CLBLL_NW4A3",
+                "L_TERM_INT_NW4BEG3"
+            ],
+            [
+                "CLBLL_NW4END0",
+                "L_TERM_INT_NW4C0"
+            ],
+            [
+                "CLBLL_NW4END1",
+                "L_TERM_INT_NW4C1"
+            ],
+            [
+                "CLBLL_NW4END2",
+                "L_TERM_INT_NW4C2"
+            ],
+            [
+                "CLBLL_NW4END3",
+                "L_TERM_INT_NW4C3"
+            ],
+            [
+                "CLBLL_SE2A0",
+                "L_TERM_INT_SW2BEG0"
+            ],
+            [
+                "CLBLL_SE2A1",
+                "L_TERM_INT_SW2BEG1"
+            ],
+            [
+                "CLBLL_SE2A2",
+                "L_TERM_INT_SW2BEG2"
+            ],
+            [
+                "CLBLL_SE2A3",
+                "L_TERM_INT_SW2BEG3"
+            ],
+            [
+                "CLBLL_SE4BEG0",
+                "L_TERM_INT_SW4BEG0"
+            ],
+            [
+                "CLBLL_SE4BEG1",
+                "L_TERM_INT_SW4BEG1"
+            ],
+            [
+                "CLBLL_SE4BEG2",
+                "L_TERM_INT_SW4BEG2"
+            ],
+            [
+                "CLBLL_SE4BEG3",
+                "L_TERM_INT_SW4BEG3"
+            ],
+            [
+                "CLBLL_SE4C0",
+                "L_TERM_INT_SW4C0"
+            ],
+            [
+                "CLBLL_SE4C1",
+                "L_TERM_INT_SW4C1"
+            ],
+            [
+                "CLBLL_SE4C2",
+                "L_TERM_INT_SW4C2"
+            ],
+            [
+                "CLBLL_SE4C3",
+                "L_TERM_INT_SW4C3"
+            ],
+            [
+                "CLBLL_SW2A0",
+                "L_TERM_INT_SW2BEG0"
+            ],
+            [
+                "CLBLL_SW2A1",
+                "L_TERM_INT_SW2BEG1"
+            ],
+            [
+                "CLBLL_SW2A2",
+                "L_TERM_INT_SW2BEG2"
+            ],
+            [
+                "CLBLL_SW2A3",
+                "L_TERM_INT_SW2BEG3"
+            ],
+            [
+                "CLBLL_SW4A0",
+                "L_TERM_INT_SW4BEG0"
+            ],
+            [
+                "CLBLL_SW4A1",
+                "L_TERM_INT_SW4BEG1"
+            ],
+            [
+                "CLBLL_SW4A2",
+                "L_TERM_INT_SW4BEG2"
+            ],
+            [
+                "CLBLL_SW4A3",
+                "L_TERM_INT_SW4BEG3"
+            ],
+            [
+                "CLBLL_SW4END0",
+                "L_TERM_INT_SW4C0"
+            ],
+            [
+                "CLBLL_SW4END1",
+                "L_TERM_INT_SW4C1"
+            ],
+            [
+                "CLBLL_SW4END2",
+                "L_TERM_INT_SW4C2"
+            ],
+            [
+                "CLBLL_SW4END3",
+                "L_TERM_INT_SW4C3"
+            ],
+            [
+                "CLBLL_WL1END0",
+                "L_TERM_INT_WL1BEG0"
+            ],
+            [
+                "CLBLL_WL1END1",
+                "L_TERM_INT_WL1BEG1"
+            ],
+            [
+                "CLBLL_WL1END2",
+                "L_TERM_INT_WL1BEG2"
+            ],
+            [
+                "CLBLL_WL1END3",
+                "L_TERM_INT_WR1BEG2"
+            ],
+            [
+                "CLBLL_WR1END0",
+                "L_TERM_INT_WR1BEG0"
+            ],
+            [
+                "CLBLL_WR1END1",
+                "L_TERM_INT_WR1BEG1"
+            ],
+            [
+                "CLBLL_WR1END2",
+                "L_TERM_INT_WR1BEG3"
+            ],
+            [
+                "CLBLL_WR1END3",
+                "L_TERM_INT_WL1BEG3"
+            ],
+            [
+                "CLBLL_WW2A0",
+                "L_TERM_INT_WW2BEG0"
+            ],
+            [
+                "CLBLL_WW2A1",
+                "L_TERM_INT_WW2BEG1"
+            ],
+            [
+                "CLBLL_WW2A2",
+                "L_TERM_INT_WW2BEG2"
+            ],
+            [
+                "CLBLL_WW2A3",
+                "L_TERM_INT_WW2BEG3"
+            ],
+            [
+                "CLBLL_WW2END0",
+                "L_TERM_INT_WW2A0"
+            ],
+            [
+                "CLBLL_WW2END1",
+                "L_TERM_INT_WW2A1"
+            ],
+            [
+                "CLBLL_WW2END2",
+                "L_TERM_INT_WW2A2"
+            ],
+            [
+                "CLBLL_WW2END3",
+                "L_TERM_INT_WW2A3"
+            ],
+            [
+                "CLBLL_WW4A0",
+                "L_TERM_INT_WW4BEG0"
+            ],
+            [
+                "CLBLL_WW4A1",
+                "L_TERM_INT_WW4BEG1"
+            ],
+            [
+                "CLBLL_WW4A2",
+                "L_TERM_INT_WW4BEG2"
+            ],
+            [
+                "CLBLL_WW4A3",
+                "L_TERM_INT_WW4BEG3"
+            ],
+            [
+                "CLBLL_WW4B0",
+                "L_TERM_INT_WW4A0"
+            ],
+            [
+                "CLBLL_WW4B1",
+                "L_TERM_INT_WW4A1"
+            ],
+            [
+                "CLBLL_WW4B2",
+                "L_TERM_INT_WW4A2"
+            ],
+            [
+                "CLBLL_WW4B3",
+                "L_TERM_INT_WW4A3"
+            ],
+            [
+                "CLBLL_WW4C0",
+                "L_TERM_INT_WW4B0"
+            ],
+            [
+                "CLBLL_WW4C1",
+                "L_TERM_INT_WW4B1"
+            ],
+            [
+                "CLBLL_WW4C2",
+                "L_TERM_INT_WW4B2"
+            ],
+            [
+                "CLBLL_WW4C3",
+                "L_TERM_INT_WW4B3"
+            ],
+            [
+                "CLBLL_WW4END0",
+                "L_TERM_INT_WW4C0"
+            ],
+            [
+                "CLBLL_WW4END1",
+                "L_TERM_INT_WW4C1"
+            ],
+            [
+                "CLBLL_WW4END2",
+                "L_TERM_INT_WW4C2"
+            ],
+            [
+                "CLBLL_WW4END3",
+                "L_TERM_INT_WW4C3"
+            ]
+        ]
+    },
+    {
+        "grid_deltas": [
             0,
             -1
         ],
@@ -382822,6 +383330,54 @@
         ],
         "wire_pairs": [
             [
+                "R_TERM_INT_LH0",
+                "VBRK_LH1"
+            ],
+            [
+                "R_TERM_INT_LH0",
+                "VBRK_LH12"
+            ],
+            [
+                "R_TERM_INT_LH1",
+                "VBRK_LH2"
+            ],
+            [
+                "R_TERM_INT_LH1",
+                "VBRK_LH11"
+            ],
+            [
+                "R_TERM_INT_LH2",
+                "VBRK_LH3"
+            ],
+            [
+                "R_TERM_INT_LH2",
+                "VBRK_LH10"
+            ],
+            [
+                "R_TERM_INT_LH3",
+                "VBRK_LH4"
+            ],
+            [
+                "R_TERM_INT_LH3",
+                "VBRK_LH9"
+            ],
+            [
+                "R_TERM_INT_LH4",
+                "VBRK_LH5"
+            ],
+            [
+                "R_TERM_INT_LH4",
+                "VBRK_LH8"
+            ],
+            [
+                "R_TERM_INT_LH5",
+                "VBRK_LH6"
+            ],
+            [
+                "R_TERM_INT_LH5",
+                "VBRK_LH7"
+            ],
+            [
                 "R_TERM_INT_NW2A0",
                 "VBRK_NE2A0"
             ],
@@ -383140,6 +383696,134 @@
             [
                 "R_TERM_INT_WW2END3",
                 "VBRK_WW2END3"
+            ],
+            [
+                "R_TERM_INT_WW4A0",
+                "VBRK_EE4BEG0"
+            ],
+            [
+                "R_TERM_INT_WW4A0",
+                "VBRK_WW4A0"
+            ],
+            [
+                "R_TERM_INT_WW4A1",
+                "VBRK_EE4BEG1"
+            ],
+            [
+                "R_TERM_INT_WW4A1",
+                "VBRK_WW4A1"
+            ],
+            [
+                "R_TERM_INT_WW4A2",
+                "VBRK_EE4BEG2"
+            ],
+            [
+                "R_TERM_INT_WW4A2",
+                "VBRK_WW4A2"
+            ],
+            [
+                "R_TERM_INT_WW4A3",
+                "VBRK_EE4BEG3"
+            ],
+            [
+                "R_TERM_INT_WW4A3",
+                "VBRK_WW4A3"
+            ],
+            [
+                "R_TERM_INT_WW4B0",
+                "VBRK_EE4A0"
+            ],
+            [
+                "R_TERM_INT_WW4B0",
+                "VBRK_WW4B0"
+            ],
+            [
+                "R_TERM_INT_WW4B1",
+                "VBRK_EE4A1"
+            ],
+            [
+                "R_TERM_INT_WW4B1",
+                "VBRK_WW4B1"
+            ],
+            [
+                "R_TERM_INT_WW4B2",
+                "VBRK_EE4A2"
+            ],
+            [
+                "R_TERM_INT_WW4B2",
+                "VBRK_WW4B2"
+            ],
+            [
+                "R_TERM_INT_WW4B3",
+                "VBRK_EE4A3"
+            ],
+            [
+                "R_TERM_INT_WW4B3",
+                "VBRK_WW4B3"
+            ],
+            [
+                "R_TERM_INT_WW4C0",
+                "VBRK_EE4B0"
+            ],
+            [
+                "R_TERM_INT_WW4C0",
+                "VBRK_WW4C0"
+            ],
+            [
+                "R_TERM_INT_WW4C1",
+                "VBRK_EE4B1"
+            ],
+            [
+                "R_TERM_INT_WW4C1",
+                "VBRK_WW4C1"
+            ],
+            [
+                "R_TERM_INT_WW4C2",
+                "VBRK_EE4B2"
+            ],
+            [
+                "R_TERM_INT_WW4C2",
+                "VBRK_WW4C2"
+            ],
+            [
+                "R_TERM_INT_WW4C3",
+                "VBRK_EE4B3"
+            ],
+            [
+                "R_TERM_INT_WW4C3",
+                "VBRK_WW4C3"
+            ],
+            [
+                "R_TERM_INT_WW4END0",
+                "VBRK_EE4C0"
+            ],
+            [
+                "R_TERM_INT_WW4END0",
+                "VBRK_WW4END0"
+            ],
+            [
+                "R_TERM_INT_WW4END1",
+                "VBRK_EE4C1"
+            ],
+            [
+                "R_TERM_INT_WW4END1",
+                "VBRK_WW4END1"
+            ],
+            [
+                "R_TERM_INT_WW4END2",
+                "VBRK_EE4C2"
+            ],
+            [
+                "R_TERM_INT_WW4END2",
+                "VBRK_WW4END2"
+            ],
+            [
+                "R_TERM_INT_WW4END3",
+                "VBRK_EE4C3"
+            ],
+            [
+                "R_TERM_INT_WW4END3",
+                "VBRK_WW4END3"
             ]
         ]
     },
diff --git a/artix7/xc7a200tffg1156-1/tilegrid.json b/artix7/xc7a200tffg1156-1/tilegrid.json
index 3dc223d..21a5fd7 100644
--- a/artix7/xc7a200tffg1156-1/tilegrid.json
+++ b/artix7/xc7a200tffg1156-1/tilegrid.json
@@ -66323,454 +66323,954 @@
         "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y0": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 259,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y0": "SLICEL",
+            "SLICE_X83Y0": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y1": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 258,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y1": "SLICEL",
+            "SLICE_X83Y1": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y2": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 257,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y2": "SLICEL",
+            "SLICE_X83Y2": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y3": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 256,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y3": "SLICEL",
+            "SLICE_X83Y3": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y4": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 255,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y4": "SLICEL",
+            "SLICE_X83Y4": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y5": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 254,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y5": "SLICEL",
+            "SLICE_X83Y5": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y6": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 253,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y6": "SLICEL",
+            "SLICE_X83Y6": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y7": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 252,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y7": "SLICEL",
+            "SLICE_X83Y7": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y8": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 251,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y8": "SLICEL",
+            "SLICE_X83Y8": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y9": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 250,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y9": "SLICEL",
+            "SLICE_X83Y9": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y10": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 249,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y10": "SLICEL",
+            "SLICE_X83Y10": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y11": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 248,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y11": "SLICEL",
+            "SLICE_X83Y11": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y12": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 247,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y12": "SLICEL",
+            "SLICE_X83Y12": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y13": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 246,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y13": "SLICEL",
+            "SLICE_X83Y13": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y14": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 245,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y14": "SLICEL",
+            "SLICE_X83Y14": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y15": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 244,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y15": "SLICEL",
+            "SLICE_X83Y15": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y16": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 243,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y16": "SLICEL",
+            "SLICE_X83Y16": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y17": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 242,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y17": "SLICEL",
+            "SLICE_X83Y17": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y18": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 241,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y18": "SLICEL",
+            "SLICE_X83Y18": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y19": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 240,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y19": "SLICEL",
+            "SLICE_X83Y19": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y20": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 239,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y20": "SLICEL",
+            "SLICE_X83Y20": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y21": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 238,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y21": "SLICEL",
+            "SLICE_X83Y21": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y22": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
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         "clock_region": "X0Y0",
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         "pin_functions": {},
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         "clock_region": "X0Y0",
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         "grid_y": 235,
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-        "type": "NULL"
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     "CLBLL_L_X54Y25": {
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         "clock_region": "X0Y0",
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         "grid_y": 233,
         "pin_functions": {},
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-        "type": "NULL"
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+            "SLICE_X83Y25": "SLICEL"
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     },
     "CLBLL_L_X54Y26": {
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+                "offset": 53,
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         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 232,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
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+            "SLICE_X83Y26": "SLICEL"
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     },
     "CLBLL_L_X54Y27": {
-        "bits": {},
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         "clock_region": "X0Y0",
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         "grid_y": 231,
         "pin_functions": {},
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-        "type": "NULL"
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     "CLBLL_L_X54Y28": {
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         "clock_region": "X0Y0",
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         "pin_functions": {},
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-        "type": "NULL"
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+            "SLICE_X83Y28": "SLICEL"
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     },
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         "clock_region": "X0Y0",
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         "pin_functions": {},
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-        "type": "NULL"
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+            "SLICE_X83Y29": "SLICEL"
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     "CLBLL_L_X54Y30": {
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         "clock_region": "X0Y0",
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         "grid_y": 228,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
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+            "SLICE_X83Y30": "SLICEL"
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     "CLBLL_L_X54Y31": {
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+                "baseaddr": "0x00441B00",
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+                "offset": 63,
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         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 227,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
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+            "SLICE_X83Y31": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y32": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
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+                "offset": 65,
+                "words": 2
+            }
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         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 226,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y32": "SLICEL",
+            "SLICE_X83Y32": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y33": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
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         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 225,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y33": "SLICEL",
+            "SLICE_X83Y33": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y34": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
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+                "offset": 69,
+                "words": 2
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         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 224,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
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+            "SLICE_X83Y34": "SLICEL"
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     },
     "CLBLL_L_X54Y35": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
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+                "frames": 36,
+                "offset": 71,
+                "words": 2
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         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 223,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
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+            "SLICE_X83Y35": "SLICEL"
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+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y36": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 73,
+                "words": 2
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         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 222,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y36": "SLICEL",
+            "SLICE_X83Y36": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y37": {
-        "bits": {},
+        "bits": {
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+                "frames": 36,
+                "offset": 75,
+                "words": 2
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         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 221,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y37": "SLICEL",
+            "SLICE_X83Y37": "SLICEL"
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+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y38": {
-        "bits": {},
+        "bits": {
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+                "frames": 36,
+                "offset": 77,
+                "words": 2
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         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 220,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y38": "SLICEL",
+            "SLICE_X83Y38": "SLICEL"
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+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y39": {
-        "bits": {},
+        "bits": {
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+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 79,
+                "words": 2
+            }
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         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 219,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y39": "SLICEL",
+            "SLICE_X83Y39": "SLICEL"
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+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y40": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 81,
+                "words": 2
+            }
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         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 218,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y40": "SLICEL",
+            "SLICE_X83Y40": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y41": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 83,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 217,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y41": "SLICEL",
+            "SLICE_X83Y41": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y42": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 85,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 216,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y42": "SLICEL",
+            "SLICE_X83Y42": "SLICEL"
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     },
     "CLBLL_L_X54Y43": {
-        "bits": {},
+        "bits": {
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+                "offset": 87,
+                "words": 2
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         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 215,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
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+            "SLICE_X83Y43": "SLICEL"
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     },
     "CLBLL_L_X54Y44": {
-        "bits": {},
+        "bits": {
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+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 89,
+                "words": 2
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         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 214,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y44": "SLICEL",
+            "SLICE_X83Y44": "SLICEL"
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     },
     "CLBLL_L_X54Y45": {
-        "bits": {},
+        "bits": {
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+                "offset": 91,
+                "words": 2
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         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 213,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y45": "SLICEL",
+            "SLICE_X83Y45": "SLICEL"
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+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y46": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 93,
+                "words": 2
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         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 212,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y46": "SLICEL",
+            "SLICE_X83Y46": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y47": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 95,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 211,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y47": "SLICEL",
+            "SLICE_X83Y47": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y48": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 97,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 210,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y48": "SLICEL",
+            "SLICE_X83Y48": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y49": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 99,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 209,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y49": "SLICEL",
+            "SLICE_X83Y49": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y50": {
         "bits": {
@@ -69623,454 +70123,954 @@
         "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y200": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 0,
+                "words": 2
+            }
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         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 51,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y200": "SLICEL",
+            "SLICE_X83Y200": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y201": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 50,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y201": "SLICEL",
+            "SLICE_X83Y201": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y202": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 49,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y202": "SLICEL",
+            "SLICE_X83Y202": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y203": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 6,
+                "words": 2
+            }
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         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 48,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y203": "SLICEL",
+            "SLICE_X83Y203": "SLICEL"
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+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y204": {
-        "bits": {},
+        "bits": {
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+                "offset": 8,
+                "words": 2
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         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 47,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
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+            "SLICE_X83Y204": "SLICEL"
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     },
     "CLBLL_L_X54Y205": {
-        "bits": {},
+        "bits": {
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+                "offset": 10,
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         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 46,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
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+            "SLICE_X83Y205": "SLICEL"
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     },
     "CLBLL_L_X54Y206": {
-        "bits": {},
+        "bits": {
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+                "offset": 12,
+                "words": 2
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         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 45,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
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+            "SLICE_X83Y206": "SLICEL"
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     },
     "CLBLL_L_X54Y207": {
-        "bits": {},
+        "bits": {
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+                "offset": 14,
+                "words": 2
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         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 44,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
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+            "SLICE_X83Y207": "SLICEL"
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+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y208": {
-        "bits": {},
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+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 6,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y244": "SLICEL",
+            "SLICE_X83Y244": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y245": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 91,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 5,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y245": "SLICEL",
+            "SLICE_X83Y245": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y246": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 93,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 4,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y246": "SLICEL",
+            "SLICE_X83Y246": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y247": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 95,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 3,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y247": "SLICEL",
+            "SLICE_X83Y247": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y248": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 97,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 2,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y248": "SLICEL",
+            "SLICE_X83Y248": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y249": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 99,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 1,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y249": "SLICEL",
+            "SLICE_X83Y249": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X100Y0": {
         "bits": {
@@ -370343,7 +371343,14 @@
         "type": "HCLK_L"
     },
     "HCLK_L_X136Y26": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 26,
+                "offset": 50,
+                "words": 1
+            }
+        },
         "grid_x": 136,
         "grid_y": 234,
         "pin_functions": {},
@@ -370396,7 +371403,14 @@
         "type": "HCLK_L"
     },
     "HCLK_L_X136Y234": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 26,
+                "offset": 50,
+                "words": 1
+            }
+        },
         "grid_x": 136,
         "grid_y": 26,
         "pin_functions": {},
@@ -373679,7 +374693,14 @@
         "type": "HCLK_R"
     },
     "HCLK_R_X137Y26": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 26,
+                "offset": 50,
+                "words": 1
+            }
+        },
         "grid_x": 137,
         "grid_y": 234,
         "pin_functions": {},
@@ -373732,7 +374753,14 @@
         "type": "HCLK_R"
     },
     "HCLK_R_X137Y234": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 26,
+                "offset": 50,
+                "words": 1
+            }
+        },
         "grid_x": 137,
         "grid_y": 26,
         "pin_functions": {},
@@ -507507,7 +508535,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y0": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 259,
@@ -507518,7 +508553,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y1": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 258,
@@ -507529,7 +508571,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y2": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 257,
@@ -507540,7 +508589,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y3": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 256,
@@ -507551,7 +508607,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y4": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 255,
@@ -507562,7 +508625,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y5": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 254,
@@ -507573,7 +508643,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y6": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 253,
@@ -507584,7 +508661,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y7": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 252,
@@ -507595,7 +508679,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y8": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 251,
@@ -507606,7 +508697,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y9": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 250,
@@ -507617,7 +508715,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y10": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 249,
@@ -507628,7 +508733,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y11": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 248,
@@ -507639,7 +508751,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y12": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 247,
@@ -507650,7 +508769,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y13": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 246,
@@ -507661,7 +508787,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y14": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 245,
@@ -507672,7 +508805,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y15": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 244,
@@ -507683,7 +508823,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y16": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 243,
@@ -507694,7 +508841,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y17": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 242,
@@ -507705,7 +508859,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y18": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 241,
@@ -507716,7 +508877,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y19": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 240,
@@ -507727,7 +508895,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y20": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 239,
@@ -507738,7 +508913,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y21": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 238,
@@ -507749,7 +508931,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y22": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 237,
@@ -507760,7 +508949,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y23": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 236,
@@ -507771,7 +508967,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y24": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 235,
@@ -507782,7 +508985,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y25": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 51,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 233,
@@ -507793,7 +509003,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y26": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 53,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 232,
@@ -507804,7 +509021,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y27": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 55,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 231,
@@ -507815,7 +509039,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y28": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 57,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 230,
@@ -507826,7 +509057,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y29": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 59,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 229,
@@ -507837,7 +509075,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y30": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 61,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 228,
@@ -507848,7 +509093,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y31": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 63,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 227,
@@ -507859,7 +509111,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y32": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 65,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 226,
@@ -507870,7 +509129,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y33": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 67,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 225,
@@ -507881,7 +509147,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y34": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 69,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 224,
@@ -507892,7 +509165,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y35": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 71,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 223,
@@ -507903,7 +509183,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y36": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 73,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 222,
@@ -507914,7 +509201,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y37": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 75,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 221,
@@ -507925,7 +509219,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y38": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 77,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 220,
@@ -507936,7 +509237,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y39": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 79,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 219,
@@ -507947,7 +509255,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y40": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 81,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 218,
@@ -507958,7 +509273,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y41": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 83,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 217,
@@ -507969,7 +509291,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y42": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 85,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 216,
@@ -507980,7 +509309,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y43": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 87,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 215,
@@ -507991,7 +509327,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y44": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 89,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 214,
@@ -508002,7 +509345,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y45": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 91,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 213,
@@ -508013,7 +509363,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y46": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 93,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 212,
@@ -508024,7 +509381,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y47": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 95,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 211,
@@ -508035,7 +509399,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y48": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 97,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 210,
@@ -508046,7 +509417,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y49": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 99,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 209,
@@ -510757,7 +512135,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y200": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 51,
@@ -510768,7 +512153,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y201": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 50,
@@ -510779,7 +512171,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y202": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 49,
@@ -510790,7 +512189,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y203": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 48,
@@ -510801,7 +512207,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y204": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 47,
@@ -510812,7 +512225,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y205": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 46,
@@ -510823,7 +512243,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y206": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 45,
@@ -510834,7 +512261,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y207": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 44,
@@ -510845,7 +512279,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y208": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 43,
@@ -510856,7 +512297,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y209": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 42,
@@ -510867,7 +512315,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y210": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 41,
@@ -510878,7 +512333,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y211": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 40,
@@ -510889,7 +512351,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y212": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 39,
@@ -510900,7 +512369,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y213": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 38,
@@ -510911,7 +512387,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y214": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 37,
@@ -510922,7 +512405,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y215": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 36,
@@ -510933,7 +512423,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y216": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 35,
@@ -510944,7 +512441,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y217": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 34,
@@ -510955,7 +512459,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y218": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 33,
@@ -510966,7 +512477,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y219": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 32,
@@ -510977,7 +512495,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y220": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 31,
@@ -510988,7 +512513,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y221": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 30,
@@ -510999,7 +512531,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y222": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 29,
@@ -511010,7 +512549,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y223": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 28,
@@ -511021,7 +512567,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y224": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 27,
@@ -511032,7 +512585,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y225": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 51,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 25,
@@ -511043,7 +512603,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y226": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 53,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 24,
@@ -511054,7 +512621,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y227": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 55,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 23,
@@ -511065,7 +512639,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y228": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 57,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 22,
@@ -511076,7 +512657,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y229": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 59,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 21,
@@ -511087,7 +512675,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y230": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 61,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 20,
@@ -511098,7 +512693,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y231": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 63,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 19,
@@ -511109,7 +512711,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y232": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 65,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 18,
@@ -511120,7 +512729,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y233": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 67,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 17,
@@ -511131,7 +512747,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y234": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 69,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 16,
@@ -511142,7 +512765,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y235": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 71,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 15,
@@ -511153,7 +512783,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y236": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 73,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 14,
@@ -511164,7 +512801,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y237": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 75,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 13,
@@ -511175,7 +512819,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y238": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 77,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 12,
@@ -511186,7 +512837,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y239": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 79,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 11,
@@ -511197,7 +512855,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y240": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 81,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 10,
@@ -511208,7 +512873,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y241": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 83,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 9,
@@ -511219,7 +512891,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y242": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 85,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 8,
@@ -511230,7 +512909,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y243": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 87,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 7,
@@ -511241,7 +512927,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y244": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 89,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 6,
@@ -511252,7 +512945,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y245": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 91,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 5,
@@ -511263,7 +512963,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y246": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 93,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 4,
@@ -511274,7 +512981,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y247": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 95,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 3,
@@ -511285,7 +512999,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y248": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 97,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 2,
@@ -511296,7 +513017,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y249": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 99,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 1,
@@ -707057,7 +708785,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y0": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 259,
@@ -707068,7 +708803,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y1": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 258,
@@ -707079,7 +708821,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y2": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 257,
@@ -707090,7 +708839,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y3": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 256,
@@ -707101,7 +708857,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y4": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 255,
@@ -707112,7 +708875,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y5": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 254,
@@ -707123,7 +708893,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y6": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 253,
@@ -707134,7 +708911,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y7": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 252,
@@ -707145,7 +708929,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y8": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 251,
@@ -707156,7 +708947,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y9": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 250,
@@ -707167,7 +708965,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y10": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 249,
@@ -707178,7 +708983,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y11": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 248,
@@ -707189,7 +709001,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y12": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 247,
@@ -707200,7 +709019,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y13": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 246,
@@ -707211,7 +709037,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y14": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 245,
@@ -707222,7 +709055,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y15": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 244,
@@ -707233,7 +709073,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y16": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 243,
@@ -707244,7 +709091,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y17": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 242,
@@ -707255,7 +709109,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y18": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 241,
@@ -707266,7 +709127,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y19": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 240,
@@ -707277,7 +709145,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y20": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 239,
@@ -707288,7 +709163,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y21": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 238,
@@ -707299,7 +709181,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y22": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 237,
@@ -707310,7 +709199,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y23": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 236,
@@ -707321,7 +709217,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y24": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 235,
@@ -707332,7 +709235,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y25": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 51,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 233,
@@ -707343,7 +709253,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y26": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 53,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 232,
@@ -707354,7 +709271,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y27": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 55,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 231,
@@ -707365,7 +709289,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y28": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 57,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 230,
@@ -707376,7 +709307,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y29": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 59,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 229,
@@ -707387,7 +709325,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y30": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 61,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 228,
@@ -707398,7 +709343,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y31": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 63,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 227,
@@ -707409,7 +709361,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y32": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 65,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 226,
@@ -707420,7 +709379,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y33": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 67,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 225,
@@ -707431,7 +709397,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y34": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 69,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 224,
@@ -707442,7 +709415,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y35": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 71,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 223,
@@ -707453,7 +709433,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y36": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 73,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 222,
@@ -707464,7 +709451,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y37": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 75,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 221,
@@ -707475,7 +709469,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y38": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 77,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 220,
@@ -707486,7 +709487,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y39": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 79,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 219,
@@ -707497,7 +709505,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y40": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 81,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 218,
@@ -707508,7 +709523,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y41": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 83,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 217,
@@ -707519,7 +709541,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y42": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 85,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 216,
@@ -707530,7 +709559,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y43": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 87,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 215,
@@ -707541,7 +709577,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y44": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 89,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 214,
@@ -707552,7 +709595,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y45": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 91,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 213,
@@ -707563,7 +709613,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y46": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 93,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 212,
@@ -707574,7 +709631,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y47": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 95,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 211,
@@ -707585,7 +709649,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y48": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 97,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 210,
@@ -707596,7 +709667,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y49": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 99,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 209,
@@ -710307,7 +712385,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y200": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 51,
@@ -710318,7 +712403,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y201": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 50,
@@ -710329,7 +712421,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y202": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 49,
@@ -710340,7 +712439,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y203": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 48,
@@ -710351,7 +712457,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y204": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 47,
@@ -710362,7 +712475,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y205": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 46,
@@ -710373,7 +712493,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y206": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 45,
@@ -710384,7 +712511,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y207": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 44,
@@ -710395,7 +712529,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y208": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 43,
@@ -710406,7 +712547,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y209": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 42,
@@ -710417,7 +712565,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y210": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 41,
@@ -710428,7 +712583,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y211": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 40,
@@ -710439,7 +712601,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y212": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 39,
@@ -710450,7 +712619,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y213": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 38,
@@ -710461,7 +712637,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y214": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 37,
@@ -710472,7 +712655,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y215": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 36,
@@ -710483,7 +712673,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y216": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 35,
@@ -710494,7 +712691,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y217": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 34,
@@ -710505,7 +712709,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y218": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 33,
@@ -710516,7 +712727,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y219": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 32,
@@ -710527,7 +712745,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y220": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 31,
@@ -710538,7 +712763,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y221": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 30,
@@ -710549,7 +712781,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y222": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 29,
@@ -710560,7 +712799,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y223": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 28,
@@ -710571,7 +712817,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y224": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 27,
@@ -710582,7 +712835,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y225": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 51,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 25,
@@ -710593,7 +712853,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y226": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 53,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 24,
@@ -710604,7 +712871,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y227": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 55,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 23,
@@ -710615,7 +712889,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y228": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 57,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 22,
@@ -710626,7 +712907,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y229": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 59,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 21,
@@ -710637,7 +712925,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y230": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 61,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 20,
@@ -710648,7 +712943,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y231": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 63,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 19,
@@ -710659,7 +712961,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y232": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 65,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 18,
@@ -710670,7 +712979,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y233": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 67,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 17,
@@ -710681,7 +712997,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y234": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 69,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 16,
@@ -710692,7 +713015,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y235": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 71,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 15,
@@ -710703,7 +713033,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y236": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 73,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 14,
@@ -710714,7 +713051,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y237": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 75,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 13,
@@ -710725,7 +713069,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y238": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 77,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 12,
@@ -710736,7 +713087,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y239": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 79,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 11,
@@ -710747,7 +713105,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y240": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 81,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 10,
@@ -710758,7 +713123,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y241": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 83,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 9,
@@ -710769,7 +713141,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y242": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 85,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 8,
@@ -710780,7 +713159,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y243": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 87,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 7,
@@ -710791,7 +713177,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y244": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 89,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 6,
@@ -710802,7 +713195,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y245": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 91,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 5,
@@ -710813,7 +713213,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y246": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 93,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 4,
@@ -710824,7 +713231,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y247": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 95,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 3,
@@ -710835,7 +713249,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y248": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 97,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 2,
@@ -710846,7 +713267,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y249": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 99,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 1,
diff --git a/artix7/xc7a200tsbg484-1/tileconn.json b/artix7/xc7a200tsbg484-1/tileconn.json
index 1b39d4e..8c40e7c 100644
--- a/artix7/xc7a200tsbg484-1/tileconn.json
+++ b/artix7/xc7a200tsbg484-1/tileconn.json
@@ -101265,6 +101265,514 @@
     },
     {
         "grid_deltas": [
+            -1,
+            0
+        ],
+        "tile_types": [
+            "CLBLL_L",
+            "GTP_INT_INT_TERM_L"
+        ],
+        "wire_pairs": [
+            [
+                "CLBLL_EE2A0",
+                "L_TERM_INT_WW2A0"
+            ],
+            [
+                "CLBLL_EE2A1",
+                "L_TERM_INT_WW2A1"
+            ],
+            [
+                "CLBLL_EE2A2",
+                "L_TERM_INT_WW2A2"
+            ],
+            [
+                "CLBLL_EE2A3",
+                "L_TERM_INT_WW2A3"
+            ],
+            [
+                "CLBLL_EE2BEG0",
+                "L_TERM_INT_WW2BEG0"
+            ],
+            [
+                "CLBLL_EE2BEG1",
+                "L_TERM_INT_WW2BEG1"
+            ],
+            [
+                "CLBLL_EE2BEG2",
+                "L_TERM_INT_WW2BEG2"
+            ],
+            [
+                "CLBLL_EE2BEG3",
+                "L_TERM_INT_WW2BEG3"
+            ],
+            [
+                "CLBLL_EE4A0",
+                "L_TERM_INT_WW4A0"
+            ],
+            [
+                "CLBLL_EE4A1",
+                "L_TERM_INT_WW4A1"
+            ],
+            [
+                "CLBLL_EE4A2",
+                "L_TERM_INT_WW4A2"
+            ],
+            [
+                "CLBLL_EE4A3",
+                "L_TERM_INT_WW4A3"
+            ],
+            [
+                "CLBLL_EE4B0",
+                "L_TERM_INT_WW4B0"
+            ],
+            [
+                "CLBLL_EE4B1",
+                "L_TERM_INT_WW4B1"
+            ],
+            [
+                "CLBLL_EE4B2",
+                "L_TERM_INT_WW4B2"
+            ],
+            [
+                "CLBLL_EE4B3",
+                "L_TERM_INT_WW4B3"
+            ],
+            [
+                "CLBLL_EE4BEG0",
+                "L_TERM_INT_WW4BEG0"
+            ],
+            [
+                "CLBLL_EE4BEG1",
+                "L_TERM_INT_WW4BEG1"
+            ],
+            [
+                "CLBLL_EE4BEG2",
+                "L_TERM_INT_WW4BEG2"
+            ],
+            [
+                "CLBLL_EE4BEG3",
+                "L_TERM_INT_WW4BEG3"
+            ],
+            [
+                "CLBLL_EE4C0",
+                "L_TERM_INT_WW4C0"
+            ],
+            [
+                "CLBLL_EE4C1",
+                "L_TERM_INT_WW4C1"
+            ],
+            [
+                "CLBLL_EE4C2",
+                "L_TERM_INT_WW4C2"
+            ],
+            [
+                "CLBLL_EE4C3",
+                "L_TERM_INT_WW4C3"
+            ],
+            [
+                "CLBLL_EL1BEG0",
+                "L_TERM_INT_WL1BEG0"
+            ],
+            [
+                "CLBLL_EL1BEG1",
+                "L_TERM_INT_WL1BEG1"
+            ],
+            [
+                "CLBLL_EL1BEG2",
+                "L_TERM_INT_WL1BEG2"
+            ],
+            [
+                "CLBLL_EL1BEG3",
+                "L_TERM_INT_WR1BEG2"
+            ],
+            [
+                "CLBLL_ER1BEG0",
+                "L_TERM_INT_WR1BEG0"
+            ],
+            [
+                "CLBLL_ER1BEG1",
+                "L_TERM_INT_WR1BEG1"
+            ],
+            [
+                "CLBLL_ER1BEG2",
+                "L_TERM_INT_WR1BEG3"
+            ],
+            [
+                "CLBLL_ER1BEG3",
+                "L_TERM_INT_WL1BEG3"
+            ],
+            [
+                "CLBLL_LH1",
+                "L_TERM_INT_LH0"
+            ],
+            [
+                "CLBLL_LH2",
+                "L_TERM_INT_LH1"
+            ],
+            [
+                "CLBLL_LH3",
+                "L_TERM_INT_LH2"
+            ],
+            [
+                "CLBLL_LH4",
+                "L_TERM_INT_LH3"
+            ],
+            [
+                "CLBLL_LH5",
+                "L_TERM_INT_LH4"
+            ],
+            [
+                "CLBLL_LH6",
+                "L_TERM_INT_LH5"
+            ],
+            [
+                "CLBLL_LH7",
+                "L_TERM_INT_LH5"
+            ],
+            [
+                "CLBLL_LH8",
+                "L_TERM_INT_LH4"
+            ],
+            [
+                "CLBLL_LH9",
+                "L_TERM_INT_LH3"
+            ],
+            [
+                "CLBLL_LH10",
+                "L_TERM_INT_LH2"
+            ],
+            [
+                "CLBLL_LH11",
+                "L_TERM_INT_LH1"
+            ],
+            [
+                "CLBLL_LH12",
+                "L_TERM_INT_LH0"
+            ],
+            [
+                "CLBLL_NE2A0",
+                "L_TERM_INT_NW2BEG0"
+            ],
+            [
+                "CLBLL_NE2A1",
+                "L_TERM_INT_NW2BEG1"
+            ],
+            [
+                "CLBLL_NE2A2",
+                "L_TERM_INT_NW2BEG2"
+            ],
+            [
+                "CLBLL_NE2A3",
+                "L_TERM_INT_NW2BEG3"
+            ],
+            [
+                "CLBLL_NE4BEG0",
+                "L_TERM_INT_NW4BEG0"
+            ],
+            [
+                "CLBLL_NE4BEG1",
+                "L_TERM_INT_NW4BEG1"
+            ],
+            [
+                "CLBLL_NE4BEG2",
+                "L_TERM_INT_NW4BEG2"
+            ],
+            [
+                "CLBLL_NE4BEG3",
+                "L_TERM_INT_NW4BEG3"
+            ],
+            [
+                "CLBLL_NE4C0",
+                "L_TERM_INT_NW4C0"
+            ],
+            [
+                "CLBLL_NE4C1",
+                "L_TERM_INT_NW4C1"
+            ],
+            [
+                "CLBLL_NE4C2",
+                "L_TERM_INT_NW4C2"
+            ],
+            [
+                "CLBLL_NE4C3",
+                "L_TERM_INT_NW4C3"
+            ],
+            [
+                "CLBLL_NW2A0",
+                "L_TERM_INT_NW2BEG0"
+            ],
+            [
+                "CLBLL_NW2A1",
+                "L_TERM_INT_NW2BEG1"
+            ],
+            [
+                "CLBLL_NW2A2",
+                "L_TERM_INT_NW2BEG2"
+            ],
+            [
+                "CLBLL_NW2A3",
+                "L_TERM_INT_NW2BEG3"
+            ],
+            [
+                "CLBLL_NW4A0",
+                "L_TERM_INT_NW4BEG0"
+            ],
+            [
+                "CLBLL_NW4A1",
+                "L_TERM_INT_NW4BEG1"
+            ],
+            [
+                "CLBLL_NW4A2",
+                "L_TERM_INT_NW4BEG2"
+            ],
+            [
+                "CLBLL_NW4A3",
+                "L_TERM_INT_NW4BEG3"
+            ],
+            [
+                "CLBLL_NW4END0",
+                "L_TERM_INT_NW4C0"
+            ],
+            [
+                "CLBLL_NW4END1",
+                "L_TERM_INT_NW4C1"
+            ],
+            [
+                "CLBLL_NW4END2",
+                "L_TERM_INT_NW4C2"
+            ],
+            [
+                "CLBLL_NW4END3",
+                "L_TERM_INT_NW4C3"
+            ],
+            [
+                "CLBLL_SE2A0",
+                "L_TERM_INT_SW2BEG0"
+            ],
+            [
+                "CLBLL_SE2A1",
+                "L_TERM_INT_SW2BEG1"
+            ],
+            [
+                "CLBLL_SE2A2",
+                "L_TERM_INT_SW2BEG2"
+            ],
+            [
+                "CLBLL_SE2A3",
+                "L_TERM_INT_SW2BEG3"
+            ],
+            [
+                "CLBLL_SE4BEG0",
+                "L_TERM_INT_SW4BEG0"
+            ],
+            [
+                "CLBLL_SE4BEG1",
+                "L_TERM_INT_SW4BEG1"
+            ],
+            [
+                "CLBLL_SE4BEG2",
+                "L_TERM_INT_SW4BEG2"
+            ],
+            [
+                "CLBLL_SE4BEG3",
+                "L_TERM_INT_SW4BEG3"
+            ],
+            [
+                "CLBLL_SE4C0",
+                "L_TERM_INT_SW4C0"
+            ],
+            [
+                "CLBLL_SE4C1",
+                "L_TERM_INT_SW4C1"
+            ],
+            [
+                "CLBLL_SE4C2",
+                "L_TERM_INT_SW4C2"
+            ],
+            [
+                "CLBLL_SE4C3",
+                "L_TERM_INT_SW4C3"
+            ],
+            [
+                "CLBLL_SW2A0",
+                "L_TERM_INT_SW2BEG0"
+            ],
+            [
+                "CLBLL_SW2A1",
+                "L_TERM_INT_SW2BEG1"
+            ],
+            [
+                "CLBLL_SW2A2",
+                "L_TERM_INT_SW2BEG2"
+            ],
+            [
+                "CLBLL_SW2A3",
+                "L_TERM_INT_SW2BEG3"
+            ],
+            [
+                "CLBLL_SW4A0",
+                "L_TERM_INT_SW4BEG0"
+            ],
+            [
+                "CLBLL_SW4A1",
+                "L_TERM_INT_SW4BEG1"
+            ],
+            [
+                "CLBLL_SW4A2",
+                "L_TERM_INT_SW4BEG2"
+            ],
+            [
+                "CLBLL_SW4A3",
+                "L_TERM_INT_SW4BEG3"
+            ],
+            [
+                "CLBLL_SW4END0",
+                "L_TERM_INT_SW4C0"
+            ],
+            [
+                "CLBLL_SW4END1",
+                "L_TERM_INT_SW4C1"
+            ],
+            [
+                "CLBLL_SW4END2",
+                "L_TERM_INT_SW4C2"
+            ],
+            [
+                "CLBLL_SW4END3",
+                "L_TERM_INT_SW4C3"
+            ],
+            [
+                "CLBLL_WL1END0",
+                "L_TERM_INT_WL1BEG0"
+            ],
+            [
+                "CLBLL_WL1END1",
+                "L_TERM_INT_WL1BEG1"
+            ],
+            [
+                "CLBLL_WL1END2",
+                "L_TERM_INT_WL1BEG2"
+            ],
+            [
+                "CLBLL_WL1END3",
+                "L_TERM_INT_WR1BEG2"
+            ],
+            [
+                "CLBLL_WR1END0",
+                "L_TERM_INT_WR1BEG0"
+            ],
+            [
+                "CLBLL_WR1END1",
+                "L_TERM_INT_WR1BEG1"
+            ],
+            [
+                "CLBLL_WR1END2",
+                "L_TERM_INT_WR1BEG3"
+            ],
+            [
+                "CLBLL_WR1END3",
+                "L_TERM_INT_WL1BEG3"
+            ],
+            [
+                "CLBLL_WW2A0",
+                "L_TERM_INT_WW2BEG0"
+            ],
+            [
+                "CLBLL_WW2A1",
+                "L_TERM_INT_WW2BEG1"
+            ],
+            [
+                "CLBLL_WW2A2",
+                "L_TERM_INT_WW2BEG2"
+            ],
+            [
+                "CLBLL_WW2A3",
+                "L_TERM_INT_WW2BEG3"
+            ],
+            [
+                "CLBLL_WW2END0",
+                "L_TERM_INT_WW2A0"
+            ],
+            [
+                "CLBLL_WW2END1",
+                "L_TERM_INT_WW2A1"
+            ],
+            [
+                "CLBLL_WW2END2",
+                "L_TERM_INT_WW2A2"
+            ],
+            [
+                "CLBLL_WW2END3",
+                "L_TERM_INT_WW2A3"
+            ],
+            [
+                "CLBLL_WW4A0",
+                "L_TERM_INT_WW4BEG0"
+            ],
+            [
+                "CLBLL_WW4A1",
+                "L_TERM_INT_WW4BEG1"
+            ],
+            [
+                "CLBLL_WW4A2",
+                "L_TERM_INT_WW4BEG2"
+            ],
+            [
+                "CLBLL_WW4A3",
+                "L_TERM_INT_WW4BEG3"
+            ],
+            [
+                "CLBLL_WW4B0",
+                "L_TERM_INT_WW4A0"
+            ],
+            [
+                "CLBLL_WW4B1",
+                "L_TERM_INT_WW4A1"
+            ],
+            [
+                "CLBLL_WW4B2",
+                "L_TERM_INT_WW4A2"
+            ],
+            [
+                "CLBLL_WW4B3",
+                "L_TERM_INT_WW4A3"
+            ],
+            [
+                "CLBLL_WW4C0",
+                "L_TERM_INT_WW4B0"
+            ],
+            [
+                "CLBLL_WW4C1",
+                "L_TERM_INT_WW4B1"
+            ],
+            [
+                "CLBLL_WW4C2",
+                "L_TERM_INT_WW4B2"
+            ],
+            [
+                "CLBLL_WW4C3",
+                "L_TERM_INT_WW4B3"
+            ],
+            [
+                "CLBLL_WW4END0",
+                "L_TERM_INT_WW4C0"
+            ],
+            [
+                "CLBLL_WW4END1",
+                "L_TERM_INT_WW4C1"
+            ],
+            [
+                "CLBLL_WW4END2",
+                "L_TERM_INT_WW4C2"
+            ],
+            [
+                "CLBLL_WW4END3",
+                "L_TERM_INT_WW4C3"
+            ]
+        ]
+    },
+    {
+        "grid_deltas": [
             0,
             -1
         ],
@@ -382822,6 +383330,54 @@
         ],
         "wire_pairs": [
             [
+                "R_TERM_INT_LH0",
+                "VBRK_LH1"
+            ],
+            [
+                "R_TERM_INT_LH0",
+                "VBRK_LH12"
+            ],
+            [
+                "R_TERM_INT_LH1",
+                "VBRK_LH2"
+            ],
+            [
+                "R_TERM_INT_LH1",
+                "VBRK_LH11"
+            ],
+            [
+                "R_TERM_INT_LH2",
+                "VBRK_LH3"
+            ],
+            [
+                "R_TERM_INT_LH2",
+                "VBRK_LH10"
+            ],
+            [
+                "R_TERM_INT_LH3",
+                "VBRK_LH4"
+            ],
+            [
+                "R_TERM_INT_LH3",
+                "VBRK_LH9"
+            ],
+            [
+                "R_TERM_INT_LH4",
+                "VBRK_LH5"
+            ],
+            [
+                "R_TERM_INT_LH4",
+                "VBRK_LH8"
+            ],
+            [
+                "R_TERM_INT_LH5",
+                "VBRK_LH6"
+            ],
+            [
+                "R_TERM_INT_LH5",
+                "VBRK_LH7"
+            ],
+            [
                 "R_TERM_INT_NW2A0",
                 "VBRK_NE2A0"
             ],
@@ -383140,6 +383696,134 @@
             [
                 "R_TERM_INT_WW2END3",
                 "VBRK_WW2END3"
+            ],
+            [
+                "R_TERM_INT_WW4A0",
+                "VBRK_EE4BEG0"
+            ],
+            [
+                "R_TERM_INT_WW4A0",
+                "VBRK_WW4A0"
+            ],
+            [
+                "R_TERM_INT_WW4A1",
+                "VBRK_EE4BEG1"
+            ],
+            [
+                "R_TERM_INT_WW4A1",
+                "VBRK_WW4A1"
+            ],
+            [
+                "R_TERM_INT_WW4A2",
+                "VBRK_EE4BEG2"
+            ],
+            [
+                "R_TERM_INT_WW4A2",
+                "VBRK_WW4A2"
+            ],
+            [
+                "R_TERM_INT_WW4A3",
+                "VBRK_EE4BEG3"
+            ],
+            [
+                "R_TERM_INT_WW4A3",
+                "VBRK_WW4A3"
+            ],
+            [
+                "R_TERM_INT_WW4B0",
+                "VBRK_EE4A0"
+            ],
+            [
+                "R_TERM_INT_WW4B0",
+                "VBRK_WW4B0"
+            ],
+            [
+                "R_TERM_INT_WW4B1",
+                "VBRK_EE4A1"
+            ],
+            [
+                "R_TERM_INT_WW4B1",
+                "VBRK_WW4B1"
+            ],
+            [
+                "R_TERM_INT_WW4B2",
+                "VBRK_EE4A2"
+            ],
+            [
+                "R_TERM_INT_WW4B2",
+                "VBRK_WW4B2"
+            ],
+            [
+                "R_TERM_INT_WW4B3",
+                "VBRK_EE4A3"
+            ],
+            [
+                "R_TERM_INT_WW4B3",
+                "VBRK_WW4B3"
+            ],
+            [
+                "R_TERM_INT_WW4C0",
+                "VBRK_EE4B0"
+            ],
+            [
+                "R_TERM_INT_WW4C0",
+                "VBRK_WW4C0"
+            ],
+            [
+                "R_TERM_INT_WW4C1",
+                "VBRK_EE4B1"
+            ],
+            [
+                "R_TERM_INT_WW4C1",
+                "VBRK_WW4C1"
+            ],
+            [
+                "R_TERM_INT_WW4C2",
+                "VBRK_EE4B2"
+            ],
+            [
+                "R_TERM_INT_WW4C2",
+                "VBRK_WW4C2"
+            ],
+            [
+                "R_TERM_INT_WW4C3",
+                "VBRK_EE4B3"
+            ],
+            [
+                "R_TERM_INT_WW4C3",
+                "VBRK_WW4C3"
+            ],
+            [
+                "R_TERM_INT_WW4END0",
+                "VBRK_EE4C0"
+            ],
+            [
+                "R_TERM_INT_WW4END0",
+                "VBRK_WW4END0"
+            ],
+            [
+                "R_TERM_INT_WW4END1",
+                "VBRK_EE4C1"
+            ],
+            [
+                "R_TERM_INT_WW4END1",
+                "VBRK_WW4END1"
+            ],
+            [
+                "R_TERM_INT_WW4END2",
+                "VBRK_EE4C2"
+            ],
+            [
+                "R_TERM_INT_WW4END2",
+                "VBRK_WW4END2"
+            ],
+            [
+                "R_TERM_INT_WW4END3",
+                "VBRK_EE4C3"
+            ],
+            [
+                "R_TERM_INT_WW4END3",
+                "VBRK_WW4END3"
             ]
         ]
     },
diff --git a/artix7/xc7a200tsbg484-1/tilegrid.json b/artix7/xc7a200tsbg484-1/tilegrid.json
index 3dc223d..21a5fd7 100644
--- a/artix7/xc7a200tsbg484-1/tilegrid.json
+++ b/artix7/xc7a200tsbg484-1/tilegrid.json
@@ -66323,454 +66323,954 @@
         "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y0": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 259,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y0": "SLICEL",
+            "SLICE_X83Y0": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y1": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 258,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y1": "SLICEL",
+            "SLICE_X83Y1": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y2": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 257,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y2": "SLICEL",
+            "SLICE_X83Y2": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y3": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 256,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y3": "SLICEL",
+            "SLICE_X83Y3": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y4": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 255,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y4": "SLICEL",
+            "SLICE_X83Y4": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y5": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 254,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y5": "SLICEL",
+            "SLICE_X83Y5": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y6": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 253,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y6": "SLICEL",
+            "SLICE_X83Y6": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y7": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 252,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y7": "SLICEL",
+            "SLICE_X83Y7": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y8": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 251,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y8": "SLICEL",
+            "SLICE_X83Y8": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y9": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 250,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y9": "SLICEL",
+            "SLICE_X83Y9": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y10": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 249,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y10": "SLICEL",
+            "SLICE_X83Y10": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y11": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 248,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y11": "SLICEL",
+            "SLICE_X83Y11": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y12": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 247,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y12": "SLICEL",
+            "SLICE_X83Y12": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y13": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 246,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y13": "SLICEL",
+            "SLICE_X83Y13": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y14": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 245,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y14": "SLICEL",
+            "SLICE_X83Y14": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y15": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 244,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y15": "SLICEL",
+            "SLICE_X83Y15": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y16": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 243,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y16": "SLICEL",
+            "SLICE_X83Y16": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y17": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 242,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y17": "SLICEL",
+            "SLICE_X83Y17": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y18": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 241,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y18": "SLICEL",
+            "SLICE_X83Y18": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y19": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 240,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y19": "SLICEL",
+            "SLICE_X83Y19": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y20": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 239,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y20": "SLICEL",
+            "SLICE_X83Y20": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y21": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 238,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y21": "SLICEL",
+            "SLICE_X83Y21": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y22": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 237,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y22": "SLICEL",
+            "SLICE_X83Y22": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y23": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 236,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y23": "SLICEL",
+            "SLICE_X83Y23": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y24": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 235,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y24": "SLICEL",
+            "SLICE_X83Y24": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y25": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 51,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 233,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y25": "SLICEL",
+            "SLICE_X83Y25": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y26": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 53,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 232,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y26": "SLICEL",
+            "SLICE_X83Y26": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y27": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 55,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 231,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y27": "SLICEL",
+            "SLICE_X83Y27": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y28": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 57,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 230,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y28": "SLICEL",
+            "SLICE_X83Y28": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y29": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 59,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 229,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y29": "SLICEL",
+            "SLICE_X83Y29": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y30": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 61,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 228,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y30": "SLICEL",
+            "SLICE_X83Y30": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y31": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 63,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 227,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y31": "SLICEL",
+            "SLICE_X83Y31": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y32": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 65,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 226,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y32": "SLICEL",
+            "SLICE_X83Y32": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y33": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 67,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 225,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y33": "SLICEL",
+            "SLICE_X83Y33": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y34": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 69,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 224,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y34": "SLICEL",
+            "SLICE_X83Y34": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y35": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 71,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 223,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y35": "SLICEL",
+            "SLICE_X83Y35": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y36": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 73,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 222,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y36": "SLICEL",
+            "SLICE_X83Y36": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y37": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 75,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 221,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y37": "SLICEL",
+            "SLICE_X83Y37": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y38": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 77,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 220,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y38": "SLICEL",
+            "SLICE_X83Y38": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y39": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 79,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 219,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y39": "SLICEL",
+            "SLICE_X83Y39": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y40": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 81,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 218,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y40": "SLICEL",
+            "SLICE_X83Y40": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y41": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 83,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 217,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y41": "SLICEL",
+            "SLICE_X83Y41": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y42": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 85,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 216,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y42": "SLICEL",
+            "SLICE_X83Y42": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y43": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 87,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 215,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y43": "SLICEL",
+            "SLICE_X83Y43": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y44": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 89,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 214,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y44": "SLICEL",
+            "SLICE_X83Y44": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y45": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 91,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 213,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y45": "SLICEL",
+            "SLICE_X83Y45": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y46": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 93,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 212,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y46": "SLICEL",
+            "SLICE_X83Y46": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y47": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 95,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 211,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y47": "SLICEL",
+            "SLICE_X83Y47": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y48": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 97,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 210,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y48": "SLICEL",
+            "SLICE_X83Y48": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y49": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 36,
+                "offset": 99,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 135,
         "grid_y": 209,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y49": "SLICEL",
+            "SLICE_X83Y49": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y50": {
         "bits": {
@@ -69623,454 +70123,954 @@
         "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y200": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 51,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y200": "SLICEL",
+            "SLICE_X83Y200": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y201": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 50,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y201": "SLICEL",
+            "SLICE_X83Y201": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y202": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 49,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y202": "SLICEL",
+            "SLICE_X83Y202": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y203": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 48,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y203": "SLICEL",
+            "SLICE_X83Y203": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y204": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 47,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y204": "SLICEL",
+            "SLICE_X83Y204": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y205": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 10,
+                "words": 2
+            }
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         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 46,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y205": "SLICEL",
+            "SLICE_X83Y205": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y206": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 45,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y206": "SLICEL",
+            "SLICE_X83Y206": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y207": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 44,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y207": "SLICEL",
+            "SLICE_X83Y207": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y208": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 43,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y208": "SLICEL",
+            "SLICE_X83Y208": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y209": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 18,
+                "words": 2
+            }
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         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 42,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y209": "SLICEL",
+            "SLICE_X83Y209": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y210": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 20,
+                "words": 2
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         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 41,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y210": "SLICEL",
+            "SLICE_X83Y210": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y211": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 40,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y211": "SLICEL",
+            "SLICE_X83Y211": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y212": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 39,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y212": "SLICEL",
+            "SLICE_X83Y212": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y213": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 38,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y213": "SLICEL",
+            "SLICE_X83Y213": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y214": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 37,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y214": "SLICEL",
+            "SLICE_X83Y214": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y215": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 30,
+                "words": 2
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         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 36,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y215": "SLICEL",
+            "SLICE_X83Y215": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y216": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 32,
+                "words": 2
+            }
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         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 35,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y216": "SLICEL",
+            "SLICE_X83Y216": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y217": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 34,
+                "words": 2
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         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 34,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y217": "SLICEL",
+            "SLICE_X83Y217": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y218": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 33,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y218": "SLICEL",
+            "SLICE_X83Y218": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y219": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 38,
+                "words": 2
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         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 32,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y219": "SLICEL",
+            "SLICE_X83Y219": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y220": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 40,
+                "words": 2
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         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 31,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y220": "SLICEL",
+            "SLICE_X83Y220": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y221": {
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+                "offset": 42,
+                "words": 2
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         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 30,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
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+            "SLICE_X83Y221": "SLICEL"
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     },
     "CLBLL_L_X54Y222": {
-        "bits": {},
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+                "offset": 44,
+                "words": 2
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         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 29,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
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+            "SLICE_X83Y222": "SLICEL"
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     },
     "CLBLL_L_X54Y223": {
-        "bits": {},
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+                "offset": 46,
+                "words": 2
+            }
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         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 28,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y223": "SLICEL",
+            "SLICE_X83Y223": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y224": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
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+                "offset": 48,
+                "words": 2
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         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 27,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y224": "SLICEL",
+            "SLICE_X83Y224": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y225": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
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+                "offset": 51,
+                "words": 2
+            }
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         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 25,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y225": "SLICEL",
+            "SLICE_X83Y225": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y226": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 53,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 24,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y226": "SLICEL",
+            "SLICE_X83Y226": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y227": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 55,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 23,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y227": "SLICEL",
+            "SLICE_X83Y227": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y228": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 57,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 22,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y228": "SLICEL",
+            "SLICE_X83Y228": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y229": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 59,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 21,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y229": "SLICEL",
+            "SLICE_X83Y229": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y230": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 61,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 20,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y230": "SLICEL",
+            "SLICE_X83Y230": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y231": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 63,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 19,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y231": "SLICEL",
+            "SLICE_X83Y231": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y232": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 65,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 18,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y232": "SLICEL",
+            "SLICE_X83Y232": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y233": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 67,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 17,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y233": "SLICEL",
+            "SLICE_X83Y233": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y234": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 69,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 16,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y234": "SLICEL",
+            "SLICE_X83Y234": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y235": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 71,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 15,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y235": "SLICEL",
+            "SLICE_X83Y235": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y236": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 73,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 14,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y236": "SLICEL",
+            "SLICE_X83Y236": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y237": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 75,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 13,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y237": "SLICEL",
+            "SLICE_X83Y237": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y238": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 77,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 12,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y238": "SLICEL",
+            "SLICE_X83Y238": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y239": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 79,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 11,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y239": "SLICEL",
+            "SLICE_X83Y239": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y240": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 81,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 10,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y240": "SLICEL",
+            "SLICE_X83Y240": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y241": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 83,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 9,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y241": "SLICEL",
+            "SLICE_X83Y241": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y242": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 85,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 8,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y242": "SLICEL",
+            "SLICE_X83Y242": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y243": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 87,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 7,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y243": "SLICEL",
+            "SLICE_X83Y243": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y244": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 89,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 6,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y244": "SLICEL",
+            "SLICE_X83Y244": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y245": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 91,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 5,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y245": "SLICEL",
+            "SLICE_X83Y245": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y246": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 93,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 4,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y246": "SLICEL",
+            "SLICE_X83Y246": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y247": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 95,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 3,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y247": "SLICEL",
+            "SLICE_X83Y247": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y248": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 97,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 2,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y248": "SLICEL",
+            "SLICE_X83Y248": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X54Y249": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 36,
+                "offset": 99,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 135,
         "grid_y": 1,
         "pin_functions": {},
-        "sites": {},
-        "type": "NULL"
+        "sites": {
+            "SLICE_X82Y249": "SLICEL",
+            "SLICE_X83Y249": "SLICEL"
+        },
+        "type": "CLBLL_L"
     },
     "CLBLL_L_X100Y0": {
         "bits": {
@@ -370343,7 +371343,14 @@
         "type": "HCLK_L"
     },
     "HCLK_L_X136Y26": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 26,
+                "offset": 50,
+                "words": 1
+            }
+        },
         "grid_x": 136,
         "grid_y": 234,
         "pin_functions": {},
@@ -370396,7 +371403,14 @@
         "type": "HCLK_L"
     },
     "HCLK_L_X136Y234": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 26,
+                "offset": 50,
+                "words": 1
+            }
+        },
         "grid_x": 136,
         "grid_y": 26,
         "pin_functions": {},
@@ -373679,7 +374693,14 @@
         "type": "HCLK_R"
     },
     "HCLK_R_X137Y26": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 26,
+                "offset": 50,
+                "words": 1
+            }
+        },
         "grid_x": 137,
         "grid_y": 234,
         "pin_functions": {},
@@ -373732,7 +374753,14 @@
         "type": "HCLK_R"
     },
     "HCLK_R_X137Y234": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 26,
+                "offset": 50,
+                "words": 1
+            }
+        },
         "grid_x": 137,
         "grid_y": 26,
         "pin_functions": {},
@@ -507507,7 +508535,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y0": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 259,
@@ -507518,7 +508553,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y1": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 258,
@@ -507529,7 +508571,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y2": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 257,
@@ -507540,7 +508589,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y3": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 256,
@@ -507551,7 +508607,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y4": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 255,
@@ -507562,7 +508625,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y5": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 254,
@@ -507573,7 +508643,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y6": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 253,
@@ -507584,7 +508661,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y7": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 252,
@@ -507595,7 +508679,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y8": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 251,
@@ -507606,7 +508697,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y9": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 250,
@@ -507617,7 +508715,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y10": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 249,
@@ -507628,7 +508733,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y11": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 248,
@@ -507639,7 +508751,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y12": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 247,
@@ -507650,7 +508769,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y13": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 246,
@@ -507661,7 +508787,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y14": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 245,
@@ -507672,7 +508805,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y15": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 244,
@@ -507683,7 +508823,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y16": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 243,
@@ -507694,7 +508841,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y17": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 242,
@@ -507705,7 +508859,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y18": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 241,
@@ -507716,7 +508877,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y19": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 240,
@@ -507727,7 +508895,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y20": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 239,
@@ -507738,7 +508913,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y21": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 238,
@@ -507749,7 +508931,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y22": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 237,
@@ -507760,7 +508949,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y23": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 236,
@@ -507771,7 +508967,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y24": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 235,
@@ -507782,7 +508985,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y25": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 51,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 233,
@@ -507793,7 +509003,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y26": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 53,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 232,
@@ -507804,7 +509021,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y27": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 55,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 231,
@@ -507815,7 +509039,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y28": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 57,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 230,
@@ -507826,7 +509057,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y29": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 59,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 229,
@@ -507837,7 +509075,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y30": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 61,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 228,
@@ -507848,7 +509093,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y31": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 63,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 227,
@@ -507859,7 +509111,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y32": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 65,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 226,
@@ -507870,7 +509129,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y33": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 67,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 225,
@@ -507881,7 +509147,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y34": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 69,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 224,
@@ -507892,7 +509165,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y35": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 71,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 223,
@@ -507903,7 +509183,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y36": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 73,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 222,
@@ -507914,7 +509201,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y37": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 75,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 221,
@@ -507925,7 +509219,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y38": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 77,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 220,
@@ -507936,7 +509237,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y39": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 79,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 219,
@@ -507947,7 +509255,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y40": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 81,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 218,
@@ -507958,7 +509273,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y41": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 83,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 217,
@@ -507969,7 +509291,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y42": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 85,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 216,
@@ -507980,7 +509309,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y43": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 87,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 215,
@@ -507991,7 +509327,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y44": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 89,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 214,
@@ -508002,7 +509345,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y45": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 91,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 213,
@@ -508013,7 +509363,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y46": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 93,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 212,
@@ -508024,7 +509381,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y47": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 95,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 211,
@@ -508035,7 +509399,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y48": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 97,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 210,
@@ -508046,7 +509417,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y49": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B00",
+                "frames": 28,
+                "offset": 99,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 136,
         "grid_y": 209,
@@ -510757,7 +512135,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y200": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 51,
@@ -510768,7 +512153,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y201": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 50,
@@ -510779,7 +512171,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y202": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 49,
@@ -510790,7 +512189,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y203": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 48,
@@ -510801,7 +512207,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y204": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 47,
@@ -510812,7 +512225,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y205": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 46,
@@ -510823,7 +512243,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y206": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 45,
@@ -510834,7 +512261,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y207": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 44,
@@ -510845,7 +512279,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y208": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 43,
@@ -510856,7 +512297,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y209": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 42,
@@ -510867,7 +512315,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y210": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 41,
@@ -510878,7 +512333,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y211": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 40,
@@ -510889,7 +512351,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y212": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 39,
@@ -510900,7 +512369,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y213": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 38,
@@ -510911,7 +512387,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y214": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 37,
@@ -510922,7 +512405,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y215": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 36,
@@ -510933,7 +512423,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y216": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 35,
@@ -510944,7 +512441,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y217": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 34,
@@ -510955,7 +512459,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y218": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 33,
@@ -510966,7 +512477,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y219": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 32,
@@ -510977,7 +512495,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y220": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 31,
@@ -510988,7 +512513,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y221": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 30,
@@ -510999,7 +512531,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y222": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 29,
@@ -511010,7 +512549,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y223": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 28,
@@ -511021,7 +512567,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y224": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 27,
@@ -511032,7 +512585,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y225": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 51,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 25,
@@ -511043,7 +512603,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y226": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 53,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 24,
@@ -511054,7 +512621,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y227": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 55,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 23,
@@ -511065,7 +512639,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y228": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 57,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 22,
@@ -511076,7 +512657,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y229": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 59,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 21,
@@ -511087,7 +512675,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y230": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 61,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 20,
@@ -511098,7 +512693,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y231": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 63,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 19,
@@ -511109,7 +512711,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y232": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 65,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 18,
@@ -511120,7 +512729,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y233": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 67,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 17,
@@ -511131,7 +512747,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y234": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 69,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 16,
@@ -511142,7 +512765,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y235": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 71,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 15,
@@ -511153,7 +512783,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y236": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 73,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 14,
@@ -511164,7 +512801,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y237": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 75,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 13,
@@ -511175,7 +512819,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y238": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 77,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 12,
@@ -511186,7 +512837,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y239": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 79,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 11,
@@ -511197,7 +512855,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y240": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 81,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 10,
@@ -511208,7 +512873,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y241": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 83,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 9,
@@ -511219,7 +512891,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y242": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 85,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 8,
@@ -511230,7 +512909,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y243": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 87,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 7,
@@ -511241,7 +512927,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y244": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 89,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 6,
@@ -511252,7 +512945,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y245": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 91,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 5,
@@ -511263,7 +512963,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y246": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 93,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 4,
@@ -511274,7 +512981,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y247": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 95,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 3,
@@ -511285,7 +512999,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y248": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 97,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 2,
@@ -511296,7 +513017,14 @@
         "type": "INT_L"
     },
     "INT_L_X54Y249": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B00",
+                "frames": 28,
+                "offset": 99,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 136,
         "grid_y": 1,
@@ -707057,7 +708785,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y0": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 259,
@@ -707068,7 +708803,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y1": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 258,
@@ -707079,7 +708821,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y2": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 257,
@@ -707090,7 +708839,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y3": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 256,
@@ -707101,7 +708857,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y4": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 255,
@@ -707112,7 +708875,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y5": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 254,
@@ -707123,7 +708893,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y6": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 253,
@@ -707134,7 +708911,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y7": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 252,
@@ -707145,7 +708929,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y8": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 251,
@@ -707156,7 +708947,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y9": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 250,
@@ -707167,7 +708965,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y10": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 249,
@@ -707178,7 +708983,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y11": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 248,
@@ -707189,7 +709001,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y12": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 247,
@@ -707200,7 +709019,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y13": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 246,
@@ -707211,7 +709037,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y14": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 245,
@@ -707222,7 +709055,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y15": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 244,
@@ -707233,7 +709073,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y16": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 243,
@@ -707244,7 +709091,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y17": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 242,
@@ -707255,7 +709109,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y18": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 241,
@@ -707266,7 +709127,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y19": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 240,
@@ -707277,7 +709145,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y20": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 239,
@@ -707288,7 +709163,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y21": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 238,
@@ -707299,7 +709181,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y22": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 237,
@@ -707310,7 +709199,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y23": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 236,
@@ -707321,7 +709217,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y24": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 235,
@@ -707332,7 +709235,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y25": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 51,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 233,
@@ -707343,7 +709253,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y26": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 53,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 232,
@@ -707354,7 +709271,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y27": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 55,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 231,
@@ -707365,7 +709289,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y28": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 57,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 230,
@@ -707376,7 +709307,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y29": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 59,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 229,
@@ -707387,7 +709325,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y30": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 61,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 228,
@@ -707398,7 +709343,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y31": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 63,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 227,
@@ -707409,7 +709361,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y32": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 65,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 226,
@@ -707420,7 +709379,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y33": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 67,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 225,
@@ -707431,7 +709397,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y34": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 69,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 224,
@@ -707442,7 +709415,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y35": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 71,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 223,
@@ -707453,7 +709433,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y36": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 73,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 222,
@@ -707464,7 +709451,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y37": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 75,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 221,
@@ -707475,7 +709469,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y38": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 77,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 220,
@@ -707486,7 +709487,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y39": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 79,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 219,
@@ -707497,7 +709505,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y40": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 81,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 218,
@@ -707508,7 +709523,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y41": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 83,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 217,
@@ -707519,7 +709541,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y42": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 85,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 216,
@@ -707530,7 +709559,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y43": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 87,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 215,
@@ -707541,7 +709577,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y44": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 89,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 214,
@@ -707552,7 +709595,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y45": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 91,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 213,
@@ -707563,7 +709613,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y46": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 93,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 212,
@@ -707574,7 +709631,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y47": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 95,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 211,
@@ -707585,7 +709649,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y48": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 97,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 210,
@@ -707596,7 +709667,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y49": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00441B80",
+                "frames": 28,
+                "offset": 99,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y0",
         "grid_x": 137,
         "grid_y": 209,
@@ -710307,7 +712385,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y200": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 0,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 51,
@@ -710318,7 +712403,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y201": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 2,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 50,
@@ -710329,7 +712421,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y202": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 4,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 49,
@@ -710340,7 +712439,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y203": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 6,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 48,
@@ -710351,7 +712457,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y204": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 8,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 47,
@@ -710362,7 +712475,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y205": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 10,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 46,
@@ -710373,7 +712493,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y206": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 12,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 45,
@@ -710384,7 +712511,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y207": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 14,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 44,
@@ -710395,7 +712529,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y208": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 16,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 43,
@@ -710406,7 +712547,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y209": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 18,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 42,
@@ -710417,7 +712565,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y210": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 20,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 41,
@@ -710428,7 +712583,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y211": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 22,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 40,
@@ -710439,7 +712601,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y212": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 24,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 39,
@@ -710450,7 +712619,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y213": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 26,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 38,
@@ -710461,7 +712637,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y214": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 28,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 37,
@@ -710472,7 +712655,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y215": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 30,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 36,
@@ -710483,7 +712673,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y216": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 32,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 35,
@@ -710494,7 +712691,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y217": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 34,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 34,
@@ -710505,7 +712709,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y218": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 36,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 33,
@@ -710516,7 +712727,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y219": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 38,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 32,
@@ -710527,7 +712745,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y220": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 40,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 31,
@@ -710538,7 +712763,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y221": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 42,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 30,
@@ -710549,7 +712781,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y222": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 44,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 29,
@@ -710560,7 +712799,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y223": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 46,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 28,
@@ -710571,7 +712817,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y224": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 48,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 27,
@@ -710582,7 +712835,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y225": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 51,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 25,
@@ -710593,7 +712853,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y226": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 53,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 24,
@@ -710604,7 +712871,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y227": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 55,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 23,
@@ -710615,7 +712889,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y228": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 57,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 22,
@@ -710626,7 +712907,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y229": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 59,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 21,
@@ -710637,7 +712925,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y230": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 61,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 20,
@@ -710648,7 +712943,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y231": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 63,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 19,
@@ -710659,7 +712961,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y232": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 65,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 18,
@@ -710670,7 +712979,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y233": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 67,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 17,
@@ -710681,7 +712997,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y234": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 69,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 16,
@@ -710692,7 +713015,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y235": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 71,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 15,
@@ -710703,7 +713033,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y236": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 73,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 14,
@@ -710714,7 +713051,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y237": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 75,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 13,
@@ -710725,7 +713069,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y238": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 77,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 12,
@@ -710736,7 +713087,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y239": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 79,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 11,
@@ -710747,7 +713105,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y240": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 81,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 10,
@@ -710758,7 +713123,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y241": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 83,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 9,
@@ -710769,7 +713141,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y242": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 85,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 8,
@@ -710780,7 +713159,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y243": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 87,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 7,
@@ -710791,7 +713177,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y244": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 89,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 6,
@@ -710802,7 +713195,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y245": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 91,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 5,
@@ -710813,7 +713213,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y246": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 93,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 4,
@@ -710824,7 +713231,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y247": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 95,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 3,
@@ -710835,7 +713249,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y248": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 97,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 2,
@@ -710846,7 +713267,14 @@
         "type": "INT_R"
     },
     "INT_R_X55Y249": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021B80",
+                "frames": 28,
+                "offset": 99,
+                "words": 2
+            }
+        },
         "clock_region": "X0Y4",
         "grid_x": 137,
         "grid_y": 1,
diff --git a/kintex7/mask_lioi3.db b/kintex7/mask_lioi3.db
index 1c35129..4c3181d 100644
--- a/kintex7/mask_lioi3.db
+++ b/kintex7/mask_lioi3.db
@@ -15,6 +15,7 @@
 bit 25_84
 bit 25_85
 bit 25_95
+bit 25_96
 bit 25_98
 bit 25_99
 bit 25_111
diff --git a/kintex7/mask_lioi3_tbytesrc.db b/kintex7/mask_lioi3_tbytesrc.db
index 1c35129..4c3181d 100644
--- a/kintex7/mask_lioi3_tbytesrc.db
+++ b/kintex7/mask_lioi3_tbytesrc.db
@@ -15,6 +15,7 @@
 bit 25_84
 bit 25_85
 bit 25_95
+bit 25_96
 bit 25_98
 bit 25_99
 bit 25_111
diff --git a/kintex7/mask_lioi3_tbyteterm.db b/kintex7/mask_lioi3_tbyteterm.db
index 1c35129..4c3181d 100644
--- a/kintex7/mask_lioi3_tbyteterm.db
+++ b/kintex7/mask_lioi3_tbyteterm.db
@@ -15,6 +15,7 @@
 bit 25_84
 bit 25_85
 bit 25_95
+bit 25_96
 bit 25_98
 bit 25_99
 bit 25_111
diff --git a/kintex7/mask_rioi3.db b/kintex7/mask_rioi3.db
index 1c35129..4c3181d 100644
--- a/kintex7/mask_rioi3.db
+++ b/kintex7/mask_rioi3.db
@@ -15,6 +15,7 @@
 bit 25_84
 bit 25_85
 bit 25_95
+bit 25_96
 bit 25_98
 bit 25_99
 bit 25_111
diff --git a/kintex7/mask_rioi3_tbytesrc.db b/kintex7/mask_rioi3_tbytesrc.db
index 1c35129..4c3181d 100644
--- a/kintex7/mask_rioi3_tbytesrc.db
+++ b/kintex7/mask_rioi3_tbytesrc.db
@@ -15,6 +15,7 @@
 bit 25_84
 bit 25_85
 bit 25_95
+bit 25_96
 bit 25_98
 bit 25_99
 bit 25_111
diff --git a/kintex7/mask_rioi3_tbyteterm.db b/kintex7/mask_rioi3_tbyteterm.db
index 1c35129..4c3181d 100644
--- a/kintex7/mask_rioi3_tbyteterm.db
+++ b/kintex7/mask_rioi3_tbyteterm.db
@@ -15,6 +15,7 @@
 bit 25_84
 bit 25_85
 bit 25_95
+bit 25_96
 bit 25_98
 bit 25_99
 bit 25_111
diff --git a/kintex7/segbits_int_l.origin_info.db b/kintex7/segbits_int_l.origin_info.db
index 3fd5129..77e8787 100644
--- a/kintex7/segbits_int_l.origin_info.db
+++ b/kintex7/segbits_int_l.origin_info.db
@@ -301,7 +301,7 @@
 INT_L.FAN_ALT0.FAN_BOUNCE6 origin:050-pip-seed !23_00 20_00 22_00 24_00 25_00
 INT_L.FAN_ALT0.LOGIC_OUTS_L0 origin:050-pip-seed !23_00 21_00 22_00 24_00 25_00
 INT_L.FAN_ALT0.LOGIC_OUTS_L12 origin:050-pip-seed !22_00 21_00 23_00 24_00 25_00
-INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:056-pip-rem !22_00 !23_00 !25_00 21_00 24_00
+INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:050-pip-seed !22_00 !23_00 !25_00 21_00 24_00
 INT_L.FAN_ALT0.SR1END_N3_3 origin:050-pip-seed !23_00 19_01 22_00 24_00 25_00
 INT_L.FAN_ALT0.SS2END_N0_3 origin:050-pip-seed !22_00 !23_00 !24_00 17_00 25_00
 INT_L.FAN_ALT0.SW2END_N0_3 origin:050-pip-seed !22_00 !23_00 !25_00 17_00 24_00
@@ -393,7 +393,7 @@
 INT_L.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08
 INT_L.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08
 INT_L.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
-INT_L.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
+INT_L.FAN_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_08 20_08 23_08 24_08 25_08
 INT_L.FAN_ALT4.LOGIC_OUTS_L4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
 INT_L.FAN_ALT4.LOGIC_OUTS_L8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
 INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
@@ -1897,7 +1897,7 @@
 INT_L.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27
 INT_L.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24
 INT_L.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27
-INT_L.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27
+INT_L.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27
 INT_L.EE4BEG2.LOGIC_OUTS_L2 origin:050-pip-seed 02_41 04_42
 INT_L.EE4BEG2.LOGIC_OUTS_L6 origin:050-pip-seed 02_41 07_41
 INT_L.EE4BEG2.LOGIC_OUTS_L10 origin:050-pip-seed 03_40 07_41
@@ -1917,7 +1917,7 @@
 INT_L.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
 INT_L.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
 INT_L.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
-INT_L.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43
+INT_L.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
 INT_L.EE4BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 02_57 07_57
 INT_L.EE4BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_57 04_58
 INT_L.EE4BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_56 04_58
@@ -3323,7 +3323,7 @@
 INT_L.SW6BEG2.LVB_L0 origin:056-pip-rem 04_46 05_44
 INT_L.SW6BEG2.LVB_L12 origin:056-pip-rem 05_44 07_45
 INT_L.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
-INT_L.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
+INT_L.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
 INT_L.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47
 INT_L.SW6BEG2.NW6END3 origin:050-pip-seed 05_47 06_44
 INT_L.SW6BEG2.SE2END2 origin:050-pip-seed 02_45 04_45
@@ -3603,7 +3603,7 @@
 INT_L.WW4BEG2.LVB_L0 origin:056-pip-rem 04_34 05_32
 INT_L.WW4BEG2.LVB_L12 origin:056-pip-rem 05_32 07_33
 INT_L.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
-INT_L.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
+INT_L.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
 INT_L.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
 INT_L.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
 INT_L.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
diff --git a/kintex7/segbits_int_r.origin_info.db b/kintex7/segbits_int_r.origin_info.db
index 2dc2989..566e843 100644
--- a/kintex7/segbits_int_r.origin_info.db
+++ b/kintex7/segbits_int_r.origin_info.db
@@ -685,7 +685,7 @@
 INT_R.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27
 INT_R.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24
 INT_R.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27
-INT_R.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27
+INT_R.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27
 INT_R.EE4BEG2.LOGIC_OUTS2 origin:050-pip-seed 02_41 04_42
 INT_R.EE4BEG2.LOGIC_OUTS6 origin:050-pip-seed 02_41 07_41
 INT_R.EE4BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_40 07_41
@@ -725,7 +725,7 @@
 INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
 INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
 INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
-INT_R.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
+INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
 INT_R.EL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_20 14_21
 INT_R.EL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_21 14_21
 INT_R.EL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_21 13_21
@@ -3344,7 +3344,7 @@
 INT_R.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60
 INT_R.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63
 INT_R.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61
-INT_R.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60
+INT_R.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60
 INT_R.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60
 INT_R.SW6BEG3.LV18 origin:056-pip-rem 05_60 07_61
 INT_R.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61