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        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40000",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 223,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y14": "FIFO18E1",
            "RAMB18_X0Y15": "RAMB18E1",
            "RAMB36_X0Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40000",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 218,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y16": "FIFO18E1",
            "RAMB18_X0Y17": "RAMB18E1",
            "RAMB36_X0Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40000",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 213,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y18": "FIFO18E1",
            "RAMB18_X0Y19": "RAMB18E1",
            "RAMB36_X0Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y20": "FIFO18E1",
            "RAMB18_X0Y21": "RAMB18E1",
            "RAMB36_X0Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y22": "FIFO18E1",
            "RAMB18_X0Y23": "RAMB18E1",
            "RAMB36_X0Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y24": "FIFO18E1",
            "RAMB18_X0Y25": "RAMB18E1",
            "RAMB36_X0Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y26": "FIFO18E1",
            "RAMB18_X0Y27": "RAMB18E1",
            "RAMB36_X0Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y28": "FIFO18E1",
            "RAMB18_X0Y29": "RAMB18E1",
            "RAMB36_X0Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y30": "FIFO18E1",
            "RAMB18_X0Y31": "RAMB18E1",
            "RAMB36_X0Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y32": "FIFO18E1",
            "RAMB18_X0Y33": "RAMB18E1",
            "RAMB36_X0Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y34": "FIFO18E1",
            "RAMB18_X0Y35": "RAMB18E1",
            "RAMB36_X0Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y36": "FIFO18E1",
            "RAMB18_X0Y37": "RAMB18E1",
            "RAMB36_X0Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y38": "FIFO18E1",
            "RAMB18_X0Y39": "RAMB18E1",
            "RAMB36_X0Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y100": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y40": "FIFO18E1",
            "RAMB18_X0Y41": "RAMB18E1",
            "RAMB36_X0Y20": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y105": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y42": "FIFO18E1",
            "RAMB18_X0Y43": "RAMB18E1",
            "RAMB36_X0Y21": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y110": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y44": "FIFO18E1",
            "RAMB18_X0Y45": "RAMB18E1",
            "RAMB36_X0Y22": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y115": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y46": "FIFO18E1",
            "RAMB18_X0Y47": "RAMB18E1",
            "RAMB36_X0Y23": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y120": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y48": "FIFO18E1",
            "RAMB18_X0Y49": "RAMB18E1",
            "RAMB36_X0Y24": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y125": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y50": "FIFO18E1",
            "RAMB18_X0Y51": "RAMB18E1",
            "RAMB36_X0Y25": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y130": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y52": "FIFO18E1",
            "RAMB18_X0Y53": "RAMB18E1",
            "RAMB36_X0Y26": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y135": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y54": "FIFO18E1",
            "RAMB18_X0Y55": "RAMB18E1",
            "RAMB36_X0Y27": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y140": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y56": "FIFO18E1",
            "RAMB18_X0Y57": "RAMB18E1",
            "RAMB36_X0Y28": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y145": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y58": "FIFO18E1",
            "RAMB18_X0Y59": "RAMB18E1",
            "RAMB36_X0Y29": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y150": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y60": "FIFO18E1",
            "RAMB18_X0Y61": "RAMB18E1",
            "RAMB36_X0Y30": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y155": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y62": "FIFO18E1",
            "RAMB18_X0Y63": "RAMB18E1",
            "RAMB36_X0Y31": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y160": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y64": "FIFO18E1",
            "RAMB18_X0Y65": "RAMB18E1",
            "RAMB36_X0Y32": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y165": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y66": "FIFO18E1",
            "RAMB18_X0Y67": "RAMB18E1",
            "RAMB36_X0Y33": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y170": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y68": "FIFO18E1",
            "RAMB18_X0Y69": "RAMB18E1",
            "RAMB36_X0Y34": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y175": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y70": "FIFO18E1",
            "RAMB18_X0Y71": "RAMB18E1",
            "RAMB36_X0Y35": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y180": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y72": "FIFO18E1",
            "RAMB18_X0Y73": "RAMB18E1",
            "RAMB36_X0Y36": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y185": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y74": "FIFO18E1",
            "RAMB18_X0Y75": "RAMB18E1",
            "RAMB36_X0Y37": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y190": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y76": "FIFO18E1",
            "RAMB18_X0Y77": "RAMB18E1",
            "RAMB36_X0Y38": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y195": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y78": "FIFO18E1",
            "RAMB18_X0Y79": "RAMB18E1",
            "RAMB36_X0Y39": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y200": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 19,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y80": "FIFO18E1",
            "RAMB18_X0Y81": "RAMB18E1",
            "RAMB36_X0Y40": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y205": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 19,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y82": "FIFO18E1",
            "RAMB18_X0Y83": "RAMB18E1",
            "RAMB36_X0Y41": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y210": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 19,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y84": "FIFO18E1",
            "RAMB18_X0Y85": "RAMB18E1",
            "RAMB36_X0Y42": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y215": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 19,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y86": "FIFO18E1",
            "RAMB18_X0Y87": "RAMB18E1",
            "RAMB36_X0Y43": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y220": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 19,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y88": "FIFO18E1",
            "RAMB18_X0Y89": "RAMB18E1",
            "RAMB36_X0Y44": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y225": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 19,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y90": "FIFO18E1",
            "RAMB18_X0Y91": "RAMB18E1",
            "RAMB36_X0Y45": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y230": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 19,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y92": "FIFO18E1",
            "RAMB18_X0Y93": "RAMB18E1",
            "RAMB36_X0Y46": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y235": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 19,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y94": "FIFO18E1",
            "RAMB18_X0Y95": "RAMB18E1",
            "RAMB36_X0Y47": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y240": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 19,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y96": "FIFO18E1",
            "RAMB18_X0Y97": "RAMB18E1",
            "RAMB36_X0Y48": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y245": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 19,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y98": "FIFO18E1",
            "RAMB18_X0Y99": "RAMB18E1",
            "RAMB36_X0Y49": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40100",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 71,
        "grid_y": 259,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y0": "FIFO18E1",
            "RAMB18_X2Y1": "RAMB18E1",
            "RAMB36_X2Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40100",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 71,
        "grid_y": 254,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y2": "FIFO18E1",
            "RAMB18_X2Y3": "RAMB18E1",
            "RAMB36_X2Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40100",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 71,
        "grid_y": 249,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y4": "FIFO18E1",
            "RAMB18_X2Y5": "RAMB18E1",
            "RAMB36_X2Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40100",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 71,
        "grid_y": 244,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y6": "FIFO18E1",
            "RAMB18_X2Y7": "RAMB18E1",
            "RAMB36_X2Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40100",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 71,
        "grid_y": 239,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y8": "FIFO18E1",
            "RAMB18_X2Y9": "RAMB18E1",
            "RAMB36_X2Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40100",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 71,
        "grid_y": 233,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y10": "FIFO18E1",
            "RAMB18_X2Y11": "RAMB18E1",
            "RAMB36_X2Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40100",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 71,
        "grid_y": 228,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y12": "FIFO18E1",
            "RAMB18_X2Y13": "RAMB18E1",
            "RAMB36_X2Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40100",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 71,
        "grid_y": 223,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y14": "FIFO18E1",
            "RAMB18_X2Y15": "RAMB18E1",
            "RAMB36_X2Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40100",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 71,
        "grid_y": 218,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y16": "FIFO18E1",
            "RAMB18_X2Y17": "RAMB18E1",
            "RAMB36_X2Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40100",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 71,
        "grid_y": 213,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y18": "FIFO18E1",
            "RAMB18_X2Y19": "RAMB18E1",
            "RAMB36_X2Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 71,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y20": "FIFO18E1",
            "RAMB18_X2Y21": "RAMB18E1",
            "RAMB36_X2Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 71,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y22": "FIFO18E1",
            "RAMB18_X2Y23": "RAMB18E1",
            "RAMB36_X2Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 71,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y24": "FIFO18E1",
            "RAMB18_X2Y25": "RAMB18E1",
            "RAMB36_X2Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 71,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y26": "FIFO18E1",
            "RAMB18_X2Y27": "RAMB18E1",
            "RAMB36_X2Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 71,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y28": "FIFO18E1",
            "RAMB18_X2Y29": "RAMB18E1",
            "RAMB36_X2Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 71,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y30": "FIFO18E1",
            "RAMB18_X2Y31": "RAMB18E1",
            "RAMB36_X2Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 71,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y32": "FIFO18E1",
            "RAMB18_X2Y33": "RAMB18E1",
            "RAMB36_X2Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 71,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y34": "FIFO18E1",
            "RAMB18_X2Y35": "RAMB18E1",
            "RAMB36_X2Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 71,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y36": "FIFO18E1",
            "RAMB18_X2Y37": "RAMB18E1",
            "RAMB36_X2Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 71,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y38": "FIFO18E1",
            "RAMB18_X2Y39": "RAMB18E1",
            "RAMB36_X2Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y100": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 71,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y40": "FIFO18E1",
            "RAMB18_X2Y41": "RAMB18E1",
            "RAMB36_X2Y20": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y105": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 71,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y42": "FIFO18E1",
            "RAMB18_X2Y43": "RAMB18E1",
            "RAMB36_X2Y21": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y110": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 71,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y44": "FIFO18E1",
            "RAMB18_X2Y45": "RAMB18E1",
            "RAMB36_X2Y22": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y115": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 71,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y46": "FIFO18E1",
            "RAMB18_X2Y47": "RAMB18E1",
            "RAMB36_X2Y23": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y120": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 71,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y48": "FIFO18E1",
            "RAMB18_X2Y49": "RAMB18E1",
            "RAMB36_X2Y24": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y125": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 71,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y50": "FIFO18E1",
            "RAMB18_X2Y51": "RAMB18E1",
            "RAMB36_X2Y25": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y130": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 71,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y52": "FIFO18E1",
            "RAMB18_X2Y53": "RAMB18E1",
            "RAMB36_X2Y26": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y135": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 71,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y54": "FIFO18E1",
            "RAMB18_X2Y55": "RAMB18E1",
            "RAMB36_X2Y27": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y140": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 71,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y56": "FIFO18E1",
            "RAMB18_X2Y57": "RAMB18E1",
            "RAMB36_X2Y28": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y145": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 71,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y58": "FIFO18E1",
            "RAMB18_X2Y59": "RAMB18E1",
            "RAMB36_X2Y29": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y150": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 71,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y60": "FIFO18E1",
            "RAMB18_X2Y61": "RAMB18E1",
            "RAMB36_X2Y30": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y155": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 71,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y62": "FIFO18E1",
            "RAMB18_X2Y63": "RAMB18E1",
            "RAMB36_X2Y31": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y160": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 71,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y64": "FIFO18E1",
            "RAMB18_X2Y65": "RAMB18E1",
            "RAMB36_X2Y32": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y165": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 71,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y66": "FIFO18E1",
            "RAMB18_X2Y67": "RAMB18E1",
            "RAMB36_X2Y33": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y170": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 71,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y68": "FIFO18E1",
            "RAMB18_X2Y69": "RAMB18E1",
            "RAMB36_X2Y34": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y175": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 71,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y70": "FIFO18E1",
            "RAMB18_X2Y71": "RAMB18E1",
            "RAMB36_X2Y35": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y180": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 71,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y72": "FIFO18E1",
            "RAMB18_X2Y73": "RAMB18E1",
            "RAMB36_X2Y36": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y185": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 71,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y74": "FIFO18E1",
            "RAMB18_X2Y75": "RAMB18E1",
            "RAMB36_X2Y37": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y190": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 71,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y76": "FIFO18E1",
            "RAMB18_X2Y77": "RAMB18E1",
            "RAMB36_X2Y38": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y195": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 71,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y78": "FIFO18E1",
            "RAMB18_X2Y79": "RAMB18E1",
            "RAMB36_X2Y39": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y225": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 71,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y90": "FIFO18E1",
            "RAMB18_X2Y91": "RAMB18E1",
            "RAMB36_X2Y45": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y230": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 71,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y92": "FIFO18E1",
            "RAMB18_X2Y93": "RAMB18E1",
            "RAMB36_X2Y46": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y235": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 71,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y94": "FIFO18E1",
            "RAMB18_X2Y95": "RAMB18E1",
            "RAMB36_X2Y47": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y240": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 71,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y96": "FIFO18E1",
            "RAMB18_X2Y97": "RAMB18E1",
            "RAMB36_X2Y48": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X28Y245": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 71,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y98": "FIFO18E1",
            "RAMB18_X2Y99": "RAMB18E1",
            "RAMB36_X2Y49": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 100,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y20": "FIFO18E1",
            "RAMB18_X3Y21": "RAMB18E1",
            "RAMB36_X3Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 100,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y22": "FIFO18E1",
            "RAMB18_X3Y23": "RAMB18E1",
            "RAMB36_X3Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 100,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y24": "FIFO18E1",
            "RAMB18_X3Y25": "RAMB18E1",
            "RAMB36_X3Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 100,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y26": "FIFO18E1",
            "RAMB18_X3Y27": "RAMB18E1",
            "RAMB36_X3Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 100,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y28": "FIFO18E1",
            "RAMB18_X3Y29": "RAMB18E1",
            "RAMB36_X3Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 100,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y30": "FIFO18E1",
            "RAMB18_X3Y31": "RAMB18E1",
            "RAMB36_X3Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 100,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y32": "FIFO18E1",
            "RAMB18_X3Y33": "RAMB18E1",
            "RAMB36_X3Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 100,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y34": "FIFO18E1",
            "RAMB18_X3Y35": "RAMB18E1",
            "RAMB36_X3Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 100,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y36": "FIFO18E1",
            "RAMB18_X3Y37": "RAMB18E1",
            "RAMB36_X3Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 100,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y38": "FIFO18E1",
            "RAMB18_X3Y39": "RAMB18E1",
            "RAMB36_X3Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y100": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 100,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y40": "FIFO18E1",
            "RAMB18_X3Y41": "RAMB18E1",
            "RAMB36_X3Y20": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y105": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 100,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y42": "FIFO18E1",
            "RAMB18_X3Y43": "RAMB18E1",
            "RAMB36_X3Y21": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y110": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 100,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y44": "FIFO18E1",
            "RAMB18_X3Y45": "RAMB18E1",
            "RAMB36_X3Y22": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y115": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 100,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y46": "FIFO18E1",
            "RAMB18_X3Y47": "RAMB18E1",
            "RAMB36_X3Y23": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y120": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 100,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y48": "FIFO18E1",
            "RAMB18_X3Y49": "RAMB18E1",
            "RAMB36_X3Y24": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y125": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 100,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y50": "FIFO18E1",
            "RAMB18_X3Y51": "RAMB18E1",
            "RAMB36_X3Y25": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y130": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 100,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y52": "FIFO18E1",
            "RAMB18_X3Y53": "RAMB18E1",
            "RAMB36_X3Y26": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y135": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 100,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y54": "FIFO18E1",
            "RAMB18_X3Y55": "RAMB18E1",
            "RAMB36_X3Y27": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y140": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 100,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y56": "FIFO18E1",
            "RAMB18_X3Y57": "RAMB18E1",
            "RAMB36_X3Y28": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y145": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 100,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y58": "FIFO18E1",
            "RAMB18_X3Y59": "RAMB18E1",
            "RAMB36_X3Y29": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y150": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 100,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y60": "FIFO18E1",
            "RAMB18_X3Y61": "RAMB18E1",
            "RAMB36_X3Y30": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y155": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 100,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y62": "FIFO18E1",
            "RAMB18_X3Y63": "RAMB18E1",
            "RAMB36_X3Y31": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y160": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 100,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y64": "FIFO18E1",
            "RAMB18_X3Y65": "RAMB18E1",
            "RAMB36_X3Y32": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y165": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 100,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y66": "FIFO18E1",
            "RAMB18_X3Y67": "RAMB18E1",
            "RAMB36_X3Y33": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y170": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 100,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y68": "FIFO18E1",
            "RAMB18_X3Y69": "RAMB18E1",
            "RAMB36_X3Y34": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y175": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 100,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y70": "FIFO18E1",
            "RAMB18_X3Y71": "RAMB18E1",
            "RAMB36_X3Y35": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y180": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 100,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y72": "FIFO18E1",
            "RAMB18_X3Y73": "RAMB18E1",
            "RAMB36_X3Y36": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y185": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 100,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y74": "FIFO18E1",
            "RAMB18_X3Y75": "RAMB18E1",
            "RAMB36_X3Y37": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y190": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 100,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y76": "FIFO18E1",
            "RAMB18_X3Y77": "RAMB18E1",
            "RAMB36_X3Y38": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X40Y195": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 100,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y78": "FIFO18E1",
            "RAMB18_X3Y79": "RAMB18E1",
            "RAMB36_X3Y39": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20280",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 146,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y20": "FIFO18E1",
            "RAMB18_X5Y21": "RAMB18E1",
            "RAMB36_X5Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20280",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 146,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y22": "FIFO18E1",
            "RAMB18_X5Y23": "RAMB18E1",
            "RAMB36_X5Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20280",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 146,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y24": "FIFO18E1",
            "RAMB18_X5Y25": "RAMB18E1",
            "RAMB36_X5Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20280",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 146,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y26": "FIFO18E1",
            "RAMB18_X5Y27": "RAMB18E1",
            "RAMB36_X5Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20280",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 146,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y28": "FIFO18E1",
            "RAMB18_X5Y29": "RAMB18E1",
            "RAMB36_X5Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20280",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 146,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y30": "FIFO18E1",
            "RAMB18_X5Y31": "RAMB18E1",
            "RAMB36_X5Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20280",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 146,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y32": "FIFO18E1",
            "RAMB18_X5Y33": "RAMB18E1",
            "RAMB36_X5Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20280",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 146,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y34": "FIFO18E1",
            "RAMB18_X5Y35": "RAMB18E1",
            "RAMB36_X5Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20280",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 146,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y36": "FIFO18E1",
            "RAMB18_X5Y37": "RAMB18E1",
            "RAMB36_X5Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20280",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421D00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 146,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y38": "FIFO18E1",
            "RAMB18_X5Y39": "RAMB18E1",
            "RAMB36_X5Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y100": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00280",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401D00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 146,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y40": "FIFO18E1",
            "RAMB18_X5Y41": "RAMB18E1",
            "RAMB36_X5Y20": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y105": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00280",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401D00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 146,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y42": "FIFO18E1",
            "RAMB18_X5Y43": "RAMB18E1",
            "RAMB36_X5Y21": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y110": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00280",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401D00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 146,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y44": "FIFO18E1",
            "RAMB18_X5Y45": "RAMB18E1",
            "RAMB36_X5Y22": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y115": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00280",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401D00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 146,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y46": "FIFO18E1",
            "RAMB18_X5Y47": "RAMB18E1",
            "RAMB36_X5Y23": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y120": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00280",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401D00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 146,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y48": "FIFO18E1",
            "RAMB18_X5Y49": "RAMB18E1",
            "RAMB36_X5Y24": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y125": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00280",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401D00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 146,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y50": "FIFO18E1",
            "RAMB18_X5Y51": "RAMB18E1",
            "RAMB36_X5Y25": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y130": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00280",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401D00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 146,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y52": "FIFO18E1",
            "RAMB18_X5Y53": "RAMB18E1",
            "RAMB36_X5Y26": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y135": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00280",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401D00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 146,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y54": "FIFO18E1",
            "RAMB18_X5Y55": "RAMB18E1",
            "RAMB36_X5Y27": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y140": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00280",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401D00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 146,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y56": "FIFO18E1",
            "RAMB18_X5Y57": "RAMB18E1",
            "RAMB36_X5Y28": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y145": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00280",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401D00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 146,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y58": "FIFO18E1",
            "RAMB18_X5Y59": "RAMB18E1",
            "RAMB36_X5Y29": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y150": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800280",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 146,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y60": "FIFO18E1",
            "RAMB18_X5Y61": "RAMB18E1",
            "RAMB36_X5Y30": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y155": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800280",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 146,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y62": "FIFO18E1",
            "RAMB18_X5Y63": "RAMB18E1",
            "RAMB36_X5Y31": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y160": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800280",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 146,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y64": "FIFO18E1",
            "RAMB18_X5Y65": "RAMB18E1",
            "RAMB36_X5Y32": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y165": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800280",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 146,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y66": "FIFO18E1",
            "RAMB18_X5Y67": "RAMB18E1",
            "RAMB36_X5Y33": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y170": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800280",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 146,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y68": "FIFO18E1",
            "RAMB18_X5Y69": "RAMB18E1",
            "RAMB36_X5Y34": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y175": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800280",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 146,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y70": "FIFO18E1",
            "RAMB18_X5Y71": "RAMB18E1",
            "RAMB36_X5Y35": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y180": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800280",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 146,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y72": "FIFO18E1",
            "RAMB18_X5Y73": "RAMB18E1",
            "RAMB36_X5Y36": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y185": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800280",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 146,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y74": "FIFO18E1",
            "RAMB18_X5Y75": "RAMB18E1",
            "RAMB36_X5Y37": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y190": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800280",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 146,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y76": "FIFO18E1",
            "RAMB18_X5Y77": "RAMB18E1",
            "RAMB36_X5Y38": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X58Y195": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800280",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001D00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 146,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X5Y78": "FIFO18E1",
            "RAMB18_X5Y79": "RAMB18E1",
            "RAMB36_X5Y39": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40380",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00442C00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 216,
        "grid_y": 259,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y0": "FIFO18E1",
            "RAMB18_X7Y1": "RAMB18E1",
            "RAMB36_X7Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40380",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00442C00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 216,
        "grid_y": 254,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y2": "FIFO18E1",
            "RAMB18_X7Y3": "RAMB18E1",
            "RAMB36_X7Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40380",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00442C00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 216,
        "grid_y": 249,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y4": "FIFO18E1",
            "RAMB18_X7Y5": "RAMB18E1",
            "RAMB36_X7Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40380",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00442C00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 216,
        "grid_y": 244,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y6": "FIFO18E1",
            "RAMB18_X7Y7": "RAMB18E1",
            "RAMB36_X7Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40380",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00442C00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 216,
        "grid_y": 239,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y8": "FIFO18E1",
            "RAMB18_X7Y9": "RAMB18E1",
            "RAMB36_X7Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40380",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00442C00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 216,
        "grid_y": 233,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y10": "FIFO18E1",
            "RAMB18_X7Y11": "RAMB18E1",
            "RAMB36_X7Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40380",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00442C00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 216,
        "grid_y": 228,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y12": "FIFO18E1",
            "RAMB18_X7Y13": "RAMB18E1",
            "RAMB36_X7Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40380",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00442C00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 216,
        "grid_y": 223,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y14": "FIFO18E1",
            "RAMB18_X7Y15": "RAMB18E1",
            "RAMB36_X7Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40380",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00442C00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 216,
        "grid_y": 218,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y16": "FIFO18E1",
            "RAMB18_X7Y17": "RAMB18E1",
            "RAMB36_X7Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40380",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00442C00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 216,
        "grid_y": 213,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y18": "FIFO18E1",
            "RAMB18_X7Y19": "RAMB18E1",
            "RAMB36_X7Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20380",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422C00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 216,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y20": "FIFO18E1",
            "RAMB18_X7Y21": "RAMB18E1",
            "RAMB36_X7Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20380",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422C00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 216,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y22": "FIFO18E1",
            "RAMB18_X7Y23": "RAMB18E1",
            "RAMB36_X7Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20380",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422C00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 216,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y24": "FIFO18E1",
            "RAMB18_X7Y25": "RAMB18E1",
            "RAMB36_X7Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20380",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422C00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 216,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y26": "FIFO18E1",
            "RAMB18_X7Y27": "RAMB18E1",
            "RAMB36_X7Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20380",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422C00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 216,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y28": "FIFO18E1",
            "RAMB18_X7Y29": "RAMB18E1",
            "RAMB36_X7Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20380",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422C00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 216,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y30": "FIFO18E1",
            "RAMB18_X7Y31": "RAMB18E1",
            "RAMB36_X7Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20380",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422C00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 216,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y32": "FIFO18E1",
            "RAMB18_X7Y33": "RAMB18E1",
            "RAMB36_X7Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20380",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422C00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 216,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y34": "FIFO18E1",
            "RAMB18_X7Y35": "RAMB18E1",
            "RAMB36_X7Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20380",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422C00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 216,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y36": "FIFO18E1",
            "RAMB18_X7Y37": "RAMB18E1",
            "RAMB36_X7Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20380",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422C00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 216,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y38": "FIFO18E1",
            "RAMB18_X7Y39": "RAMB18E1",
            "RAMB36_X7Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y100": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00380",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00402C00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 216,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y40": "FIFO18E1",
            "RAMB18_X7Y41": "RAMB18E1",
            "RAMB36_X7Y20": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y105": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00380",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00402C00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 216,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y42": "FIFO18E1",
            "RAMB18_X7Y43": "RAMB18E1",
            "RAMB36_X7Y21": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y110": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00380",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00402C00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 216,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y44": "FIFO18E1",
            "RAMB18_X7Y45": "RAMB18E1",
            "RAMB36_X7Y22": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y115": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00380",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00402C00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 216,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y46": "FIFO18E1",
            "RAMB18_X7Y47": "RAMB18E1",
            "RAMB36_X7Y23": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y120": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00380",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00402C00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 216,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y48": "FIFO18E1",
            "RAMB18_X7Y49": "RAMB18E1",
            "RAMB36_X7Y24": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y125": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00380",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00402C00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 216,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y50": "FIFO18E1",
            "RAMB18_X7Y51": "RAMB18E1",
            "RAMB36_X7Y25": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y130": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00380",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00402C00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 216,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y52": "FIFO18E1",
            "RAMB18_X7Y53": "RAMB18E1",
            "RAMB36_X7Y26": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y135": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00380",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00402C00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 216,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y54": "FIFO18E1",
            "RAMB18_X7Y55": "RAMB18E1",
            "RAMB36_X7Y27": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y140": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00380",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00402C00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 216,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y56": "FIFO18E1",
            "RAMB18_X7Y57": "RAMB18E1",
            "RAMB36_X7Y28": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y145": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00380",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00402C00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 216,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y58": "FIFO18E1",
            "RAMB18_X7Y59": "RAMB18E1",
            "RAMB36_X7Y29": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y150": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800380",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00002C00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 216,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y60": "FIFO18E1",
            "RAMB18_X7Y61": "RAMB18E1",
            "RAMB36_X7Y30": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y155": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800380",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00002C00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 216,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y62": "FIFO18E1",
            "RAMB18_X7Y63": "RAMB18E1",
            "RAMB36_X7Y31": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y160": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800380",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00002C00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 216,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y64": "FIFO18E1",
            "RAMB18_X7Y65": "RAMB18E1",
            "RAMB36_X7Y32": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y165": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800380",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00002C00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 216,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y66": "FIFO18E1",
            "RAMB18_X7Y67": "RAMB18E1",
            "RAMB36_X7Y33": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y170": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800380",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00002C00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 216,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y68": "FIFO18E1",
            "RAMB18_X7Y69": "RAMB18E1",
            "RAMB36_X7Y34": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y175": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800380",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00002C00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 216,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y70": "FIFO18E1",
            "RAMB18_X7Y71": "RAMB18E1",
            "RAMB36_X7Y35": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y180": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800380",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00002C00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 216,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y72": "FIFO18E1",
            "RAMB18_X7Y73": "RAMB18E1",
            "RAMB36_X7Y36": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y185": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800380",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00002C00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 216,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y74": "FIFO18E1",
            "RAMB18_X7Y75": "RAMB18E1",
            "RAMB36_X7Y37": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y190": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800380",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00002C00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 216,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y76": "FIFO18E1",
            "RAMB18_X7Y77": "RAMB18E1",
            "RAMB36_X7Y38": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y195": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800380",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00002C00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 216,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y78": "FIFO18E1",
            "RAMB18_X7Y79": "RAMB18E1",
            "RAMB36_X7Y39": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y200": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820380",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00022C00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 216,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y80": "FIFO18E1",
            "RAMB18_X7Y81": "RAMB18E1",
            "RAMB36_X7Y40": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y205": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820380",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00022C00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 216,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y82": "FIFO18E1",
            "RAMB18_X7Y83": "RAMB18E1",
            "RAMB36_X7Y41": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y210": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820380",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00022C00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 216,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y84": "FIFO18E1",
            "RAMB18_X7Y85": "RAMB18E1",
            "RAMB36_X7Y42": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y215": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820380",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00022C00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 216,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y86": "FIFO18E1",
            "RAMB18_X7Y87": "RAMB18E1",
            "RAMB36_X7Y43": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y220": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820380",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00022C00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 216,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y88": "FIFO18E1",
            "RAMB18_X7Y89": "RAMB18E1",
            "RAMB36_X7Y44": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y225": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820380",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00022C00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 216,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y90": "FIFO18E1",
            "RAMB18_X7Y91": "RAMB18E1",
            "RAMB36_X7Y45": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y230": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820380",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00022C00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 216,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y92": "FIFO18E1",
            "RAMB18_X7Y93": "RAMB18E1",
            "RAMB36_X7Y46": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y235": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820380",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00022C00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 216,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y94": "FIFO18E1",
            "RAMB18_X7Y95": "RAMB18E1",
            "RAMB36_X7Y47": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y240": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820380",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00022C00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 216,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y96": "FIFO18E1",
            "RAMB18_X7Y97": "RAMB18E1",
            "RAMB36_X7Y48": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X88Y245": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820380",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00022C00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 216,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "RAMB18_X7Y98": "FIFO18E1",
            "RAMB18_X7Y99": "RAMB18E1",
            "RAMB36_X7Y49": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_R_X17Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40080",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440880",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 259,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y0": "FIFO18E1",
            "RAMB18_X1Y1": "RAMB18E1",
            "RAMB36_X1Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40080",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440880",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 254,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y2": "FIFO18E1",
            "RAMB18_X1Y3": "RAMB18E1",
            "RAMB36_X1Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40080",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440880",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 249,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y4": "FIFO18E1",
            "RAMB18_X1Y5": "RAMB18E1",
            "RAMB36_X1Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40080",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440880",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 244,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y6": "FIFO18E1",
            "RAMB18_X1Y7": "RAMB18E1",
            "RAMB36_X1Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40080",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440880",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 239,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y8": "FIFO18E1",
            "RAMB18_X1Y9": "RAMB18E1",
            "RAMB36_X1Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40080",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440880",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 233,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y10": "FIFO18E1",
            "RAMB18_X1Y11": "RAMB18E1",
            "RAMB36_X1Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40080",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440880",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 228,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y12": "FIFO18E1",
            "RAMB18_X1Y13": "RAMB18E1",
            "RAMB36_X1Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40080",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440880",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 223,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y14": "FIFO18E1",
            "RAMB18_X1Y15": "RAMB18E1",
            "RAMB36_X1Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40080",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440880",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 218,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y16": "FIFO18E1",
            "RAMB18_X1Y17": "RAMB18E1",
            "RAMB36_X1Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40080",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00440880",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 213,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y18": "FIFO18E1",
            "RAMB18_X1Y19": "RAMB18E1",
            "RAMB36_X1Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y20": "FIFO18E1",
            "RAMB18_X1Y21": "RAMB18E1",
            "RAMB36_X1Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y22": "FIFO18E1",
            "RAMB18_X1Y23": "RAMB18E1",
            "RAMB36_X1Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y24": "FIFO18E1",
            "RAMB18_X1Y25": "RAMB18E1",
            "RAMB36_X1Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y26": "FIFO18E1",
            "RAMB18_X1Y27": "RAMB18E1",
            "RAMB36_X1Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y28": "FIFO18E1",
            "RAMB18_X1Y29": "RAMB18E1",
            "RAMB36_X1Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y30": "FIFO18E1",
            "RAMB18_X1Y31": "RAMB18E1",
            "RAMB36_X1Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y32": "FIFO18E1",
            "RAMB18_X1Y33": "RAMB18E1",
            "RAMB36_X1Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y34": "FIFO18E1",
            "RAMB18_X1Y35": "RAMB18E1",
            "RAMB36_X1Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y36": "FIFO18E1",
            "RAMB18_X1Y37": "RAMB18E1",
            "RAMB36_X1Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y38": "FIFO18E1",
            "RAMB18_X1Y39": "RAMB18E1",
            "RAMB36_X1Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y100": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y40": "FIFO18E1",
            "RAMB18_X1Y41": "RAMB18E1",
            "RAMB36_X1Y20": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y105": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y42": "FIFO18E1",
            "RAMB18_X1Y43": "RAMB18E1",
            "RAMB36_X1Y21": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y110": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y44": "FIFO18E1",
            "RAMB18_X1Y45": "RAMB18E1",
            "RAMB36_X1Y22": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y115": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y46": "FIFO18E1",
            "RAMB18_X1Y47": "RAMB18E1",
            "RAMB36_X1Y23": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y120": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y48": "FIFO18E1",
            "RAMB18_X1Y49": "RAMB18E1",
            "RAMB36_X1Y24": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y125": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y50": "FIFO18E1",
            "RAMB18_X1Y51": "RAMB18E1",
            "RAMB36_X1Y25": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y130": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y52": "FIFO18E1",
            "RAMB18_X1Y53": "RAMB18E1",
            "RAMB36_X1Y26": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y135": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y54": "FIFO18E1",
            "RAMB18_X1Y55": "RAMB18E1",
            "RAMB36_X1Y27": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y140": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y56": "FIFO18E1",
            "RAMB18_X1Y57": "RAMB18E1",
            "RAMB36_X1Y28": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y145": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
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                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y58": "FIFO18E1",
            "RAMB18_X1Y59": "RAMB18E1",
            "RAMB36_X1Y29": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y150": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y60": "FIFO18E1",
            "RAMB18_X1Y61": "RAMB18E1",
            "RAMB36_X1Y30": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y155": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y62": "FIFO18E1",
            "RAMB18_X1Y63": "RAMB18E1",
            "RAMB36_X1Y31": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y160": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
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                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y64": "FIFO18E1",
            "RAMB18_X1Y65": "RAMB18E1",
            "RAMB36_X1Y32": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y165": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
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                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y66": "FIFO18E1",
            "RAMB18_X1Y67": "RAMB18E1",
            "RAMB36_X1Y33": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y170": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
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                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y68": "FIFO18E1",
            "RAMB18_X1Y69": "RAMB18E1",
            "RAMB36_X1Y34": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y175": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
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                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y70": "FIFO18E1",
            "RAMB18_X1Y71": "RAMB18E1",
            "RAMB36_X1Y35": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y180": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
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                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y72": "FIFO18E1",
            "RAMB18_X1Y73": "RAMB18E1",
            "RAMB36_X1Y36": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y185": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
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                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y74": "FIFO18E1",
            "RAMB18_X1Y75": "RAMB18E1",
            "RAMB36_X1Y37": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y190": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
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                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y76": "FIFO18E1",
            "RAMB18_X1Y77": "RAMB18E1",
            "RAMB36_X1Y38": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y195": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 48,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y78": "FIFO18E1",
            "RAMB18_X1Y79": "RAMB18E1",
            "RAMB36_X1Y39": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y200": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 48,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y80": "FIFO18E1",
            "RAMB18_X1Y81": "RAMB18E1",
            "RAMB36_X1Y40": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y205": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 48,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y82": "FIFO18E1",
            "RAMB18_X1Y83": "RAMB18E1",
            "RAMB36_X1Y41": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y210": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 48,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y84": "FIFO18E1",
            "RAMB18_X1Y85": "RAMB18E1",
            "RAMB36_X1Y42": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y215": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 48,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y86": "FIFO18E1",
            "RAMB18_X1Y87": "RAMB18E1",
            "RAMB36_X1Y43": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y220": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 48,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y88": "FIFO18E1",
            "RAMB18_X1Y89": "RAMB18E1",
            "RAMB36_X1Y44": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y225": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 48,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y90": "FIFO18E1",
            "RAMB18_X1Y91": "RAMB18E1",
            "RAMB36_X1Y45": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y230": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 48,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y92": "FIFO18E1",
            "RAMB18_X1Y93": "RAMB18E1",
            "RAMB36_X1Y46": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y235": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 48,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y94": "FIFO18E1",
            "RAMB18_X1Y95": "RAMB18E1",
            "RAMB36_X1Y47": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y240": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 48,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y96": "FIFO18E1",
            "RAMB18_X1Y97": "RAMB18E1",
            "RAMB36_X1Y48": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y245": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 48,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y98": "FIFO18E1",
            "RAMB18_X1Y99": "RAMB18E1",
            "RAMB36_X1Y49": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X51Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20200",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421980",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 129,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "RAMB18_X4Y20": "FIFO18E1",
            "RAMB18_X4Y21": "RAMB18E1",
            "RAMB36_X4Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X51Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20200",
                "frames": 128,
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        },
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        },
        "type": "BRAM_R"
    },
    "BRAM_R_X51Y60": {
        "bits": {
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                "baseaddr": "0x00C20200",
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        },
        "type": "BRAM_R"
    },
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        },
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        },
        "type": "BRAM_R"
    },
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            },
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        },
        "type": "BRAM_R"
    },
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        },
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        },
        "type": "BRAM_R"
    },
    "BRAM_R_X51Y80": {
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            },
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        },
        "type": "BRAM_R"
    },
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        },
        "type": "BRAM_R"
    },
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        },
        "type": "BRAM_R"
    },
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        },
        "type": "BRAM_R"
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        },
        "type": "BRAM_R"
    },
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        },
        "type": "BRAM_R"
    },
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        },
        "type": "BRAM_R"
    },
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        "type": "BRAM_R"
    },
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        },
        "type": "BRAM_R"
    },
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        },
        "type": "BRAM_R"
    },
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        },
        "type": "BRAM_R"
    },
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        "type": "BRAM_R"
    },
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        },
        "type": "BRAM_R"
    },
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        "type": "BRAM_R"
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        "type": "BRAM_R"
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        "type": "BRAM_R"
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        "type": "BRAM_R"
    },
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        "pin_functions": {},
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        "type": "BRAM_R"
    },
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        },
        "type": "BRAM_R"
    },
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        },
        "type": "BRAM_R"
    },
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            "RAMB36_X4Y36": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
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        "clock_region": "X0Y3",
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        },
        "type": "BRAM_R"
    },
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            },
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
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            "RAMB36_X4Y38": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X51Y195": {
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        },
        "clock_region": "X0Y3",
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        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y50": {
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                "words": 10
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            "CLB_IO_CLK": {
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        "clock_region": "X1Y1",
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        "grid_y": 207,
        "pin_functions": {},
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            "RAMB18_X6Y20": "FIFO18E1",
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            "RAMB36_X6Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y55": {
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                "baseaddr": "0x00C20300",
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                "words": 10
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            "CLB_IO_CLK": {
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                "words": 10
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        },
        "clock_region": "X1Y1",
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        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y22": "FIFO18E1",
            "RAMB18_X6Y23": "RAMB18E1",
            "RAMB36_X6Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y60": {
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                "baseaddr": "0x00C20300",
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                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
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                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 175,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y24": "FIFO18E1",
            "RAMB18_X6Y25": "RAMB18E1",
            "RAMB36_X6Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20300",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422280",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y26": "FIFO18E1",
            "RAMB18_X6Y27": "RAMB18E1",
            "RAMB36_X6Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20300",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422280",
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                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y28": "FIFO18E1",
            "RAMB18_X6Y29": "RAMB18E1",
            "RAMB36_X6Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20300",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
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                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y30": "FIFO18E1",
            "RAMB18_X6Y31": "RAMB18E1",
            "RAMB36_X6Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20300",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00422280",
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                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y32": "FIFO18E1",
            "RAMB18_X6Y33": "RAMB18E1",
            "RAMB36_X6Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20300",
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                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
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                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y34": "FIFO18E1",
            "RAMB18_X6Y35": "RAMB18E1",
            "RAMB36_X6Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20300",
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                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
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                "offset": 81,
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            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y36": "FIFO18E1",
            "RAMB18_X6Y37": "RAMB18E1",
            "RAMB36_X6Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20300",
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                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
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                "words": 10
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y38": "FIFO18E1",
            "RAMB18_X6Y39": "RAMB18E1",
            "RAMB36_X6Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y100": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00300",
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                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00402280",
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                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y40": "FIFO18E1",
            "RAMB18_X6Y41": "RAMB18E1",
            "RAMB36_X6Y20": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y105": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00300",
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                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00402280",
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                "words": 10
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y42": "FIFO18E1",
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            "RAMB36_X6Y21": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y110": {
        "bits": {
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                "baseaddr": "0x00C00300",
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                "words": 10
            },
            "CLB_IO_CLK": {
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            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 145,
        "pin_functions": {},
        "sites": {
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            "RAMB36_X6Y22": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y115": {
        "bits": {
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                "words": 10
            },
            "CLB_IO_CLK": {
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            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 140,
        "pin_functions": {},
        "sites": {
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            "RAMB18_X6Y47": "RAMB18E1",
            "RAMB36_X6Y23": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y120": {
        "bits": {
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                "words": 10
            },
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                "words": 10
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y48": "FIFO18E1",
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            "RAMB36_X6Y24": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y125": {
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                "baseaddr": "0x00C00300",
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                "words": 10
            },
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                "words": 10
            }
        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y50": "FIFO18E1",
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            "RAMB36_X6Y25": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y130": {
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            },
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            }
        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
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        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y135": {
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                "baseaddr": "0x00C00300",
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                "words": 10
            },
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            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 119,
        "pin_functions": {},
        "sites": {
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            "RAMB36_X6Y27": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y140": {
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                "baseaddr": "0x00C00300",
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                "words": 10
            },
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            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y56": "FIFO18E1",
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        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y145": {
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            },
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            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y58": "FIFO18E1",
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        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y150": {
        "bits": {
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                "baseaddr": "0x00800300",
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            },
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            }
        },
        "clock_region": "X1Y3",
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        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y60": "FIFO18E1",
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            "RAMB36_X6Y30": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y155": {
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                "baseaddr": "0x00800300",
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                "words": 10
            },
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                "words": 10
            }
        },
        "clock_region": "X1Y3",
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        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y62": "FIFO18E1",
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        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y160": {
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                "baseaddr": "0x00800300",
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                "words": 10
            },
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                "words": 10
            }
        },
        "clock_region": "X1Y3",
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        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y64": "FIFO18E1",
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        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y165": {
        "bits": {
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                "baseaddr": "0x00800300",
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                "offset": 30,
                "words": 10
            },
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                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
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        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y66": "FIFO18E1",
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            "RAMB36_X6Y33": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y170": {
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                "baseaddr": "0x00800300",
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                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
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                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
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        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y68": "FIFO18E1",
            "RAMB18_X6Y69": "RAMB18E1",
            "RAMB36_X6Y34": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y175": {
        "bits": {
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                "baseaddr": "0x00800300",
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                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
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                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 175,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y70": "FIFO18E1",
            "RAMB18_X6Y71": "RAMB18E1",
            "RAMB36_X6Y35": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y180": {
        "bits": {
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                "baseaddr": "0x00800300",
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                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
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                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 175,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y72": "FIFO18E1",
            "RAMB18_X6Y73": "RAMB18E1",
            "RAMB36_X6Y36": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y185": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800300",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
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                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 175,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y74": "FIFO18E1",
            "RAMB18_X6Y75": "RAMB18E1",
            "RAMB36_X6Y37": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y190": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800300",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
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                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 175,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y76": "FIFO18E1",
            "RAMB18_X6Y77": "RAMB18E1",
            "RAMB36_X6Y38": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X69Y195": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800300",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
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                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 175,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X6Y78": "FIFO18E1",
            "RAMB18_X6Y79": "RAMB18E1",
            "RAMB36_X6Y39": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40400",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00443180",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 245,
        "grid_y": 259,
        "pin_functions": {},
        "sites": {
            "RAMB18_X8Y0": "FIFO18E1",
            "RAMB18_X8Y1": "RAMB18E1",
            "RAMB36_X8Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40400",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00443180",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 245,
        "grid_y": 254,
        "pin_functions": {},
        "sites": {
            "RAMB18_X8Y2": "FIFO18E1",
            "RAMB18_X8Y3": "RAMB18E1",
            "RAMB36_X8Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40400",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00443180",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 245,
        "grid_y": 249,
        "pin_functions": {},
        "sites": {
            "RAMB18_X8Y4": "FIFO18E1",
            "RAMB18_X8Y5": "RAMB18E1",
            "RAMB36_X8Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40400",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00443180",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 245,
        "grid_y": 244,
        "pin_functions": {},
        "sites": {
            "RAMB18_X8Y6": "FIFO18E1",
            "RAMB18_X8Y7": "RAMB18E1",
            "RAMB36_X8Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40400",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00443180",
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                "words": 10
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 239,
        "pin_functions": {},
        "sites": {
            "RAMB18_X8Y8": "FIFO18E1",
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            "RAMB36_X8Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y25": {
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            "BLOCK_RAM": {
                "baseaddr": "0x00C40400",
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                "words": 10
            },
            "CLB_IO_CLK": {
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            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "RAMB18_X8Y10": "FIFO18E1",
            "RAMB18_X8Y11": "RAMB18E1",
            "RAMB36_X8Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C40400",
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                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00443180",
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            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "RAMB18_X8Y12": "FIFO18E1",
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            "RAMB36_X8Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y35": {
        "bits": {
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                "baseaddr": "0x00C40400",
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                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
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            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "RAMB18_X8Y14": "FIFO18E1",
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            "RAMB36_X8Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y40": {
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            "BLOCK_RAM": {
                "baseaddr": "0x00C40400",
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                "words": 10
            },
            "CLB_IO_CLK": {
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            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
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        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y45": {
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                "baseaddr": "0x00C40400",
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                "words": 10
            },
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            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
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        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20400",
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            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00423180",
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        },
        "clock_region": "X1Y1",
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        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "RAMB18_X8Y20": "FIFO18E1",
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        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y55": {
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            },
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
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        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y60": {
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                "baseaddr": "0x00C20400",
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            },
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
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        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y65": {
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            },
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            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
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        },
        "type": "BRAM_R"
    },
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            },
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        },
        "clock_region": "X1Y1",
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        "sites": {
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        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y75": {
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        },
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        "pin_functions": {},
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        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y80": {
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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        },
        "type": "BRAM_R"
    },
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        },
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        "pin_functions": {},
        "sites": {
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        },
        "type": "BRAM_R"
    },
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        "pin_functions": {},
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        },
        "type": "BRAM_R"
    },
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        "pin_functions": {},
        "sites": {
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        },
        "type": "BRAM_R"
    },
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        },
        "clock_region": "X1Y2",
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        },
        "type": "BRAM_R"
    },
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        },
        "type": "BRAM_R"
    },
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        "pin_functions": {},
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        },
        "type": "BRAM_R"
    },
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        "clock_region": "X1Y2",
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        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y120": {
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            },
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            }
        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
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        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y125": {
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            },
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            }
        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "RAMB36_X8Y25": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y130": {
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            },
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            }
        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
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            "RAMB36_X8Y26": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y135": {
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            },
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            }
        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
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            "RAMB36_X8Y27": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y140": {
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                "baseaddr": "0x00C00400",
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                "words": 10
            },
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            }
        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "RAMB18_X8Y56": "FIFO18E1",
            "RAMB18_X8Y57": "RAMB18E1",
            "RAMB36_X8Y28": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y145": {
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                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
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            }
        },
        "clock_region": "X1Y2",
        "grid_x": 245,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X8Y58": "FIFO18E1",
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            "RAMB36_X8Y29": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y150": {
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                "baseaddr": "0x00800400",
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                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00003180",
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                "words": 10
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        },
        "clock_region": "X1Y3",
        "grid_x": 245,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X8Y60": "FIFO18E1",
            "RAMB18_X8Y61": "RAMB18E1",
            "RAMB36_X8Y30": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y155": {
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                "baseaddr": "0x00800400",
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                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00003180",
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                "offset": 10,
                "words": 10
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        },
        "clock_region": "X1Y3",
        "grid_x": 245,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "RAMB18_X8Y62": "FIFO18E1",
            "RAMB18_X8Y63": "RAMB18E1",
            "RAMB36_X8Y31": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y160": {
        "bits": {
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                "baseaddr": "0x00800400",
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                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00003180",
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                "offset": 20,
                "words": 10
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        },
        "clock_region": "X1Y3",
        "grid_x": 245,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "RAMB18_X8Y64": "FIFO18E1",
            "RAMB18_X8Y65": "RAMB18E1",
            "RAMB36_X8Y32": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y165": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800400",
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                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00003180",
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                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 245,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "RAMB18_X8Y66": "FIFO18E1",
            "RAMB18_X8Y67": "RAMB18E1",
            "RAMB36_X8Y33": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X99Y170": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800400",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00003180",
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                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 245,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
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    "CLBLL_L_X102Y129": {
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        "type": "CLBLM_L"
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        },
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        "type": "CLBLM_L"
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                "baseaddr": "0x00442700",
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        "type": "CLBLM_L"
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                "words": 2
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        "type": "CLBLM_L"
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    "CLBLM_L_X78Y28": {
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                "baseaddr": "0x00442700",
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                "words": 2
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        },
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        "sites": {
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            "SLICE_X121Y28": "SLICEL"
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                "offset": 46,
                "words": 2
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        },
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        "sites": {
            "SLICE_X120Y73": "SLICEM",
            "SLICE_X121Y73": "SLICEL"
        },
        "type": "CLBLM_L"
    },
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        "bits": {
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                "baseaddr": "0x00422700",
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        },
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            "SLICE_X120Y74": "SLICEM",
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        "type": "CLBLM_L"
    },
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        "bits": {
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                "baseaddr": "0x00422700",
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        },
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            "SLICE_X120Y75": "SLICEM",
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        "type": "CLBLM_L"
    },
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                "baseaddr": "0x00422700",
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        },
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            "SLICE_X120Y76": "SLICEM",
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        "type": "CLBLM_L"
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        "bits": {
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        },
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        },
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            "SLICE_X120Y78": "SLICEM",
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        "type": "CLBLM_L"
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                "baseaddr": "0x00422700",
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            "SLICE_X120Y79": "SLICEM",
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        },
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        },
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        "type": "CLBLM_L"
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        },
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                "baseaddr": "0x00402700",
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                "words": 2
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        },
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        },
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        "type": "CLBLM_L"
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        "type": "CLBLM_L"
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        "type": "CLBLM_L"
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                "baseaddr": "0x00402700",
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                "words": 2
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        "type": "CLBLM_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402700",
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        },
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        "type": "CLBLM_L"
    },
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            "CLB_IO_CLK": {
                "baseaddr": "0x00402700",
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                "words": 2
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        },
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        "type": "CLBLM_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402700",
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                "words": 2
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        },
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            "SLICE_X120Y112": "SLICEM",
            "SLICE_X121Y112": "SLICEL"
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        "type": "CLBLM_L"
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    "CLBLM_L_X78Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402700",
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                "offset": 26,
                "words": 2
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        },
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            "SLICE_X120Y113": "SLICEM",
            "SLICE_X121Y113": "SLICEL"
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        "type": "CLBLM_L"
    },
    "CLBLM_L_X78Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402700",
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                "words": 2
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        },
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        "pin_functions": {},
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            "SLICE_X120Y114": "SLICEM",
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        "type": "CLBLM_L"
    },
    "CLBLM_L_X78Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402700",
                "frames": 36,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "SLICE_X120Y115": "SLICEM",
            "SLICE_X121Y115": "SLICEL"
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        "type": "CLBLM_L"
    },
    "CLBLM_L_X78Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402700",
                "frames": 36,
                "offset": 32,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "SLICE_X120Y116": "SLICEM",
            "SLICE_X121Y116": "SLICEL"
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        "type": "CLBLM_L"
    },
    "CLBLM_L_X78Y117": {
        "bits": {
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            "SLICE_X121Y205": "SLICEL"
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                "baseaddr": "0x00022700",
                "frames": 36,
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        },
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        },
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        },
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        },
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            "BUFGCTRL_X0Y5": "BUFGCTRL",
            "BUFGCTRL_X0Y6": "BUFGCTRL",
            "BUFGCTRL_X0Y7": "BUFGCTRL",
            "BUFGCTRL_X0Y8": "BUFGCTRL",
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            "BUFGCTRL_X0Y12": "BUFGCTRL",
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    "CLK_HROW_TOP_R_X139Y182": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 30,
                "offset": 42,
                "words": 18
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 139,
        "grid_y": 78,
        "pin_functions": {},
        "sites": {
            "BUFHCE_X0Y36": "BUFHCE",
            "BUFHCE_X0Y37": "BUFHCE",
            "BUFHCE_X0Y38": "BUFHCE",
            "BUFHCE_X0Y39": "BUFHCE",
            "BUFHCE_X0Y40": "BUFHCE",
            "BUFHCE_X0Y41": "BUFHCE",
            "BUFHCE_X0Y42": "BUFHCE",
            "BUFHCE_X0Y43": "BUFHCE",
            "BUFHCE_X0Y44": "BUFHCE",
            "BUFHCE_X0Y45": "BUFHCE",
            "BUFHCE_X0Y46": "BUFHCE",
            "BUFHCE_X0Y47": "BUFHCE",
            "BUFHCE_X1Y36": "BUFHCE",
            "BUFHCE_X1Y37": "BUFHCE",
            "BUFHCE_X1Y38": "BUFHCE",
            "BUFHCE_X1Y39": "BUFHCE",
            "BUFHCE_X1Y40": "BUFHCE",
            "BUFHCE_X1Y41": "BUFHCE",
            "BUFHCE_X1Y42": "BUFHCE",
            "BUFHCE_X1Y43": "BUFHCE",
            "BUFHCE_X1Y44": "BUFHCE",
            "BUFHCE_X1Y45": "BUFHCE",
            "BUFHCE_X1Y46": "BUFHCE",
            "BUFHCE_X1Y47": "BUFHCE"
        },
        "type": "CLK_HROW_TOP_R"
    },
    "CLK_HROW_TOP_R_X139Y234": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021B80",
                "frames": 30,
                "offset": 42,
                "words": 18
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 139,
        "grid_y": 26,
        "pin_functions": {},
        "sites": {
            "BUFHCE_X0Y48": "BUFHCE",
            "BUFHCE_X0Y49": "BUFHCE",
            "BUFHCE_X0Y50": "BUFHCE",
            "BUFHCE_X0Y51": "BUFHCE",
            "BUFHCE_X0Y52": "BUFHCE",
            "BUFHCE_X0Y53": "BUFHCE",
            "BUFHCE_X0Y54": "BUFHCE",
            "BUFHCE_X0Y55": "BUFHCE",
            "BUFHCE_X0Y56": "BUFHCE",
            "BUFHCE_X0Y57": "BUFHCE",
            "BUFHCE_X0Y58": "BUFHCE",
            "BUFHCE_X0Y59": "BUFHCE",
            "BUFHCE_X1Y48": "BUFHCE",
            "BUFHCE_X1Y49": "BUFHCE",
            "BUFHCE_X1Y50": "BUFHCE",
            "BUFHCE_X1Y51": "BUFHCE",
            "BUFHCE_X1Y52": "BUFHCE",
            "BUFHCE_X1Y53": "BUFHCE",
            "BUFHCE_X1Y54": "BUFHCE",
            "BUFHCE_X1Y55": "BUFHCE",
            "BUFHCE_X1Y56": "BUFHCE",
            "BUFHCE_X1Y57": "BUFHCE",
            "BUFHCE_X1Y58": "BUFHCE",
            "BUFHCE_X1Y59": "BUFHCE"
        },
        "type": "CLK_HROW_TOP_R"
    },
    "CLK_MTBF2_X139Y151": {
        "bits": {},
        "grid_x": 139,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_MTBF2"
    },
    "CLK_PMV2_SVT_X139Y138": {
        "bits": {},
        "grid_x": 139,
        "grid_y": 122,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_PMV2_SVT"
    },
    "CLK_PMV2_X139Y147": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 139,
        "grid_y": 113,
        "pin_functions": {},
        "sites": {
            "PMV_X0Y2": "PMV2"
        },
        "type": "CLK_PMV2"
    },
    "CLK_PMVIOB_X139Y122": {
        "bits": {},
        "grid_x": 139,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_PMVIOB"
    },
    "CLK_PMV_X139Y106": {
        "bits": {},
        "grid_x": 139,
        "grid_y": 154,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_PMV"
    },
    "CLK_TERM_X139Y0": {
        "bits": {},
        "grid_x": 139,
        "grid_y": 260,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_TERM"
    },
    "CLK_TERM_X139Y260": {
        "bits": {},
        "grid_x": 139,
        "grid_y": 0,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_TERM"
    },
    "CMT_FIFO_L_X257Y8": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 257,
        "grid_y": 252,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y0": "IN_FIFO",
            "OUT_FIFO_X1Y0": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X257Y20": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 257,
        "grid_y": 240,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y1": "IN_FIFO",
            "OUT_FIFO_X1Y1": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X257Y33": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 257,
        "grid_y": 227,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y2": "IN_FIFO",
            "OUT_FIFO_X1Y2": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X257Y45": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 257,
        "grid_y": 215,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y3": "IN_FIFO",
            "OUT_FIFO_X1Y3": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X257Y60": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 257,
        "grid_y": 200,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y4": "IN_FIFO",
            "OUT_FIFO_X1Y4": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X257Y72": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 257,
        "grid_y": 188,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y5": "IN_FIFO",
            "OUT_FIFO_X1Y5": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X257Y85": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 257,
        "grid_y": 175,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y6": "IN_FIFO",
            "OUT_FIFO_X1Y6": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X257Y97": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 257,
        "grid_y": 163,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y7": "IN_FIFO",
            "OUT_FIFO_X1Y7": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X257Y112": {
        "bits": {},
        "clock_region": "X1Y2",
        "grid_x": 257,
        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y8": "IN_FIFO",
            "OUT_FIFO_X1Y8": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X257Y124": {
        "bits": {},
        "clock_region": "X1Y2",
        "grid_x": 257,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y9": "IN_FIFO",
            "OUT_FIFO_X1Y9": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X257Y137": {
        "bits": {},
        "clock_region": "X1Y2",
        "grid_x": 257,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y10": "IN_FIFO",
            "OUT_FIFO_X1Y10": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X257Y149": {
        "bits": {},
        "clock_region": "X1Y2",
        "grid_x": 257,
        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y11": "IN_FIFO",
            "OUT_FIFO_X1Y11": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X257Y164": {
        "bits": {},
        "clock_region": "X1Y3",
        "grid_x": 257,
        "grid_y": 96,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y12": "IN_FIFO",
            "OUT_FIFO_X1Y12": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X257Y176": {
        "bits": {},
        "clock_region": "X1Y3",
        "grid_x": 257,
        "grid_y": 84,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y13": "IN_FIFO",
            "OUT_FIFO_X1Y13": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X257Y189": {
        "bits": {},
        "clock_region": "X1Y3",
        "grid_x": 257,
        "grid_y": 71,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y14": "IN_FIFO",
            "OUT_FIFO_X1Y14": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X257Y201": {
        "bits": {},
        "clock_region": "X1Y3",
        "grid_x": 257,
        "grid_y": 59,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y15": "IN_FIFO",
            "OUT_FIFO_X1Y15": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X257Y216": {
        "bits": {},
        "clock_region": "X1Y4",
        "grid_x": 257,
        "grid_y": 44,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y16": "IN_FIFO",
            "OUT_FIFO_X1Y16": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X257Y228": {
        "bits": {},
        "clock_region": "X1Y4",
        "grid_x": 257,
        "grid_y": 32,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y17": "IN_FIFO",
            "OUT_FIFO_X1Y17": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X257Y241": {
        "bits": {},
        "clock_region": "X1Y4",
        "grid_x": 257,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y18": "IN_FIFO",
            "OUT_FIFO_X1Y18": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X257Y253": {
        "bits": {},
        "clock_region": "X1Y4",
        "grid_x": 257,
        "grid_y": 7,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y19": "IN_FIFO",
            "OUT_FIFO_X1Y19": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_R_X7Y8": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 252,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y0": "IN_FIFO",
            "OUT_FIFO_X0Y0": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y20": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 240,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y1": "IN_FIFO",
            "OUT_FIFO_X0Y1": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y33": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 227,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y2": "IN_FIFO",
            "OUT_FIFO_X0Y2": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y45": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 215,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y3": "IN_FIFO",
            "OUT_FIFO_X0Y3": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y60": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 7,
        "grid_y": 200,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y4": "IN_FIFO",
            "OUT_FIFO_X0Y4": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y72": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 7,
        "grid_y": 188,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y5": "IN_FIFO",
            "OUT_FIFO_X0Y5": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y85": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 7,
        "grid_y": 175,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y6": "IN_FIFO",
            "OUT_FIFO_X0Y6": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y97": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 7,
        "grid_y": 163,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y7": "IN_FIFO",
            "OUT_FIFO_X0Y7": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y112": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 7,
        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y8": "IN_FIFO",
            "OUT_FIFO_X0Y8": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y124": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 7,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y9": "IN_FIFO",
            "OUT_FIFO_X0Y9": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y137": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 7,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y10": "IN_FIFO",
            "OUT_FIFO_X0Y10": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y149": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 7,
        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y11": "IN_FIFO",
            "OUT_FIFO_X0Y11": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y164": {
        "bits": {},
        "clock_region": "X0Y3",
        "grid_x": 7,
        "grid_y": 96,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y12": "IN_FIFO",
            "OUT_FIFO_X0Y12": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y176": {
        "bits": {},
        "clock_region": "X0Y3",
        "grid_x": 7,
        "grid_y": 84,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y13": "IN_FIFO",
            "OUT_FIFO_X0Y13": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y189": {
        "bits": {},
        "clock_region": "X0Y3",
        "grid_x": 7,
        "grid_y": 71,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y14": "IN_FIFO",
            "OUT_FIFO_X0Y14": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y201": {
        "bits": {},
        "clock_region": "X0Y3",
        "grid_x": 7,
        "grid_y": 59,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y15": "IN_FIFO",
            "OUT_FIFO_X0Y15": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y216": {
        "bits": {},
        "clock_region": "X0Y4",
        "grid_x": 7,
        "grid_y": 44,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y16": "IN_FIFO",
            "OUT_FIFO_X0Y16": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y228": {
        "bits": {},
        "clock_region": "X0Y4",
        "grid_x": 7,
        "grid_y": 32,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y17": "IN_FIFO",
            "OUT_FIFO_X0Y17": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y241": {
        "bits": {},
        "clock_region": "X0Y4",
        "grid_x": 7,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y18": "IN_FIFO",
            "OUT_FIFO_X0Y18": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y253": {
        "bits": {},
        "clock_region": "X0Y4",
        "grid_x": 7,
        "grid_y": 7,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y19": "IN_FIFO",
            "OUT_FIFO_X0Y19": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_PMV_L_X257Y1": {
        "bits": {},
        "grid_x": 257,
        "grid_y": 259,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X257Y51": {
        "bits": {},
        "grid_x": 257,
        "grid_y": 209,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X257Y53": {
        "bits": {},
        "grid_x": 257,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X257Y103": {
        "bits": {},
        "grid_x": 257,
        "grid_y": 157,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X257Y105": {
        "bits": {},
        "grid_x": 257,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X257Y155": {
        "bits": {},
        "grid_x": 257,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X257Y157": {
        "bits": {},
        "grid_x": 257,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X257Y207": {
        "bits": {},
        "grid_x": 257,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X257Y209": {
        "bits": {},
        "grid_x": 257,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X257Y259": {
        "bits": {},
        "grid_x": 257,
        "grid_y": 1,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_X7Y1": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 259,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y51": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 209,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y53": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y103": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 157,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y105": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y155": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y157": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y207": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y209": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y259": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 1,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_TOP_L_LOWER_B_X256Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443400",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 256,
        "grid_y": 251,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X1Y0": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_B_X256Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423400",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 256,
        "grid_y": 199,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X1Y1": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_B_X256Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403400",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 256,
        "grid_y": 147,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X1Y2": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_B_X256Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003400",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 256,
        "grid_y": 95,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X1Y3": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_B_X256Y217": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023400",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 256,
        "grid_y": 43,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X1Y4": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_T_X256Y18": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 256,
        "grid_y": 242,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y0": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y1": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y0": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y1": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_LOWER_T_X256Y70": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 256,
        "grid_y": 190,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y4": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y5": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y4": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y5": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_LOWER_T_X256Y122": {
        "bits": {},
        "clock_region": "X1Y2",
        "grid_x": 256,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y8": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y9": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y8": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y9": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_LOWER_T_X256Y174": {
        "bits": {},
        "clock_region": "X1Y3",
        "grid_x": 256,
        "grid_y": 86,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y12": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y13": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y12": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y13": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_LOWER_T_X256Y226": {
        "bits": {},
        "clock_region": "X1Y4",
        "grid_x": 256,
        "grid_y": 34,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y16": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y17": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y16": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y17": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_UPPER_B_X256Y31": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 256,
        "grid_y": 229,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y2": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y3": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y2": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y3": "PHASER_OUT_PHY",
            "PHASER_REF_X1Y0": "PHASER_REF",
            "PHY_CONTROL_X1Y0": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_B_X256Y83": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 256,
        "grid_y": 177,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y6": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y7": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y6": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y7": "PHASER_OUT_PHY",
            "PHASER_REF_X1Y1": "PHASER_REF",
            "PHY_CONTROL_X1Y1": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_B_X256Y135": {
        "bits": {},
        "clock_region": "X1Y2",
        "grid_x": 256,
        "grid_y": 125,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y10": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y11": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y10": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y11": "PHASER_OUT_PHY",
            "PHASER_REF_X1Y2": "PHASER_REF",
            "PHY_CONTROL_X1Y2": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_B_X256Y187": {
        "bits": {},
        "clock_region": "X1Y3",
        "grid_x": 256,
        "grid_y": 73,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y14": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y15": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y14": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y15": "PHASER_OUT_PHY",
            "PHASER_REF_X1Y3": "PHASER_REF",
            "PHY_CONTROL_X1Y3": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_B_X256Y239": {
        "bits": {},
        "clock_region": "X1Y4",
        "grid_x": 256,
        "grid_y": 21,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y18": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y19": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y18": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y19": "PHASER_OUT_PHY",
            "PHASER_REF_X1Y4": "PHASER_REF",
            "PHY_CONTROL_X1Y4": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_T_X256Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443400",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 256,
        "grid_y": 216,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X1Y0": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "CMT_TOP_L_UPPER_T_X256Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423400",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 256,
        "grid_y": 164,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X1Y1": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "CMT_TOP_L_UPPER_T_X256Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403400",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 256,
        "grid_y": 112,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X1Y2": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "CMT_TOP_L_UPPER_T_X256Y200": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003400",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 256,
        "grid_y": 60,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X1Y3": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "CMT_TOP_L_UPPER_T_X256Y252": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023400",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 256,
        "grid_y": 8,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X1Y4": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "CMT_TOP_R_LOWER_B_X8Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440080",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 251,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X0Y0": "MMCME2_ADV"
        },
        "type": "CMT_TOP_R_LOWER_B"
    },
    "CMT_TOP_R_LOWER_B_X8Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 8,
        "grid_y": 199,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X0Y1": "MMCME2_ADV"
        },
        "type": "CMT_TOP_R_LOWER_B"
    },
    "CMT_TOP_R_LOWER_B_X8Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 8,
        "grid_y": 147,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X0Y2": "MMCME2_ADV"
        },
        "type": "CMT_TOP_R_LOWER_B"
    },
    "CMT_TOP_R_LOWER_B_X8Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000080",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 8,
        "grid_y": 95,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X0Y3": "MMCME2_ADV"
        },
        "type": "CMT_TOP_R_LOWER_B"
    },
    "CMT_TOP_R_LOWER_B_X8Y217": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 8,
        "grid_y": 43,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X0Y4": "MMCME2_ADV"
        },
        "type": "CMT_TOP_R_LOWER_B"
    },
    "CMT_TOP_R_LOWER_T_X8Y18": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 242,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y0": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y1": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y0": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y1": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_R_LOWER_T"
    },
    "CMT_TOP_R_LOWER_T_X8Y70": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 8,
        "grid_y": 190,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y4": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y5": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y4": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y5": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_R_LOWER_T"
    },
    "CMT_TOP_R_LOWER_T_X8Y122": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 8,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y8": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y9": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y8": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y9": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_R_LOWER_T"
    },
    "CMT_TOP_R_LOWER_T_X8Y174": {
        "bits": {},
        "clock_region": "X0Y3",
        "grid_x": 8,
        "grid_y": 86,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y12": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y13": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y12": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y13": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_R_LOWER_T"
    },
    "CMT_TOP_R_LOWER_T_X8Y226": {
        "bits": {},
        "clock_region": "X0Y4",
        "grid_x": 8,
        "grid_y": 34,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y16": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y17": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y16": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y17": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_R_LOWER_T"
    },
    "CMT_TOP_R_UPPER_B_X8Y31": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 229,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y2": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y3": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y2": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y3": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y0": "PHASER_REF",
            "PHY_CONTROL_X0Y0": "PHY_CONTROL"
        },
        "type": "CMT_TOP_R_UPPER_B"
    },
    "CMT_TOP_R_UPPER_B_X8Y83": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 8,
        "grid_y": 177,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y6": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y7": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y6": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y7": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y1": "PHASER_REF",
            "PHY_CONTROL_X0Y1": "PHY_CONTROL"
        },
        "type": "CMT_TOP_R_UPPER_B"
    },
    "CMT_TOP_R_UPPER_B_X8Y135": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 8,
        "grid_y": 125,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y10": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y11": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y10": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y11": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y2": "PHASER_REF",
            "PHY_CONTROL_X0Y2": "PHY_CONTROL"
        },
        "type": "CMT_TOP_R_UPPER_B"
    },
    "CMT_TOP_R_UPPER_B_X8Y187": {
        "bits": {},
        "clock_region": "X0Y3",
        "grid_x": 8,
        "grid_y": 73,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y14": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y15": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y14": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y15": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y3": "PHASER_REF",
            "PHY_CONTROL_X0Y3": "PHY_CONTROL"
        },
        "type": "CMT_TOP_R_UPPER_B"
    },
    "CMT_TOP_R_UPPER_B_X8Y239": {
        "bits": {},
        "clock_region": "X0Y4",
        "grid_x": 8,
        "grid_y": 21,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y18": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y19": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y18": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y19": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y4": "PHASER_REF",
            "PHY_CONTROL_X0Y4": "PHY_CONTROL"
        },
        "type": "CMT_TOP_R_UPPER_B"
    },
    "CMT_TOP_R_UPPER_T_X8Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440080",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 216,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X0Y0": "PLLE2_ADV"
        },
        "type": "CMT_TOP_R_UPPER_T"
    },
    "CMT_TOP_R_UPPER_T_X8Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 8,
        "grid_y": 164,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X0Y1": "PLLE2_ADV"
        },
        "type": "CMT_TOP_R_UPPER_T"
    },
    "CMT_TOP_R_UPPER_T_X8Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 8,
        "grid_y": 112,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X0Y2": "PLLE2_ADV"
        },
        "type": "CMT_TOP_R_UPPER_T"
    },
    "CMT_TOP_R_UPPER_T_X8Y200": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000080",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 8,
        "grid_y": 60,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X0Y3": "PLLE2_ADV"
        },
        "type": "CMT_TOP_R_UPPER_T"
    },
    "CMT_TOP_R_UPPER_T_X8Y252": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 8,
        "grid_y": 8,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X0Y4": "PLLE2_ADV"
        },
        "type": "CMT_TOP_R_UPPER_T"
    },
    "DSP_L_X14Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 259,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y0": "DSP48E1",
            "DSP48_X1Y1": "DSP48E1",
            "TIEOFF_X15Y0": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 254,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y2": "DSP48E1",
            "DSP48_X1Y3": "DSP48E1",
            "TIEOFF_X15Y5": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 249,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y4": "DSP48E1",
            "DSP48_X1Y5": "DSP48E1",
            "TIEOFF_X15Y10": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 244,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y6": "DSP48E1",
            "DSP48_X1Y7": "DSP48E1",
            "TIEOFF_X15Y15": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 239,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y8": "DSP48E1",
            "DSP48_X1Y9": "DSP48E1",
            "TIEOFF_X15Y20": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 233,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y10": "DSP48E1",
            "DSP48_X1Y11": "DSP48E1",
            "TIEOFF_X15Y25": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 228,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y12": "DSP48E1",
            "DSP48_X1Y13": "DSP48E1",
            "TIEOFF_X15Y30": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 223,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y14": "DSP48E1",
            "DSP48_X1Y15": "DSP48E1",
            "TIEOFF_X15Y35": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 218,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y16": "DSP48E1",
            "DSP48_X1Y17": "DSP48E1",
            "TIEOFF_X15Y40": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 213,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y18": "DSP48E1",
            "DSP48_X1Y19": "DSP48E1",
            "TIEOFF_X15Y45": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y20": "DSP48E1",
            "DSP48_X1Y21": "DSP48E1",
            "TIEOFF_X15Y50": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y22": "DSP48E1",
            "DSP48_X1Y23": "DSP48E1",
            "TIEOFF_X15Y55": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y24": "DSP48E1",
            "DSP48_X1Y25": "DSP48E1",
            "TIEOFF_X15Y60": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y26": "DSP48E1",
            "DSP48_X1Y27": "DSP48E1",
            "TIEOFF_X15Y65": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y28": "DSP48E1",
            "DSP48_X1Y29": "DSP48E1",
            "TIEOFF_X15Y70": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y30": "DSP48E1",
            "DSP48_X1Y31": "DSP48E1",
            "TIEOFF_X15Y75": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y32": "DSP48E1",
            "DSP48_X1Y33": "DSP48E1",
            "TIEOFF_X15Y80": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y34": "DSP48E1",
            "DSP48_X1Y35": "DSP48E1",
            "TIEOFF_X15Y85": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y36": "DSP48E1",
            "DSP48_X1Y37": "DSP48E1",
            "TIEOFF_X15Y90": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y38": "DSP48E1",
            "DSP48_X1Y39": "DSP48E1",
            "TIEOFF_X15Y95": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y40": "DSP48E1",
            "DSP48_X1Y41": "DSP48E1",
            "TIEOFF_X15Y100": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y42": "DSP48E1",
            "DSP48_X1Y43": "DSP48E1",
            "TIEOFF_X15Y105": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y44": "DSP48E1",
            "DSP48_X1Y45": "DSP48E1",
            "TIEOFF_X15Y110": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y46": "DSP48E1",
            "DSP48_X1Y47": "DSP48E1",
            "TIEOFF_X15Y115": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y48": "DSP48E1",
            "DSP48_X1Y49": "DSP48E1",
            "TIEOFF_X15Y120": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y50": "DSP48E1",
            "DSP48_X1Y51": "DSP48E1",
            "TIEOFF_X15Y125": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y52": "DSP48E1",
            "DSP48_X1Y53": "DSP48E1",
            "TIEOFF_X15Y130": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y54": "DSP48E1",
            "DSP48_X1Y55": "DSP48E1",
            "TIEOFF_X15Y135": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y56": "DSP48E1",
            "DSP48_X1Y57": "DSP48E1",
            "TIEOFF_X15Y140": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y58": "DSP48E1",
            "DSP48_X1Y59": "DSP48E1",
            "TIEOFF_X15Y145": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y60": "DSP48E1",
            "DSP48_X1Y61": "DSP48E1",
            "TIEOFF_X15Y150": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y62": "DSP48E1",
            "DSP48_X1Y63": "DSP48E1",
            "TIEOFF_X15Y155": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y64": "DSP48E1",
            "DSP48_X1Y65": "DSP48E1",
            "TIEOFF_X15Y160": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y66": "DSP48E1",
            "DSP48_X1Y67": "DSP48E1",
            "TIEOFF_X15Y165": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y68": "DSP48E1",
            "DSP48_X1Y69": "DSP48E1",
            "TIEOFF_X15Y170": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y70": "DSP48E1",
            "DSP48_X1Y71": "DSP48E1",
            "TIEOFF_X15Y175": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y72": "DSP48E1",
            "DSP48_X1Y73": "DSP48E1",
            "TIEOFF_X15Y180": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y74": "DSP48E1",
            "DSP48_X1Y75": "DSP48E1",
            "TIEOFF_X15Y185": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y76": "DSP48E1",
            "DSP48_X1Y77": "DSP48E1",
            "TIEOFF_X15Y190": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y78": "DSP48E1",
            "DSP48_X1Y79": "DSP48E1",
            "TIEOFF_X15Y195": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y200": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 39,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y80": "DSP48E1",
            "DSP48_X1Y81": "DSP48E1",
            "TIEOFF_X15Y200": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y205": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 39,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y82": "DSP48E1",
            "DSP48_X1Y83": "DSP48E1",
            "TIEOFF_X15Y205": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y210": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 39,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y84": "DSP48E1",
            "DSP48_X1Y85": "DSP48E1",
            "TIEOFF_X15Y210": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y215": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 39,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y86": "DSP48E1",
            "DSP48_X1Y87": "DSP48E1",
            "TIEOFF_X15Y215": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y220": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 39,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y88": "DSP48E1",
            "DSP48_X1Y89": "DSP48E1",
            "TIEOFF_X15Y220": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y225": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 39,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y90": "DSP48E1",
            "DSP48_X1Y91": "DSP48E1",
            "TIEOFF_X15Y225": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y230": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 39,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y92": "DSP48E1",
            "DSP48_X1Y93": "DSP48E1",
            "TIEOFF_X15Y230": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y235": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 39,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y94": "DSP48E1",
            "DSP48_X1Y95": "DSP48E1",
            "TIEOFF_X15Y235": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y240": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 39,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y96": "DSP48E1",
            "DSP48_X1Y97": "DSP48E1",
            "TIEOFF_X15Y240": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y245": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 39,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y98": "DSP48E1",
            "DSP48_X1Y99": "DSP48E1",
            "TIEOFF_X15Y245": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421800",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 120,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y20": "DSP48E1",
            "DSP48_X4Y21": "DSP48E1",
            "TIEOFF_X52Y50": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421800",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 120,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y22": "DSP48E1",
            "DSP48_X4Y23": "DSP48E1",
            "TIEOFF_X52Y55": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421800",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 120,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y24": "DSP48E1",
            "DSP48_X4Y25": "DSP48E1",
            "TIEOFF_X52Y60": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421800",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 120,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y26": "DSP48E1",
            "DSP48_X4Y27": "DSP48E1",
            "TIEOFF_X52Y65": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421800",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 120,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y28": "DSP48E1",
            "DSP48_X4Y29": "DSP48E1",
            "TIEOFF_X52Y70": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421800",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 120,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y30": "DSP48E1",
            "DSP48_X4Y31": "DSP48E1",
            "TIEOFF_X52Y75": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421800",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 120,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y32": "DSP48E1",
            "DSP48_X4Y33": "DSP48E1",
            "TIEOFF_X52Y80": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421800",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 120,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y34": "DSP48E1",
            "DSP48_X4Y35": "DSP48E1",
            "TIEOFF_X52Y85": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421800",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 120,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y36": "DSP48E1",
            "DSP48_X4Y37": "DSP48E1",
            "TIEOFF_X52Y90": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421800",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 120,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y38": "DSP48E1",
            "DSP48_X4Y39": "DSP48E1",
            "TIEOFF_X52Y95": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401800",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 120,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y40": "DSP48E1",
            "DSP48_X4Y41": "DSP48E1",
            "TIEOFF_X52Y100": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401800",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 120,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y42": "DSP48E1",
            "DSP48_X4Y43": "DSP48E1",
            "TIEOFF_X52Y105": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401800",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 120,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y44": "DSP48E1",
            "DSP48_X4Y45": "DSP48E1",
            "TIEOFF_X52Y110": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401800",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 120,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y46": "DSP48E1",
            "DSP48_X4Y47": "DSP48E1",
            "TIEOFF_X52Y115": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401800",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 120,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y48": "DSP48E1",
            "DSP48_X4Y49": "DSP48E1",
            "TIEOFF_X52Y120": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401800",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 120,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y50": "DSP48E1",
            "DSP48_X4Y51": "DSP48E1",
            "TIEOFF_X52Y125": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401800",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 120,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y52": "DSP48E1",
            "DSP48_X4Y53": "DSP48E1",
            "TIEOFF_X52Y130": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401800",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 120,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y54": "DSP48E1",
            "DSP48_X4Y55": "DSP48E1",
            "TIEOFF_X52Y135": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401800",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 120,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y56": "DSP48E1",
            "DSP48_X4Y57": "DSP48E1",
            "TIEOFF_X52Y140": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401800",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 120,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y58": "DSP48E1",
            "DSP48_X4Y59": "DSP48E1",
            "TIEOFF_X52Y145": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 120,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y60": "DSP48E1",
            "DSP48_X4Y61": "DSP48E1",
            "TIEOFF_X52Y150": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 120,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y62": "DSP48E1",
            "DSP48_X4Y63": "DSP48E1",
            "TIEOFF_X52Y155": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 120,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y64": "DSP48E1",
            "DSP48_X4Y65": "DSP48E1",
            "TIEOFF_X52Y160": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 120,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y66": "DSP48E1",
            "DSP48_X4Y67": "DSP48E1",
            "TIEOFF_X52Y165": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 120,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y68": "DSP48E1",
            "DSP48_X4Y69": "DSP48E1",
            "TIEOFF_X52Y170": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 120,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y70": "DSP48E1",
            "DSP48_X4Y71": "DSP48E1",
            "TIEOFF_X52Y175": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 120,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y72": "DSP48E1",
            "DSP48_X4Y73": "DSP48E1",
            "TIEOFF_X52Y180": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 120,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y74": "DSP48E1",
            "DSP48_X4Y75": "DSP48E1",
            "TIEOFF_X52Y185": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 120,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y76": "DSP48E1",
            "DSP48_X4Y77": "DSP48E1",
            "TIEOFF_X52Y190": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X48Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 120,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X4Y78": "DSP48E1",
            "DSP48_X4Y79": "DSP48E1",
            "TIEOFF_X52Y195": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 166,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y20": "DSP48E1",
            "DSP48_X6Y21": "DSP48E1",
            "TIEOFF_X72Y50": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 166,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y22": "DSP48E1",
            "DSP48_X6Y23": "DSP48E1",
            "TIEOFF_X72Y55": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 166,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y24": "DSP48E1",
            "DSP48_X6Y25": "DSP48E1",
            "TIEOFF_X72Y60": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 166,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y26": "DSP48E1",
            "DSP48_X6Y27": "DSP48E1",
            "TIEOFF_X72Y65": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 166,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y28": "DSP48E1",
            "DSP48_X6Y29": "DSP48E1",
            "TIEOFF_X72Y70": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 166,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y30": "DSP48E1",
            "DSP48_X6Y31": "DSP48E1",
            "TIEOFF_X72Y75": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 166,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y32": "DSP48E1",
            "DSP48_X6Y33": "DSP48E1",
            "TIEOFF_X72Y80": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 166,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y34": "DSP48E1",
            "DSP48_X6Y35": "DSP48E1",
            "TIEOFF_X72Y85": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 166,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y36": "DSP48E1",
            "DSP48_X6Y37": "DSP48E1",
            "TIEOFF_X72Y90": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 166,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y38": "DSP48E1",
            "DSP48_X6Y39": "DSP48E1",
            "TIEOFF_X72Y95": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 166,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y40": "DSP48E1",
            "DSP48_X6Y41": "DSP48E1",
            "TIEOFF_X72Y100": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 166,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y42": "DSP48E1",
            "DSP48_X6Y43": "DSP48E1",
            "TIEOFF_X72Y105": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 166,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y44": "DSP48E1",
            "DSP48_X6Y45": "DSP48E1",
            "TIEOFF_X72Y110": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 166,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y46": "DSP48E1",
            "DSP48_X6Y47": "DSP48E1",
            "TIEOFF_X72Y115": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 166,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y48": "DSP48E1",
            "DSP48_X6Y49": "DSP48E1",
            "TIEOFF_X72Y120": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 166,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y50": "DSP48E1",
            "DSP48_X6Y51": "DSP48E1",
            "TIEOFF_X72Y125": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 166,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y52": "DSP48E1",
            "DSP48_X6Y53": "DSP48E1",
            "TIEOFF_X72Y130": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 166,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y54": "DSP48E1",
            "DSP48_X6Y55": "DSP48E1",
            "TIEOFF_X72Y135": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 166,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y56": "DSP48E1",
            "DSP48_X6Y57": "DSP48E1",
            "TIEOFF_X72Y140": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 166,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y58": "DSP48E1",
            "DSP48_X6Y59": "DSP48E1",
            "TIEOFF_X72Y145": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 166,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y60": "DSP48E1",
            "DSP48_X6Y61": "DSP48E1",
            "TIEOFF_X72Y150": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 166,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y62": "DSP48E1",
            "DSP48_X6Y63": "DSP48E1",
            "TIEOFF_X72Y155": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 166,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y64": "DSP48E1",
            "DSP48_X6Y65": "DSP48E1",
            "TIEOFF_X72Y160": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 166,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y66": "DSP48E1",
            "DSP48_X6Y67": "DSP48E1",
            "TIEOFF_X72Y165": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 166,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y68": "DSP48E1",
            "DSP48_X6Y69": "DSP48E1",
            "TIEOFF_X72Y170": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 166,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y70": "DSP48E1",
            "DSP48_X6Y71": "DSP48E1",
            "TIEOFF_X72Y175": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 166,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y72": "DSP48E1",
            "DSP48_X6Y73": "DSP48E1",
            "TIEOFF_X72Y180": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 166,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y74": "DSP48E1",
            "DSP48_X6Y75": "DSP48E1",
            "TIEOFF_X72Y185": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 166,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y76": "DSP48E1",
            "DSP48_X6Y77": "DSP48E1",
            "TIEOFF_X72Y190": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X66Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 166,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X6Y78": "DSP48E1",
            "DSP48_X6Y79": "DSP48E1",
            "TIEOFF_X72Y195": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443000",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 236,
        "grid_y": 259,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y0": "DSP48E1",
            "DSP48_X8Y1": "DSP48E1",
            "TIEOFF_X104Y0": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443000",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 236,
        "grid_y": 254,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y2": "DSP48E1",
            "DSP48_X8Y3": "DSP48E1",
            "TIEOFF_X104Y5": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443000",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 236,
        "grid_y": 249,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y4": "DSP48E1",
            "DSP48_X8Y5": "DSP48E1",
            "TIEOFF_X104Y10": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443000",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 236,
        "grid_y": 244,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y6": "DSP48E1",
            "DSP48_X8Y7": "DSP48E1",
            "TIEOFF_X104Y15": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443000",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 236,
        "grid_y": 239,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y8": "DSP48E1",
            "DSP48_X8Y9": "DSP48E1",
            "TIEOFF_X104Y20": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443000",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 236,
        "grid_y": 233,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y10": "DSP48E1",
            "DSP48_X8Y11": "DSP48E1",
            "TIEOFF_X104Y25": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443000",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 236,
        "grid_y": 228,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y12": "DSP48E1",
            "DSP48_X8Y13": "DSP48E1",
            "TIEOFF_X104Y30": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443000",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 236,
        "grid_y": 223,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y14": "DSP48E1",
            "DSP48_X8Y15": "DSP48E1",
            "TIEOFF_X104Y35": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443000",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 236,
        "grid_y": 218,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y16": "DSP48E1",
            "DSP48_X8Y17": "DSP48E1",
            "TIEOFF_X104Y40": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443000",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 236,
        "grid_y": 213,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y18": "DSP48E1",
            "DSP48_X8Y19": "DSP48E1",
            "TIEOFF_X104Y45": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423000",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 236,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y20": "DSP48E1",
            "DSP48_X8Y21": "DSP48E1",
            "TIEOFF_X104Y50": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423000",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 236,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y22": "DSP48E1",
            "DSP48_X8Y23": "DSP48E1",
            "TIEOFF_X104Y55": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423000",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 236,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y24": "DSP48E1",
            "DSP48_X8Y25": "DSP48E1",
            "TIEOFF_X104Y60": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423000",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 236,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y26": "DSP48E1",
            "DSP48_X8Y27": "DSP48E1",
            "TIEOFF_X104Y65": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423000",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 236,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y28": "DSP48E1",
            "DSP48_X8Y29": "DSP48E1",
            "TIEOFF_X104Y70": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423000",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 236,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y30": "DSP48E1",
            "DSP48_X8Y31": "DSP48E1",
            "TIEOFF_X104Y75": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423000",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 236,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y32": "DSP48E1",
            "DSP48_X8Y33": "DSP48E1",
            "TIEOFF_X104Y80": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423000",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 236,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y34": "DSP48E1",
            "DSP48_X8Y35": "DSP48E1",
            "TIEOFF_X104Y85": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423000",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 236,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y36": "DSP48E1",
            "DSP48_X8Y37": "DSP48E1",
            "TIEOFF_X104Y90": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423000",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 236,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y38": "DSP48E1",
            "DSP48_X8Y39": "DSP48E1",
            "TIEOFF_X104Y95": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403000",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 236,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y40": "DSP48E1",
            "DSP48_X8Y41": "DSP48E1",
            "TIEOFF_X104Y100": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403000",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 236,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y42": "DSP48E1",
            "DSP48_X8Y43": "DSP48E1",
            "TIEOFF_X104Y105": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403000",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 236,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y44": "DSP48E1",
            "DSP48_X8Y45": "DSP48E1",
            "TIEOFF_X104Y110": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403000",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 236,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y46": "DSP48E1",
            "DSP48_X8Y47": "DSP48E1",
            "TIEOFF_X104Y115": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403000",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 236,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y48": "DSP48E1",
            "DSP48_X8Y49": "DSP48E1",
            "TIEOFF_X104Y120": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403000",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 236,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y50": "DSP48E1",
            "DSP48_X8Y51": "DSP48E1",
            "TIEOFF_X104Y125": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403000",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 236,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y52": "DSP48E1",
            "DSP48_X8Y53": "DSP48E1",
            "TIEOFF_X104Y130": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403000",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 236,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y54": "DSP48E1",
            "DSP48_X8Y55": "DSP48E1",
            "TIEOFF_X104Y135": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403000",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 236,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y56": "DSP48E1",
            "DSP48_X8Y57": "DSP48E1",
            "TIEOFF_X104Y140": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403000",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 236,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y58": "DSP48E1",
            "DSP48_X8Y59": "DSP48E1",
            "TIEOFF_X104Y145": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003000",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 236,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y60": "DSP48E1",
            "DSP48_X8Y61": "DSP48E1",
            "TIEOFF_X104Y150": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003000",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 236,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y62": "DSP48E1",
            "DSP48_X8Y63": "DSP48E1",
            "TIEOFF_X104Y155": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003000",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 236,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y64": "DSP48E1",
            "DSP48_X8Y65": "DSP48E1",
            "TIEOFF_X104Y160": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003000",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 236,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y66": "DSP48E1",
            "DSP48_X8Y67": "DSP48E1",
            "TIEOFF_X104Y165": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003000",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 236,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y68": "DSP48E1",
            "DSP48_X8Y69": "DSP48E1",
            "TIEOFF_X104Y170": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003000",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 236,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y70": "DSP48E1",
            "DSP48_X8Y71": "DSP48E1",
            "TIEOFF_X104Y175": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003000",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 236,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y72": "DSP48E1",
            "DSP48_X8Y73": "DSP48E1",
            "TIEOFF_X104Y180": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003000",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 236,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y74": "DSP48E1",
            "DSP48_X8Y75": "DSP48E1",
            "TIEOFF_X104Y185": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003000",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 236,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y76": "DSP48E1",
            "DSP48_X8Y77": "DSP48E1",
            "TIEOFF_X104Y190": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003000",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 236,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y78": "DSP48E1",
            "DSP48_X8Y79": "DSP48E1",
            "TIEOFF_X104Y195": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y200": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023000",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 236,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y80": "DSP48E1",
            "DSP48_X8Y81": "DSP48E1",
            "TIEOFF_X104Y200": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y205": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023000",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 236,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y82": "DSP48E1",
            "DSP48_X8Y83": "DSP48E1",
            "TIEOFF_X104Y205": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y210": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023000",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 236,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y84": "DSP48E1",
            "DSP48_X8Y85": "DSP48E1",
            "TIEOFF_X104Y210": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y215": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023000",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 236,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y86": "DSP48E1",
            "DSP48_X8Y87": "DSP48E1",
            "TIEOFF_X104Y215": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y220": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023000",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 236,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y88": "DSP48E1",
            "DSP48_X8Y89": "DSP48E1",
            "TIEOFF_X104Y220": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y225": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023000",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 236,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y90": "DSP48E1",
            "DSP48_X8Y91": "DSP48E1",
            "TIEOFF_X104Y225": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y230": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023000",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 236,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y92": "DSP48E1",
            "DSP48_X8Y93": "DSP48E1",
            "TIEOFF_X104Y230": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y235": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023000",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 236,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y94": "DSP48E1",
            "DSP48_X8Y95": "DSP48E1",
            "TIEOFF_X104Y235": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y240": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023000",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 236,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y96": "DSP48E1",
            "DSP48_X8Y97": "DSP48E1",
            "TIEOFF_X104Y240": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X96Y245": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023000",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 236,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "DSP48_X8Y98": "DSP48E1",
            "DSP48_X8Y99": "DSP48E1",
            "TIEOFF_X104Y245": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_R_X9Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440480",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 259,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y0": "DSP48E1",
            "DSP48_X0Y1": "DSP48E1",
            "TIEOFF_X10Y0": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440480",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 254,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y2": "DSP48E1",
            "DSP48_X0Y3": "DSP48E1",
            "TIEOFF_X10Y5": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440480",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 249,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y4": "DSP48E1",
            "DSP48_X0Y5": "DSP48E1",
            "TIEOFF_X10Y10": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440480",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 244,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y6": "DSP48E1",
            "DSP48_X0Y7": "DSP48E1",
            "TIEOFF_X10Y15": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440480",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 239,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y8": "DSP48E1",
            "DSP48_X0Y9": "DSP48E1",
            "TIEOFF_X10Y20": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440480",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 233,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y10": "DSP48E1",
            "DSP48_X0Y11": "DSP48E1",
            "TIEOFF_X10Y25": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440480",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 228,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y12": "DSP48E1",
            "DSP48_X0Y13": "DSP48E1",
            "TIEOFF_X10Y30": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440480",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 223,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y14": "DSP48E1",
            "DSP48_X0Y15": "DSP48E1",
            "TIEOFF_X10Y35": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440480",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 218,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y16": "DSP48E1",
            "DSP48_X0Y17": "DSP48E1",
            "TIEOFF_X10Y40": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440480",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 213,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y18": "DSP48E1",
            "DSP48_X0Y19": "DSP48E1",
            "TIEOFF_X10Y45": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y20": "DSP48E1",
            "DSP48_X0Y21": "DSP48E1",
            "TIEOFF_X10Y50": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y22": "DSP48E1",
            "DSP48_X0Y23": "DSP48E1",
            "TIEOFF_X10Y55": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y24": "DSP48E1",
            "DSP48_X0Y25": "DSP48E1",
            "TIEOFF_X10Y60": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y26": "DSP48E1",
            "DSP48_X0Y27": "DSP48E1",
            "TIEOFF_X10Y65": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y28": "DSP48E1",
            "DSP48_X0Y29": "DSP48E1",
            "TIEOFF_X10Y70": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y30": "DSP48E1",
            "DSP48_X0Y31": "DSP48E1",
            "TIEOFF_X10Y75": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y32": "DSP48E1",
            "DSP48_X0Y33": "DSP48E1",
            "TIEOFF_X10Y80": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y34": "DSP48E1",
            "DSP48_X0Y35": "DSP48E1",
            "TIEOFF_X10Y85": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y36": "DSP48E1",
            "DSP48_X0Y37": "DSP48E1",
            "TIEOFF_X10Y90": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y38": "DSP48E1",
            "DSP48_X0Y39": "DSP48E1",
            "TIEOFF_X10Y95": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y40": "DSP48E1",
            "DSP48_X0Y41": "DSP48E1",
            "TIEOFF_X10Y100": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y42": "DSP48E1",
            "DSP48_X0Y43": "DSP48E1",
            "TIEOFF_X10Y105": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y44": "DSP48E1",
            "DSP48_X0Y45": "DSP48E1",
            "TIEOFF_X10Y110": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y46": "DSP48E1",
            "DSP48_X0Y47": "DSP48E1",
            "TIEOFF_X10Y115": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y48": "DSP48E1",
            "DSP48_X0Y49": "DSP48E1",
            "TIEOFF_X10Y120": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y50": "DSP48E1",
            "DSP48_X0Y51": "DSP48E1",
            "TIEOFF_X10Y125": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y52": "DSP48E1",
            "DSP48_X0Y53": "DSP48E1",
            "TIEOFF_X10Y130": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y54": "DSP48E1",
            "DSP48_X0Y55": "DSP48E1",
            "TIEOFF_X10Y135": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y56": "DSP48E1",
            "DSP48_X0Y57": "DSP48E1",
            "TIEOFF_X10Y140": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y58": "DSP48E1",
            "DSP48_X0Y59": "DSP48E1",
            "TIEOFF_X10Y145": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y60": "DSP48E1",
            "DSP48_X0Y61": "DSP48E1",
            "TIEOFF_X10Y150": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y62": "DSP48E1",
            "DSP48_X0Y63": "DSP48E1",
            "TIEOFF_X10Y155": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y64": "DSP48E1",
            "DSP48_X0Y65": "DSP48E1",
            "TIEOFF_X10Y160": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y66": "DSP48E1",
            "DSP48_X0Y67": "DSP48E1",
            "TIEOFF_X10Y165": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y68": "DSP48E1",
            "DSP48_X0Y69": "DSP48E1",
            "TIEOFF_X10Y170": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y70": "DSP48E1",
            "DSP48_X0Y71": "DSP48E1",
            "TIEOFF_X10Y175": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y72": "DSP48E1",
            "DSP48_X0Y73": "DSP48E1",
            "TIEOFF_X10Y180": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y74": "DSP48E1",
            "DSP48_X0Y75": "DSP48E1",
            "TIEOFF_X10Y185": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y76": "DSP48E1",
            "DSP48_X0Y77": "DSP48E1",
            "TIEOFF_X10Y190": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y78": "DSP48E1",
            "DSP48_X0Y79": "DSP48E1",
            "TIEOFF_X10Y195": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y200": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 28,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y80": "DSP48E1",
            "DSP48_X0Y81": "DSP48E1",
            "TIEOFF_X10Y200": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y205": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 28,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y82": "DSP48E1",
            "DSP48_X0Y83": "DSP48E1",
            "TIEOFF_X10Y205": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y210": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 28,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y84": "DSP48E1",
            "DSP48_X0Y85": "DSP48E1",
            "TIEOFF_X10Y210": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y215": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 28,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y86": "DSP48E1",
            "DSP48_X0Y87": "DSP48E1",
            "TIEOFF_X10Y215": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y220": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 28,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y88": "DSP48E1",
            "DSP48_X0Y89": "DSP48E1",
            "TIEOFF_X10Y220": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y225": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 28,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y90": "DSP48E1",
            "DSP48_X0Y91": "DSP48E1",
            "TIEOFF_X10Y225": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y230": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 28,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y92": "DSP48E1",
            "DSP48_X0Y93": "DSP48E1",
            "TIEOFF_X10Y230": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y235": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 28,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y94": "DSP48E1",
            "DSP48_X0Y95": "DSP48E1",
            "TIEOFF_X10Y235": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y240": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 28,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y96": "DSP48E1",
            "DSP48_X0Y97": "DSP48E1",
            "TIEOFF_X10Y240": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y245": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 28,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y98": "DSP48E1",
            "DSP48_X0Y99": "DSP48E1",
            "TIEOFF_X10Y245": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F80",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 81,
        "grid_y": 259,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y0": "DSP48E1",
            "DSP48_X2Y1": "DSP48E1",
            "TIEOFF_X34Y0": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F80",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 81,
        "grid_y": 254,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y2": "DSP48E1",
            "DSP48_X2Y3": "DSP48E1",
            "TIEOFF_X34Y5": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F80",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 81,
        "grid_y": 249,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y4": "DSP48E1",
            "DSP48_X2Y5": "DSP48E1",
            "TIEOFF_X34Y10": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F80",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 81,
        "grid_y": 244,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y6": "DSP48E1",
            "DSP48_X2Y7": "DSP48E1",
            "TIEOFF_X34Y15": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F80",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 81,
        "grid_y": 239,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y8": "DSP48E1",
            "DSP48_X2Y9": "DSP48E1",
            "TIEOFF_X34Y20": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F80",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 81,
        "grid_y": 233,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y10": "DSP48E1",
            "DSP48_X2Y11": "DSP48E1",
            "TIEOFF_X34Y25": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F80",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 81,
        "grid_y": 228,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y12": "DSP48E1",
            "DSP48_X2Y13": "DSP48E1",
            "TIEOFF_X34Y30": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F80",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 81,
        "grid_y": 223,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y14": "DSP48E1",
            "DSP48_X2Y15": "DSP48E1",
            "TIEOFF_X34Y35": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F80",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 81,
        "grid_y": 218,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y16": "DSP48E1",
            "DSP48_X2Y17": "DSP48E1",
            "TIEOFF_X34Y40": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F80",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 81,
        "grid_y": 213,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y18": "DSP48E1",
            "DSP48_X2Y19": "DSP48E1",
            "TIEOFF_X34Y45": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 81,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y20": "DSP48E1",
            "DSP48_X2Y21": "DSP48E1",
            "TIEOFF_X34Y50": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 81,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y22": "DSP48E1",
            "DSP48_X2Y23": "DSP48E1",
            "TIEOFF_X34Y55": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 81,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y24": "DSP48E1",
            "DSP48_X2Y25": "DSP48E1",
            "TIEOFF_X34Y60": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 81,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y26": "DSP48E1",
            "DSP48_X2Y27": "DSP48E1",
            "TIEOFF_X34Y65": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 81,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y28": "DSP48E1",
            "DSP48_X2Y29": "DSP48E1",
            "TIEOFF_X34Y70": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 81,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y30": "DSP48E1",
            "DSP48_X2Y31": "DSP48E1",
            "TIEOFF_X34Y75": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 81,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y32": "DSP48E1",
            "DSP48_X2Y33": "DSP48E1",
            "TIEOFF_X34Y80": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 81,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y34": "DSP48E1",
            "DSP48_X2Y35": "DSP48E1",
            "TIEOFF_X34Y85": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 81,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y36": "DSP48E1",
            "DSP48_X2Y37": "DSP48E1",
            "TIEOFF_X34Y90": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 81,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y38": "DSP48E1",
            "DSP48_X2Y39": "DSP48E1",
            "TIEOFF_X34Y95": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 81,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y40": "DSP48E1",
            "DSP48_X2Y41": "DSP48E1",
            "TIEOFF_X34Y100": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 81,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y42": "DSP48E1",
            "DSP48_X2Y43": "DSP48E1",
            "TIEOFF_X34Y105": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 81,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y44": "DSP48E1",
            "DSP48_X2Y45": "DSP48E1",
            "TIEOFF_X34Y110": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 81,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y46": "DSP48E1",
            "DSP48_X2Y47": "DSP48E1",
            "TIEOFF_X34Y115": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 81,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y48": "DSP48E1",
            "DSP48_X2Y49": "DSP48E1",
            "TIEOFF_X34Y120": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 81,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y50": "DSP48E1",
            "DSP48_X2Y51": "DSP48E1",
            "TIEOFF_X34Y125": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 81,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y52": "DSP48E1",
            "DSP48_X2Y53": "DSP48E1",
            "TIEOFF_X34Y130": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 81,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y54": "DSP48E1",
            "DSP48_X2Y55": "DSP48E1",
            "TIEOFF_X34Y135": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 81,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y56": "DSP48E1",
            "DSP48_X2Y57": "DSP48E1",
            "TIEOFF_X34Y140": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 81,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y58": "DSP48E1",
            "DSP48_X2Y59": "DSP48E1",
            "TIEOFF_X34Y145": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 81,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y60": "DSP48E1",
            "DSP48_X2Y61": "DSP48E1",
            "TIEOFF_X34Y150": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 81,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y62": "DSP48E1",
            "DSP48_X2Y63": "DSP48E1",
            "TIEOFF_X34Y155": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 81,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y64": "DSP48E1",
            "DSP48_X2Y65": "DSP48E1",
            "TIEOFF_X34Y160": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 81,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y66": "DSP48E1",
            "DSP48_X2Y67": "DSP48E1",
            "TIEOFF_X34Y165": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 81,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y68": "DSP48E1",
            "DSP48_X2Y69": "DSP48E1",
            "TIEOFF_X34Y170": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 81,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y70": "DSP48E1",
            "DSP48_X2Y71": "DSP48E1",
            "TIEOFF_X34Y175": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 81,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y72": "DSP48E1",
            "DSP48_X2Y73": "DSP48E1",
            "TIEOFF_X34Y180": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 81,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y74": "DSP48E1",
            "DSP48_X2Y75": "DSP48E1",
            "TIEOFF_X34Y185": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 81,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y76": "DSP48E1",
            "DSP48_X2Y77": "DSP48E1",
            "TIEOFF_X34Y190": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F80",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 81,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y78": "DSP48E1",
            "DSP48_X2Y79": "DSP48E1",
            "TIEOFF_X34Y195": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y200": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 81,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y80": "DSP48E1",
            "DSP48_X2Y81": "DSP48E1",
            "TIEOFF_X34Y200": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y205": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 81,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y82": "DSP48E1",
            "DSP48_X2Y83": "DSP48E1",
            "TIEOFF_X34Y205": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y210": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 81,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y84": "DSP48E1",
            "DSP48_X2Y85": "DSP48E1",
            "TIEOFF_X34Y210": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y215": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 81,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y86": "DSP48E1",
            "DSP48_X2Y87": "DSP48E1",
            "TIEOFF_X34Y215": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y220": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 81,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y88": "DSP48E1",
            "DSP48_X2Y89": "DSP48E1",
            "TIEOFF_X34Y220": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y225": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 81,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y90": "DSP48E1",
            "DSP48_X2Y91": "DSP48E1",
            "TIEOFF_X34Y225": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y230": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 81,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y92": "DSP48E1",
            "DSP48_X2Y93": "DSP48E1",
            "TIEOFF_X34Y230": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y235": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 81,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y94": "DSP48E1",
            "DSP48_X2Y95": "DSP48E1",
            "TIEOFF_X34Y235": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y240": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 81,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y96": "DSP48E1",
            "DSP48_X2Y97": "DSP48E1",
            "TIEOFF_X34Y240": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X31Y245": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 81,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y98": "DSP48E1",
            "DSP48_X2Y99": "DSP48E1",
            "TIEOFF_X34Y245": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421580",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 109,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y20": "DSP48E1",
            "DSP48_X3Y21": "DSP48E1",
            "TIEOFF_X47Y50": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421580",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 109,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y22": "DSP48E1",
            "DSP48_X3Y23": "DSP48E1",
            "TIEOFF_X47Y55": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421580",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 109,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y24": "DSP48E1",
            "DSP48_X3Y25": "DSP48E1",
            "TIEOFF_X47Y60": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421580",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 109,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y26": "DSP48E1",
            "DSP48_X3Y27": "DSP48E1",
            "TIEOFF_X47Y65": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421580",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 109,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y28": "DSP48E1",
            "DSP48_X3Y29": "DSP48E1",
            "TIEOFF_X47Y70": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421580",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 109,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y30": "DSP48E1",
            "DSP48_X3Y31": "DSP48E1",
            "TIEOFF_X47Y75": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421580",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 109,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y32": "DSP48E1",
            "DSP48_X3Y33": "DSP48E1",
            "TIEOFF_X47Y80": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421580",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 109,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y34": "DSP48E1",
            "DSP48_X3Y35": "DSP48E1",
            "TIEOFF_X47Y85": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421580",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 109,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y36": "DSP48E1",
            "DSP48_X3Y37": "DSP48E1",
            "TIEOFF_X47Y90": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421580",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 109,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y38": "DSP48E1",
            "DSP48_X3Y39": "DSP48E1",
            "TIEOFF_X47Y95": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 109,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y40": "DSP48E1",
            "DSP48_X3Y41": "DSP48E1",
            "TIEOFF_X47Y100": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 109,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y42": "DSP48E1",
            "DSP48_X3Y43": "DSP48E1",
            "TIEOFF_X47Y105": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 109,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y44": "DSP48E1",
            "DSP48_X3Y45": "DSP48E1",
            "TIEOFF_X47Y110": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 109,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y46": "DSP48E1",
            "DSP48_X3Y47": "DSP48E1",
            "TIEOFF_X47Y115": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 109,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y48": "DSP48E1",
            "DSP48_X3Y49": "DSP48E1",
            "TIEOFF_X47Y120": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 109,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y50": "DSP48E1",
            "DSP48_X3Y51": "DSP48E1",
            "TIEOFF_X47Y125": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 109,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y52": "DSP48E1",
            "DSP48_X3Y53": "DSP48E1",
            "TIEOFF_X47Y130": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 109,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y54": "DSP48E1",
            "DSP48_X3Y55": "DSP48E1",
            "TIEOFF_X47Y135": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 109,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y56": "DSP48E1",
            "DSP48_X3Y57": "DSP48E1",
            "TIEOFF_X47Y140": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401580",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 109,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y58": "DSP48E1",
            "DSP48_X3Y59": "DSP48E1",
            "TIEOFF_X47Y145": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 109,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y60": "DSP48E1",
            "DSP48_X3Y61": "DSP48E1",
            "TIEOFF_X47Y150": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 109,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y62": "DSP48E1",
            "DSP48_X3Y63": "DSP48E1",
            "TIEOFF_X47Y155": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 109,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y64": "DSP48E1",
            "DSP48_X3Y65": "DSP48E1",
            "TIEOFF_X47Y160": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 109,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y66": "DSP48E1",
            "DSP48_X3Y67": "DSP48E1",
            "TIEOFF_X47Y165": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 109,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y68": "DSP48E1",
            "DSP48_X3Y69": "DSP48E1",
            "TIEOFF_X47Y170": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 109,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y70": "DSP48E1",
            "DSP48_X3Y71": "DSP48E1",
            "TIEOFF_X47Y175": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 109,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y72": "DSP48E1",
            "DSP48_X3Y73": "DSP48E1",
            "TIEOFF_X47Y180": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 109,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y74": "DSP48E1",
            "DSP48_X3Y75": "DSP48E1",
            "TIEOFF_X47Y185": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 109,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y76": "DSP48E1",
            "DSP48_X3Y77": "DSP48E1",
            "TIEOFF_X47Y190": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X43Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001580",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 109,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X3Y78": "DSP48E1",
            "DSP48_X3Y79": "DSP48E1",
            "TIEOFF_X47Y195": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E80",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 155,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y20": "DSP48E1",
            "DSP48_X5Y21": "DSP48E1",
            "TIEOFF_X67Y50": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E80",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 155,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y22": "DSP48E1",
            "DSP48_X5Y23": "DSP48E1",
            "TIEOFF_X67Y55": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E80",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 155,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y24": "DSP48E1",
            "DSP48_X5Y25": "DSP48E1",
            "TIEOFF_X67Y60": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E80",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 155,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y26": "DSP48E1",
            "DSP48_X5Y27": "DSP48E1",
            "TIEOFF_X67Y65": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E80",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 155,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y28": "DSP48E1",
            "DSP48_X5Y29": "DSP48E1",
            "TIEOFF_X67Y70": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E80",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 155,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y30": "DSP48E1",
            "DSP48_X5Y31": "DSP48E1",
            "TIEOFF_X67Y75": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E80",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 155,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y32": "DSP48E1",
            "DSP48_X5Y33": "DSP48E1",
            "TIEOFF_X67Y80": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E80",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 155,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y34": "DSP48E1",
            "DSP48_X5Y35": "DSP48E1",
            "TIEOFF_X67Y85": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E80",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 155,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y36": "DSP48E1",
            "DSP48_X5Y37": "DSP48E1",
            "TIEOFF_X67Y90": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E80",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 155,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y38": "DSP48E1",
            "DSP48_X5Y39": "DSP48E1",
            "TIEOFF_X67Y95": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401E80",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 155,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y40": "DSP48E1",
            "DSP48_X5Y41": "DSP48E1",
            "TIEOFF_X67Y100": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401E80",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 155,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y42": "DSP48E1",
            "DSP48_X5Y43": "DSP48E1",
            "TIEOFF_X67Y105": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401E80",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 155,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y44": "DSP48E1",
            "DSP48_X5Y45": "DSP48E1",
            "TIEOFF_X67Y110": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401E80",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 155,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y46": "DSP48E1",
            "DSP48_X5Y47": "DSP48E1",
            "TIEOFF_X67Y115": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401E80",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 155,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y48": "DSP48E1",
            "DSP48_X5Y49": "DSP48E1",
            "TIEOFF_X67Y120": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401E80",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 155,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y50": "DSP48E1",
            "DSP48_X5Y51": "DSP48E1",
            "TIEOFF_X67Y125": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401E80",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 155,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y52": "DSP48E1",
            "DSP48_X5Y53": "DSP48E1",
            "TIEOFF_X67Y130": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401E80",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 155,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y54": "DSP48E1",
            "DSP48_X5Y55": "DSP48E1",
            "TIEOFF_X67Y135": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401E80",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 155,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y56": "DSP48E1",
            "DSP48_X5Y57": "DSP48E1",
            "TIEOFF_X67Y140": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401E80",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 155,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y58": "DSP48E1",
            "DSP48_X5Y59": "DSP48E1",
            "TIEOFF_X67Y145": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E80",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 155,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y60": "DSP48E1",
            "DSP48_X5Y61": "DSP48E1",
            "TIEOFF_X67Y150": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E80",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 155,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y62": "DSP48E1",
            "DSP48_X5Y63": "DSP48E1",
            "TIEOFF_X67Y155": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E80",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 155,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y64": "DSP48E1",
            "DSP48_X5Y65": "DSP48E1",
            "TIEOFF_X67Y160": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E80",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 155,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y66": "DSP48E1",
            "DSP48_X5Y67": "DSP48E1",
            "TIEOFF_X67Y165": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E80",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 155,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y68": "DSP48E1",
            "DSP48_X5Y69": "DSP48E1",
            "TIEOFF_X67Y170": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E80",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 155,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y70": "DSP48E1",
            "DSP48_X5Y71": "DSP48E1",
            "TIEOFF_X67Y175": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E80",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 155,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y72": "DSP48E1",
            "DSP48_X5Y73": "DSP48E1",
            "TIEOFF_X67Y180": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E80",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 155,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y74": "DSP48E1",
            "DSP48_X5Y75": "DSP48E1",
            "TIEOFF_X67Y185": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E80",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 155,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y76": "DSP48E1",
            "DSP48_X5Y77": "DSP48E1",
            "TIEOFF_X67Y190": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X61Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001E80",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 155,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X5Y78": "DSP48E1",
            "DSP48_X5Y79": "DSP48E1",
            "TIEOFF_X67Y195": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442D80",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 225,
        "grid_y": 259,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y0": "DSP48E1",
            "DSP48_X7Y1": "DSP48E1",
            "TIEOFF_X99Y0": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442D80",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 225,
        "grid_y": 254,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y2": "DSP48E1",
            "DSP48_X7Y3": "DSP48E1",
            "TIEOFF_X99Y5": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442D80",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 225,
        "grid_y": 249,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y4": "DSP48E1",
            "DSP48_X7Y5": "DSP48E1",
            "TIEOFF_X99Y10": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442D80",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 225,
        "grid_y": 244,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y6": "DSP48E1",
            "DSP48_X7Y7": "DSP48E1",
            "TIEOFF_X99Y15": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442D80",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 225,
        "grid_y": 239,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y8": "DSP48E1",
            "DSP48_X7Y9": "DSP48E1",
            "TIEOFF_X99Y20": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442D80",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 225,
        "grid_y": 233,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y10": "DSP48E1",
            "DSP48_X7Y11": "DSP48E1",
            "TIEOFF_X99Y25": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442D80",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 225,
        "grid_y": 228,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y12": "DSP48E1",
            "DSP48_X7Y13": "DSP48E1",
            "TIEOFF_X99Y30": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442D80",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 225,
        "grid_y": 223,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y14": "DSP48E1",
            "DSP48_X7Y15": "DSP48E1",
            "TIEOFF_X99Y35": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442D80",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 225,
        "grid_y": 218,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y16": "DSP48E1",
            "DSP48_X7Y17": "DSP48E1",
            "TIEOFF_X99Y40": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442D80",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 225,
        "grid_y": 213,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y18": "DSP48E1",
            "DSP48_X7Y19": "DSP48E1",
            "TIEOFF_X99Y45": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422D80",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 225,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y20": "DSP48E1",
            "DSP48_X7Y21": "DSP48E1",
            "TIEOFF_X99Y50": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422D80",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 225,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y22": "DSP48E1",
            "DSP48_X7Y23": "DSP48E1",
            "TIEOFF_X99Y55": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422D80",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 225,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y24": "DSP48E1",
            "DSP48_X7Y25": "DSP48E1",
            "TIEOFF_X99Y60": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422D80",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 225,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y26": "DSP48E1",
            "DSP48_X7Y27": "DSP48E1",
            "TIEOFF_X99Y65": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422D80",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 225,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y28": "DSP48E1",
            "DSP48_X7Y29": "DSP48E1",
            "TIEOFF_X99Y70": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422D80",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 225,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y30": "DSP48E1",
            "DSP48_X7Y31": "DSP48E1",
            "TIEOFF_X99Y75": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422D80",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 225,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y32": "DSP48E1",
            "DSP48_X7Y33": "DSP48E1",
            "TIEOFF_X99Y80": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422D80",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 225,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y34": "DSP48E1",
            "DSP48_X7Y35": "DSP48E1",
            "TIEOFF_X99Y85": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422D80",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 225,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y36": "DSP48E1",
            "DSP48_X7Y37": "DSP48E1",
            "TIEOFF_X99Y90": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422D80",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 225,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y38": "DSP48E1",
            "DSP48_X7Y39": "DSP48E1",
            "TIEOFF_X99Y95": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402D80",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 225,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y40": "DSP48E1",
            "DSP48_X7Y41": "DSP48E1",
            "TIEOFF_X99Y100": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402D80",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 225,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y42": "DSP48E1",
            "DSP48_X7Y43": "DSP48E1",
            "TIEOFF_X99Y105": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402D80",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 225,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y44": "DSP48E1",
            "DSP48_X7Y45": "DSP48E1",
            "TIEOFF_X99Y110": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402D80",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 225,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y46": "DSP48E1",
            "DSP48_X7Y47": "DSP48E1",
            "TIEOFF_X99Y115": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402D80",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 225,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y48": "DSP48E1",
            "DSP48_X7Y49": "DSP48E1",
            "TIEOFF_X99Y120": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402D80",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 225,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y50": "DSP48E1",
            "DSP48_X7Y51": "DSP48E1",
            "TIEOFF_X99Y125": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402D80",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 225,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y52": "DSP48E1",
            "DSP48_X7Y53": "DSP48E1",
            "TIEOFF_X99Y130": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402D80",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 225,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y54": "DSP48E1",
            "DSP48_X7Y55": "DSP48E1",
            "TIEOFF_X99Y135": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402D80",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 225,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y56": "DSP48E1",
            "DSP48_X7Y57": "DSP48E1",
            "TIEOFF_X99Y140": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402D80",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 225,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y58": "DSP48E1",
            "DSP48_X7Y59": "DSP48E1",
            "TIEOFF_X99Y145": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002D80",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 225,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y60": "DSP48E1",
            "DSP48_X7Y61": "DSP48E1",
            "TIEOFF_X99Y150": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002D80",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 225,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y62": "DSP48E1",
            "DSP48_X7Y63": "DSP48E1",
            "TIEOFF_X99Y155": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002D80",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 225,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y64": "DSP48E1",
            "DSP48_X7Y65": "DSP48E1",
            "TIEOFF_X99Y160": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002D80",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 225,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y66": "DSP48E1",
            "DSP48_X7Y67": "DSP48E1",
            "TIEOFF_X99Y165": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002D80",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 225,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y68": "DSP48E1",
            "DSP48_X7Y69": "DSP48E1",
            "TIEOFF_X99Y170": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002D80",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 225,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y70": "DSP48E1",
            "DSP48_X7Y71": "DSP48E1",
            "TIEOFF_X99Y175": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002D80",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 225,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y72": "DSP48E1",
            "DSP48_X7Y73": "DSP48E1",
            "TIEOFF_X99Y180": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002D80",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 225,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y74": "DSP48E1",
            "DSP48_X7Y75": "DSP48E1",
            "TIEOFF_X99Y185": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002D80",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 225,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y76": "DSP48E1",
            "DSP48_X7Y77": "DSP48E1",
            "TIEOFF_X99Y190": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002D80",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 225,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y78": "DSP48E1",
            "DSP48_X7Y79": "DSP48E1",
            "TIEOFF_X99Y195": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y200": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022D80",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 225,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y80": "DSP48E1",
            "DSP48_X7Y81": "DSP48E1",
            "TIEOFF_X99Y200": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y205": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022D80",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 225,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y82": "DSP48E1",
            "DSP48_X7Y83": "DSP48E1",
            "TIEOFF_X99Y205": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y210": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022D80",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 225,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y84": "DSP48E1",
            "DSP48_X7Y85": "DSP48E1",
            "TIEOFF_X99Y210": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y215": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022D80",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 225,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y86": "DSP48E1",
            "DSP48_X7Y87": "DSP48E1",
            "TIEOFF_X99Y215": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y220": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022D80",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 225,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y88": "DSP48E1",
            "DSP48_X7Y89": "DSP48E1",
            "TIEOFF_X99Y220": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y225": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022D80",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 225,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y90": "DSP48E1",
            "DSP48_X7Y91": "DSP48E1",
            "TIEOFF_X99Y225": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y230": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022D80",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 225,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y92": "DSP48E1",
            "DSP48_X7Y93": "DSP48E1",
            "TIEOFF_X99Y230": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y235": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022D80",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 225,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y94": "DSP48E1",
            "DSP48_X7Y95": "DSP48E1",
            "TIEOFF_X99Y235": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y240": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022D80",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 225,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y96": "DSP48E1",
            "DSP48_X7Y97": "DSP48E1",
            "TIEOFF_X99Y240": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X91Y245": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022D80",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 225,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "DSP48_X7Y98": "DSP48E1",
            "DSP48_X7Y99": "DSP48E1",
            "TIEOFF_X99Y245": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "GTP_CHANNEL_0_MID_LEFT_X103Y6": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 103,
        "grid_y": 254,
        "pin_functions": {
            "IPAD_X1Y0": "MGTPRXN0_213",
            "IPAD_X1Y1": "MGTPRXP0_213",
            "OPAD_X0Y0": "MGTPTXN0_213",
            "OPAD_X0Y1": "MGTPTXP0_213"
        },
        "sites": {
            "GTPE2_CHANNEL_X0Y0": "GTPE2_CHANNEL",
            "IPAD_X1Y0": "IPAD",
            "IPAD_X1Y1": "IPAD",
            "OPAD_X0Y0": "OPAD",
            "OPAD_X0Y1": "OPAD"
        },
        "type": "GTP_CHANNEL_0_MID_LEFT"
    },
    "GTP_CHANNEL_0_MID_LEFT_X103Y214": {
        "bits": {},
        "clock_region": "X0Y4",
        "grid_x": 103,
        "grid_y": 46,
        "pin_functions": {
            "IPAD_X1Y36": "MGTPRXN0_216",
            "IPAD_X1Y37": "MGTPRXP0_216",
            "OPAD_X0Y8": "MGTPTXN0_216",
            "OPAD_X0Y9": "MGTPTXP0_216"
        },
        "sites": {
            "GTPE2_CHANNEL_X0Y4": "GTPE2_CHANNEL",
            "IPAD_X1Y36": "IPAD",
            "IPAD_X1Y37": "IPAD",
            "OPAD_X0Y8": "OPAD",
            "OPAD_X0Y9": "OPAD"
        },
        "type": "GTP_CHANNEL_0_MID_LEFT"
    },
    "GTP_CHANNEL_0_MID_RIGHT_X167Y6": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 167,
        "grid_y": 254,
        "pin_functions": {
            "IPAD_X2Y0": "MGTPRXN0_113",
            "IPAD_X2Y1": "MGTPRXP0_113",
            "OPAD_X1Y0": "MGTPTXN0_113",
            "OPAD_X1Y1": "MGTPTXP0_113"
        },
        "sites": {
            "GTPE2_CHANNEL_X1Y0": "GTPE2_CHANNEL",
            "IPAD_X2Y0": "IPAD",
            "IPAD_X2Y1": "IPAD",
            "OPAD_X1Y0": "OPAD",
            "OPAD_X1Y1": "OPAD"
        },
        "type": "GTP_CHANNEL_0_MID_RIGHT"
    },
    "GTP_CHANNEL_0_MID_RIGHT_X167Y214": {
        "bits": {},
        "clock_region": "X1Y4",
        "grid_x": 167,
        "grid_y": 46,
        "pin_functions": {
            "IPAD_X2Y36": "MGTPRXN0_116",
            "IPAD_X2Y37": "MGTPRXP0_116",
            "OPAD_X1Y8": "MGTPTXN0_116",
            "OPAD_X1Y9": "MGTPTXP0_116"
        },
        "sites": {
            "GTPE2_CHANNEL_X1Y4": "GTPE2_CHANNEL",
            "IPAD_X2Y36": "IPAD",
            "IPAD_X2Y37": "IPAD",
            "OPAD_X1Y8": "OPAD",
            "OPAD_X1Y9": "OPAD"
        },
        "type": "GTP_CHANNEL_0_MID_RIGHT"
    },
    "GTP_CHANNEL_1_MID_LEFT_X103Y17": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 103,
        "grid_y": 243,
        "pin_functions": {
            "IPAD_X1Y6": "MGTPRXN1_213",
            "IPAD_X1Y7": "MGTPRXP1_213",
            "OPAD_X0Y2": "MGTPTXN1_213",
            "OPAD_X0Y3": "MGTPTXP1_213"
        },
        "sites": {
            "GTPE2_CHANNEL_X0Y1": "GTPE2_CHANNEL",
            "IPAD_X1Y6": "IPAD",
            "IPAD_X1Y7": "IPAD",
            "OPAD_X0Y2": "OPAD",
            "OPAD_X0Y3": "OPAD"
        },
        "type": "GTP_CHANNEL_1_MID_LEFT"
    },
    "GTP_CHANNEL_1_MID_LEFT_X103Y225": {
        "bits": {},
        "clock_region": "X0Y4",
        "grid_x": 103,
        "grid_y": 35,
        "pin_functions": {
            "IPAD_X1Y42": "MGTPRXN1_216",
            "IPAD_X1Y43": "MGTPRXP1_216",
            "OPAD_X0Y10": "MGTPTXN1_216",
            "OPAD_X0Y11": "MGTPTXP1_216"
        },
        "sites": {
            "GTPE2_CHANNEL_X0Y5": "GTPE2_CHANNEL",
            "IPAD_X1Y42": "IPAD",
            "IPAD_X1Y43": "IPAD",
            "OPAD_X0Y10": "OPAD",
            "OPAD_X0Y11": "OPAD"
        },
        "type": "GTP_CHANNEL_1_MID_LEFT"
    },
    "GTP_CHANNEL_1_MID_RIGHT_X167Y17": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 167,
        "grid_y": 243,
        "pin_functions": {
            "IPAD_X2Y6": "MGTPRXN1_113",
            "IPAD_X2Y7": "MGTPRXP1_113",
            "OPAD_X1Y2": "MGTPTXN1_113",
            "OPAD_X1Y3": "MGTPTXP1_113"
        },
        "sites": {
            "GTPE2_CHANNEL_X1Y1": "GTPE2_CHANNEL",
            "IPAD_X2Y6": "IPAD",
            "IPAD_X2Y7": "IPAD",
            "OPAD_X1Y2": "OPAD",
            "OPAD_X1Y3": "OPAD"
        },
        "type": "GTP_CHANNEL_1_MID_RIGHT"
    },
    "GTP_CHANNEL_1_MID_RIGHT_X167Y225": {
        "bits": {},
        "clock_region": "X1Y4",
        "grid_x": 167,
        "grid_y": 35,
        "pin_functions": {
            "IPAD_X2Y42": "MGTPRXN1_116",
            "IPAD_X2Y43": "MGTPRXP1_116",
            "OPAD_X1Y10": "MGTPTXN1_116",
            "OPAD_X1Y11": "MGTPTXP1_116"
        },
        "sites": {
            "GTPE2_CHANNEL_X1Y5": "GTPE2_CHANNEL",
            "IPAD_X2Y42": "IPAD",
            "IPAD_X2Y43": "IPAD",
            "OPAD_X1Y10": "OPAD",
            "OPAD_X1Y11": "OPAD"
        },
        "type": "GTP_CHANNEL_1_MID_RIGHT"
    },
    "GTP_CHANNEL_2_MID_LEFT_X103Y35": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 103,
        "grid_y": 225,
        "pin_functions": {
            "IPAD_X1Y18": "MGTPRXN2_213",
            "IPAD_X1Y19": "MGTPRXP2_213",
            "OPAD_X0Y4": "MGTPTXN2_213",
            "OPAD_X0Y5": "MGTPTXP2_213"
        },
        "sites": {
            "GTPE2_CHANNEL_X0Y2": "GTPE2_CHANNEL",
            "IPAD_X1Y18": "IPAD",
            "IPAD_X1Y19": "IPAD",
            "OPAD_X0Y4": "OPAD",
            "OPAD_X0Y5": "OPAD"
        },
        "type": "GTP_CHANNEL_2_MID_LEFT"
    },
    "GTP_CHANNEL_2_MID_LEFT_X103Y243": {
        "bits": {},
        "clock_region": "X0Y4",
        "grid_x": 103,
        "grid_y": 17,
        "pin_functions": {
            "IPAD_X1Y54": "MGTPRXN2_216",
            "IPAD_X1Y55": "MGTPRXP2_216",
            "OPAD_X0Y12": "MGTPTXN2_216",
            "OPAD_X0Y13": "MGTPTXP2_216"
        },
        "sites": {
            "GTPE2_CHANNEL_X0Y6": "GTPE2_CHANNEL",
            "IPAD_X1Y54": "IPAD",
            "IPAD_X1Y55": "IPAD",
            "OPAD_X0Y12": "OPAD",
            "OPAD_X0Y13": "OPAD"
        },
        "type": "GTP_CHANNEL_2_MID_LEFT"
    },
    "GTP_CHANNEL_2_MID_RIGHT_X167Y35": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 167,
        "grid_y": 225,
        "pin_functions": {
            "IPAD_X2Y18": "MGTPRXN2_113",
            "IPAD_X2Y19": "MGTPRXP2_113",
            "OPAD_X1Y4": "MGTPTXN2_113",
            "OPAD_X1Y5": "MGTPTXP2_113"
        },
        "sites": {
            "GTPE2_CHANNEL_X1Y2": "GTPE2_CHANNEL",
            "IPAD_X2Y18": "IPAD",
            "IPAD_X2Y19": "IPAD",
            "OPAD_X1Y4": "OPAD",
            "OPAD_X1Y5": "OPAD"
        },
        "type": "GTP_CHANNEL_2_MID_RIGHT"
    },
    "GTP_CHANNEL_2_MID_RIGHT_X167Y243": {
        "bits": {},
        "clock_region": "X1Y4",
        "grid_x": 167,
        "grid_y": 17,
        "pin_functions": {
            "IPAD_X2Y54": "MGTPRXN2_116",
            "IPAD_X2Y55": "MGTPRXP2_116",
            "OPAD_X1Y12": "MGTPTXN2_116",
            "OPAD_X1Y13": "MGTPTXP2_116"
        },
        "sites": {
            "GTPE2_CHANNEL_X1Y6": "GTPE2_CHANNEL",
            "IPAD_X2Y54": "IPAD",
            "IPAD_X2Y55": "IPAD",
            "OPAD_X1Y12": "OPAD",
            "OPAD_X1Y13": "OPAD"
        },
        "type": "GTP_CHANNEL_2_MID_RIGHT"
    },
    "GTP_CHANNEL_3_MID_LEFT_X103Y46": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 103,
        "grid_y": 214,
        "pin_functions": {
            "IPAD_X1Y24": "MGTPRXN3_213",
            "IPAD_X1Y25": "MGTPRXP3_213",
            "OPAD_X0Y6": "MGTPTXN3_213",
            "OPAD_X0Y7": "MGTPTXP3_213"
        },
        "sites": {
            "GTPE2_CHANNEL_X0Y3": "GTPE2_CHANNEL",
            "IPAD_X1Y24": "IPAD",
            "IPAD_X1Y25": "IPAD",
            "OPAD_X0Y6": "OPAD",
            "OPAD_X0Y7": "OPAD"
        },
        "type": "GTP_CHANNEL_3_MID_LEFT"
    },
    "GTP_CHANNEL_3_MID_LEFT_X103Y254": {
        "bits": {},
        "clock_region": "X0Y4",
        "grid_x": 103,
        "grid_y": 6,
        "pin_functions": {
            "IPAD_X1Y60": "MGTPRXN3_216",
            "IPAD_X1Y61": "MGTPRXP3_216",
            "OPAD_X0Y14": "MGTPTXN3_216",
            "OPAD_X0Y15": "MGTPTXP3_216"
        },
        "sites": {
            "GTPE2_CHANNEL_X0Y7": "GTPE2_CHANNEL",
            "IPAD_X1Y60": "IPAD",
            "IPAD_X1Y61": "IPAD",
            "OPAD_X0Y14": "OPAD",
            "OPAD_X0Y15": "OPAD"
        },
        "type": "GTP_CHANNEL_3_MID_LEFT"
    },
    "GTP_CHANNEL_3_MID_RIGHT_X167Y46": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 167,
        "grid_y": 214,
        "pin_functions": {
            "IPAD_X2Y24": "MGTPRXN3_113",
            "IPAD_X2Y25": "MGTPRXP3_113",
            "OPAD_X1Y6": "MGTPTXN3_113",
            "OPAD_X1Y7": "MGTPTXP3_113"
        },
        "sites": {
            "GTPE2_CHANNEL_X1Y3": "GTPE2_CHANNEL",
            "IPAD_X2Y24": "IPAD",
            "IPAD_X2Y25": "IPAD",
            "OPAD_X1Y6": "OPAD",
            "OPAD_X1Y7": "OPAD"
        },
        "type": "GTP_CHANNEL_3_MID_RIGHT"
    },
    "GTP_CHANNEL_3_MID_RIGHT_X167Y254": {
        "bits": {},
        "clock_region": "X1Y4",
        "grid_x": 167,
        "grid_y": 6,
        "pin_functions": {
            "IPAD_X2Y60": "MGTPRXN3_116",
            "IPAD_X2Y61": "MGTPRXP3_116",
            "OPAD_X1Y14": "MGTPTXN3_116",
            "OPAD_X1Y15": "MGTPTXP3_116"
        },
        "sites": {
            "GTPE2_CHANNEL_X1Y7": "GTPE2_CHANNEL",
            "IPAD_X2Y60": "IPAD",
            "IPAD_X2Y61": "IPAD",
            "OPAD_X1Y14": "OPAD",
            "OPAD_X1Y15": "OPAD"
        },
        "type": "GTP_CHANNEL_3_MID_RIGHT"
    },
    "GTP_COMMON_MID_LEFT_X103Y23": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 103,
        "grid_y": 237,
        "pin_functions": {
            "IPAD_X1Y8": "MGTREFCLK0P_213",
            "IPAD_X1Y9": "MGTREFCLK0N_213",
            "IPAD_X1Y10": "MGTREFCLK1P_213",
            "IPAD_X1Y11": "MGTREFCLK1N_213"
        },
        "sites": {
            "GTPE2_COMMON_X0Y0": "GTPE2_COMMON",
            "IBUFDS_GTE2_X0Y0": "IBUFDS_GTE2",
            "IBUFDS_GTE2_X0Y1": "IBUFDS_GTE2",
            "IPAD_X1Y8": "IPAD",
            "IPAD_X1Y9": "IPAD",
            "IPAD_X1Y10": "IPAD",
            "IPAD_X1Y11": "IPAD"
        },
        "type": "GTP_COMMON_MID_LEFT"
    },
    "GTP_COMMON_MID_LEFT_X103Y231": {
        "bits": {},
        "clock_region": "X0Y4",
        "grid_x": 103,
        "grid_y": 29,
        "pin_functions": {
            "IPAD_X1Y44": "MGTREFCLK0P_216",
            "IPAD_X1Y45": "MGTREFCLK0N_216",
            "IPAD_X1Y46": "MGTREFCLK1P_216",
            "IPAD_X1Y47": "MGTREFCLK1N_216"
        },
        "sites": {
            "GTPE2_COMMON_X0Y1": "GTPE2_COMMON",
            "IBUFDS_GTE2_X0Y2": "IBUFDS_GTE2",
            "IBUFDS_GTE2_X0Y3": "IBUFDS_GTE2",
            "IPAD_X1Y44": "IPAD",
            "IPAD_X1Y45": "IPAD",
            "IPAD_X1Y46": "IPAD",
            "IPAD_X1Y47": "IPAD"
        },
        "type": "GTP_COMMON_MID_LEFT"
    },
    "GTP_COMMON_MID_RIGHT_X167Y23": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 167,
        "grid_y": 237,
        "pin_functions": {
            "IPAD_X2Y8": "MGTREFCLK0P_113",
            "IPAD_X2Y9": "MGTREFCLK0N_113",
            "IPAD_X2Y10": "MGTREFCLK1P_113",
            "IPAD_X2Y11": "MGTREFCLK1N_113"
        },
        "sites": {
            "GTPE2_COMMON_X1Y0": "GTPE2_COMMON",
            "IBUFDS_GTE2_X1Y0": "IBUFDS_GTE2",
            "IBUFDS_GTE2_X1Y1": "IBUFDS_GTE2",
            "IPAD_X2Y8": "IPAD",
            "IPAD_X2Y9": "IPAD",
            "IPAD_X2Y10": "IPAD",
            "IPAD_X2Y11": "IPAD"
        },
        "type": "GTP_COMMON_MID_RIGHT"
    },
    "GTP_COMMON_MID_RIGHT_X167Y231": {
        "bits": {},
        "clock_region": "X1Y4",
        "grid_x": 167,
        "grid_y": 29,
        "pin_functions": {
            "IPAD_X2Y44": "MGTREFCLK0P_116",
            "IPAD_X2Y45": "MGTREFCLK0N_116",
            "IPAD_X2Y46": "MGTREFCLK1P_116",
            "IPAD_X2Y47": "MGTREFCLK1N_116"
        },
        "sites": {
            "GTPE2_COMMON_X1Y1": "GTPE2_COMMON",
            "IBUFDS_GTE2_X1Y2": "IBUFDS_GTE2",
            "IBUFDS_GTE2_X1Y3": "IBUFDS_GTE2",
            "IPAD_X2Y44": "IPAD",
            "IPAD_X2Y45": "IPAD",
            "IPAD_X2Y46": "IPAD",
            "IPAD_X2Y47": "IPAD"
        },
        "type": "GTP_COMMON_MID_RIGHT"
    },
    "GTP_INT_INTERFACE_L_X74Y0": {
        "bits": {},
        "grid_x": 185,
        "grid_y": 259,
        "pin_functions": {},
        "sites": {},
        "type": "GTP_INT_INTERFACE_L"
    },
    "GTP_INT_INTERFACE_L_X74Y1": {
        "bits": {},
        "grid_x": 185,
        "grid_y": 258,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
    },
    "GTP_INT_INTERFACE_L_X74Y2": {
        "bits": {},
        "grid_x": 185,
        "grid_y": 257,
        "pin_functions": {},
        "sites": {},
        "type": "GTP_INT_INTERFACE_L"
    },
    "GTP_INT_INTERFACE_L_X74Y3": {
        "bits": {},
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        "grid_y": 256,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
    },
    "GTP_INT_INTERFACE_L_X74Y4": {
        "bits": {},
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        "grid_y": 255,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y5": {
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        "grid_y": 254,
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    "GTP_INT_INTERFACE_L_X74Y6": {
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    "GTP_INT_INTERFACE_L_X74Y7": {
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    "GTP_INT_INTERFACE_L_X74Y8": {
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        "grid_y": 251,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y9": {
        "bits": {},
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        "grid_y": 250,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y10": {
        "bits": {},
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        "grid_y": 249,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y11": {
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        "grid_y": 248,
        "pin_functions": {},
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    "GTP_INT_INTERFACE_L_X74Y12": {
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        "grid_y": 247,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y13": {
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        "grid_y": 246,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y14": {
        "bits": {},
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        "grid_y": 245,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y15": {
        "bits": {},
        "grid_x": 185,
        "grid_y": 244,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y16": {
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        "grid_x": 185,
        "grid_y": 243,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y17": {
        "bits": {},
        "grid_x": 185,
        "grid_y": 242,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y18": {
        "bits": {},
        "grid_x": 185,
        "grid_y": 241,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y19": {
        "bits": {},
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        "grid_y": 240,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y20": {
        "bits": {},
        "grid_x": 185,
        "grid_y": 239,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y21": {
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        "grid_x": 185,
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        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y22": {
        "bits": {},
        "grid_x": 185,
        "grid_y": 237,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y23": {
        "bits": {},
        "grid_x": 185,
        "grid_y": 236,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y24": {
        "bits": {},
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        "grid_y": 235,
        "pin_functions": {},
        "sites": {},
        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y25": {
        "bits": {},
        "grid_x": 185,
        "grid_y": 233,
        "pin_functions": {},
        "sites": {},
        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y26": {
        "bits": {},
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        "grid_y": 232,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y27": {
        "bits": {},
        "grid_x": 185,
        "grid_y": 231,
        "pin_functions": {},
        "sites": {},
        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y28": {
        "bits": {},
        "grid_x": 185,
        "grid_y": 230,
        "pin_functions": {},
        "sites": {},
        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y29": {
        "bits": {},
        "grid_x": 185,
        "grid_y": 229,
        "pin_functions": {},
        "sites": {},
        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y30": {
        "bits": {},
        "grid_x": 185,
        "grid_y": 228,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y31": {
        "bits": {},
        "grid_x": 185,
        "grid_y": 227,
        "pin_functions": {},
        "sites": {},
        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y32": {
        "bits": {},
        "grid_x": 185,
        "grid_y": 226,
        "pin_functions": {},
        "sites": {},
        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y33": {
        "bits": {},
        "grid_x": 185,
        "grid_y": 225,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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    "GTP_INT_INTERFACE_L_X74Y34": {
        "bits": {},
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        "type": "GTP_INT_INTERFACE_L"
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        "bits": {},
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        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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        "bits": {},
        "grid_x": 185,
        "grid_y": 222,
        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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        "type": "GTP_INT_INTERFACE_L"
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        "type": "GTP_INT_INTERFACE_L"
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        "type": "GTP_INT_INTERFACE_L"
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        "bits": {},
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        "type": "GTP_INT_INTERFACE_L"
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        "bits": {},
        "grid_x": 185,
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        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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        "bits": {},
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        "pin_functions": {},
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        "type": "GTP_INT_INTERFACE_L"
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        "type": "GTP_INT_INTERFACE_L"
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        "bits": {},
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        "type": "GTP_INT_INTERFACE_L"
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        "bits": {},
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        "type": "GTP_INT_INTERFACE_L"
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        "bits": {},
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        "bits": {},
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        "type": "GTP_INT_INTERFACE_L"
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        "type": "GTP_INT_INTERFACE_L"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 28,
                "offset": 61,
                "words": 2
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        "bits": {
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                "offset": 63,
                "words": 2
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        "bits": {
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            "TIEOFF_X0Y32": "TIEOFF"
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    "INT_L_X0Y33": {
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        "bits": {
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        "bits": {
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                "words": 2
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            "TIEOFF_X0Y79": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 28,
                "offset": 61,
                "words": 2
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            "TIEOFF_X0Y80": "TIEOFF"
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        "bits": {
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            "TIEOFF_X0Y81": "TIEOFF"
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    "INT_L_X0Y82": {
        "bits": {
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            "TIEOFF_X0Y82": "TIEOFF"
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            "TIEOFF_X0Y83": "TIEOFF"
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            "TIEOFF_X0Y84": "TIEOFF"
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            "TIEOFF_X0Y85": "TIEOFF"
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        "bits": {
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            "TIEOFF_X0Y115": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        "bits": {
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        "bits": {
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        "type": "INT_L"
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        "type": "INT_L"
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        "sites": {
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    "INT_L_X0Y125": {
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        "type": "INT_L"
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    "INT_L_X0Y126": {
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        "pin_functions": {},
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        "type": "INT_L"
    },
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        "bits": {
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y127": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y128": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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        "sites": {
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        "type": "INT_L"
    },
    "INT_L_X0Y129": {
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            "TIEOFF_X0Y179": "TIEOFF"
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        "bits": {
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            "TIEOFF_X0Y180": "TIEOFF"
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            "TIEOFF_X0Y181": "TIEOFF"
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            "TIEOFF_X0Y182": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X0Y229": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 4,
        "grid_y": 21,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y229": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y230": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 4,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y230": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y231": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 4,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y231": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y232": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 4,
        "grid_y": 18,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y232": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y233": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 4,
        "grid_y": 17,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y233": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y234": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 4,
        "grid_y": 16,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y234": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y235": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
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        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y235": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y236": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
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        "grid_y": 14,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y236": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y237": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y237": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y238": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y238": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y239": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y239": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y240": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
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        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y240": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y241": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 83,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y241": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y242": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 85,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y242": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y243": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 87,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y243": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y244": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 89,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y244": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y245": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 91,
                "words": 2
            }
        },
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        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y245": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y246": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 93,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y246": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y247": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 95,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y247": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y248": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 97,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
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        "grid_y": 2,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y248": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y249": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
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        "grid_y": 1,
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        "sites": {
            "TIEOFF_X0Y249": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 259,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y0": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 258,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y1": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 4,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 257,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y2": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 6,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 256,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y3": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 8,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 255,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y4": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 10,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 254,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y5": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 12,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y6": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 14,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y7": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 251,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y8": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 18,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 250,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y9": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 249,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 248,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 247,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 246,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 245,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 244,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 243,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 242,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 241,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 240,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 239,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y20": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 238,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 237,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y22": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 236,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y23": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 235,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y24": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 233,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y25": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 232,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y26": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 231,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y27": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
        "grid_y": 230,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y28": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
                "frames": 28,
                "offset": 59,
                "words": 2
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        "sites": {
            "TIEOFF_X2Y29": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00440100",
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            "TIEOFF_X2Y30": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440100",
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                "words": 2
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            "TIEOFF_X2Y31": "TIEOFF"
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    },
    "INT_L_X2Y32": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X2Y32": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y33": {
        "bits": {
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        "bits": {
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            "TIEOFF_X2Y66": "TIEOFF"
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            "TIEOFF_X2Y67": "TIEOFF"
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    "INT_L_X2Y68": {
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    "INT_L_X2Y72": {
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    "INT_L_X2Y75": {
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    "INT_L_X2Y76": {
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        "type": "INT_L"
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y77": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y78": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y79": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y80": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y81": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "offset": 65,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y82": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "offset": 67,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y83": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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        },
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            "TIEOFF_X2Y85": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "words": 2
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        },
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            "TIEOFF_X2Y86": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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        },
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            "TIEOFF_X2Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y88": {
        "bits": {
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                "baseaddr": "0x00420100",
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        },
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            "TIEOFF_X2Y88": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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            "TIEOFF_X2Y89": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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            "TIEOFF_X2Y90": "TIEOFF"
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        "bits": {
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        },
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            "TIEOFF_X2Y91": "TIEOFF"
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        "bits": {
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            "TIEOFF_X2Y92": "TIEOFF"
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        "bits": {
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        "bits": {
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        "bits": {
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            "TIEOFF_X2Y95": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420100",
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    "INT_L_X2Y98": {
        "bits": {
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    "INT_L_X2Y99": {
        "bits": {
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                "offset": 99,
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            "TIEOFF_X2Y99": "TIEOFF"
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        "bits": {
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            "TIEOFF_X2Y100": "TIEOFF"
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        "bits": {
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            "TIEOFF_X2Y101": "TIEOFF"
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        "bits": {
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            "TIEOFF_X2Y102": "TIEOFF"
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            "TIEOFF_X2Y103": "TIEOFF"
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        "bits": {
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            "TIEOFF_X2Y104": "TIEOFF"
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            "TIEOFF_X2Y105": "TIEOFF"
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        "bits": {
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            "TIEOFF_X2Y106": "TIEOFF"
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            "TIEOFF_X2Y107": "TIEOFF"
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        "bits": {
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            "TIEOFF_X2Y108": "TIEOFF"
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    "INT_L_X2Y109": {
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            "TIEOFF_X2Y109": "TIEOFF"
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    },
    "INT_L_X2Y110": {
        "bits": {
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        },
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            "TIEOFF_X2Y110": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X2Y111": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X2Y112": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y113": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y114": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y115": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y116": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 34,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y117": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y118": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y119": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y120": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y121": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 44,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y122": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y123": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y124": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y125": {
        "bits": {
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                "offset": 51,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y125": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y126": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 127,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
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            "CLB_IO_CLK": {
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                "frames": 28,
                "offset": 57,
                "words": 2
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            "TIEOFF_X2Y128": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00400100",
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                "words": 2
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        },
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            "TIEOFF_X2Y129": "TIEOFF"
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    "INT_L_X2Y130": {
        "bits": {
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                "baseaddr": "0x00400100",
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    "INT_L_X2Y131": {
        "bits": {
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                "baseaddr": "0x00400100",
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            "TIEOFF_X2Y131": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400100",
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            "TIEOFF_X2Y132": "TIEOFF"
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        "bits": {
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        "bits": {
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        "bits": {
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    "INT_L_X2Y162": {
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        "bits": {
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        "bits": {
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        "bits": {
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            "TIEOFF_X2Y165": "TIEOFF"
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                "words": 2
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    "INT_L_X2Y167": {
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                "words": 2
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        "type": "INT_L"
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        "bits": {
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                "words": 2
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        "type": "INT_L"
    },
    "INT_L_X2Y169": {
        "bits": {
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        "bits": {
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        "type": "INT_L"
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    "INT_L_X2Y171": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X2Y172": {
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        "type": "INT_L"
    },
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        "bits": {
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        "bits": {
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                "words": 2
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        "type": "INT_L"
    },
    "INT_L_X2Y176": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
    },
    "INT_L_X2Y177": {
        "bits": {
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                "words": 2
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 57,
                "words": 2
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            "TIEOFF_X2Y178": "TIEOFF"
        },
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    },
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        "bits": {
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            "TIEOFF_X2Y179": "TIEOFF"
        },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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            "TIEOFF_X2Y180": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X2Y181": {
        "bits": {
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            "TIEOFF_X2Y181": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X2Y182": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X2Y183": "TIEOFF"
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        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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    "INT_L_X2Y209": {
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            "TIEOFF_X2Y209": "TIEOFF"
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        },
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            "TIEOFF_X2Y210": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00020100",
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            "TIEOFF_X2Y211": "TIEOFF"
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        "bits": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X2Y212": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y213": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "words": 2
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        },
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            "TIEOFF_X2Y213": "TIEOFF"
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    },
    "INT_L_X2Y214": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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            "TIEOFF_X2Y214": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00020100",
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            "TIEOFF_X2Y215": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y216": {
        "bits": {
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                "baseaddr": "0x00020100",
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        },
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            "TIEOFF_X2Y216": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y217": {
        "bits": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X2Y217": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y218": {
        "bits": {
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                "baseaddr": "0x00020100",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y218": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y219": {
        "bits": {
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                "baseaddr": "0x00020100",
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                "words": 2
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            "TIEOFF_X2Y219": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y220": {
        "bits": {
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                "baseaddr": "0x00020100",
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            "TIEOFF_X2Y220": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y221": {
        "bits": {
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        },
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        "sites": {
            "TIEOFF_X2Y221": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X2Y222": {
        "bits": {
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        },
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            "TIEOFF_X2Y222": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y223": {
        "bits": {
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            "TIEOFF_X2Y223": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y224": {
        "bits": {
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                "baseaddr": "0x00020100",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y224": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y225": {
        "bits": {
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                "baseaddr": "0x00020100",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y225": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y226": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y226": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y227": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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        },
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        "sites": {
            "TIEOFF_X2Y227": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y228": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y228": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y229": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "offset": 59,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X2Y229": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y230": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "offset": 61,
                "words": 2
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        },
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            "TIEOFF_X2Y230": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y231": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "words": 2
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        },
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            "TIEOFF_X2Y231": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y232": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "words": 2
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        },
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            "TIEOFF_X2Y232": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y233": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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        },
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            "TIEOFF_X2Y233": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y234": {
        "bits": {
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                "baseaddr": "0x00020100",
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            "TIEOFF_X2Y234": "TIEOFF"
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    "INT_L_X2Y235": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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            "TIEOFF_X2Y235": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X2Y236": "TIEOFF"
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        "bits": {
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            "TIEOFF_X2Y237": "TIEOFF"
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        "bits": {
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            "TIEOFF_X2Y239": "TIEOFF"
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            "TIEOFF_X2Y246": "TIEOFF"
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    "INT_L_X2Y248": {
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    "INT_L_X2Y249": {
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        },
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            "TIEOFF_X4Y9": "TIEOFF"
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        },
        "clock_region": "X0Y0",
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    },
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        "bits": {
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                "baseaddr": "0x00440200",
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                "offset": 22,
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            "TIEOFF_X4Y11": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00440200",
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                "words": 2
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        },
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            "TIEOFF_X4Y12": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00440200",
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                "offset": 26,
                "words": 2
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        },
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            "TIEOFF_X4Y13": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00440200",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X4Y14": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y15": {
        "bits": {
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                "baseaddr": "0x00440200",
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                "offset": 30,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X4Y15": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440200",
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                "offset": 32,
                "words": 2
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            "TIEOFF_X4Y16": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y17": {
        "bits": {
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                "baseaddr": "0x00440200",
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                "offset": 34,
                "words": 2
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        "clock_region": "X0Y0",
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            "TIEOFF_X4Y17": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y18": {
        "bits": {
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                "baseaddr": "0x00440200",
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                "offset": 36,
                "words": 2
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        },
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            "TIEOFF_X4Y18": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00440200",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X4Y19": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y20": {
        "bits": {
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                "baseaddr": "0x00440200",
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                "offset": 40,
                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X4Y20": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y21": {
        "bits": {
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                "baseaddr": "0x00440200",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X4Y21": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y22": {
        "bits": {
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                "baseaddr": "0x00440200",
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                "offset": 44,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y22": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y23": {
        "bits": {
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                "baseaddr": "0x00440200",
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                "offset": 46,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X4Y23": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y24": {
        "bits": {
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                "baseaddr": "0x00440200",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X4Y24": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y25": {
        "bits": {
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                "baseaddr": "0x00440200",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y25": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y26": {
        "bits": {
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                "baseaddr": "0x00440200",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 15,
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            "TIEOFF_X4Y224": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y225": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020200",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y225": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y226": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020200",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y226": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y227": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020200",
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                "offset": 55,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y227": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y228": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020200",
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                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y228": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y229": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020200",
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                "offset": 59,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X4Y229": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X4Y230": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020200",
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                "offset": 61,
                "words": 2
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        },
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            "TIEOFF_X4Y230": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y231": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020200",
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                "words": 2
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        },
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            "TIEOFF_X4Y231": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020200",
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                "words": 2
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        },
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            "TIEOFF_X4Y232": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y233": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020200",
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            "TIEOFF_X4Y233": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y234": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020200",
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            "TIEOFF_X4Y234": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X4Y235": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020200",
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            "TIEOFF_X4Y235": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00020200",
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            "TIEOFF_X4Y236": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020200",
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            "TIEOFF_X4Y237": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020200",
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            "TIEOFF_X4Y238": "TIEOFF"
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        "bits": {
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            "TIEOFF_X4Y239": "TIEOFF"
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        "bits": {
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            "TIEOFF_X4Y240": "TIEOFF"
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    "INT_L_X4Y241": {
        "bits": {
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            "TIEOFF_X4Y241": "TIEOFF"
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    "INT_L_X4Y242": {
        "bits": {
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    "INT_L_X4Y243": {
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            "TIEOFF_X4Y243": "TIEOFF"
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    "INT_L_X4Y244": {
        "bits": {
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    "INT_L_X4Y245": {
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            "TIEOFF_X4Y245": "TIEOFF"
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    "INT_L_X4Y246": {
        "bits": {
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            "TIEOFF_X4Y246": "TIEOFF"
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    "INT_L_X4Y247": {
        "bits": {
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            "TIEOFF_X4Y247": "TIEOFF"
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    "INT_L_X4Y248": {
        "bits": {
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        },
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            "TIEOFF_X4Y248": "TIEOFF"
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    "INT_L_X4Y249": {
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            "TIEOFF_X4Y249": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00440300",
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                "offset": 0,
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            "TIEOFF_X6Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y1": {
        "bits": {
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                "baseaddr": "0x00440300",
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                "words": 2
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            "TIEOFF_X6Y1": "TIEOFF"
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                "baseaddr": "0x00440300",
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                "offset": 4,
                "words": 2
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            "TIEOFF_X6Y2": "TIEOFF"
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                "baseaddr": "0x00440300",
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            "TIEOFF_X6Y3": "TIEOFF"
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                "words": 2
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            "TIEOFF_X6Y4": "TIEOFF"
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        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X6Y5": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00440300",
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                "words": 2
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        },
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            "TIEOFF_X6Y6": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y7": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
                "frames": 28,
                "offset": 16,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y8": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
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                "offset": 18,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X6Y9": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y10": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
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                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X6Y11": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X6Y12": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 243,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
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                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 21,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y20": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y22": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 21,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y23": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440300",
                "frames": 28,
                "offset": 48,
                "words": 2
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        "bits": {
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                "baseaddr": "0x00420300",
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                "offset": 48,
                "words": 2
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    },
    "INT_L_X6Y75": {
        "bits": {
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                "baseaddr": "0x00420300",
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                "words": 2
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        "bits": {
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                "baseaddr": "0x00420300",
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    },
    "INT_L_X6Y77": {
        "bits": {
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                "baseaddr": "0x00420300",
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        },
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            "TIEOFF_X6Y77": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420300",
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            "TIEOFF_X6Y78": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420300",
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            "TIEOFF_X6Y79": "TIEOFF"
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    "INT_L_X6Y108": {
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    "INT_L_X6Y109": {
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            "TIEOFF_X6Y110": "TIEOFF"
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            "TIEOFF_X6Y111": "TIEOFF"
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    "INT_L_X6Y114": {
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        "type": "INT_L"
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    "INT_L_X6Y115": {
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    "INT_L_X6Y116": {
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        "type": "INT_L"
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    "INT_L_X6Y117": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X6Y118": {
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    "INT_L_X6Y119": {
        "bits": {
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        "bits": {
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    "INT_L_X6Y121": {
        "bits": {
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    "INT_L_X6Y122": {
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        "type": "INT_L"
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    "INT_L_X6Y123": {
        "bits": {
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                "baseaddr": "0x00400300",
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                "offset": 46,
                "words": 2
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        "sites": {
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        },
        "type": "INT_L"
    },
    "INT_L_X6Y223": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
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                "words": 2
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            "TIEOFF_X6Y223": "TIEOFF"
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    },
    "INT_L_X6Y224": {
        "bits": {
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                "baseaddr": "0x00020300",
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            "TIEOFF_X6Y224": "TIEOFF"
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    },
    "INT_L_X6Y225": {
        "bits": {
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                "baseaddr": "0x00020300",
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            "TIEOFF_X6Y225": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y226": {
        "bits": {
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            "TIEOFF_X6Y226": "TIEOFF"
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    "INT_L_X6Y227": {
        "bits": {
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            "TIEOFF_X6Y227": "TIEOFF"
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        "bits": {
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            "TIEOFF_X6Y228": "TIEOFF"
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                "words": 2
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                "words": 2
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                "words": 2
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            "TIEOFF_X8Y18": "TIEOFF"
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        "type": "INT_L"
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        "type": "INT_L"
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    "INT_L_X8Y21": {
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        "pin_functions": {},
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            "TIEOFF_X8Y21": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y22": {
        "bits": {
            "CLB_IO_CLK": {
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    "INT_L_X8Y121": {
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        "sites": {
            "TIEOFF_X8Y220": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y221": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
                "frames": 28,
                "offset": 42,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y221": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y222": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y222": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y223": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 46,
                "words": 2
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        },
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            "TIEOFF_X8Y223": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y224": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "words": 2
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        },
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            "TIEOFF_X8Y224": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y225": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 51,
                "words": 2
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        },
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            "TIEOFF_X8Y225": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y226": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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        },
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            "TIEOFF_X8Y226": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X8Y227": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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            "TIEOFF_X8Y227": "TIEOFF"
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    },
    "INT_L_X8Y228": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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            "TIEOFF_X8Y228": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00020400",
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            "TIEOFF_X8Y229": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020400",
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            "TIEOFF_X8Y230": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020400",
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            "TIEOFF_X8Y231": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020400",
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            "TIEOFF_X8Y232": "TIEOFF"
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        "bits": {
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            "TIEOFF_X8Y233": "TIEOFF"
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            "TIEOFF_X8Y234": "TIEOFF"
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        "bits": {
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        "bits": {
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            "TIEOFF_X8Y237": "TIEOFF"
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            "TIEOFF_X8Y238": "TIEOFF"
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    "INT_L_X8Y241": {
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            "TIEOFF_X8Y246": "TIEOFF"
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            "TIEOFF_X8Y248": "TIEOFF"
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            "TIEOFF_X8Y249": "TIEOFF"
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            "TIEOFF_X11Y0": "TIEOFF"
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        "bits": {
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            "TIEOFF_X11Y2": "TIEOFF"
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                "baseaddr": "0x00440500",
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        },
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            "TIEOFF_X11Y3": "TIEOFF"
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                "baseaddr": "0x00440500",
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                "words": 2
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        },
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            "TIEOFF_X11Y4": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00440500",
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                "offset": 10,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X11Y5": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00440500",
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                "offset": 12,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y6": "TIEOFF"
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    },
    "INT_L_X10Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440500",
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                "offset": 14,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y7": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00440500",
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                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X11Y8": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y9": {
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                "baseaddr": "0x00440500",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X11Y9": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y10": {
        "bits": {
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                "baseaddr": "0x00440500",
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                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X11Y10": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y11": {
        "bits": {
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                "baseaddr": "0x00440500",
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                "offset": 22,
                "words": 2
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        "clock_region": "X0Y0",
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            "TIEOFF_X11Y11": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440500",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X11Y12": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440500",
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                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y13": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440500",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y14": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440500",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y15": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440500",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440500",
                "frames": 28,
                "offset": 34,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y17": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440500",
                "frames": 28,
                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440500",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 31,
        "grid_y": 240,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "sites": {
            "TIEOFF_X11Y69": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
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            "TIEOFF_X11Y70": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "words": 2
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            "TIEOFF_X11Y71": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y72": {
        "bits": {
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                "baseaddr": "0x00420500",
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                "words": 2
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        },
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            "TIEOFF_X11Y72": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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        },
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            "TIEOFF_X11Y73": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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            "TIEOFF_X11Y74": "TIEOFF"
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    "INT_L_X10Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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            "TIEOFF_X11Y75": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420500",
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            "TIEOFF_X11Y76": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420500",
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        "bits": {
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            "TIEOFF_X11Y78": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400500",
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    "INT_L_X10Y105": {
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        },
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            "TIEOFF_X11Y105": "TIEOFF"
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        "bits": {
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            "TIEOFF_X11Y107": "TIEOFF"
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            "TIEOFF_X11Y108": "TIEOFF"
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        "pin_functions": {},
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        "bits": {
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        "bits": {
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                "baseaddr": "0x00400500",
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        "pin_functions": {},
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        "bits": {
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                "baseaddr": "0x00400500",
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        "bits": {
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        "type": "INT_L"
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    "INT_L_X10Y114": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X10Y115": {
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X10Y116": {
        "bits": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y116": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y117": {
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y117": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y118": {
        "bits": {
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y118": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "offset": 38,
                "words": 2
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            "TIEOFF_X11Y119": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400500",
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                "words": 2
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    "INT_L_X10Y121": {
        "bits": {
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    "INT_L_X10Y122": {
        "bits": {
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    "INT_L_X10Y167": {
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            "TIEOFF_X11Y168": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 38,
                "words": 2
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            "TIEOFF_X11Y169": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X11Y170": "TIEOFF"
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    "INT_L_X10Y171": {
        "bits": {
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            "TIEOFF_X11Y171": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y172": {
        "bits": {
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            "TIEOFF_X11Y172": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y173": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X11Y173": "TIEOFF"
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        "bits": {
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        "bits": {
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        "bits": {
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    "INT_L_X10Y204": {
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        "bits": {
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        "bits": {
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        "type": "INT_L"
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    "INT_L_X10Y217": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X10Y218": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 36,
                "words": 2
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        },
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        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y218": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y219": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
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        "grid_y": 32,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y219": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y220": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 40,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y220": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y221": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y4",
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        "grid_y": 30,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y221": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y222": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y222": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y223": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 46,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y223": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y224": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 48,
                "words": 2
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        },
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            "TIEOFF_X11Y224": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y225": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 51,
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        },
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            "TIEOFF_X11Y225": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y226": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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        },
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            "TIEOFF_X11Y226": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00020500",
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            "TIEOFF_X11Y227": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y228": {
        "bits": {
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                "baseaddr": "0x00020500",
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            "TIEOFF_X11Y228": "TIEOFF"
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    "INT_L_X10Y229": {
        "bits": {
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                "baseaddr": "0x00020500",
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            "TIEOFF_X11Y229": "TIEOFF"
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        "bits": {
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            "TIEOFF_X11Y230": "TIEOFF"
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        "bits": {
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            "TIEOFF_X11Y231": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020500",
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            "TIEOFF_X11Y232": "TIEOFF"
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    },
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        "bits": {
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            "TIEOFF_X11Y233": "TIEOFF"
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    "INT_L_X10Y234": {
        "bits": {
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            "TIEOFF_X11Y234": "TIEOFF"
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    "INT_L_X10Y235": {
        "bits": {
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            "TIEOFF_X11Y235": "TIEOFF"
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    "INT_L_X10Y236": {
        "bits": {
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            "TIEOFF_X11Y236": "TIEOFF"
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    "INT_L_X10Y237": {
        "bits": {
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    "INT_L_X10Y238": {
        "bits": {
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            "TIEOFF_X11Y238": "TIEOFF"
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    "INT_L_X10Y239": {
        "bits": {
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            "TIEOFF_X11Y239": "TIEOFF"
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    "INT_L_X10Y240": {
        "bits": {
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            "TIEOFF_X11Y240": "TIEOFF"
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    "INT_L_X10Y241": {
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    "INT_L_X10Y242": {
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    "INT_L_X10Y243": {
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            "TIEOFF_X11Y243": "TIEOFF"
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    "INT_L_X10Y244": {
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            "TIEOFF_X11Y244": "TIEOFF"
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    "INT_L_X10Y245": {
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            "TIEOFF_X11Y246": "TIEOFF"
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            "TIEOFF_X11Y247": "TIEOFF"
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    "INT_L_X10Y248": {
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            "TIEOFF_X11Y248": "TIEOFF"
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    "INT_L_X10Y249": {
        "bits": {
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            "TIEOFF_X11Y249": "TIEOFF"
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    },
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        "bits": {
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X13Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y1": {
        "bits": {
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                "baseaddr": "0x00440600",
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X13Y1": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y2": {
        "bits": {
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                "baseaddr": "0x00440600",
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                "offset": 4,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X13Y2": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y3": {
        "bits": {
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                "baseaddr": "0x00440600",
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                "offset": 6,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y3": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440600",
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                "offset": 8,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X13Y4": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440600",
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                "offset": 10,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y5": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440600",
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                "offset": 12,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y6": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440600",
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y7": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440600",
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                "offset": 16,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X13Y8": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440600",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "grid_y": 250,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y9": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440600",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440600",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y11": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440600",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440600",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440600",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440600",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440600",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440600",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 35,
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            "TIEOFF_X13Y215": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y216": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y216": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y217": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 34,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y217": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y218": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 36,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y218": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y219": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "offset": 38,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X13Y219": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y220": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "words": 2
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        },
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            "TIEOFF_X13Y220": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y221": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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            "TIEOFF_X13Y221": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y222": {
        "bits": {
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                "baseaddr": "0x00020600",
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            "TIEOFF_X13Y222": "TIEOFF"
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    "INT_L_X12Y223": {
        "bits": {
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                "baseaddr": "0x00020600",
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            "TIEOFF_X13Y223": "TIEOFF"
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    "INT_L_X12Y224": {
        "bits": {
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                "baseaddr": "0x00020600",
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            "TIEOFF_X13Y224": "TIEOFF"
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        "bits": {
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            "TIEOFF_X13Y225": "TIEOFF"
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        "bits": {
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            "TIEOFF_X13Y228": "TIEOFF"
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        "bits": {
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            "TIEOFF_X13Y229": "TIEOFF"
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            "TIEOFF_X13Y231": "TIEOFF"
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            "TIEOFF_X13Y232": "TIEOFF"
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            "TIEOFF_X13Y233": "TIEOFF"
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            "TIEOFF_X13Y234": "TIEOFF"
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            "TIEOFF_X13Y235": "TIEOFF"
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    "INT_L_X12Y241": {
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            "TIEOFF_X13Y244": "TIEOFF"
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            "TIEOFF_X13Y246": "TIEOFF"
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            "TIEOFF_X13Y247": "TIEOFF"
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    "INT_L_X12Y248": {
        "bits": {
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        },
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            "TIEOFF_X13Y248": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y249": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X13Y249": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X14Y0": {
        "bits": {
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                "baseaddr": "0x00440700",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X16Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X14Y1": {
        "bits": {
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                "baseaddr": "0x00440700",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X16Y1": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X14Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X16Y2": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X14Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
                "frames": 28,
                "offset": 6,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X16Y3": "TIEOFF"
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    "INT_L_X14Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X16Y4": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X14Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
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                "offset": 10,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X16Y5": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X14Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
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                "offset": 12,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X16Y6": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X14Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
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                "offset": 14,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X16Y7": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X14Y8": {
        "bits": {
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                "baseaddr": "0x00440700",
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                "offset": 16,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X16Y8": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X14Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X16Y9": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X16Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y11": {
        "bits": {
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                "baseaddr": "0x00440700",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X16Y11": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X14Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X16Y12": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X14Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X16Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X16Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X14Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440700",
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                "baseaddr": "0x00020700",
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    "INT_L_X16Y13": {
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            "TIEOFF_X18Y112": "TIEOFF"
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        "bits": {
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    },
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            "TIEOFF_X18Y145": "TIEOFF"
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            "TIEOFF_X18Y147": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X16Y152": {
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    "INT_L_X16Y154": {
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        "type": "INT_L"
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    "INT_L_X16Y161": {
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    },
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        "bits": {
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                "baseaddr": "0x00020800",
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            "TIEOFF_X18Y213": "TIEOFF"
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        "bits": {
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            "TIEOFF_X18Y214": "TIEOFF"
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            "TIEOFF_X18Y215": "TIEOFF"
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            "TIEOFF_X18Y216": "TIEOFF"
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            "TIEOFF_X18Y217": "TIEOFF"
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            "TIEOFF_X18Y248": "TIEOFF"
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            "TIEOFF_X18Y249": "TIEOFF"
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        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X20Y8": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00440900",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
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    "INT_L_X18Y10": {
        "bits": {
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                "baseaddr": "0x00440900",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y10": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00440900",
                "frames": 28,
                "offset": 22,
                "words": 2
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            "TIEOFF_X20Y11": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00440900",
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                "words": 2
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    },
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        "bits": {
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                "baseaddr": "0x00440900",
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            "TIEOFF_X20Y13": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00440900",
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                "words": 2
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            "TIEOFF_X20Y14": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00440900",
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            "TIEOFF_X20Y15": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00440900",
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    "INT_L_X18Y60": {
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        "sites": {
            "TIEOFF_X20Y209": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y210": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y210": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y211": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
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            "TIEOFF_X20Y211": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y212": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X20Y212": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y213": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
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                "words": 2
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        },
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            "TIEOFF_X20Y213": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X18Y214": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
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        },
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            "TIEOFF_X20Y214": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y215": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
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            "TIEOFF_X20Y215": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y216": {
        "bits": {
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                "baseaddr": "0x00020900",
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            "TIEOFF_X20Y216": "TIEOFF"
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    "INT_L_X18Y217": {
        "bits": {
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                "baseaddr": "0x00020900",
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            "TIEOFF_X20Y217": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y218": {
        "bits": {
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                "baseaddr": "0x00020900",
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            "TIEOFF_X20Y218": "TIEOFF"
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    "INT_L_X18Y219": {
        "bits": {
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                "baseaddr": "0x00020900",
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            "TIEOFF_X20Y219": "TIEOFF"
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    "INT_L_X18Y220": {
        "bits": {
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                "baseaddr": "0x00020900",
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            "TIEOFF_X20Y220": "TIEOFF"
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                "baseaddr": "0x00020900",
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            "TIEOFF_X20Y221": "TIEOFF"
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            "TIEOFF_X20Y222": "TIEOFF"
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        "bits": {
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            "TIEOFF_X20Y223": "TIEOFF"
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            "TIEOFF_X20Y227": "TIEOFF"
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            "TIEOFF_X20Y228": "TIEOFF"
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        "bits": {
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        "bits": {
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            "TIEOFF_X20Y230": "TIEOFF"
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            "TIEOFF_X20Y232": "TIEOFF"
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            "TIEOFF_X20Y233": "TIEOFF"
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            "TIEOFF_X20Y235": "TIEOFF"
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            "TIEOFF_X20Y239": "TIEOFF"
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    "INT_L_X18Y241": {
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    "INT_L_X18Y242": {
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            "TIEOFF_X20Y242": "TIEOFF"
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    "INT_L_X18Y243": {
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                "baseaddr": "0x00020900",
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                "words": 2
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            "TIEOFF_X20Y243": "TIEOFF"
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    "INT_L_X18Y244": {
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                "baseaddr": "0x00020900",
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                "words": 2
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            "TIEOFF_X20Y244": "TIEOFF"
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    "INT_L_X18Y245": {
        "bits": {
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                "words": 2
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            "TIEOFF_X20Y245": "TIEOFF"
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    "INT_L_X18Y246": {
        "bits": {
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                "baseaddr": "0x00020900",
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                "words": 2
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        },
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            "TIEOFF_X20Y246": "TIEOFF"
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    },
    "INT_L_X18Y247": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X20Y247": "TIEOFF"
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    "INT_L_X18Y248": {
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                "baseaddr": "0x00020900",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X20Y248": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X18Y249": {
        "bits": {
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                "baseaddr": "0x00020900",
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                "offset": 99,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X20Y249": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440A00",
                "frames": 28,
                "offset": 0,
                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X22Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440A00",
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y1": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440A00",
                "frames": 28,
                "offset": 4,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y2": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440A00",
                "frames": 28,
                "offset": 6,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y3": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440A00",
                "frames": 28,
                "offset": 8,
                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X22Y4": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440A00",
                "frames": 28,
                "offset": 10,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y5": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440A00",
                "frames": 28,
                "offset": 12,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y6": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440A00",
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y7": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440A00",
                "frames": 28,
                "offset": 16,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 55,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X22Y8": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X20Y9": {
        "bits": {
            "CLB_IO_CLK": {
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        "sites": {
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            "TIEOFF_X24Y56": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B00",
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            "TIEOFF_X24Y57": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B00",
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B00",
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            "TIEOFF_X24Y59": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B00",
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            "TIEOFF_X24Y60": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B00",
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            "TIEOFF_X24Y61": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00420B00",
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            "TIEOFF_X24Y62": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X24Y64": "TIEOFF"
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            "TIEOFF_X24Y65": "TIEOFF"
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    "INT_L_X22Y89": {
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                "words": 2
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            "TIEOFF_X24Y89": "TIEOFF"
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    "INT_L_X22Y91": {
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                "baseaddr": "0x00420B00",
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                "words": 2
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                "baseaddr": "0x00420B00",
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                "words": 2
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    "INT_L_X22Y93": {
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                "words": 2
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            "TIEOFF_X24Y94": "TIEOFF"
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    "INT_L_X22Y95": {
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            "TIEOFF_X24Y95": "TIEOFF"
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    "INT_L_X22Y96": {
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                "words": 2
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        "type": "INT_L"
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                "words": 2
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            "TIEOFF_X24Y97": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X22Y98": {
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                "words": 2
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            "TIEOFF_X24Y98": "TIEOFF"
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        "type": "INT_L"
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                "words": 2
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    "INT_L_X22Y200": {
        "bits": {
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                "baseaddr": "0x00020B00",
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    "INT_L_X22Y201": {
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            "TIEOFF_X24Y201": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X22Y202": {
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        },
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            "TIEOFF_X24Y202": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X22Y203": {
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            "TIEOFF_X24Y203": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X22Y204": {
        "bits": {
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            "TIEOFF_X24Y204": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y205": {
        "bits": {
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            "TIEOFF_X24Y207": "TIEOFF"
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            "TIEOFF_X24Y210": "TIEOFF"
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                "baseaddr": "0x00440C00",
                "frames": 28,
                "offset": 8,
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440C00",
                "frames": 28,
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            "TIEOFF_X26Y5": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00440C00",
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            "TIEOFF_X26Y8": "TIEOFF"
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y102": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
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            "TIEOFF_X26Y103": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00400C00",
                "frames": 28,
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            "TIEOFF_X26Y104": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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            "TIEOFF_X26Y105": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00400C00",
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            "TIEOFF_X26Y106": "TIEOFF"
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        "bits": {
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            "TIEOFF_X26Y108": "TIEOFF"
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    "INT_L_X24Y142": {
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    "INT_L_X24Y149": {
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        "type": "INT_L"
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        "pin_functions": {},
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            "TIEOFF_X26Y150": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X24Y151": {
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        "pin_functions": {},
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            "TIEOFF_X26Y151": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00020C00",
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            "TIEOFF_X26Y202": "TIEOFF"
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    },
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            "TIEOFF_X26Y203": "TIEOFF"
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            "TIEOFF_X26Y204": "TIEOFF"
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            "TIEOFF_X28Y0": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440D00",
                "frames": 28,
                "offset": 2,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X28Y1": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440D00",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X28Y2": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440D00",
                "frames": 28,
                "offset": 6,
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            "TIEOFF_X28Y3": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440D00",
                "frames": 28,
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            "TIEOFF_X28Y4": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440D00",
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            "TIEOFF_X28Y5": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440D00",
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            "TIEOFF_X28Y6": "TIEOFF"
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            "TIEOFF_X28Y7": "TIEOFF"
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            "TIEOFF_X28Y8": "TIEOFF"
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            "TIEOFF_X28Y9": "TIEOFF"
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        "type": "INT_L"
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y49": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X28Y50": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D00",
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            "TIEOFF_X28Y51": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D00",
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        "bits": {
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            "TIEOFF_X28Y53": "TIEOFF"
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                "baseaddr": "0x00420D00",
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                "words": 2
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            "TIEOFF_X28Y94": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X26Y98": {
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            "TIEOFF_X28Y98": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X26Y99": {
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                "baseaddr": "0x00420D00",
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        "sites": {
            "TIEOFF_X28Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
                "frames": 28,
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            "TIEOFF_X28Y100": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
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            "TIEOFF_X28Y101": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
                "frames": 28,
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            "TIEOFF_X28Y102": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00400D00",
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            "TIEOFF_X28Y103": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400D00",
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            "TIEOFF_X28Y104": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00400D00",
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            "TIEOFF_X28Y105": "TIEOFF"
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            "TIEOFF_X28Y106": "TIEOFF"
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            "TIEOFF_X28Y107": "TIEOFF"
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        "bits": {
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            "TIEOFF_X28Y108": "TIEOFF"
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        "bits": {
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    "INT_L_X26Y131": {
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    "INT_L_X26Y132": {
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    "INT_L_X26Y134": {
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    "INT_L_X26Y135": {
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    "INT_L_X26Y137": {
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    "INT_L_X26Y138": {
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    "INT_L_X26Y141": {
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    "INT_L_X26Y144": {
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    "INT_L_X26Y145": {
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    "INT_L_X26Y146": {
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    "INT_L_X26Y147": {
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        "type": "INT_L"
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    "INT_L_X26Y148": {
        "bits": {
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    },
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            "TIEOFF_X28Y197": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y198": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 97,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 68,
        "grid_y": 54,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y198": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y199": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D00",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 68,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y199": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y225": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 68,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y225": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y226": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
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        "grid_y": 24,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y226": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y227": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
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        "grid_y": 23,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y227": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y228": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
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        "grid_y": 22,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y228": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y229": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
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            "TIEOFF_X28Y229": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y230": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
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            "TIEOFF_X28Y230": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y231": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
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                "offset": 63,
                "words": 2
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            "TIEOFF_X28Y231": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y232": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
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            "TIEOFF_X28Y232": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y233": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
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                "offset": 67,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X28Y233": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y234": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
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                "offset": 69,
                "words": 2
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            "TIEOFF_X28Y234": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y235": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
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                "offset": 71,
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            "TIEOFF_X28Y235": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y236": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
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                "offset": 73,
                "words": 2
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            "TIEOFF_X28Y236": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y237": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
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                "offset": 75,
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        },
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            "TIEOFF_X28Y237": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y238": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
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                "offset": 77,
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        },
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            "TIEOFF_X28Y238": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y239": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
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                "offset": 79,
                "words": 2
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        },
        "clock_region": "X0Y4",
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            "TIEOFF_X28Y239": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y240": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
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                "offset": 81,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X28Y240": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y241": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
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                "offset": 83,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X28Y241": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y242": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
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                "offset": 85,
                "words": 2
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        },
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            "TIEOFF_X28Y242": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y243": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
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                "offset": 87,
                "words": 2
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            "TIEOFF_X28Y243": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y244": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
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                "offset": 89,
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            "TIEOFF_X28Y244": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y245": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
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                "offset": 91,
                "words": 2
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        },
        "clock_region": "X0Y4",
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            "TIEOFF_X28Y245": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y246": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X28Y246": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y247": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
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                "offset": 95,
                "words": 2
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        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y247": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y248": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
        "clock_region": "X0Y4",
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        "sites": {
            "TIEOFF_X28Y248": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y249": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D00",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X28Y249": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 0,
                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y0": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 2,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X30Y1": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y2": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 6,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X30Y3": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 8,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X30Y4": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 10,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 254,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y5": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 12,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y6": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 14,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 252,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y7": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 73,
        "grid_y": 251,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y8": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 18,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 73,
        "grid_y": 250,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y9": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 73,
        "grid_y": 249,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 248,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 73,
        "grid_y": 247,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 73,
        "grid_y": 246,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 73,
        "grid_y": 245,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 73,
        "grid_y": 244,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 73,
        "grid_y": 243,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 73,
        "grid_y": 242,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 73,
        "grid_y": 241,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 73,
        "grid_y": 240,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 73,
        "grid_y": 239,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y20": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 73,
        "grid_y": 238,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
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                "offset": 44,
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            "TIEOFF_X30Y22": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
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            "TIEOFF_X30Y23": "TIEOFF"
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    },
    "INT_L_X28Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
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            "TIEOFF_X30Y24": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
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            "TIEOFF_X30Y25": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
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            "TIEOFF_X30Y26": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00440E00",
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            "TIEOFF_X30Y28": "TIEOFF"
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            "TIEOFF_X30Y66": "TIEOFF"
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    "INT_L_X28Y67": {
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            "TIEOFF_X30Y67": "TIEOFF"
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            "TIEOFF_X30Y68": "TIEOFF"
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    "INT_L_X28Y69": {
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            "TIEOFF_X30Y70": "TIEOFF"
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    "INT_L_X28Y71": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X30Y71": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
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            "TIEOFF_X30Y72": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420E00",
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            "TIEOFF_X30Y73": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
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            "TIEOFF_X30Y74": "TIEOFF"
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    "INT_L_X28Y75": {
        "bits": {
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                "baseaddr": "0x00420E00",
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            "TIEOFF_X30Y75": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420E00",
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            "TIEOFF_X30Y77": "TIEOFF"
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        "bits": {
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            "TIEOFF_X30Y113": "TIEOFF"
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        "bits": {
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            "TIEOFF_X30Y114": "TIEOFF"
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            "TIEOFF_X30Y115": "TIEOFF"
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    "INT_L_X28Y116": {
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            "TIEOFF_X30Y116": "TIEOFF"
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    "INT_L_X28Y117": {
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    "INT_L_X28Y118": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X28Y119": {
        "bits": {
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        "pin_functions": {},
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            "TIEOFF_X30Y119": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
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                "words": 2
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        "type": "INT_L"
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    "INT_L_X28Y218": {
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    "INT_L_X28Y219": {
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        "sites": {
            "TIEOFF_X30Y219": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y220": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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                "words": 2
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            "TIEOFF_X30Y220": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y221": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y221": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y222": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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                "words": 2
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            "TIEOFF_X30Y222": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y223": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y223": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y224": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y224": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y225": {
        "bits": {
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                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y225": "TIEOFF"
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    "INT_L_X28Y226": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y226": "TIEOFF"
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            "TIEOFF_X30Y227": "TIEOFF"
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            "TIEOFF_X30Y228": "TIEOFF"
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            "TIEOFF_X30Y229": "TIEOFF"
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            "TIEOFF_X30Y230": "TIEOFF"
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            "TIEOFF_X30Y231": "TIEOFF"
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            "TIEOFF_X30Y232": "TIEOFF"
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            "TIEOFF_X32Y1": "TIEOFF"
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    },
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            "TIEOFF_X32Y3": "TIEOFF"
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            "TIEOFF_X32Y4": "TIEOFF"
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            "TIEOFF_X32Y5": "TIEOFF"
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    },
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                "baseaddr": "0x00440F00",
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            "TIEOFF_X32Y6": "TIEOFF"
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    },
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            "TIEOFF_X32Y7": "TIEOFF"
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            "TIEOFF_X32Y8": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00440F00",
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                "words": 2
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            "TIEOFF_X32Y9": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00440F00",
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                "offset": 20,
                "words": 2
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            "TIEOFF_X32Y10": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F00",
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                "offset": 22,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X32Y11": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F00",
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                "words": 2
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        },
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            "TIEOFF_X32Y12": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F00",
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                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X32Y13": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F00",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X32Y14": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F00",
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                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y15": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F00",
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                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F00",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F00",
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            "TIEOFF_X32Y67": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 36,
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            "TIEOFF_X32Y68": "TIEOFF"
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                "baseaddr": "0x00420F00",
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            "TIEOFF_X32Y69": "TIEOFF"
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        "bits": {
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            "TIEOFF_X32Y70": "TIEOFF"
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            "TIEOFF_X32Y71": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420F00",
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            "TIEOFF_X32Y72": "TIEOFF"
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            "TIEOFF_X32Y73": "TIEOFF"
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    "INT_L_X30Y115": {
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    "INT_L_X30Y116": {
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        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X32Y166": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y167": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
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                "words": 2
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        },
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            "TIEOFF_X32Y167": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
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            "TIEOFF_X32Y168": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y169": {
        "bits": {
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                "baseaddr": "0x00000F00",
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            "TIEOFF_X32Y169": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00000F00",
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            "TIEOFF_X32Y170": "TIEOFF"
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    "INT_L_X30Y171": {
        "bits": {
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            "TIEOFF_X32Y171": "TIEOFF"
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            "TIEOFF_X32Y172": "TIEOFF"
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    "INT_L_X30Y204": {
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        "type": "INT_L"
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        "type": "INT_L"
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        "type": "INT_L"
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    "INT_L_X30Y215": {
        "bits": {
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                "words": 2
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            "TIEOFF_X32Y215": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X32Y216": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y217": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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                "words": 2
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            "TIEOFF_X32Y217": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y218": {
        "bits": {
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                "baseaddr": "0x00020F00",
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            "TIEOFF_X32Y218": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y219": {
        "bits": {
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                "baseaddr": "0x00020F00",
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            "TIEOFF_X32Y219": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y220": {
        "bits": {
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                "baseaddr": "0x00020F00",
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            "TIEOFF_X32Y220": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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            "TIEOFF_X32Y221": "TIEOFF"
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            "TIEOFF_X32Y222": "TIEOFF"
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        "bits": {
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            "TIEOFF_X32Y223": "TIEOFF"
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    "INT_L_X30Y249": {
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        "bits": {
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            "TIEOFF_X35Y0": "TIEOFF"
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                "words": 2
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            "TIEOFF_X35Y1": "TIEOFF"
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            "TIEOFF_X35Y2": "TIEOFF"
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            "TIEOFF_X35Y3": "TIEOFF"
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            "TIEOFF_X35Y4": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y5": {
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            "TIEOFF_X35Y5": "TIEOFF"
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    },
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                "baseaddr": "0x00441000",
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                "words": 2
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            "TIEOFF_X35Y6": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00441000",
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            "TIEOFF_X35Y7": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y8": {
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                "baseaddr": "0x00441000",
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        "sites": {
            "TIEOFF_X35Y8": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00441000",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X35Y10": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y11": {
        "bits": {
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                "baseaddr": "0x00441000",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y11": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00441000",
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                "offset": 24,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y12": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00441000",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y13": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00441000",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "grid_y": 245,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00441000",
                "frames": 28,
                "offset": 30,
                "words": 2
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            "TIEOFF_X35Y15": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00441000",
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            "TIEOFF_X35Y16": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00441000",
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            "TIEOFF_X35Y17": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y18": {
        "bits": {
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            "TIEOFF_X35Y18": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X35Y19": "TIEOFF"
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        "bits": {
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            "TIEOFF_X35Y64": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421000",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
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            "TIEOFF_X35Y65": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421000",
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                "words": 2
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        },
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            "TIEOFF_X35Y66": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421000",
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                "words": 2
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        },
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            "TIEOFF_X35Y67": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421000",
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        },
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            "TIEOFF_X35Y68": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421000",
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            "TIEOFF_X35Y69": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421000",
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            "TIEOFF_X35Y70": "TIEOFF"
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        "bits": {
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            "TIEOFF_X35Y71": "TIEOFF"
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            "TIEOFF_X35Y72": "TIEOFF"
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        "bits": {
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        "bits": {
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                "baseaddr": "0x00421000",
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                "words": 2
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            "TIEOFF_X35Y99": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00401000",
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            "TIEOFF_X35Y100": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401000",
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                "words": 2
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        },
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            "TIEOFF_X35Y101": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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        },
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            "TIEOFF_X35Y102": "TIEOFF"
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    },
    "INT_L_X32Y103": {
        "bits": {
            "CLB_IO_CLK": {
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        "pin_functions": {},
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            "TIEOFF_X35Y103": "TIEOFF"
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    },
    "INT_L_X32Y104": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X32Y105": {
        "bits": {
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                "baseaddr": "0x00401000",
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            "TIEOFF_X35Y105": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y106": {
        "bits": {
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                "baseaddr": "0x00401000",
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                "words": 2
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            "TIEOFF_X35Y106": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00401000",
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    "INT_L_X32Y108": {
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        },
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    "INT_L_X32Y109": {
        "bits": {
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            "TIEOFF_X35Y109": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X35Y110": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y111": {
        "bits": {
            "CLB_IO_CLK": {
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y111": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y112": {
        "bits": {
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y112": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y113": {
        "bits": {
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y113": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y114": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X35Y114": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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            "TIEOFF_X35Y115": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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            "TIEOFF_X35Y116": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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            "TIEOFF_X35Y117": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y118": {
        "bits": {
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        },
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            "TIEOFF_X35Y118": "TIEOFF"
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    },
    "INT_L_X32Y119": {
        "bits": {
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                "baseaddr": "0x00401000",
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            "TIEOFF_X35Y119": "TIEOFF"
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    "INT_L_X32Y120": {
        "bits": {
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            "TIEOFF_X35Y120": "TIEOFF"
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    "INT_L_X32Y121": {
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            "TIEOFF_X35Y121": "TIEOFF"
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            "TIEOFF_X35Y123": "TIEOFF"
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        "bits": {
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    "INT_L_X32Y147": {
        "bits": {
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            "TIEOFF_X35Y147": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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            "TIEOFF_X35Y148": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y149": {
        "bits": {
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                "words": 2
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            "TIEOFF_X35Y149": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X35Y150": "TIEOFF"
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        "bits": {
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        "type": "INT_L"
    },
    "INT_L_X32Y152": {
        "bits": {
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            "TIEOFF_X35Y152": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y153": {
        "bits": {
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        "clock_region": "X0Y3",
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        "type": "INT_L"
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    "INT_L_X32Y154": {
        "bits": {
            "CLB_IO_CLK": {
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    },
    "INT_L_X32Y155": {
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    "INT_L_X32Y156": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X32Y157": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X32Y159": {
        "bits": {
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        },
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        "type": "INT_L"
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    "INT_L_X32Y160": {
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        "type": "INT_L"
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    "INT_L_X32Y161": {
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        "type": "INT_L"
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    "INT_L_X32Y162": {
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        "type": "INT_L"
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    "INT_L_X32Y163": {
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        "bits": {
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                "baseaddr": "0x00001000",
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        "bits": {
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            "TIEOFF_X35Y166": "TIEOFF"
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        "bits": {
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y213": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y214": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y214": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y215": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y215": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y216": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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                "offset": 32,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X35Y216": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y217": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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                "words": 2
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        },
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            "TIEOFF_X35Y217": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y218": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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        },
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            "TIEOFF_X35Y218": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y219": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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        },
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            "TIEOFF_X35Y219": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y220": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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            "TIEOFF_X35Y220": "TIEOFF"
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    "INT_L_X32Y221": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X35Y221": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X35Y222": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X35Y223": "TIEOFF"
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        "bits": {
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            "TIEOFF_X35Y224": "TIEOFF"
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            "TIEOFF_X35Y225": "TIEOFF"
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        "bits": {
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            "TIEOFF_X35Y226": "TIEOFF"
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            "TIEOFF_X35Y227": "TIEOFF"
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            "TIEOFF_X35Y228": "TIEOFF"
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            "TIEOFF_X35Y229": "TIEOFF"
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            "TIEOFF_X35Y230": "TIEOFF"
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            "TIEOFF_X35Y231": "TIEOFF"
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            "TIEOFF_X35Y232": "TIEOFF"
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    "INT_L_X32Y233": {
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            "TIEOFF_X35Y234": "TIEOFF"
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            "TIEOFF_X35Y235": "TIEOFF"
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            "TIEOFF_X35Y245": "TIEOFF"
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        "bits": {
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            "TIEOFF_X35Y246": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y247": {
        "bits": {
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        },
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            "TIEOFF_X35Y247": "TIEOFF"
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    "INT_L_X32Y248": {
        "bits": {
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                "baseaddr": "0x00021000",
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                "words": 2
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        },
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            "TIEOFF_X35Y248": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y249": {
        "bits": {
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                "baseaddr": "0x00021000",
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                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X35Y249": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00441100",
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                "offset": 0,
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        },
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        "pin_functions": {},
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            "TIEOFF_X37Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00441100",
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        "pin_functions": {},
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            "TIEOFF_X37Y1": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00441100",
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        },
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        "pin_functions": {},
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            "TIEOFF_X37Y2": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y3": {
        "bits": {
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                "baseaddr": "0x00441100",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X37Y3": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y4": {
        "bits": {
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                "baseaddr": "0x00441100",
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                "offset": 8,
                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X37Y4": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y5": {
        "bits": {
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                "baseaddr": "0x00441100",
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                "offset": 10,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y5": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00441100",
                "frames": 28,
                "offset": 12,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y6": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00441100",
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y7": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00441100",
                "frames": 28,
                "offset": 16,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y8": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00441100",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00441100",
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                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y10": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00441100",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X34Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00441100",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "grid_y": 247,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00441100",
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                "offset": 26,
                "words": 2
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            "TIEOFF_X37Y13": "TIEOFF"
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                "baseaddr": "0x00441100",
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        "bits": {
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                "baseaddr": "0x00441100",
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        "bits": {
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                "baseaddr": "0x00441100",
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            "TIEOFF_X37Y16": "TIEOFF"
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        "bits": {
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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                "words": 2
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            "TIEOFF_X37Y64": "TIEOFF"
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                "baseaddr": "0x00421100",
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            "TIEOFF_X37Y65": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421100",
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            "TIEOFF_X37Y66": "TIEOFF"
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            "TIEOFF_X37Y67": "TIEOFF"
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    "INT_L_X34Y112": {
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            "TIEOFF_X37Y161": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 24,
                "words": 2
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            "TIEOFF_X37Y162": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
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                "words": 2
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            "TIEOFF_X37Y163": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X37Y164": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
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            "TIEOFF_X37Y165": "TIEOFF"
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    "INT_L_X34Y166": {
        "bits": {
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    "INT_L_X34Y167": {
        "bits": {
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        "bits": {
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        "bits": {
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                "words": 2
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        "bits": {
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    "INT_L_X34Y209": {
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        "type": "INT_L"
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        "pin_functions": {},
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        "type": "INT_L"
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                "words": 2
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021100",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
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            "TIEOFF_X37Y212": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00021100",
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            "TIEOFF_X37Y213": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00021100",
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            "TIEOFF_X37Y214": "TIEOFF"
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    },
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        "bits": {
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            "TIEOFF_X37Y215": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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    "INT_L_X36Y61": {
        "bits": {
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                "baseaddr": "0x00421200",
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            "TIEOFF_X39Y110": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X38Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 96,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y60": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 96,
        "grid_y": 196,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y61": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y62": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 195,
        "pin_functions": {},
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            "TIEOFF_X41Y62": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y63": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y64": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X41Y64": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y65": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y66": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 34,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X41Y67": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
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            "TIEOFF_X41Y68": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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                "offset": 38,
                "words": 2
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            "TIEOFF_X41Y69": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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            "TIEOFF_X41Y70": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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            "TIEOFF_X41Y71": "TIEOFF"
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    },
    "INT_L_X38Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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            "TIEOFF_X41Y72": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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            "TIEOFF_X41Y73": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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                "words": 2
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        },
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            "TIEOFF_X41Y74": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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                "words": 2
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            "TIEOFF_X41Y75": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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                "words": 2
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            "TIEOFF_X41Y76": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y77": {
        "bits": {
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                "baseaddr": "0x00421300",
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                "words": 2
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            "TIEOFF_X41Y77": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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                "words": 2
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            "TIEOFF_X41Y78": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X38Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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                "words": 2
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        },
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            "TIEOFF_X41Y79": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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                "words": 2
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            "TIEOFF_X41Y80": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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                "words": 2
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            "TIEOFF_X41Y81": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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                "words": 2
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            "TIEOFF_X41Y82": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y83": {
        "bits": {
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                "baseaddr": "0x00421300",
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                "words": 2
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            "TIEOFF_X41Y83": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y84": {
        "bits": {
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                "baseaddr": "0x00421300",
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                "words": 2
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            "TIEOFF_X41Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y85": {
        "bits": {
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                "baseaddr": "0x00421300",
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                "words": 2
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            "TIEOFF_X41Y85": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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                "offset": 73,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X41Y86": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y87": {
        "bits": {
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                "baseaddr": "0x00421300",
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                "offset": 75,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X41Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X41Y88": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y89": {
        "bits": {
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                "baseaddr": "0x00421300",
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                "offset": 79,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X41Y89": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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                "offset": 81,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X41Y90": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X41Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y92": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "grid_y": 163,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y93": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 162,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y94": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 91,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y95": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 93,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "grid_y": 160,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "grid_y": 159,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 97,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 96,
        "grid_y": 157,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 96,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y100": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 96,
        "grid_y": 154,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y101": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 4,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y102": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 6,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y103": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 8,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y104": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 10,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 96,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y105": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 12,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 96,
        "grid_y": 149,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y106": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 96,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y107": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 96,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y108": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y109": {
        "bits": {
            "CLB_IO_CLK": {
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00401300",
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            "TIEOFF_X41Y110": "TIEOFF"
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            "TIEOFF_X41Y111": "TIEOFF"
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            "TIEOFF_X41Y158": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X41Y159": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
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                "words": 2
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        },
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            "TIEOFF_X41Y160": "TIEOFF"
        },
        "type": "INT_L"
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    "INT_L_X38Y161": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
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                "words": 2
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            "TIEOFF_X41Y161": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y162": {
        "bits": {
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                "baseaddr": "0x00001300",
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            "TIEOFF_X41Y162": "TIEOFF"
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    "INT_L_X38Y163": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001300",
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            "TIEOFF_X41Y163": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00001300",
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            "TIEOFF_X41Y164": "TIEOFF"
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            "TIEOFF_X41Y165": "TIEOFF"
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        "bits": {
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            "TIEOFF_X41Y168": "TIEOFF"
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            "TIEOFF_X41Y169": "TIEOFF"
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        "bits": {
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        "bits": {
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            "TIEOFF_X41Y193": "TIEOFF"
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                "words": 2
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            "TIEOFF_X41Y195": "TIEOFF"
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            "TIEOFF_X41Y196": "TIEOFF"
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    "INT_L_X38Y197": {
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                "baseaddr": "0x00001300",
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            "TIEOFF_X41Y197": "TIEOFF"
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    "INT_L_X38Y198": {
        "bits": {
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                "baseaddr": "0x00001300",
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            "TIEOFF_X41Y198": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X38Y199": {
        "bits": {
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                "baseaddr": "0x00001300",
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                "words": 2
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        "type": "INT_L"
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    "INT_L_X40Y50": {
        "bits": {
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                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y50": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y51": {
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    "INT_L_X40Y52": {
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                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y52": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y53": {
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        "pin_functions": {},
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            "TIEOFF_X43Y53": "TIEOFF"
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    },
    "INT_L_X40Y54": {
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            "TIEOFF_X43Y54": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y55": {
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        "pin_functions": {},
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            "TIEOFF_X43Y55": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y56": {
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y56": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y57": {
        "bits": {
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X43Y57": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y58": {
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            "TIEOFF_X43Y58": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y59": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X43Y60": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y61": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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            "TIEOFF_X43Y62": "TIEOFF"
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        "bits": {
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            "TIEOFF_X43Y63": "TIEOFF"
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            "TIEOFF_X43Y65": "TIEOFF"
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    "INT_L_X40Y98": {
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    "INT_L_X40Y105": {
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        "type": "INT_L"
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    "INT_L_X40Y106": {
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    "INT_L_X40Y107": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 14,
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        "bits": {
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                "baseaddr": "0x00401400",
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    "INT_L_X40Y156": {
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        "sites": {
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 14,
                "words": 2
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            "TIEOFF_X43Y157": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y158": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X43Y158": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y159": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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        },
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        "pin_functions": {},
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            "TIEOFF_X43Y159": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "offset": 20,
                "words": 2
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        },
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            "TIEOFF_X43Y160": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y161": {
        "bits": {
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                "baseaddr": "0x00001400",
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            "TIEOFF_X43Y161": "TIEOFF"
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    "INT_L_X40Y162": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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            "TIEOFF_X43Y162": "TIEOFF"
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    "INT_L_X40Y163": {
        "bits": {
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                "baseaddr": "0x00001400",
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        "bits": {
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                "baseaddr": "0x00001400",
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        "bits": {
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            "TIEOFF_X43Y188": "TIEOFF"
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            "TIEOFF_X43Y189": "TIEOFF"
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        "bits": {
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                "words": 2
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    "INT_L_X40Y191": {
        "bits": {
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                "baseaddr": "0x00001400",
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    "INT_L_X40Y192": {
        "bits": {
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                "words": 2
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            "TIEOFF_X43Y192": "TIEOFF"
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    "INT_L_X40Y193": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00001400",
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                "words": 2
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                "baseaddr": "0x00001400",
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    "INT_L_X40Y195": {
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            "TIEOFF_X43Y195": "TIEOFF"
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    "INT_L_X40Y196": {
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            "CLB_IO_CLK": {
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                "words": 2
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            "TIEOFF_X43Y196": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y197": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        "type": "INT_L"
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    "INT_L_X40Y198": {
        "bits": {
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                "baseaddr": "0x00001400",
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                "words": 2
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            "TIEOFF_X43Y198": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y199": {
        "bits": {
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                "baseaddr": "0x00001400",
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                "offset": 99,
                "words": 2
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00421500",
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        "pin_functions": {},
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            "TIEOFF_X45Y50": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X42Y51": {
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                "baseaddr": "0x00421500",
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        },
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X42Y52": {
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                "baseaddr": "0x00421500",
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            "TIEOFF_X45Y52": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X42Y53": {
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        },
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        "pin_functions": {},
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            "TIEOFF_X45Y53": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X42Y54": {
        "bits": {
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                "baseaddr": "0x00421500",
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        },
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X42Y55": {
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                "baseaddr": "0x00421500",
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y55": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X42Y56": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 12,
                "words": 2
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
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        "bits": {
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                "baseaddr": "0x00421500",
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                "baseaddr": "0x00421500",
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        "bits": {
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        "bits": {
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            "TIEOFF_X45Y61": "TIEOFF"
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00401500",
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            "TIEOFF_X45Y106": "TIEOFF"
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    },
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                "baseaddr": "0x00401500",
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        "bits": {
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                "baseaddr": "0x00401500",
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    "INT_L_X42Y109": {
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        "bits": {
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00401600",
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        "bits": {
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    "INT_L_X44Y154": {
        "bits": {
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421700",
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                "offset": 8,
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            "TIEOFF_X50Y54": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X46Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421700",
                "frames": 28,
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            "TIEOFF_X50Y55": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X46Y56": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421700",
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            "TIEOFF_X50Y56": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X46Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421700",
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            "TIEOFF_X50Y57": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421700",
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            "TIEOFF_X50Y58": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421700",
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            "TIEOFF_X50Y59": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00421700",
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    "INT_L_X46Y87": {
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    "INT_L_X46Y88": {
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    "INT_L_X46Y89": {
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            "TIEOFF_X50Y89": "TIEOFF"
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    "INT_L_X46Y92": {
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                "words": 2
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    "INT_L_X46Y93": {
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                "words": 2
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        "type": "INT_L"
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    "INT_L_X46Y97": {
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    "INT_L_X46Y98": {
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    "INT_L_X46Y99": {
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        "pin_functions": {},
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            "TIEOFF_X50Y100": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X46Y101": {
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        },
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
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    "INT_L_X46Y102": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X50Y102": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X46Y103": {
        "bits": {
            "CLB_IO_CLK": {
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        "bits": {
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                "baseaddr": "0x00421800",
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    "INT_L_X50Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421900",
                "frames": 28,
                "offset": 2,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X55Y51": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X50Y52": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421900",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X55Y52": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421900",
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                "offset": 6,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X55Y53": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X50Y54": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421900",
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                "offset": 8,
                "words": 2
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        },
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            "TIEOFF_X55Y54": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421900",
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                "words": 2
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        },
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            "TIEOFF_X55Y55": "TIEOFF"
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    },
    "INT_L_X50Y56": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421900",
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                "words": 2
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        },
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            "TIEOFF_X55Y56": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421900",
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        },
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            "TIEOFF_X55Y57": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421900",
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            "TIEOFF_X55Y58": "TIEOFF"
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                "baseaddr": "0x00421900",
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            "TIEOFF_X55Y59": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421900",
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                "baseaddr": "0x00421900",
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                "baseaddr": "0x00421900",
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                "baseaddr": "0x00421900",
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            "TIEOFF_X55Y82": "TIEOFF"
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                "words": 2
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            "TIEOFF_X55Y84": "TIEOFF"
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    "INT_L_X50Y85": {
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                "baseaddr": "0x00421900",
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                "words": 2
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            "TIEOFF_X55Y85": "TIEOFF"
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                "words": 2
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        },
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            "TIEOFF_X55Y86": "TIEOFF"
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                "baseaddr": "0x00421900",
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                "words": 2
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            "TIEOFF_X55Y87": "TIEOFF"
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                "baseaddr": "0x00421900",
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                "words": 2
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        },
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            "TIEOFF_X55Y88": "TIEOFF"
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                "baseaddr": "0x00421900",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X55Y89": "TIEOFF"
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                "words": 2
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        },
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            "TIEOFF_X55Y90": "TIEOFF"
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                "baseaddr": "0x00421900",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X55Y91": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00421900",
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        },
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        "pin_functions": {},
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            "TIEOFF_X55Y92": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00421900",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X55Y93": "TIEOFF"
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                "baseaddr": "0x00421900",
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                "offset": 89,
                "words": 2
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            "TIEOFF_X55Y94": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X50Y95": {
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                "words": 2
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            "TIEOFF_X55Y95": "TIEOFF"
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                "baseaddr": "0x00421900",
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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        "bits": {
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                "baseaddr": "0x00421900",
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X55Y97": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X50Y98": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X55Y98": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y99": {
        "bits": {
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                "baseaddr": "0x00421900",
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                "offset": 99,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X55Y99": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X55Y100": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 2,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X55Y101": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X50Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X55Y102": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X50Y103": {
        "bits": {
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                "baseaddr": "0x00401900",
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                "offset": 6,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X55Y103": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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        },
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            "TIEOFF_X55Y104": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y105": {
        "bits": {
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                "baseaddr": "0x00401900",
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            "TIEOFF_X55Y105": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y106": {
        "bits": {
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                "baseaddr": "0x00401900",
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            "TIEOFF_X55Y106": "TIEOFF"
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            "TIEOFF_X55Y107": "TIEOFF"
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        "bits": {
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        "type": "INT_L"
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X55Y149": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X55Y150": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X50Y151": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 2,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X55Y151": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X50Y152": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X55Y152": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X50Y153": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 6,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X55Y153": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X50Y154": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 8,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X55Y154": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "offset": 10,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X55Y155": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y156": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X55Y156": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y157": {
        "bits": {
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                "baseaddr": "0x00001900",
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        },
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        "pin_functions": {},
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            "TIEOFF_X55Y157": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y158": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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        },
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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        },
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            "TIEOFF_X55Y159": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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        },
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            "TIEOFF_X55Y160": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00001900",
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        },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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                "words": 2
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        "bits": {
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        "bits": {
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    "INT_L_X50Y183": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X55Y183": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "words": 2
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        },
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            "TIEOFF_X55Y184": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00001900",
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                "words": 2
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            "TIEOFF_X55Y185": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X50Y186": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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            "TIEOFF_X55Y186": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y187": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X55Y187": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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            "TIEOFF_X55Y188": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y189": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "words": 2
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        "pin_functions": {},
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "offset": 81,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X55Y190": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X50Y191": {
        "bits": {
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                "baseaddr": "0x00001900",
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                "words": 2
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X55Y192": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "words": 2
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X50Y194": {
        "bits": {
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                "words": 2
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        "sites": {
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        "type": "INT_L"
    },
    "INT_L_X50Y195": {
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X55Y195": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X50Y196": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X55Y196": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X50Y197": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X55Y197": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y198": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "offset": 97,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X55Y198": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X50Y199": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 99,
                "words": 2
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        },
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        "type": "INT_L"
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                "baseaddr": "0x00421A00",
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421A00",
                "frames": 28,
                "offset": 99,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X57Y99": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X52Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
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            "TIEOFF_X57Y100": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
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            "TIEOFF_X57Y101": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X52Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
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            "TIEOFF_X57Y102": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X52Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
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            "TIEOFF_X57Y103": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
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            "TIEOFF_X57Y104": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401A00",
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            "TIEOFF_X57Y105": "TIEOFF"
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            "TIEOFF_X57Y106": "TIEOFF"
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            "TIEOFF_X57Y107": "TIEOFF"
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        "bits": {
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            "TIEOFF_X57Y108": "TIEOFF"
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            "TIEOFF_X57Y131": "TIEOFF"
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    "INT_L_X52Y132": {
        "bits": {
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            "TIEOFF_X57Y132": "TIEOFF"
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    "INT_L_X52Y133": {
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    "INT_L_X52Y134": {
        "bits": {
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    "INT_L_X52Y135": {
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            "TIEOFF_X57Y135": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X52Y137": {
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    "INT_L_X52Y138": {
        "bits": {
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        "type": "INT_L"
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            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
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        "type": "INT_L"
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    "INT_L_X52Y141": {
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            "TIEOFF_X57Y141": "TIEOFF"
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    "INT_L_X52Y142": {
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            "TIEOFF_X57Y143": "TIEOFF"
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    "INT_L_X52Y144": {
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            "TIEOFF_X57Y144": "TIEOFF"
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    "INT_L_X52Y145": {
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            "TIEOFF_X57Y145": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X52Y146": {
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X52Y147": {
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        "pin_functions": {},
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            "TIEOFF_X57Y147": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X52Y148": {
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        "bits": {
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                "baseaddr": "0x00001A00",
                "frames": 28,
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            "TIEOFF_X57Y198": "TIEOFF"
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                "baseaddr": "0x00001A00",
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            "TIEOFF_X59Y46": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00441B00",
                "frames": 28,
                "offset": 95,
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        "bits": {
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    "INT_L_X54Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421B00",
                "frames": 28,
                "offset": 93,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 136,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X59Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X54Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421B00",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X59Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X54Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421B00",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X59Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X54Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421B00",
                "frames": 28,
                "offset": 99,
                "words": 2
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            "TIEOFF_X59Y99": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
                "frames": 28,
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            "TIEOFF_X59Y100": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X54Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
                "frames": 28,
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            "TIEOFF_X59Y101": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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            "TIEOFF_X59Y102": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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            "TIEOFF_X59Y103": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X54Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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            "TIEOFF_X59Y104": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
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            "TIEOFF_X59Y105": "TIEOFF"
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    },
    "INT_L_X54Y106": {
        "bits": {
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                "baseaddr": "0x00401B00",
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            "TIEOFF_X59Y106": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00401B00",
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            "TIEOFF_X59Y107": "TIEOFF"
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    "INT_L_X54Y108": {
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            "TIEOFF_X59Y108": "TIEOFF"
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    },
    "INT_L_X54Y109": {
        "bits": {
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    },
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            "TIEOFF_X59Y110": "TIEOFF"
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            "TIEOFF_X59Y111": "TIEOFF"
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    "INT_L_X54Y112": {
        "bits": {
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            "TIEOFF_X59Y112": "TIEOFF"
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    "INT_L_X54Y113": {
        "bits": {
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            "TIEOFF_X59Y113": "TIEOFF"
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            "TIEOFF_X59Y114": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X54Y115": {
        "bits": {
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            "TIEOFF_X59Y115": "TIEOFF"
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    "INT_L_X54Y116": {
        "bits": {
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    "INT_L_X54Y117": {
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    "INT_L_X54Y118": {
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    "INT_L_X54Y119": {
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    "INT_L_X54Y121": {
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    "INT_L_X54Y122": {
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    "INT_L_X54Y123": {
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    "INT_L_X54Y124": {
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    "INT_L_X54Y125": {
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    "INT_L_X54Y126": {
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        "bits": {
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            "TIEOFF_X59Y127": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X54Y128": {
        "bits": {
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            "TIEOFF_X59Y128": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y129": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X59Y129": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y130": {
        "bits": {
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        "clock_region": "X0Y2",
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            "TIEOFF_X59Y130": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X54Y131": {
        "bits": {
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                "words": 2
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    },
    "INT_L_X54Y132": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X59Y132": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X54Y133": {
        "bits": {
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                "words": 2
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        "type": "INT_L"
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    "INT_L_X54Y134": {
        "bits": {
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                "words": 2
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            "TIEOFF_X59Y134": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X54Y135": {
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        "pin_functions": {},
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            "TIEOFF_X59Y135": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X54Y136": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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            "TIEOFF_X59Y136": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y137": {
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            "TIEOFF_X59Y137": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X54Y138": {
        "bits": {
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        "pin_functions": {},
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            "TIEOFF_X59Y138": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X54Y139": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X54Y140": {
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            "TIEOFF_X59Y140": "TIEOFF"
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    "INT_L_X54Y141": {
        "bits": {
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            "TIEOFF_X59Y141": "TIEOFF"
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    "INT_L_X54Y142": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X54Y143": {
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        "pin_functions": {},
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            "TIEOFF_X59Y143": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X54Y144": {
        "bits": {
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        "pin_functions": {},
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        "type": "INT_L"
    },
    "INT_L_X54Y145": {
        "bits": {
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        "sites": {
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00001B00",
                "frames": 28,
                "offset": 91,
                "words": 2
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        },
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            "TIEOFF_X59Y195": "TIEOFF"
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        "bits": {
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            "TIEOFF_X59Y198": "TIEOFF"
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                "baseaddr": "0x00001B00",
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            "TIEOFF_X59Y199": "TIEOFF"
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    "INT_L_X54Y243": {
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        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021B00",
                "frames": 28,
                "offset": 89,
                "words": 2
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        "sites": {
            "TIEOFF_X59Y244": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X54Y245": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021B00",
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            "TIEOFF_X59Y245": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X54Y246": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021B00",
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            "TIEOFF_X59Y246": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y247": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021B00",
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            "TIEOFF_X59Y247": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X54Y248": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021B00",
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            "TIEOFF_X59Y248": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X54Y249": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021B00",
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            "TIEOFF_X59Y249": "TIEOFF"
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        "bits": {
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            "TIEOFF_X61Y50": "TIEOFF"
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    "INT_L_X56Y77": {
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            "TIEOFF_X61Y77": "TIEOFF"
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    "INT_L_X56Y78": {
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            "TIEOFF_X61Y78": "TIEOFF"
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    "INT_L_X56Y82": {
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    "INT_L_X56Y83": {
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    "INT_L_X56Y84": {
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    "INT_L_X56Y87": {
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    "INT_L_X56Y88": {
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    "INT_L_X56Y89": {
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    "INT_L_X56Y90": {
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    "INT_L_X56Y91": {
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        "pin_functions": {},
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    "INT_L_X56Y92": {
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        },
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X56Y93": {
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        "sites": {
            "TIEOFF_X61Y93": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X56Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421C00",
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            "TIEOFF_X61Y94": "TIEOFF"
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    "INT_L_X56Y95": {
        "bits": {
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            "TIEOFF_X61Y95": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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        "type": "INT_L"
    },
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            "TIEOFF_X61Y97": "TIEOFF"
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    "INT_L_X56Y98": {
        "bits": {
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            "TIEOFF_X61Y98": "TIEOFF"
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    "INT_L_X56Y142": {
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001C00",
                "frames": 28,
                "offset": 85,
                "words": 2
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        "type": "INT_L"
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                "baseaddr": "0x00001C00",
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            "TIEOFF_X63Y90": "TIEOFF"
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        "bits": {
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            "TIEOFF_X63Y91": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421D00",
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            "TIEOFF_X63Y92": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00421D00",
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                "baseaddr": "0x00421D00",
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            "TIEOFF_X63Y94": "TIEOFF"
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                "baseaddr": "0x00421D00",
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    "INT_L_X58Y140": {
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            "TIEOFF_X65Y88": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
                "frames": 28,
                "offset": 79,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X65Y89": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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            "TIEOFF_X65Y90": "TIEOFF"
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    },
    "INT_L_X60Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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            "TIEOFF_X65Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X60Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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            "TIEOFF_X65Y92": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X60Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E00",
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            "TIEOFF_X65Y93": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00421E00",
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            "TIEOFF_X65Y94": "TIEOFF"
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            "TIEOFF_X65Y95": "TIEOFF"
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            "TIEOFF_X65Y97": "TIEOFF"
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            "TIEOFF_X65Y123": "TIEOFF"
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    "INT_L_X60Y124": {
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    "INT_L_X60Y125": {
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    "INT_L_X60Y126": {
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        "bits": {
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            "TIEOFF_X65Y128": "TIEOFF"
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    "INT_L_X60Y129": {
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    "INT_L_X60Y132": {
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    "INT_L_X60Y134": {
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    "INT_L_X60Y136": {
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    "INT_L_X60Y137": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X65Y137": "TIEOFF"
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                "baseaddr": "0x00001E00",
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            "TIEOFF_X68Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421F00",
                "frames": 28,
                "offset": 75,
                "words": 2
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            "TIEOFF_X68Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X62Y88": {
        "bits": {
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                "baseaddr": "0x00421F00",
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            "TIEOFF_X68Y88": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X62Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421F00",
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            "TIEOFF_X68Y89": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421F00",
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            "TIEOFF_X68Y90": "TIEOFF"
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    "INT_L_X62Y91": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X68Y91": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X62Y92": {
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                "baseaddr": "0x00421F00",
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            "TIEOFF_X68Y92": "TIEOFF"
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    "INT_L_X62Y135": {
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        "pin_functions": {},
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            "TIEOFF_X68Y135": "TIEOFF"
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    "INT_L_X64Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X70Y85": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X64Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
                "frames": 28,
                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X70Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X64Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
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                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X70Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X64Y88": {
        "bits": {
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                "baseaddr": "0x00422000",
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                "offset": 77,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X70Y88": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X64Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422000",
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                "offset": 79,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X70Y89": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X64Y90": {
        "bits": {
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                "baseaddr": "0x00422000",
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                "offset": 81,
                "words": 2
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            "TIEOFF_X70Y90": "TIEOFF"
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    "INT_L_X64Y91": {
        "bits": {
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                "baseaddr": "0x00422000",
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            "TIEOFF_X70Y91": "TIEOFF"
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                "baseaddr": "0x00422000",
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    "INT_L_X64Y93": {
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        "type": "INT_L"
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        "bits": {
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        "bits": {
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    "INT_L_X64Y118": {
        "bits": {
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                "words": 2
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            "TIEOFF_X70Y118": "TIEOFF"
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    "INT_L_X64Y119": {
        "bits": {
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                "words": 2
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        "clock_region": "X1Y2",
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            "TIEOFF_X70Y119": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402000",
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                "offset": 40,
                "words": 2
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        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X70Y120": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y121": {
        "bits": {
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                "baseaddr": "0x00402000",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X70Y121": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00402000",
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                "words": 2
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        "pin_functions": {},
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    "INT_L_X64Y123": {
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            "TIEOFF_X70Y123": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y124": {
        "bits": {
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    "INT_L_X64Y125": {
        "bits": {
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                "words": 2
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        "type": "INT_L"
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    "INT_L_X64Y126": {
        "bits": {
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        "pin_functions": {},
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        "type": "INT_L"
    },
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        "bits": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X70Y127": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y128": {
        "bits": {
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                "baseaddr": "0x00402000",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X70Y128": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y129": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X64Y130": {
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                "words": 2
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        "type": "INT_L"
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X64Y132": {
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X64Y133": {
        "bits": {
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        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X70Y133": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X64Y134": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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                "baseaddr": "0x00002000",
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y84": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X66Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y85": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X66Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X66Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y87": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X66Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
                "frames": 28,
                "offset": 77,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X66Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
                "frames": 28,
                "offset": 79,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X73Y89": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X66Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
                "frames": 28,
                "offset": 81,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X73Y90": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
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                "words": 2
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        },
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            "TIEOFF_X73Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y92": {
        "bits": {
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                "baseaddr": "0x00422100",
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                "words": 2
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            "TIEOFF_X73Y92": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
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                "words": 2
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        },
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            "TIEOFF_X73Y93": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y94": {
        "bits": {
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                "baseaddr": "0x00422100",
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                "words": 2
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            "TIEOFF_X73Y94": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y95": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00422100",
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                "words": 2
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        },
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            "TIEOFF_X73Y95": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00422100",
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                "words": 2
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        },
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00422100",
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                "words": 2
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        },
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            "TIEOFF_X73Y97": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y98": {
        "bits": {
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                "baseaddr": "0x00422100",
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                "offset": 97,
                "words": 2
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        },
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        "type": "INT_L"
    },
    "INT_L_X66Y99": {
        "bits": {
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                "baseaddr": "0x00422100",
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            "TIEOFF_X73Y99": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
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            "TIEOFF_X73Y100": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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        "type": "INT_L"
    },
    "INT_L_X66Y102": {
        "bits": {
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                "baseaddr": "0x00402100",
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                "words": 2
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    },
    "INT_L_X66Y103": {
        "bits": {
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                "baseaddr": "0x00402100",
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                "words": 2
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        },
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        "bits": {
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        "bits": {
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        "bits": {
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                "words": 2
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    "INT_L_X66Y108": {
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    "INT_L_X66Y109": {
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        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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    "INT_L_X66Y114": {
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    },
    "INT_L_X66Y115": {
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                "words": 2
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    "INT_L_X66Y116": {
        "bits": {
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                "baseaddr": "0x00402100",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X73Y116": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X66Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y117": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
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                "words": 2
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        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X73Y118": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y119": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
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                "offset": 40,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y120": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
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                "offset": 42,
                "words": 2
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        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y121": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
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                "offset": 44,
                "words": 2
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        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y122": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y123": {
        "bits": {
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                "baseaddr": "0x00402100",
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                "offset": 46,
                "words": 2
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        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y123": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
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                "offset": 48,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y124": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y125": {
        "bits": {
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                "baseaddr": "0x00402100",
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                "offset": 51,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
    },
    "INT_L_X66Y126": {
        "bits": {
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                "baseaddr": "0x00402100",
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                "offset": 53,
                "words": 2
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        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y126": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
                "frames": 28,
                "offset": 55,
                "words": 2
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        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y127": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y128": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
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                "offset": 59,
                "words": 2
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        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y129": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y130": {
        "bits": {
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                "words": 2
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        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
    },
    "INT_L_X66Y131": {
        "bits": {
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                "baseaddr": "0x00402100",
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                "offset": 63,
                "words": 2
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        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y131": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y132": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X73Y132": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X66Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402100",
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                "offset": 67,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X73Y133": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00402100",
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                "offset": 69,
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00002100",
                "frames": 28,
                "offset": 69,
                "words": 2
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            "TIEOFF_X73Y184": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00002100",
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                "words": 2
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            "TIEOFF_X73Y185": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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            "TIEOFF_X73Y186": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X66Y187": {
        "bits": {
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            "TIEOFF_X73Y187": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X66Y188": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002100",
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        },
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        "type": "INT_L"
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    "INT_L_X66Y189": {
        "bits": {
            "CLB_IO_CLK": {
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        "bits": {
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            "TIEOFF_X75Y68": "TIEOFF"
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            "TIEOFF_X75Y81": "TIEOFF"
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    "INT_L_X68Y82": {
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        },
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    "INT_L_X68Y83": {
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            "TIEOFF_X75Y83": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00422200",
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                "words": 2
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            "TIEOFF_X75Y84": "TIEOFF"
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                "baseaddr": "0x00422200",
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    },
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        },
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            "TIEOFF_X75Y86": "TIEOFF"
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    "INT_L_X68Y87": {
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            "TIEOFF_X75Y87": "TIEOFF"
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    "INT_L_X68Y88": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "offset": 65,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y182": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y183": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y183": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y184": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y184": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "offset": 71,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y185": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y186": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y186": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X68Y187": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X75Y187": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y188": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "words": 2
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        },
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            "TIEOFF_X75Y188": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y189": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "words": 2
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        },
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            "TIEOFF_X75Y189": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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        },
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            "TIEOFF_X75Y190": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X68Y191": {
        "bits": {
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                "baseaddr": "0x00002200",
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                "words": 2
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        },
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            "TIEOFF_X75Y191": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X68Y192": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "words": 2
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        },
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            "TIEOFF_X75Y192": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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                "words": 2
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        },
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            "TIEOFF_X75Y193": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        },
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        "type": "INT_L"
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        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X75Y195": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002200",
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        },
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        "type": "INT_L"
    },
    "INT_L_X68Y197": {
        "bits": {
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        },
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            "TIEOFF_X75Y197": "TIEOFF"
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        "type": "INT_L"
    },
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        },
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            "TIEOFF_X75Y198": "TIEOFF"
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    "INT_L_X68Y199": {
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                "offset": 99,
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        },
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            "TIEOFF_X77Y50": "TIEOFF"
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        "bits": {
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            "TIEOFF_X77Y51": "TIEOFF"
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        },
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            "TIEOFF_X77Y52": "TIEOFF"
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        "type": "INT_L"
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        },
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            "TIEOFF_X77Y53": "TIEOFF"
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            "TIEOFF_X77Y55": "TIEOFF"
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    "INT_L_X70Y57": {
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            "TIEOFF_X77Y57": "TIEOFF"
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        },
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            "TIEOFF_X77Y59": "TIEOFF"
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        },
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        },
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        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X77Y62": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X70Y63": {
        "bits": {
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        },
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            "TIEOFF_X77Y63": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y64": {
        "bits": {
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                "baseaddr": "0x00422300",
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X77Y64": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 30,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X77Y65": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X77Y66": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X77Y67": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X77Y68": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X77Y69": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 40,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X77Y70": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X77Y71": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X77Y72": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X77Y73": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X70Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 48,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X77Y74": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X70Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "offset": 51,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X77Y75": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X77Y76": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "sites": {
            "TIEOFF_X77Y77": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "sites": {
            "TIEOFF_X77Y78": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y79": {
        "bits": {
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                "baseaddr": "0x00422300",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X77Y79": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y80": {
        "bits": {
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                "baseaddr": "0x00422300",
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                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X77Y80": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y81": {
        "bits": {
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                "baseaddr": "0x00422300",
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                "offset": 63,
                "words": 2
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        },
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            "TIEOFF_X77Y81": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
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            "TIEOFF_X77Y82": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X70Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "words": 2
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        },
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            "TIEOFF_X77Y83": "TIEOFF"
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    "INT_L_X70Y84": {
        "bits": {
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                "baseaddr": "0x00422300",
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                "words": 2
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        },
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            "TIEOFF_X77Y84": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00422300",
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        },
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            "TIEOFF_X77Y85": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422300",
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                "words": 2
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        },
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            "TIEOFF_X77Y86": "TIEOFF"
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    "INT_L_X70Y87": {
        "bits": {
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                "baseaddr": "0x00422300",
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            "TIEOFF_X77Y87": "TIEOFF"
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            "TIEOFF_X77Y88": "TIEOFF"
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        "bits": {
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            "TIEOFF_X77Y89": "TIEOFF"
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    "INT_L_X70Y121": {
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    "INT_L_X70Y122": {
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    "INT_L_X70Y126": {
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        "type": "INT_L"
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        "bits": {
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        },
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    "INT_L_X70Y129": {
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    "INT_L_X70Y130": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X70Y131": {
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                "words": 2
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        },
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            "TIEOFF_X77Y131": "TIEOFF"
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    },
    "INT_L_X70Y132": {
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                "baseaddr": "0x00402300",
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        "bits": {
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            "TIEOFF_X77Y135": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002300",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X77Y181": "TIEOFF"
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    "INT_L_X70Y182": {
        "bits": {
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        "bits": {
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        "bits": {
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            "TIEOFF_X77Y185": "TIEOFF"
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        "bits": {
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            "TIEOFF_X79Y65": "TIEOFF"
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            "TIEOFF_X79Y67": "TIEOFF"
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            "TIEOFF_X79Y70": "TIEOFF"
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                "baseaddr": "0x00422400",
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            "TIEOFF_X79Y72": "TIEOFF"
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    "INT_L_X72Y73": {
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    "INT_L_X72Y74": {
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    "INT_L_X72Y75": {
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            "TIEOFF_X79Y75": "TIEOFF"
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    "INT_L_X72Y76": {
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            "TIEOFF_X79Y76": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X72Y77": {
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            "TIEOFF_X79Y77": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X72Y78": {
        "bits": {
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            "TIEOFF_X79Y78": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X72Y79": {
        "bits": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X79Y79": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X72Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422400",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X79Y80": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X72Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422400",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X79Y81": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X72Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422400",
                "frames": 28,
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        "pin_functions": {},
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            "TIEOFF_X79Y82": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X72Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422400",
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        },
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            "TIEOFF_X79Y83": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X72Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422400",
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        "pin_functions": {},
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            "TIEOFF_X79Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X72Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422400",
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            "TIEOFF_X79Y85": "TIEOFF"
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    "INT_L_X72Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422400",
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            "TIEOFF_X79Y86": "TIEOFF"
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    "INT_L_X72Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422400",
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            "TIEOFF_X79Y87": "TIEOFF"
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    "INT_L_X72Y88": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X79Y88": "TIEOFF"
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    "INT_L_X72Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422400",
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            "TIEOFF_X79Y89": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422400",
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            "TIEOFF_X79Y90": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422400",
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            "TIEOFF_X79Y91": "TIEOFF"
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    "INT_L_X72Y92": {
        "bits": {
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        "bits": {
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            "TIEOFF_X79Y93": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00422400",
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            "TIEOFF_X79Y94": "TIEOFF"
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            "TIEOFF_X79Y95": "TIEOFF"
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            "TIEOFF_X79Y96": "TIEOFF"
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                "baseaddr": "0x00422400",
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            "TIEOFF_X79Y97": "TIEOFF"
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            "TIEOFF_X79Y98": "TIEOFF"
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    "INT_L_X72Y99": {
        "bits": {
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            "TIEOFF_X79Y99": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00402400",
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            "TIEOFF_X79Y103": "TIEOFF"
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    "INT_L_X72Y108": {
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        "bits": {
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    "INT_L_X72Y112": {
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        },
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        "pin_functions": {},
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        "type": "INT_L"
    },
    "INT_L_X72Y113": {
        "bits": {
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                "baseaddr": "0x00402400",
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        },
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            "TIEOFF_X79Y113": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X72Y114": {
        "bits": {
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                "baseaddr": "0x00402400",
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X79Y114": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X72Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402400",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X79Y115": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X72Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402400",
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X79Y116": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X72Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402400",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X79Y117": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X72Y118": {
        "bits": {
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X79Y118": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X72Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402400",
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X79Y119": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X72Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402400",
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        },
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        "pin_functions": {},
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            "TIEOFF_X79Y120": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X72Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402400",
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X79Y121": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X72Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402400",
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        },
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        "pin_functions": {},
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            "TIEOFF_X79Y122": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X72Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402400",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X79Y123": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X72Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402400",
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X79Y124": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X72Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402400",
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X79Y125": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X72Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402400",
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X79Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X72Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402400",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X79Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X72Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402400",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X79Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X72Y129": {
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            "TIEOFF_X79Y178": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X72Y179": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002400",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
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            "TIEOFF_X79Y179": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X72Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002400",
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                "words": 2
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            "TIEOFF_X79Y180": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X72Y181": {
        "bits": {
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                "baseaddr": "0x00002400",
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                "words": 2
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            "TIEOFF_X79Y181": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X72Y182": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002400",
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            "TIEOFF_X79Y182": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002400",
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        },
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            "TIEOFF_X79Y183": "TIEOFF"
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        "bits": {
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            "TIEOFF_X79Y184": "TIEOFF"
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        "bits": {
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                "words": 2
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        "bits": {
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                "baseaddr": "0x00442500",
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                "words": 2
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            "TIEOFF_X81Y12": "TIEOFF"
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        "bits": {
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                "words": 2
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        "pin_functions": {},
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00442500",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X81Y14": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00442500",
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                "words": 2
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00442500",
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                "offset": 32,
                "words": 2
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X74Y17": {
        "bits": {
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                "baseaddr": "0x00442500",
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                "offset": 34,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y17": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00442500",
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                "offset": 36,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X81Y18": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442500",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X81Y19": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y20": {
        "bits": {
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                "offset": 40,
                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y20": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00442500",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X81Y21": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442500",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y22": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y23": {
        "bits": {
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                "baseaddr": "0x00442500",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y23": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y24": {
        "bits": {
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                "baseaddr": "0x00442500",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y24": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y25": {
        "bits": {
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                "baseaddr": "0x00442500",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y25": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y26": {
        "bits": {
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                "baseaddr": "0x00442500",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y26": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y27": {
        "bits": {
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                "baseaddr": "0x00442500",
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y27": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442500",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y28": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442500",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X81Y29": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442500",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X81Y30": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442500",
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                "offset": 63,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X81Y31": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442500",
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                "offset": 65,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X81Y32": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442500",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X81Y33": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00442500",
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        "bits": {
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        "bits": {
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                "baseaddr": "0x00442500",
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    "INT_L_X74Y74": {
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                "baseaddr": "0x00422500",
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        "pin_functions": {},
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    "INT_L_X74Y75": {
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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    "INT_L_X74Y77": {
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y77": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422500",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 186,
        "grid_y": 178,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y78": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422500",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 177,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y79": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422500",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y80": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422500",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y81": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422500",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y82": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422500",
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                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y83": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422500",
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                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y84": "TIEOFF"
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    },
    "INT_L_X74Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422500",
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                "offset": 71,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X81Y85": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422500",
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                "offset": 73,
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        },
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        "pin_functions": {},
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            "TIEOFF_X81Y86": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y87": {
        "bits": {
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                "baseaddr": "0x00422500",
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                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X81Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y88": {
        "bits": {
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                "baseaddr": "0x00422500",
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                "offset": 77,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X81Y88": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422500",
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                "offset": 79,
                "words": 2
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        },
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            "TIEOFF_X81Y89": "TIEOFF"
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    },
    "INT_L_X74Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422500",
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                "words": 2
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        },
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            "TIEOFF_X81Y90": "TIEOFF"
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    "INT_L_X74Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422500",
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                "offset": 83,
                "words": 2
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            "TIEOFF_X81Y91": "TIEOFF"
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    },
    "INT_L_X74Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422500",
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        },
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    },
    "INT_L_X74Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422500",
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        },
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            "TIEOFF_X81Y93": "TIEOFF"
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    },
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            "CLB_IO_CLK": {
                "baseaddr": "0x00422500",
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                "words": 2
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            "TIEOFF_X81Y94": "TIEOFF"
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    "INT_L_X74Y95": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00422500",
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                "offset": 91,
                "words": 2
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        },
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            "TIEOFF_X81Y95": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422500",
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                "offset": 93,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X81Y96": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y97": {
        "bits": {
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                "baseaddr": "0x00422500",
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                "offset": 95,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X81Y97": "TIEOFF"
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    },
    "INT_L_X74Y98": {
        "bits": {
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                "baseaddr": "0x00422500",
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                "offset": 97,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X81Y98": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y99": {
        "bits": {
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                "baseaddr": "0x00422500",
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                "offset": 99,
                "words": 2
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            "TIEOFF_X81Y99": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00402500",
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                "offset": 0,
                "words": 2
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            "TIEOFF_X81Y100": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
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                "offset": 2,
                "words": 2
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        "clock_region": "X1Y2",
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            "TIEOFF_X81Y101": "TIEOFF"
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    },
    "INT_L_X74Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
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                "offset": 4,
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        },
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        "pin_functions": {},
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            "TIEOFF_X81Y102": "TIEOFF"
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    },
    "INT_L_X74Y103": {
        "bits": {
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                "baseaddr": "0x00402500",
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                "offset": 6,
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        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X81Y103": "TIEOFF"
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    },
    "INT_L_X74Y104": {
        "bits": {
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                "baseaddr": "0x00402500",
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                "offset": 8,
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        "pin_functions": {},
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            "TIEOFF_X81Y104": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00402500",
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                "offset": 10,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X81Y105": "TIEOFF"
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    },
    "INT_L_X74Y106": {
        "bits": {
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                "baseaddr": "0x00402500",
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                "offset": 12,
                "words": 2
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        "pin_functions": {},
        "sites": {
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        },
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    },
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        "bits": {
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                "baseaddr": "0x00402500",
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                "offset": 14,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X81Y107": "TIEOFF"
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    },
    "INT_L_X74Y108": {
        "bits": {
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                "baseaddr": "0x00402500",
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                "offset": 16,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X81Y108": "TIEOFF"
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    },
    "INT_L_X74Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y109": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
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                "offset": 20,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y110": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y111": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
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                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 143,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y112": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
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                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 142,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y113": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
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                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 141,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y114": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
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                "offset": 30,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y115": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
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                "offset": 32,
                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 139,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y116": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y117": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 137,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y118": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y119": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y120": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 134,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y121": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 133,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y122": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
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                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 132,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y123": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y124": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
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                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y125": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 186,
        "grid_y": 128,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
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        "sites": {
            "TIEOFF_X81Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
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                "offset": 59,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y129": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
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                "offset": 61,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X81Y130": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
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                "words": 2
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        },
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            "TIEOFF_X81Y131": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
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                "offset": 65,
                "words": 2
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        },
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            "TIEOFF_X81Y132": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
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                "words": 2
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        },
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            "TIEOFF_X81Y133": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00402500",
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        },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402500",
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        },
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        "bits": {
            "CLB_IO_CLK": {
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        },
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        "bits": {
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        "bits": {
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                "baseaddr": "0x00402500",
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        "bits": {
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        "bits": {
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                "words": 2
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    "INT_L_X74Y162": {
        "bits": {
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                "words": 2
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    "INT_L_X74Y163": {
        "bits": {
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                "words": 2
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    },
    "INT_L_X74Y164": {
        "bits": {
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                "words": 2
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        "type": "INT_L"
    },
    "INT_L_X74Y165": {
        "bits": {
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                "baseaddr": "0x00002500",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X81Y165": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X74Y166": {
        "bits": {
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                "baseaddr": "0x00002500",
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                "words": 2
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    "INT_L_X74Y167": {
        "bits": {
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                "words": 2
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        "clock_region": "X1Y3",
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        "pin_functions": {},
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    "INT_L_X74Y168": {
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                "baseaddr": "0x00002500",
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                "words": 2
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        "clock_region": "X1Y3",
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        "pin_functions": {},
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        "type": "INT_L"
    },
    "INT_L_X74Y169": {
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                "words": 2
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        "clock_region": "X1Y3",
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        "pin_functions": {},
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                "words": 2
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                "words": 2
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X74Y172": {
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                "words": 2
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        "pin_functions": {},
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    "INT_L_X74Y173": {
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                "words": 2
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        "type": "INT_L"
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        },
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        "type": "INT_L"
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    "INT_L_X74Y176": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
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    "INT_L_X74Y177": {
        "bits": {
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                "frames": 28,
                "offset": 55,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y177": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y178": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002500",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
        "clock_region": "X1Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y178": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y179": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002500",
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                "offset": 59,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y179": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002500",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y180": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y181": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002500",
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                "offset": 63,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y181": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y182": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002500",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y182": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y183": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002500",
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        },
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        "pin_functions": {},
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            "TIEOFF_X81Y183": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y184": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002500",
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        },
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        "pin_functions": {},
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        "type": "INT_L"
    },
    "INT_L_X74Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002500",
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                "words": 2
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        },
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            "TIEOFF_X81Y185": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X74Y186": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002500",
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        },
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        "type": "INT_L"
    },
    "INT_L_X74Y187": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002500",
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        },
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            "TIEOFF_X81Y187": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002500",
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        "bits": {
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                "baseaddr": "0x00002500",
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        "bits": {
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        "bits": {
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                "baseaddr": "0x00002500",
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        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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    "INT_L_X74Y211": {
        "bits": {
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                "baseaddr": "0x00022500",
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                "words": 2
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            "TIEOFF_X81Y211": "TIEOFF"
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        "bits": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X81Y212": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y213": {
        "bits": {
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                "baseaddr": "0x00022500",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X81Y213": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022500",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X81Y214": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00022500",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X81Y215": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X74Y216": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022500",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X81Y216": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X74Y217": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022500",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
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            "TIEOFF_X81Y217": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y218": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022500",
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                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y218": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y219": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022500",
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                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y219": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y220": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022500",
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                "words": 2
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        "clock_region": "X1Y4",
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        "pin_functions": {},
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        "type": "INT_L"
    },
    "INT_L_X74Y221": {
        "bits": {
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                "baseaddr": "0x00022500",
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                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
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            "TIEOFF_X81Y221": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y222": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022500",
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                "words": 2
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        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y222": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y223": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022500",
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                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y223": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y224": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y224": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y225": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022500",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y225": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y226": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022500",
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                "offset": 53,
                "words": 2
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        },
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        "grid_y": 24,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y226": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y227": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022500",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y227": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y228": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022500",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y228": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y229": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022500",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y229": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y230": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022500",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X81Y230": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X74Y231": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022500",
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                "offset": 63,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X81Y231": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y232": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022500",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y232": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y233": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022500",
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X81Y233": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X74Y234": {
        "bits": {
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        },
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            "TIEOFF_X81Y234": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
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        },
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    },
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        "bits": {
            "CLB_IO_CLK": {
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        },
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        "bits": {
            "CLB_IO_CLK": {
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        "bits": {
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        "bits": {
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            "TIEOFF_X83Y7": "TIEOFF"
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            "TIEOFF_X83Y10": "TIEOFF"
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                "words": 2
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        },
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            "TIEOFF_X83Y12": "TIEOFF"
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                "words": 2
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        },
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            "TIEOFF_X83Y13": "TIEOFF"
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        },
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            "TIEOFF_X83Y14": "TIEOFF"
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        },
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                "words": 2
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            "TIEOFF_X83Y16": "TIEOFF"
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    "INT_L_X76Y17": {
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                "baseaddr": "0x00442600",
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                "words": 2
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    "INT_L_X76Y18": {
        "bits": {
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            "TIEOFF_X83Y18": "TIEOFF"
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                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X83Y19": "TIEOFF"
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        "type": "INT_L"
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                "words": 2
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        },
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    "INT_L_X76Y21": {
        "bits": {
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                "words": 2
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        },
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    "INT_L_X76Y22": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X83Y22": "TIEOFF"
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    "INT_L_X76Y23": {
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        "clock_region": "X1Y0",
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        "sites": {
            "TIEOFF_X83Y23": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X76Y24": {
        "bits": {
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                "baseaddr": "0x00442600",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "sites": {
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        "type": "INT_L"
    },
    "INT_L_X76Y25": {
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                "baseaddr": "0x00442600",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
    },
    "INT_L_X76Y26": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X83Y26": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442600",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
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            "TIEOFF_X83Y27": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442600",
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                "words": 2
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        },
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            "TIEOFF_X83Y28": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00442600",
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            "TIEOFF_X83Y29": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00442600",
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            "TIEOFF_X83Y30": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442600",
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        "bits": {
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                "baseaddr": "0x00442600",
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                "baseaddr": "0x00442600",
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        },
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            "TIEOFF_X83Y65": "TIEOFF"
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    "INT_L_X76Y67": {
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        },
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        },
        "clock_region": "X1Y1",
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    "INT_L_X76Y72": {
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        },
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            "TIEOFF_X83Y72": "TIEOFF"
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    "INT_L_X76Y73": {
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        },
        "clock_region": "X1Y1",
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    "INT_L_X76Y74": {
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        },
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            "TIEOFF_X83Y74": "TIEOFF"
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    "INT_L_X76Y75": {
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        },
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
    },
    "INT_L_X76Y76": {
        "bits": {
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            "TIEOFF_X83Y76": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X76Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422600",
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        },
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            "TIEOFF_X83Y77": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X76Y78": {
        "bits": {
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                "baseaddr": "0x00422600",
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            "TIEOFF_X83Y78": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X76Y79": {
        "bits": {
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            "TIEOFF_X83Y79": "TIEOFF"
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    "INT_L_X76Y80": {
        "bits": {
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                "baseaddr": "0x00422600",
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            "TIEOFF_X83Y80": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00422600",
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            "TIEOFF_X83Y81": "TIEOFF"
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    "INT_L_X76Y82": {
        "bits": {
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                "baseaddr": "0x00422600",
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            "TIEOFF_X83Y82": "TIEOFF"
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    "INT_L_X76Y110": {
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    "INT_L_X76Y112": {
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    "INT_L_X76Y113": {
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    "INT_L_X76Y115": {
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    "INT_L_X76Y116": {
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    "INT_L_X76Y117": {
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    "INT_L_X76Y118": {
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    "INT_L_X76Y119": {
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    "INT_L_X76Y120": {
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    "INT_L_X76Y121": {
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    "INT_L_X76Y122": {
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    "INT_L_X76Y124": {
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        "type": "INT_L"
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    "INT_L_X76Y125": {
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        },
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    "INT_L_X76Y175": {
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022600",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
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            "TIEOFF_X83Y225": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X76Y226": {
        "bits": {
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                "baseaddr": "0x00022600",
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            "TIEOFF_X83Y226": "TIEOFF"
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    "INT_L_X76Y227": {
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        },
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            "TIEOFF_X83Y227": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X76Y228": {
        "bits": {
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                "baseaddr": "0x00022600",
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            "TIEOFF_X83Y228": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X76Y229": {
        "bits": {
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                "baseaddr": "0x00022600",
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            "TIEOFF_X83Y229": "TIEOFF"
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            "TIEOFF_X83Y230": "TIEOFF"
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                "words": 2
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            "TIEOFF_X85Y9": "TIEOFF"
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        },
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                "baseaddr": "0x00442700",
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            "TIEOFF_X85Y13": "TIEOFF"
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                "baseaddr": "0x00442700",
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                "words": 2
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        },
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            "TIEOFF_X85Y14": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X78Y15": {
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                "baseaddr": "0x00442700",
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                "words": 2
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        },
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            "TIEOFF_X85Y15": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00442700",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X85Y16": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X78Y17": {
        "bits": {
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                "baseaddr": "0x00442700",
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                "words": 2
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            "TIEOFF_X85Y17": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X78Y18": {
        "bits": {
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                "baseaddr": "0x00442700",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X85Y18": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442700",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X85Y19": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X78Y20": {
        "bits": {
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                "baseaddr": "0x00442700",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X85Y20": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X78Y21": {
        "bits": {
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                "baseaddr": "0x00442700",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X85Y21": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X78Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442700",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X85Y22": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X78Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442700",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X85Y23": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X78Y24": {
        "bits": {
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                "baseaddr": "0x00442700",
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                "offset": 48,
                "words": 2
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        },
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            "TIEOFF_X85Y24": "TIEOFF"
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    },
    "INT_L_X78Y25": {
        "bits": {
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                "baseaddr": "0x00442700",
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                "words": 2
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            "CLB_IO_CLK": {
                "baseaddr": "0x00442700",
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                "words": 2
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442700",
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                "words": 2
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            "TIEOFF_X85Y27": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00442700",
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                "words": 2
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                "baseaddr": "0x00442700",
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                "words": 2
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                "baseaddr": "0x00442700",
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                "baseaddr": "0x00442700",
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            "TIEOFF_X85Y65": "TIEOFF"
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                "baseaddr": "0x00422700",
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    "INT_L_X78Y67": {
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                "words": 2
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    "INT_L_X78Y68": {
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    "INT_L_X78Y69": {
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                "baseaddr": "0x00422700",
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                "baseaddr": "0x00422700",
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        "clock_region": "X1Y1",
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        "type": "INT_L"
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    "INT_L_X78Y72": {
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                "baseaddr": "0x00422700",
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        },
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            "TIEOFF_X85Y72": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X78Y73": {
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                "words": 2
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                "baseaddr": "0x00422700",
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                "offset": 48,
                "words": 2
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                "baseaddr": "0x00402700",
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    "INT_L_X78Y118": {
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                "baseaddr": "0x00402700",
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    "INT_L_X78Y121": {
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        "type": "INT_L"
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    "INT_L_X78Y122": {
        "bits": {
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                "baseaddr": "0x00402700",
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        "type": "INT_L"
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    "INT_L_X78Y222": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022700",
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                "offset": 44,
                "words": 2
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        },
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        "grid_y": 29,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X85Y222": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X78Y223": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022700",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X85Y223": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X78Y224": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022700",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X85Y224": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X78Y225": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022700",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
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        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X85Y225": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X78Y226": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022700",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X85Y226": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X78Y227": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022700",
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                "offset": 55,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X85Y227": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X78Y228": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022700",
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                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X85Y228": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X78Y229": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022700",
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                "words": 2
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        },
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            "TIEOFF_X85Y229": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X78Y230": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022700",
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                "words": 2
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        },
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            "TIEOFF_X85Y230": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X78Y231": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022700",
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                "words": 2
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        },
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            "TIEOFF_X85Y231": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X78Y232": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022700",
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                "words": 2
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            "TIEOFF_X85Y232": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X78Y233": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022700",
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                "words": 2
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        },
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            "TIEOFF_X85Y233": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X78Y234": {
        "bits": {
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                "baseaddr": "0x00022700",
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                "words": 2
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        },
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            "TIEOFF_X85Y234": "TIEOFF"
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    "INT_L_X78Y235": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X85Y235": "TIEOFF"
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    "INT_L_X78Y236": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X85Y236": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X78Y237": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X85Y237": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X78Y238": {
        "bits": {
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                "baseaddr": "0x00022700",
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                "words": 2
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        },
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            "TIEOFF_X85Y238": "TIEOFF"
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    "INT_L_X78Y239": {
        "bits": {
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                "baseaddr": "0x00022700",
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                "offset": 79,
                "words": 2
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            "TIEOFF_X85Y239": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X78Y240": {
        "bits": {
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                "baseaddr": "0x00022700",
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                "offset": 81,
                "words": 2
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        },
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            "TIEOFF_X85Y240": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X78Y241": {
        "bits": {
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                "baseaddr": "0x00022700",
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                "words": 2
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        },
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    "INT_L_X78Y242": {
        "bits": {
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                "baseaddr": "0x00022700",
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                "offset": 85,
                "words": 2
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        },
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        "type": "INT_L"
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    "INT_L_X78Y243": {
        "bits": {
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                "baseaddr": "0x00022700",
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                "words": 2
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        },
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            "TIEOFF_X85Y243": "TIEOFF"
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    "INT_L_X78Y244": {
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                "baseaddr": "0x00022700",
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                "words": 2
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    "INT_L_X78Y245": {
        "bits": {
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                "words": 2
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            "TIEOFF_X85Y245": "TIEOFF"
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    "INT_L_X78Y246": {
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                "baseaddr": "0x00022700",
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                "words": 2
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    "INT_L_X78Y247": {
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                "words": 2
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            "TIEOFF_X85Y247": "TIEOFF"
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    "INT_L_X78Y248": {
        "bits": {
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                "baseaddr": "0x00022700",
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                "words": 2
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            "TIEOFF_X85Y248": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X78Y249": {
        "bits": {
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                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X85Y249": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X80Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442800",
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                "offset": 0,
                "words": 2
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            "TIEOFF_X87Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X80Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442800",
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                "words": 2
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        },
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            "TIEOFF_X87Y1": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X80Y2": {
        "bits": {
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                "baseaddr": "0x00442800",
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                "words": 2
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        },
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            "TIEOFF_X87Y2": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00442800",
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                "words": 2
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        },
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            "TIEOFF_X87Y3": "TIEOFF"
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    "INT_L_X80Y4": {
        "bits": {
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                "baseaddr": "0x00442800",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X87Y4": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X80Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442800",
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                "offset": 10,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X87Y5": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X80Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442800",
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                "offset": 12,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X87Y6": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X80Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442800",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X87Y7": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X80Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442800",
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                "offset": 16,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X87Y8": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X80Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442800",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X87Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X80Y10": {
        "bits": {
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                "baseaddr": "0x00442800",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X87Y10": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X80Y11": {
        "bits": {
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                "baseaddr": "0x00442800",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X87Y11": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X80Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442800",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X87Y12": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X80Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442800",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X87Y13": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X80Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442800",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X87Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X80Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442800",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X87Y15": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X80Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442800",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X87Y16": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X80Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442800",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X87Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X80Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442800",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X87Y18": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X80Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442800",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X87Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X80Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442800",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X87Y20": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X80Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442800",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 199,
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        "bits": {
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                "baseaddr": "0x00442800",
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                "baseaddr": "0x00422800",
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                "offset": 42,
                "words": 2
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        },
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            "TIEOFF_X87Y121": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X80Y122": {
        "bits": {
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                "baseaddr": "0x00402800",
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                "words": 2
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    },
    "INT_L_X80Y123": {
        "bits": {
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                "baseaddr": "0x00402800",
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    },
    "INT_L_X80Y124": {
        "bits": {
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    "INT_L_X80Y125": {
        "bits": {
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        "pin_functions": {},
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00002800",
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        "bits": {
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        "bits": {
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        "bits": {
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                "baseaddr": "0x00022800",
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                "words": 2
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        "sites": {
            "TIEOFF_X89Y218": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X82Y219": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022900",
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        },
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            "TIEOFF_X89Y219": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X82Y220": {
        "bits": {
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                "baseaddr": "0x00022900",
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                "words": 2
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        },
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            "TIEOFF_X89Y220": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X82Y221": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022900",
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            "TIEOFF_X89Y221": "TIEOFF"
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    "INT_L_X82Y222": {
        "bits": {
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                "baseaddr": "0x00022900",
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            "TIEOFF_X89Y222": "TIEOFF"
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    "INT_L_X82Y223": {
        "bits": {
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                "baseaddr": "0x00022900",
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        },
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            "TIEOFF_X89Y223": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X82Y224": {
        "bits": {
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            "TIEOFF_X89Y224": "TIEOFF"
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    "INT_L_X82Y226": {
        "bits": {
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        "bits": {
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    "INT_L_X82Y249": {
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    "INT_L_X84Y0": {
        "bits": {
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            "TIEOFF_X91Y0": "TIEOFF"
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    "INT_L_X84Y1": {
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                "baseaddr": "0x00442A00",
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            "TIEOFF_X91Y1": "TIEOFF"
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    },
    "INT_L_X84Y2": {
        "bits": {
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                "baseaddr": "0x00442A00",
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            "TIEOFF_X91Y2": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X84Y3": {
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                "baseaddr": "0x00442A00",
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            "TIEOFF_X91Y3": "TIEOFF"
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                "baseaddr": "0x00442A00",
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            "TIEOFF_X91Y4": "TIEOFF"
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                "baseaddr": "0x00442A00",
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            "TIEOFF_X91Y5": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X91Y6": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X84Y7": {
        "bits": {
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                "baseaddr": "0x00442A00",
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            "TIEOFF_X91Y7": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X84Y8": {
        "bits": {
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                "baseaddr": "0x00442A00",
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            "TIEOFF_X91Y8": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X84Y9": {
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                "baseaddr": "0x00442A00",
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X91Y9": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X91Y10": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442A00",
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            "TIEOFF_X91Y11": "TIEOFF"
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        "type": "INT_L"
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            "CLB_IO_CLK": {
                "baseaddr": "0x00442A00",
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X91Y12": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X84Y13": {
        "bits": {
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                "baseaddr": "0x00442A00",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X91Y13": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X84Y14": {
        "bits": {
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                "baseaddr": "0x00442A00",
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X91Y14": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X84Y15": {
        "bits": {
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                "baseaddr": "0x00442A00",
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X91Y15": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X84Y16": {
        "bits": {
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                "baseaddr": "0x00442A00",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X91Y16": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X84Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442A00",
                "frames": 28,
                "offset": 34,
                "words": 2
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    "INT_L_X84Y166": {
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    "INT_L_X84Y167": {
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    "INT_L_X84Y213": {
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        "type": "INT_L"
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    "INT_L_X84Y214": {
        "bits": {
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00022A00",
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            "TIEOFF_X91Y216": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X86Y12": {
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            "TIEOFF_X93Y12": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442B00",
                "frames": 28,
                "offset": 26,
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        "type": "INT_L"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442C00",
                "frames": 28,
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            "TIEOFF_X95Y11": "TIEOFF"
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                "baseaddr": "0x00442C00",
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            "TIEOFF_X95Y12": "TIEOFF"
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                "baseaddr": "0x00442C00",
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00422C00",
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    "INT_L_X88Y106": {
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00402C00",
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        "bits": {
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    "INT_L_X88Y195": {
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    "INT_L_X88Y203": {
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    "INT_L_X88Y204": {
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    "INT_L_X88Y205": {
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    "INT_L_X88Y206": {
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        "sites": {
            "TIEOFF_X100Y247": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X92Y248": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022E00",
                "frames": 28,
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            "TIEOFF_X100Y248": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X92Y249": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022E00",
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            "TIEOFF_X100Y249": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442F00",
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            "TIEOFF_X102Y0": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00442F00",
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            "TIEOFF_X102Y1": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00442F00",
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            "TIEOFF_X102Y95": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X94Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422F00",
                "frames": 28,
                "offset": 93,
                "words": 2
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            "TIEOFF_X102Y96": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X94Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422F00",
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            "TIEOFF_X102Y97": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X94Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422F00",
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            "TIEOFF_X102Y98": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X94Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422F00",
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            "TIEOFF_X102Y99": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X94Y100": {
        "bits": {
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                "baseaddr": "0x00402F00",
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            "TIEOFF_X102Y100": "TIEOFF"
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            "TIEOFF_X102Y101": "TIEOFF"
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                "baseaddr": "0x00402F00",
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                "baseaddr": "0x00402F00",
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        "type": "INT_L"
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    "INT_L_X94Y194": {
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        "sites": {
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00002F00",
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            "TIEOFF_X102Y196": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X94Y197": {
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        "type": "INT_L"
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        "type": "INT_L"
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        "bits": {
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    "INT_L_X94Y242": {
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    "INT_L_X94Y243": {
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        "sites": {
            "TIEOFF_X102Y243": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X94Y244": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022F00",
                "frames": 28,
                "offset": 89,
                "words": 2
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        },
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            "TIEOFF_X102Y244": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X94Y245": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X102Y245": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X94Y246": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022F00",
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            "TIEOFF_X102Y246": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X102Y247": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X94Y248": {
        "bits": {
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                "baseaddr": "0x00022F00",
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    "INT_L_X94Y249": {
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        "bits": {
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                "baseaddr": "0x00443000",
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                "baseaddr": "0x00443000",
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                "words": 2
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                "baseaddr": "0x00443000",
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                "words": 2
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        "bits": {
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        "sites": {
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        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003000",
                "frames": 28,
                "offset": 85,
                "words": 2
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    },
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        "bits": {
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                "baseaddr": "0x00003000",
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            "TIEOFF_X105Y194": "TIEOFF"
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    "INT_L_X96Y195": {
        "bits": {
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        "type": "INT_L"
    },
    "INT_L_X98Y239": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023100",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 242,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X107Y239": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X98Y240": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023100",
                "frames": 28,
                "offset": 81,
                "words": 2
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        },
        "clock_region": "X1Y4",
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        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X107Y240": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X98Y241": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023100",
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                "offset": 83,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X107Y241": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X98Y242": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023100",
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                "offset": 85,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X107Y242": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X98Y243": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023100",
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                "offset": 87,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X107Y243": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X98Y244": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023100",
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                "words": 2
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        },
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            "TIEOFF_X107Y244": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X98Y245": {
        "bits": {
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                "baseaddr": "0x00023100",
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                "words": 2
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        },
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            "TIEOFF_X107Y245": "TIEOFF"
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    },
    "INT_L_X98Y246": {
        "bits": {
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                "baseaddr": "0x00023100",
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        },
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            "TIEOFF_X107Y246": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X98Y247": {
        "bits": {
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                "baseaddr": "0x00023100",
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        },
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            "TIEOFF_X107Y247": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X98Y248": {
        "bits": {
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                "baseaddr": "0x00023100",
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        },
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            "TIEOFF_X107Y248": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X98Y249": {
        "bits": {
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                "baseaddr": "0x00023100",
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        },
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            "TIEOFF_X107Y249": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00443200",
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            "TIEOFF_X109Y0": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443200",
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        },
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            "TIEOFF_X109Y1": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00443200",
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        },
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            "TIEOFF_X109Y2": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00443200",
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            "TIEOFF_X109Y3": "TIEOFF"
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                "baseaddr": "0x00443200",
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            "TIEOFF_X109Y5": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00443200",
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            "TIEOFF_X109Y6": "TIEOFF"
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                "baseaddr": "0x00443200",
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            "TIEOFF_X109Y7": "TIEOFF"
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            "TIEOFF_X109Y9": "TIEOFF"
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                "baseaddr": "0x00443200",
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            "TIEOFF_X109Y21": "TIEOFF"
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    "INT_L_X100Y22": {
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                "baseaddr": "0x00443200",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X109Y22": "TIEOFF"
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    "INT_L_X100Y23": {
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                "baseaddr": "0x00443200",
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            "TIEOFF_X109Y23": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00443200",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X109Y24": "TIEOFF"
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                "baseaddr": "0x00443200",
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        "pin_functions": {},
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            "TIEOFF_X109Y25": "TIEOFF"
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    "INT_L_X100Y26": {
        "bits": {
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                "baseaddr": "0x00443200",
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                "words": 2
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            "TIEOFF_X109Y26": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00443200",
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            "TIEOFF_X109Y27": "TIEOFF"
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    "INT_L_X100Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443200",
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            "TIEOFF_X109Y28": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00443200",
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                "words": 2
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        "pin_functions": {},
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        "type": "INT_L"
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                "baseaddr": "0x00443200",
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        "pin_functions": {},
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            "TIEOFF_X109Y30": "TIEOFF"
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    "INT_L_X100Y31": {
        "bits": {
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                "baseaddr": "0x00443200",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X109Y31": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X100Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443200",
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                "words": 2
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X100Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443200",
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                "offset": 67,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X109Y33": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X100Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443200",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X109Y34": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X100Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443200",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X109Y35": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X100Y36": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443200",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X109Y36": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X100Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443200",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X109Y37": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X100Y38": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443200",
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                "baseaddr": "0x00443200",
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        "bits": {
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                "baseaddr": "0x00423200",
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                "offset": 77,
                "words": 2
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            "TIEOFF_X109Y89": "TIEOFF"
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            "TIEOFF_X109Y90": "TIEOFF"
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                "baseaddr": "0x00423200",
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            "TIEOFF_X109Y91": "TIEOFF"
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            "TIEOFF_X109Y92": "TIEOFF"
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            "TIEOFF_X109Y93": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00403200",
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                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X109Y137": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X100Y138": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403200",
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                "words": 2
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        },
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            "TIEOFF_X109Y138": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X100Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403200",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X109Y139": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X100Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403200",
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                "words": 2
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        },
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            "TIEOFF_X109Y140": "TIEOFF"
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    },
    "INT_L_X100Y141": {
        "bits": {
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                "baseaddr": "0x00403200",
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        },
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            "TIEOFF_X109Y141": "TIEOFF"
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    },
    "INT_L_X100Y142": {
        "bits": {
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                "baseaddr": "0x00403200",
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            "TIEOFF_X109Y142": "TIEOFF"
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        "bits": {
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            "TIEOFF_X109Y143": "TIEOFF"
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            "TIEOFF_X109Y144": "TIEOFF"
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        "bits": {
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    "INT_L_X100Y186": {
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        "bits": {
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                "baseaddr": "0x00003200",
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    },
    "INT_L_X100Y236": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023200",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 248,
        "grid_y": 14,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X109Y236": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X100Y237": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023200",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 248,
        "grid_y": 13,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X109Y237": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X100Y238": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023200",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 248,
        "grid_y": 12,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X109Y238": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X100Y239": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023200",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 248,
        "grid_y": 11,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X109Y239": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X100Y240": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023200",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 248,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X109Y240": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X100Y241": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023200",
                "frames": 28,
                "offset": 83,
                "words": 2
            }
        },
        "clock_region": "X1Y4",
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        "grid_y": 9,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X109Y241": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X100Y242": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023200",
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                "offset": 85,
                "words": 2
            }
        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X109Y242": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X100Y243": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023200",
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                "offset": 87,
                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X109Y243": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X100Y244": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023200",
                "frames": 28,
                "offset": 89,
                "words": 2
            }
        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X109Y244": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X100Y245": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023200",
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                "offset": 91,
                "words": 2
            }
        },
        "clock_region": "X1Y4",
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            "TIEOFF_X109Y245": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X100Y246": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023200",
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                "offset": 93,
                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
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            "TIEOFF_X109Y246": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X100Y247": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023200",
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                "offset": 95,
                "words": 2
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        },
        "clock_region": "X1Y4",
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        "sites": {
            "TIEOFF_X109Y247": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X100Y248": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023200",
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                "offset": 97,
                "words": 2
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        },
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            "TIEOFF_X109Y248": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X100Y249": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023200",
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                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y4",
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        "sites": {
            "TIEOFF_X109Y249": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
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                "offset": 0,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X111Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
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                "offset": 2,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X111Y1": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "grid_y": 257,
        "pin_functions": {},
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            "TIEOFF_X111Y2": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
                "frames": 28,
                "offset": 6,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X111Y3": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
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                "offset": 8,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X111Y4": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
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                "offset": 10,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X111Y5": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
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                "offset": 12,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X111Y6": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
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                "offset": 14,
                "words": 2
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        },
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            "TIEOFF_X111Y7": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y8": {
        "bits": {
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                "baseaddr": "0x00443300",
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                "offset": 16,
                "words": 2
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        },
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            "TIEOFF_X111Y8": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y9": {
        "bits": {
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                "baseaddr": "0x00443300",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X111Y9": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X102Y10": {
        "bits": {
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                "baseaddr": "0x00443300",
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                "offset": 20,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X111Y10": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y11": {
        "bits": {
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                "baseaddr": "0x00443300",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X111Y11": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y12": {
        "bits": {
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                "baseaddr": "0x00443300",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X111Y12": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X102Y13": {
        "bits": {
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                "baseaddr": "0x00443300",
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                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X111Y13": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X102Y14": {
        "bits": {
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                "baseaddr": "0x00443300",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X111Y14": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y15": {
        "bits": {
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                "baseaddr": "0x00443300",
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                "offset": 30,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y15": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y16": {
        "bits": {
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                "baseaddr": "0x00443300",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y16": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X111Y17": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
                "frames": 28,
                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y18": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "grid_y": 240,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y19": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "grid_y": 239,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y20": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
                "frames": 28,
                "offset": 42,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y22": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y23": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y24": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y25": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y26": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y27": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y28": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y29": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y30": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 252,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y31": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y32": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 252,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y33": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 252,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y34": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443300",
                "frames": 28,
                "offset": 71,
                "words": 2
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                "baseaddr": "0x00443300",
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    "INT_L_X102Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423300",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 252,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y85": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423300",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 170,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423300",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 252,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y87": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423300",
                "frames": 28,
                "offset": 77,
                "words": 2
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        },
        "clock_region": "X1Y1",
        "grid_x": 252,
        "grid_y": 168,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423300",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y89": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423300",
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                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y90": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423300",
                "frames": 28,
                "offset": 83,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y91": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423300",
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                "offset": 85,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y92": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423300",
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                "offset": 87,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "sites": {
            "TIEOFF_X111Y93": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423300",
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                "offset": 89,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X111Y94": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423300",
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                "offset": 91,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X111Y95": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423300",
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                "offset": 93,
                "words": 2
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        },
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            "TIEOFF_X111Y96": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423300",
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                "offset": 95,
                "words": 2
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        },
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            "TIEOFF_X111Y97": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423300",
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                "offset": 97,
                "words": 2
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        },
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            "TIEOFF_X111Y98": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423300",
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                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X111Y99": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "offset": 0,
                "words": 2
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        },
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            "TIEOFF_X111Y100": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "offset": 2,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X111Y101": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "offset": 4,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y102": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "offset": 6,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y103": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "offset": 8,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X111Y104": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "offset": 10,
                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X111Y105": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y106": {
        "bits": {
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                "baseaddr": "0x00403300",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X111Y106": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y107": {
        "bits": {
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                "baseaddr": "0x00403300",
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                "offset": 14,
                "words": 2
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        },
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            "TIEOFF_X111Y107": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y108": {
        "bits": {
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                "baseaddr": "0x00403300",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X111Y108": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "offset": 18,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y109": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X111Y110": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X111Y111": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y112": {
        "bits": {
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                "baseaddr": "0x00403300",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X111Y112": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X111Y113": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y114": {
        "bits": {
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                "baseaddr": "0x00403300",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X111Y114": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "offset": 30,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X111Y115": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "offset": 32,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X111Y116": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y117": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y118": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y119": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y120": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y121": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y122": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y123": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y124": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y125": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y128": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "offset": 59,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y129": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y130": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 252,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y131": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y132": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y133": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403300",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
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    },
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        "bits": {
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                "baseaddr": "0x00403300",
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                "words": 2
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            "TIEOFF_X111Y136": "TIEOFF"
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            "TIEOFF_X111Y137": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003300",
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                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y184": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003300",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y185": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y186": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003300",
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                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y186": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y187": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003300",
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                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y187": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y188": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003300",
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                "offset": 77,
                "words": 2
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        },
        "clock_region": "X1Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y188": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X102Y189": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003300",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y189": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003300",
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                "words": 2
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        },
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            "TIEOFF_X111Y190": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y191": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003300",
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                "words": 2
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        },
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            "TIEOFF_X111Y191": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y192": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003300",
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            "TIEOFF_X111Y192": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y193": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003300",
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                "words": 2
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        },
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            "TIEOFF_X111Y193": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y194": {
        "bits": {
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                "baseaddr": "0x00003300",
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                "words": 2
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        },
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            "TIEOFF_X111Y194": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y195": {
        "bits": {
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                "baseaddr": "0x00003300",
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        },
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            "TIEOFF_X111Y195": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y196": {
        "bits": {
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                "baseaddr": "0x00003300",
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        },
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            "TIEOFF_X111Y196": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y197": {
        "bits": {
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                "baseaddr": "0x00003300",
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        },
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            "TIEOFF_X111Y197": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X102Y198": {
        "bits": {
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                "baseaddr": "0x00003300",
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        },
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            "TIEOFF_X111Y198": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y199": {
        "bits": {
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                "baseaddr": "0x00003300",
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        },
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            "TIEOFF_X111Y199": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00023300",
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            "TIEOFF_X111Y200": "TIEOFF"
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        "bits": {
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            "TIEOFF_X111Y201": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X111Y202": "TIEOFF"
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    "INT_L_X102Y203": {
        "bits": {
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    "INT_L_X102Y204": {
        "bits": {
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    "INT_L_X102Y205": {
        "bits": {
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            "TIEOFF_X111Y205": "TIEOFF"
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    "INT_L_X102Y208": {
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    "INT_L_X102Y209": {
        "bits": {
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    "INT_L_X102Y210": {
        "bits": {
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            "TIEOFF_X111Y210": "TIEOFF"
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    "INT_L_X102Y211": {
        "bits": {
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            "TIEOFF_X111Y211": "TIEOFF"
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    "INT_L_X102Y212": {
        "bits": {
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        },
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    "INT_L_X102Y213": {
        "bits": {
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            "TIEOFF_X111Y213": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X102Y214": {
        "bits": {
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        },
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            "TIEOFF_X111Y214": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X102Y215": {
        "bits": {
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                "baseaddr": "0x00023300",
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                "words": 2
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        "clock_region": "X1Y4",
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            "TIEOFF_X111Y215": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X102Y216": {
        "bits": {
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                "baseaddr": "0x00023300",
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        },
        "clock_region": "X1Y4",
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            "TIEOFF_X111Y216": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X102Y217": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023300",
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                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y217": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y218": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023300",
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                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y218": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y219": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023300",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y219": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y220": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023300",
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                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y220": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y221": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023300",
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                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y221": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y222": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023300",
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                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
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            "TIEOFF_X111Y222": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X102Y223": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023300",
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                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y223": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X102Y224": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023300",
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                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y224": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X102Y225": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023300",
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                "offset": 51,
                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
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            "TIEOFF_X111Y225": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X102Y226": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023300",
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                "words": 2
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        },
        "clock_region": "X1Y4",
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        "sites": {
            "TIEOFF_X111Y226": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y227": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023300",
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        },
        "clock_region": "X1Y4",
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            "TIEOFF_X111Y227": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y228": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023300",
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
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            "TIEOFF_X111Y228": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y229": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023300",
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                "words": 2
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        },
        "clock_region": "X1Y4",
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        "sites": {
            "TIEOFF_X111Y229": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X102Y230": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023300",
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                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y230": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X102Y231": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023300",
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                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y231": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y232": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023300",
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                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X111Y232": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X102Y233": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023300",
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                "offset": 67,
                "words": 2
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                "baseaddr": "0x00023300",
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                "words": 2
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    "INT_L_X102Y236": {
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            "TIEOFF_X111Y238": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023400",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y4",
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        "sites": {
            "TIEOFF_X113Y231": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X104Y232": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023400",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X113Y232": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X104Y233": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023400",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X113Y233": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X104Y234": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023400",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X113Y234": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X104Y235": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023400",
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                "offset": 71,
                "words": 2
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        },
        "clock_region": "X1Y4",
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        "sites": {
            "TIEOFF_X113Y235": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X104Y236": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 73,
                "words": 2
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        },
        "clock_region": "X1Y4",
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        "sites": {
            "TIEOFF_X113Y236": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X104Y237": {
        "bits": {
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                "baseaddr": "0x00023400",
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                "words": 2
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        },
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            "TIEOFF_X113Y237": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X104Y238": {
        "bits": {
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                "baseaddr": "0x00023400",
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                "words": 2
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        },
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            "TIEOFF_X113Y238": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X104Y239": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023400",
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        },
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            "TIEOFF_X113Y239": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X104Y240": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023400",
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                "words": 2
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        },
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            "TIEOFF_X113Y240": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X104Y241": {
        "bits": {
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        },
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            "TIEOFF_X113Y241": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X104Y242": {
        "bits": {
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        },
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            "TIEOFF_X113Y242": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X104Y243": {
        "bits": {
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        },
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            "TIEOFF_X113Y243": "TIEOFF"
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    },
    "INT_L_X104Y244": {
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        },
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            "TIEOFF_X113Y244": "TIEOFF"
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    "INT_L_X104Y245": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X113Y245": "TIEOFF"
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    "INT_L_X104Y246": {
        "bits": {
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        },
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            "TIEOFF_X113Y246": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X104Y247": {
        "bits": {
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        },
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            "TIEOFF_X113Y247": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X104Y248": {
        "bits": {
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                "words": 2
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        },
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        "type": "INT_L"
    },
    "INT_L_X104Y249": {
        "bits": {
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                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X113Y249": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_R_X1Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440080",
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                "offset": 0,
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        },
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            "TIEOFF_X1Y0": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y1": {
        "bits": {
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                "baseaddr": "0x00440080",
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        "type": "INT_R"
    },
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        "bits": {
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        "type": "INT_R"
    },
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        "bits": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "bits": {
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        },
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        "type": "INT_R"
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        "bits": {
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        "type": "INT_R"
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        "bits": {
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        "type": "INT_R"
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        "bits": {
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        },
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        "bits": {
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        },
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X1Y13": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y14": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X1Y14": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y15": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X1Y15": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y16": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y16": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y17": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440080",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X1Y18": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y19": {
        "bits": {
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                "baseaddr": "0x00440080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X1Y19": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y20": {
        "bits": {
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                "baseaddr": "0x00440080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "sites": {
            "TIEOFF_X1Y20": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y21": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y22": {
        "bits": {
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                "baseaddr": "0x00440080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y22": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y23": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "sites": {
            "TIEOFF_X1Y24": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y25": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y26": {
        "bits": {
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                "baseaddr": "0x00440080",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "sites": {
            "TIEOFF_X1Y26": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 5,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y27": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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        "type": "INT_R"
    },
    "INT_R_X1Y29": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y29": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y30": {
        "bits": {
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                "baseaddr": "0x00440080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 5,
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00440080",
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        "type": "INT_R"
    },
    "INT_R_X1Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
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                "words": 2
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        },
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            "TIEOFF_X1Y81": "TIEOFF"
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    "INT_R_X1Y83": {
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            "TIEOFF_X1Y84": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X1Y85": "TIEOFF"
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            "TIEOFF_X1Y86": "TIEOFF"
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    "INT_R_X1Y118": {
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    "INT_R_X1Y121": {
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    "INT_R_X1Y122": {
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    "INT_R_X1Y124": {
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        "type": "INT_R"
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    "INT_R_X1Y125": {
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        "type": "INT_R"
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    "INT_R_X1Y126": {
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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    "INT_R_X1Y128": {
        "bits": {
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        },
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            "TIEOFF_X1Y128": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y129": {
        "bits": {
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        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y129": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00000080",
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    "INT_R_X1Y213": {
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            "TIEOFF_X1Y214": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y217": {
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        "type": "INT_R"
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    "INT_R_X1Y218": {
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    "INT_R_X1Y219": {
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        "type": "INT_R"
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    "INT_R_X1Y220": {
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    "INT_R_X1Y221": {
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    "INT_R_X1Y222": {
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    "INT_R_X1Y223": {
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    "INT_R_X1Y224": {
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    "INT_R_X1Y225": {
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            "TIEOFF_X1Y225": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y226": {
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            "TIEOFF_X1Y226": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y227": {
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            "TIEOFF_X1Y227": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y228": {
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        },
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            "TIEOFF_X1Y228": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y229": {
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X1Y229": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y230": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
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            "TIEOFF_X1Y230": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y231": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
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                "words": 2
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        },
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            "TIEOFF_X1Y231": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y232": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
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                "words": 2
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        },
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            "TIEOFF_X1Y232": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y233": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
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        },
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            "TIEOFF_X1Y233": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y234": {
        "bits": {
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        },
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            "TIEOFF_X1Y234": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y235": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X1Y235": "TIEOFF"
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    "INT_R_X1Y236": {
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            "TIEOFF_X1Y236": "TIEOFF"
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    "INT_R_X1Y237": {
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        },
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            "TIEOFF_X1Y238": "TIEOFF"
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        },
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        },
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        "type": "INT_R"
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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    "INT_R_X3Y15": {
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        },
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        "type": "INT_R"
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    "INT_R_X3Y16": {
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        },
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        "type": "INT_R"
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    "INT_R_X3Y17": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X3Y17": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y18": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X3Y19": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X3Y20": {
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X3Y21": {
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                "words": 2
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            "TIEOFF_X3Y21": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y22": {
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        },
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        "pin_functions": {},
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            "TIEOFF_X3Y22": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y23": {
        "bits": {
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X3Y24": {
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                "baseaddr": "0x00440180",
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X3Y25": {
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X3Y25": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y26": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "sites": {
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        "type": "INT_R"
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X3Y27": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y28": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y78": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y79": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y80": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y81": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
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                "offset": 65,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X3Y82": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
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                "offset": 67,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X3Y83": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
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                "offset": 69,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X3Y84": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
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                "words": 2
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        },
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            "TIEOFF_X3Y85": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
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                "words": 2
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        },
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            "TIEOFF_X3Y86": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420180",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X3Y87": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y88": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
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            "TIEOFF_X3Y88": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y89": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
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            "TIEOFF_X3Y89": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y90": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
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            "TIEOFF_X3Y90": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y91": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
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            "TIEOFF_X3Y91": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y92": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
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            "TIEOFF_X3Y92": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y93": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
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            "TIEOFF_X3Y93": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y94": {
        "bits": {
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        },
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            "TIEOFF_X3Y94": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y95": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "offset": 91,
                "words": 2
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        },
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            "TIEOFF_X3Y95": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y96": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "offset": 93,
                "words": 2
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        },
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            "TIEOFF_X3Y96": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y97": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "offset": 95,
                "words": 2
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        },
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            "TIEOFF_X3Y97": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y98": {
        "bits": {
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                "offset": 97,
                "words": 2
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        },
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            "TIEOFF_X3Y98": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y99": {
        "bits": {
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                "offset": 99,
                "words": 2
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        "type": "INT_R"
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    "INT_R_X3Y100": {
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        "type": "INT_R"
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        "bits": {
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        },
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            "TIEOFF_X3Y101": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y102": {
        "bits": {
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        },
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            "TIEOFF_X3Y102": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y103": {
        "bits": {
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        },
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        "pin_functions": {},
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            "TIEOFF_X3Y103": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y104": {
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        "type": "INT_R"
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    "INT_R_X3Y105": {
        "bits": {
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            "TIEOFF_X3Y105": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y106": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X3Y106": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y107": {
        "bits": {
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X3Y108": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X3Y108": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y109": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y109": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y110": {
        "bits": {
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                "baseaddr": "0x00400180",
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                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y110": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y111": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y112": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y113": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y114": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y115": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y116": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y117": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y118": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y119": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y120": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y121": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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                "offset": 44,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y122": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y123": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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                "offset": 48,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 12,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y124": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 12,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y125": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 12,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y126": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
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                "baseaddr": "0x00400180",
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    "INT_R_X3Y167": {
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        "type": "INT_R"
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    "INT_R_X3Y169": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X3Y177": {
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        "type": "INT_R"
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    "INT_R_X3Y223": {
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    "INT_R_X3Y225": {
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        "type": "INT_R"
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    "INT_R_X3Y226": {
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        "pin_functions": {},
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            "TIEOFF_X3Y226": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y227": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 12,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y227": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y228": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y228": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y229": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y229": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y230": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "offset": 61,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y230": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y231": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y231": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y232": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X3Y232": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y233": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "words": 2
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        },
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            "TIEOFF_X3Y233": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y234": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "words": 2
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        },
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            "TIEOFF_X3Y234": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y235": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y235": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y236": {
        "bits": {
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                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y236": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y237": {
        "bits": {
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                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y237": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y238": {
        "bits": {
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                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y238": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y239": {
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                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y239": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y240": {
        "bits": {
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                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y240": "TIEOFF"
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    },
    "INT_R_X3Y241": {
        "bits": {
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                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y241": "TIEOFF"
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    },
    "INT_R_X3Y242": {
        "bits": {
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        },
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            "TIEOFF_X3Y242": "TIEOFF"
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    },
    "INT_R_X3Y243": {
        "bits": {
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                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y243": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y244": {
        "bits": {
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                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y244": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y245": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X3Y245": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y246": {
        "bits": {
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        },
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            "TIEOFF_X3Y246": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y247": {
        "bits": {
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        },
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            "TIEOFF_X3Y247": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y248": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X3Y248": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y249": {
        "bits": {
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        },
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            "TIEOFF_X3Y249": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00440280",
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            "TIEOFF_X5Y0": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y1": {
        "bits": {
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        },
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        "pin_functions": {},
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            "TIEOFF_X5Y1": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00440280",
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X5Y2": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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            "TIEOFF_X5Y3": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00440280",
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                "words": 2
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            "TIEOFF_X5Y4": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00440280",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X5Y5": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X5Y6": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X5Y7": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y8": {
        "bits": {
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X5Y8": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00440280",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y9": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440280",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y10": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440280",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y11": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440280",
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                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y12": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440280",
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                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y13": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440280",
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                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y14": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440280",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y15": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440280",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y16": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440280",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y17": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440280",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 241,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y18": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440280",
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                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y19": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440280",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 239,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y20": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440280",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
        "grid_y": 238,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y21": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440280",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y22": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440280",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 16,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y23": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440280",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
        "grid_y": 235,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y24": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440280",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y25": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y26": {
        "bits": {
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    "INT_R_X5Y125": {
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            "TIEOFF_X5Y174": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000280",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
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            "TIEOFF_X5Y175": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y176": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000280",
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            "TIEOFF_X5Y176": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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            "TIEOFF_X5Y177": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y178": {
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            "TIEOFF_X5Y178": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X5Y179": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X5Y207": "TIEOFF"
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    "INT_R_X5Y208": {
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    "INT_R_X5Y209": {
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            "TIEOFF_X5Y209": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y210": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X5Y210": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y211": {
        "bits": {
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                "baseaddr": "0x00020280",
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                "words": 2
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            "TIEOFF_X5Y211": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y212": {
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            "TIEOFF_X5Y212": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y213": {
        "bits": {
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        },
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            "TIEOFF_X5Y213": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y214": {
        "bits": {
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            "TIEOFF_X5Y214": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y215": {
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        "type": "INT_R"
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    "INT_R_X5Y216": {
        "bits": {
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        "clock_region": "X0Y4",
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            "TIEOFF_X5Y216": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y217": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y4",
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            "TIEOFF_X5Y217": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y218": {
        "bits": {
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                "words": 2
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        "clock_region": "X0Y4",
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        "pin_functions": {},
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            "TIEOFF_X5Y218": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y219": {
        "bits": {
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        "clock_region": "X0Y4",
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        "pin_functions": {},
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            "TIEOFF_X5Y219": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y220": {
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            "TIEOFF_X5Y220": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y221": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y221": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y222": {
        "bits": {
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        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y222": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y223": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y4",
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        "sites": {
            "TIEOFF_X5Y223": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y224": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
                "frames": 28,
                "offset": 48,
                "words": 2
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
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                "words": 2
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        },
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            "TIEOFF_X5Y225": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y227": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X7Y23": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X7Y23": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
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                "offset": 40,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X9Y220": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X9Y221": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
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                "offset": 42,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X9Y221": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X9Y222": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
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                "offset": 44,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X9Y222": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X9Y223": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
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                "offset": 46,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X9Y223": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X9Y224": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
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                "offset": 48,
                "words": 2
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        },
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            "TIEOFF_X9Y224": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X9Y225": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
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                "offset": 51,
                "words": 2
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        },
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            "TIEOFF_X9Y225": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X9Y226": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
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                "words": 2
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        },
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            "TIEOFF_X9Y226": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X9Y227": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
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        },
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            "TIEOFF_X9Y227": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X9Y228": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
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        },
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            "TIEOFF_X9Y228": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X9Y229": {
        "bits": {
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                "baseaddr": "0x00020480",
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        },
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            "TIEOFF_X9Y229": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X9Y230": {
        "bits": {
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        },
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        "type": "INT_R"
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    "INT_R_X9Y231": {
        "bits": {
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                "baseaddr": "0x00020480",
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        },
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            "TIEOFF_X9Y231": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00020480",
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        },
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            "TIEOFF_X9Y232": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X9Y233": {
        "bits": {
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                "baseaddr": "0x00020480",
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        },
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            "TIEOFF_X9Y233": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X9Y234": {
        "bits": {
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        },
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    "INT_R_X9Y235": {
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        },
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        "type": "INT_R"
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    "INT_R_X9Y236": {
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        },
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            "TIEOFF_X9Y236": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X9Y237": {
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        },
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        "type": "INT_R"
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    "INT_R_X9Y238": {
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            "TIEOFF_X9Y238": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X9Y239": {
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    "INT_R_X9Y240": {
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        },
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    "INT_R_X9Y241": {
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    "INT_R_X9Y242": {
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    "INT_R_X9Y243": {
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        "type": "INT_R"
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    "INT_R_X9Y244": {
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    "INT_R_X9Y245": {
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    "INT_R_X9Y246": {
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        },
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        "type": "INT_R"
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    "INT_R_X9Y247": {
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        },
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    "INT_R_X9Y248": {
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        },
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        "type": "INT_R"
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    "INT_R_X9Y249": {
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        },
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        "type": "INT_R"
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X12Y0": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y1": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X12Y1": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y2": {
        "bits": {
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                "offset": 4,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X12Y2": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y3": {
        "bits": {
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                "baseaddr": "0x00440580",
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                "offset": 6,
                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X12Y3": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y4": {
        "bits": {
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                "baseaddr": "0x00440580",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X12Y4": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y5": {
        "bits": {
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                "baseaddr": "0x00440580",
                "frames": 28,
                "offset": 10,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y5": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y6": {
        "bits": {
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                "baseaddr": "0x00440580",
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                "offset": 12,
                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X12Y6": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440580",
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X12Y7": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y8": {
        "bits": {
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                "baseaddr": "0x00440580",
                "frames": 28,
                "offset": 16,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X12Y8": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440580",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y9": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y10": {
        "bits": {
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                "baseaddr": "0x00440580",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y10": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440580",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y11": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440580",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y12": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X11Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440580",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y13": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440580",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y14": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X11Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440580",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y15": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X11Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440580",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 32,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y16": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X11Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440580",
                "frames": 28,
                "offset": 34,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 32,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y17": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X11Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440580",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 32,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y18": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X11Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440580",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X12Y69": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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                "offset": 40,
                "words": 2
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        },
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            "TIEOFF_X12Y70": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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                "words": 2
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        },
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            "TIEOFF_X12Y71": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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                "words": 2
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        },
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            "TIEOFF_X12Y72": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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                "words": 2
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        },
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            "TIEOFF_X12Y73": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420580",
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        },
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            "TIEOFF_X12Y74": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y75": {
        "bits": {
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                "baseaddr": "0x00420580",
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        },
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            "TIEOFF_X12Y75": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y76": {
        "bits": {
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                "baseaddr": "0x00420580",
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        },
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            "TIEOFF_X12Y76": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y77": {
        "bits": {
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                "baseaddr": "0x00420580",
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        "type": "INT_R"
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    "INT_R_X11Y78": {
        "bits": {
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                "baseaddr": "0x00420580",
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        },
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            "TIEOFF_X12Y78": "TIEOFF"
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                "baseaddr": "0x00420580",
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00420580",
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        "bits": {
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    "INT_R_X11Y82": {
        "bits": {
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        },
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        },
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    "INT_R_X11Y85": {
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    "INT_R_X11Y87": {
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        "type": "INT_R"
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    "INT_R_X11Y88": {
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    "INT_R_X11Y89": {
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    "INT_R_X11Y91": {
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    "INT_R_X11Y95": {
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    "INT_R_X11Y98": {
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    "INT_R_X11Y99": {
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    "INT_R_X11Y100": {
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            "TIEOFF_X12Y100": "TIEOFF"
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        "type": "INT_R"
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        "clock_region": "X0Y2",
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            "TIEOFF_X12Y101": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y102": {
        "bits": {
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                "baseaddr": "0x00400580",
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        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X11Y103": {
        "bits": {
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                "baseaddr": "0x00400580",
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            "TIEOFF_X12Y103": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y104": {
        "bits": {
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                "baseaddr": "0x00400580",
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                "words": 2
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    "INT_R_X11Y105": {
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                "baseaddr": "0x00400580",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X12Y105": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y106": {
        "bits": {
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            "TIEOFF_X12Y106": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y107": {
        "bits": {
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                "baseaddr": "0x00400580",
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        "type": "INT_R"
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    "INT_R_X11Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400580",
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X11Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400580",
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                "words": 2
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        "clock_region": "X0Y2",
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            "TIEOFF_X12Y109": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400580",
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        "clock_region": "X0Y2",
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            "TIEOFF_X12Y110": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y111": {
        "bits": {
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                "baseaddr": "0x00400580",
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            "TIEOFF_X12Y111": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y112": {
        "bits": {
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                "baseaddr": "0x00400580",
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X11Y113": {
        "bits": {
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                "baseaddr": "0x00400580",
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        },
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        "sites": {
            "TIEOFF_X12Y113": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400580",
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        "pin_functions": {},
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            "TIEOFF_X12Y114": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y115": {
        "bits": {
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                "baseaddr": "0x00400580",
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        },
        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X11Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400580",
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        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y116": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400580",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y117": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y118": {
        "bits": {
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                "baseaddr": "0x00400580",
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                "offset": 36,
                "words": 2
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    "INT_R_X11Y208": {
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    "INT_R_X11Y209": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X11Y217": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y217": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X11Y218": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
                "frames": 28,
                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y4",
        "grid_x": 32,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y218": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X11Y219": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y219": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X11Y220": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y220": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X11Y221": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
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            "TIEOFF_X12Y221": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y222": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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                "offset": 44,
                "words": 2
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        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
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            "TIEOFF_X12Y222": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X11Y223": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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                "words": 2
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        },
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            "TIEOFF_X12Y223": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y224": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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        },
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            "TIEOFF_X12Y224": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y225": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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        },
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            "TIEOFF_X12Y225": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y226": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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                "words": 2
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        },
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            "TIEOFF_X12Y226": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y227": {
        "bits": {
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                "baseaddr": "0x00020580",
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        },
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            "TIEOFF_X12Y227": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y228": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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        },
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            "TIEOFF_X12Y228": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y229": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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        },
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            "TIEOFF_X12Y229": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y230": {
        "bits": {
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                "baseaddr": "0x00020580",
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        },
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            "TIEOFF_X12Y230": "TIEOFF"
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    "INT_R_X11Y231": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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                "words": 2
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        },
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            "TIEOFF_X12Y231": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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                "words": 2
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        },
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            "TIEOFF_X12Y232": "TIEOFF"
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    "INT_R_X11Y233": {
        "bits": {
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                "baseaddr": "0x00020580",
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        },
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            "TIEOFF_X12Y233": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y234": {
        "bits": {
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                "baseaddr": "0x00020580",
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        },
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            "TIEOFF_X12Y234": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y235": {
        "bits": {
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                "baseaddr": "0x00020580",
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            "TIEOFF_X12Y235": "TIEOFF"
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    },
    "INT_R_X11Y236": {
        "bits": {
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        },
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            "TIEOFF_X12Y236": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y237": {
        "bits": {
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                "baseaddr": "0x00020580",
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            "TIEOFF_X12Y237": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y238": {
        "bits": {
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            "TIEOFF_X12Y238": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y239": {
        "bits": {
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                "words": 2
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            "TIEOFF_X12Y239": "TIEOFF"
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    "INT_R_X11Y240": {
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                "words": 2
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            "TIEOFF_X12Y240": "TIEOFF"
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    "INT_R_X11Y241": {
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            "TIEOFF_X12Y241": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y242": {
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            "TIEOFF_X12Y242": "TIEOFF"
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    "INT_R_X11Y243": {
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            "TIEOFF_X12Y243": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y244": {
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            "TIEOFF_X12Y244": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y245": {
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            "TIEOFF_X12Y245": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y246": {
        "bits": {
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            "TIEOFF_X12Y246": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y247": {
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                "words": 2
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        },
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            "TIEOFF_X12Y247": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y248": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y4",
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            "TIEOFF_X12Y248": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X11Y249": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
        "clock_region": "X0Y4",
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        "sites": {
            "TIEOFF_X12Y249": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440680",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y0": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440680",
                "frames": 28,
                "offset": 2,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X14Y1": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440680",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "grid_y": 257,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y2": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X13Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440680",
                "frames": 28,
                "offset": 6,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y3": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440680",
                "frames": 28,
                "offset": 8,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X14Y4": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440680",
                "frames": 28,
                "offset": 10,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y5": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440680",
                "frames": 28,
                "offset": 12,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y6": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440680",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y7": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440680",
                "frames": 28,
                "offset": 16,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y8": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440680",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "grid_y": 250,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y9": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X13Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440680",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 36,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y10": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X13Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440680",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y11": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X13Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440680",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y12": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X13Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440680",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 36,
        "grid_y": 246,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y13": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X13Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440680",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 36,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y14": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X13Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440680",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 36,
        "grid_y": 244,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y15": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X13Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440680",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 36,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y16": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X13Y17": {
        "bits": {
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    "INT_R_X13Y116": {
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00000680",
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    "INT_R_X13Y204": {
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    "INT_R_X13Y209": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X13Y215": {
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                "words": 2
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            "TIEOFF_X14Y215": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020680",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X14Y216": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y217": {
        "bits": {
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            "TIEOFF_X14Y217": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y218": {
        "bits": {
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                "baseaddr": "0x00020680",
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            "TIEOFF_X14Y218": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y219": {
        "bits": {
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                "baseaddr": "0x00020680",
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            "TIEOFF_X14Y219": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y220": {
        "bits": {
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            "TIEOFF_X14Y220": "TIEOFF"
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    "INT_R_X13Y221": {
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            "TIEOFF_X14Y221": "TIEOFF"
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    "INT_R_X13Y223": {
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    "INT_R_X13Y248": {
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    "INT_R_X13Y249": {
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        "clock_region": "X0Y0",
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            "TIEOFF_X17Y0": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y8": {
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        "type": "INT_R"
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    "INT_R_X15Y9": {
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X17Y11": "TIEOFF"
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        "type": "INT_R"
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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                "baseaddr": "0x00440780",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X17Y13": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y14": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y14": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X17Y211": {
        "bits": {
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                "baseaddr": "0x00020880",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X19Y211": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X17Y212": {
        "bits": {
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                "baseaddr": "0x00020880",
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        },
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            "TIEOFF_X19Y212": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y213": {
        "bits": {
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                "baseaddr": "0x00020880",
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        },
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            "TIEOFF_X19Y213": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X17Y214": {
        "bits": {
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                "baseaddr": "0x00020880",
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            "TIEOFF_X19Y214": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X17Y215": {
        "bits": {
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                "baseaddr": "0x00020880",
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            "TIEOFF_X19Y215": "TIEOFF"
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    "INT_R_X17Y216": {
        "bits": {
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                "baseaddr": "0x00020880",
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        },
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            "TIEOFF_X19Y216": "TIEOFF"
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    "INT_R_X17Y217": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X17Y219": {
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    "INT_R_X17Y244": {
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    "INT_R_X17Y245": {
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    "INT_R_X17Y246": {
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                "words": 2
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    "INT_R_X17Y247": {
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                "words": 2
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        },
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    "INT_R_X17Y248": {
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        },
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        "type": "INT_R"
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    "INT_R_X17Y249": {
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        },
        "clock_region": "X0Y4",
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            "TIEOFF_X19Y249": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00440980",
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X19Y1": {
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        "type": "INT_R"
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X19Y3": {
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                "baseaddr": "0x00440980",
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X19Y4": {
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                "baseaddr": "0x00440980",
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                "words": 2
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X19Y5": {
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X19Y6": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X19Y7": {
        "bits": {
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                "baseaddr": "0x00440980",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X21Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y8": {
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                "baseaddr": "0x00440980",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y8": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y9": {
        "bits": {
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                "baseaddr": "0x00440980",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X21Y9": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X19Y10": {
        "bits": {
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                "baseaddr": "0x00440980",
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        "type": "INT_R"
    },
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                "baseaddr": "0x00420980",
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                "words": 2
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        "type": "INT_R"
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            "TIEOFF_X23Y8": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00440A80",
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    "INT_R_X21Y203": {
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    "INT_R_X21Y204": {
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    "INT_R_X21Y205": {
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    "INT_R_X21Y206": {
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    "INT_R_X21Y207": {
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        "type": "INT_R"
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        "type": "INT_R"
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            "TIEOFF_X23Y209": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y210": {
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                "baseaddr": "0x00020A80",
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        "type": "INT_R"
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            "TIEOFF_X23Y211": "TIEOFF"
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    "INT_R_X21Y241": {
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    "INT_R_X21Y243": {
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    "INT_R_X21Y245": {
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    "INT_R_X21Y246": {
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    "INT_R_X21Y247": {
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    "INT_R_X21Y248": {
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    "INT_R_X21Y249": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X23Y2": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X23Y4": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X23Y6": {
        "bits": {
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                "baseaddr": "0x00440B80",
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                "baseaddr": "0x00420B80",
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    "INT_R_X23Y202": {
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    "INT_R_X23Y203": {
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    "INT_R_X23Y204": {
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            "TIEOFF_X25Y204": "TIEOFF"
        },
        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020B80",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X25Y205": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y206": {
        "bits": {
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                "baseaddr": "0x00020B80",
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            "TIEOFF_X25Y206": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y207": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020B80",
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            "TIEOFF_X25Y207": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y208": {
        "bits": {
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                "baseaddr": "0x00020B80",
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            "TIEOFF_X25Y208": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y209": {
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                "baseaddr": "0x00020B80",
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            "TIEOFF_X25Y209": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y210": {
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                "baseaddr": "0x00020B80",
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            "TIEOFF_X25Y210": "TIEOFF"
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            "TIEOFF_X25Y211": "TIEOFF"
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    "INT_R_X23Y213": {
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            "TIEOFF_X25Y213": "TIEOFF"
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            "TIEOFF_X25Y214": "TIEOFF"
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    "INT_R_X23Y238": {
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            "TIEOFF_X25Y238": "TIEOFF"
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    "INT_R_X23Y239": {
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    "INT_R_X23Y240": {
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    "INT_R_X23Y241": {
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    "INT_R_X23Y242": {
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    "INT_R_X23Y243": {
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    "INT_R_X23Y244": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X23Y245": {
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        "type": "INT_R"
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    "INT_R_X23Y246": {
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        "type": "INT_R"
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    "INT_R_X23Y247": {
        "bits": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X23Y248": {
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        },
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            "TIEOFF_X25Y248": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y249": {
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                "words": 2
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        },
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            "TIEOFF_X25Y249": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y0": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00440C80",
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X27Y0": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y1": {
        "bits": {
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                "baseaddr": "0x00440C80",
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                "words": 2
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            "TIEOFF_X27Y1": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y2": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X27Y2": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y3": {
        "bits": {
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                "baseaddr": "0x00440C80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "grid_y": 256,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y3": "TIEOFF"
        },
        "type": "INT_R"
    },
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            "TIEOFF_X27Y4": "TIEOFF"
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                "baseaddr": "0x00440C80",
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    "INT_R_X25Y53": {
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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                "offset": 2,
                "words": 2
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        },
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        "grid_x": 65,
        "grid_y": 50,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y201": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y202": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X27Y202": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y203": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
                "frames": 28,
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        "pin_functions": {},
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            "TIEOFF_X27Y203": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y204": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
                "frames": 28,
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        "pin_functions": {},
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            "TIEOFF_X27Y204": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y205": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
                "frames": 28,
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            "TIEOFF_X27Y205": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X25Y206": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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            "TIEOFF_X27Y206": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y207": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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            "TIEOFF_X27Y207": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y208": {
        "bits": {
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                "baseaddr": "0x00020C80",
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            "TIEOFF_X27Y208": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y209": {
        "bits": {
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                "baseaddr": "0x00020C80",
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            "TIEOFF_X27Y209": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y210": {
        "bits": {
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                "baseaddr": "0x00020C80",
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            "TIEOFF_X27Y210": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y211": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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            "TIEOFF_X27Y211": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y212": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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            "TIEOFF_X27Y212": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y213": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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            "TIEOFF_X27Y213": "TIEOFF"
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    },
    "INT_R_X25Y214": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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            "TIEOFF_X27Y214": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00020C80",
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            "TIEOFF_X27Y215": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y217": {
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                "baseaddr": "0x00020C80",
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            "TIEOFF_X27Y217": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y218": {
        "bits": {
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                "baseaddr": "0x00020C80",
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            "TIEOFF_X27Y218": "TIEOFF"
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    "INT_R_X25Y219": {
        "bits": {
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            "TIEOFF_X27Y219": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y220": {
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            "TIEOFF_X27Y220": "TIEOFF"
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    "INT_R_X25Y222": {
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    "INT_R_X25Y223": {
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    "INT_R_X25Y225": {
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    "INT_R_X25Y226": {
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    "INT_R_X25Y228": {
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    "INT_R_X25Y229": {
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            "TIEOFF_X27Y229": "TIEOFF"
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    "INT_R_X25Y232": {
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            "TIEOFF_X27Y232": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y233": {
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                "words": 2
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            "TIEOFF_X27Y233": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y234": {
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                "words": 2
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        },
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            "TIEOFF_X27Y234": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y235": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y4",
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            "TIEOFF_X27Y235": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y236": {
        "bits": {
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                "words": 2
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            "TIEOFF_X27Y236": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y237": {
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                "words": 2
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            "TIEOFF_X27Y237": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y238": {
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                "words": 2
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            "TIEOFF_X27Y238": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y239": {
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                "words": 2
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            "TIEOFF_X27Y239": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y240": {
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                "words": 2
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        "clock_region": "X0Y4",
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        "type": "INT_R"
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    "INT_R_X25Y241": {
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                "words": 2
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        "clock_region": "X0Y4",
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        "type": "INT_R"
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    "INT_R_X25Y242": {
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                "baseaddr": "0x00020C80",
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                "words": 2
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        },
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            "TIEOFF_X27Y242": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y243": {
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                "baseaddr": "0x00020C80",
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                "words": 2
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        },
        "clock_region": "X0Y4",
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            "TIEOFF_X27Y243": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y244": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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                "words": 2
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        },
        "clock_region": "X0Y4",
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            "TIEOFF_X27Y244": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y245": {
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                "baseaddr": "0x00020C80",
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                "offset": 91,
                "words": 2
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        },
        "clock_region": "X0Y4",
        "grid_x": 65,
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        "pin_functions": {},
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            "TIEOFF_X27Y245": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y246": {
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                "offset": 93,
                "words": 2
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        },
        "clock_region": "X0Y4",
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        "sites": {
            "TIEOFF_X27Y246": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y247": {
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                "baseaddr": "0x00020C80",
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                "offset": 95,
                "words": 2
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        },
        "clock_region": "X0Y4",
        "grid_x": 65,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y247": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y248": {
        "bits": {
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                "baseaddr": "0x00020C80",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
        "clock_region": "X0Y4",
        "grid_x": 65,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y248": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y249": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C80",
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                "offset": 99,
                "words": 2
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        },
        "clock_region": "X0Y4",
        "grid_x": 65,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X27Y249": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X27Y0": {
        "bits": {
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        "type": "INT_R"
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X29Y197": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y198": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000D80",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X29Y198": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y199": {
        "bits": {
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                "baseaddr": "0x00000D80",
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            "TIEOFF_X29Y199": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y225": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X29Y225": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y226": {
        "bits": {
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            "TIEOFF_X29Y226": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y227": {
        "bits": {
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            "TIEOFF_X29Y227": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X27Y228": {
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            "TIEOFF_X29Y228": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X29Y229": "TIEOFF"
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    "INT_R_X27Y230": {
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            "TIEOFF_X29Y230": "TIEOFF"
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            "TIEOFF_X29Y231": "TIEOFF"
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            "TIEOFF_X29Y232": "TIEOFF"
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    "INT_R_X27Y235": {
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    "INT_R_X27Y237": {
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        "clock_region": "X0Y0",
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            "TIEOFF_X31Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y8": {
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            "TIEOFF_X31Y8": "TIEOFF"
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        "type": "INT_R"
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        "clock_region": "X0Y0",
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                "words": 2
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                "words": 2
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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                "words": 2
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X31Y13": "TIEOFF"
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        "type": "INT_R"
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        "clock_region": "X0Y0",
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            "TIEOFF_X31Y14": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y15": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X31Y15": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y16": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X31Y16": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y17": {
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                "baseaddr": "0x00440E80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X31Y17": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y18": {
        "bits": {
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                "baseaddr": "0x00440E80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X31Y18": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y19": {
        "bits": {
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                "baseaddr": "0x00440E80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y19": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y20": {
        "bits": {
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                "baseaddr": "0x00440E80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 74,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y20": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440E80",
                "frames": 28,
                "offset": 42,
                "words": 2
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        "type": "INT_R"
    },
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    "INT_R_X29Y166": {
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    "INT_R_X29Y167": {
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    "INT_R_X29Y168": {
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        "type": "INT_R"
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    "INT_R_X29Y169": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X31Y218": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X29Y219": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X31Y219": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y220": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
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            "TIEOFF_X31Y220": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y221": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
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            "TIEOFF_X31Y221": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y222": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
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            "TIEOFF_X31Y222": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y223": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
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            "TIEOFF_X31Y223": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y224": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
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            "TIEOFF_X31Y224": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y225": {
        "bits": {
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                "baseaddr": "0x00020E80",
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            "TIEOFF_X31Y225": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y226": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
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            "TIEOFF_X31Y226": "TIEOFF"
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    "INT_R_X29Y227": {
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                "baseaddr": "0x00020E80",
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            "TIEOFF_X31Y227": "TIEOFF"
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    "INT_R_X29Y228": {
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                "baseaddr": "0x00020E80",
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            "TIEOFF_X31Y228": "TIEOFF"
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    "INT_R_X29Y229": {
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                "baseaddr": "0x00020E80",
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            "TIEOFF_X31Y229": "TIEOFF"
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            "TIEOFF_X31Y230": "TIEOFF"
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                "baseaddr": "0x00020E80",
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            "TIEOFF_X31Y231": "TIEOFF"
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            "TIEOFF_X31Y232": "TIEOFF"
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    "INT_R_X29Y233": {
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    "INT_R_X29Y235": {
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    "INT_R_X29Y236": {
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    "INT_R_X29Y237": {
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            "TIEOFF_X31Y237": "TIEOFF"
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    "INT_R_X29Y238": {
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    "INT_R_X29Y239": {
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    "INT_R_X29Y240": {
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    "INT_R_X29Y241": {
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    "INT_R_X29Y245": {
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    "INT_R_X29Y247": {
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    "INT_R_X29Y248": {
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    "INT_R_X29Y249": {
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        "type": "INT_R"
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    "INT_R_X31Y2": {
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                "words": 2
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        "type": "INT_R"
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                "words": 2
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            "TIEOFF_X33Y3": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y4": {
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        "clock_region": "X0Y0",
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            "TIEOFF_X33Y4": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y5": {
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                "words": 2
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        "type": "INT_R"
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X31Y7": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X33Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y8": {
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                "words": 2
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        "clock_region": "X0Y0",
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            "TIEOFF_X33Y8": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y9": {
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                "baseaddr": "0x00440F80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X33Y9": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00440F80",
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                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X33Y10": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y11": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X33Y11": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y12": {
        "bits": {
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                "baseaddr": "0x00440F80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X33Y12": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y13": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y14": {
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                "baseaddr": "0x00440F80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X33Y14": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y15": {
        "bits": {
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                "baseaddr": "0x00440F80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y15": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y16": {
        "bits": {
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                "baseaddr": "0x00440F80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y16": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X31Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440F80",
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                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 79,
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        "type": "INT_R"
    },
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                "baseaddr": "0x00440F80",
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        "bits": {
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                "baseaddr": "0x00420F80",
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            "TIEOFF_X33Y67": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
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            "TIEOFF_X33Y68": "TIEOFF"
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    "INT_R_X31Y69": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
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            "TIEOFF_X33Y69": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X33Y70": "TIEOFF"
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                "baseaddr": "0x00420F80",
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    "INT_R_X31Y72": {
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                "baseaddr": "0x00420F80",
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    "INT_R_X31Y73": {
        "bits": {
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    "INT_R_X31Y102": {
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    "INT_R_X31Y103": {
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    "INT_R_X31Y104": {
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    "INT_R_X31Y105": {
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    "INT_R_X31Y106": {
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    "INT_R_X31Y108": {
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        "type": "INT_R"
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    "INT_R_X31Y109": {
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    "INT_R_X31Y110": {
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    "INT_R_X31Y111": {
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        "pin_functions": {},
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    "INT_R_X31Y112": {
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        "pin_functions": {},
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            "TIEOFF_X33Y112": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y113": {
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X31Y114": {
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        },
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X31Y115": {
        "bits": {
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        },
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        "pin_functions": {},
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            "TIEOFF_X33Y115": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y116": {
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            "TIEOFF_X33Y214": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y215": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
                "frames": 28,
                "offset": 30,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X33Y215": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y216": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
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            "TIEOFF_X33Y216": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y217": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
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            "TIEOFF_X33Y217": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y218": {
        "bits": {
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                "baseaddr": "0x00020F80",
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            "TIEOFF_X33Y218": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y219": {
        "bits": {
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                "baseaddr": "0x00020F80",
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            "TIEOFF_X33Y219": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y220": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X33Y220": "TIEOFF"
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    "INT_R_X31Y221": {
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    "INT_R_X31Y222": {
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    "INT_R_X31Y223": {
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    "INT_R_X31Y248": {
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    "INT_R_X31Y249": {
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                "words": 2
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                "baseaddr": "0x00441080",
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        },
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    "INT_R_X33Y1": {
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        "type": "INT_R"
    },
    "INT_R_X33Y2": {
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                "baseaddr": "0x00441080",
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                "words": 2
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        "type": "INT_R"
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                "words": 2
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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                "baseaddr": "0x00441080",
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X33Y5": {
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                "baseaddr": "0x00441080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
    },
    "INT_R_X33Y6": {
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                "baseaddr": "0x00441080",
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                "offset": 12,
                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X36Y6": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y7": {
        "bits": {
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                "baseaddr": "0x00441080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y7": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y8": {
        "bits": {
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                "baseaddr": "0x00441080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "sites": {
            "TIEOFF_X36Y8": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y9": {
        "bits": {
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                "baseaddr": "0x00441080",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y9": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y10": {
        "bits": {
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                "baseaddr": "0x00441080",
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                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y10": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y11": {
        "bits": {
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                "baseaddr": "0x00441080",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y11": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y12": {
        "bits": {
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                "baseaddr": "0x00441080",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y12": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00441080",
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                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X36Y13": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X33Y14": {
        "bits": {
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        "bits": {
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                "baseaddr": "0x00421080",
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                "baseaddr": "0x00421080",
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                "baseaddr": "0x00421080",
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                "baseaddr": "0x00421080",
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    "INT_R_X33Y108": {
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    "INT_R_X33Y112": {
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    "INT_R_X33Y113": {
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00021080",
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    "INT_R_X33Y216": {
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    "INT_R_X37Y158": {
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        "type": "INT_R"
    },
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                "baseaddr": "0x00421480",
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        "type": "INT_R"
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        "type": "INT_R"
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        "clock_region": "X0Y2",
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    "INT_R_X41Y102": {
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    "INT_R_X41Y103": {
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    "INT_R_X41Y104": {
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        "type": "INT_R"
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    "INT_R_X41Y105": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 10,
                "words": 2
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        },
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            "TIEOFF_X44Y105": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401480",
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                "words": 2
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        },
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        "type": "INT_R"
    },
    "INT_R_X41Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401480",
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        },
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            "TIEOFF_X44Y107": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X41Y108": {
        "bits": {
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        },
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            "TIEOFF_X44Y108": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X41Y109": {
        "bits": {
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        },
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            "TIEOFF_X44Y109": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X41Y110": {
        "bits": {
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                "baseaddr": "0x00401480",
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            "TIEOFF_X44Y110": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
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            "TIEOFF_X44Y111": "TIEOFF"
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    "INT_R_X41Y112": {
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    "INT_R_X41Y118": {
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    "INT_R_X41Y126": {
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    "INT_R_X41Y129": {
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    "INT_R_X41Y132": {
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    "INT_R_X41Y137": {
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    "INT_R_X41Y140": {
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    "INT_R_X41Y142": {
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    "INT_R_X41Y144": {
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    "INT_R_X41Y145": {
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    "INT_R_X41Y146": {
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    "INT_R_X41Y147": {
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    "INT_R_X41Y148": {
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    "INT_R_X41Y149": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X41Y152": {
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        "type": "INT_R"
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    "INT_R_X41Y153": {
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        "type": "INT_R"
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    "INT_R_X41Y154": {
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    "INT_R_X43Y103": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00421680",
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421680",
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00421680",
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X45Y57": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X45Y87": {
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    "INT_R_X45Y88": {
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    "INT_R_X45Y89": {
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    "INT_R_X45Y90": {
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    "INT_R_X45Y91": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X45Y93": {
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    "INT_R_X45Y95": {
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    "INT_R_X45Y96": {
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    "INT_R_X45Y97": {
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        "type": "INT_R"
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    "INT_R_X45Y98": {
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            "TIEOFF_X49Y98": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X45Y99": {
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        "type": "INT_R"
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    "INT_R_X45Y100": {
        "bits": {
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X49Y100": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X45Y101": {
        "bits": {
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00001680",
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        "bits": {
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00401780",
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        },
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        "type": "INT_R"
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    "INT_R_X47Y102": {
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        "bits": {
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                "baseaddr": "0x00001780",
                "frames": 28,
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            "CLB_IO_CLK": {
                "baseaddr": "0x00421980",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X56Y96": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X51Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421980",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X56Y97": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X51Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421980",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X56Y98": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X51Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421980",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X56Y99": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X51Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401980",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X56Y100": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X51Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401980",
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                "offset": 2,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X56Y101": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X51Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401980",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X56Y102": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X51Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401980",
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        },
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            "TIEOFF_X56Y103": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00401980",
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        },
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            "TIEOFF_X56Y104": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401980",
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                "words": 2
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        },
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            "TIEOFF_X56Y105": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X51Y106": {
        "bits": {
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                "baseaddr": "0x00401980",
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        },
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            "TIEOFF_X56Y106": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
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            "TIEOFF_X56Y107": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X51Y108": {
        "bits": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
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            "TIEOFF_X56Y108": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X51Y109": {
        "bits": {
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                "baseaddr": "0x00401980",
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        },
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            "TIEOFF_X56Y109": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X51Y110": {
        "bits": {
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                "baseaddr": "0x00401980",
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        },
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            "TIEOFF_X56Y110": "TIEOFF"
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        "type": "INT_R"
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        },
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            "TIEOFF_X56Y111": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X51Y112": {
        "bits": {
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                "baseaddr": "0x00401980",
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        },
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            "TIEOFF_X56Y112": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X51Y113": {
        "bits": {
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        },
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            "TIEOFF_X56Y113": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X51Y114": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
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            "TIEOFF_X56Y114": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X51Y115": {
        "bits": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X51Y116": {
        "bits": {
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        },
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            "TIEOFF_X56Y116": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X51Y117": {
        "bits": {
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        },
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    "INT_R_X51Y118": {
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        },
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    "INT_R_X51Y119": {
        "bits": {
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        },
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    "INT_R_X51Y120": {
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    "INT_R_X51Y121": {
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    "INT_R_X51Y122": {
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    "INT_R_X51Y123": {
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        "type": "INT_R"
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    "INT_R_X51Y124": {
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        "type": "INT_R"
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    "INT_R_X51Y125": {
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    "INT_R_X51Y126": {
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            "TIEOFF_X56Y126": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X51Y127": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X56Y127": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X51Y128": {
        "bits": {
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                "baseaddr": "0x00401980",
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X56Y128": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X51Y129": {
        "bits": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X56Y129": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X51Y130": {
        "bits": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        "clock_region": "X0Y2",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X51Y131": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X56Y131": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X51Y132": {
        "bits": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
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            "TIEOFF_X56Y132": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X51Y133": {
        "bits": {
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                "offset": 67,
                "words": 2
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X56Y133": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X51Y134": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X56Y134": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X51Y135": {
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                "offset": 71,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X51Y136": {
        "bits": {
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                "offset": 73,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X56Y136": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X51Y137": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X51Y138": {
        "bits": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X56Y138": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X51Y139": {
        "bits": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X51Y140": {
        "bits": {
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                "baseaddr": "0x00401980",
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        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X56Y140": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X51Y141": {
        "bits": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X56Y141": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X51Y142": {
        "bits": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
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        "type": "INT_R"
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    "INT_R_X51Y143": {
        "bits": {
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X56Y143": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X51Y144": {
        "bits": {
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                "baseaddr": "0x00401980",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X56Y144": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X51Y145": {
        "bits": {
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                "words": 2
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        },
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001980",
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        "sites": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X55Y42": {
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421E80",
                "frames": 28,
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        "type": "INT_R"
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    "INT_R_X61Y87": {
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    "INT_R_X61Y88": {
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    "INT_R_X61Y118": {
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    "INT_R_X61Y121": {
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    "INT_R_X61Y123": {
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    "INT_R_X61Y125": {
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    "INT_R_X61Y129": {
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    "INT_R_X61Y131": {
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    "INT_R_X61Y132": {
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    "INT_R_X61Y133": {
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        "type": "INT_R"
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    "INT_R_X61Y184": {
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        "type": "INT_R"
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    "INT_R_X61Y186": {
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    "INT_R_X61Y187": {
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    "INT_R_X61Y188": {
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    "INT_R_X61Y189": {
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    "INT_R_X63Y73": {
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    "INT_R_X63Y74": {
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    "INT_R_X63Y75": {
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    "INT_R_X63Y76": {
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    "INT_R_X63Y77": {
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    "INT_R_X63Y78": {
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    "INT_R_X63Y79": {
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    "INT_R_X63Y81": {
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        "type": "INT_R"
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    "INT_R_X63Y82": {
        "bits": {
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00422180",
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    "INT_R_X67Y126": {
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                "baseaddr": "0x00422280",
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                "words": 2
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        },
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            "TIEOFF_X76Y77": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X69Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422280",
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                "words": 2
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        },
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            "TIEOFF_X76Y78": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X69Y79": {
        "bits": {
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                "baseaddr": "0x00422280",
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        },
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            "TIEOFF_X76Y79": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X69Y80": {
        "bits": {
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                "baseaddr": "0x00422280",
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        },
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            "TIEOFF_X76Y80": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X69Y81": {
        "bits": {
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                "baseaddr": "0x00422280",
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            "TIEOFF_X76Y81": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X69Y82": {
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        },
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    "INT_R_X69Y83": {
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    "INT_R_X69Y106": {
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    "INT_R_X69Y108": {
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    "INT_R_X69Y109": {
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    "INT_R_X69Y110": {
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    "INT_R_X69Y111": {
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    "INT_R_X69Y112": {
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    "INT_R_X69Y113": {
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    "INT_R_X69Y116": {
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    "INT_R_X69Y117": {
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    "INT_R_X69Y118": {
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    "INT_R_X69Y120": {
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    "INT_R_X69Y121": {
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    "INT_R_X69Y122": {
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    "INT_R_X69Y123": {
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    "INT_R_X69Y124": {
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    "INT_R_X69Y125": {
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    "INT_R_X69Y126": {
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        "bits": {
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                "baseaddr": "0x00002280",
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                "words": 2
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        },
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        "type": "INT_R"
    },
    "INT_R_X69Y177": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002280",
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X69Y178": {
        "bits": {
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        },
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        "type": "INT_R"
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    "INT_R_X69Y179": {
        "bits": {
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        },
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            "TIEOFF_X76Y179": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X69Y180": {
        "bits": {
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        },
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        "type": "INT_R"
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    "INT_R_X69Y181": {
        "bits": {
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                "baseaddr": "0x00002280",
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    "INT_R_X69Y182": {
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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    "INT_R_X71Y66": {
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        "type": "INT_R"
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        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X71Y68": {
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        "type": "INT_R"
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    "INT_R_X71Y69": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X71Y71": {
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        "type": "INT_R"
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    "INT_R_X71Y72": {
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        },
        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X71Y73": {
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        },
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        "type": "INT_R"
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    "INT_R_X71Y74": {
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        },
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        "sites": {
            "TIEOFF_X78Y74": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y75": {
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X78Y75": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
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            "TIEOFF_X78Y76": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X71Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
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        },
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            "TIEOFF_X78Y77": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
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                "words": 2
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        },
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            "TIEOFF_X78Y78": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y79": {
        "bits": {
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                "baseaddr": "0x00422380",
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        },
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            "TIEOFF_X78Y79": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X71Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422380",
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                "words": 2
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        },
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            "TIEOFF_X78Y80": "TIEOFF"
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    "INT_R_X71Y81": {
        "bits": {
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                "baseaddr": "0x00422380",
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            "TIEOFF_X78Y81": "TIEOFF"
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    "INT_R_X71Y82": {
        "bits": {
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                "baseaddr": "0x00422380",
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        },
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            "TIEOFF_X78Y82": "TIEOFF"
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    "INT_R_X71Y83": {
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            "TIEOFF_X78Y83": "TIEOFF"
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                "baseaddr": "0x00422380",
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            "TIEOFF_X78Y85": "TIEOFF"
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    "INT_R_X71Y102": {
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    "INT_R_X71Y106": {
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    "INT_R_X71Y108": {
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    "INT_R_X71Y109": {
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    "INT_R_X71Y110": {
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        "clock_region": "X1Y2",
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    "INT_R_X71Y112": {
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    "INT_R_X71Y113": {
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    "INT_R_X71Y114": {
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        "clock_region": "X1Y2",
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    "INT_R_X71Y115": {
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        "clock_region": "X1Y2",
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    "INT_R_X71Y116": {
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        "clock_region": "X1Y2",
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    "INT_R_X71Y117": {
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    "INT_R_X71Y118": {
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    "INT_R_X71Y119": {
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    "INT_R_X71Y120": {
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        "type": "INT_R"
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    "INT_R_X71Y121": {
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    "INT_R_X71Y122": {
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        },
        "clock_region": "X1Y2",
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        "type": "INT_R"
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    "INT_R_X71Y123": {
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        },
        "clock_region": "X1Y2",
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        "type": "INT_R"
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    "INT_R_X71Y124": {
        "bits": {
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        },
        "clock_region": "X1Y2",
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        "type": "INT_R"
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    "INT_R_X71Y125": {
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        "type": "INT_R"
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    "INT_R_X71Y126": {
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    "INT_R_X71Y129": {
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    "INT_R_X71Y130": {
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422480",
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                "words": 2
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    "INT_R_X73Y75": {
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    "INT_R_X73Y115": {
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    "INT_R_X73Y116": {
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    "INT_R_X73Y117": {
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    "INT_R_X73Y118": {
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    "INT_R_X73Y121": {
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    "INT_R_X73Y122": {
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        "type": "INT_R"
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    "INT_R_X73Y123": {
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        "type": "INT_R"
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                "words": 2
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    "INT_R_X75Y118": {
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            "TIEOFF_X82Y219": "TIEOFF"
        },
        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022580",
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            "TIEOFF_X82Y220": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X75Y221": {
        "bits": {
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                "baseaddr": "0x00022580",
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        },
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    "INT_R_X75Y222": {
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                "baseaddr": "0x00022580",
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            "TIEOFF_X82Y222": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X75Y223": {
        "bits": {
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                "baseaddr": "0x00022580",
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        },
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            "TIEOFF_X82Y223": "TIEOFF"
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    "INT_R_X75Y224": {
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                "baseaddr": "0x00022580",
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            "TIEOFF_X82Y224": "TIEOFF"
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    "INT_R_X75Y225": {
        "bits": {
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                "baseaddr": "0x00022580",
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        "clock_region": "X1Y0",
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        "clock_region": "X1Y0",
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        "clock_region": "X1Y0",
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                "words": 2
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        "clock_region": "X1Y0",
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                "baseaddr": "0x00442680",
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        "type": "INT_R"
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                "baseaddr": "0x00442680",
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                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X77Y14": {
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                "baseaddr": "0x00442680",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X84Y14": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X77Y15": {
        "bits": {
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                "baseaddr": "0x00442680",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X84Y15": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X77Y16": {
        "bits": {
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                "baseaddr": "0x00442680",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X84Y16": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X77Y17": {
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                "baseaddr": "0x00442680",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X84Y17": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X77Y18": {
        "bits": {
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                "baseaddr": "0x00442680",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X84Y18": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X77Y19": {
        "bits": {
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        "sites": {
            "TIEOFF_X84Y19": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442680",
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                "words": 2
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                "baseaddr": "0x00442680",
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            "TIEOFF_X84Y21": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00442680",
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            "TIEOFF_X84Y22": "TIEOFF"
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            "TIEOFF_X84Y23": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00442680",
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        "type": "INT_R"
    },
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            "CLB_IO_CLK": {
                "baseaddr": "0x00422680",
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                "offset": 38,
                "words": 2
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                "baseaddr": "0x00422680",
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    "INT_R_X77Y112": {
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    "INT_R_X77Y113": {
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    "INT_R_X77Y114": {
        "bits": {
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                "baseaddr": "0x00402680",
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        "type": "INT_R"
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    "INT_R_X77Y115": {
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                "baseaddr": "0x00402680",
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    "INT_R_X77Y116": {
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                "baseaddr": "0x00402680",
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        "clock_region": "X1Y2",
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        "type": "INT_R"
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    "INT_R_X77Y117": {
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                "baseaddr": "0x00402680",
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        "type": "INT_R"
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    "INT_R_X77Y118": {
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022680",
                "frames": 28,
                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y4",
        "grid_x": 192,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X84Y217": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X77Y218": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022680",
                "frames": 28,
                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X84Y218": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X77Y219": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022680",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X84Y219": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X77Y220": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022680",
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                "offset": 40,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X84Y220": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X77Y221": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022680",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X84Y221": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X77Y222": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022680",
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                "offset": 44,
                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X84Y222": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X77Y223": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022680",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X1Y4",
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        "pin_functions": {},
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            "TIEOFF_X84Y223": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X77Y224": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022680",
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                "offset": 48,
                "words": 2
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        },
        "clock_region": "X1Y4",
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            "TIEOFF_X84Y224": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X77Y225": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022680",
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                "words": 2
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        },
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            "TIEOFF_X84Y225": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X77Y226": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022680",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X1Y4",
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            "TIEOFF_X84Y226": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X77Y227": {
        "bits": {
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                "baseaddr": "0x00022680",
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                "words": 2
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        },
        "clock_region": "X1Y4",
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            "TIEOFF_X84Y227": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X77Y228": {
        "bits": {
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                "baseaddr": "0x00022680",
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                "offset": 57,
                "words": 2
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        },
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            "TIEOFF_X84Y228": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X77Y229": {
        "bits": {
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                "baseaddr": "0x00022680",
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                "words": 2
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        },
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            "TIEOFF_X84Y229": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X77Y230": {
        "bits": {
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                "baseaddr": "0x00022680",
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                "words": 2
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        },
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            "TIEOFF_X84Y230": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X77Y231": {
        "bits": {
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                "baseaddr": "0x00022680",
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                "words": 2
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        },
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            "TIEOFF_X84Y231": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X77Y232": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022680",
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                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y4",
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            "TIEOFF_X84Y232": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X77Y233": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022680",
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                "words": 2
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        },
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            "TIEOFF_X84Y233": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X77Y234": {
        "bits": {
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                "baseaddr": "0x00022680",
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                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y4",
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            "TIEOFF_X84Y234": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X77Y235": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X84Y235": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X77Y236": {
        "bits": {
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        },
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            "TIEOFF_X84Y236": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X77Y237": {
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                "words": 2
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        },
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            "TIEOFF_X84Y237": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X77Y238": {
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                "words": 2
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        },
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            "TIEOFF_X84Y238": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X77Y239": {
        "bits": {
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                "words": 2
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        },
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    "INT_R_X77Y240": {
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                "words": 2
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        "clock_region": "X1Y4",
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            "TIEOFF_X84Y240": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X77Y241": {
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    "INT_R_X77Y242": {
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        "clock_region": "X1Y4",
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            "TIEOFF_X84Y242": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X77Y243": {
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                "words": 2
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        },
        "clock_region": "X1Y4",
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            "TIEOFF_X84Y243": "TIEOFF"
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    "INT_R_X77Y244": {
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        },
        "clock_region": "X1Y4",
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        "type": "INT_R"
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    "INT_R_X77Y245": {
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        },
        "clock_region": "X1Y4",
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            "TIEOFF_X84Y245": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X77Y246": {
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        },
        "clock_region": "X1Y4",
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            "TIEOFF_X84Y246": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X77Y247": {
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                "words": 2
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        },
        "clock_region": "X1Y4",
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            "TIEOFF_X84Y247": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X77Y248": {
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                "baseaddr": "0x00022680",
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                "words": 2
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        },
        "clock_region": "X1Y4",
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            "TIEOFF_X84Y248": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X77Y249": {
        "bits": {
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                "baseaddr": "0x00022680",
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                "words": 2
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        },
        "clock_region": "X1Y4",
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        "sites": {
            "TIEOFF_X84Y249": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X79Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442780",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X86Y0": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X79Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442780",
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                "offset": 2,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X86Y1": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X79Y2": {
        "bits": {
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                "baseaddr": "0x00442780",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X86Y2": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X79Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442780",
                "frames": 28,
                "offset": 6,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X86Y3": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X79Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442780",
                "frames": 28,
                "offset": 8,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X86Y4": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X79Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442780",
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                "offset": 10,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X86Y5": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X79Y6": {
        "bits": {
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                "baseaddr": "0x00442780",
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                "offset": 12,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X86Y6": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442780",
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X86Y7": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X79Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442780",
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                "offset": 16,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X86Y8": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442780",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 196,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X86Y9": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X79Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442780",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 196,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X86Y10": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X79Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442780",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 196,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X86Y11": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X79Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442780",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 196,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X86Y12": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X79Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442780",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X86Y13": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X79Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442780",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 196,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X86Y14": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X79Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442780",
                "frames": 28,
                "offset": 30,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 196,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X86Y15": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X79Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442780",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422780",
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                "offset": 32,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X86Y66": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X79Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422780",
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                "offset": 34,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X86Y67": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X79Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422780",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X86Y68": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X79Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422780",
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                "offset": 38,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X86Y69": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X79Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00422780",
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                "words": 2
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        },
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            "TIEOFF_X86Y70": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y71": {
        "bits": {
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                "baseaddr": "0x00422780",
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                "words": 2
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        },
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            "TIEOFF_X86Y71": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y72": {
        "bits": {
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                "baseaddr": "0x00422780",
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                "words": 2
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        },
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            "TIEOFF_X86Y72": "TIEOFF"
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    "INT_R_X79Y73": {
        "bits": {
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                "baseaddr": "0x00422780",
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            "TIEOFF_X86Y73": "TIEOFF"
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    "INT_R_X79Y74": {
        "bits": {
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                "baseaddr": "0x00422780",
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        },
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            "TIEOFF_X86Y74": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y75": {
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                "baseaddr": "0x00422780",
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            "TIEOFF_X86Y75": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y76": {
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                "baseaddr": "0x00422780",
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    "INT_R_X79Y77": {
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                "baseaddr": "0x00422780",
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                "baseaddr": "0x00422780",
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            "TIEOFF_X86Y78": "TIEOFF"
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                "baseaddr": "0x00422780",
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            "TIEOFF_X86Y79": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00422780",
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            "TIEOFF_X86Y81": "TIEOFF"
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    "INT_R_X79Y82": {
        "bits": {
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            "TIEOFF_X86Y82": "TIEOFF"
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    "INT_R_X79Y87": {
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    "INT_R_X79Y91": {
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    "INT_R_X79Y92": {
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    "INT_R_X79Y93": {
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    "INT_R_X79Y97": {
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    "INT_R_X79Y98": {
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                "baseaddr": "0x00422780",
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                "words": 2
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        "clock_region": "X1Y1",
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            "TIEOFF_X86Y98": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y99": {
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                "baseaddr": "0x00422780",
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                "offset": 99,
                "words": 2
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        "clock_region": "X1Y1",
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            "TIEOFF_X86Y99": "TIEOFF"
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    "INT_R_X79Y100": {
        "bits": {
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                "baseaddr": "0x00402780",
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                "offset": 0,
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        "clock_region": "X1Y2",
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            "TIEOFF_X86Y100": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y101": {
        "bits": {
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                "baseaddr": "0x00402780",
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                "offset": 2,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X86Y101": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y102": {
        "bits": {
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                "baseaddr": "0x00402780",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X86Y102": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y103": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00402780",
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        "clock_region": "X1Y2",
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            "TIEOFF_X86Y103": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y104": {
        "bits": {
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                "baseaddr": "0x00402780",
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                "words": 2
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        "clock_region": "X1Y2",
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            "TIEOFF_X86Y104": "TIEOFF"
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    "INT_R_X79Y105": {
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                "words": 2
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        "clock_region": "X1Y2",
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        "type": "INT_R"
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    "INT_R_X79Y106": {
        "bits": {
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                "baseaddr": "0x00402780",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X86Y106": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y107": {
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                "baseaddr": "0x00402780",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "type": "INT_R"
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    "INT_R_X79Y108": {
        "bits": {
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                "baseaddr": "0x00402780",
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                "words": 2
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        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X86Y108": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y109": {
        "bits": {
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                "baseaddr": "0x00402780",
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                "words": 2
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        "clock_region": "X1Y2",
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        "type": "INT_R"
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    "INT_R_X79Y110": {
        "bits": {
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                "baseaddr": "0x00402780",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X86Y110": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y111": {
        "bits": {
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                "baseaddr": "0x00402780",
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                "words": 2
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        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X86Y111": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y112": {
        "bits": {
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                "baseaddr": "0x00402780",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X86Y112": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y113": {
        "bits": {
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                "baseaddr": "0x00402780",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X86Y113": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402780",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X86Y114": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00402780",
                "frames": 28,
                "offset": 30,
                "words": 2
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                "baseaddr": "0x00002780",
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                "words": 2
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            "TIEOFF_X86Y165": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X79Y166": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00002780",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X86Y166": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y167": {
        "bits": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X79Y168": {
        "bits": {
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                "words": 2
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            "TIEOFF_X86Y168": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y169": {
        "bits": {
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                "baseaddr": "0x00002780",
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                "words": 2
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        },
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            "TIEOFF_X86Y169": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X79Y170": {
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            "TIEOFF_X86Y170": "TIEOFF"
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    "INT_R_X79Y171": {
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    "INT_R_X79Y172": {
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    "INT_R_X79Y196": {
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    "INT_R_X79Y197": {
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    "INT_R_X79Y199": {
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    "INT_R_X79Y200": {
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    "INT_R_X79Y201": {
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    "INT_R_X79Y203": {
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    "INT_R_X79Y204": {
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    "INT_R_X79Y205": {
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    "INT_R_X79Y206": {
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    "INT_R_X79Y208": {
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    "INT_R_X79Y209": {
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    "INT_R_X79Y210": {
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    "INT_R_X79Y211": {
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    "INT_R_X79Y212": {
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        "type": "INT_R"
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    "INT_R_X79Y213": {
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        "type": "INT_R"
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    "INT_R_X79Y214": {
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                "words": 2
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                "baseaddr": "0x00022780",
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        "type": "INT_R"
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                "baseaddr": "0x00422880",
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    "INT_R_X81Y109": {
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        "type": "INT_R"
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    "INT_R_X81Y116": {
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    "INT_R_X81Y162": {
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        },
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            "TIEOFF_X88Y212": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X81Y213": {
        "bits": {
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                "baseaddr": "0x00022880",
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        },
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            "TIEOFF_X88Y213": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X81Y214": {
        "bits": {
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                "baseaddr": "0x00022880",
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        "type": "INT_R"
    },
    "INT_R_X81Y215": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X81Y216": {
        "bits": {
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                "baseaddr": "0x00022880",
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            "TIEOFF_X88Y216": "TIEOFF"
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    "INT_R_X81Y217": {
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        "type": "INT_R"
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    "INT_R_X81Y218": {
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            "TIEOFF_X88Y218": "TIEOFF"
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    "INT_R_X81Y219": {
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            "TIEOFF_X88Y219": "TIEOFF"
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    "INT_R_X81Y244": {
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    "INT_R_X81Y245": {
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        "type": "INT_R"
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    "INT_R_X81Y246": {
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    "INT_R_X81Y247": {
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    "INT_R_X81Y248": {
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    "INT_R_X81Y249": {
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        "type": "INT_R"
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    "INT_R_X83Y0": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X83Y1": {
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    "INT_R_X83Y2": {
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        "type": "INT_R"
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    "INT_R_X83Y3": {
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    "INT_R_X83Y4": {
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                "baseaddr": "0x00442980",
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X90Y6": "TIEOFF"
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        "type": "INT_R"
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X90Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X83Y8": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X90Y8": "TIEOFF"
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        "type": "INT_R"
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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                "baseaddr": "0x00442980",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00442980",
                "frames": 28,
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                "words": 2
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    "INT_R_X87Y54": {
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            "TIEOFF_X96Y1": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X89Y50": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X89Y247": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022C80",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X96Y247": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X89Y248": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022C80",
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            "TIEOFF_X96Y248": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X89Y249": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00022C80",
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            "TIEOFF_X96Y249": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X91Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442D80",
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            "TIEOFF_X98Y0": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X91Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442D80",
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            "TIEOFF_X98Y1": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X91Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00442D80",
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            "TIEOFF_X98Y2": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X91Y3": {
        "bits": {
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                "baseaddr": "0x00442D80",
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            "TIEOFF_X98Y3": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X91Y4": {
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                "baseaddr": "0x00442D80",
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            "TIEOFF_X98Y4": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X91Y5": {
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                "baseaddr": "0x00442D80",
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            "TIEOFF_X98Y5": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X91Y6": {
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                "baseaddr": "0x00442D80",
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            "TIEOFF_X98Y6": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X91Y7": {
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                "baseaddr": "0x00442D80",
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            "TIEOFF_X98Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X91Y8": {
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            "TIEOFF_X98Y8": "TIEOFF"
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    "INT_R_X91Y9": {
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            "TIEOFF_X98Y9": "TIEOFF"
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            "TIEOFF_X98Y10": "TIEOFF"
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            "TIEOFF_X98Y15": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X91Y17": {
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        "type": "INT_R"
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    "INT_R_X91Y30": {
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        "type": "INT_R"
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    "INT_R_X91Y31": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X91Y32": {
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    "INT_R_X91Y33": {
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        "type": "INT_R"
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    "INT_R_X91Y34": {
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    "INT_R_X91Y35": {
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    "INT_R_X91Y36": {
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        "type": "INT_R"
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    "INT_R_X91Y37": {
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        "type": "INT_R"
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    "INT_R_X91Y38": {
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        "type": "INT_R"
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    "INT_R_X91Y39": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X91Y40": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X91Y41": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X91Y42": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X91Y43": {
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        "clock_region": "X1Y0",
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    "INT_R_X91Y44": {
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        "pin_functions": {},
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            "TIEOFF_X98Y44": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X91Y45": {
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        "pin_functions": {},
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        "type": "INT_R"
    },
    "INT_R_X91Y46": {
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        "type": "INT_R"
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                "baseaddr": "0x00002D80",
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    "INT_R_X95Y236": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X97Y34": {
        "bits": {
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                "baseaddr": "0x00443080",
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            "TIEOFF_X106Y83": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423080",
                "frames": 28,
                "offset": 69,
                "words": 2
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            "TIEOFF_X106Y84": "TIEOFF"
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    "INT_R_X97Y85": {
        "bits": {
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            "TIEOFF_X106Y86": "TIEOFF"
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    "INT_R_X97Y87": {
        "bits": {
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            "TIEOFF_X106Y87": "TIEOFF"
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    "INT_R_X97Y88": {
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                "baseaddr": "0x00423080",
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            "TIEOFF_X106Y88": "TIEOFF"
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    "INT_R_X97Y89": {
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            "TIEOFF_X106Y89": "TIEOFF"
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    "INT_R_X97Y91": {
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    "INT_R_X97Y117": {
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    "INT_R_X97Y118": {
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            "TIEOFF_X106Y118": "TIEOFF"
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    "INT_R_X97Y121": {
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    "INT_R_X97Y122": {
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    "INT_R_X97Y123": {
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        "type": "INT_R"
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    "INT_R_X97Y124": {
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        "type": "INT_R"
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    "INT_R_X97Y125": {
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        "type": "INT_R"
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    "INT_R_X97Y126": {
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        "type": "INT_R"
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    "INT_R_X97Y127": {
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        "type": "INT_R"
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    "INT_R_X97Y128": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X97Y129": {
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        "clock_region": "X1Y2",
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        "type": "INT_R"
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    "INT_R_X97Y130": {
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        "type": "INT_R"
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    "INT_R_X97Y131": {
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        "type": "INT_R"
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    "INT_R_X97Y132": {
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        "type": "INT_R"
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    "INT_R_X97Y133": {
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                "baseaddr": "0x00023080",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X106Y232": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X97Y233": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023080",
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                "words": 2
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        },
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        "sites": {
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        "type": "INT_R"
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    "INT_R_X97Y234": {
        "bits": {
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                "baseaddr": "0x00023080",
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X97Y235": {
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                "baseaddr": "0x00023080",
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        "type": "INT_R"
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    "INT_R_X97Y236": {
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    "INT_R_X97Y237": {
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    "INT_R_X99Y17": {
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                "words": 2
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        },
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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    "INT_R_X99Y31": {
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        },
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        },
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    "INT_R_X101Y26": {
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X101Y28": {
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        },
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        "type": "INT_R"
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    "INT_R_X103Y26": {
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                "words": 2
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        },
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            "TIEOFF_X112Y125": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X103Y126": {
        "bits": {
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                "baseaddr": "0x00403380",
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                "words": 2
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            "TIEOFF_X112Y126": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X103Y127": {
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                "baseaddr": "0x00403380",
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            "TIEOFF_X112Y127": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X103Y128": {
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    "INT_R_X103Y129": {
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        "type": "INT_R"
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    "INT_R_X103Y130": {
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    "INT_R_X103Y131": {
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    "INT_R_X103Y166": {
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    "INT_R_X103Y167": {
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    "INT_R_X103Y169": {
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    "INT_R_X103Y170": {
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    "INT_R_X103Y172": {
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    "INT_R_X103Y173": {
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    "INT_R_X103Y174": {
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        "bits": {
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                "baseaddr": "0x00023380",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X112Y224": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X103Y225": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023380",
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                "words": 2
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        },
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            "TIEOFF_X112Y225": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X103Y226": {
        "bits": {
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                "baseaddr": "0x00023380",
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                "words": 2
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        },
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            "TIEOFF_X112Y226": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X103Y227": {
        "bits": {
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                "baseaddr": "0x00023380",
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                "words": 2
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        },
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            "TIEOFF_X112Y227": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X103Y228": {
        "bits": {
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                "baseaddr": "0x00023380",
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                "words": 2
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        },
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            "TIEOFF_X112Y228": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X103Y229": {
        "bits": {
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                "baseaddr": "0x00023380",
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        },
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            "TIEOFF_X112Y229": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X103Y230": {
        "bits": {
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            "TIEOFF_X112Y230": "TIEOFF"
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    "INT_R_X103Y231": {
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        },
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            "TIEOFF_X112Y231": "TIEOFF"
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                "baseaddr": "0x00023380",
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            "TIEOFF_X112Y232": "TIEOFF"
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    "INT_R_X103Y233": {
        "bits": {
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                "baseaddr": "0x00023380",
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        "type": "INT_R"
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    "INT_R_X103Y234": {
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        "type": "INT_R"
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    "INT_R_X103Y235": {
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    "INT_R_X103Y241": {
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    "INT_R_X103Y242": {
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    "INT_R_X103Y243": {
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    "INT_R_X103Y248": {
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    "INT_R_X103Y249": {
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        "type": "INT_R"
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X105Y9": {
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                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X114Y9": "TIEOFF"
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                "words": 2
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                "words": 2
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        "clock_region": "X1Y0",
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                "baseaddr": "0x00443480",
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        "clock_region": "X1Y0",
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            "TIEOFF_X114Y12": "TIEOFF"
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                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X114Y13": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X105Y15": {
        "bits": {
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                "baseaddr": "0x00443480",
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                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X114Y15": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X105Y16": {
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                "baseaddr": "0x00443480",
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                "words": 2
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X105Y17": {
        "bits": {
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                "baseaddr": "0x00443480",
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                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X105Y18": {
        "bits": {
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                "baseaddr": "0x00443480",
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                "words": 2
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X105Y19": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X114Y19": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X105Y20": {
        "bits": {
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                "baseaddr": "0x00443480",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X114Y20": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X105Y21": {
        "bits": {
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                "baseaddr": "0x00443480",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X114Y21": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X105Y22": {
        "bits": {
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                "baseaddr": "0x00443480",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X114Y22": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X105Y23": {
        "bits": {
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                "baseaddr": "0x00443480",
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                "words": 2
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 252,
        "pin_functions": {
            "IOB_X0Y7": "IO_L21N_T3_DQS_12",
            "IOB_X0Y8": "IO_L21P_T3_DQS_12"
        },
        "sites": {
            "IOB_X0Y7": "IOB33S",
            "IOB_X0Y8": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 250,
        "pin_functions": {
            "IOB_X0Y9": "IO_L20N_T3_12",
            "IOB_X0Y10": "IO_L20P_T3_12"
        },
        "sites": {
            "IOB_X0Y9": "IOB33S",
            "IOB_X0Y10": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 248,
        "pin_functions": {
            "IOB_X0Y11": "IO_L19N_T3_VREF_12",
            "IOB_X0Y12": "IO_L19P_T3_12"
        },
        "sites": {
            "IOB_X0Y11": "IOB33S",
            "IOB_X0Y12": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 246,
        "pin_functions": {
            "IOB_X0Y13": "IO_L18N_T2_12",
            "IOB_X0Y14": "IO_L18P_T2_12"
        },
        "sites": {
            "IOB_X0Y13": "IOB33S",
            "IOB_X0Y14": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 244,
        "pin_functions": {
            "IOB_X0Y15": "IO_L17N_T2_12",
            "IOB_X0Y16": "IO_L17P_T2_12"
        },
        "sites": {
            "IOB_X0Y15": "IOB33S",
            "IOB_X0Y16": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 242,
        "pin_functions": {
            "IOB_X0Y17": "IO_L16N_T2_12",
            "IOB_X0Y18": "IO_L16P_T2_12"
        },
        "sites": {
            "IOB_X0Y17": "IOB33S",
            "IOB_X0Y18": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 240,
        "pin_functions": {
            "IOB_X0Y19": "IO_L15N_T2_DQS_12",
            "IOB_X0Y20": "IO_L15P_T2_DQS_12"
        },
        "sites": {
            "IOB_X0Y19": "IOB33S",
            "IOB_X0Y20": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 238,
        "pin_functions": {
            "IOB_X0Y21": "IO_L14N_T2_SRCC_12",
            "IOB_X0Y22": "IO_L14P_T2_SRCC_12"
        },
        "sites": {
            "IOB_X0Y21": "IOB33S",
            "IOB_X0Y22": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 236,
        "pin_functions": {
            "IOB_X0Y23": "IO_L13N_T2_MRCC_12",
            "IOB_X0Y24": "IO_L13P_T2_MRCC_12"
        },
        "sites": {
            "IOB_X0Y23": "IOB33S",
            "IOB_X0Y24": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 233,
        "pin_functions": {
            "IOB_X0Y25": "IO_L12N_T1_MRCC_12",
            "IOB_X0Y26": "IO_L12P_T1_MRCC_12"
        },
        "sites": {
            "IOB_X0Y25": "IOB33S",
            "IOB_X0Y26": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 231,
        "pin_functions": {
            "IOB_X0Y27": "IO_L11N_T1_SRCC_12",
            "IOB_X0Y28": "IO_L11P_T1_SRCC_12"
        },
        "sites": {
            "IOB_X0Y27": "IOB33S",
            "IOB_X0Y28": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 229,
        "pin_functions": {
            "IOB_X0Y29": "IO_L10N_T1_12",
            "IOB_X0Y30": "IO_L10P_T1_12"
        },
        "sites": {
            "IOB_X0Y29": "IOB33S",
            "IOB_X0Y30": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 227,
        "pin_functions": {
            "IOB_X0Y31": "IO_L9N_T1_DQS_12",
            "IOB_X0Y32": "IO_L9P_T1_DQS_12"
        },
        "sites": {
            "IOB_X0Y31": "IOB33S",
            "IOB_X0Y32": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 225,
        "pin_functions": {
            "IOB_X0Y33": "IO_L8N_T1_12",
            "IOB_X0Y34": "IO_L8P_T1_12"
        },
        "sites": {
            "IOB_X0Y33": "IOB33S",
            "IOB_X0Y34": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 223,
        "pin_functions": {
            "IOB_X0Y35": "IO_L7N_T1_12",
            "IOB_X0Y36": "IO_L7P_T1_12"
        },
        "sites": {
            "IOB_X0Y35": "IOB33S",
            "IOB_X0Y36": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 221,
        "pin_functions": {
            "IOB_X0Y37": "IO_L6N_T0_VREF_12",
            "IOB_X0Y38": "IO_L6P_T0_12"
        },
        "sites": {
            "IOB_X0Y37": "IOB33S",
            "IOB_X0Y38": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 219,
        "pin_functions": {
            "IOB_X0Y39": "IO_L5N_T0_12",
            "IOB_X0Y40": "IO_L5P_T0_12"
        },
        "sites": {
            "IOB_X0Y39": "IOB33S",
            "IOB_X0Y40": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 217,
        "pin_functions": {
            "IOB_X0Y41": "IO_L4N_T0_12",
            "IOB_X0Y42": "IO_L4P_T0_12"
        },
        "sites": {
            "IOB_X0Y41": "IOB33S",
            "IOB_X0Y42": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 215,
        "pin_functions": {
            "IOB_X0Y43": "IO_L3N_T0_DQS_12",
            "IOB_X0Y44": "IO_L3P_T0_DQS_12"
        },
        "sites": {
            "IOB_X0Y43": "IOB33S",
            "IOB_X0Y44": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 213,
        "pin_functions": {
            "IOB_X0Y45": "IO_L2N_T0_12",
            "IOB_X0Y46": "IO_L2P_T0_12"
        },
        "sites": {
            "IOB_X0Y45": "IOB33S",
            "IOB_X0Y46": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 211,
        "pin_functions": {
            "IOB_X0Y47": "IO_L1N_T0_12",
            "IOB_X0Y48": "IO_L1P_T0_12"
        },
        "sites": {
            "IOB_X0Y47": "IOB33S",
            "IOB_X0Y48": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 206,
        "pin_functions": {
            "IOB_X0Y51": "IO_L24N_T3_13",
            "IOB_X0Y52": "IO_L24P_T3_13"
        },
        "sites": {
            "IOB_X0Y51": "IOB33S",
            "IOB_X0Y52": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 204,
        "pin_functions": {
            "IOB_X0Y53": "IO_L23N_T3_13",
            "IOB_X0Y54": "IO_L23P_T3_13"
        },
        "sites": {
            "IOB_X0Y53": "IOB33S",
            "IOB_X0Y54": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 202,
        "pin_functions": {
            "IOB_X0Y55": "IO_L22N_T3_13",
            "IOB_X0Y56": "IO_L22P_T3_13"
        },
        "sites": {
            "IOB_X0Y55": "IOB33S",
            "IOB_X0Y56": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 200,
        "pin_functions": {
            "IOB_X0Y57": "IO_L21N_T3_DQS_13",
            "IOB_X0Y58": "IO_L21P_T3_DQS_13"
        },
        "sites": {
            "IOB_X0Y57": "IOB33S",
            "IOB_X0Y58": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 198,
        "pin_functions": {
            "IOB_X0Y59": "IO_L20N_T3_13",
            "IOB_X0Y60": "IO_L20P_T3_13"
        },
        "sites": {
            "IOB_X0Y59": "IOB33S",
            "IOB_X0Y60": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 196,
        "pin_functions": {
            "IOB_X0Y61": "IO_L19N_T3_VREF_13",
            "IOB_X0Y62": "IO_L19P_T3_13"
        },
        "sites": {
            "IOB_X0Y61": "IOB33S",
            "IOB_X0Y62": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 194,
        "pin_functions": {
            "IOB_X0Y63": "IO_L18N_T2_13",
            "IOB_X0Y64": "IO_L18P_T2_13"
        },
        "sites": {
            "IOB_X0Y63": "IOB33S",
            "IOB_X0Y64": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 192,
        "pin_functions": {
            "IOB_X0Y65": "IO_L17N_T2_13",
            "IOB_X0Y66": "IO_L17P_T2_13"
        },
        "sites": {
            "IOB_X0Y65": "IOB33S",
            "IOB_X0Y66": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 190,
        "pin_functions": {
            "IOB_X0Y67": "IO_L16N_T2_13",
            "IOB_X0Y68": "IO_L16P_T2_13"
        },
        "sites": {
            "IOB_X0Y67": "IOB33S",
            "IOB_X0Y68": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 188,
        "pin_functions": {
            "IOB_X0Y69": "IO_L15N_T2_DQS_13",
            "IOB_X0Y70": "IO_L15P_T2_DQS_13"
        },
        "sites": {
            "IOB_X0Y69": "IOB33S",
            "IOB_X0Y70": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 186,
        "pin_functions": {
            "IOB_X0Y71": "IO_L14N_T2_SRCC_13",
            "IOB_X0Y72": "IO_L14P_T2_SRCC_13"
        },
        "sites": {
            "IOB_X0Y71": "IOB33S",
            "IOB_X0Y72": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 184,
        "pin_functions": {
            "IOB_X0Y73": "IO_L13N_T2_MRCC_13",
            "IOB_X0Y74": "IO_L13P_T2_MRCC_13"
        },
        "sites": {
            "IOB_X0Y73": "IOB33S",
            "IOB_X0Y74": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 181,
        "pin_functions": {
            "IOB_X0Y75": "IO_L12N_T1_MRCC_13",
            "IOB_X0Y76": "IO_L12P_T1_MRCC_13"
        },
        "sites": {
            "IOB_X0Y75": "IOB33S",
            "IOB_X0Y76": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 179,
        "pin_functions": {
            "IOB_X0Y77": "IO_L11N_T1_SRCC_13",
            "IOB_X0Y78": "IO_L11P_T1_SRCC_13"
        },
        "sites": {
            "IOB_X0Y77": "IOB33S",
            "IOB_X0Y78": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 177,
        "pin_functions": {
            "IOB_X0Y79": "IO_L10N_T1_13",
            "IOB_X0Y80": "IO_L10P_T1_13"
        },
        "sites": {
            "IOB_X0Y79": "IOB33S",
            "IOB_X0Y80": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 175,
        "pin_functions": {
            "IOB_X0Y81": "IO_L9N_T1_DQS_13",
            "IOB_X0Y82": "IO_L9P_T1_DQS_13"
        },
        "sites": {
            "IOB_X0Y81": "IOB33S",
            "IOB_X0Y82": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 173,
        "pin_functions": {
            "IOB_X0Y83": "IO_L8N_T1_13",
            "IOB_X0Y84": "IO_L8P_T1_13"
        },
        "sites": {
            "IOB_X0Y83": "IOB33S",
            "IOB_X0Y84": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 171,
        "pin_functions": {
            "IOB_X0Y85": "IO_L7N_T1_13",
            "IOB_X0Y86": "IO_L7P_T1_13"
        },
        "sites": {
            "IOB_X0Y85": "IOB33S",
            "IOB_X0Y86": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 169,
        "pin_functions": {
            "IOB_X0Y87": "IO_L6N_T0_VREF_13",
            "IOB_X0Y88": "IO_L6P_T0_13"
        },
        "sites": {
            "IOB_X0Y87": "IOB33S",
            "IOB_X0Y88": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 167,
        "pin_functions": {
            "IOB_X0Y89": "IO_L5N_T0_13",
            "IOB_X0Y90": "IO_L5P_T0_13"
        },
        "sites": {
            "IOB_X0Y89": "IOB33S",
            "IOB_X0Y90": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 165,
        "pin_functions": {
            "IOB_X0Y91": "IO_L4N_T0_13",
            "IOB_X0Y92": "IO_L4P_T0_13"
        },
        "sites": {
            "IOB_X0Y91": "IOB33S",
            "IOB_X0Y92": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 163,
        "pin_functions": {
            "IOB_X0Y93": "IO_L3N_T0_DQS_13",
            "IOB_X0Y94": "IO_L3P_T0_DQS_13"
        },
        "sites": {
            "IOB_X0Y93": "IOB33S",
            "IOB_X0Y94": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 161,
        "pin_functions": {
            "IOB_X0Y95": "IO_L2N_T0_13",
            "IOB_X0Y96": "IO_L2P_T0_13"
        },
        "sites": {
            "IOB_X0Y95": "IOB33S",
            "IOB_X0Y96": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 159,
        "pin_functions": {
            "IOB_X0Y97": "IO_L1N_T0_13",
            "IOB_X0Y98": "IO_L1P_T0_13"
        },
        "sites": {
            "IOB_X0Y97": "IOB33S",
            "IOB_X0Y98": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 154,
        "pin_functions": {
            "IOB_X0Y101": "IO_L24N_T3_A00_D16_14",
            "IOB_X0Y102": "IO_L24P_T3_A01_D17_14"
        },
        "sites": {
            "IOB_X0Y101": "IOB33S",
            "IOB_X0Y102": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 152,
        "pin_functions": {
            "IOB_X0Y103": "IO_L23N_T3_A02_D18_14",
            "IOB_X0Y104": "IO_L23P_T3_A03_D19_14"
        },
        "sites": {
            "IOB_X0Y103": "IOB33S",
            "IOB_X0Y104": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 150,
        "pin_functions": {
            "IOB_X0Y105": "IO_L22N_T3_A04_D20_14",
            "IOB_X0Y106": "IO_L22P_T3_A05_D21_14"
        },
        "sites": {
            "IOB_X0Y105": "IOB33S",
            "IOB_X0Y106": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 148,
        "pin_functions": {
            "IOB_X0Y107": "IO_L21N_T3_DQS_A06_D22_14",
            "IOB_X0Y108": "IO_L21P_T3_DQS_14"
        },
        "sites": {
            "IOB_X0Y107": "IOB33S",
            "IOB_X0Y108": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 146,
        "pin_functions": {
            "IOB_X0Y109": "IO_L20N_T3_A07_D23_14",
            "IOB_X0Y110": "IO_L20P_T3_A08_D24_14"
        },
        "sites": {
            "IOB_X0Y109": "IOB33S",
            "IOB_X0Y110": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 144,
        "pin_functions": {
            "IOB_X0Y111": "IO_L19N_T3_A09_D25_VREF_14",
            "IOB_X0Y112": "IO_L19P_T3_A10_D26_14"
        },
        "sites": {
            "IOB_X0Y111": "IOB33S",
            "IOB_X0Y112": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 142,
        "pin_functions": {
            "IOB_X0Y113": "IO_L18N_T2_A11_D27_14",
            "IOB_X0Y114": "IO_L18P_T2_A12_D28_14"
        },
        "sites": {
            "IOB_X0Y113": "IOB33S",
            "IOB_X0Y114": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 140,
        "pin_functions": {
            "IOB_X0Y115": "IO_L17N_T2_A13_D29_14",
            "IOB_X0Y116": "IO_L17P_T2_A14_D30_14"
        },
        "sites": {
            "IOB_X0Y115": "IOB33S",
            "IOB_X0Y116": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 138,
        "pin_functions": {
            "IOB_X0Y117": "IO_L16N_T2_A15_D31_14",
            "IOB_X0Y118": "IO_L16P_T2_CSI_B_14"
        },
        "sites": {
            "IOB_X0Y117": "IOB33S",
            "IOB_X0Y118": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 136,
        "pin_functions": {
            "IOB_X0Y119": "IO_L15N_T2_DQS_DOUT_CSO_B_14",
            "IOB_X0Y120": "IO_L15P_T2_DQS_RDWR_B_14"
        },
        "sites": {
            "IOB_X0Y119": "IOB33S",
            "IOB_X0Y120": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 134,
        "pin_functions": {
            "IOB_X0Y121": "IO_L14N_T2_SRCC_14",
            "IOB_X0Y122": "IO_L14P_T2_SRCC_14"
        },
        "sites": {
            "IOB_X0Y121": "IOB33S",
            "IOB_X0Y122": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 132,
        "pin_functions": {
            "IOB_X0Y123": "IO_L13N_T2_MRCC_14",
            "IOB_X0Y124": "IO_L13P_T2_MRCC_14"
        },
        "sites": {
            "IOB_X0Y123": "IOB33S",
            "IOB_X0Y124": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 129,
        "pin_functions": {
            "IOB_X0Y125": "IO_L12N_T1_MRCC_14",
            "IOB_X0Y126": "IO_L12P_T1_MRCC_14"
        },
        "sites": {
            "IOB_X0Y125": "IOB33S",
            "IOB_X0Y126": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 127,
        "pin_functions": {
            "IOB_X0Y127": "IO_L11N_T1_SRCC_14",
            "IOB_X0Y128": "IO_L11P_T1_SRCC_14"
        },
        "sites": {
            "IOB_X0Y127": "IOB33S",
            "IOB_X0Y128": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 125,
        "pin_functions": {
            "IOB_X0Y129": "IO_L10N_T1_D15_14",
            "IOB_X0Y130": "IO_L10P_T1_D14_14"
        },
        "sites": {
            "IOB_X0Y129": "IOB33S",
            "IOB_X0Y130": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 123,
        "pin_functions": {
            "IOB_X0Y131": "IO_L9N_T1_DQS_D13_14",
            "IOB_X0Y132": "IO_L9P_T1_DQS_14"
        },
        "sites": {
            "IOB_X0Y131": "IOB33S",
            "IOB_X0Y132": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 121,
        "pin_functions": {
            "IOB_X0Y133": "IO_L8N_T1_D12_14",
            "IOB_X0Y134": "IO_L8P_T1_D11_14"
        },
        "sites": {
            "IOB_X0Y133": "IOB33S",
            "IOB_X0Y134": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 119,
        "pin_functions": {
            "IOB_X0Y135": "IO_L7N_T1_D10_14",
            "IOB_X0Y136": "IO_L7P_T1_D09_14"
        },
        "sites": {
            "IOB_X0Y135": "IOB33S",
            "IOB_X0Y136": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 117,
        "pin_functions": {
            "IOB_X0Y137": "IO_L6N_T0_D08_VREF_14",
            "IOB_X0Y138": "IO_L6P_T0_FCS_B_14"
        },
        "sites": {
            "IOB_X0Y137": "IOB33S",
            "IOB_X0Y138": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 115,
        "pin_functions": {
            "IOB_X0Y139": "IO_L5N_T0_D07_14",
            "IOB_X0Y140": "IO_L5P_T0_D06_14"
        },
        "sites": {
            "IOB_X0Y139": "IOB33S",
            "IOB_X0Y140": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 113,
        "pin_functions": {
            "IOB_X0Y141": "IO_L4N_T0_D05_14",
            "IOB_X0Y142": "IO_L4P_T0_D04_14"
        },
        "sites": {
            "IOB_X0Y141": "IOB33S",
            "IOB_X0Y142": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 111,
        "pin_functions": {
            "IOB_X0Y143": "IO_L3N_T0_DQS_EMCCLK_14",
            "IOB_X0Y144": "IO_L3P_T0_DQS_PUDC_B_14"
        },
        "sites": {
            "IOB_X0Y143": "IOB33S",
            "IOB_X0Y144": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 109,
        "pin_functions": {
            "IOB_X0Y145": "IO_L2N_T0_D03_14",
            "IOB_X0Y146": "IO_L2P_T0_D02_14"
        },
        "sites": {
            "IOB_X0Y145": "IOB33S",
            "IOB_X0Y146": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 107,
        "pin_functions": {
            "IOB_X0Y147": "IO_L1N_T0_D01_DIN_14",
            "IOB_X0Y148": "IO_L1P_T0_D00_MOSI_14"
        },
        "sites": {
            "IOB_X0Y147": "IOB33S",
            "IOB_X0Y148": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y151": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 102,
        "pin_functions": {
            "IOB_X0Y151": "IO_L24N_T3_RS0_15",
            "IOB_X0Y152": "IO_L24P_T3_RS1_15"
        },
        "sites": {
            "IOB_X0Y151": "IOB33S",
            "IOB_X0Y152": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y153": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 100,
        "pin_functions": {
            "IOB_X0Y153": "IO_L23N_T3_FWE_B_15",
            "IOB_X0Y154": "IO_L23P_T3_FOE_B_15"
        },
        "sites": {
            "IOB_X0Y153": "IOB33S",
            "IOB_X0Y154": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 98,
        "pin_functions": {
            "IOB_X0Y155": "IO_L22N_T3_A16_15",
            "IOB_X0Y156": "IO_L22P_T3_A17_15"
        },
        "sites": {
            "IOB_X0Y155": "IOB33S",
            "IOB_X0Y156": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y157": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 96,
        "pin_functions": {
            "IOB_X0Y157": "IO_L21N_T3_DQS_A18_15",
            "IOB_X0Y158": "IO_L21P_T3_DQS_15"
        },
        "sites": {
            "IOB_X0Y157": "IOB33S",
            "IOB_X0Y158": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y159": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 94,
        "pin_functions": {
            "IOB_X0Y159": "IO_L20N_T3_A19_15",
            "IOB_X0Y160": "IO_L20P_T3_A20_15"
        },
        "sites": {
            "IOB_X0Y159": "IOB33S",
            "IOB_X0Y160": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y161": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 92,
        "pin_functions": {
            "IOB_X0Y161": "IO_L19N_T3_A21_VREF_15",
            "IOB_X0Y162": "IO_L19P_T3_A22_15"
        },
        "sites": {
            "IOB_X0Y161": "IOB33S",
            "IOB_X0Y162": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y163": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 90,
        "pin_functions": {
            "IOB_X0Y163": "IO_L18N_T2_A23_15",
            "IOB_X0Y164": "IO_L18P_T2_A24_15"
        },
        "sites": {
            "IOB_X0Y163": "IOB33S",
            "IOB_X0Y164": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 88,
        "pin_functions": {
            "IOB_X0Y165": "IO_L17N_T2_A25_15",
            "IOB_X0Y166": "IO_L17P_T2_A26_15"
        },
        "sites": {
            "IOB_X0Y165": "IOB33S",
            "IOB_X0Y166": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y167": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 86,
        "pin_functions": {
            "IOB_X0Y167": "IO_L16N_T2_A27_15",
            "IOB_X0Y168": "IO_L16P_T2_A28_15"
        },
        "sites": {
            "IOB_X0Y167": "IOB33S",
            "IOB_X0Y168": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y169": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 84,
        "pin_functions": {
            "IOB_X0Y169": "IO_L15N_T2_DQS_ADV_B_15",
            "IOB_X0Y170": "IO_L15P_T2_DQS_15"
        },
        "sites": {
            "IOB_X0Y169": "IOB33S",
            "IOB_X0Y170": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y171": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 82,
        "pin_functions": {
            "IOB_X0Y171": "IO_L14N_T2_SRCC_15",
            "IOB_X0Y172": "IO_L14P_T2_SRCC_15"
        },
        "sites": {
            "IOB_X0Y171": "IOB33S",
            "IOB_X0Y172": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y173": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 80,
        "pin_functions": {
            "IOB_X0Y173": "IO_L13N_T2_MRCC_15",
            "IOB_X0Y174": "IO_L13P_T2_MRCC_15"
        },
        "sites": {
            "IOB_X0Y173": "IOB33S",
            "IOB_X0Y174": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 77,
        "pin_functions": {
            "IOB_X0Y175": "IO_L12N_T1_MRCC_15",
            "IOB_X0Y176": "IO_L12P_T1_MRCC_15"
        },
        "sites": {
            "IOB_X0Y175": "IOB33S",
            "IOB_X0Y176": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y177": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 75,
        "pin_functions": {
            "IOB_X0Y177": "IO_L11N_T1_SRCC_15",
            "IOB_X0Y178": "IO_L11P_T1_SRCC_15"
        },
        "sites": {
            "IOB_X0Y177": "IOB33S",
            "IOB_X0Y178": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y179": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 73,
        "pin_functions": {
            "IOB_X0Y179": "IO_L10N_T1_AD11N_15",
            "IOB_X0Y180": "IO_L10P_T1_AD11P_15"
        },
        "sites": {
            "IOB_X0Y179": "IOB33S",
            "IOB_X0Y180": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y181": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 71,
        "pin_functions": {
            "IOB_X0Y181": "IO_L9N_T1_DQS_AD3N_15",
            "IOB_X0Y182": "IO_L9P_T1_DQS_AD3P_15"
        },
        "sites": {
            "IOB_X0Y181": "IOB33S",
            "IOB_X0Y182": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y183": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 69,
        "pin_functions": {
            "IOB_X0Y183": "IO_L8N_T1_AD10N_15",
            "IOB_X0Y184": "IO_L8P_T1_AD10P_15"
        },
        "sites": {
            "IOB_X0Y183": "IOB33S",
            "IOB_X0Y184": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 67,
        "pin_functions": {
            "IOB_X0Y185": "IO_L7N_T1_AD2N_15",
            "IOB_X0Y186": "IO_L7P_T1_AD2P_15"
        },
        "sites": {
            "IOB_X0Y185": "IOB33S",
            "IOB_X0Y186": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y187": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 65,
        "pin_functions": {
            "IOB_X0Y187": "IO_L6N_T0_VREF_15",
            "IOB_X0Y188": "IO_L6P_T0_15"
        },
        "sites": {
            "IOB_X0Y187": "IOB33S",
            "IOB_X0Y188": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y189": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 63,
        "pin_functions": {
            "IOB_X0Y189": "IO_L5N_T0_AD9N_15",
            "IOB_X0Y190": "IO_L5P_T0_AD9P_15"
        },
        "sites": {
            "IOB_X0Y189": "IOB33S",
            "IOB_X0Y190": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y191": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 61,
        "pin_functions": {
            "IOB_X0Y191": "IO_L4N_T0_15",
            "IOB_X0Y192": "IO_L4P_T0_15"
        },
        "sites": {
            "IOB_X0Y191": "IOB33S",
            "IOB_X0Y192": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y193": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 59,
        "pin_functions": {
            "IOB_X0Y193": "IO_L3N_T0_DQS_AD1N_15",
            "IOB_X0Y194": "IO_L3P_T0_DQS_AD1P_15"
        },
        "sites": {
            "IOB_X0Y193": "IOB33S",
            "IOB_X0Y194": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 57,
        "pin_functions": {
            "IOB_X0Y195": "IO_L2N_T0_AD8N_15",
            "IOB_X0Y196": "IO_L2P_T0_AD8P_15"
        },
        "sites": {
            "IOB_X0Y195": "IOB33S",
            "IOB_X0Y196": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y197": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 55,
        "pin_functions": {
            "IOB_X0Y197": "IO_L1N_T0_AD0N_15",
            "IOB_X0Y198": "IO_L1P_T0_AD0P_15"
        },
        "sites": {
            "IOB_X0Y197": "IOB33S",
            "IOB_X0Y198": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y201": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 50,
        "pin_functions": {
            "IOB_X0Y201": "IO_L24N_T3_16",
            "IOB_X0Y202": "IO_L24P_T3_16"
        },
        "sites": {
            "IOB_X0Y201": "IOB33S",
            "IOB_X0Y202": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y203": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 48,
        "pin_functions": {
            "IOB_X0Y203": "IO_L23N_T3_16",
            "IOB_X0Y204": "IO_L23P_T3_16"
        },
        "sites": {
            "IOB_X0Y203": "IOB33S",
            "IOB_X0Y204": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y205": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 46,
        "pin_functions": {
            "IOB_X0Y205": "IO_L22N_T3_16",
            "IOB_X0Y206": "IO_L22P_T3_16"
        },
        "sites": {
            "IOB_X0Y205": "IOB33S",
            "IOB_X0Y206": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y207": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 44,
        "pin_functions": {
            "IOB_X0Y207": "IO_L21N_T3_DQS_16",
            "IOB_X0Y208": "IO_L21P_T3_DQS_16"
        },
        "sites": {
            "IOB_X0Y207": "IOB33S",
            "IOB_X0Y208": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y209": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 42,
        "pin_functions": {
            "IOB_X0Y209": "IO_L20N_T3_16",
            "IOB_X0Y210": "IO_L20P_T3_16"
        },
        "sites": {
            "IOB_X0Y209": "IOB33S",
            "IOB_X0Y210": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y211": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 40,
        "pin_functions": {
            "IOB_X0Y211": "IO_L19N_T3_VREF_16",
            "IOB_X0Y212": "IO_L19P_T3_16"
        },
        "sites": {
            "IOB_X0Y211": "IOB33S",
            "IOB_X0Y212": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y213": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 38,
        "pin_functions": {
            "IOB_X0Y213": "IO_L18N_T2_16",
            "IOB_X0Y214": "IO_L18P_T2_16"
        },
        "sites": {
            "IOB_X0Y213": "IOB33S",
            "IOB_X0Y214": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y215": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 36,
        "pin_functions": {
            "IOB_X0Y215": "IO_L17N_T2_16",
            "IOB_X0Y216": "IO_L17P_T2_16"
        },
        "sites": {
            "IOB_X0Y215": "IOB33S",
            "IOB_X0Y216": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y217": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 34,
        "pin_functions": {
            "IOB_X0Y217": "IO_L16N_T2_16",
            "IOB_X0Y218": "IO_L16P_T2_16"
        },
        "sites": {
            "IOB_X0Y217": "IOB33S",
            "IOB_X0Y218": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y219": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 32,
        "pin_functions": {
            "IOB_X0Y219": "IO_L15N_T2_DQS_16",
            "IOB_X0Y220": "IO_L15P_T2_DQS_16"
        },
        "sites": {
            "IOB_X0Y219": "IOB33S",
            "IOB_X0Y220": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y221": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 30,
        "pin_functions": {
            "IOB_X0Y221": "IO_L14N_T2_SRCC_16",
            "IOB_X0Y222": "IO_L14P_T2_SRCC_16"
        },
        "sites": {
            "IOB_X0Y221": "IOB33S",
            "IOB_X0Y222": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y223": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 28,
        "pin_functions": {
            "IOB_X0Y223": "IO_L13N_T2_MRCC_16",
            "IOB_X0Y224": "IO_L13P_T2_MRCC_16"
        },
        "sites": {
            "IOB_X0Y223": "IOB33S",
            "IOB_X0Y224": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y225": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 25,
        "pin_functions": {
            "IOB_X0Y225": "IO_L12N_T1_MRCC_16",
            "IOB_X0Y226": "IO_L12P_T1_MRCC_16"
        },
        "sites": {
            "IOB_X0Y225": "IOB33S",
            "IOB_X0Y226": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y227": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 23,
        "pin_functions": {
            "IOB_X0Y227": "IO_L11N_T1_SRCC_16",
            "IOB_X0Y228": "IO_L11P_T1_SRCC_16"
        },
        "sites": {
            "IOB_X0Y227": "IOB33S",
            "IOB_X0Y228": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y229": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 21,
        "pin_functions": {
            "IOB_X0Y229": "IO_L10N_T1_16",
            "IOB_X0Y230": "IO_L10P_T1_16"
        },
        "sites": {
            "IOB_X0Y229": "IOB33S",
            "IOB_X0Y230": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y231": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 19,
        "pin_functions": {
            "IOB_X0Y231": "IO_L9N_T1_DQS_16",
            "IOB_X0Y232": "IO_L9P_T1_DQS_16"
        },
        "sites": {
            "IOB_X0Y231": "IOB33S",
            "IOB_X0Y232": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y233": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 17,
        "pin_functions": {
            "IOB_X0Y233": "IO_L8N_T1_16",
            "IOB_X0Y234": "IO_L8P_T1_16"
        },
        "sites": {
            "IOB_X0Y233": "IOB33S",
            "IOB_X0Y234": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y235": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 15,
        "pin_functions": {
            "IOB_X0Y235": "IO_L7N_T1_16",
            "IOB_X0Y236": "IO_L7P_T1_16"
        },
        "sites": {
            "IOB_X0Y235": "IOB33S",
            "IOB_X0Y236": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y237": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 13,
        "pin_functions": {
            "IOB_X0Y237": "IO_L6N_T0_VREF_16",
            "IOB_X0Y238": "IO_L6P_T0_16"
        },
        "sites": {
            "IOB_X0Y237": "IOB33S",
            "IOB_X0Y238": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y239": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 11,
        "pin_functions": {
            "IOB_X0Y239": "IO_L5N_T0_16",
            "IOB_X0Y240": "IO_L5P_T0_16"
        },
        "sites": {
            "IOB_X0Y239": "IOB33S",
            "IOB_X0Y240": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y241": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 9,
        "pin_functions": {
            "IOB_X0Y241": "IO_L4N_T0_16",
            "IOB_X0Y242": "IO_L4P_T0_16"
        },
        "sites": {
            "IOB_X0Y241": "IOB33S",
            "IOB_X0Y242": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y243": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 7,
        "pin_functions": {
            "IOB_X0Y243": "IO_L3N_T0_DQS_16",
            "IOB_X0Y244": "IO_L3P_T0_DQS_16"
        },
        "sites": {
            "IOB_X0Y243": "IOB33S",
            "IOB_X0Y244": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y245": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 5,
        "pin_functions": {
            "IOB_X0Y245": "IO_L2N_T0_16",
            "IOB_X0Y246": "IO_L2P_T0_16"
        },
        "sites": {
            "IOB_X0Y245": "IOB33S",
            "IOB_X0Y246": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y247": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 0,
        "grid_y": 3,
        "pin_functions": {
            "IOB_X0Y247": "IO_L1N_T0_16",
            "IOB_X0Y248": "IO_L1P_T0_16"
        },
        "sites": {
            "IOB_X0Y247": "IOB33S",
            "IOB_X0Y248": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOI3_SING_X0Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 259,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y0": "IDELAYE2",
            "ILOGIC_X0Y0": "ILOGICE3",
            "OLOGIC_X0Y0": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 209,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y49": "IDELAYE2",
            "ILOGIC_X0Y49": "ILOGICE3",
            "OLOGIC_X0Y49": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y50": "IDELAYE2",
            "ILOGIC_X0Y50": "ILOGICE3",
            "OLOGIC_X0Y50": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 157,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y99": "IDELAYE2",
            "ILOGIC_X0Y99": "ILOGICE3",
            "OLOGIC_X0Y99": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y100": "IDELAYE2",
            "ILOGIC_X0Y100": "ILOGICE3",
            "OLOGIC_X0Y100": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y149": "IDELAYE2",
            "ILOGIC_X0Y149": "ILOGICE3",
            "OLOGIC_X0Y149": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y150": "IDELAYE2",
            "ILOGIC_X0Y150": "ILOGICE3",
            "OLOGIC_X0Y150": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y199": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y199": "IDELAYE2",
            "ILOGIC_X0Y199": "ILOGICE3",
            "OLOGIC_X0Y199": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y200": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 1,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y200": "IDELAYE2",
            "ILOGIC_X0Y200": "ILOGICE3",
            "OLOGIC_X0Y200": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y249": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 1,
        "grid_y": 1,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y249": "IDELAYE2",
            "ILOGIC_X0Y249": "ILOGICE3",
            "OLOGIC_X0Y249": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_TBYTESRC_X0Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 252,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y7": "IDELAYE2",
            "IDELAY_X0Y8": "IDELAYE2",
            "ILOGIC_X0Y7": "ILOGICE3",
            "ILOGIC_X0Y8": "ILOGICE3",
            "OLOGIC_X0Y7": "OLOGICE3",
            "OLOGIC_X0Y8": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 240,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y19": "IDELAYE2",
            "IDELAY_X0Y20": "IDELAYE2",
            "ILOGIC_X0Y19": "ILOGICE3",
            "ILOGIC_X0Y20": "ILOGICE3",
            "OLOGIC_X0Y19": "OLOGICE3",
            "OLOGIC_X0Y20": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 227,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y31": "IDELAYE2",
            "IDELAY_X0Y32": "IDELAYE2",
            "ILOGIC_X0Y31": "ILOGICE3",
            "ILOGIC_X0Y32": "ILOGICE3",
            "OLOGIC_X0Y31": "OLOGICE3",
            "OLOGIC_X0Y32": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 215,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y43": "IDELAYE2",
            "IDELAY_X0Y44": "IDELAYE2",
            "ILOGIC_X0Y43": "ILOGICE3",
            "ILOGIC_X0Y44": "ILOGICE3",
            "OLOGIC_X0Y43": "OLOGICE3",
            "OLOGIC_X0Y44": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 200,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y57": "IDELAYE2",
            "IDELAY_X0Y58": "IDELAYE2",
            "ILOGIC_X0Y57": "ILOGICE3",
            "ILOGIC_X0Y58": "ILOGICE3",
            "OLOGIC_X0Y57": "OLOGICE3",
            "OLOGIC_X0Y58": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 188,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y69": "IDELAYE2",
            "IDELAY_X0Y70": "IDELAYE2",
            "ILOGIC_X0Y69": "ILOGICE3",
            "ILOGIC_X0Y70": "ILOGICE3",
            "OLOGIC_X0Y69": "OLOGICE3",
            "OLOGIC_X0Y70": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 175,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y81": "IDELAYE2",
            "IDELAY_X0Y82": "IDELAYE2",
            "ILOGIC_X0Y81": "ILOGICE3",
            "ILOGIC_X0Y82": "ILOGICE3",
            "OLOGIC_X0Y81": "OLOGICE3",
            "OLOGIC_X0Y82": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
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        "pin_functions": {},
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            "IDELAY_X0Y93": "IDELAYE2",
            "IDELAY_X0Y94": "IDELAYE2",
            "ILOGIC_X0Y93": "ILOGICE3",
            "ILOGIC_X0Y94": "ILOGICE3",
            "OLOGIC_X0Y93": "OLOGICE3",
            "OLOGIC_X0Y94": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y107": "IDELAYE2",
            "IDELAY_X0Y108": "IDELAYE2",
            "ILOGIC_X0Y107": "ILOGICE3",
            "ILOGIC_X0Y108": "ILOGICE3",
            "OLOGIC_X0Y107": "OLOGICE3",
            "OLOGIC_X0Y108": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
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                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y119": "IDELAYE2",
            "IDELAY_X0Y120": "IDELAYE2",
            "ILOGIC_X0Y119": "ILOGICE3",
            "ILOGIC_X0Y120": "ILOGICE3",
            "OLOGIC_X0Y119": "OLOGICE3",
            "OLOGIC_X0Y120": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y131": "IDELAYE2",
            "IDELAY_X0Y132": "IDELAYE2",
            "ILOGIC_X0Y131": "ILOGICE3",
            "ILOGIC_X0Y132": "ILOGICE3",
            "OLOGIC_X0Y131": "OLOGICE3",
            "OLOGIC_X0Y132": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y143": "IDELAYE2",
            "IDELAY_X0Y144": "IDELAYE2",
            "ILOGIC_X0Y143": "ILOGICE3",
            "ILOGIC_X0Y144": "ILOGICE3",
            "OLOGIC_X0Y143": "OLOGICE3",
            "OLOGIC_X0Y144": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y157": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y157": "IDELAYE2",
            "IDELAY_X0Y158": "IDELAYE2",
            "ILOGIC_X0Y157": "ILOGICE3",
            "ILOGIC_X0Y158": "ILOGICE3",
            "OLOGIC_X0Y157": "OLOGICE3",
            "OLOGIC_X0Y158": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y169": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y169": "IDELAYE2",
            "IDELAY_X0Y170": "IDELAYE2",
            "ILOGIC_X0Y169": "ILOGICE3",
            "ILOGIC_X0Y170": "ILOGICE3",
            "OLOGIC_X0Y169": "OLOGICE3",
            "OLOGIC_X0Y170": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y181": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y181": "IDELAYE2",
            "IDELAY_X0Y182": "IDELAYE2",
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            "ILOGIC_X0Y182": "ILOGICE3",
            "OLOGIC_X0Y181": "OLOGICE3",
            "OLOGIC_X0Y182": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y193": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
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        "sites": {
            "IDELAY_X0Y193": "IDELAYE2",
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            "ILOGIC_X0Y194": "ILOGICE3",
            "OLOGIC_X0Y193": "OLOGICE3",
            "OLOGIC_X0Y194": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y207": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "offset": 14,
                "words": 4
            }
        },
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y207": "IDELAYE2",
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            "OLOGIC_X0Y207": "OLOGICE3",
            "OLOGIC_X0Y208": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y219": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "offset": 38,
                "words": 4
            }
        },
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y219": "IDELAYE2",
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            "ILOGIC_X0Y220": "ILOGICE3",
            "OLOGIC_X0Y219": "OLOGICE3",
            "OLOGIC_X0Y220": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y231": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y231": "IDELAYE2",
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            "ILOGIC_X0Y232": "ILOGICE3",
            "OLOGIC_X0Y231": "OLOGICE3",
            "OLOGIC_X0Y232": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y243": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 1,
        "grid_y": 7,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y243": "IDELAYE2",
            "IDELAY_X0Y244": "IDELAYE2",
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            "ILOGIC_X0Y244": "ILOGICE3",
            "OLOGIC_X0Y243": "OLOGICE3",
            "OLOGIC_X0Y244": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTETERM_X0Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y13": "IDELAYE2",
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            "ILOGIC_X0Y14": "ILOGICE3",
            "OLOGIC_X0Y13": "OLOGICE3",
            "OLOGIC_X0Y14": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 221,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y37": "IDELAYE2",
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            "ILOGIC_X0Y38": "ILOGICE3",
            "OLOGIC_X0Y37": "OLOGICE3",
            "OLOGIC_X0Y38": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 194,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y63": "IDELAYE2",
            "IDELAY_X0Y64": "IDELAYE2",
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            "ILOGIC_X0Y64": "ILOGICE3",
            "OLOGIC_X0Y63": "OLOGICE3",
            "OLOGIC_X0Y64": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 169,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y87": "IDELAYE2",
            "IDELAY_X0Y88": "IDELAYE2",
            "ILOGIC_X0Y87": "ILOGICE3",
            "ILOGIC_X0Y88": "ILOGICE3",
            "OLOGIC_X0Y87": "OLOGICE3",
            "OLOGIC_X0Y88": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 142,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y113": "IDELAYE2",
            "IDELAY_X0Y114": "IDELAYE2",
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            "ILOGIC_X0Y114": "ILOGICE3",
            "OLOGIC_X0Y113": "OLOGICE3",
            "OLOGIC_X0Y114": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
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                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 117,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y137": "IDELAYE2",
            "IDELAY_X0Y138": "IDELAYE2",
            "ILOGIC_X0Y137": "ILOGICE3",
            "ILOGIC_X0Y138": "ILOGICE3",
            "OLOGIC_X0Y137": "OLOGICE3",
            "OLOGIC_X0Y138": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y163": {
        "bits": {
            "CLB_IO_CLK": {
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                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 90,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y163": "IDELAYE2",
            "IDELAY_X0Y164": "IDELAYE2",
            "ILOGIC_X0Y163": "ILOGICE3",
            "ILOGIC_X0Y164": "ILOGICE3",
            "OLOGIC_X0Y163": "OLOGICE3",
            "OLOGIC_X0Y164": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y187": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 65,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y187": "IDELAYE2",
            "IDELAY_X0Y188": "IDELAYE2",
            "ILOGIC_X0Y187": "ILOGICE3",
            "ILOGIC_X0Y188": "ILOGICE3",
            "OLOGIC_X0Y187": "OLOGICE3",
            "OLOGIC_X0Y188": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y213": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 1,
        "grid_y": 38,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y213": "IDELAYE2",
            "IDELAY_X0Y214": "IDELAYE2",
            "ILOGIC_X0Y213": "ILOGICE3",
            "ILOGIC_X0Y214": "ILOGICE3",
            "OLOGIC_X0Y213": "OLOGICE3",
            "OLOGIC_X0Y214": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y237": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y4",
        "grid_x": 1,
        "grid_y": 13,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y237": "IDELAYE2",
            "IDELAY_X0Y238": "IDELAYE2",
            "ILOGIC_X0Y237": "ILOGICE3",
            "ILOGIC_X0Y238": "ILOGICE3",
            "OLOGIC_X0Y237": "OLOGICE3",
            "OLOGIC_X0Y238": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_X0Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 258,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y1": "IDELAYE2",
            "IDELAY_X0Y2": "IDELAYE2",
            "ILOGIC_X0Y1": "ILOGICE3",
            "ILOGIC_X0Y2": "ILOGICE3",
            "OLOGIC_X0Y1": "OLOGICE3",
            "OLOGIC_X0Y2": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 256,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y3": "IDELAYE2",
            "IDELAY_X0Y4": "IDELAYE2",
            "ILOGIC_X0Y3": "ILOGICE3",
            "ILOGIC_X0Y4": "ILOGICE3",
            "OLOGIC_X0Y3": "OLOGICE3",
            "OLOGIC_X0Y4": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 254,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y5": "IDELAYE2",
            "IDELAY_X0Y6": "IDELAYE2",
            "ILOGIC_X0Y5": "ILOGICE3",
            "ILOGIC_X0Y6": "ILOGICE3",
            "OLOGIC_X0Y5": "OLOGICE3",
            "OLOGIC_X0Y6": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 250,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y9": "IDELAYE2",
            "IDELAY_X0Y10": "IDELAYE2",
            "ILOGIC_X0Y9": "ILOGICE3",
            "ILOGIC_X0Y10": "ILOGICE3",
            "OLOGIC_X0Y9": "OLOGICE3",
            "OLOGIC_X0Y10": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 248,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y11": "IDELAYE2",
            "IDELAY_X0Y12": "IDELAYE2",
            "ILOGIC_X0Y11": "ILOGICE3",
            "ILOGIC_X0Y12": "ILOGICE3",
            "OLOGIC_X0Y11": "OLOGICE3",
            "OLOGIC_X0Y12": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 244,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y15": "IDELAYE2",
            "IDELAY_X0Y16": "IDELAYE2",
            "ILOGIC_X0Y15": "ILOGICE3",
            "ILOGIC_X0Y16": "ILOGICE3",
            "OLOGIC_X0Y15": "OLOGICE3",
            "OLOGIC_X0Y16": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 242,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y17": "IDELAYE2",
            "IDELAY_X0Y18": "IDELAYE2",
            "ILOGIC_X0Y17": "ILOGICE3",
            "ILOGIC_X0Y18": "ILOGICE3",
            "OLOGIC_X0Y17": "OLOGICE3",
            "OLOGIC_X0Y18": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 238,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y21": "IDELAYE2",
            "IDELAY_X0Y22": "IDELAYE2",
            "ILOGIC_X0Y21": "ILOGICE3",
            "ILOGIC_X0Y22": "ILOGICE3",
            "OLOGIC_X0Y21": "OLOGICE3",
            "OLOGIC_X0Y22": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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            "ILOGIC_X0Y24": "ILOGICE3",
            "OLOGIC_X0Y23": "OLOGICE3",
            "OLOGIC_X0Y24": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
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                "words": 4
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        },
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            "OLOGIC_X0Y25": "OLOGICE3",
            "OLOGIC_X0Y26": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
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                "offset": 55,
                "words": 4
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        },
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            "IDELAY_X0Y27": "IDELAYE2",
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            "ILOGIC_X0Y28": "ILOGICE3",
            "OLOGIC_X0Y27": "OLOGICE3",
            "OLOGIC_X0Y28": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
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                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "ILOGIC_X0Y30": "ILOGICE3",
            "OLOGIC_X0Y29": "OLOGICE3",
            "OLOGIC_X0Y30": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y33": {
        "bits": {
            "CLB_IO_CLK": {
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                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y33": "IDELAYE2",
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            "OLOGIC_X0Y33": "OLOGICE3",
            "OLOGIC_X0Y34": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y35": "IDELAYE2",
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            "OLOGIC_X0Y35": "OLOGICE3",
            "OLOGIC_X0Y36": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
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                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "IDELAY_X0Y39": "IDELAYE2",
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            "ILOGIC_X0Y40": "ILOGICE3",
            "OLOGIC_X0Y39": "OLOGICE3",
            "OLOGIC_X0Y40": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
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            }
        },
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        "pin_functions": {},
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            "OLOGIC_X0Y41": "OLOGICE3",
            "OLOGIC_X0Y42": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
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                "offset": 91,
                "words": 4
            }
        },
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            "ILOGIC_X0Y46": "ILOGICE3",
            "OLOGIC_X0Y45": "OLOGICE3",
            "OLOGIC_X0Y46": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00440000",
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                "words": 4
            }
        },
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        "pin_functions": {},
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            "ILOGIC_X0Y48": "ILOGICE3",
            "OLOGIC_X0Y47": "OLOGICE3",
            "OLOGIC_X0Y48": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
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                "words": 4
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "IDELAY_X0Y51": "IDELAYE2",
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            "OLOGIC_X0Y51": "OLOGICE3",
            "OLOGIC_X0Y52": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
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                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y53": "IDELAYE2",
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            "ILOGIC_X0Y54": "ILOGICE3",
            "OLOGIC_X0Y53": "OLOGICE3",
            "OLOGIC_X0Y54": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y55": "IDELAYE2",
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            "ILOGIC_X0Y56": "ILOGICE3",
            "OLOGIC_X0Y55": "OLOGICE3",
            "OLOGIC_X0Y56": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y59": "IDELAYE2",
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            "ILOGIC_X0Y60": "ILOGICE3",
            "OLOGIC_X0Y59": "OLOGICE3",
            "OLOGIC_X0Y60": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
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            "OLOGIC_X0Y61": "OLOGICE3",
            "OLOGIC_X0Y62": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y65": "IDELAYE2",
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            "ILOGIC_X0Y66": "ILOGICE3",
            "OLOGIC_X0Y65": "OLOGICE3",
            "OLOGIC_X0Y66": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
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                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y67": "IDELAYE2",
            "IDELAY_X0Y68": "IDELAYE2",
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            "ILOGIC_X0Y68": "ILOGICE3",
            "OLOGIC_X0Y67": "OLOGICE3",
            "OLOGIC_X0Y68": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 42,
                "words": 4
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y71": "IDELAYE2",
            "IDELAY_X0Y72": "IDELAYE2",
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            "OLOGIC_X0Y71": "OLOGICE3",
            "OLOGIC_X0Y72": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
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                "words": 4
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "IDELAY_X0Y73": "IDELAYE2",
            "IDELAY_X0Y74": "IDELAYE2",
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            "ILOGIC_X0Y74": "ILOGICE3",
            "OLOGIC_X0Y73": "OLOGICE3",
            "OLOGIC_X0Y74": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
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                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y75": "IDELAYE2",
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            "ILOGIC_X0Y76": "ILOGICE3",
            "OLOGIC_X0Y75": "OLOGICE3",
            "OLOGIC_X0Y76": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y77": "IDELAYE2",
            "IDELAY_X0Y78": "IDELAYE2",
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            "ILOGIC_X0Y78": "ILOGICE3",
            "OLOGIC_X0Y77": "OLOGICE3",
            "OLOGIC_X0Y78": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y79": "IDELAYE2",
            "IDELAY_X0Y80": "IDELAYE2",
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            "ILOGIC_X0Y80": "ILOGICE3",
            "OLOGIC_X0Y79": "OLOGICE3",
            "OLOGIC_X0Y80": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
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            "IDELAY_X0Y84": "IDELAYE2",
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            "ILOGIC_X0Y84": "ILOGICE3",
            "OLOGIC_X0Y83": "OLOGICE3",
            "OLOGIC_X0Y84": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y85": "IDELAYE2",
            "IDELAY_X0Y86": "IDELAYE2",
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            "ILOGIC_X0Y86": "ILOGICE3",
            "OLOGIC_X0Y85": "OLOGICE3",
            "OLOGIC_X0Y86": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y89": "IDELAYE2",
            "IDELAY_X0Y90": "IDELAYE2",
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            "ILOGIC_X0Y90": "ILOGICE3",
            "OLOGIC_X0Y89": "OLOGICE3",
            "OLOGIC_X0Y90": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y91": "IDELAYE2",
            "IDELAY_X0Y92": "IDELAYE2",
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            "ILOGIC_X0Y92": "ILOGICE3",
            "OLOGIC_X0Y91": "OLOGICE3",
            "OLOGIC_X0Y92": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
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        "pin_functions": {},
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            "ILOGIC_X0Y96": "ILOGICE3",
            "OLOGIC_X0Y95": "OLOGICE3",
            "OLOGIC_X0Y96": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 95,
                "words": 4
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y97": "IDELAYE2",
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            "ILOGIC_X0Y98": "ILOGICE3",
            "OLOGIC_X0Y97": "OLOGICE3",
            "OLOGIC_X0Y98": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 2,
                "words": 4
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        },
        "clock_region": "X0Y2",
        "grid_x": 1,
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        "pin_functions": {},
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            "ILOGIC_X0Y101": "ILOGICE3",
            "ILOGIC_X0Y102": "ILOGICE3",
            "OLOGIC_X0Y101": "OLOGICE3",
            "OLOGIC_X0Y102": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "IDELAY_X0Y103": "IDELAYE2",
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            "ILOGIC_X0Y104": "ILOGICE3",
            "OLOGIC_X0Y103": "OLOGICE3",
            "OLOGIC_X0Y104": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y105": "IDELAYE2",
            "IDELAY_X0Y106": "IDELAYE2",
            "ILOGIC_X0Y105": "ILOGICE3",
            "ILOGIC_X0Y106": "ILOGICE3",
            "OLOGIC_X0Y105": "OLOGICE3",
            "OLOGIC_X0Y106": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y109": "IDELAYE2",
            "IDELAY_X0Y110": "IDELAYE2",
            "ILOGIC_X0Y109": "ILOGICE3",
            "ILOGIC_X0Y110": "ILOGICE3",
            "OLOGIC_X0Y109": "OLOGICE3",
            "OLOGIC_X0Y110": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y111": "IDELAYE2",
            "IDELAY_X0Y112": "IDELAYE2",
            "ILOGIC_X0Y111": "ILOGICE3",
            "ILOGIC_X0Y112": "ILOGICE3",
            "OLOGIC_X0Y111": "OLOGICE3",
            "OLOGIC_X0Y112": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y115": "IDELAYE2",
            "IDELAY_X0Y116": "IDELAYE2",
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            "ILOGIC_X0Y116": "ILOGICE3",
            "OLOGIC_X0Y115": "OLOGICE3",
            "OLOGIC_X0Y116": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "IDELAY_X0Y117": "IDELAYE2",
            "IDELAY_X0Y118": "IDELAYE2",
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            "ILOGIC_X0Y118": "ILOGICE3",
            "OLOGIC_X0Y117": "OLOGICE3",
            "OLOGIC_X0Y118": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y121": "IDELAYE2",
            "IDELAY_X0Y122": "IDELAYE2",
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            "ILOGIC_X0Y122": "ILOGICE3",
            "OLOGIC_X0Y121": "OLOGICE3",
            "OLOGIC_X0Y122": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
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                "offset": 46,
                "words": 4
            }
        },
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        "pin_functions": {},
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            "IDELAY_X0Y123": "IDELAYE2",
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            "ILOGIC_X0Y124": "ILOGICE3",
            "OLOGIC_X0Y123": "OLOGICE3",
            "OLOGIC_X0Y124": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y125": "IDELAYE2",
            "IDELAY_X0Y126": "IDELAYE2",
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            "ILOGIC_X0Y126": "ILOGICE3",
            "OLOGIC_X0Y125": "OLOGICE3",
            "OLOGIC_X0Y126": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "IDELAY_X0Y127": "IDELAYE2",
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            "ILOGIC_X0Y128": "ILOGICE3",
            "OLOGIC_X0Y127": "OLOGICE3",
            "OLOGIC_X0Y128": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
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                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y129": "IDELAYE2",
            "IDELAY_X0Y130": "IDELAYE2",
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            "ILOGIC_X0Y130": "ILOGICE3",
            "OLOGIC_X0Y129": "OLOGICE3",
            "OLOGIC_X0Y130": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
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                "offset": 67,
                "words": 4
            }
        },
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y133": "IDELAYE2",
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            "ILOGIC_X0Y134": "ILOGICE3",
            "OLOGIC_X0Y133": "OLOGICE3",
            "OLOGIC_X0Y134": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y135": "IDELAYE2",
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            "ILOGIC_X0Y136": "ILOGICE3",
            "OLOGIC_X0Y135": "OLOGICE3",
            "OLOGIC_X0Y136": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y139": "IDELAYE2",
            "IDELAY_X0Y140": "IDELAYE2",
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            "ILOGIC_X0Y140": "ILOGICE3",
            "OLOGIC_X0Y139": "OLOGICE3",
            "OLOGIC_X0Y140": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y141": "IDELAYE2",
            "IDELAY_X0Y142": "IDELAYE2",
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            "ILOGIC_X0Y142": "ILOGICE3",
            "OLOGIC_X0Y141": "OLOGICE3",
            "OLOGIC_X0Y142": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "IDELAY_X0Y145": "IDELAYE2",
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            "ILOGIC_X0Y146": "ILOGICE3",
            "OLOGIC_X0Y145": "OLOGICE3",
            "OLOGIC_X0Y146": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
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                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y147": "IDELAYE2",
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            "ILOGIC_X0Y148": "ILOGICE3",
            "OLOGIC_X0Y147": "OLOGICE3",
            "OLOGIC_X0Y148": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y151": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
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            "IDELAY_X0Y151": "IDELAYE2",
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            "ILOGIC_X0Y152": "ILOGICE3",
            "OLOGIC_X0Y151": "OLOGICE3",
            "OLOGIC_X0Y152": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y153": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 100,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y153": "IDELAYE2",
            "IDELAY_X0Y154": "IDELAYE2",
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            "ILOGIC_X0Y154": "ILOGICE3",
            "OLOGIC_X0Y153": "OLOGICE3",
            "OLOGIC_X0Y154": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y155": "IDELAYE2",
            "IDELAY_X0Y156": "IDELAYE2",
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            "ILOGIC_X0Y156": "ILOGICE3",
            "OLOGIC_X0Y155": "OLOGICE3",
            "OLOGIC_X0Y156": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y159": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y159": "IDELAYE2",
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            "ILOGIC_X0Y159": "ILOGICE3",
            "ILOGIC_X0Y160": "ILOGICE3",
            "OLOGIC_X0Y159": "OLOGICE3",
            "OLOGIC_X0Y160": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y161": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 22,
                "words": 4
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        },
        "clock_region": "X0Y3",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y161": "IDELAYE2",
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            "ILOGIC_X0Y162": "ILOGICE3",
            "OLOGIC_X0Y161": "OLOGICE3",
            "OLOGIC_X0Y162": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 30,
                "words": 4
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        },
        "clock_region": "X0Y3",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y165": "IDELAYE2",
            "IDELAY_X0Y166": "IDELAYE2",
            "ILOGIC_X0Y165": "ILOGICE3",
            "ILOGIC_X0Y166": "ILOGICE3",
            "OLOGIC_X0Y165": "OLOGICE3",
            "OLOGIC_X0Y166": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y167": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 86,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y167": "IDELAYE2",
            "IDELAY_X0Y168": "IDELAYE2",
            "ILOGIC_X0Y167": "ILOGICE3",
            "ILOGIC_X0Y168": "ILOGICE3",
            "OLOGIC_X0Y167": "OLOGICE3",
            "OLOGIC_X0Y168": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y171": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 82,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y171": "IDELAYE2",
            "IDELAY_X0Y172": "IDELAYE2",
            "ILOGIC_X0Y171": "ILOGICE3",
            "ILOGIC_X0Y172": "ILOGICE3",
            "OLOGIC_X0Y171": "OLOGICE3",
            "OLOGIC_X0Y172": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y173": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 80,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y173": "IDELAYE2",
            "IDELAY_X0Y174": "IDELAYE2",
            "ILOGIC_X0Y173": "ILOGICE3",
            "ILOGIC_X0Y174": "ILOGICE3",
            "OLOGIC_X0Y173": "OLOGICE3",
            "OLOGIC_X0Y174": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y175": "IDELAYE2",
            "IDELAY_X0Y176": "IDELAYE2",
            "ILOGIC_X0Y175": "ILOGICE3",
            "ILOGIC_X0Y176": "ILOGICE3",
            "OLOGIC_X0Y175": "OLOGICE3",
            "OLOGIC_X0Y176": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y177": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y177": "IDELAYE2",
            "IDELAY_X0Y178": "IDELAYE2",
            "ILOGIC_X0Y177": "ILOGICE3",
            "ILOGIC_X0Y178": "ILOGICE3",
            "OLOGIC_X0Y177": "OLOGICE3",
            "OLOGIC_X0Y178": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y179": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y179": "IDELAYE2",
            "IDELAY_X0Y180": "IDELAYE2",
            "ILOGIC_X0Y179": "ILOGICE3",
            "ILOGIC_X0Y180": "ILOGICE3",
            "OLOGIC_X0Y179": "OLOGICE3",
            "OLOGIC_X0Y180": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y183": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y183": "IDELAYE2",
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            "ILOGIC_X0Y184": "ILOGICE3",
            "OLOGIC_X0Y183": "OLOGICE3",
            "OLOGIC_X0Y184": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 71,
                "words": 4
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        },
        "clock_region": "X0Y3",
        "grid_x": 1,
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        "pin_functions": {},
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            "IDELAY_X0Y186": "IDELAYE2",
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            "ILOGIC_X0Y186": "ILOGICE3",
            "OLOGIC_X0Y185": "OLOGICE3",
            "OLOGIC_X0Y186": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y189": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 79,
                "words": 4
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        },
        "clock_region": "X0Y3",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y189": "IDELAYE2",
            "IDELAY_X0Y190": "IDELAYE2",
            "ILOGIC_X0Y189": "ILOGICE3",
            "ILOGIC_X0Y190": "ILOGICE3",
            "OLOGIC_X0Y189": "OLOGICE3",
            "OLOGIC_X0Y190": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y191": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y191": "IDELAYE2",
            "IDELAY_X0Y192": "IDELAYE2",
            "ILOGIC_X0Y191": "ILOGICE3",
            "ILOGIC_X0Y192": "ILOGICE3",
            "OLOGIC_X0Y191": "OLOGICE3",
            "OLOGIC_X0Y192": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
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            "ILOGIC_X0Y196": "ILOGICE3",
            "OLOGIC_X0Y195": "OLOGICE3",
            "OLOGIC_X0Y196": "OLOGICE3"
        },
        "type": "LIOI3"
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        "bits": {
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                "baseaddr": "0x00000000",
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        },
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            "OLOGIC_X0Y197": "OLOGICE3",
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        },
        "type": "LIOI3"
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        "bits": {
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        },
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        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y211": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 49,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y212": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 48,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y213": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 47,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y214": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y215": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 45,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y216": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 44,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y217": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 43,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y218": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 42,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y219": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y220": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 40,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y221": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 39,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y222": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 38,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y223": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 37,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y224": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y225": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 35,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y226": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 34,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y227": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 33,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y228": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 32,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y229": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y230": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 30,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y231": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 29,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y232": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 28,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_NULL_X71Y233": {
        "bits": {},
        "grid_x": 71,
        "grid_y": 27,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PCIE_TOP_X67Y229": {
        "bits": {},
        "grid_x": 67,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {},
        "type": "PCIE_TOP"
    },
    "RIOB33_SING_X105Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y0"
                    },
                    "start_offset": 2,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 259,
        "pin_functions": {
            "IOB_X1Y0": "IO_25_32"
        },
        "sites": {
            "IOB_X1Y0": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X105Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 209,
        "pin_functions": {
            "IOB_X1Y49": "IO_0_32"
        },
        "sites": {
            "IOB_X1Y49": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X105Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y0"
                    },
                    "start_offset": 2,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 207,
        "pin_functions": {
            "IOB_X1Y50": "IO_25_33"
        },
        "sites": {
            "IOB_X1Y50": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X105Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 157,
        "pin_functions": {
            "IOB_X1Y99": "IO_0_33"
        },
        "sites": {
            "IOB_X1Y99": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X105Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y0"
                    },
                    "start_offset": 2,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 155,
        "pin_functions": {
            "IOB_X1Y100": "IO_25_34"
        },
        "sites": {
            "IOB_X1Y100": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X105Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 105,
        "pin_functions": {
            "IOB_X1Y149": "IO_0_34"
        },
        "sites": {
            "IOB_X1Y149": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X105Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y0"
                    },
                    "start_offset": 2,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 103,
        "pin_functions": {
            "IOB_X1Y150": "IO_25_35"
        },
        "sites": {
            "IOB_X1Y150": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X105Y199": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 53,
        "pin_functions": {
            "IOB_X1Y199": "IO_0_35"
        },
        "sites": {
            "IOB_X1Y199": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X105Y200": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y0"
                    },
                    "start_offset": 2,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 51,
        "pin_functions": {
            "IOB_X1Y200": "IO_25_36"
        },
        "sites": {
            "IOB_X1Y200": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X105Y249": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 1,
        "pin_functions": {
            "IOB_X1Y249": "IO_0_36"
        },
        "sites": {
            "IOB_X1Y249": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_X105Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 258,
        "pin_functions": {
            "IOB_X1Y1": "IO_L24N_T3_32",
            "IOB_X1Y2": "IO_L24P_T3_32"
        },
        "sites": {
            "IOB_X1Y1": "IOB33S",
            "IOB_X1Y2": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 256,
        "pin_functions": {
            "IOB_X1Y3": "IO_L23N_T3_32",
            "IOB_X1Y4": "IO_L23P_T3_32"
        },
        "sites": {
            "IOB_X1Y3": "IOB33S",
            "IOB_X1Y4": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 254,
        "pin_functions": {
            "IOB_X1Y5": "IO_L22N_T3_32",
            "IOB_X1Y6": "IO_L22P_T3_32"
        },
        "sites": {
            "IOB_X1Y5": "IOB33S",
            "IOB_X1Y6": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 252,
        "pin_functions": {
            "IOB_X1Y7": "IO_L21N_T3_DQS_32",
            "IOB_X1Y8": "IO_L21P_T3_DQS_32"
        },
        "sites": {
            "IOB_X1Y7": "IOB33S",
            "IOB_X1Y8": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 250,
        "pin_functions": {
            "IOB_X1Y9": "IO_L20N_T3_32",
            "IOB_X1Y10": "IO_L20P_T3_32"
        },
        "sites": {
            "IOB_X1Y9": "IOB33S",
            "IOB_X1Y10": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 248,
        "pin_functions": {
            "IOB_X1Y11": "IO_L19N_T3_VREF_32",
            "IOB_X1Y12": "IO_L19P_T3_32"
        },
        "sites": {
            "IOB_X1Y11": "IOB33S",
            "IOB_X1Y12": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 246,
        "pin_functions": {
            "IOB_X1Y13": "IO_L18N_T2_32",
            "IOB_X1Y14": "IO_L18P_T2_32"
        },
        "sites": {
            "IOB_X1Y13": "IOB33S",
            "IOB_X1Y14": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 244,
        "pin_functions": {
            "IOB_X1Y15": "IO_L17N_T2_32",
            "IOB_X1Y16": "IO_L17P_T2_32"
        },
        "sites": {
            "IOB_X1Y15": "IOB33S",
            "IOB_X1Y16": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 242,
        "pin_functions": {
            "IOB_X1Y17": "IO_L16N_T2_32",
            "IOB_X1Y18": "IO_L16P_T2_32"
        },
        "sites": {
            "IOB_X1Y17": "IOB33S",
            "IOB_X1Y18": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 240,
        "pin_functions": {
            "IOB_X1Y19": "IO_L15N_T2_DQS_32",
            "IOB_X1Y20": "IO_L15P_T2_DQS_32"
        },
        "sites": {
            "IOB_X1Y19": "IOB33S",
            "IOB_X1Y20": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 238,
        "pin_functions": {
            "IOB_X1Y21": "IO_L14N_T2_SRCC_32",
            "IOB_X1Y22": "IO_L14P_T2_SRCC_32"
        },
        "sites": {
            "IOB_X1Y21": "IOB33S",
            "IOB_X1Y22": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 236,
        "pin_functions": {
            "IOB_X1Y23": "IO_L13N_T2_MRCC_32",
            "IOB_X1Y24": "IO_L13P_T2_MRCC_32"
        },
        "sites": {
            "IOB_X1Y23": "IOB33S",
            "IOB_X1Y24": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 233,
        "pin_functions": {
            "IOB_X1Y25": "IO_L12N_T1_MRCC_32",
            "IOB_X1Y26": "IO_L12P_T1_MRCC_32"
        },
        "sites": {
            "IOB_X1Y25": "IOB33S",
            "IOB_X1Y26": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 231,
        "pin_functions": {
            "IOB_X1Y27": "IO_L11N_T1_SRCC_32",
            "IOB_X1Y28": "IO_L11P_T1_SRCC_32"
        },
        "sites": {
            "IOB_X1Y27": "IOB33S",
            "IOB_X1Y28": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 229,
        "pin_functions": {
            "IOB_X1Y29": "IO_L10N_T1_32",
            "IOB_X1Y30": "IO_L10P_T1_32"
        },
        "sites": {
            "IOB_X1Y29": "IOB33S",
            "IOB_X1Y30": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 227,
        "pin_functions": {
            "IOB_X1Y31": "IO_L9N_T1_DQS_32",
            "IOB_X1Y32": "IO_L9P_T1_DQS_32"
        },
        "sites": {
            "IOB_X1Y31": "IOB33S",
            "IOB_X1Y32": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 225,
        "pin_functions": {
            "IOB_X1Y33": "IO_L8N_T1_32",
            "IOB_X1Y34": "IO_L8P_T1_32"
        },
        "sites": {
            "IOB_X1Y33": "IOB33S",
            "IOB_X1Y34": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 223,
        "pin_functions": {
            "IOB_X1Y35": "IO_L7N_T1_32",
            "IOB_X1Y36": "IO_L7P_T1_32"
        },
        "sites": {
            "IOB_X1Y35": "IOB33S",
            "IOB_X1Y36": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 221,
        "pin_functions": {
            "IOB_X1Y37": "IO_L6N_T0_VREF_32",
            "IOB_X1Y38": "IO_L6P_T0_32"
        },
        "sites": {
            "IOB_X1Y37": "IOB33S",
            "IOB_X1Y38": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 219,
        "pin_functions": {
            "IOB_X1Y39": "IO_L5N_T0_32",
            "IOB_X1Y40": "IO_L5P_T0_32"
        },
        "sites": {
            "IOB_X1Y39": "IOB33S",
            "IOB_X1Y40": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 217,
        "pin_functions": {
            "IOB_X1Y41": "IO_L4N_T0_32",
            "IOB_X1Y42": "IO_L4P_T0_32"
        },
        "sites": {
            "IOB_X1Y41": "IOB33S",
            "IOB_X1Y42": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 215,
        "pin_functions": {
            "IOB_X1Y43": "IO_L3N_T0_DQS_32",
            "IOB_X1Y44": "IO_L3P_T0_DQS_32"
        },
        "sites": {
            "IOB_X1Y43": "IOB33S",
            "IOB_X1Y44": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 213,
        "pin_functions": {
            "IOB_X1Y45": "IO_L2N_T0_32",
            "IOB_X1Y46": "IO_L2P_T0_32"
        },
        "sites": {
            "IOB_X1Y45": "IOB33S",
            "IOB_X1Y46": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 264,
        "grid_y": 211,
        "pin_functions": {
            "IOB_X1Y47": "IO_L1N_T0_32",
            "IOB_X1Y48": "IO_L1P_T0_32"
        },
        "sites": {
            "IOB_X1Y47": "IOB33S",
            "IOB_X1Y48": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 206,
        "pin_functions": {
            "IOB_X1Y51": "IO_L24N_T3_33",
            "IOB_X1Y52": "IO_L24P_T3_33"
        },
        "sites": {
            "IOB_X1Y51": "IOB33S",
            "IOB_X1Y52": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 204,
        "pin_functions": {
            "IOB_X1Y53": "IO_L23N_T3_33",
            "IOB_X1Y54": "IO_L23P_T3_33"
        },
        "sites": {
            "IOB_X1Y53": "IOB33S",
            "IOB_X1Y54": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 202,
        "pin_functions": {
            "IOB_X1Y55": "IO_L22N_T3_33",
            "IOB_X1Y56": "IO_L22P_T3_33"
        },
        "sites": {
            "IOB_X1Y55": "IOB33S",
            "IOB_X1Y56": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 200,
        "pin_functions": {
            "IOB_X1Y57": "IO_L21N_T3_DQS_33",
            "IOB_X1Y58": "IO_L21P_T3_DQS_33"
        },
        "sites": {
            "IOB_X1Y57": "IOB33S",
            "IOB_X1Y58": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 198,
        "pin_functions": {
            "IOB_X1Y59": "IO_L20N_T3_33",
            "IOB_X1Y60": "IO_L20P_T3_33"
        },
        "sites": {
            "IOB_X1Y59": "IOB33S",
            "IOB_X1Y60": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 196,
        "pin_functions": {
            "IOB_X1Y61": "IO_L19N_T3_VREF_33",
            "IOB_X1Y62": "IO_L19P_T3_33"
        },
        "sites": {
            "IOB_X1Y61": "IOB33S",
            "IOB_X1Y62": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 194,
        "pin_functions": {
            "IOB_X1Y63": "IO_L18N_T2_33",
            "IOB_X1Y64": "IO_L18P_T2_33"
        },
        "sites": {
            "IOB_X1Y63": "IOB33S",
            "IOB_X1Y64": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 192,
        "pin_functions": {
            "IOB_X1Y65": "IO_L17N_T2_33",
            "IOB_X1Y66": "IO_L17P_T2_33"
        },
        "sites": {
            "IOB_X1Y65": "IOB33S",
            "IOB_X1Y66": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 190,
        "pin_functions": {
            "IOB_X1Y67": "IO_L16N_T2_33",
            "IOB_X1Y68": "IO_L16P_T2_33"
        },
        "sites": {
            "IOB_X1Y67": "IOB33S",
            "IOB_X1Y68": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 188,
        "pin_functions": {
            "IOB_X1Y69": "IO_L15N_T2_DQS_33",
            "IOB_X1Y70": "IO_L15P_T2_DQS_33"
        },
        "sites": {
            "IOB_X1Y69": "IOB33S",
            "IOB_X1Y70": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 186,
        "pin_functions": {
            "IOB_X1Y71": "IO_L14N_T2_SRCC_33",
            "IOB_X1Y72": "IO_L14P_T2_SRCC_33"
        },
        "sites": {
            "IOB_X1Y71": "IOB33S",
            "IOB_X1Y72": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 184,
        "pin_functions": {
            "IOB_X1Y73": "IO_L13N_T2_MRCC_33",
            "IOB_X1Y74": "IO_L13P_T2_MRCC_33"
        },
        "sites": {
            "IOB_X1Y73": "IOB33S",
            "IOB_X1Y74": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 181,
        "pin_functions": {
            "IOB_X1Y75": "IO_L12N_T1_MRCC_33",
            "IOB_X1Y76": "IO_L12P_T1_MRCC_33"
        },
        "sites": {
            "IOB_X1Y75": "IOB33S",
            "IOB_X1Y76": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 179,
        "pin_functions": {
            "IOB_X1Y77": "IO_L11N_T1_SRCC_33",
            "IOB_X1Y78": "IO_L11P_T1_SRCC_33"
        },
        "sites": {
            "IOB_X1Y77": "IOB33S",
            "IOB_X1Y78": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 177,
        "pin_functions": {
            "IOB_X1Y79": "IO_L10N_T1_33",
            "IOB_X1Y80": "IO_L10P_T1_33"
        },
        "sites": {
            "IOB_X1Y79": "IOB33S",
            "IOB_X1Y80": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 175,
        "pin_functions": {
            "IOB_X1Y81": "IO_L9N_T1_DQS_33",
            "IOB_X1Y82": "IO_L9P_T1_DQS_33"
        },
        "sites": {
            "IOB_X1Y81": "IOB33S",
            "IOB_X1Y82": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 173,
        "pin_functions": {
            "IOB_X1Y83": "IO_L8N_T1_33",
            "IOB_X1Y84": "IO_L8P_T1_33"
        },
        "sites": {
            "IOB_X1Y83": "IOB33S",
            "IOB_X1Y84": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 171,
        "pin_functions": {
            "IOB_X1Y85": "IO_L7N_T1_33",
            "IOB_X1Y86": "IO_L7P_T1_33"
        },
        "sites": {
            "IOB_X1Y85": "IOB33S",
            "IOB_X1Y86": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 169,
        "pin_functions": {
            "IOB_X1Y87": "IO_L6N_T0_VREF_33",
            "IOB_X1Y88": "IO_L6P_T0_33"
        },
        "sites": {
            "IOB_X1Y87": "IOB33S",
            "IOB_X1Y88": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 167,
        "pin_functions": {
            "IOB_X1Y89": "IO_L5N_T0_33",
            "IOB_X1Y90": "IO_L5P_T0_33"
        },
        "sites": {
            "IOB_X1Y89": "IOB33S",
            "IOB_X1Y90": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 165,
        "pin_functions": {
            "IOB_X1Y91": "IO_L4N_T0_33",
            "IOB_X1Y92": "IO_L4P_T0_33"
        },
        "sites": {
            "IOB_X1Y91": "IOB33S",
            "IOB_X1Y92": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 163,
        "pin_functions": {
            "IOB_X1Y93": "IO_L3N_T0_DQS_33",
            "IOB_X1Y94": "IO_L3P_T0_DQS_33"
        },
        "sites": {
            "IOB_X1Y93": "IOB33S",
            "IOB_X1Y94": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 161,
        "pin_functions": {
            "IOB_X1Y95": "IO_L2N_T0_33",
            "IOB_X1Y96": "IO_L2P_T0_33"
        },
        "sites": {
            "IOB_X1Y95": "IOB33S",
            "IOB_X1Y96": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 264,
        "grid_y": 159,
        "pin_functions": {
            "IOB_X1Y97": "IO_L1N_T0_33",
            "IOB_X1Y98": "IO_L1P_T0_33"
        },
        "sites": {
            "IOB_X1Y97": "IOB33S",
            "IOB_X1Y98": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 154,
        "pin_functions": {
            "IOB_X1Y101": "IO_L24N_T3_34",
            "IOB_X1Y102": "IO_L24P_T3_34"
        },
        "sites": {
            "IOB_X1Y101": "IOB33S",
            "IOB_X1Y102": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 152,
        "pin_functions": {
            "IOB_X1Y103": "IO_L23N_T3_34",
            "IOB_X1Y104": "IO_L23P_T3_34"
        },
        "sites": {
            "IOB_X1Y103": "IOB33S",
            "IOB_X1Y104": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 150,
        "pin_functions": {
            "IOB_X1Y105": "IO_L22N_T3_34",
            "IOB_X1Y106": "IO_L22P_T3_34"
        },
        "sites": {
            "IOB_X1Y105": "IOB33S",
            "IOB_X1Y106": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 148,
        "pin_functions": {
            "IOB_X1Y107": "IO_L21N_T3_DQS_34",
            "IOB_X1Y108": "IO_L21P_T3_DQS_34"
        },
        "sites": {
            "IOB_X1Y107": "IOB33S",
            "IOB_X1Y108": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 146,
        "pin_functions": {
            "IOB_X1Y109": "IO_L20N_T3_34",
            "IOB_X1Y110": "IO_L20P_T3_34"
        },
        "sites": {
            "IOB_X1Y109": "IOB33S",
            "IOB_X1Y110": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 144,
        "pin_functions": {
            "IOB_X1Y111": "IO_L19N_T3_VREF_34",
            "IOB_X1Y112": "IO_L19P_T3_34"
        },
        "sites": {
            "IOB_X1Y111": "IOB33S",
            "IOB_X1Y112": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 142,
        "pin_functions": {
            "IOB_X1Y113": "IO_L18N_T2_34",
            "IOB_X1Y114": "IO_L18P_T2_34"
        },
        "sites": {
            "IOB_X1Y113": "IOB33S",
            "IOB_X1Y114": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 140,
        "pin_functions": {
            "IOB_X1Y115": "IO_L17N_T2_34",
            "IOB_X1Y116": "IO_L17P_T2_34"
        },
        "sites": {
            "IOB_X1Y115": "IOB33S",
            "IOB_X1Y116": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 138,
        "pin_functions": {
            "IOB_X1Y117": "IO_L16N_T2_34",
            "IOB_X1Y118": "IO_L16P_T2_34"
        },
        "sites": {
            "IOB_X1Y117": "IOB33S",
            "IOB_X1Y118": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 136,
        "pin_functions": {
            "IOB_X1Y119": "IO_L15N_T2_DQS_34",
            "IOB_X1Y120": "IO_L15P_T2_DQS_34"
        },
        "sites": {
            "IOB_X1Y119": "IOB33S",
            "IOB_X1Y120": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 134,
        "pin_functions": {
            "IOB_X1Y121": "IO_L14N_T2_SRCC_34",
            "IOB_X1Y122": "IO_L14P_T2_SRCC_34"
        },
        "sites": {
            "IOB_X1Y121": "IOB33S",
            "IOB_X1Y122": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 132,
        "pin_functions": {
            "IOB_X1Y123": "IO_L13N_T2_MRCC_34",
            "IOB_X1Y124": "IO_L13P_T2_MRCC_34"
        },
        "sites": {
            "IOB_X1Y123": "IOB33S",
            "IOB_X1Y124": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 129,
        "pin_functions": {
            "IOB_X1Y125": "IO_L12N_T1_MRCC_34",
            "IOB_X1Y126": "IO_L12P_T1_MRCC_34"
        },
        "sites": {
            "IOB_X1Y125": "IOB33S",
            "IOB_X1Y126": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 127,
        "pin_functions": {
            "IOB_X1Y127": "IO_L11N_T1_SRCC_34",
            "IOB_X1Y128": "IO_L11P_T1_SRCC_34"
        },
        "sites": {
            "IOB_X1Y127": "IOB33S",
            "IOB_X1Y128": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 125,
        "pin_functions": {
            "IOB_X1Y129": "IO_L10N_T1_34",
            "IOB_X1Y130": "IO_L10P_T1_34"
        },
        "sites": {
            "IOB_X1Y129": "IOB33S",
            "IOB_X1Y130": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 123,
        "pin_functions": {
            "IOB_X1Y131": "IO_L9N_T1_DQS_34",
            "IOB_X1Y132": "IO_L9P_T1_DQS_34"
        },
        "sites": {
            "IOB_X1Y131": "IOB33S",
            "IOB_X1Y132": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 121,
        "pin_functions": {
            "IOB_X1Y133": "IO_L8N_T1_34",
            "IOB_X1Y134": "IO_L8P_T1_34"
        },
        "sites": {
            "IOB_X1Y133": "IOB33S",
            "IOB_X1Y134": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 119,
        "pin_functions": {
            "IOB_X1Y135": "IO_L7N_T1_34",
            "IOB_X1Y136": "IO_L7P_T1_34"
        },
        "sites": {
            "IOB_X1Y135": "IOB33S",
            "IOB_X1Y136": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 117,
        "pin_functions": {
            "IOB_X1Y137": "IO_L6N_T0_VREF_34",
            "IOB_X1Y138": "IO_L6P_T0_34"
        },
        "sites": {
            "IOB_X1Y137": "IOB33S",
            "IOB_X1Y138": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 115,
        "pin_functions": {
            "IOB_X1Y139": "IO_L5N_T0_34",
            "IOB_X1Y140": "IO_L5P_T0_34"
        },
        "sites": {
            "IOB_X1Y139": "IOB33S",
            "IOB_X1Y140": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 113,
        "pin_functions": {
            "IOB_X1Y141": "IO_L4N_T0_34",
            "IOB_X1Y142": "IO_L4P_T0_34"
        },
        "sites": {
            "IOB_X1Y141": "IOB33S",
            "IOB_X1Y142": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 111,
        "pin_functions": {
            "IOB_X1Y143": "IO_L3N_T0_DQS_34",
            "IOB_X1Y144": "IO_L3P_T0_DQS_34"
        },
        "sites": {
            "IOB_X1Y143": "IOB33S",
            "IOB_X1Y144": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 109,
        "pin_functions": {
            "IOB_X1Y145": "IO_L2N_T0_34",
            "IOB_X1Y146": "IO_L2P_T0_34"
        },
        "sites": {
            "IOB_X1Y145": "IOB33S",
            "IOB_X1Y146": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 264,
        "grid_y": 107,
        "pin_functions": {
            "IOB_X1Y147": "IO_L1N_T0_34",
            "IOB_X1Y148": "IO_L1P_T0_34"
        },
        "sites": {
            "IOB_X1Y147": "IOB33S",
            "IOB_X1Y148": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y151": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 102,
        "pin_functions": {
            "IOB_X1Y151": "IO_L24N_T3_35",
            "IOB_X1Y152": "IO_L24P_T3_35"
        },
        "sites": {
            "IOB_X1Y151": "IOB33S",
            "IOB_X1Y152": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y153": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 100,
        "pin_functions": {
            "IOB_X1Y153": "IO_L23N_T3_35",
            "IOB_X1Y154": "IO_L23P_T3_35"
        },
        "sites": {
            "IOB_X1Y153": "IOB33S",
            "IOB_X1Y154": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 98,
        "pin_functions": {
            "IOB_X1Y155": "IO_L22N_T3_35",
            "IOB_X1Y156": "IO_L22P_T3_35"
        },
        "sites": {
            "IOB_X1Y155": "IOB33S",
            "IOB_X1Y156": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y157": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 96,
        "pin_functions": {
            "IOB_X1Y157": "IO_L21N_T3_DQS_35",
            "IOB_X1Y158": "IO_L21P_T3_DQS_35"
        },
        "sites": {
            "IOB_X1Y157": "IOB33S",
            "IOB_X1Y158": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y159": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 94,
        "pin_functions": {
            "IOB_X1Y159": "IO_L20N_T3_35",
            "IOB_X1Y160": "IO_L20P_T3_35"
        },
        "sites": {
            "IOB_X1Y159": "IOB33S",
            "IOB_X1Y160": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y161": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 92,
        "pin_functions": {
            "IOB_X1Y161": "IO_L19N_T3_VREF_35",
            "IOB_X1Y162": "IO_L19P_T3_35"
        },
        "sites": {
            "IOB_X1Y161": "IOB33S",
            "IOB_X1Y162": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y163": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 90,
        "pin_functions": {
            "IOB_X1Y163": "IO_L18N_T2_35",
            "IOB_X1Y164": "IO_L18P_T2_35"
        },
        "sites": {
            "IOB_X1Y163": "IOB33S",
            "IOB_X1Y164": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 88,
        "pin_functions": {
            "IOB_X1Y165": "IO_L17N_T2_35",
            "IOB_X1Y166": "IO_L17P_T2_35"
        },
        "sites": {
            "IOB_X1Y165": "IOB33S",
            "IOB_X1Y166": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y167": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 86,
        "pin_functions": {
            "IOB_X1Y167": "IO_L16N_T2_35",
            "IOB_X1Y168": "IO_L16P_T2_35"
        },
        "sites": {
            "IOB_X1Y167": "IOB33S",
            "IOB_X1Y168": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y169": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 84,
        "pin_functions": {
            "IOB_X1Y169": "IO_L15N_T2_DQS_35",
            "IOB_X1Y170": "IO_L15P_T2_DQS_35"
        },
        "sites": {
            "IOB_X1Y169": "IOB33S",
            "IOB_X1Y170": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y171": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 82,
        "pin_functions": {
            "IOB_X1Y171": "IO_L14N_T2_SRCC_35",
            "IOB_X1Y172": "IO_L14P_T2_SRCC_35"
        },
        "sites": {
            "IOB_X1Y171": "IOB33S",
            "IOB_X1Y172": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y173": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 80,
        "pin_functions": {
            "IOB_X1Y173": "IO_L13N_T2_MRCC_35",
            "IOB_X1Y174": "IO_L13P_T2_MRCC_35"
        },
        "sites": {
            "IOB_X1Y173": "IOB33S",
            "IOB_X1Y174": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 77,
        "pin_functions": {
            "IOB_X1Y175": "IO_L12N_T1_MRCC_35",
            "IOB_X1Y176": "IO_L12P_T1_MRCC_35"
        },
        "sites": {
            "IOB_X1Y175": "IOB33S",
            "IOB_X1Y176": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y177": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 75,
        "pin_functions": {
            "IOB_X1Y177": "IO_L11N_T1_SRCC_35",
            "IOB_X1Y178": "IO_L11P_T1_SRCC_35"
        },
        "sites": {
            "IOB_X1Y177": "IOB33S",
            "IOB_X1Y178": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y179": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 73,
        "pin_functions": {
            "IOB_X1Y179": "IO_L10N_T1_AD15N_35",
            "IOB_X1Y180": "IO_L10P_T1_AD15P_35"
        },
        "sites": {
            "IOB_X1Y179": "IOB33S",
            "IOB_X1Y180": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y181": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 71,
        "pin_functions": {
            "IOB_X1Y181": "IO_L9N_T1_DQS_AD7N_35",
            "IOB_X1Y182": "IO_L9P_T1_DQS_AD7P_35"
        },
        "sites": {
            "IOB_X1Y181": "IOB33S",
            "IOB_X1Y182": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y183": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 69,
        "pin_functions": {
            "IOB_X1Y183": "IO_L8N_T1_AD14N_35",
            "IOB_X1Y184": "IO_L8P_T1_AD14P_35"
        },
        "sites": {
            "IOB_X1Y183": "IOB33S",
            "IOB_X1Y184": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 67,
        "pin_functions": {
            "IOB_X1Y185": "IO_L7N_T1_AD6N_35",
            "IOB_X1Y186": "IO_L7P_T1_AD6P_35"
        },
        "sites": {
            "IOB_X1Y185": "IOB33S",
            "IOB_X1Y186": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y187": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 65,
        "pin_functions": {
            "IOB_X1Y187": "IO_L6N_T0_VREF_35",
            "IOB_X1Y188": "IO_L6P_T0_35"
        },
        "sites": {
            "IOB_X1Y187": "IOB33S",
            "IOB_X1Y188": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y189": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 63,
        "pin_functions": {
            "IOB_X1Y189": "IO_L5N_T0_AD13N_35",
            "IOB_X1Y190": "IO_L5P_T0_AD13P_35"
        },
        "sites": {
            "IOB_X1Y189": "IOB33S",
            "IOB_X1Y190": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y191": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 61,
        "pin_functions": {
            "IOB_X1Y191": "IO_L4N_T0_35",
            "IOB_X1Y192": "IO_L4P_T0_35"
        },
        "sites": {
            "IOB_X1Y191": "IOB33S",
            "IOB_X1Y192": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y193": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 59,
        "pin_functions": {
            "IOB_X1Y193": "IO_L3N_T0_DQS_AD5N_35",
            "IOB_X1Y194": "IO_L3P_T0_DQS_AD5P_35"
        },
        "sites": {
            "IOB_X1Y193": "IOB33S",
            "IOB_X1Y194": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 57,
        "pin_functions": {
            "IOB_X1Y195": "IO_L2N_T0_AD12N_35",
            "IOB_X1Y196": "IO_L2P_T0_AD12P_35"
        },
        "sites": {
            "IOB_X1Y195": "IOB33S",
            "IOB_X1Y196": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y197": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 264,
        "grid_y": 55,
        "pin_functions": {
            "IOB_X1Y197": "IO_L1N_T0_AD4N_35",
            "IOB_X1Y198": "IO_L1P_T0_AD4P_35"
        },
        "sites": {
            "IOB_X1Y197": "IOB33S",
            "IOB_X1Y198": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y201": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 50,
        "pin_functions": {
            "IOB_X1Y201": "IO_L24N_T3_36",
            "IOB_X1Y202": "IO_L24P_T3_36"
        },
        "sites": {
            "IOB_X1Y201": "IOB33S",
            "IOB_X1Y202": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y203": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 48,
        "pin_functions": {
            "IOB_X1Y203": "IO_L23N_T3_36",
            "IOB_X1Y204": "IO_L23P_T3_36"
        },
        "sites": {
            "IOB_X1Y203": "IOB33S",
            "IOB_X1Y204": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y205": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 46,
        "pin_functions": {
            "IOB_X1Y205": "IO_L22N_T3_36",
            "IOB_X1Y206": "IO_L22P_T3_36"
        },
        "sites": {
            "IOB_X1Y205": "IOB33S",
            "IOB_X1Y206": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y207": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 44,
        "pin_functions": {
            "IOB_X1Y207": "IO_L21N_T3_DQS_36",
            "IOB_X1Y208": "IO_L21P_T3_DQS_36"
        },
        "sites": {
            "IOB_X1Y207": "IOB33S",
            "IOB_X1Y208": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y209": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 42,
        "pin_functions": {
            "IOB_X1Y209": "IO_L20N_T3_36",
            "IOB_X1Y210": "IO_L20P_T3_36"
        },
        "sites": {
            "IOB_X1Y209": "IOB33S",
            "IOB_X1Y210": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y211": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 40,
        "pin_functions": {
            "IOB_X1Y211": "IO_L19N_T3_VREF_36",
            "IOB_X1Y212": "IO_L19P_T3_36"
        },
        "sites": {
            "IOB_X1Y211": "IOB33S",
            "IOB_X1Y212": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y213": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 38,
        "pin_functions": {
            "IOB_X1Y213": "IO_L18N_T2_36",
            "IOB_X1Y214": "IO_L18P_T2_36"
        },
        "sites": {
            "IOB_X1Y213": "IOB33S",
            "IOB_X1Y214": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y215": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 36,
        "pin_functions": {
            "IOB_X1Y215": "IO_L17N_T2_36",
            "IOB_X1Y216": "IO_L17P_T2_36"
        },
        "sites": {
            "IOB_X1Y215": "IOB33S",
            "IOB_X1Y216": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y217": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 34,
        "pin_functions": {
            "IOB_X1Y217": "IO_L16N_T2_36",
            "IOB_X1Y218": "IO_L16P_T2_36"
        },
        "sites": {
            "IOB_X1Y217": "IOB33S",
            "IOB_X1Y218": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y219": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 32,
        "pin_functions": {
            "IOB_X1Y219": "IO_L15N_T2_DQS_36",
            "IOB_X1Y220": "IO_L15P_T2_DQS_36"
        },
        "sites": {
            "IOB_X1Y219": "IOB33S",
            "IOB_X1Y220": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y221": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 30,
        "pin_functions": {
            "IOB_X1Y221": "IO_L14N_T2_SRCC_36",
            "IOB_X1Y222": "IO_L14P_T2_SRCC_36"
        },
        "sites": {
            "IOB_X1Y221": "IOB33S",
            "IOB_X1Y222": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y223": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 28,
        "pin_functions": {
            "IOB_X1Y223": "IO_L13N_T2_MRCC_36",
            "IOB_X1Y224": "IO_L13P_T2_MRCC_36"
        },
        "sites": {
            "IOB_X1Y223": "IOB33S",
            "IOB_X1Y224": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y225": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 25,
        "pin_functions": {
            "IOB_X1Y225": "IO_L12N_T1_MRCC_36",
            "IOB_X1Y226": "IO_L12P_T1_MRCC_36"
        },
        "sites": {
            "IOB_X1Y225": "IOB33S",
            "IOB_X1Y226": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y227": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 23,
        "pin_functions": {
            "IOB_X1Y227": "IO_L11N_T1_SRCC_36",
            "IOB_X1Y228": "IO_L11P_T1_SRCC_36"
        },
        "sites": {
            "IOB_X1Y227": "IOB33S",
            "IOB_X1Y228": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y229": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 21,
        "pin_functions": {
            "IOB_X1Y229": "IO_L10N_T1_36",
            "IOB_X1Y230": "IO_L10P_T1_36"
        },
        "sites": {
            "IOB_X1Y229": "IOB33S",
            "IOB_X1Y230": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y231": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 19,
        "pin_functions": {
            "IOB_X1Y231": "IO_L9N_T1_DQS_36",
            "IOB_X1Y232": "IO_L9P_T1_DQS_36"
        },
        "sites": {
            "IOB_X1Y231": "IOB33S",
            "IOB_X1Y232": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y233": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 17,
        "pin_functions": {
            "IOB_X1Y233": "IO_L8N_T1_36",
            "IOB_X1Y234": "IO_L8P_T1_36"
        },
        "sites": {
            "IOB_X1Y233": "IOB33S",
            "IOB_X1Y234": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y235": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 15,
        "pin_functions": {
            "IOB_X1Y235": "IO_L7N_T1_36",
            "IOB_X1Y236": "IO_L7P_T1_36"
        },
        "sites": {
            "IOB_X1Y235": "IOB33S",
            "IOB_X1Y236": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y237": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 13,
        "pin_functions": {
            "IOB_X1Y237": "IO_L6N_T0_VREF_36",
            "IOB_X1Y238": "IO_L6P_T0_36"
        },
        "sites": {
            "IOB_X1Y237": "IOB33S",
            "IOB_X1Y238": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y239": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 11,
        "pin_functions": {
            "IOB_X1Y239": "IO_L5N_T0_36",
            "IOB_X1Y240": "IO_L5P_T0_36"
        },
        "sites": {
            "IOB_X1Y239": "IOB33S",
            "IOB_X1Y240": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y241": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 9,
        "pin_functions": {
            "IOB_X1Y241": "IO_L4N_T0_36",
            "IOB_X1Y242": "IO_L4P_T0_36"
        },
        "sites": {
            "IOB_X1Y241": "IOB33S",
            "IOB_X1Y242": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y243": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 7,
        "pin_functions": {
            "IOB_X1Y243": "IO_L3N_T0_DQS_36",
            "IOB_X1Y244": "IO_L3P_T0_DQS_36"
        },
        "sites": {
            "IOB_X1Y243": "IOB33S",
            "IOB_X1Y244": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y245": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 5,
        "pin_functions": {
            "IOB_X1Y245": "IO_L2N_T0_36",
            "IOB_X1Y246": "IO_L2P_T0_36"
        },
        "sites": {
            "IOB_X1Y245": "IOB33S",
            "IOB_X1Y246": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X105Y247": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 264,
        "grid_y": 3,
        "pin_functions": {
            "IOB_X1Y247": "IO_L1N_T0_36",
            "IOB_X1Y248": "IO_L1P_T0_36"
        },
        "sites": {
            "IOB_X1Y247": "IOB33S",
            "IOB_X1Y248": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOI3_SING_X105Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 263,
        "grid_y": 259,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y0": "IDELAYE2",
            "ILOGIC_X1Y0": "ILOGICE3",
            "OLOGIC_X1Y0": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X105Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00443480",
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                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 263,
        "grid_y": 209,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y49": "IDELAYE2",
            "ILOGIC_X1Y49": "ILOGICE3",
            "OLOGIC_X1Y49": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X105Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 263,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y50": "IDELAYE2",
            "ILOGIC_X1Y50": "ILOGICE3",
            "OLOGIC_X1Y50": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X105Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00423480",
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                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 263,
        "grid_y": 157,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y99": "IDELAYE2",
            "ILOGIC_X1Y99": "ILOGICE3",
            "OLOGIC_X1Y99": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X105Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 263,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y100": "IDELAYE2",
            "ILOGIC_X1Y100": "ILOGICE3",
            "OLOGIC_X1Y100": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X105Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 263,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y149": "IDELAYE2",
            "ILOGIC_X1Y149": "ILOGICE3",
            "OLOGIC_X1Y149": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X105Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 263,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y150": "IDELAYE2",
            "ILOGIC_X1Y150": "ILOGICE3",
            "OLOGIC_X1Y150": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X105Y199": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00003480",
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                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 263,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y199": "IDELAYE2",
            "ILOGIC_X1Y199": "ILOGICE3",
            "OLOGIC_X1Y199": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X105Y200": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 263,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y200": "IDELAYE2",
            "ILOGIC_X1Y200": "ILOGICE3",
            "OLOGIC_X1Y200": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X105Y249": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 263,
        "grid_y": 1,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y249": "IDELAYE2",
            "ILOGIC_X1Y249": "ILOGICE3",
            "OLOGIC_X1Y249": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_TBYTESRC_X105Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 263,
        "grid_y": 252,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y7": "IDELAYE2",
            "IDELAY_X1Y8": "IDELAYE2",
            "ILOGIC_X1Y7": "ILOGICE3",
            "ILOGIC_X1Y8": "ILOGICE3",
            "OLOGIC_X1Y7": "OLOGICE3",
            "OLOGIC_X1Y8": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X105Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 263,
        "grid_y": 240,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y19": "IDELAYE2",
            "IDELAY_X1Y20": "IDELAYE2",
            "ILOGIC_X1Y19": "ILOGICE3",
            "ILOGIC_X1Y20": "ILOGICE3",
            "OLOGIC_X1Y19": "OLOGICE3",
            "OLOGIC_X1Y20": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X105Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 263,
        "grid_y": 227,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y31": "IDELAYE2",
            "IDELAY_X1Y32": "IDELAYE2",
            "ILOGIC_X1Y31": "ILOGICE3",
            "ILOGIC_X1Y32": "ILOGICE3",
            "OLOGIC_X1Y31": "OLOGICE3",
            "OLOGIC_X1Y32": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X105Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00443480",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 263,
        "grid_y": 215,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y43": "IDELAYE2",
            "IDELAY_X1Y44": "IDELAYE2",
            "ILOGIC_X1Y43": "ILOGICE3",
            "ILOGIC_X1Y44": "ILOGICE3",
            "OLOGIC_X1Y43": "OLOGICE3",
            "OLOGIC_X1Y44": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X105Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 263,
        "grid_y": 200,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y57": "IDELAYE2",
            "IDELAY_X1Y58": "IDELAYE2",
            "ILOGIC_X1Y57": "ILOGICE3",
            "ILOGIC_X1Y58": "ILOGICE3",
            "OLOGIC_X1Y57": "OLOGICE3",
            "OLOGIC_X1Y58": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X105Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 263,
        "grid_y": 188,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y69": "IDELAYE2",
            "IDELAY_X1Y70": "IDELAYE2",
            "ILOGIC_X1Y69": "ILOGICE3",
            "ILOGIC_X1Y70": "ILOGICE3",
            "OLOGIC_X1Y69": "OLOGICE3",
            "OLOGIC_X1Y70": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X105Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 263,
        "grid_y": 175,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y81": "IDELAYE2",
            "IDELAY_X1Y82": "IDELAYE2",
            "ILOGIC_X1Y81": "ILOGICE3",
            "ILOGIC_X1Y82": "ILOGICE3",
            "OLOGIC_X1Y81": "OLOGICE3",
            "OLOGIC_X1Y82": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X105Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00423480",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 263,
        "grid_y": 163,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y93": "IDELAYE2",
            "IDELAY_X1Y94": "IDELAYE2",
            "ILOGIC_X1Y93": "ILOGICE3",
            "ILOGIC_X1Y94": "ILOGICE3",
            "OLOGIC_X1Y93": "OLOGICE3",
            "OLOGIC_X1Y94": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X105Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 263,
        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y107": "IDELAYE2",
            "IDELAY_X1Y108": "IDELAYE2",
            "ILOGIC_X1Y107": "ILOGICE3",
            "ILOGIC_X1Y108": "ILOGICE3",
            "OLOGIC_X1Y107": "OLOGICE3",
            "OLOGIC_X1Y108": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X105Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 263,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y119": "IDELAYE2",
            "IDELAY_X1Y120": "IDELAYE2",
            "ILOGIC_X1Y119": "ILOGICE3",
            "ILOGIC_X1Y120": "ILOGICE3",
            "OLOGIC_X1Y119": "OLOGICE3",
            "OLOGIC_X1Y120": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X105Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 263,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y131": "IDELAYE2",
            "IDELAY_X1Y132": "IDELAYE2",
            "ILOGIC_X1Y131": "ILOGICE3",
            "ILOGIC_X1Y132": "ILOGICE3",
            "OLOGIC_X1Y131": "OLOGICE3",
            "OLOGIC_X1Y132": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X105Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00403480",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 263,
        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y143": "IDELAYE2",
            "IDELAY_X1Y144": "IDELAYE2",
            "ILOGIC_X1Y143": "ILOGICE3",
            "ILOGIC_X1Y144": "ILOGICE3",
            "OLOGIC_X1Y143": "OLOGICE3",
            "OLOGIC_X1Y144": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X105Y157": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 263,
        "grid_y": 96,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y157": "IDELAYE2",
            "IDELAY_X1Y158": "IDELAYE2",
            "ILOGIC_X1Y157": "ILOGICE3",
            "ILOGIC_X1Y158": "ILOGICE3",
            "OLOGIC_X1Y157": "OLOGICE3",
            "OLOGIC_X1Y158": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X105Y169": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 263,
        "grid_y": 84,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y169": "IDELAYE2",
            "IDELAY_X1Y170": "IDELAYE2",
            "ILOGIC_X1Y169": "ILOGICE3",
            "ILOGIC_X1Y170": "ILOGICE3",
            "OLOGIC_X1Y169": "OLOGICE3",
            "OLOGIC_X1Y170": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X105Y181": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 263,
        "grid_y": 71,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y181": "IDELAYE2",
            "IDELAY_X1Y182": "IDELAYE2",
            "ILOGIC_X1Y181": "ILOGICE3",
            "ILOGIC_X1Y182": "ILOGICE3",
            "OLOGIC_X1Y181": "OLOGICE3",
            "OLOGIC_X1Y182": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X105Y193": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00003480",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 263,
        "grid_y": 59,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y193": "IDELAYE2",
            "IDELAY_X1Y194": "IDELAYE2",
            "ILOGIC_X1Y193": "ILOGICE3",
            "ILOGIC_X1Y194": "ILOGICE3",
            "OLOGIC_X1Y193": "OLOGICE3",
            "OLOGIC_X1Y194": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X105Y207": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 263,
        "grid_y": 44,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y207": "IDELAYE2",
            "IDELAY_X1Y208": "IDELAYE2",
            "ILOGIC_X1Y207": "ILOGICE3",
            "ILOGIC_X1Y208": "ILOGICE3",
            "OLOGIC_X1Y207": "OLOGICE3",
            "OLOGIC_X1Y208": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X105Y219": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 263,
        "grid_y": 32,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y219": "IDELAYE2",
            "IDELAY_X1Y220": "IDELAYE2",
            "ILOGIC_X1Y219": "ILOGICE3",
            "ILOGIC_X1Y220": "ILOGICE3",
            "OLOGIC_X1Y219": "OLOGICE3",
            "OLOGIC_X1Y220": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X105Y231": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 263,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y231": "IDELAYE2",
            "IDELAY_X1Y232": "IDELAYE2",
            "ILOGIC_X1Y231": "ILOGICE3",
            "ILOGIC_X1Y232": "ILOGICE3",
            "OLOGIC_X1Y231": "OLOGICE3",
            "OLOGIC_X1Y232": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X105Y243": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00023480",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y4",
        "grid_x": 263,
        "grid_y": 7,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y243": "IDELAYE2",
            "IDELAY_X1Y244": "IDELAYE2",
            "ILOGIC_X1Y243": "ILOGICE3",
            "ILOGIC_X1Y244": "ILOGICE3",
            "OLOGIC_X1Y243": "OLOGICE3",
            "OLOGIC_X1Y244": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTETERM_X105Y13": {
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