diff --git a/Info.md b/Info.md
index faf54c0..29ebc10 100644
--- a/Info.md
+++ b/Info.md
@@ -37,20 +37,20 @@
 
 # Details
 
-Last updated on Wed Mar 13 22:16:59 UTC 2019 (2019-03-13T22:16:59+00:00).
+Last updated on Thu Mar 21 21:13:39 UTC 2019 (2019-03-21T21:13:39+00:00).
 
-Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [45a8af8](https://github.com/SymbiFlow/prjxray/commit/45a8af8d71c285e7115112c564e5d46b6c81dd97).
+Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [c82efce](https://github.com/SymbiFlow/prjxray/commit/c82efce96a5468775289d0892924217369cfa216).
 
 Latest commit was;
 ```
-commit 45a8af8d71c285e7115112c564e5d46b6c81dd97
-Merge: 2389645 1f53d57
+commit c82efce96a5468775289d0892924217369cfa216
+Merge: 1775858 5a7102c
 Author: litghost <537074+litghost@users.noreply.github.com>
-Date:   Tue Mar 12 13:43:29 2019 -0700
+Date:   Thu Mar 21 08:26:06 2019 -0700
 
-    Merge pull request #715 from litghost/fix_pip_list
+    Merge pull request #735 from SymbiFlow/dependabot/submodules/third_party/googletest-f957bd0
     
-    Fix 048 not using correct directory.
+    Bump third_party/googletest from `8b6d3f9` to `f957bd0`
 ```
 
 
@@ -59,7 +59,7 @@
 
 ### Settings
 
-Created using following [settings/artix7.sh (sha256: 26e1ff93657132928a3b583c95347267d7afeb18a7b7036f0d7a6ea3367ae803)](https://github.com/SymbiFlow/prjxray/blob/45a8af8d71c285e7115112c564e5d46b6c81dd97/settings/artix7.sh)
+Created using following [settings/artix7.sh (sha256: 26e1ff93657132928a3b583c95347267d7afeb18a7b7036f0d7a6ea3367ae803)](https://github.com/SymbiFlow/prjxray/blob/c82efce96a5468775289d0892924217369cfa216/settings/artix7.sh)
 ```shell
 export XRAY_DATABASE="artix7"
 export XRAY_PART="xc7a50tfgg484-1"
@@ -126,8 +126,8 @@
  * [`aab2e5f20890d805b6a78db6e6fd68d6024a140ac5e960feb4162d7e49582ca8  ./artix7/mask_dsp_r.db`](./artix7/mask_dsp_r.db)
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./artix7/mask_hclk_l.db`](./artix7/mask_hclk_l.db)
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./artix7/mask_hclk_r.db`](./artix7/mask_hclk_r.db)
- * [`2e2903784928e691e260cf453f1d1949d74634c6461c8e00f9b501041eaaec9e  ./artix7/mask_liob33.db`](./artix7/mask_liob33.db)
- * [`2e2903784928e691e260cf453f1d1949d74634c6461c8e00f9b501041eaaec9e  ./artix7/mask_riob33.db`](./artix7/mask_riob33.db)
+ * [`0cbad55ccd00e0bab154cf4462e0bf9897f3fe1f8a5a29f9106df29f76b585fc  ./artix7/mask_liob33.db`](./artix7/mask_liob33.db)
+ * [`0cbad55ccd00e0bab154cf4462e0bf9897f3fe1f8a5a29f9106df29f76b585fc  ./artix7/mask_riob33.db`](./artix7/mask_riob33.db)
  * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf  ./artix7/ppips_bram_int_interface_l.db`](./artix7/ppips_bram_int_interface_l.db)
  * [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae  ./artix7/ppips_bram_int_interface_r.db`](./artix7/ppips_bram_int_interface_r.db)
  * [`2c68f8b128aeb79197013c3a1774522143a3507a8fa595a98c22dba2553fd5ce  ./artix7/ppips_bram_l.db`](./artix7/ppips_bram_l.db)
@@ -136,12 +136,22 @@
  * [`bb75573609f56f082544644ecbb39125d023809340f7a30180cb9df823585009  ./artix7/ppips_clbll_r.db`](./artix7/ppips_clbll_r.db)
  * [`a5357b0c018ac9c8c1f8cccf3c36b69f66ffd0e29039dfadb5a829caafd71a73  ./artix7/ppips_clblm_l.db`](./artix7/ppips_clblm_l.db)
  * [`15424ecbd5816143def2dcb20fc9cfae5ec4e11a1a5cfc1848e71b2904a1a713  ./artix7/ppips_clblm_r.db`](./artix7/ppips_clblm_r.db)
+ * [`77fba62caedba6632e55834bbc40ff797181d8825e2f4d55987a04a38a95a6c0  ./artix7/ppips_clk_bufg_bot_r.db`](./artix7/ppips_clk_bufg_bot_r.db)
+ * [`15dba278ba801744b1ed558220334899fc098acd8e8aff20ab9761249a70e839  ./artix7/ppips_clk_bufg_top_r.db`](./artix7/ppips_clk_bufg_top_r.db)
+ * [`0dbef414182c3ef9054f4b9bc15c41c435d4bef2db30850add728d3de93749b8  ./artix7/ppips_clk_hrow_bot_r.db`](./artix7/ppips_clk_hrow_bot_r.db)
+ * [`8774624d8398b6000e80cefbcf5a5bac095e1c8650772c23f9b73448e0df5dbb  ./artix7/ppips_clk_hrow_top_r.db`](./artix7/ppips_clk_hrow_top_r.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/ppips_dsp_l.db`](./artix7/ppips_dsp_l.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/ppips_dsp_r.db`](./artix7/ppips_dsp_r.db)
- * [`6d35b568a51f9b6761da2470a71738b2477ef72c16068a529ae8eb52b65bf17a  ./artix7/ppips_hclk_l.db`](./artix7/ppips_hclk_l.db)
- * [`81e0696179a33bdf8d2279a53b406911a403d50224355e9ad29eccee01a70305  ./artix7/ppips_hclk_r.db`](./artix7/ppips_hclk_r.db)
  * [`d300ad4128a192e416a958471013b7554f141fd1f816715828b1e5a87838f18d  ./artix7/ppips_int_l.db`](./artix7/ppips_int_l.db)
  * [`46564e746b8d9e37bf46a68f2915bd1395efb68508d48d336a4dfb9342105285  ./artix7/ppips_int_r.db`](./artix7/ppips_int_r.db)
+ * [`916e3cea00e0bf8291ae24083696833dc1ff09f06562eccba6f2c73afd267ccb  ./artix7/ppips_io_int_interface_l.db`](./artix7/ppips_io_int_interface_l.db)
+ * [`01526db954ab19098931424b8203c98803894b5563b5272fad665f3a75f0bb3b  ./artix7/ppips_io_int_interface_r.db`](./artix7/ppips_io_int_interface_r.db)
+ * [`b155fbb8d964a2c3359a8420c0a6fd11aafccaeee92034e78cd16d2c56d4fcf9  ./artix7/ppips_lioi3.db`](./artix7/ppips_lioi3.db)
+ * [`fbe2cd3174bcec467e55558c497717480808149193c2ee80b51be78580356385  ./artix7/ppips_lioi3_sing.db`](./artix7/ppips_lioi3_sing.db)
+ * [`a28a9783e37b9768245b5e48bcf5876b1c625093544b2cce9408d4d3a846cdf3  ./artix7/ppips_lioi3_tbytesrc.db`](./artix7/ppips_lioi3_tbytesrc.db)
+ * [`df11ac1c71eefa9c06abe06bc932d36368977543fba9666ee1b36e8417cd9f78  ./artix7/ppips_rioi3.db`](./artix7/ppips_rioi3.db)
+ * [`0c6263c13669085c09a61f25d68786d8f6c9b12b162fe2cd6c9a50114106f739  ./artix7/ppips_rioi3_sing.db`](./artix7/ppips_rioi3_sing.db)
+ * [`76c5978b345f11a9e46733a98875a6c419b75cf863a0e42d05e9ac94f9795bfc  ./artix7/ppips_rioi3_tbytesrc.db`](./artix7/ppips_rioi3_tbytesrc.db)
  * [`8a2136e564ac92c06b226ef8715a122050fcabbb063f69eeaf46cfee5c89670f  ./artix7/segbits_bram_l.block_ram.db`](./artix7/segbits_bram_l.block_ram.db)
  * [`53d975bf59b763b9f764106db362ee7f6a753e9e72a5e2be334041658a5ea4ba  ./artix7/segbits_bram_l.db`](./artix7/segbits_bram_l.db)
  * [`a635577b55878c69df492c16b67a1dfbd1d4b786a695abe3e95a62d9540ecea5  ./artix7/segbits_bram_r.block_ram.db`](./artix7/segbits_bram_r.block_ram.db)
@@ -334,7 +344,7 @@
 
 ### Settings
 
-Created using following [settings/kintex7.sh (sha256: 794538b550d399255cbafeeb1b5ff183dc66ebc6cd8dc0f725e3f6a3977f757d)](https://github.com/SymbiFlow/prjxray/blob/45a8af8d71c285e7115112c564e5d46b6c81dd97/settings/kintex7.sh)
+Created using following [settings/kintex7.sh (sha256: 794538b550d399255cbafeeb1b5ff183dc66ebc6cd8dc0f725e3f6a3977f757d)](https://github.com/SymbiFlow/prjxray/blob/c82efce96a5468775289d0892924217369cfa216/settings/kintex7.sh)
 ```shell
 export XRAY_DATABASE="kintex7"
 export XRAY_PART="xc7k70tfbg676-2"
@@ -595,7 +605,7 @@
 
 ### Settings
 
-Created using following [settings/zynq7.sh (sha256: 61298e89dcc873eadba47f5c2f9f72a38fa022583b2c7ff89246b2e051585ad8)](https://github.com/SymbiFlow/prjxray/blob/45a8af8d71c285e7115112c564e5d46b6c81dd97/settings/zynq7.sh)
+Created using following [settings/zynq7.sh (sha256: 61298e89dcc873eadba47f5c2f9f72a38fa022583b2c7ff89246b2e051585ad8)](https://github.com/SymbiFlow/prjxray/blob/c82efce96a5468775289d0892924217369cfa216/settings/zynq7.sh)
 ```shell
 export XRAY_DATABASE="zynq7"
 export XRAY_PART="xc7z010clg400-1"
diff --git a/artix7/mask_liob33.db b/artix7/mask_liob33.db
index cfd39b4..c90c862 100644
--- a/artix7/mask_liob33.db
+++ b/artix7/mask_liob33.db
@@ -1,4 +1,5 @@
 bit 00_02
+bit 00_05
 bit 00_07
 bit 00_09
 bit 00_10
@@ -17,9 +18,7 @@
 bit 00_51
 bit 00_54
 bit 00_58
-bit 00_65
 bit 00_66
-bit 00_67
 bit 00_71
 bit 00_73
 bit 00_75
@@ -52,7 +51,6 @@
 bit 01_40
 bit 01_41
 bit 01_44
-bit 01_45
 bit 01_50
 bit 01_58
 bit 01_64
@@ -78,6 +76,7 @@
 bit 02_06
 bit 02_07
 bit 02_09
+bit 02_10
 bit 02_11
 bit 02_13
 bit 02_14
@@ -92,18 +91,16 @@
 bit 02_38
 bit 02_39
 bit 02_46
-bit 02_47
 bit 02_50
 bit 02_51
 bit 02_54
 bit 02_55
 bit 02_62
 bit 02_63
-bit 02_66
-bit 02_67
 bit 02_69
 bit 02_70
 bit 02_71
+bit 02_73
 bit 02_74
 bit 02_75
 bit 02_77
@@ -114,26 +111,23 @@
 bit 02_87
 bit 02_94
 bit 02_95
-bit 02_98
 bit 02_102
 bit 02_103
 bit 02_114
 bit 02_115
+bit 02_117
 bit 02_118
 bit 02_119
 bit 02_126
 bit 02_127
 bit 03_02
-bit 03_05
 bit 03_06
 bit 03_10
 bit 03_13
 bit 03_14
-bit 03_21
 bit 03_29
+bit 03_36
 bit 03_37
-bit 03_38
-bit 03_45
 bit 03_52
 bit 03_53
 bit 03_54
@@ -144,17 +138,19 @@
 bit 03_69
 bit 03_70
 bit 03_74
+bit 03_76
 bit 03_77
 bit 03_78
+bit 03_85
 bit 03_86
 bit 03_93
 bit 03_102
 bit 03_109
+bit 03_116
 bit 03_117
 bit 03_118
 bit 03_126
 bit 04_04
-bit 04_05
 bit 04_06
 bit 04_07
 bit 04_10
@@ -171,23 +167,21 @@
 bit 04_28
 bit 04_30
 bit 04_31
-bit 04_32
 bit 04_35
 bit 04_36
 bit 04_37
 bit 04_39
-bit 04_44
 bit 04_47
 bit 04_51
 bit 04_52
 bit 04_53
 bit 04_55
+bit 04_60
 bit 04_63
 bit 04_66
 bit 04_68
 bit 04_69
 bit 04_70
-bit 04_72
 bit 04_74
 bit 04_75
 bit 04_76
@@ -199,6 +193,7 @@
 bit 04_86
 bit 04_87
 bit 04_94
+bit 04_95
 bit 04_100
 bit 04_101
 bit 04_103
@@ -222,20 +217,17 @@
 bit 05_25
 bit 05_26
 bit 05_28
-bit 05_30
 bit 05_33
 bit 05_34
 bit 05_36
 bit 05_37
 bit 05_38
-bit 05_44
-bit 05_46
+bit 05_42
 bit 05_49
 bit 05_50
 bit 05_52
 bit 05_53
 bit 05_54
-bit 05_55
 bit 05_58
 bit 05_60
 bit 05_62
@@ -253,7 +245,6 @@
 bit 05_86
 bit 05_89
 bit 05_94
-bit 05_98
 bit 05_101
 bit 05_102
 bit 05_108
@@ -261,7 +252,8 @@
 bit 05_114
 bit 05_116
 bit 05_117
-bit 05_118
+bit 05_119
+bit 05_126
 bit 06_01
 bit 06_02
 bit 06_03
@@ -275,17 +267,19 @@
 bit 06_14
 bit 06_15
 bit 06_17
+bit 06_19
 bit 06_20
 bit 06_22
 bit 06_24
+bit 06_27
 bit 06_28
-bit 06_29
 bit 06_30
 bit 06_31
 bit 06_33
 bit 06_35
 bit 06_36
 bit 06_37
+bit 06_39
 bit 06_43
 bit 06_46
 bit 06_49
@@ -311,7 +305,6 @@
 bit 06_77
 bit 06_78
 bit 06_79
-bit 06_80
 bit 06_81
 bit 06_83
 bit 06_84
@@ -331,7 +324,6 @@
 bit 06_113
 bit 06_115
 bit 06_116
-bit 06_117
 bit 06_119
 bit 06_121
 bit 06_123
@@ -351,6 +343,7 @@
 bit 07_15
 bit 07_16
 bit 07_19
+bit 07_20
 bit 07_22
 bit 07_23
 bit 07_24
@@ -368,6 +361,7 @@
 bit 07_38
 bit 07_39
 bit 07_40
+bit 07_43
 bit 07_44
 bit 07_46
 bit 07_47
@@ -379,27 +373,29 @@
 bit 07_54
 bit 07_55
 bit 07_56
+bit 07_58
 bit 07_59
 bit 07_60
 bit 07_62
 bit 07_63
 bit 07_64
-bit 07_65
+bit 07_66
 bit 07_67
 bit 07_68
 bit 07_69
 bit 07_70
 bit 07_71
 bit 07_72
+bit 07_74
 bit 07_75
 bit 07_76
 bit 07_77
 bit 07_78
 bit 07_79
 bit 07_80
-bit 07_81
 bit 07_82
 bit 07_83
+bit 07_84
 bit 07_86
 bit 07_87
 bit 07_88
@@ -409,7 +405,6 @@
 bit 07_95
 bit 07_96
 bit 07_98
-bit 07_99
 bit 07_100
 bit 07_102
 bit 07_103
@@ -447,7 +442,6 @@
 bit 08_18
 bit 08_19
 bit 08_20
-bit 08_21
 bit 08_22
 bit 08_23
 bit 08_24
@@ -489,6 +483,7 @@
 bit 08_66
 bit 08_67
 bit 08_68
+bit 08_69
 bit 08_70
 bit 08_71
 bit 08_72
@@ -517,6 +512,7 @@
 bit 08_97
 bit 08_98
 bit 08_99
+bit 08_101
 bit 08_102
 bit 08_103
 bit 08_104
@@ -552,15 +548,12 @@
 bit 09_11
 bit 09_12
 bit 09_13
-bit 09_14
 bit 09_15
 bit 09_16
 bit 09_18
 bit 09_19
 bit 09_20
-bit 09_21
 bit 09_23
-bit 09_24
 bit 09_26
 bit 09_27
 bit 09_28
@@ -583,6 +576,7 @@
 bit 09_50
 bit 09_51
 bit 09_52
+bit 09_57
 bit 09_58
 bit 09_59
 bit 09_60
@@ -600,6 +594,7 @@
 bit 09_75
 bit 09_77
 bit 09_79
+bit 09_80
 bit 09_82
 bit 09_83
 bit 09_84
@@ -610,7 +605,6 @@
 bit 09_92
 bit 09_93
 bit 09_94
-bit 09_96
 bit 09_98
 bit 09_99
 bit 09_100
@@ -621,7 +615,6 @@
 bit 09_110
 bit 09_111
 bit 09_112
-bit 09_113
 bit 09_114
 bit 09_115
 bit 09_116
@@ -651,10 +644,10 @@
 bit 10_18
 bit 10_19
 bit 10_20
+bit 10_21
 bit 10_22
 bit 10_23
 bit 10_24
-bit 10_25
 bit 10_26
 bit 10_27
 bit 10_28
@@ -680,6 +673,7 @@
 bit 10_52
 bit 10_54
 bit 10_55
+bit 10_56
 bit 10_57
 bit 10_58
 bit 10_61
@@ -696,7 +690,6 @@
 bit 10_72
 bit 10_73
 bit 10_74
-bit 10_75
 bit 10_76
 bit 10_77
 bit 10_78
@@ -719,6 +712,7 @@
 bit 10_97
 bit 10_98
 bit 10_99
+bit 10_100
 bit 10_101
 bit 10_103
 bit 10_104
@@ -730,6 +724,7 @@
 bit 10_113
 bit 10_114
 bit 10_115
+bit 10_116
 bit 10_117
 bit 10_118
 bit 10_119
@@ -741,16 +736,15 @@
 bit 11_01
 bit 11_02
 bit 11_03
-bit 11_04
 bit 11_05
 bit 11_07
-bit 11_08
 bit 11_09
 bit 11_10
 bit 11_11
 bit 11_12
 bit 11_13
 bit 11_15
+bit 11_16
 bit 11_17
 bit 11_18
 bit 11_19
@@ -771,7 +765,6 @@
 bit 11_36
 bit 11_39
 bit 11_41
-bit 11_42
 bit 11_43
 bit 11_45
 bit 11_46
@@ -792,15 +785,14 @@
 bit 11_65
 bit 11_66
 bit 11_67
+bit 11_68
 bit 11_69
 bit 11_71
-bit 11_72
 bit 11_73
 bit 11_74
 bit 11_75
 bit 11_77
 bit 11_79
-bit 11_80
 bit 11_81
 bit 11_82
 bit 11_83
@@ -858,7 +850,6 @@
 bit 12_25
 bit 12_26
 bit 12_27
-bit 12_28
 bit 12_29
 bit 12_30
 bit 12_31
@@ -866,11 +857,14 @@
 bit 12_33
 bit 12_34
 bit 12_35
+bit 12_36
 bit 12_37
+bit 12_38
 bit 12_39
 bit 12_41
 bit 12_42
 bit 12_43
+bit 12_44
 bit 12_45
 bit 12_46
 bit 12_47
@@ -881,6 +875,7 @@
 bit 12_53
 bit 12_54
 bit 12_55
+bit 12_56
 bit 12_57
 bit 12_58
 bit 12_59
@@ -896,10 +891,10 @@
 bit 12_69
 bit 12_70
 bit 12_71
-bit 12_72
 bit 12_73
 bit 12_74
 bit 12_75
+bit 12_76
 bit 12_77
 bit 12_78
 bit 12_79
@@ -915,7 +910,6 @@
 bit 12_93
 bit 12_94
 bit 12_95
-bit 12_96
 bit 12_97
 bit 12_98
 bit 12_99
@@ -931,10 +925,10 @@
 bit 12_113
 bit 12_114
 bit 12_115
+bit 12_116
 bit 12_117
 bit 12_118
 bit 12_119
-bit 12_120
 bit 12_121
 bit 12_122
 bit 12_123
@@ -960,14 +954,13 @@
 bit 13_17
 bit 13_18
 bit 13_19
-bit 13_20
 bit 13_22
 bit 13_23
-bit 13_24
 bit 13_25
 bit 13_26
 bit 13_27
 bit 13_28
+bit 13_29
 bit 13_30
 bit 13_31
 bit 13_32
@@ -975,6 +968,7 @@
 bit 13_34
 bit 13_35
 bit 13_36
+bit 13_38
 bit 13_39
 bit 13_41
 bit 13_42
@@ -989,10 +983,12 @@
 bit 13_53
 bit 13_54
 bit 13_55
+bit 13_56
 bit 13_57
 bit 13_58
 bit 13_59
 bit 13_60
+bit 13_61
 bit 13_62
 bit 13_63
 bit 13_64
@@ -1039,6 +1035,7 @@
 bit 13_106
 bit 13_107
 bit 13_108
+bit 13_109
 bit 13_110
 bit 13_111
 bit 13_112
@@ -1051,7 +1048,6 @@
 bit 13_120
 bit 13_121
 bit 13_122
-bit 13_123
 bit 13_124
 bit 13_125
 bit 13_127
@@ -1063,7 +1059,6 @@
 bit 14_05
 bit 14_06
 bit 14_07
-bit 14_08
 bit 14_09
 bit 14_10
 bit 14_11
@@ -1088,7 +1083,6 @@
 bit 14_34
 bit 14_36
 bit 14_42
-bit 14_46
 bit 14_48
 bit 14_50
 bit 14_52
@@ -1106,6 +1100,7 @@
 bit 14_73
 bit 14_74
 bit 14_75
+bit 14_76
 bit 14_77
 bit 14_78
 bit 14_79
@@ -1114,7 +1109,6 @@
 bit 14_83
 bit 14_84
 bit 14_85
-bit 14_86
 bit 14_87
 bit 14_88
 bit 14_89
@@ -1132,6 +1126,7 @@
 bit 14_112
 bit 14_114
 bit 14_116
+bit 14_120
 bit 14_122
 bit 14_124
 bit 14_126
@@ -1156,6 +1151,7 @@
 bit 15_18
 bit 15_19
 bit 15_20
+bit 15_21
 bit 15_22
 bit 15_23
 bit 15_24
@@ -1176,6 +1172,7 @@
 bit 15_47
 bit 15_49
 bit 15_51
+bit 15_53
 bit 15_55
 bit 15_57
 bit 15_59
@@ -1183,6 +1180,7 @@
 bit 15_63
 bit 15_64
 bit 15_65
+bit 15_66
 bit 15_67
 bit 15_68
 bit 15_69
@@ -1200,6 +1198,7 @@
 bit 15_81
 bit 15_83
 bit 15_84
+bit 15_85
 bit 15_86
 bit 15_87
 bit 15_88
@@ -1321,13 +1320,13 @@
 bit 17_71
 bit 17_73
 bit 17_79
+bit 17_80
 bit 17_85
 bit 17_86
 bit 17_87
 bit 17_88
 bit 17_94
 bit 17_95
-bit 17_96
 bit 17_99
 bit 17_102
 bit 17_103
@@ -1340,6 +1339,7 @@
 bit 17_112
 bit 17_115
 bit 17_118
+bit 17_119
 bit 17_120
 bit 17_121
 bit 17_122
@@ -1358,7 +1358,6 @@
 bit 18_25
 bit 18_30
 bit 18_31
-bit 18_33
 bit 18_34
 bit 18_38
 bit 18_39
@@ -1477,7 +1476,6 @@
 bit 20_21
 bit 20_22
 bit 20_30
-bit 20_32
 bit 20_38
 bit 20_42
 bit 20_43
@@ -1505,7 +1503,6 @@
 bit 20_107
 bit 20_108
 bit 20_110
-bit 20_112
 bit 20_118
 bit 20_119
 bit 20_121
@@ -1553,17 +1550,16 @@
 bit 21_118
 bit 21_121
 bit 21_122
-bit 21_124
 bit 21_126
 bit 22_02
 bit 22_06
-bit 22_07
 bit 22_09
 bit 22_15
 bit 22_16
 bit 22_21
 bit 22_22
 bit 22_23
+bit 22_24
 bit 22_30
 bit 22_31
 bit 22_32
@@ -1579,6 +1575,7 @@
 bit 22_48
 bit 22_51
 bit 22_54
+bit 22_56
 bit 22_57
 bit 22_58
 bit 22_60
@@ -1595,7 +1592,6 @@
 bit 22_88
 bit 22_94
 bit 22_95
-bit 22_96
 bit 22_99
 bit 22_102
 bit 22_103
@@ -1654,6 +1650,7 @@
 bit 23_87
 bit 23_94
 bit 23_95
+bit 23_96
 bit 23_99
 bit 23_102
 bit 23_103
diff --git a/artix7/mask_riob33.db b/artix7/mask_riob33.db
index cfd39b4..c90c862 100644
--- a/artix7/mask_riob33.db
+++ b/artix7/mask_riob33.db
@@ -1,4 +1,5 @@
 bit 00_02
+bit 00_05
 bit 00_07
 bit 00_09
 bit 00_10
@@ -17,9 +18,7 @@
 bit 00_51
 bit 00_54
 bit 00_58
-bit 00_65
 bit 00_66
-bit 00_67
 bit 00_71
 bit 00_73
 bit 00_75
@@ -52,7 +51,6 @@
 bit 01_40
 bit 01_41
 bit 01_44
-bit 01_45
 bit 01_50
 bit 01_58
 bit 01_64
@@ -78,6 +76,7 @@
 bit 02_06
 bit 02_07
 bit 02_09
+bit 02_10
 bit 02_11
 bit 02_13
 bit 02_14
@@ -92,18 +91,16 @@
 bit 02_38
 bit 02_39
 bit 02_46
-bit 02_47
 bit 02_50
 bit 02_51
 bit 02_54
 bit 02_55
 bit 02_62
 bit 02_63
-bit 02_66
-bit 02_67
 bit 02_69
 bit 02_70
 bit 02_71
+bit 02_73
 bit 02_74
 bit 02_75
 bit 02_77
@@ -114,26 +111,23 @@
 bit 02_87
 bit 02_94
 bit 02_95
-bit 02_98
 bit 02_102
 bit 02_103
 bit 02_114
 bit 02_115
+bit 02_117
 bit 02_118
 bit 02_119
 bit 02_126
 bit 02_127
 bit 03_02
-bit 03_05
 bit 03_06
 bit 03_10
 bit 03_13
 bit 03_14
-bit 03_21
 bit 03_29
+bit 03_36
 bit 03_37
-bit 03_38
-bit 03_45
 bit 03_52
 bit 03_53
 bit 03_54
@@ -144,17 +138,19 @@
 bit 03_69
 bit 03_70
 bit 03_74
+bit 03_76
 bit 03_77
 bit 03_78
+bit 03_85
 bit 03_86
 bit 03_93
 bit 03_102
 bit 03_109
+bit 03_116
 bit 03_117
 bit 03_118
 bit 03_126
 bit 04_04
-bit 04_05
 bit 04_06
 bit 04_07
 bit 04_10
@@ -171,23 +167,21 @@
 bit 04_28
 bit 04_30
 bit 04_31
-bit 04_32
 bit 04_35
 bit 04_36
 bit 04_37
 bit 04_39
-bit 04_44
 bit 04_47
 bit 04_51
 bit 04_52
 bit 04_53
 bit 04_55
+bit 04_60
 bit 04_63
 bit 04_66
 bit 04_68
 bit 04_69
 bit 04_70
-bit 04_72
 bit 04_74
 bit 04_75
 bit 04_76
@@ -199,6 +193,7 @@
 bit 04_86
 bit 04_87
 bit 04_94
+bit 04_95
 bit 04_100
 bit 04_101
 bit 04_103
@@ -222,20 +217,17 @@
 bit 05_25
 bit 05_26
 bit 05_28
-bit 05_30
 bit 05_33
 bit 05_34
 bit 05_36
 bit 05_37
 bit 05_38
-bit 05_44
-bit 05_46
+bit 05_42
 bit 05_49
 bit 05_50
 bit 05_52
 bit 05_53
 bit 05_54
-bit 05_55
 bit 05_58
 bit 05_60
 bit 05_62
@@ -253,7 +245,6 @@
 bit 05_86
 bit 05_89
 bit 05_94
-bit 05_98
 bit 05_101
 bit 05_102
 bit 05_108
@@ -261,7 +252,8 @@
 bit 05_114
 bit 05_116
 bit 05_117
-bit 05_118
+bit 05_119
+bit 05_126
 bit 06_01
 bit 06_02
 bit 06_03
@@ -275,17 +267,19 @@
 bit 06_14
 bit 06_15
 bit 06_17
+bit 06_19
 bit 06_20
 bit 06_22
 bit 06_24
+bit 06_27
 bit 06_28
-bit 06_29
 bit 06_30
 bit 06_31
 bit 06_33
 bit 06_35
 bit 06_36
 bit 06_37
+bit 06_39
 bit 06_43
 bit 06_46
 bit 06_49
@@ -311,7 +305,6 @@
 bit 06_77
 bit 06_78
 bit 06_79
-bit 06_80
 bit 06_81
 bit 06_83
 bit 06_84
@@ -331,7 +324,6 @@
 bit 06_113
 bit 06_115
 bit 06_116
-bit 06_117
 bit 06_119
 bit 06_121
 bit 06_123
@@ -351,6 +343,7 @@
 bit 07_15
 bit 07_16
 bit 07_19
+bit 07_20
 bit 07_22
 bit 07_23
 bit 07_24
@@ -368,6 +361,7 @@
 bit 07_38
 bit 07_39
 bit 07_40
+bit 07_43
 bit 07_44
 bit 07_46
 bit 07_47
@@ -379,27 +373,29 @@
 bit 07_54
 bit 07_55
 bit 07_56
+bit 07_58
 bit 07_59
 bit 07_60
 bit 07_62
 bit 07_63
 bit 07_64
-bit 07_65
+bit 07_66
 bit 07_67
 bit 07_68
 bit 07_69
 bit 07_70
 bit 07_71
 bit 07_72
+bit 07_74
 bit 07_75
 bit 07_76
 bit 07_77
 bit 07_78
 bit 07_79
 bit 07_80
-bit 07_81
 bit 07_82
 bit 07_83
+bit 07_84
 bit 07_86
 bit 07_87
 bit 07_88
@@ -409,7 +405,6 @@
 bit 07_95
 bit 07_96
 bit 07_98
-bit 07_99
 bit 07_100
 bit 07_102
 bit 07_103
@@ -447,7 +442,6 @@
 bit 08_18
 bit 08_19
 bit 08_20
-bit 08_21
 bit 08_22
 bit 08_23
 bit 08_24
@@ -489,6 +483,7 @@
 bit 08_66
 bit 08_67
 bit 08_68
+bit 08_69
 bit 08_70
 bit 08_71
 bit 08_72
@@ -517,6 +512,7 @@
 bit 08_97
 bit 08_98
 bit 08_99
+bit 08_101
 bit 08_102
 bit 08_103
 bit 08_104
@@ -552,15 +548,12 @@
 bit 09_11
 bit 09_12
 bit 09_13
-bit 09_14
 bit 09_15
 bit 09_16
 bit 09_18
 bit 09_19
 bit 09_20
-bit 09_21
 bit 09_23
-bit 09_24
 bit 09_26
 bit 09_27
 bit 09_28
@@ -583,6 +576,7 @@
 bit 09_50
 bit 09_51
 bit 09_52
+bit 09_57
 bit 09_58
 bit 09_59
 bit 09_60
@@ -600,6 +594,7 @@
 bit 09_75
 bit 09_77
 bit 09_79
+bit 09_80
 bit 09_82
 bit 09_83
 bit 09_84
@@ -610,7 +605,6 @@
 bit 09_92
 bit 09_93
 bit 09_94
-bit 09_96
 bit 09_98
 bit 09_99
 bit 09_100
@@ -621,7 +615,6 @@
 bit 09_110
 bit 09_111
 bit 09_112
-bit 09_113
 bit 09_114
 bit 09_115
 bit 09_116
@@ -651,10 +644,10 @@
 bit 10_18
 bit 10_19
 bit 10_20
+bit 10_21
 bit 10_22
 bit 10_23
 bit 10_24
-bit 10_25
 bit 10_26
 bit 10_27
 bit 10_28
@@ -680,6 +673,7 @@
 bit 10_52
 bit 10_54
 bit 10_55
+bit 10_56
 bit 10_57
 bit 10_58
 bit 10_61
@@ -696,7 +690,6 @@
 bit 10_72
 bit 10_73
 bit 10_74
-bit 10_75
 bit 10_76
 bit 10_77
 bit 10_78
@@ -719,6 +712,7 @@
 bit 10_97
 bit 10_98
 bit 10_99
+bit 10_100
 bit 10_101
 bit 10_103
 bit 10_104
@@ -730,6 +724,7 @@
 bit 10_113
 bit 10_114
 bit 10_115
+bit 10_116
 bit 10_117
 bit 10_118
 bit 10_119
@@ -741,16 +736,15 @@
 bit 11_01
 bit 11_02
 bit 11_03
-bit 11_04
 bit 11_05
 bit 11_07
-bit 11_08
 bit 11_09
 bit 11_10
 bit 11_11
 bit 11_12
 bit 11_13
 bit 11_15
+bit 11_16
 bit 11_17
 bit 11_18
 bit 11_19
@@ -771,7 +765,6 @@
 bit 11_36
 bit 11_39
 bit 11_41
-bit 11_42
 bit 11_43
 bit 11_45
 bit 11_46
@@ -792,15 +785,14 @@
 bit 11_65
 bit 11_66
 bit 11_67
+bit 11_68
 bit 11_69
 bit 11_71
-bit 11_72
 bit 11_73
 bit 11_74
 bit 11_75
 bit 11_77
 bit 11_79
-bit 11_80
 bit 11_81
 bit 11_82
 bit 11_83
@@ -858,7 +850,6 @@
 bit 12_25
 bit 12_26
 bit 12_27
-bit 12_28
 bit 12_29
 bit 12_30
 bit 12_31
@@ -866,11 +857,14 @@
 bit 12_33
 bit 12_34
 bit 12_35
+bit 12_36
 bit 12_37
+bit 12_38
 bit 12_39
 bit 12_41
 bit 12_42
 bit 12_43
+bit 12_44
 bit 12_45
 bit 12_46
 bit 12_47
@@ -881,6 +875,7 @@
 bit 12_53
 bit 12_54
 bit 12_55
+bit 12_56
 bit 12_57
 bit 12_58
 bit 12_59
@@ -896,10 +891,10 @@
 bit 12_69
 bit 12_70
 bit 12_71
-bit 12_72
 bit 12_73
 bit 12_74
 bit 12_75
+bit 12_76
 bit 12_77
 bit 12_78
 bit 12_79
@@ -915,7 +910,6 @@
 bit 12_93
 bit 12_94
 bit 12_95
-bit 12_96
 bit 12_97
 bit 12_98
 bit 12_99
@@ -931,10 +925,10 @@
 bit 12_113
 bit 12_114
 bit 12_115
+bit 12_116
 bit 12_117
 bit 12_118
 bit 12_119
-bit 12_120
 bit 12_121
 bit 12_122
 bit 12_123
@@ -960,14 +954,13 @@
 bit 13_17
 bit 13_18
 bit 13_19
-bit 13_20
 bit 13_22
 bit 13_23
-bit 13_24
 bit 13_25
 bit 13_26
 bit 13_27
 bit 13_28
+bit 13_29
 bit 13_30
 bit 13_31
 bit 13_32
@@ -975,6 +968,7 @@
 bit 13_34
 bit 13_35
 bit 13_36
+bit 13_38
 bit 13_39
 bit 13_41
 bit 13_42
@@ -989,10 +983,12 @@
 bit 13_53
 bit 13_54
 bit 13_55
+bit 13_56
 bit 13_57
 bit 13_58
 bit 13_59
 bit 13_60
+bit 13_61
 bit 13_62
 bit 13_63
 bit 13_64
@@ -1039,6 +1035,7 @@
 bit 13_106
 bit 13_107
 bit 13_108
+bit 13_109
 bit 13_110
 bit 13_111
 bit 13_112
@@ -1051,7 +1048,6 @@
 bit 13_120
 bit 13_121
 bit 13_122
-bit 13_123
 bit 13_124
 bit 13_125
 bit 13_127
@@ -1063,7 +1059,6 @@
 bit 14_05
 bit 14_06
 bit 14_07
-bit 14_08
 bit 14_09
 bit 14_10
 bit 14_11
@@ -1088,7 +1083,6 @@
 bit 14_34
 bit 14_36
 bit 14_42
-bit 14_46
 bit 14_48
 bit 14_50
 bit 14_52
@@ -1106,6 +1100,7 @@
 bit 14_73
 bit 14_74
 bit 14_75
+bit 14_76
 bit 14_77
 bit 14_78
 bit 14_79
@@ -1114,7 +1109,6 @@
 bit 14_83
 bit 14_84
 bit 14_85
-bit 14_86
 bit 14_87
 bit 14_88
 bit 14_89
@@ -1132,6 +1126,7 @@
 bit 14_112
 bit 14_114
 bit 14_116
+bit 14_120
 bit 14_122
 bit 14_124
 bit 14_126
@@ -1156,6 +1151,7 @@
 bit 15_18
 bit 15_19
 bit 15_20
+bit 15_21
 bit 15_22
 bit 15_23
 bit 15_24
@@ -1176,6 +1172,7 @@
 bit 15_47
 bit 15_49
 bit 15_51
+bit 15_53
 bit 15_55
 bit 15_57
 bit 15_59
@@ -1183,6 +1180,7 @@
 bit 15_63
 bit 15_64
 bit 15_65
+bit 15_66
 bit 15_67
 bit 15_68
 bit 15_69
@@ -1200,6 +1198,7 @@
 bit 15_81
 bit 15_83
 bit 15_84
+bit 15_85
 bit 15_86
 bit 15_87
 bit 15_88
@@ -1321,13 +1320,13 @@
 bit 17_71
 bit 17_73
 bit 17_79
+bit 17_80
 bit 17_85
 bit 17_86
 bit 17_87
 bit 17_88
 bit 17_94
 bit 17_95
-bit 17_96
 bit 17_99
 bit 17_102
 bit 17_103
@@ -1340,6 +1339,7 @@
 bit 17_112
 bit 17_115
 bit 17_118
+bit 17_119
 bit 17_120
 bit 17_121
 bit 17_122
@@ -1358,7 +1358,6 @@
 bit 18_25
 bit 18_30
 bit 18_31
-bit 18_33
 bit 18_34
 bit 18_38
 bit 18_39
@@ -1477,7 +1476,6 @@
 bit 20_21
 bit 20_22
 bit 20_30
-bit 20_32
 bit 20_38
 bit 20_42
 bit 20_43
@@ -1505,7 +1503,6 @@
 bit 20_107
 bit 20_108
 bit 20_110
-bit 20_112
 bit 20_118
 bit 20_119
 bit 20_121
@@ -1553,17 +1550,16 @@
 bit 21_118
 bit 21_121
 bit 21_122
-bit 21_124
 bit 21_126
 bit 22_02
 bit 22_06
-bit 22_07
 bit 22_09
 bit 22_15
 bit 22_16
 bit 22_21
 bit 22_22
 bit 22_23
+bit 22_24
 bit 22_30
 bit 22_31
 bit 22_32
@@ -1579,6 +1575,7 @@
 bit 22_48
 bit 22_51
 bit 22_54
+bit 22_56
 bit 22_57
 bit 22_58
 bit 22_60
@@ -1595,7 +1592,6 @@
 bit 22_88
 bit 22_94
 bit 22_95
-bit 22_96
 bit 22_99
 bit 22_102
 bit 22_103
@@ -1654,6 +1650,7 @@
 bit 23_87
 bit 23_94
 bit 23_95
+bit 23_96
 bit 23_99
 bit 23_102
 bit 23_103
diff --git a/artix7/ppips_clk_bufg_bot_r.db b/artix7/ppips_clk_bufg_bot_r.db
new file mode 100644
index 0000000..a8d47f3
--- /dev/null
+++ b/artix7/ppips_clk_bufg_bot_r.db
@@ -0,0 +1,128 @@
+CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT0.CLK_BUFG_BUFGCTRL0_O always
+CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT1.CLK_BUFG_BUFGCTRL1_O always
+CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT2.CLK_BUFG_BUFGCTRL2_O always
+CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT3.CLK_BUFG_BUFGCTRL3_O always
+CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT4.CLK_BUFG_BUFGCTRL4_O always
+CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT5.CLK_BUFG_BUFGCTRL5_O always
+CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT6.CLK_BUFG_BUFGCTRL6_O always
+CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT7.CLK_BUFG_BUFGCTRL7_O always
+CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT8.CLK_BUFG_BUFGCTRL8_O always
+CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT9.CLK_BUFG_BUFGCTRL9_O always
+CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT10.CLK_BUFG_BUFGCTRL10_O always
+CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT11.CLK_BUFG_BUFGCTRL11_O always
+CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT12.CLK_BUFG_BUFGCTRL12_O always
+CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT13.CLK_BUFG_BUFGCTRL13_O always
+CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT14.CLK_BUFG_BUFGCTRL14_O always
+CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT15.CLK_BUFG_BUFGCTRL15_O always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL0_CE0.CLK_BUFG_IMUX20_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL0_CE1.CLK_BUFG_IMUX16_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL0_IGNORE0.CLK_BUFG_IMUX12_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL0_IGNORE1.CLK_BUFG_IMUX8_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL0_S0.CLK_BUFG_IMUX4_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL0_S1.CLK_BUFG_IMUX0_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL1_CE0.CLK_BUFG_IMUX21_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL1_CE1.CLK_BUFG_IMUX17_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL1_IGNORE0.CLK_BUFG_IMUX13_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL1_IGNORE1.CLK_BUFG_IMUX9_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL1_S0.CLK_BUFG_IMUX5_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL1_S1.CLK_BUFG_IMUX1_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL2_CE0.CLK_BUFG_IMUX22_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL2_CE1.CLK_BUFG_IMUX18_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL2_IGNORE0.CLK_BUFG_IMUX14_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL2_IGNORE1.CLK_BUFG_IMUX10_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL2_S0.CLK_BUFG_IMUX6_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL2_S1.CLK_BUFG_IMUX2_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL3_CE0.CLK_BUFG_IMUX23_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL3_CE1.CLK_BUFG_IMUX19_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL3_IGNORE0.CLK_BUFG_IMUX15_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL3_IGNORE1.CLK_BUFG_IMUX11_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL3_S0.CLK_BUFG_IMUX7_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL3_S1.CLK_BUFG_IMUX3_0 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL4_CE0.CLK_BUFG_IMUX20_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL4_CE1.CLK_BUFG_IMUX16_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL4_IGNORE0.CLK_BUFG_IMUX12_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL4_IGNORE1.CLK_BUFG_IMUX8_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL4_S0.CLK_BUFG_IMUX4_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL4_S1.CLK_BUFG_IMUX0_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL5_CE0.CLK_BUFG_IMUX21_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL5_CE1.CLK_BUFG_IMUX17_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL5_IGNORE0.CLK_BUFG_IMUX13_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL5_IGNORE1.CLK_BUFG_IMUX9_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL5_S0.CLK_BUFG_IMUX5_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL5_S1.CLK_BUFG_IMUX1_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL6_CE0.CLK_BUFG_IMUX22_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL6_CE1.CLK_BUFG_IMUX18_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL6_IGNORE0.CLK_BUFG_IMUX14_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL6_IGNORE1.CLK_BUFG_IMUX10_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL6_S0.CLK_BUFG_IMUX6_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL6_S1.CLK_BUFG_IMUX2_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL7_CE0.CLK_BUFG_IMUX23_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL7_CE1.CLK_BUFG_IMUX19_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL7_IGNORE0.CLK_BUFG_IMUX15_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL7_IGNORE1.CLK_BUFG_IMUX11_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL7_S0.CLK_BUFG_IMUX7_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL7_S1.CLK_BUFG_IMUX3_1 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL8_CE0.CLK_BUFG_IMUX20_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL8_CE1.CLK_BUFG_IMUX16_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL8_IGNORE0.CLK_BUFG_IMUX12_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL8_IGNORE1.CLK_BUFG_IMUX8_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL8_S0.CLK_BUFG_IMUX4_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL8_S1.CLK_BUFG_IMUX0_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL9_CE0.CLK_BUFG_IMUX21_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL9_CE1.CLK_BUFG_IMUX17_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL9_IGNORE0.CLK_BUFG_IMUX13_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL9_IGNORE1.CLK_BUFG_IMUX9_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL9_S0.CLK_BUFG_IMUX5_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL9_S1.CLK_BUFG_IMUX1_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL10_CE0.CLK_BUFG_IMUX22_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL10_CE1.CLK_BUFG_IMUX18_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL10_IGNORE0.CLK_BUFG_IMUX14_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL10_IGNORE1.CLK_BUFG_IMUX10_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL10_S0.CLK_BUFG_IMUX6_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL10_S1.CLK_BUFG_IMUX2_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL11_CE0.CLK_BUFG_IMUX23_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL11_CE1.CLK_BUFG_IMUX19_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL11_IGNORE0.CLK_BUFG_IMUX15_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL11_IGNORE1.CLK_BUFG_IMUX11_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL11_S0.CLK_BUFG_IMUX7_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL11_S1.CLK_BUFG_IMUX3_2 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL12_CE0.CLK_BUFG_IMUX20_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL12_CE1.CLK_BUFG_IMUX16_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL12_IGNORE0.CLK_BUFG_IMUX12_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL12_IGNORE1.CLK_BUFG_IMUX8_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL12_S0.CLK_BUFG_IMUX4_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL12_S1.CLK_BUFG_IMUX0_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL13_CE0.CLK_BUFG_IMUX21_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL13_CE1.CLK_BUFG_IMUX17_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL13_IGNORE0.CLK_BUFG_IMUX13_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL13_IGNORE1.CLK_BUFG_IMUX9_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL13_S0.CLK_BUFG_IMUX5_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL13_S1.CLK_BUFG_IMUX1_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL14_CE0.CLK_BUFG_IMUX22_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL14_CE1.CLK_BUFG_IMUX18_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL14_IGNORE0.CLK_BUFG_IMUX14_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL14_IGNORE1.CLK_BUFG_IMUX10_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL14_S0.CLK_BUFG_IMUX6_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL14_S1.CLK_BUFG_IMUX2_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL15_CE0.CLK_BUFG_IMUX23_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL15_CE1.CLK_BUFG_IMUX19_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL15_IGNORE0.CLK_BUFG_IMUX15_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL15_IGNORE1.CLK_BUFG_IMUX11_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL15_S0.CLK_BUFG_IMUX7_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL15_S1.CLK_BUFG_IMUX3_3 always
+CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_O.CLK_BUFG_BUFGCTRL0_I0 always
+CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_O.CLK_BUFG_BUFGCTRL1_I0 always
+CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_O.CLK_BUFG_BUFGCTRL2_I0 always
+CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_O.CLK_BUFG_BUFGCTRL3_I0 always
+CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_O.CLK_BUFG_BUFGCTRL4_I0 always
+CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_O.CLK_BUFG_BUFGCTRL5_I0 always
+CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_O.CLK_BUFG_BUFGCTRL6_I0 always
+CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_O.CLK_BUFG_BUFGCTRL7_I0 always
+CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_O.CLK_BUFG_BUFGCTRL8_I0 always
+CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_O.CLK_BUFG_BUFGCTRL9_I0 always
+CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_O.CLK_BUFG_BUFGCTRL10_I0 always
+CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_O.CLK_BUFG_BUFGCTRL11_I0 always
+CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_O.CLK_BUFG_BUFGCTRL12_I0 always
+CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_O.CLK_BUFG_BUFGCTRL13_I0 always
+CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_O.CLK_BUFG_BUFGCTRL14_I0 always
+CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_O.CLK_BUFG_BUFGCTRL15_I0 always
diff --git a/artix7/ppips_clk_bufg_top_r.db b/artix7/ppips_clk_bufg_top_r.db
new file mode 100644
index 0000000..7c066bc
--- /dev/null
+++ b/artix7/ppips_clk_bufg_top_r.db
@@ -0,0 +1,128 @@
+CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT0.CLK_BUFG_BUFGCTRL0_O always
+CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT1.CLK_BUFG_BUFGCTRL1_O always
+CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT2.CLK_BUFG_BUFGCTRL2_O always
+CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT3.CLK_BUFG_BUFGCTRL3_O always
+CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT4.CLK_BUFG_BUFGCTRL4_O always
+CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT5.CLK_BUFG_BUFGCTRL5_O always
+CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT6.CLK_BUFG_BUFGCTRL6_O always
+CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT7.CLK_BUFG_BUFGCTRL7_O always
+CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT8.CLK_BUFG_BUFGCTRL8_O always
+CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT9.CLK_BUFG_BUFGCTRL9_O always
+CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT10.CLK_BUFG_BUFGCTRL10_O always
+CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT11.CLK_BUFG_BUFGCTRL11_O always
+CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT12.CLK_BUFG_BUFGCTRL12_O always
+CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT13.CLK_BUFG_BUFGCTRL13_O always
+CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT14.CLK_BUFG_BUFGCTRL14_O always
+CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT15.CLK_BUFG_BUFGCTRL15_O always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL0_CE0.CLK_BUFG_IMUX20_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL0_CE1.CLK_BUFG_IMUX16_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL0_IGNORE0.CLK_BUFG_IMUX12_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL0_IGNORE1.CLK_BUFG_IMUX8_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL0_S0.CLK_BUFG_IMUX4_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL0_S1.CLK_BUFG_IMUX0_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL1_CE0.CLK_BUFG_IMUX21_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL1_CE1.CLK_BUFG_IMUX17_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL1_IGNORE0.CLK_BUFG_IMUX13_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL1_IGNORE1.CLK_BUFG_IMUX9_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL1_S0.CLK_BUFG_IMUX5_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL1_S1.CLK_BUFG_IMUX1_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL2_CE0.CLK_BUFG_IMUX22_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL2_CE1.CLK_BUFG_IMUX18_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL2_IGNORE0.CLK_BUFG_IMUX14_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL2_IGNORE1.CLK_BUFG_IMUX10_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL2_S0.CLK_BUFG_IMUX6_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL2_S1.CLK_BUFG_IMUX2_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL3_CE0.CLK_BUFG_IMUX23_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL3_CE1.CLK_BUFG_IMUX19_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL3_IGNORE0.CLK_BUFG_IMUX15_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL3_IGNORE1.CLK_BUFG_IMUX11_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL3_S0.CLK_BUFG_IMUX7_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL3_S1.CLK_BUFG_IMUX3_0 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL4_CE0.CLK_BUFG_IMUX20_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL4_CE1.CLK_BUFG_IMUX16_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL4_IGNORE0.CLK_BUFG_IMUX12_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL4_IGNORE1.CLK_BUFG_IMUX8_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL4_S0.CLK_BUFG_IMUX4_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL4_S1.CLK_BUFG_IMUX0_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL5_CE0.CLK_BUFG_IMUX21_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL5_CE1.CLK_BUFG_IMUX17_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL5_IGNORE0.CLK_BUFG_IMUX13_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL5_IGNORE1.CLK_BUFG_IMUX9_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL5_S0.CLK_BUFG_IMUX5_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL5_S1.CLK_BUFG_IMUX1_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL6_CE0.CLK_BUFG_IMUX22_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL6_CE1.CLK_BUFG_IMUX18_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL6_IGNORE0.CLK_BUFG_IMUX14_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL6_IGNORE1.CLK_BUFG_IMUX10_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL6_S0.CLK_BUFG_IMUX6_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL6_S1.CLK_BUFG_IMUX2_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL7_CE0.CLK_BUFG_IMUX23_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL7_CE1.CLK_BUFG_IMUX19_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL7_IGNORE0.CLK_BUFG_IMUX15_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL7_IGNORE1.CLK_BUFG_IMUX11_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL7_S0.CLK_BUFG_IMUX7_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL7_S1.CLK_BUFG_IMUX3_1 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL8_CE0.CLK_BUFG_IMUX20_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL8_CE1.CLK_BUFG_IMUX16_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL8_IGNORE0.CLK_BUFG_IMUX12_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL8_IGNORE1.CLK_BUFG_IMUX8_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL8_S0.CLK_BUFG_IMUX4_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL8_S1.CLK_BUFG_IMUX0_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL9_CE0.CLK_BUFG_IMUX21_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL9_CE1.CLK_BUFG_IMUX17_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL9_IGNORE0.CLK_BUFG_IMUX13_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL9_IGNORE1.CLK_BUFG_IMUX9_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL9_S0.CLK_BUFG_IMUX5_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL9_S1.CLK_BUFG_IMUX1_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL10_CE0.CLK_BUFG_IMUX22_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL10_CE1.CLK_BUFG_IMUX18_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL10_IGNORE0.CLK_BUFG_IMUX14_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL10_IGNORE1.CLK_BUFG_IMUX10_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL10_S0.CLK_BUFG_IMUX6_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL10_S1.CLK_BUFG_IMUX2_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL11_CE0.CLK_BUFG_IMUX23_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL11_CE1.CLK_BUFG_IMUX19_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL11_IGNORE0.CLK_BUFG_IMUX15_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL11_IGNORE1.CLK_BUFG_IMUX11_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL11_S0.CLK_BUFG_IMUX7_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL11_S1.CLK_BUFG_IMUX3_2 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL12_CE0.CLK_BUFG_IMUX20_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL12_CE1.CLK_BUFG_IMUX16_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL12_IGNORE0.CLK_BUFG_IMUX12_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL12_IGNORE1.CLK_BUFG_IMUX8_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL12_S0.CLK_BUFG_IMUX4_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL12_S1.CLK_BUFG_IMUX0_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL13_CE0.CLK_BUFG_IMUX21_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL13_CE1.CLK_BUFG_IMUX17_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL13_IGNORE0.CLK_BUFG_IMUX13_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL13_IGNORE1.CLK_BUFG_IMUX9_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL13_S0.CLK_BUFG_IMUX5_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL13_S1.CLK_BUFG_IMUX1_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL14_CE0.CLK_BUFG_IMUX22_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL14_CE1.CLK_BUFG_IMUX18_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL14_IGNORE0.CLK_BUFG_IMUX14_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL14_IGNORE1.CLK_BUFG_IMUX10_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL14_S0.CLK_BUFG_IMUX6_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL14_S1.CLK_BUFG_IMUX2_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL15_CE0.CLK_BUFG_IMUX23_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL15_CE1.CLK_BUFG_IMUX19_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL15_IGNORE0.CLK_BUFG_IMUX15_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL15_IGNORE1.CLK_BUFG_IMUX11_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL15_S0.CLK_BUFG_IMUX7_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL15_S1.CLK_BUFG_IMUX3_3 always
+CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_O.CLK_BUFG_BUFGCTRL0_I0 always
+CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_O.CLK_BUFG_BUFGCTRL1_I0 always
+CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_O.CLK_BUFG_BUFGCTRL2_I0 always
+CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_O.CLK_BUFG_BUFGCTRL3_I0 always
+CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_O.CLK_BUFG_BUFGCTRL4_I0 always
+CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_O.CLK_BUFG_BUFGCTRL5_I0 always
+CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_O.CLK_BUFG_BUFGCTRL6_I0 always
+CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_O.CLK_BUFG_BUFGCTRL7_I0 always
+CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_O.CLK_BUFG_BUFGCTRL8_I0 always
+CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_O.CLK_BUFG_BUFGCTRL9_I0 always
+CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_O.CLK_BUFG_BUFGCTRL10_I0 always
+CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_O.CLK_BUFG_BUFGCTRL11_I0 always
+CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_O.CLK_BUFG_BUFGCTRL12_I0 always
+CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_O.CLK_BUFG_BUFGCTRL13_I0 always
+CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_O.CLK_BUFG_BUFGCTRL14_I0 always
+CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_O.CLK_BUFG_BUFGCTRL15_I0 always
diff --git a/artix7/ppips_clk_hrow_bot_r.db b/artix7/ppips_clk_hrow_bot_r.db
new file mode 100644
index 0000000..69adda8
--- /dev/null
+++ b/artix7/ppips_clk_hrow_bot_r.db
@@ -0,0 +1,168 @@
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L0.CLK_HROW_CE_INT_BOT6 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L1.CLK_HROW_CE_INT_BOT7 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L2.CLK_HROW_CE_INT_BOT8 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L3.CLK_HROW_CE_INT_BOT9 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L4.CLK_HROW_CE_INT_BOT10 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L5.CLK_HROW_CE_INT_BOT11 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L6.CLK_HROW_CE_INT_TOP0 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L7.CLK_HROW_CE_INT_TOP1 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L8.CLK_HROW_CE_INT_TOP2 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L9.CLK_HROW_CE_INT_TOP3 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L10.CLK_HROW_CE_INT_TOP4 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L11.CLK_HROW_CE_INT_TOP5 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R0.CLK_HROW_CE_INT_BOT0 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R1.CLK_HROW_CE_INT_BOT1 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R2.CLK_HROW_CE_INT_BOT2 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R3.CLK_HROW_CE_INT_BOT3 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R4.CLK_HROW_CE_INT_BOT4 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R5.CLK_HROW_CE_INT_BOT5 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R6.CLK_HROW_CE_INT_TOP6 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R7.CLK_HROW_CE_INT_TOP7 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R8.CLK_HROW_CE_INT_TOP8 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R9.CLK_HROW_CE_INT_TOP9 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R10.CLK_HROW_CE_INT_TOP10 always
+CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R11.CLK_HROW_CE_INT_TOP11 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT0.CLK_HROW_IMUX0_3 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT1.CLK_HROW_IMUX1_3 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT2.CLK_HROW_IMUX2_3 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT3.CLK_HROW_IMUX3_3 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT4.CLK_HROW_IMUX4_3 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT5.CLK_HROW_IMUX5_3 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT6.CLK_HROW_IMUX6_3 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT7.CLK_HROW_IMUX7_3 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT8.CLK_HROW_IMUX8_3 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT9.CLK_HROW_IMUX9_3 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT10.CLK_HROW_IMUX10_3 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT11.CLK_HROW_IMUX11_3 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP0.CLK_HROW_IMUX0_4 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP1.CLK_HROW_IMUX1_4 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP2.CLK_HROW_IMUX2_4 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP3.CLK_HROW_IMUX3_4 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP4.CLK_HROW_IMUX4_4 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP5.CLK_HROW_IMUX5_4 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP6.CLK_HROW_IMUX6_4 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP7.CLK_HROW_IMUX7_4 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP8.CLK_HROW_IMUX8_4 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP9.CLK_HROW_IMUX9_4 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP10.CLK_HROW_IMUX10_4 always
+CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP11.CLK_HROW_IMUX11_4 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L0.CLK_HROW_CK_HCLK_OUT_L0 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L1.CLK_HROW_CK_HCLK_OUT_L1 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L2.CLK_HROW_CK_HCLK_OUT_L2 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L3.CLK_HROW_CK_HCLK_OUT_L3 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L4.CLK_HROW_CK_HCLK_OUT_L4 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L5.CLK_HROW_CK_HCLK_OUT_L5 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L6.CLK_HROW_CK_HCLK_OUT_L6 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L7.CLK_HROW_CK_HCLK_OUT_L7 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L8.CLK_HROW_CK_HCLK_OUT_L8 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L9.CLK_HROW_CK_HCLK_OUT_L9 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L10.CLK_HROW_CK_HCLK_OUT_L10 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L11.CLK_HROW_CK_HCLK_OUT_L11 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R0.CLK_HROW_CK_HCLK_OUT_R0 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R1.CLK_HROW_CK_HCLK_OUT_R1 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R2.CLK_HROW_CK_HCLK_OUT_R2 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R3.CLK_HROW_CK_HCLK_OUT_R3 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R4.CLK_HROW_CK_HCLK_OUT_R4 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R5.CLK_HROW_CK_HCLK_OUT_R5 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R6.CLK_HROW_CK_HCLK_OUT_R6 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R7.CLK_HROW_CK_HCLK_OUT_R7 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R8.CLK_HROW_CK_HCLK_OUT_R8 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R9.CLK_HROW_CK_HCLK_OUT_R9 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R10.CLK_HROW_CK_HCLK_OUT_R10 always
+CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R11.CLK_HROW_CK_HCLK_OUT_R11 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST0.CLK_HROW_CK_GCLK_TEST_OUT0 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST1.CLK_HROW_CK_GCLK_TEST_OUT1 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST2.CLK_HROW_CK_GCLK_TEST_OUT2 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST3.CLK_HROW_CK_GCLK_TEST_OUT3 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST4.CLK_HROW_CK_GCLK_TEST_OUT4 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST5.CLK_HROW_CK_GCLK_TEST_OUT5 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST6.CLK_HROW_CK_GCLK_TEST_OUT6 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST7.CLK_HROW_CK_GCLK_TEST_OUT7 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST8.CLK_HROW_CK_GCLK_TEST_OUT8 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST9.CLK_HROW_CK_GCLK_TEST_OUT9 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST10.CLK_HROW_CK_GCLK_TEST_OUT10 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST11.CLK_HROW_CK_GCLK_TEST_OUT11 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST12.CLK_HROW_CK_GCLK_TEST_OUT12 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST13.CLK_HROW_CK_GCLK_TEST_OUT13 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST14.CLK_HROW_CK_GCLK_TEST_OUT14 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST15.CLK_HROW_CK_GCLK_TEST_OUT15 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST16.CLK_HROW_CK_GCLK_TEST_OUT16 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST17.CLK_HROW_CK_GCLK_TEST_OUT17 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST18.CLK_HROW_CK_GCLK_TEST_OUT18 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST19.CLK_HROW_CK_GCLK_TEST_OUT19 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST20.CLK_HROW_CK_GCLK_TEST_OUT20 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST21.CLK_HROW_CK_GCLK_TEST_OUT21 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST22.CLK_HROW_CK_GCLK_TEST_OUT22 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST23.CLK_HROW_CK_GCLK_TEST_OUT23 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST24.CLK_HROW_CK_GCLK_TEST_OUT24 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST25.CLK_HROW_CK_GCLK_TEST_OUT25 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST26.CLK_HROW_CK_GCLK_TEST_OUT26 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST27.CLK_HROW_CK_GCLK_TEST_OUT27 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST28.CLK_HROW_CK_GCLK_TEST_OUT28 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST29.CLK_HROW_CK_GCLK_TEST_OUT29 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST30.CLK_HROW_CK_GCLK_TEST_OUT30 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST31.CLK_HROW_CK_GCLK_TEST_OUT31 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN0.CLK_HROW_CK_GCLK_IN_TEST0 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN1.CLK_HROW_CK_GCLK_IN_TEST1 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN2.CLK_HROW_CK_GCLK_IN_TEST2 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN3.CLK_HROW_CK_GCLK_IN_TEST3 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN4.CLK_HROW_CK_GCLK_IN_TEST4 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN5.CLK_HROW_CK_GCLK_IN_TEST5 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN6.CLK_HROW_CK_GCLK_IN_TEST6 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN7.CLK_HROW_CK_GCLK_IN_TEST7 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN8.CLK_HROW_CK_GCLK_IN_TEST8 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN9.CLK_HROW_CK_GCLK_IN_TEST9 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN10.CLK_HROW_CK_GCLK_IN_TEST10 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN11.CLK_HROW_CK_GCLK_IN_TEST11 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN12.CLK_HROW_CK_GCLK_IN_TEST12 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN13.CLK_HROW_CK_GCLK_IN_TEST13 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN14.CLK_HROW_CK_GCLK_IN_TEST14 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN15.CLK_HROW_CK_GCLK_IN_TEST15 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN16.CLK_HROW_CK_GCLK_IN_TEST16 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN17.CLK_HROW_CK_GCLK_IN_TEST17 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN18.CLK_HROW_CK_GCLK_IN_TEST18 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN19.CLK_HROW_CK_GCLK_IN_TEST19 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN20.CLK_HROW_CK_GCLK_IN_TEST20 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN21.CLK_HROW_CK_GCLK_IN_TEST21 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN22.CLK_HROW_CK_GCLK_IN_TEST22 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN23.CLK_HROW_CK_GCLK_IN_TEST23 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN24.CLK_HROW_CK_GCLK_IN_TEST24 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN25.CLK_HROW_CK_GCLK_IN_TEST25 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN26.CLK_HROW_CK_GCLK_IN_TEST26 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN27.CLK_HROW_CK_GCLK_IN_TEST27 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN28.CLK_HROW_CK_GCLK_IN_TEST28 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN29.CLK_HROW_CK_GCLK_IN_TEST29 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN30.CLK_HROW_CK_GCLK_IN_TEST30 always
+CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN31.CLK_HROW_CK_GCLK_IN_TEST31 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L0.CLK_HROW_CK_MUX_OUT_L0 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L1.CLK_HROW_CK_MUX_OUT_L1 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L2.CLK_HROW_CK_MUX_OUT_L2 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L3.CLK_HROW_CK_MUX_OUT_L3 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L4.CLK_HROW_CK_MUX_OUT_L4 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L5.CLK_HROW_CK_MUX_OUT_L5 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L6.CLK_HROW_CK_MUX_OUT_L6 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L7.CLK_HROW_CK_MUX_OUT_L7 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L8.CLK_HROW_CK_MUX_OUT_L8 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L9.CLK_HROW_CK_MUX_OUT_L9 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L10.CLK_HROW_CK_MUX_OUT_L10 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L11.CLK_HROW_CK_MUX_OUT_L11 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R0.CLK_HROW_CK_MUX_OUT_R0 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R1.CLK_HROW_CK_MUX_OUT_R1 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R2.CLK_HROW_CK_MUX_OUT_R2 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R3.CLK_HROW_CK_MUX_OUT_R3 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R4.CLK_HROW_CK_MUX_OUT_R4 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R5.CLK_HROW_CK_MUX_OUT_R5 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R6.CLK_HROW_CK_MUX_OUT_R6 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R7.CLK_HROW_CK_MUX_OUT_R7 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R8.CLK_HROW_CK_MUX_OUT_R8 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R9.CLK_HROW_CK_MUX_OUT_R9 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R10.CLK_HROW_CK_MUX_OUT_R10 always
+CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R11.CLK_HROW_CK_MUX_OUT_R11 always
+CLK_HROW_BOT_R.CLK_HROW_CK_IN_L_IN_TEST.CLK_HROW_CK_IN_L_TEST_IN always
+CLK_HROW_BOT_R.CLK_HROW_CK_IN_L_TEST_OUT.CLK_HROW_CK_IN_L_OUT_TEST always
+CLK_HROW_BOT_R.CLK_HROW_CK_IN_R_IN_TEST.CLK_HROW_CK_IN_R_TEST_IN always
+CLK_HROW_BOT_R.CLK_HROW_CK_IN_R_TEST_OUT.CLK_HROW_CK_IN_R_OUT_TEST always
+CLK_HROW_BOT_R.CLK_HROW_CK_INT_0_0.CLK_HROW_CLK0_3 always
+CLK_HROW_BOT_R.CLK_HROW_CK_INT_0_1.CLK_HROW_CLK1_3 always
+CLK_HROW_BOT_R.CLK_HROW_CK_INT_1_0.CLK_HROW_CLK0_4 always
+CLK_HROW_BOT_R.CLK_HROW_CK_INT_1_1.CLK_HROW_CLK1_4 always
diff --git a/artix7/ppips_clk_hrow_top_r.db b/artix7/ppips_clk_hrow_top_r.db
new file mode 100644
index 0000000..cb7530c
--- /dev/null
+++ b/artix7/ppips_clk_hrow_top_r.db
@@ -0,0 +1,168 @@
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L0.CLK_HROW_CE_INT_BOT6 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L1.CLK_HROW_CE_INT_BOT7 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L2.CLK_HROW_CE_INT_BOT8 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L3.CLK_HROW_CE_INT_BOT9 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L4.CLK_HROW_CE_INT_BOT10 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L5.CLK_HROW_CE_INT_BOT11 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L6.CLK_HROW_CE_INT_TOP0 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L7.CLK_HROW_CE_INT_TOP1 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L8.CLK_HROW_CE_INT_TOP2 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L9.CLK_HROW_CE_INT_TOP3 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L10.CLK_HROW_CE_INT_TOP4 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L11.CLK_HROW_CE_INT_TOP5 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R0.CLK_HROW_CE_INT_BOT0 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R1.CLK_HROW_CE_INT_BOT1 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R2.CLK_HROW_CE_INT_BOT2 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R3.CLK_HROW_CE_INT_BOT3 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R4.CLK_HROW_CE_INT_BOT4 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R5.CLK_HROW_CE_INT_BOT5 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R6.CLK_HROW_CE_INT_TOP6 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R7.CLK_HROW_CE_INT_TOP7 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R8.CLK_HROW_CE_INT_TOP8 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R9.CLK_HROW_CE_INT_TOP9 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R10.CLK_HROW_CE_INT_TOP10 always
+CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R11.CLK_HROW_CE_INT_TOP11 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT0.CLK_HROW_IMUX0_3 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT1.CLK_HROW_IMUX1_3 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT2.CLK_HROW_IMUX2_3 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT3.CLK_HROW_IMUX3_3 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT4.CLK_HROW_IMUX4_3 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT5.CLK_HROW_IMUX5_3 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT6.CLK_HROW_IMUX6_3 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT7.CLK_HROW_IMUX7_3 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT8.CLK_HROW_IMUX8_3 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT9.CLK_HROW_IMUX9_3 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT10.CLK_HROW_IMUX10_3 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT11.CLK_HROW_IMUX11_3 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP0.CLK_HROW_IMUX0_4 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP1.CLK_HROW_IMUX1_4 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP2.CLK_HROW_IMUX2_4 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP3.CLK_HROW_IMUX3_4 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP4.CLK_HROW_IMUX4_4 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP5.CLK_HROW_IMUX5_4 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP6.CLK_HROW_IMUX6_4 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP7.CLK_HROW_IMUX7_4 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP8.CLK_HROW_IMUX8_4 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP9.CLK_HROW_IMUX9_4 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP10.CLK_HROW_IMUX10_4 always
+CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP11.CLK_HROW_IMUX11_4 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L0.CLK_HROW_CK_HCLK_OUT_L0 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L1.CLK_HROW_CK_HCLK_OUT_L1 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L2.CLK_HROW_CK_HCLK_OUT_L2 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L3.CLK_HROW_CK_HCLK_OUT_L3 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L4.CLK_HROW_CK_HCLK_OUT_L4 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L5.CLK_HROW_CK_HCLK_OUT_L5 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L6.CLK_HROW_CK_HCLK_OUT_L6 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L7.CLK_HROW_CK_HCLK_OUT_L7 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L8.CLK_HROW_CK_HCLK_OUT_L8 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L9.CLK_HROW_CK_HCLK_OUT_L9 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L10.CLK_HROW_CK_HCLK_OUT_L10 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L11.CLK_HROW_CK_HCLK_OUT_L11 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R0.CLK_HROW_CK_HCLK_OUT_R0 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R1.CLK_HROW_CK_HCLK_OUT_R1 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R2.CLK_HROW_CK_HCLK_OUT_R2 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R3.CLK_HROW_CK_HCLK_OUT_R3 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R4.CLK_HROW_CK_HCLK_OUT_R4 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R5.CLK_HROW_CK_HCLK_OUT_R5 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R6.CLK_HROW_CK_HCLK_OUT_R6 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R7.CLK_HROW_CK_HCLK_OUT_R7 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R8.CLK_HROW_CK_HCLK_OUT_R8 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R9.CLK_HROW_CK_HCLK_OUT_R9 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R10.CLK_HROW_CK_HCLK_OUT_R10 always
+CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R11.CLK_HROW_CK_HCLK_OUT_R11 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST0.CLK_HROW_CK_GCLK_TEST_OUT0 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST1.CLK_HROW_CK_GCLK_TEST_OUT1 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST2.CLK_HROW_CK_GCLK_TEST_OUT2 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST3.CLK_HROW_CK_GCLK_TEST_OUT3 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST4.CLK_HROW_CK_GCLK_TEST_OUT4 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST5.CLK_HROW_CK_GCLK_TEST_OUT5 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST6.CLK_HROW_CK_GCLK_TEST_OUT6 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST7.CLK_HROW_CK_GCLK_TEST_OUT7 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST8.CLK_HROW_CK_GCLK_TEST_OUT8 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST9.CLK_HROW_CK_GCLK_TEST_OUT9 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST10.CLK_HROW_CK_GCLK_TEST_OUT10 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST11.CLK_HROW_CK_GCLK_TEST_OUT11 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST12.CLK_HROW_CK_GCLK_TEST_OUT12 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST13.CLK_HROW_CK_GCLK_TEST_OUT13 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST14.CLK_HROW_CK_GCLK_TEST_OUT14 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST15.CLK_HROW_CK_GCLK_TEST_OUT15 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST16.CLK_HROW_CK_GCLK_TEST_OUT16 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST17.CLK_HROW_CK_GCLK_TEST_OUT17 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST18.CLK_HROW_CK_GCLK_TEST_OUT18 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST19.CLK_HROW_CK_GCLK_TEST_OUT19 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST20.CLK_HROW_CK_GCLK_TEST_OUT20 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST21.CLK_HROW_CK_GCLK_TEST_OUT21 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST22.CLK_HROW_CK_GCLK_TEST_OUT22 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST23.CLK_HROW_CK_GCLK_TEST_OUT23 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST24.CLK_HROW_CK_GCLK_TEST_OUT24 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST25.CLK_HROW_CK_GCLK_TEST_OUT25 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST26.CLK_HROW_CK_GCLK_TEST_OUT26 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST27.CLK_HROW_CK_GCLK_TEST_OUT27 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST28.CLK_HROW_CK_GCLK_TEST_OUT28 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST29.CLK_HROW_CK_GCLK_TEST_OUT29 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST30.CLK_HROW_CK_GCLK_TEST_OUT30 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST31.CLK_HROW_CK_GCLK_TEST_OUT31 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN0.CLK_HROW_CK_GCLK_IN_TEST0 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN1.CLK_HROW_CK_GCLK_IN_TEST1 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN2.CLK_HROW_CK_GCLK_IN_TEST2 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN3.CLK_HROW_CK_GCLK_IN_TEST3 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN4.CLK_HROW_CK_GCLK_IN_TEST4 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN5.CLK_HROW_CK_GCLK_IN_TEST5 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN6.CLK_HROW_CK_GCLK_IN_TEST6 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN7.CLK_HROW_CK_GCLK_IN_TEST7 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN8.CLK_HROW_CK_GCLK_IN_TEST8 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN9.CLK_HROW_CK_GCLK_IN_TEST9 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN10.CLK_HROW_CK_GCLK_IN_TEST10 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN11.CLK_HROW_CK_GCLK_IN_TEST11 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN12.CLK_HROW_CK_GCLK_IN_TEST12 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN13.CLK_HROW_CK_GCLK_IN_TEST13 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN14.CLK_HROW_CK_GCLK_IN_TEST14 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN15.CLK_HROW_CK_GCLK_IN_TEST15 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN16.CLK_HROW_CK_GCLK_IN_TEST16 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN17.CLK_HROW_CK_GCLK_IN_TEST17 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN18.CLK_HROW_CK_GCLK_IN_TEST18 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN19.CLK_HROW_CK_GCLK_IN_TEST19 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN20.CLK_HROW_CK_GCLK_IN_TEST20 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN21.CLK_HROW_CK_GCLK_IN_TEST21 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN22.CLK_HROW_CK_GCLK_IN_TEST22 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN23.CLK_HROW_CK_GCLK_IN_TEST23 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN24.CLK_HROW_CK_GCLK_IN_TEST24 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN25.CLK_HROW_CK_GCLK_IN_TEST25 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN26.CLK_HROW_CK_GCLK_IN_TEST26 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN27.CLK_HROW_CK_GCLK_IN_TEST27 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN28.CLK_HROW_CK_GCLK_IN_TEST28 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN29.CLK_HROW_CK_GCLK_IN_TEST29 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN30.CLK_HROW_CK_GCLK_IN_TEST30 always
+CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN31.CLK_HROW_CK_GCLK_IN_TEST31 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L0.CLK_HROW_CK_MUX_OUT_L0 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L1.CLK_HROW_CK_MUX_OUT_L1 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L2.CLK_HROW_CK_MUX_OUT_L2 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L3.CLK_HROW_CK_MUX_OUT_L3 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L4.CLK_HROW_CK_MUX_OUT_L4 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L5.CLK_HROW_CK_MUX_OUT_L5 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L6.CLK_HROW_CK_MUX_OUT_L6 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L7.CLK_HROW_CK_MUX_OUT_L7 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L8.CLK_HROW_CK_MUX_OUT_L8 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L9.CLK_HROW_CK_MUX_OUT_L9 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L10.CLK_HROW_CK_MUX_OUT_L10 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L11.CLK_HROW_CK_MUX_OUT_L11 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R0.CLK_HROW_CK_MUX_OUT_R0 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R1.CLK_HROW_CK_MUX_OUT_R1 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R2.CLK_HROW_CK_MUX_OUT_R2 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R3.CLK_HROW_CK_MUX_OUT_R3 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R4.CLK_HROW_CK_MUX_OUT_R4 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R5.CLK_HROW_CK_MUX_OUT_R5 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R6.CLK_HROW_CK_MUX_OUT_R6 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R7.CLK_HROW_CK_MUX_OUT_R7 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R8.CLK_HROW_CK_MUX_OUT_R8 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R9.CLK_HROW_CK_MUX_OUT_R9 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R10.CLK_HROW_CK_MUX_OUT_R10 always
+CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R11.CLK_HROW_CK_MUX_OUT_R11 always
+CLK_HROW_TOP_R.CLK_HROW_CK_IN_L_IN_TEST.CLK_HROW_CK_IN_L_TEST_IN always
+CLK_HROW_TOP_R.CLK_HROW_CK_IN_L_TEST_OUT.CLK_HROW_CK_IN_L_OUT_TEST always
+CLK_HROW_TOP_R.CLK_HROW_CK_IN_R_IN_TEST.CLK_HROW_CK_IN_R_TEST_IN always
+CLK_HROW_TOP_R.CLK_HROW_CK_IN_R_TEST_OUT.CLK_HROW_CK_IN_R_OUT_TEST always
+CLK_HROW_TOP_R.CLK_HROW_CK_INT_0_0.CLK_HROW_CLK0_3 always
+CLK_HROW_TOP_R.CLK_HROW_CK_INT_0_1.CLK_HROW_CLK1_3 always
+CLK_HROW_TOP_R.CLK_HROW_CK_INT_1_0.CLK_HROW_CLK0_4 always
+CLK_HROW_TOP_R.CLK_HROW_CK_INT_1_1.CLK_HROW_CLK1_4 always
diff --git a/artix7/ppips_hclk_l.db b/artix7/ppips_hclk_l.db
deleted file mode 100644
index 6959965..0000000
--- a/artix7/ppips_hclk_l.db
+++ /dev/null
@@ -1,8 +0,0 @@
-HCLK.HCLK_CK_INOUT_L0.HCLK_CK_BUFHCLK8 always
-HCLK.HCLK_CK_INOUT_L1.HCLK_CK_BUFHCLK9 always
-HCLK.HCLK_CK_INOUT_L2.HCLK_CK_BUFHCLK10 always
-HCLK.HCLK_CK_INOUT_L3.HCLK_CK_BUFHCLK11 always
-HCLK.HCLK_CK_INOUT_L4.HCLK_CK_BUFRCLK0 always
-HCLK.HCLK_CK_INOUT_L5.HCLK_CK_BUFRCLK1 always
-HCLK.HCLK_CK_INOUT_L6.HCLK_CK_BUFRCLK2 always
-HCLK.HCLK_CK_INOUT_L7.HCLK_CK_BUFRCLK3 always
diff --git a/artix7/ppips_hclk_r.db b/artix7/ppips_hclk_r.db
deleted file mode 100644
index 45231f3..0000000
--- a/artix7/ppips_hclk_r.db
+++ /dev/null
@@ -1,8 +0,0 @@
-HCLK.HCLK_CK_INOUT_R0.HCLK_CK_BUFHCLK0 always
-HCLK.HCLK_CK_INOUT_R1.HCLK_CK_BUFHCLK1 always
-HCLK.HCLK_CK_INOUT_R2.HCLK_CK_BUFHCLK2 always
-HCLK.HCLK_CK_INOUT_R3.HCLK_CK_BUFHCLK3 always
-HCLK.HCLK_CK_INOUT_R4.HCLK_CK_BUFHCLK4 always
-HCLK.HCLK_CK_INOUT_R5.HCLK_CK_BUFHCLK5 always
-HCLK.HCLK_CK_INOUT_R6.HCLK_CK_BUFHCLK6 always
-HCLK.HCLK_CK_INOUT_R7.HCLK_CK_BUFHCLK7 always
diff --git a/artix7/ppips_io_int_interface_l.db b/artix7/ppips_io_int_interface_l.db
new file mode 100644
index 0000000..60c5e5b
--- /dev/null
+++ b/artix7/ppips_io_int_interface_l.db
@@ -0,0 +1,24 @@
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L0.INT_INTERFACE_LOGIC_OUTS_L_B0 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L1.INT_INTERFACE_LOGIC_OUTS_L_B1 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L2.INT_INTERFACE_LOGIC_OUTS_L_B2 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L3.INT_INTERFACE_LOGIC_OUTS_L_B3 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L4.INT_INTERFACE_LOGIC_OUTS_L_B4 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L5.INT_INTERFACE_LOGIC_OUTS_L_B5 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L6.INT_INTERFACE_LOGIC_OUTS_L_B6 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L7.INT_INTERFACE_LOGIC_OUTS_L_B7 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L8.INT_INTERFACE_LOGIC_OUTS_L_B8 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L9.INT_INTERFACE_LOGIC_OUTS_L_B9 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L10.INT_INTERFACE_LOGIC_OUTS_L_B10 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L11.INT_INTERFACE_LOGIC_OUTS_L_B11 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L12.INT_INTERFACE_LOGIC_OUTS_L_B12 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L13.INT_INTERFACE_LOGIC_OUTS_L_B13 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L14.INT_INTERFACE_LOGIC_OUTS_L_B14 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L15.INT_INTERFACE_LOGIC_OUTS_L_B15 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L16.INT_INTERFACE_LOGIC_OUTS_L_B16 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L17.INT_INTERFACE_LOGIC_OUTS_L_B17 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L18.INT_INTERFACE_LOGIC_OUTS_L_B18 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L19.INT_INTERFACE_LOGIC_OUTS_L_B19 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L20.INT_INTERFACE_LOGIC_OUTS_L_B20 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L21.INT_INTERFACE_LOGIC_OUTS_L_B21 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L22.INT_INTERFACE_LOGIC_OUTS_L_B22 always
+IO_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L23.INT_INTERFACE_LOGIC_OUTS_L_B23 always
diff --git a/artix7/ppips_io_int_interface_r.db b/artix7/ppips_io_int_interface_r.db
new file mode 100644
index 0000000..3e9d23e
--- /dev/null
+++ b/artix7/ppips_io_int_interface_r.db
@@ -0,0 +1,24 @@
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS0.INT_INTERFACE_LOGIC_OUTS_B0 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS1.INT_INTERFACE_LOGIC_OUTS_B1 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS2.INT_INTERFACE_LOGIC_OUTS_B2 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS3.INT_INTERFACE_LOGIC_OUTS_B3 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS4.INT_INTERFACE_LOGIC_OUTS_B4 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS5.INT_INTERFACE_LOGIC_OUTS_B5 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS6.INT_INTERFACE_LOGIC_OUTS_B6 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS7.INT_INTERFACE_LOGIC_OUTS_B7 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS8.INT_INTERFACE_LOGIC_OUTS_B8 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS9.INT_INTERFACE_LOGIC_OUTS_B9 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS10.INT_INTERFACE_LOGIC_OUTS_B10 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS11.INT_INTERFACE_LOGIC_OUTS_B11 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS12.INT_INTERFACE_LOGIC_OUTS_B12 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS13.INT_INTERFACE_LOGIC_OUTS_B13 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS14.INT_INTERFACE_LOGIC_OUTS_B14 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS15.INT_INTERFACE_LOGIC_OUTS_B15 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS16.INT_INTERFACE_LOGIC_OUTS_B16 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS17.INT_INTERFACE_LOGIC_OUTS_B17 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS18.INT_INTERFACE_LOGIC_OUTS_B18 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS19.INT_INTERFACE_LOGIC_OUTS_B19 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS20.INT_INTERFACE_LOGIC_OUTS_B20 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS21.INT_INTERFACE_LOGIC_OUTS_B21 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS22.INT_INTERFACE_LOGIC_OUTS_B22 always
+IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS23.INT_INTERFACE_LOGIC_OUTS_B23 always
diff --git a/artix7/ppips_lioi3.db b/artix7/ppips_lioi3.db
new file mode 100644
index 0000000..43ac021
--- /dev/null
+++ b/artix7/ppips_lioi3.db
@@ -0,0 +1,165 @@
+LIOI3.IOI_IDELAYCTRL_RST.IOI_IMUX24_0 always
+LIOI3.IOI_IMUX_RC2.IOI_BYP4_1 always
+LIOI3.IOI_IMUX_RC3.IOI_BYP3_1 always
+LIOI3.IOI_LOGIC_OUTS0_0.IOI_ILOGIC1_Q1 always
+LIOI3.IOI_LOGIC_OUTS0_1.IOI_ILOGIC0_Q1 always
+LIOI3.IOI_LOGIC_OUTS1_0.IOI_IDELAY1_CNTVALUEOUT1 always
+LIOI3.IOI_LOGIC_OUTS1_1.IOI_IDELAY0_CNTVALUEOUT1 always
+LIOI3.IOI_LOGIC_OUTS2_0.LIOI_OLOGIC1_TFB_LOCAL always
+LIOI3.IOI_LOGIC_OUTS2_1.LIOI_OLOGIC0_TFB_LOCAL always
+LIOI3.IOI_LOGIC_OUTS3_0.IOI_ILOGIC1_Q6 always
+LIOI3.IOI_LOGIC_OUTS3_1.IOI_ILOGIC0_Q6 always
+LIOI3.IOI_LOGIC_OUTS5_0.IOI_OLOGIC1_IOCLKGLITCH always
+LIOI3.IOI_LOGIC_OUTS5_1.IOI_OLOGIC0_IOCLKGLITCH always
+LIOI3.IOI_LOGIC_OUTS7_0.IOI_ILOGIC1_Q7 always
+LIOI3.IOI_LOGIC_OUTS7_1.IOI_ILOGIC0_Q7 always
+LIOI3.IOI_LOGIC_OUTS8_0.IOI_ILOGIC1_Q8 always
+LIOI3.IOI_LOGIC_OUTS8_1.IOI_ILOGIC0_Q8 always
+LIOI3.IOI_LOGIC_OUTS9_0.IOI_ILOGIC1_Q3 always
+LIOI3.IOI_LOGIC_OUTS9_1.IOI_ILOGIC0_Q3 always
+LIOI3.IOI_LOGIC_OUTS10_0.IOI_ILOGIC1_Q4 always
+LIOI3.IOI_LOGIC_OUTS10_1.IOI_ILOGIC0_Q4 always
+LIOI3.IOI_LOGIC_OUTS11_0.IOI_IDELAY1_CNTVALUEOUT4 always
+LIOI3.IOI_LOGIC_OUTS11_1.IOI_IDELAY0_CNTVALUEOUT4 always
+LIOI3.IOI_LOGIC_OUTS13_0.IOI_IDELAYCTRL_DNPULSEOUT always
+LIOI3.IOI_LOGIC_OUTS13_1.IOI_IDELAYCTRL_OUTN1 always
+LIOI3.IOI_LOGIC_OUTS14_0.IOI_ILOGIC1_Q5 always
+LIOI3.IOI_LOGIC_OUTS14_1.IOI_ILOGIC0_Q5 always
+LIOI3.IOI_LOGIC_OUTS15_0.IOI_IDELAY1_CNTVALUEOUT3 always
+LIOI3.IOI_LOGIC_OUTS15_1.IOI_IDELAY0_CNTVALUEOUT3 always
+LIOI3.IOI_LOGIC_OUTS16_0.IOI_IDELAYCTRL_UPPULSEOUT always
+LIOI3.IOI_LOGIC_OUTS16_1.IOI_IDELAYCTRL_OUTN65 always
+LIOI3.IOI_LOGIC_OUTS18_0.IOI_ILOGIC1_O always
+LIOI3.IOI_LOGIC_OUTS18_1.IOI_ILOGIC0_O always
+LIOI3.IOI_LOGIC_OUTS19_0.IOI_IDELAY1_CNTVALUEOUT2 always
+LIOI3.IOI_LOGIC_OUTS19_1.IOI_IDELAY0_CNTVALUEOUT2 always
+LIOI3.IOI_LOGIC_OUTS20_0.IOI_IDELAY1_CNTVALUEOUT0 always
+LIOI3.IOI_LOGIC_OUTS20_1.IOI_IDELAY0_CNTVALUEOUT0 always
+LIOI3.IOI_LOGIC_OUTS22_1.IOI_IDELAYCTRL_RDY always
+LIOI3.IOI_LOGIC_OUTS23_0.IOI_ILOGIC1_Q2 always
+LIOI3.IOI_LOGIC_OUTS23_1.IOI_ILOGIC0_Q2 always
+LIOI3.IOI_RCLK_DIV_CE0.IOI_BYP3_1 always
+LIOI3.IOI_RCLK_DIV_CE1.IOI_BYP4_1 always
+LIOI3.IOI_RCLK_DIV_CE2_1.IOI_BYP4_1 always
+LIOI3.IOI_RCLK_DIV_CE3_1.IOI_BYP3_1 always
+LIOI3.IOI_RCLK_DIV_CLR0_1.IOI_BYP3_0 always
+LIOI3.IOI_RCLK_DIV_CLR1_1.IOI_BYP4_0 always
+LIOI3.IOI_RCLK_DIV_CLR2.IOI_BYP4_0 always
+LIOI3.IOI_RCLK_DIV_CLR3.IOI_BYP3_0 always
+LIOI3.IOI_IDELAY0_C.IOI_CLK1_1 always
+LIOI3.IOI_IDELAY0_CE.IOI_IMUX32_1 always
+LIOI3.IOI_IDELAY0_CINVCTRL.IOI_BYP6_1 always
+LIOI3.IOI_IDELAY0_DATAIN.IOI_IMUX25_1 always
+LIOI3.IOI_IDELAY0_INC.IOI_IMUX26_1 always
+LIOI3.IOI_IDELAY0_LD.IOI_IMUX30_1 always
+LIOI3.IOI_IDELAY0_LDPIPEEN.IOI_IMUX33_1 always
+LIOI3.IOI_IDELAY0_REGRST.IOI_IMUX12_1 always
+LIOI3.IOI_IDELAY0_CNTVALUEIN0.IOI_IMUX41_1 always
+LIOI3.IOI_IDELAY0_CNTVALUEIN1.IOI_IMUX36_1 always
+LIOI3.IOI_IDELAY0_CNTVALUEIN2.IOI_IMUX35_1 always
+LIOI3.IOI_IDELAY0_CNTVALUEIN3.IOI_IMUX38_1 always
+LIOI3.IOI_IDELAY0_CNTVALUEIN4.IOI_IMUX39_1 always
+LIOI3.IOI_IDELAY1_C.IOI_CLK1_0 always
+LIOI3.IOI_IDELAY1_CE.IOI_IMUX32_0 always
+LIOI3.IOI_IDELAY1_CINVCTRL.IOI_BYP6_0 always
+LIOI3.IOI_IDELAY1_DATAIN.IOI_IMUX25_0 always
+LIOI3.IOI_IDELAY1_INC.IOI_IMUX26_0 always
+LIOI3.IOI_IDELAY1_LD.IOI_IMUX30_0 always
+LIOI3.IOI_IDELAY1_LDPIPEEN.IOI_IMUX33_0 always
+LIOI3.IOI_IDELAY1_REGRST.IOI_IMUX12_0 always
+LIOI3.IOI_IDELAY1_CNTVALUEIN0.IOI_IMUX41_0 always
+LIOI3.IOI_IDELAY1_CNTVALUEIN1.IOI_IMUX36_0 always
+LIOI3.IOI_IDELAY1_CNTVALUEIN2.IOI_IMUX35_0 always
+LIOI3.IOI_IDELAY1_CNTVALUEIN3.IOI_IMUX38_0 always
+LIOI3.IOI_IDELAY1_CNTVALUEIN4.IOI_IMUX39_0 always
+LIOI3.IOI_ILOGIC0_BITSLIP.IOI_IMUX0_1 always
+LIOI3.IOI_ILOGIC0_CLKDIV.IOI_CLK0_1 always
+LIOI3.IOI_ILOGIC0_DYNCLKDIVPSEL.IOI_IMUX10_1 always
+LIOI3.IOI_ILOGIC0_DYNCLKDIVSEL.IOI_IMUX4_1 always
+LIOI3.IOI_ILOGIC0_DYNCLKSEL.IOI_IMUX37_1 always
+LIOI3.IOI_ILOGIC0_OCLK.IOI_OCLK_0 always
+LIOI3.IOI_ILOGIC0_SR.IOI_CTRL1_1 always
+LIOI3.IOI_ILOGIC0_CE1.IOI_IMUX5_1 always
+LIOI3.IOI_ILOGIC0_CE2.IOI_IMUX14_1 always
+LIOI3.IOI_ILOGIC1_BITSLIP.IOI_IMUX0_0 always
+LIOI3.IOI_ILOGIC1_CLKDIV.IOI_CLK0_0 always
+LIOI3.IOI_ILOGIC1_DYNCLKDIVPSEL.IOI_IMUX10_0 always
+LIOI3.IOI_ILOGIC1_DYNCLKDIVSEL.IOI_IMUX4_0 always
+LIOI3.IOI_ILOGIC1_DYNCLKSEL.IOI_IMUX37_0 always
+LIOI3.IOI_ILOGIC1_OCLK.IOI_OCLK_1 always
+LIOI3.IOI_ILOGIC1_SR.IOI_CTRL1_0 always
+LIOI3.IOI_ILOGIC1_CE1.IOI_IMUX5_0 always
+LIOI3.IOI_ILOGIC1_CE2.IOI_IMUX14_0 always
+LIOI3.IOI_OLOGIC0_CLK.IOI_OCLK_0 always
+LIOI3.IOI_OLOGIC0_OCE.IOI_IMUX29_1 always
+LIOI3.IOI_OLOGIC0_SR.IOI_CTRL0_1 always
+LIOI3.IOI_OLOGIC0_TBYTEIN.IOI_TBYTEIN always
+LIOI3.IOI_OLOGIC0_TCE.IOI_IMUX1_1 always
+LIOI3.IOI_OLOGIC0_D1.IOI_IMUX34_1 always
+LIOI3.IOI_OLOGIC0_D2.IOI_IMUX40_1 always
+LIOI3.IOI_OLOGIC0_D3.IOI_IMUX44_1 always
+LIOI3.IOI_OLOGIC0_D4.IOI_IMUX42_1 always
+LIOI3.IOI_OLOGIC0_D5.IOI_IMUX43_1 always
+LIOI3.IOI_OLOGIC0_D6.IOI_IMUX45_1 always
+LIOI3.IOI_OLOGIC0_D7.IOI_IMUX46_1 always
+LIOI3.IOI_OLOGIC0_D8.IOI_IMUX47_1 always
+LIOI3.IOI_OLOGIC0_T1.IOI_IMUX15_1 always
+LIOI3.IOI_OLOGIC0_T2.IOI_IMUX7_1 always
+LIOI3.IOI_OLOGIC0_T3.IOI_IMUX13_1 always
+LIOI3.IOI_OLOGIC0_T4.IOI_IMUX21_1 always
+LIOI3.IOI_OLOGIC1_CLK.IOI_OCLK_1 always
+LIOI3.IOI_OLOGIC1_OCE.IOI_IMUX29_0 always
+LIOI3.IOI_OLOGIC1_SR.IOI_CTRL0_0 always
+LIOI3.IOI_OLOGIC1_TBYTEIN.IOI_TBYTEIN always
+LIOI3.IOI_OLOGIC1_TCE.IOI_IMUX1_0 always
+LIOI3.IOI_OLOGIC1_D1.IOI_IMUX34_0 always
+LIOI3.IOI_OLOGIC1_D2.IOI_IMUX40_0 always
+LIOI3.IOI_OLOGIC1_D3.IOI_IMUX44_0 always
+LIOI3.IOI_OLOGIC1_D4.IOI_IMUX42_0 always
+LIOI3.IOI_OLOGIC1_D5.IOI_IMUX43_0 always
+LIOI3.IOI_OLOGIC1_D6.IOI_IMUX45_0 always
+LIOI3.IOI_OLOGIC1_D7.IOI_IMUX46_0 always
+LIOI3.IOI_OLOGIC1_D8.IOI_IMUX47_0 always
+LIOI3.IOI_OLOGIC1_T1.IOI_IMUX15_0 always
+LIOI3.IOI_OLOGIC1_T2.IOI_IMUX7_0 always
+LIOI3.IOI_OLOGIC1_T3.IOI_IMUX13_0 always
+LIOI3.IOI_OLOGIC1_T4.IOI_IMUX21_0 always
+LIOI3.LIOI_DCI_T_TERM0.IOI_IMUX6_1 always
+LIOI3.LIOI_DCI_T_TERM1.IOI_IMUX6_0 always
+LIOI3.LIOI_I2GCLK_TOP0.IOI_ILOGIC0_O always
+LIOI3.LIOI_IBUF_DISABLE0.IOI_IMUX9_1 always
+LIOI3.LIOI_IBUF_DISABLE1.IOI_IMUX9_0 always
+LIOI3.LIOI_I0.LIOI_IBUF0 always
+LIOI3.LIOI_I1.LIOI_IBUF1 always
+LIOI3.LIOI_IDELAY0_DATAOUT.LIOI_IDELAY0_IDATAIN always
+LIOI3.LIOI_IDELAY0_IDATAIN.LIOI_I0 always
+LIOI3.LIOI_IDELAY1_DATAOUT.LIOI_IDELAY1_IDATAIN always
+LIOI3.LIOI_IDELAY1_IDATAIN.LIOI_I1 always
+LIOI3.LIOI_ILOGIC0_D.LIOI_I0 always
+LIOI3.LIOI_ILOGIC0_DDLY.LIOI_IDELAY0_DATAOUT always
+LIOI3.LIOI_ILOGIC0_OFB.LIOI_OLOGIC0_OFB always
+LIOI3.LIOI_ILOGIC0_TFB.LIOI_OLOGIC0_TFB_LOCAL always
+LIOI3.LIOI_ILOGIC1_D.LIOI_I1 always
+LIOI3.LIOI_ILOGIC1_DDLY.LIOI_IDELAY1_DATAOUT always
+LIOI3.LIOI_ILOGIC1_OFB.LIOI_OLOGIC1_OFB always
+LIOI3.LIOI_ILOGIC1_TFB.LIOI_OLOGIC1_TFB_LOCAL always
+LIOI3.LIOI_ISIN11.LIOI_ISOUT10 always
+LIOI3.LIOI_ISIN21.LIOI_ISOUT20 always
+LIOI3.LIOI_O0.LIOI_OLOGIC0_OQ always
+LIOI3.LIOI_O1.LIOI_OLOGIC1_OQ always
+LIOI3.LIOI_OLOGIC0_OQ.IOI_OLOGIC0_D1 always
+LIOI3.LIOI_OLOGIC0_TFB_LOCAL.LIOI_OLOGIC0_TFB always
+LIOI3.LIOI_OLOGIC0_TQ.IOI_OLOGIC0_T1 always
+LIOI3.LIOI_OLOGIC1_OQ.IOI_OLOGIC1_D1 always
+LIOI3.LIOI_OLOGIC1_TFB_LOCAL.LIOI_OLOGIC1_TFB always
+LIOI3.LIOI_OLOGIC1_TQ.IOI_OLOGIC1_T1 always
+LIOI3.LIOI_OSIN10.LIOI_OSOUT11 always
+LIOI3.LIOI_OSIN20.LIOI_OSOUT21 always
+LIOI3.LIOI_T0.LIOI_OLOGIC0_TQ always
+LIOI3.LIOI_T1.LIOI_OLOGIC1_TQ always
+LIOI3.LIOI3_IDELAY0_IFDLY0.IOI_FAN4_1 always
+LIOI3.LIOI3_IDELAY0_IFDLY1.IOI_FAN5_1 always
+LIOI3.LIOI3_IDELAY0_IFDLY2.IOI_BYP7_1 always
+LIOI3.LIOI3_IDELAY1_IFDLY0.IOI_FAN4_0 always
+LIOI3.LIOI3_IDELAY1_IFDLY1.IOI_FAN5_0 always
+LIOI3.LIOI3_IDELAY1_IFDLY2.IOI_BYP7_0 always
diff --git a/artix7/ppips_lioi3_sing.db b/artix7/ppips_lioi3_sing.db
new file mode 100644
index 0000000..06b8017
--- /dev/null
+++ b/artix7/ppips_lioi3_sing.db
@@ -0,0 +1,72 @@
+LIOI3_SING.IOI_LOGIC_OUTS0_0.IOI_ILOGIC0_Q1 always
+LIOI3_SING.IOI_LOGIC_OUTS1_0.IOI_IDELAY0_CNTVALUEOUT1 always
+LIOI3_SING.IOI_LOGIC_OUTS2_0.LIOI_OLOGIC0_TFB_LOCAL always
+LIOI3_SING.IOI_LOGIC_OUTS3_0.IOI_ILOGIC0_Q6 always
+LIOI3_SING.IOI_LOGIC_OUTS5_0.IOI_OLOGIC0_IOCLKGLITCH always
+LIOI3_SING.IOI_LOGIC_OUTS7_0.IOI_ILOGIC0_Q7 always
+LIOI3_SING.IOI_LOGIC_OUTS8_0.IOI_ILOGIC0_Q8 always
+LIOI3_SING.IOI_LOGIC_OUTS9_0.IOI_ILOGIC0_Q3 always
+LIOI3_SING.IOI_LOGIC_OUTS10_0.IOI_ILOGIC0_Q4 always
+LIOI3_SING.IOI_LOGIC_OUTS11_0.IOI_IDELAY0_CNTVALUEOUT4 always
+LIOI3_SING.IOI_LOGIC_OUTS14_0.IOI_ILOGIC0_Q5 always
+LIOI3_SING.IOI_LOGIC_OUTS15_0.IOI_IDELAY0_CNTVALUEOUT3 always
+LIOI3_SING.IOI_LOGIC_OUTS18_0.IOI_ILOGIC0_O always
+LIOI3_SING.IOI_LOGIC_OUTS19_0.IOI_IDELAY0_CNTVALUEOUT2 always
+LIOI3_SING.IOI_LOGIC_OUTS20_0.IOI_IDELAY0_CNTVALUEOUT0 always
+LIOI3_SING.IOI_LOGIC_OUTS23_0.IOI_ILOGIC0_Q2 always
+LIOI3_SING.IOI_IDELAY0_C.IOI_CLK1_0 always
+LIOI3_SING.IOI_IDELAY0_CE.IOI_IMUX32_0 always
+LIOI3_SING.IOI_IDELAY0_CINVCTRL.IOI_BYP6_0 always
+LIOI3_SING.IOI_IDELAY0_DATAIN.IOI_IMUX25_0 always
+LIOI3_SING.IOI_IDELAY0_INC.IOI_IMUX26_0 always
+LIOI3_SING.IOI_IDELAY0_LD.IOI_IMUX30_0 always
+LIOI3_SING.IOI_IDELAY0_LDPIPEEN.IOI_IMUX33_0 always
+LIOI3_SING.IOI_IDELAY0_REGRST.IOI_IMUX12_0 always
+LIOI3_SING.IOI_IDELAY0_CNTVALUEIN0.IOI_IMUX41_0 always
+LIOI3_SING.IOI_IDELAY0_CNTVALUEIN1.IOI_IMUX36_0 always
+LIOI3_SING.IOI_IDELAY0_CNTVALUEIN2.IOI_IMUX35_0 always
+LIOI3_SING.IOI_IDELAY0_CNTVALUEIN3.IOI_IMUX38_0 always
+LIOI3_SING.IOI_IDELAY0_CNTVALUEIN4.IOI_IMUX39_0 always
+LIOI3_SING.IOI_ILOGIC0_BITSLIP.IOI_IMUX0_0 always
+LIOI3_SING.IOI_ILOGIC0_CLKDIV.IOI_CLK0_0 always
+LIOI3_SING.IOI_ILOGIC0_DYNCLKDIVPSEL.IOI_IMUX10_0 always
+LIOI3_SING.IOI_ILOGIC0_DYNCLKDIVSEL.IOI_IMUX4_0 always
+LIOI3_SING.IOI_ILOGIC0_DYNCLKSEL.IOI_IMUX37_0 always
+LIOI3_SING.IOI_ILOGIC0_OCLK.IOI_OCLK_0 always
+LIOI3_SING.IOI_ILOGIC0_SR.IOI_CTRL1_0 always
+LIOI3_SING.IOI_ILOGIC0_CE1.IOI_IMUX5_0 always
+LIOI3_SING.IOI_ILOGIC0_CE2.IOI_IMUX14_0 always
+LIOI3_SING.IOI_OLOGIC0_CLK.IOI_OCLK_0 always
+LIOI3_SING.IOI_OLOGIC0_OCE.IOI_IMUX29_0 always
+LIOI3_SING.IOI_OLOGIC0_SR.IOI_CTRL0_0 always
+LIOI3_SING.IOI_OLOGIC0_TBYTEIN.IOI_SING_TBYTEIN always
+LIOI3_SING.IOI_OLOGIC0_TCE.IOI_IMUX1_0 always
+LIOI3_SING.IOI_OLOGIC0_D1.IOI_IMUX34_0 always
+LIOI3_SING.IOI_OLOGIC0_D2.IOI_IMUX40_0 always
+LIOI3_SING.IOI_OLOGIC0_D3.IOI_IMUX44_0 always
+LIOI3_SING.IOI_OLOGIC0_D4.IOI_IMUX42_0 always
+LIOI3_SING.IOI_OLOGIC0_D5.IOI_IMUX43_0 always
+LIOI3_SING.IOI_OLOGIC0_D6.IOI_IMUX45_0 always
+LIOI3_SING.IOI_OLOGIC0_D7.IOI_IMUX46_0 always
+LIOI3_SING.IOI_OLOGIC0_D8.IOI_IMUX47_0 always
+LIOI3_SING.IOI_OLOGIC0_T1.IOI_IMUX15_0 always
+LIOI3_SING.IOI_OLOGIC0_T2.IOI_IMUX7_0 always
+LIOI3_SING.IOI_OLOGIC0_T3.IOI_IMUX13_0 always
+LIOI3_SING.IOI_OLOGIC0_T4.IOI_IMUX21_0 always
+LIOI3_SING.LIOI_DCI_T_TERM0.IOI_IMUX6_0 always
+LIOI3_SING.LIOI_IBUF_DISABLE0.IOI_IMUX9_0 always
+LIOI3_SING.LIOI_I0.LIOI_IBUF0 always
+LIOI3_SING.LIOI_IDELAY0_DATAOUT.LIOI_IDELAY0_IDATAIN always
+LIOI3_SING.LIOI_IDELAY0_IDATAIN.LIOI_I0 always
+LIOI3_SING.LIOI_ILOGIC0_D.LIOI_I0 always
+LIOI3_SING.LIOI_ILOGIC0_DDLY.LIOI_IDELAY0_DATAOUT always
+LIOI3_SING.LIOI_ILOGIC0_OFB.LIOI_OLOGIC0_OFB always
+LIOI3_SING.LIOI_ILOGIC0_TFB.LIOI_OLOGIC0_TFB_LOCAL always
+LIOI3_SING.LIOI_O0.LIOI_OLOGIC0_OQ always
+LIOI3_SING.LIOI_OLOGIC0_OQ.IOI_OLOGIC0_D1 always
+LIOI3_SING.LIOI_OLOGIC0_TFB_LOCAL.LIOI_OLOGIC0_TFB always
+LIOI3_SING.LIOI_OLOGIC0_TQ.IOI_OLOGIC0_T1 always
+LIOI3_SING.LIOI_T0.LIOI_OLOGIC0_TQ always
+LIOI3_SING.LIOI3_IDELAY0_IFDLY0.IOI_FAN4_0 always
+LIOI3_SING.LIOI3_IDELAY0_IFDLY1.IOI_FAN5_0 always
+LIOI3_SING.LIOI3_IDELAY0_IFDLY2.IOI_BYP7_0 always
diff --git a/artix7/ppips_lioi3_tbytesrc.db b/artix7/ppips_lioi3_tbytesrc.db
new file mode 100644
index 0000000..4505234
--- /dev/null
+++ b/artix7/ppips_lioi3_tbytesrc.db
@@ -0,0 +1,158 @@
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS0_0.IOI_ILOGIC1_Q1 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS0_1.IOI_ILOGIC0_Q1 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS1_0.IOI_IDELAY1_CNTVALUEOUT1 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS1_1.IOI_IDELAY0_CNTVALUEOUT1 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS2_0.LIOI_OLOGIC1_TFB_LOCAL always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS2_1.LIOI_OLOGIC0_TFB_LOCAL always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS3_0.IOI_ILOGIC1_Q6 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS3_1.IOI_ILOGIC0_Q6 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS5_0.IOI_OLOGIC1_IOCLKGLITCH always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS5_1.IOI_OLOGIC0_IOCLKGLITCH always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS7_0.IOI_ILOGIC1_Q7 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS7_1.IOI_ILOGIC0_Q7 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS8_0.IOI_ILOGIC1_Q8 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS8_1.IOI_ILOGIC0_Q8 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS9_0.IOI_ILOGIC1_Q3 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS9_1.IOI_ILOGIC0_Q3 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS10_0.IOI_ILOGIC1_Q4 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS10_1.IOI_ILOGIC0_Q4 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS11_0.IOI_IDELAY1_CNTVALUEOUT4 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS11_1.IOI_IDELAY0_CNTVALUEOUT4 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS14_0.IOI_ILOGIC1_Q5 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS14_1.IOI_ILOGIC0_Q5 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS15_0.IOI_IDELAY1_CNTVALUEOUT3 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS15_1.IOI_IDELAY0_CNTVALUEOUT3 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS18_0.IOI_ILOGIC1_O always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS18_1.IOI_ILOGIC0_O always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS19_0.IOI_IDELAY1_CNTVALUEOUT2 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS19_1.IOI_IDELAY0_CNTVALUEOUT2 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS20_0.IOI_IDELAY1_CNTVALUEOUT0 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS20_1.IOI_IDELAY0_CNTVALUEOUT0 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS23_0.IOI_ILOGIC1_Q2 always
+LIOI3_TBYTESRC.IOI_LOGIC_OUTS23_1.IOI_ILOGIC0_Q2 always
+LIOI3_TBYTESRC.IOI_RCLK_DIV_CE0.IOI_BYP3_1 always
+LIOI3_TBYTESRC.IOI_RCLK_DIV_CE1.IOI_BYP4_1 always
+LIOI3_TBYTESRC.IOI_RCLK_DIV_CE2_1.IOI_BYP4_1 always
+LIOI3_TBYTESRC.IOI_RCLK_DIV_CE3_1.IOI_BYP3_1 always
+LIOI3_TBYTESRC.IOI_RCLK_DIV_CLR0_1.IOI_BYP3_0 always
+LIOI3_TBYTESRC.IOI_RCLK_DIV_CLR1_1.IOI_BYP4_0 always
+LIOI3_TBYTESRC.IOI_RCLK_DIV_CLR2.IOI_BYP4_0 always
+LIOI3_TBYTESRC.IOI_RCLK_DIV_CLR3.IOI_BYP3_0 always
+LIOI3_TBYTESRC.IOI_TBYTEIN.IOI_OLOGIC1_TBYTEOUT always
+LIOI3_TBYTESRC.IOI_IDELAY0_C.IOI_CLK1_1 always
+LIOI3_TBYTESRC.IOI_IDELAY0_CE.IOI_IMUX32_1 always
+LIOI3_TBYTESRC.IOI_IDELAY0_CINVCTRL.IOI_BYP6_1 always
+LIOI3_TBYTESRC.IOI_IDELAY0_DATAIN.IOI_IMUX25_1 always
+LIOI3_TBYTESRC.IOI_IDELAY0_INC.IOI_IMUX26_1 always
+LIOI3_TBYTESRC.IOI_IDELAY0_LD.IOI_IMUX30_1 always
+LIOI3_TBYTESRC.IOI_IDELAY0_LDPIPEEN.IOI_IMUX33_1 always
+LIOI3_TBYTESRC.IOI_IDELAY0_REGRST.IOI_IMUX12_1 always
+LIOI3_TBYTESRC.IOI_IDELAY0_CNTVALUEIN0.IOI_IMUX41_1 always
+LIOI3_TBYTESRC.IOI_IDELAY0_CNTVALUEIN1.IOI_IMUX36_1 always
+LIOI3_TBYTESRC.IOI_IDELAY0_CNTVALUEIN2.IOI_IMUX35_1 always
+LIOI3_TBYTESRC.IOI_IDELAY0_CNTVALUEIN3.IOI_IMUX38_1 always
+LIOI3_TBYTESRC.IOI_IDELAY0_CNTVALUEIN4.IOI_IMUX39_1 always
+LIOI3_TBYTESRC.IOI_IDELAY1_C.IOI_CLK1_0 always
+LIOI3_TBYTESRC.IOI_IDELAY1_CE.IOI_IMUX32_0 always
+LIOI3_TBYTESRC.IOI_IDELAY1_CINVCTRL.IOI_BYP6_0 always
+LIOI3_TBYTESRC.IOI_IDELAY1_DATAIN.IOI_IMUX25_0 always
+LIOI3_TBYTESRC.IOI_IDELAY1_INC.IOI_IMUX26_0 always
+LIOI3_TBYTESRC.IOI_IDELAY1_LD.IOI_IMUX30_0 always
+LIOI3_TBYTESRC.IOI_IDELAY1_LDPIPEEN.IOI_IMUX33_0 always
+LIOI3_TBYTESRC.IOI_IDELAY1_REGRST.IOI_IMUX12_0 always
+LIOI3_TBYTESRC.IOI_IDELAY1_CNTVALUEIN0.IOI_IMUX41_0 always
+LIOI3_TBYTESRC.IOI_IDELAY1_CNTVALUEIN1.IOI_IMUX36_0 always
+LIOI3_TBYTESRC.IOI_IDELAY1_CNTVALUEIN2.IOI_IMUX35_0 always
+LIOI3_TBYTESRC.IOI_IDELAY1_CNTVALUEIN3.IOI_IMUX38_0 always
+LIOI3_TBYTESRC.IOI_IDELAY1_CNTVALUEIN4.IOI_IMUX39_0 always
+LIOI3_TBYTESRC.IOI_ILOGIC0_BITSLIP.IOI_IMUX0_1 always
+LIOI3_TBYTESRC.IOI_ILOGIC0_CLKDIV.IOI_CLK0_1 always
+LIOI3_TBYTESRC.IOI_ILOGIC0_DYNCLKDIVPSEL.IOI_IMUX10_1 always
+LIOI3_TBYTESRC.IOI_ILOGIC0_DYNCLKDIVSEL.IOI_IMUX4_1 always
+LIOI3_TBYTESRC.IOI_ILOGIC0_DYNCLKSEL.IOI_IMUX37_1 always
+LIOI3_TBYTESRC.IOI_ILOGIC0_OCLK.IOI_OCLK_0 always
+LIOI3_TBYTESRC.IOI_ILOGIC0_SR.IOI_CTRL1_1 always
+LIOI3_TBYTESRC.IOI_ILOGIC0_CE1.IOI_IMUX5_1 always
+LIOI3_TBYTESRC.IOI_ILOGIC0_CE2.IOI_IMUX14_1 always
+LIOI3_TBYTESRC.IOI_ILOGIC1_BITSLIP.IOI_IMUX0_0 always
+LIOI3_TBYTESRC.IOI_ILOGIC1_CLKDIV.IOI_CLK0_0 always
+LIOI3_TBYTESRC.IOI_ILOGIC1_DYNCLKDIVPSEL.IOI_IMUX10_0 always
+LIOI3_TBYTESRC.IOI_ILOGIC1_DYNCLKDIVSEL.IOI_IMUX4_0 always
+LIOI3_TBYTESRC.IOI_ILOGIC1_DYNCLKSEL.IOI_IMUX37_0 always
+LIOI3_TBYTESRC.IOI_ILOGIC1_OCLK.IOI_OCLK_1 always
+LIOI3_TBYTESRC.IOI_ILOGIC1_SR.IOI_CTRL1_0 always
+LIOI3_TBYTESRC.IOI_ILOGIC1_CE1.IOI_IMUX5_0 always
+LIOI3_TBYTESRC.IOI_ILOGIC1_CE2.IOI_IMUX14_0 always
+LIOI3_TBYTESRC.IOI_OLOGIC0_CLK.IOI_OCLK_0 always
+LIOI3_TBYTESRC.IOI_OLOGIC0_OCE.IOI_IMUX29_1 always
+LIOI3_TBYTESRC.IOI_OLOGIC0_SR.IOI_CTRL0_1 always
+LIOI3_TBYTESRC.IOI_OLOGIC0_TBYTEIN.IOI_TBYTEIN always
+LIOI3_TBYTESRC.IOI_OLOGIC0_TCE.IOI_IMUX1_1 always
+LIOI3_TBYTESRC.IOI_OLOGIC0_D1.IOI_IMUX34_1 always
+LIOI3_TBYTESRC.IOI_OLOGIC0_D2.IOI_IMUX40_1 always
+LIOI3_TBYTESRC.IOI_OLOGIC0_D3.IOI_IMUX44_1 always
+LIOI3_TBYTESRC.IOI_OLOGIC0_D4.IOI_IMUX42_1 always
+LIOI3_TBYTESRC.IOI_OLOGIC0_D5.IOI_IMUX43_1 always
+LIOI3_TBYTESRC.IOI_OLOGIC0_D6.IOI_IMUX45_1 always
+LIOI3_TBYTESRC.IOI_OLOGIC0_D7.IOI_IMUX46_1 always
+LIOI3_TBYTESRC.IOI_OLOGIC0_D8.IOI_IMUX47_1 always
+LIOI3_TBYTESRC.IOI_OLOGIC0_T1.IOI_IMUX15_1 always
+LIOI3_TBYTESRC.IOI_OLOGIC0_T2.IOI_IMUX7_1 always
+LIOI3_TBYTESRC.IOI_OLOGIC0_T3.IOI_IMUX13_1 always
+LIOI3_TBYTESRC.IOI_OLOGIC0_T4.IOI_IMUX21_1 always
+LIOI3_TBYTESRC.IOI_OLOGIC1_CLK.IOI_OCLK_1 always
+LIOI3_TBYTESRC.IOI_OLOGIC1_OCE.IOI_IMUX29_0 always
+LIOI3_TBYTESRC.IOI_OLOGIC1_SR.IOI_CTRL0_0 always
+LIOI3_TBYTESRC.IOI_OLOGIC1_TBYTEIN.IOI_TBYTEIN always
+LIOI3_TBYTESRC.IOI_OLOGIC1_TCE.IOI_IMUX1_0 always
+LIOI3_TBYTESRC.IOI_OLOGIC1_D1.IOI_IMUX34_0 always
+LIOI3_TBYTESRC.IOI_OLOGIC1_D2.IOI_IMUX40_0 always
+LIOI3_TBYTESRC.IOI_OLOGIC1_D3.IOI_IMUX44_0 always
+LIOI3_TBYTESRC.IOI_OLOGIC1_D4.IOI_IMUX42_0 always
+LIOI3_TBYTESRC.IOI_OLOGIC1_D5.IOI_IMUX43_0 always
+LIOI3_TBYTESRC.IOI_OLOGIC1_D6.IOI_IMUX45_0 always
+LIOI3_TBYTESRC.IOI_OLOGIC1_D7.IOI_IMUX46_0 always
+LIOI3_TBYTESRC.IOI_OLOGIC1_D8.IOI_IMUX47_0 always
+LIOI3_TBYTESRC.IOI_OLOGIC1_T1.IOI_IMUX15_0 always
+LIOI3_TBYTESRC.IOI_OLOGIC1_T2.IOI_IMUX7_0 always
+LIOI3_TBYTESRC.IOI_OLOGIC1_T3.IOI_IMUX13_0 always
+LIOI3_TBYTESRC.IOI_OLOGIC1_T4.IOI_IMUX21_0 always
+LIOI3_TBYTESRC.LIOI_DCI_T_TERM0.IOI_IMUX6_1 always
+LIOI3_TBYTESRC.LIOI_DCI_T_TERM1.IOI_IMUX6_0 always
+LIOI3_TBYTESRC.LIOI_I2GCLK_TOP0.IOI_ILOGIC0_O always
+LIOI3_TBYTESRC.LIOI_IBUF_DISABLE0.IOI_IMUX9_1 always
+LIOI3_TBYTESRC.LIOI_IBUF_DISABLE1.IOI_IMUX9_0 always
+LIOI3_TBYTESRC.LIOI_I0.LIOI_IBUF0 always
+LIOI3_TBYTESRC.LIOI_I1.LIOI_IBUF1 always
+LIOI3_TBYTESRC.LIOI_IDELAY0_DATAOUT.LIOI_IDELAY0_IDATAIN always
+LIOI3_TBYTESRC.LIOI_IDELAY0_IDATAIN.LIOI_I0 always
+LIOI3_TBYTESRC.LIOI_IDELAY1_DATAOUT.LIOI_IDELAY1_IDATAIN always
+LIOI3_TBYTESRC.LIOI_IDELAY1_IDATAIN.LIOI_I1 always
+LIOI3_TBYTESRC.LIOI_ILOGIC0_D.LIOI_I0 always
+LIOI3_TBYTESRC.LIOI_ILOGIC0_DDLY.LIOI_IDELAY0_DATAOUT always
+LIOI3_TBYTESRC.LIOI_ILOGIC0_OFB.LIOI_OLOGIC0_OFB always
+LIOI3_TBYTESRC.LIOI_ILOGIC0_TFB.LIOI_OLOGIC0_TFB_LOCAL always
+LIOI3_TBYTESRC.LIOI_ILOGIC1_D.LIOI_I1 always
+LIOI3_TBYTESRC.LIOI_ILOGIC1_DDLY.LIOI_IDELAY1_DATAOUT always
+LIOI3_TBYTESRC.LIOI_ILOGIC1_OFB.LIOI_OLOGIC1_OFB always
+LIOI3_TBYTESRC.LIOI_ILOGIC1_TFB.LIOI_OLOGIC1_TFB_LOCAL always
+LIOI3_TBYTESRC.LIOI_ISIN11.LIOI_ISOUT10 always
+LIOI3_TBYTESRC.LIOI_ISIN21.LIOI_ISOUT20 always
+LIOI3_TBYTESRC.LIOI_O0.LIOI_OLOGIC0_OQ always
+LIOI3_TBYTESRC.LIOI_O1.LIOI_OLOGIC1_OQ always
+LIOI3_TBYTESRC.LIOI_OLOGIC0_OQ.IOI_OLOGIC0_D1 always
+LIOI3_TBYTESRC.LIOI_OLOGIC0_TFB_LOCAL.LIOI_OLOGIC0_TFB always
+LIOI3_TBYTESRC.LIOI_OLOGIC0_TQ.IOI_OLOGIC0_T1 always
+LIOI3_TBYTESRC.LIOI_OLOGIC1_OQ.IOI_OLOGIC1_D1 always
+LIOI3_TBYTESRC.LIOI_OLOGIC1_TFB_LOCAL.LIOI_OLOGIC1_TFB always
+LIOI3_TBYTESRC.LIOI_OLOGIC1_TQ.IOI_OLOGIC1_T1 always
+LIOI3_TBYTESRC.LIOI_OSIN10.LIOI_OSOUT11 always
+LIOI3_TBYTESRC.LIOI_OSIN20.LIOI_OSOUT21 always
+LIOI3_TBYTESRC.LIOI_T0.LIOI_OLOGIC0_TQ always
+LIOI3_TBYTESRC.LIOI_T1.LIOI_OLOGIC1_TQ always
+LIOI3_TBYTESRC.LIOI3_IDELAY0_IFDLY0.IOI_FAN4_1 always
+LIOI3_TBYTESRC.LIOI3_IDELAY0_IFDLY1.IOI_FAN5_1 always
+LIOI3_TBYTESRC.LIOI3_IDELAY0_IFDLY2.IOI_BYP7_1 always
+LIOI3_TBYTESRC.LIOI3_IDELAY1_IFDLY0.IOI_FAN4_0 always
+LIOI3_TBYTESRC.LIOI3_IDELAY1_IFDLY1.IOI_FAN5_0 always
+LIOI3_TBYTESRC.LIOI3_IDELAY1_IFDLY2.IOI_BYP7_0 always
diff --git a/artix7/ppips_rioi3.db b/artix7/ppips_rioi3.db
new file mode 100644
index 0000000..d043498
--- /dev/null
+++ b/artix7/ppips_rioi3.db
@@ -0,0 +1,165 @@
+RIOI3.IOI_IDELAYCTRL_RST.IOI_IMUX24_0 always
+RIOI3.IOI_IMUX_RC2.IOI_BYP4_1 always
+RIOI3.IOI_IMUX_RC3.IOI_BYP3_1 always
+RIOI3.IOI_LOGIC_OUTS0_0.IOI_ILOGIC1_Q1 always
+RIOI3.IOI_LOGIC_OUTS0_1.IOI_ILOGIC0_Q1 always
+RIOI3.IOI_LOGIC_OUTS1_0.IOI_IDELAY1_CNTVALUEOUT1 always
+RIOI3.IOI_LOGIC_OUTS1_1.IOI_IDELAY0_CNTVALUEOUT1 always
+RIOI3.IOI_LOGIC_OUTS2_0.RIOI_OLOGIC1_TFB_LOCAL always
+RIOI3.IOI_LOGIC_OUTS2_1.RIOI_OLOGIC0_TFB_LOCAL always
+RIOI3.IOI_LOGIC_OUTS3_0.IOI_ILOGIC1_Q6 always
+RIOI3.IOI_LOGIC_OUTS3_1.IOI_ILOGIC0_Q6 always
+RIOI3.IOI_LOGIC_OUTS5_0.IOI_OLOGIC1_IOCLKGLITCH always
+RIOI3.IOI_LOGIC_OUTS5_1.IOI_OLOGIC0_IOCLKGLITCH always
+RIOI3.IOI_LOGIC_OUTS7_0.IOI_ILOGIC1_Q7 always
+RIOI3.IOI_LOGIC_OUTS7_1.IOI_ILOGIC0_Q7 always
+RIOI3.IOI_LOGIC_OUTS8_0.IOI_ILOGIC1_Q8 always
+RIOI3.IOI_LOGIC_OUTS8_1.IOI_ILOGIC0_Q8 always
+RIOI3.IOI_LOGIC_OUTS9_0.IOI_ILOGIC1_Q3 always
+RIOI3.IOI_LOGIC_OUTS9_1.IOI_ILOGIC0_Q3 always
+RIOI3.IOI_LOGIC_OUTS10_0.IOI_ILOGIC1_Q4 always
+RIOI3.IOI_LOGIC_OUTS10_1.IOI_ILOGIC0_Q4 always
+RIOI3.IOI_LOGIC_OUTS11_0.IOI_IDELAY1_CNTVALUEOUT4 always
+RIOI3.IOI_LOGIC_OUTS11_1.IOI_IDELAY0_CNTVALUEOUT4 always
+RIOI3.IOI_LOGIC_OUTS13_0.IOI_IDELAYCTRL_DNPULSEOUT always
+RIOI3.IOI_LOGIC_OUTS13_1.IOI_IDELAYCTRL_OUTN1 always
+RIOI3.IOI_LOGIC_OUTS14_0.IOI_ILOGIC1_Q5 always
+RIOI3.IOI_LOGIC_OUTS14_1.IOI_ILOGIC0_Q5 always
+RIOI3.IOI_LOGIC_OUTS15_0.IOI_IDELAY1_CNTVALUEOUT3 always
+RIOI3.IOI_LOGIC_OUTS15_1.IOI_IDELAY0_CNTVALUEOUT3 always
+RIOI3.IOI_LOGIC_OUTS16_0.IOI_IDELAYCTRL_UPPULSEOUT always
+RIOI3.IOI_LOGIC_OUTS16_1.IOI_IDELAYCTRL_OUTN65 always
+RIOI3.IOI_LOGIC_OUTS18_0.IOI_ILOGIC1_O always
+RIOI3.IOI_LOGIC_OUTS18_1.IOI_ILOGIC0_O always
+RIOI3.IOI_LOGIC_OUTS19_0.IOI_IDELAY1_CNTVALUEOUT2 always
+RIOI3.IOI_LOGIC_OUTS19_1.IOI_IDELAY0_CNTVALUEOUT2 always
+RIOI3.IOI_LOGIC_OUTS20_0.IOI_IDELAY1_CNTVALUEOUT0 always
+RIOI3.IOI_LOGIC_OUTS20_1.IOI_IDELAY0_CNTVALUEOUT0 always
+RIOI3.IOI_LOGIC_OUTS22_1.IOI_IDELAYCTRL_RDY always
+RIOI3.IOI_LOGIC_OUTS23_0.IOI_ILOGIC1_Q2 always
+RIOI3.IOI_LOGIC_OUTS23_1.IOI_ILOGIC0_Q2 always
+RIOI3.IOI_RCLK_DIV_CE0.IOI_BYP3_1 always
+RIOI3.IOI_RCLK_DIV_CE1.IOI_BYP4_1 always
+RIOI3.IOI_RCLK_DIV_CE2_1.IOI_BYP4_1 always
+RIOI3.IOI_RCLK_DIV_CE3_1.IOI_BYP3_1 always
+RIOI3.IOI_RCLK_DIV_CLR0_1.IOI_BYP3_0 always
+RIOI3.IOI_RCLK_DIV_CLR1_1.IOI_BYP4_0 always
+RIOI3.IOI_RCLK_DIV_CLR2.IOI_BYP4_0 always
+RIOI3.IOI_RCLK_DIV_CLR3.IOI_BYP3_0 always
+RIOI3.IOI_IDELAY0_C.IOI_CLK1_1 always
+RIOI3.IOI_IDELAY0_CE.IOI_IMUX32_1 always
+RIOI3.IOI_IDELAY0_CINVCTRL.IOI_BYP6_1 always
+RIOI3.IOI_IDELAY0_DATAIN.IOI_IMUX25_1 always
+RIOI3.IOI_IDELAY0_INC.IOI_IMUX26_1 always
+RIOI3.IOI_IDELAY0_LD.IOI_IMUX30_1 always
+RIOI3.IOI_IDELAY0_LDPIPEEN.IOI_IMUX33_1 always
+RIOI3.IOI_IDELAY0_REGRST.IOI_IMUX12_1 always
+RIOI3.IOI_IDELAY0_CNTVALUEIN0.IOI_IMUX41_1 always
+RIOI3.IOI_IDELAY0_CNTVALUEIN1.IOI_IMUX36_1 always
+RIOI3.IOI_IDELAY0_CNTVALUEIN2.IOI_IMUX35_1 always
+RIOI3.IOI_IDELAY0_CNTVALUEIN3.IOI_IMUX38_1 always
+RIOI3.IOI_IDELAY0_CNTVALUEIN4.IOI_IMUX39_1 always
+RIOI3.IOI_IDELAY1_C.IOI_CLK1_0 always
+RIOI3.IOI_IDELAY1_CE.IOI_IMUX32_0 always
+RIOI3.IOI_IDELAY1_CINVCTRL.IOI_BYP6_0 always
+RIOI3.IOI_IDELAY1_DATAIN.IOI_IMUX25_0 always
+RIOI3.IOI_IDELAY1_INC.IOI_IMUX26_0 always
+RIOI3.IOI_IDELAY1_LD.IOI_IMUX30_0 always
+RIOI3.IOI_IDELAY1_LDPIPEEN.IOI_IMUX33_0 always
+RIOI3.IOI_IDELAY1_REGRST.IOI_IMUX12_0 always
+RIOI3.IOI_IDELAY1_CNTVALUEIN0.IOI_IMUX41_0 always
+RIOI3.IOI_IDELAY1_CNTVALUEIN1.IOI_IMUX36_0 always
+RIOI3.IOI_IDELAY1_CNTVALUEIN2.IOI_IMUX35_0 always
+RIOI3.IOI_IDELAY1_CNTVALUEIN3.IOI_IMUX38_0 always
+RIOI3.IOI_IDELAY1_CNTVALUEIN4.IOI_IMUX39_0 always
+RIOI3.IOI_ILOGIC0_BITSLIP.IOI_IMUX0_1 always
+RIOI3.IOI_ILOGIC0_CLKDIV.IOI_CLK0_1 always
+RIOI3.IOI_ILOGIC0_DYNCLKDIVPSEL.IOI_IMUX10_1 always
+RIOI3.IOI_ILOGIC0_DYNCLKDIVSEL.IOI_IMUX4_1 always
+RIOI3.IOI_ILOGIC0_DYNCLKSEL.IOI_IMUX37_1 always
+RIOI3.IOI_ILOGIC0_OCLK.IOI_OCLK_0 always
+RIOI3.IOI_ILOGIC0_SR.IOI_CTRL1_1 always
+RIOI3.IOI_ILOGIC0_CE1.IOI_IMUX5_1 always
+RIOI3.IOI_ILOGIC0_CE2.IOI_IMUX14_1 always
+RIOI3.IOI_ILOGIC1_BITSLIP.IOI_IMUX0_0 always
+RIOI3.IOI_ILOGIC1_CLKDIV.IOI_CLK0_0 always
+RIOI3.IOI_ILOGIC1_DYNCLKDIVPSEL.IOI_IMUX10_0 always
+RIOI3.IOI_ILOGIC1_DYNCLKDIVSEL.IOI_IMUX4_0 always
+RIOI3.IOI_ILOGIC1_DYNCLKSEL.IOI_IMUX37_0 always
+RIOI3.IOI_ILOGIC1_OCLK.IOI_OCLK_1 always
+RIOI3.IOI_ILOGIC1_SR.IOI_CTRL1_0 always
+RIOI3.IOI_ILOGIC1_CE1.IOI_IMUX5_0 always
+RIOI3.IOI_ILOGIC1_CE2.IOI_IMUX14_0 always
+RIOI3.IOI_OLOGIC0_CLK.IOI_OCLK_0 always
+RIOI3.IOI_OLOGIC0_OCE.IOI_IMUX29_1 always
+RIOI3.IOI_OLOGIC0_SR.IOI_CTRL0_1 always
+RIOI3.IOI_OLOGIC0_TBYTEIN.IOI_TBYTEIN always
+RIOI3.IOI_OLOGIC0_TCE.IOI_IMUX1_1 always
+RIOI3.IOI_OLOGIC0_D1.IOI_IMUX34_1 always
+RIOI3.IOI_OLOGIC0_D2.IOI_IMUX40_1 always
+RIOI3.IOI_OLOGIC0_D3.IOI_IMUX44_1 always
+RIOI3.IOI_OLOGIC0_D4.IOI_IMUX42_1 always
+RIOI3.IOI_OLOGIC0_D5.IOI_IMUX43_1 always
+RIOI3.IOI_OLOGIC0_D6.IOI_IMUX45_1 always
+RIOI3.IOI_OLOGIC0_D7.IOI_IMUX46_1 always
+RIOI3.IOI_OLOGIC0_D8.IOI_IMUX47_1 always
+RIOI3.IOI_OLOGIC0_T1.IOI_IMUX15_1 always
+RIOI3.IOI_OLOGIC0_T2.IOI_IMUX7_1 always
+RIOI3.IOI_OLOGIC0_T3.IOI_IMUX13_1 always
+RIOI3.IOI_OLOGIC0_T4.IOI_IMUX21_1 always
+RIOI3.IOI_OLOGIC1_CLK.IOI_OCLK_1 always
+RIOI3.IOI_OLOGIC1_OCE.IOI_IMUX29_0 always
+RIOI3.IOI_OLOGIC1_SR.IOI_CTRL0_0 always
+RIOI3.IOI_OLOGIC1_TBYTEIN.IOI_TBYTEIN always
+RIOI3.IOI_OLOGIC1_TCE.IOI_IMUX1_0 always
+RIOI3.IOI_OLOGIC1_D1.IOI_IMUX34_0 always
+RIOI3.IOI_OLOGIC1_D2.IOI_IMUX40_0 always
+RIOI3.IOI_OLOGIC1_D3.IOI_IMUX44_0 always
+RIOI3.IOI_OLOGIC1_D4.IOI_IMUX42_0 always
+RIOI3.IOI_OLOGIC1_D5.IOI_IMUX43_0 always
+RIOI3.IOI_OLOGIC1_D6.IOI_IMUX45_0 always
+RIOI3.IOI_OLOGIC1_D7.IOI_IMUX46_0 always
+RIOI3.IOI_OLOGIC1_D8.IOI_IMUX47_0 always
+RIOI3.IOI_OLOGIC1_T1.IOI_IMUX15_0 always
+RIOI3.IOI_OLOGIC1_T2.IOI_IMUX7_0 always
+RIOI3.IOI_OLOGIC1_T3.IOI_IMUX13_0 always
+RIOI3.IOI_OLOGIC1_T4.IOI_IMUX21_0 always
+RIOI3.RIOI_DCI_T_TERM0.IOI_IMUX6_1 always
+RIOI3.RIOI_DCI_T_TERM1.IOI_IMUX6_0 always
+RIOI3.RIOI_I2GCLK_TOP0.IOI_ILOGIC0_O always
+RIOI3.RIOI_IBUF_DISABLE0.IOI_IMUX9_1 always
+RIOI3.RIOI_IBUF_DISABLE1.IOI_IMUX9_0 always
+RIOI3.RIOI_I0.RIOI_IBUF0 always
+RIOI3.RIOI_I1.RIOI_IBUF1 always
+RIOI3.RIOI_IDELAY0_DATAOUT.RIOI_IDELAY0_IDATAIN always
+RIOI3.RIOI_IDELAY0_IDATAIN.RIOI_I0 always
+RIOI3.RIOI_IDELAY1_DATAOUT.RIOI_IDELAY1_IDATAIN always
+RIOI3.RIOI_IDELAY1_IDATAIN.RIOI_I1 always
+RIOI3.RIOI_ILOGIC0_D.RIOI_I0 always
+RIOI3.RIOI_ILOGIC0_DDLY.RIOI_IDELAY0_DATAOUT always
+RIOI3.RIOI_ILOGIC0_OFB.RIOI_OLOGIC0_OFB always
+RIOI3.RIOI_ILOGIC0_TFB.RIOI_OLOGIC0_TFB_LOCAL always
+RIOI3.RIOI_ILOGIC1_D.RIOI_I1 always
+RIOI3.RIOI_ILOGIC1_DDLY.RIOI_IDELAY1_DATAOUT always
+RIOI3.RIOI_ILOGIC1_OFB.RIOI_OLOGIC1_OFB always
+RIOI3.RIOI_ILOGIC1_TFB.RIOI_OLOGIC1_TFB_LOCAL always
+RIOI3.RIOI_ISIN11.RIOI_ISOUT10 always
+RIOI3.RIOI_ISIN21.RIOI_ISOUT20 always
+RIOI3.RIOI_O0.RIOI_OLOGIC0_OQ always
+RIOI3.RIOI_O1.RIOI_OLOGIC1_OQ always
+RIOI3.RIOI_OLOGIC0_OQ.IOI_OLOGIC0_D1 always
+RIOI3.RIOI_OLOGIC0_TFB_LOCAL.RIOI_OLOGIC0_TFB always
+RIOI3.RIOI_OLOGIC0_TQ.IOI_OLOGIC0_T1 always
+RIOI3.RIOI_OLOGIC1_OQ.IOI_OLOGIC1_D1 always
+RIOI3.RIOI_OLOGIC1_TFB_LOCAL.RIOI_OLOGIC1_TFB always
+RIOI3.RIOI_OLOGIC1_TQ.IOI_OLOGIC1_T1 always
+RIOI3.RIOI_OSIN10.RIOI_OSOUT11 always
+RIOI3.RIOI_OSIN20.RIOI_OSOUT21 always
+RIOI3.RIOI_T0.RIOI_OLOGIC0_TQ always
+RIOI3.RIOI_T1.RIOI_OLOGIC1_TQ always
+RIOI3.RIOI3_IDELAY0_IFDLY0.IOI_FAN4_1 always
+RIOI3.RIOI3_IDELAY0_IFDLY1.IOI_FAN5_1 always
+RIOI3.RIOI3_IDELAY0_IFDLY2.IOI_BYP7_1 always
+RIOI3.RIOI3_IDELAY1_IFDLY0.IOI_FAN4_0 always
+RIOI3.RIOI3_IDELAY1_IFDLY1.IOI_FAN5_0 always
+RIOI3.RIOI3_IDELAY1_IFDLY2.IOI_BYP7_0 always
diff --git a/artix7/ppips_rioi3_sing.db b/artix7/ppips_rioi3_sing.db
new file mode 100644
index 0000000..930e0ab
--- /dev/null
+++ b/artix7/ppips_rioi3_sing.db
@@ -0,0 +1,72 @@
+RIOI3_SING.IOI_LOGIC_OUTS0_0.IOI_ILOGIC0_Q1 always
+RIOI3_SING.IOI_LOGIC_OUTS1_0.IOI_IDELAY0_CNTVALUEOUT1 always
+RIOI3_SING.IOI_LOGIC_OUTS2_0.RIOI_OLOGIC0_TFB_LOCAL always
+RIOI3_SING.IOI_LOGIC_OUTS3_0.IOI_ILOGIC0_Q6 always
+RIOI3_SING.IOI_LOGIC_OUTS5_0.IOI_OLOGIC0_IOCLKGLITCH always
+RIOI3_SING.IOI_LOGIC_OUTS7_0.IOI_ILOGIC0_Q7 always
+RIOI3_SING.IOI_LOGIC_OUTS8_0.IOI_ILOGIC0_Q8 always
+RIOI3_SING.IOI_LOGIC_OUTS9_0.IOI_ILOGIC0_Q3 always
+RIOI3_SING.IOI_LOGIC_OUTS10_0.IOI_ILOGIC0_Q4 always
+RIOI3_SING.IOI_LOGIC_OUTS11_0.IOI_IDELAY0_CNTVALUEOUT4 always
+RIOI3_SING.IOI_LOGIC_OUTS14_0.IOI_ILOGIC0_Q5 always
+RIOI3_SING.IOI_LOGIC_OUTS15_0.IOI_IDELAY0_CNTVALUEOUT3 always
+RIOI3_SING.IOI_LOGIC_OUTS18_0.IOI_ILOGIC0_O always
+RIOI3_SING.IOI_LOGIC_OUTS19_0.IOI_IDELAY0_CNTVALUEOUT2 always
+RIOI3_SING.IOI_LOGIC_OUTS20_0.IOI_IDELAY0_CNTVALUEOUT0 always
+RIOI3_SING.IOI_LOGIC_OUTS23_0.IOI_ILOGIC0_Q2 always
+RIOI3_SING.IOI_IDELAY0_C.IOI_CLK1_0 always
+RIOI3_SING.IOI_IDELAY0_CE.IOI_IMUX32_0 always
+RIOI3_SING.IOI_IDELAY0_CINVCTRL.IOI_BYP6_0 always
+RIOI3_SING.IOI_IDELAY0_DATAIN.IOI_IMUX25_0 always
+RIOI3_SING.IOI_IDELAY0_INC.IOI_IMUX26_0 always
+RIOI3_SING.IOI_IDELAY0_LD.IOI_IMUX30_0 always
+RIOI3_SING.IOI_IDELAY0_LDPIPEEN.IOI_IMUX33_0 always
+RIOI3_SING.IOI_IDELAY0_REGRST.IOI_IMUX12_0 always
+RIOI3_SING.IOI_IDELAY0_CNTVALUEIN0.IOI_IMUX41_0 always
+RIOI3_SING.IOI_IDELAY0_CNTVALUEIN1.IOI_IMUX36_0 always
+RIOI3_SING.IOI_IDELAY0_CNTVALUEIN2.IOI_IMUX35_0 always
+RIOI3_SING.IOI_IDELAY0_CNTVALUEIN3.IOI_IMUX38_0 always
+RIOI3_SING.IOI_IDELAY0_CNTVALUEIN4.IOI_IMUX39_0 always
+RIOI3_SING.IOI_ILOGIC0_BITSLIP.IOI_IMUX0_0 always
+RIOI3_SING.IOI_ILOGIC0_CLKDIV.IOI_CLK0_0 always
+RIOI3_SING.IOI_ILOGIC0_DYNCLKDIVPSEL.IOI_IMUX10_0 always
+RIOI3_SING.IOI_ILOGIC0_DYNCLKDIVSEL.IOI_IMUX4_0 always
+RIOI3_SING.IOI_ILOGIC0_DYNCLKSEL.IOI_IMUX37_0 always
+RIOI3_SING.IOI_ILOGIC0_OCLK.IOI_OCLK_0 always
+RIOI3_SING.IOI_ILOGIC0_SR.IOI_CTRL1_0 always
+RIOI3_SING.IOI_ILOGIC0_CE1.IOI_IMUX5_0 always
+RIOI3_SING.IOI_ILOGIC0_CE2.IOI_IMUX14_0 always
+RIOI3_SING.IOI_OLOGIC0_CLK.IOI_OCLK_0 always
+RIOI3_SING.IOI_OLOGIC0_OCE.IOI_IMUX29_0 always
+RIOI3_SING.IOI_OLOGIC0_SR.IOI_CTRL0_0 always
+RIOI3_SING.IOI_OLOGIC0_TBYTEIN.IOI_SING_TBYTEIN always
+RIOI3_SING.IOI_OLOGIC0_TCE.IOI_IMUX1_0 always
+RIOI3_SING.IOI_OLOGIC0_D1.IOI_IMUX34_0 always
+RIOI3_SING.IOI_OLOGIC0_D2.IOI_IMUX40_0 always
+RIOI3_SING.IOI_OLOGIC0_D3.IOI_IMUX44_0 always
+RIOI3_SING.IOI_OLOGIC0_D4.IOI_IMUX42_0 always
+RIOI3_SING.IOI_OLOGIC0_D5.IOI_IMUX43_0 always
+RIOI3_SING.IOI_OLOGIC0_D6.IOI_IMUX45_0 always
+RIOI3_SING.IOI_OLOGIC0_D7.IOI_IMUX46_0 always
+RIOI3_SING.IOI_OLOGIC0_D8.IOI_IMUX47_0 always
+RIOI3_SING.IOI_OLOGIC0_T1.IOI_IMUX15_0 always
+RIOI3_SING.IOI_OLOGIC0_T2.IOI_IMUX7_0 always
+RIOI3_SING.IOI_OLOGIC0_T3.IOI_IMUX13_0 always
+RIOI3_SING.IOI_OLOGIC0_T4.IOI_IMUX21_0 always
+RIOI3_SING.RIOI_DCI_T_TERM0.IOI_IMUX6_0 always
+RIOI3_SING.RIOI_IBUF_DISABLE0.IOI_IMUX9_0 always
+RIOI3_SING.RIOI_I0.RIOI_IBUF0 always
+RIOI3_SING.RIOI_IDELAY0_DATAOUT.RIOI_IDELAY0_IDATAIN always
+RIOI3_SING.RIOI_IDELAY0_IDATAIN.RIOI_I0 always
+RIOI3_SING.RIOI_ILOGIC0_D.RIOI_I0 always
+RIOI3_SING.RIOI_ILOGIC0_DDLY.RIOI_IDELAY0_DATAOUT always
+RIOI3_SING.RIOI_ILOGIC0_OFB.RIOI_OLOGIC0_OFB always
+RIOI3_SING.RIOI_ILOGIC0_TFB.RIOI_OLOGIC0_TFB_LOCAL always
+RIOI3_SING.RIOI_O0.RIOI_OLOGIC0_OQ always
+RIOI3_SING.RIOI_OLOGIC0_OQ.IOI_OLOGIC0_D1 always
+RIOI3_SING.RIOI_OLOGIC0_TFB_LOCAL.RIOI_OLOGIC0_TFB always
+RIOI3_SING.RIOI_OLOGIC0_TQ.IOI_OLOGIC0_T1 always
+RIOI3_SING.RIOI_T0.RIOI_OLOGIC0_TQ always
+RIOI3_SING.RIOI3_IDELAY0_IFDLY0.IOI_FAN4_0 always
+RIOI3_SING.RIOI3_IDELAY0_IFDLY1.IOI_FAN5_0 always
+RIOI3_SING.RIOI3_IDELAY0_IFDLY2.IOI_BYP7_0 always
diff --git a/artix7/ppips_rioi3_tbytesrc.db b/artix7/ppips_rioi3_tbytesrc.db
new file mode 100644
index 0000000..05c0b07
--- /dev/null
+++ b/artix7/ppips_rioi3_tbytesrc.db
@@ -0,0 +1,158 @@
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS0_0.IOI_ILOGIC1_Q1 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS0_1.IOI_ILOGIC0_Q1 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS1_0.IOI_IDELAY1_CNTVALUEOUT1 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS1_1.IOI_IDELAY0_CNTVALUEOUT1 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS2_0.RIOI_OLOGIC1_TFB_LOCAL always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS2_1.RIOI_OLOGIC0_TFB_LOCAL always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS3_0.IOI_ILOGIC1_Q6 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS3_1.IOI_ILOGIC0_Q6 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS5_0.IOI_OLOGIC1_IOCLKGLITCH always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS5_1.IOI_OLOGIC0_IOCLKGLITCH always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS7_0.IOI_ILOGIC1_Q7 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS7_1.IOI_ILOGIC0_Q7 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS8_0.IOI_ILOGIC1_Q8 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS8_1.IOI_ILOGIC0_Q8 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS9_0.IOI_ILOGIC1_Q3 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS9_1.IOI_ILOGIC0_Q3 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS10_0.IOI_ILOGIC1_Q4 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS10_1.IOI_ILOGIC0_Q4 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS11_0.IOI_IDELAY1_CNTVALUEOUT4 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS11_1.IOI_IDELAY0_CNTVALUEOUT4 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS14_0.IOI_ILOGIC1_Q5 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS14_1.IOI_ILOGIC0_Q5 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS15_0.IOI_IDELAY1_CNTVALUEOUT3 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS15_1.IOI_IDELAY0_CNTVALUEOUT3 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS18_0.IOI_ILOGIC1_O always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS18_1.IOI_ILOGIC0_O always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS19_0.IOI_IDELAY1_CNTVALUEOUT2 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS19_1.IOI_IDELAY0_CNTVALUEOUT2 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS20_0.IOI_IDELAY1_CNTVALUEOUT0 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS20_1.IOI_IDELAY0_CNTVALUEOUT0 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS23_0.IOI_ILOGIC1_Q2 always
+RIOI3_TBYTESRC.IOI_LOGIC_OUTS23_1.IOI_ILOGIC0_Q2 always
+RIOI3_TBYTESRC.IOI_RCLK_DIV_CE0.IOI_BYP3_1 always
+RIOI3_TBYTESRC.IOI_RCLK_DIV_CE1.IOI_BYP4_1 always
+RIOI3_TBYTESRC.IOI_RCLK_DIV_CE2_1.IOI_BYP4_1 always
+RIOI3_TBYTESRC.IOI_RCLK_DIV_CE3_1.IOI_BYP3_1 always
+RIOI3_TBYTESRC.IOI_RCLK_DIV_CLR0_1.IOI_BYP3_0 always
+RIOI3_TBYTESRC.IOI_RCLK_DIV_CLR1_1.IOI_BYP4_0 always
+RIOI3_TBYTESRC.IOI_RCLK_DIV_CLR2.IOI_BYP4_0 always
+RIOI3_TBYTESRC.IOI_RCLK_DIV_CLR3.IOI_BYP3_0 always
+RIOI3_TBYTESRC.IOI_TBYTEIN.IOI_OLOGIC1_TBYTEOUT always
+RIOI3_TBYTESRC.IOI_IDELAY0_C.IOI_CLK1_1 always
+RIOI3_TBYTESRC.IOI_IDELAY0_CE.IOI_IMUX32_1 always
+RIOI3_TBYTESRC.IOI_IDELAY0_CINVCTRL.IOI_BYP6_1 always
+RIOI3_TBYTESRC.IOI_IDELAY0_DATAIN.IOI_IMUX25_1 always
+RIOI3_TBYTESRC.IOI_IDELAY0_INC.IOI_IMUX26_1 always
+RIOI3_TBYTESRC.IOI_IDELAY0_LD.IOI_IMUX30_1 always
+RIOI3_TBYTESRC.IOI_IDELAY0_LDPIPEEN.IOI_IMUX33_1 always
+RIOI3_TBYTESRC.IOI_IDELAY0_REGRST.IOI_IMUX12_1 always
+RIOI3_TBYTESRC.IOI_IDELAY0_CNTVALUEIN0.IOI_IMUX41_1 always
+RIOI3_TBYTESRC.IOI_IDELAY0_CNTVALUEIN1.IOI_IMUX36_1 always
+RIOI3_TBYTESRC.IOI_IDELAY0_CNTVALUEIN2.IOI_IMUX35_1 always
+RIOI3_TBYTESRC.IOI_IDELAY0_CNTVALUEIN3.IOI_IMUX38_1 always
+RIOI3_TBYTESRC.IOI_IDELAY0_CNTVALUEIN4.IOI_IMUX39_1 always
+RIOI3_TBYTESRC.IOI_IDELAY1_C.IOI_CLK1_0 always
+RIOI3_TBYTESRC.IOI_IDELAY1_CE.IOI_IMUX32_0 always
+RIOI3_TBYTESRC.IOI_IDELAY1_CINVCTRL.IOI_BYP6_0 always
+RIOI3_TBYTESRC.IOI_IDELAY1_DATAIN.IOI_IMUX25_0 always
+RIOI3_TBYTESRC.IOI_IDELAY1_INC.IOI_IMUX26_0 always
+RIOI3_TBYTESRC.IOI_IDELAY1_LD.IOI_IMUX30_0 always
+RIOI3_TBYTESRC.IOI_IDELAY1_LDPIPEEN.IOI_IMUX33_0 always
+RIOI3_TBYTESRC.IOI_IDELAY1_REGRST.IOI_IMUX12_0 always
+RIOI3_TBYTESRC.IOI_IDELAY1_CNTVALUEIN0.IOI_IMUX41_0 always
+RIOI3_TBYTESRC.IOI_IDELAY1_CNTVALUEIN1.IOI_IMUX36_0 always
+RIOI3_TBYTESRC.IOI_IDELAY1_CNTVALUEIN2.IOI_IMUX35_0 always
+RIOI3_TBYTESRC.IOI_IDELAY1_CNTVALUEIN3.IOI_IMUX38_0 always
+RIOI3_TBYTESRC.IOI_IDELAY1_CNTVALUEIN4.IOI_IMUX39_0 always
+RIOI3_TBYTESRC.IOI_ILOGIC0_BITSLIP.IOI_IMUX0_1 always
+RIOI3_TBYTESRC.IOI_ILOGIC0_CLKDIV.IOI_CLK0_1 always
+RIOI3_TBYTESRC.IOI_ILOGIC0_DYNCLKDIVPSEL.IOI_IMUX10_1 always
+RIOI3_TBYTESRC.IOI_ILOGIC0_DYNCLKDIVSEL.IOI_IMUX4_1 always
+RIOI3_TBYTESRC.IOI_ILOGIC0_DYNCLKSEL.IOI_IMUX37_1 always
+RIOI3_TBYTESRC.IOI_ILOGIC0_OCLK.IOI_OCLK_0 always
+RIOI3_TBYTESRC.IOI_ILOGIC0_SR.IOI_CTRL1_1 always
+RIOI3_TBYTESRC.IOI_ILOGIC0_CE1.IOI_IMUX5_1 always
+RIOI3_TBYTESRC.IOI_ILOGIC0_CE2.IOI_IMUX14_1 always
+RIOI3_TBYTESRC.IOI_ILOGIC1_BITSLIP.IOI_IMUX0_0 always
+RIOI3_TBYTESRC.IOI_ILOGIC1_CLKDIV.IOI_CLK0_0 always
+RIOI3_TBYTESRC.IOI_ILOGIC1_DYNCLKDIVPSEL.IOI_IMUX10_0 always
+RIOI3_TBYTESRC.IOI_ILOGIC1_DYNCLKDIVSEL.IOI_IMUX4_0 always
+RIOI3_TBYTESRC.IOI_ILOGIC1_DYNCLKSEL.IOI_IMUX37_0 always
+RIOI3_TBYTESRC.IOI_ILOGIC1_OCLK.IOI_OCLK_1 always
+RIOI3_TBYTESRC.IOI_ILOGIC1_SR.IOI_CTRL1_0 always
+RIOI3_TBYTESRC.IOI_ILOGIC1_CE1.IOI_IMUX5_0 always
+RIOI3_TBYTESRC.IOI_ILOGIC1_CE2.IOI_IMUX14_0 always
+RIOI3_TBYTESRC.IOI_OLOGIC0_CLK.IOI_OCLK_0 always
+RIOI3_TBYTESRC.IOI_OLOGIC0_OCE.IOI_IMUX29_1 always
+RIOI3_TBYTESRC.IOI_OLOGIC0_SR.IOI_CTRL0_1 always
+RIOI3_TBYTESRC.IOI_OLOGIC0_TBYTEIN.IOI_TBYTEIN always
+RIOI3_TBYTESRC.IOI_OLOGIC0_TCE.IOI_IMUX1_1 always
+RIOI3_TBYTESRC.IOI_OLOGIC0_D1.IOI_IMUX34_1 always
+RIOI3_TBYTESRC.IOI_OLOGIC0_D2.IOI_IMUX40_1 always
+RIOI3_TBYTESRC.IOI_OLOGIC0_D3.IOI_IMUX44_1 always
+RIOI3_TBYTESRC.IOI_OLOGIC0_D4.IOI_IMUX42_1 always
+RIOI3_TBYTESRC.IOI_OLOGIC0_D5.IOI_IMUX43_1 always
+RIOI3_TBYTESRC.IOI_OLOGIC0_D6.IOI_IMUX45_1 always
+RIOI3_TBYTESRC.IOI_OLOGIC0_D7.IOI_IMUX46_1 always
+RIOI3_TBYTESRC.IOI_OLOGIC0_D8.IOI_IMUX47_1 always
+RIOI3_TBYTESRC.IOI_OLOGIC0_T1.IOI_IMUX15_1 always
+RIOI3_TBYTESRC.IOI_OLOGIC0_T2.IOI_IMUX7_1 always
+RIOI3_TBYTESRC.IOI_OLOGIC0_T3.IOI_IMUX13_1 always
+RIOI3_TBYTESRC.IOI_OLOGIC0_T4.IOI_IMUX21_1 always
+RIOI3_TBYTESRC.IOI_OLOGIC1_CLK.IOI_OCLK_1 always
+RIOI3_TBYTESRC.IOI_OLOGIC1_OCE.IOI_IMUX29_0 always
+RIOI3_TBYTESRC.IOI_OLOGIC1_SR.IOI_CTRL0_0 always
+RIOI3_TBYTESRC.IOI_OLOGIC1_TBYTEIN.IOI_TBYTEIN always
+RIOI3_TBYTESRC.IOI_OLOGIC1_TCE.IOI_IMUX1_0 always
+RIOI3_TBYTESRC.IOI_OLOGIC1_D1.IOI_IMUX34_0 always
+RIOI3_TBYTESRC.IOI_OLOGIC1_D2.IOI_IMUX40_0 always
+RIOI3_TBYTESRC.IOI_OLOGIC1_D3.IOI_IMUX44_0 always
+RIOI3_TBYTESRC.IOI_OLOGIC1_D4.IOI_IMUX42_0 always
+RIOI3_TBYTESRC.IOI_OLOGIC1_D5.IOI_IMUX43_0 always
+RIOI3_TBYTESRC.IOI_OLOGIC1_D6.IOI_IMUX45_0 always
+RIOI3_TBYTESRC.IOI_OLOGIC1_D7.IOI_IMUX46_0 always
+RIOI3_TBYTESRC.IOI_OLOGIC1_D8.IOI_IMUX47_0 always
+RIOI3_TBYTESRC.IOI_OLOGIC1_T1.IOI_IMUX15_0 always
+RIOI3_TBYTESRC.IOI_OLOGIC1_T2.IOI_IMUX7_0 always
+RIOI3_TBYTESRC.IOI_OLOGIC1_T3.IOI_IMUX13_0 always
+RIOI3_TBYTESRC.IOI_OLOGIC1_T4.IOI_IMUX21_0 always
+RIOI3_TBYTESRC.RIOI_DCI_T_TERM0.IOI_IMUX6_1 always
+RIOI3_TBYTESRC.RIOI_DCI_T_TERM1.IOI_IMUX6_0 always
+RIOI3_TBYTESRC.RIOI_I2GCLK_TOP0.IOI_ILOGIC0_O always
+RIOI3_TBYTESRC.RIOI_IBUF_DISABLE0.IOI_IMUX9_1 always
+RIOI3_TBYTESRC.RIOI_IBUF_DISABLE1.IOI_IMUX9_0 always
+RIOI3_TBYTESRC.RIOI_I0.RIOI_IBUF0 always
+RIOI3_TBYTESRC.RIOI_I1.RIOI_IBUF1 always
+RIOI3_TBYTESRC.RIOI_IDELAY0_DATAOUT.RIOI_IDELAY0_IDATAIN always
+RIOI3_TBYTESRC.RIOI_IDELAY0_IDATAIN.RIOI_I0 always
+RIOI3_TBYTESRC.RIOI_IDELAY1_DATAOUT.RIOI_IDELAY1_IDATAIN always
+RIOI3_TBYTESRC.RIOI_IDELAY1_IDATAIN.RIOI_I1 always
+RIOI3_TBYTESRC.RIOI_ILOGIC0_D.RIOI_I0 always
+RIOI3_TBYTESRC.RIOI_ILOGIC0_DDLY.RIOI_IDELAY0_DATAOUT always
+RIOI3_TBYTESRC.RIOI_ILOGIC0_OFB.RIOI_OLOGIC0_OFB always
+RIOI3_TBYTESRC.RIOI_ILOGIC0_TFB.RIOI_OLOGIC0_TFB_LOCAL always
+RIOI3_TBYTESRC.RIOI_ILOGIC1_D.RIOI_I1 always
+RIOI3_TBYTESRC.RIOI_ILOGIC1_DDLY.RIOI_IDELAY1_DATAOUT always
+RIOI3_TBYTESRC.RIOI_ILOGIC1_OFB.RIOI_OLOGIC1_OFB always
+RIOI3_TBYTESRC.RIOI_ILOGIC1_TFB.RIOI_OLOGIC1_TFB_LOCAL always
+RIOI3_TBYTESRC.RIOI_ISIN11.RIOI_ISOUT10 always
+RIOI3_TBYTESRC.RIOI_ISIN21.RIOI_ISOUT20 always
+RIOI3_TBYTESRC.RIOI_O0.RIOI_OLOGIC0_OQ always
+RIOI3_TBYTESRC.RIOI_O1.RIOI_OLOGIC1_OQ always
+RIOI3_TBYTESRC.RIOI_OLOGIC0_OQ.IOI_OLOGIC0_D1 always
+RIOI3_TBYTESRC.RIOI_OLOGIC0_TFB_LOCAL.RIOI_OLOGIC0_TFB always
+RIOI3_TBYTESRC.RIOI_OLOGIC0_TQ.IOI_OLOGIC0_T1 always
+RIOI3_TBYTESRC.RIOI_OLOGIC1_OQ.IOI_OLOGIC1_D1 always
+RIOI3_TBYTESRC.RIOI_OLOGIC1_TFB_LOCAL.RIOI_OLOGIC1_TFB always
+RIOI3_TBYTESRC.RIOI_OLOGIC1_TQ.IOI_OLOGIC1_T1 always
+RIOI3_TBYTESRC.RIOI_OSIN10.RIOI_OSOUT11 always
+RIOI3_TBYTESRC.RIOI_OSIN20.RIOI_OSOUT21 always
+RIOI3_TBYTESRC.RIOI_T0.RIOI_OLOGIC0_TQ always
+RIOI3_TBYTESRC.RIOI_T1.RIOI_OLOGIC1_TQ always
+RIOI3_TBYTESRC.RIOI3_IDELAY0_IFDLY0.IOI_FAN4_1 always
+RIOI3_TBYTESRC.RIOI3_IDELAY0_IFDLY1.IOI_FAN5_1 always
+RIOI3_TBYTESRC.RIOI3_IDELAY0_IFDLY2.IOI_BYP7_1 always
+RIOI3_TBYTESRC.RIOI3_IDELAY1_IFDLY0.IOI_FAN4_0 always
+RIOI3_TBYTESRC.RIOI3_IDELAY1_IFDLY1.IOI_FAN5_0 always
+RIOI3_TBYTESRC.RIOI3_IDELAY1_IFDLY2.IOI_BYP7_0 always