diff --git a/Info.md b/Info.md
index 1c4e92d..fcf0a37 100644
--- a/Info.md
+++ b/Info.md
@@ -37,20 +37,20 @@
 
 # Details
 
-Last updated on Wed 23 Jun 2021 04:57:09 PM UTC (2021-06-23T16:57:09+00:00).
+Last updated on Wed 04 Aug 2021 03:32:51 PM UTC (2021-08-04T15:32:51+00:00).
 
-Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [6e6bff0b](https://github.com/SymbiFlow/prjxray/commit/6e6bff0b160e6417da1bd9332f1ebf7ed52bc913).
+Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [f7f06896](https://github.com/SymbiFlow/prjxray/commit/f7f06896ad26bb7c94680dc323d4b871eded1f4e).
 
 Latest commit was;
 ```
-commit 6e6bff0b160e6417da1bd9332f1ebf7ed52bc913
-Merge: da7bf6a0 769645f0
+commit f7f06896ad26bb7c94680dc323d4b871eded1f4e
+Merge: 6e6bff0b ceb0eadf
 Author: Alessandro Comodi <44773360+acomodi@users.noreply.github.com>
-Date:   Wed Jun 16 09:42:17 2021 +0200
+Date:   Thu Jul 8 14:45:27 2021 +0200
 
-    Merge pull request #1692 from antmicro/fix-pll-clkfb
+    Merge pull request #1705 from antmicro/fix-iob-ppips
     
-    034-cmt: fix conflicting PIPs
+    071-ppips: add LIOB33 and RIOB33 ppips
 ```
 
 
@@ -59,7 +59,7 @@
 
 ### Settings
 
-Created using following [settings/artix7.sh (sha256: fc677f338196f4cecea5f963feb41c09d281505828d0cde9740f2a4bb305532a)](https://github.com/SymbiFlow/prjxray/blob/6e6bff0b160e6417da1bd9332f1ebf7ed52bc913/settings/artix7.sh)
+Created using following [settings/artix7.sh (sha256: fc677f338196f4cecea5f963feb41c09d281505828d0cde9740f2a4bb305532a)](https://github.com/SymbiFlow/prjxray/blob/f7f06896ad26bb7c94680dc323d4b871eded1f4e/settings/artix7.sh)
 ```shell
 #!/bin/bash
 # Copyright (C) 2017-2020  The Project X-Ray Authors.
@@ -256,6 +256,8 @@
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/ppips_int_r.origin_info.db`](./artix7/ppips_int_r.origin_info.db)
  * [`916e3cea00e0bf8291ae24083696833dc1ff09f06562eccba6f2c73afd267ccb  ./artix7/ppips_io_int_interface_l.db`](./artix7/ppips_io_int_interface_l.db)
  * [`01526db954ab19098931424b8203c98803894b5563b5272fad665f3a75f0bb3b  ./artix7/ppips_io_int_interface_r.db`](./artix7/ppips_io_int_interface_r.db)
+ * [`6d2cad87bbee45d55d9758141573ceb6ab8c73b9c24153fb077c442010ee1f07  ./artix7/ppips_liob33.db`](./artix7/ppips_liob33.db)
+ * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/ppips_liob33_sing.db`](./artix7/ppips_liob33_sing.db)
  * [`ac23765307613b28b2a294e5ebbea583280bcb84511237000c788c9834730323  ./artix7/ppips_lioi3.db`](./artix7/ppips_lioi3.db)
  * [`f87e449ccf9c605acad950269bfe104bc3a45daf79c5b7fe21042169feb7a428  ./artix7/ppips_lioi3_sing.db`](./artix7/ppips_lioi3_sing.db)
  * [`1046256199fd3c54a5f3ee7e5ec7fd72863882e01cc8da326e487c763159e2f8  ./artix7/ppips_lioi3_tbytesrc.db`](./artix7/ppips_lioi3_tbytesrc.db)
@@ -264,6 +266,8 @@
  * [`8331488bf2a6d7e5dbbcb934fcfb63f83568811acd1e8568846c93dbbec3e47b  ./artix7/ppips_pcie_int_interface_l.db`](./artix7/ppips_pcie_int_interface_l.db)
  * [`d567a4f88177faf2045ac769e4435608c6ad1d486fc39488f753c9c4af75fdad  ./artix7/ppips_pcie_int_interface_r.db`](./artix7/ppips_pcie_int_interface_r.db)
  * [`5684a64e33378f61f7b92cee7011c2fc4f85be16762919a86103dc8652c73d63  ./artix7/ppips_pcie_top.db`](./artix7/ppips_pcie_top.db)
+ * [`2c7291f39e9277346b128297d90b46ee618d907686158b0f23a88bab08c7ac85  ./artix7/ppips_riob33.db`](./artix7/ppips_riob33.db)
+ * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/ppips_riob33_sing.db`](./artix7/ppips_riob33_sing.db)
  * [`5c818ae170303c8f215cb08e33f6682eb18e4c1b142da8c86e209d80199f6512  ./artix7/ppips_rioi3.db`](./artix7/ppips_rioi3.db)
  * [`bb65252c9f425d9b6eee636057f458b5b7548ee47228127f29afe0e7e5878682  ./artix7/ppips_rioi3_sing.db`](./artix7/ppips_rioi3_sing.db)
  * [`fe8fe52b167f239f3d28ffc0c1f4dd35de5ad2572526ad79500ac2cf89a5dfb2  ./artix7/ppips_rioi3_tbytesrc.db`](./artix7/ppips_rioi3_tbytesrc.db)
@@ -355,9 +359,9 @@
  * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9  ./artix7/segbits_hclk_r.db`](./artix7/segbits_hclk_r.db)
  * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0  ./artix7/segbits_hclk_r.origin_info.db`](./artix7/segbits_hclk_r.origin_info.db)
  * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520  ./artix7/segbits_int_l.db`](./artix7/segbits_int_l.db)
- * [`20c5e98e8cdcc702225d020f94cc067c03f80e8fcc974769354e6932ca407c98  ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db)
+ * [`6df56b759e71d6b5ec87f340a7885e5a35cc1a26293db2e85dd3a37f24e735ae  ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db)
  * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556  ./artix7/segbits_int_r.db`](./artix7/segbits_int_r.db)
- * [`ec2b8db5e39fb545b0364e32d5101ca6cdd47b6c8533e37eb53ec7f26c50270f  ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db)
+ * [`9ea55e76360f32dc3f46b04d8c17123dcf4918af1627c83e9e88ba669e9db1ef  ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db)
  * [`432e956da48016ba647631ff91975eb501f98e3961330bdaa35c686d780300d9  ./artix7/segbits_liob33.db`](./artix7/segbits_liob33.db)
  * [`606867ace72307cf773d819f40696862301419fda3d6d748746d2bfc58579731  ./artix7/segbits_liob33.origin_info.db`](./artix7/segbits_liob33.origin_info.db)
  * [`d369c1e614ef6ab1a464c0ab01d07456f73e88ca5a0c3c0dc524bb3b4f4364ff  ./artix7/segbits_lioi3.db`](./artix7/segbits_lioi3.db)
@@ -882,7 +886,7 @@
 
 ### Settings
 
-Created using following [settings/kintex7.sh (sha256: 26dfa36e49b4528298fc43411d654aa647076ce8160f4d8cfe71727594eb3848)](https://github.com/SymbiFlow/prjxray/blob/6e6bff0b160e6417da1bd9332f1ebf7ed52bc913/settings/kintex7.sh)
+Created using following [settings/kintex7.sh (sha256: 26dfa36e49b4528298fc43411d654aa647076ce8160f4d8cfe71727594eb3848)](https://github.com/SymbiFlow/prjxray/blob/f7f06896ad26bb7c94680dc323d4b871eded1f4e/settings/kintex7.sh)
 ```shell
 # Copyright (C) 2017-2020  The Project X-Ray Authors.
 #
@@ -1015,6 +1019,8 @@
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./kintex7/ppips_int_r.origin_info.db`](./kintex7/ppips_int_r.origin_info.db)
  * [`916e3cea00e0bf8291ae24083696833dc1ff09f06562eccba6f2c73afd267ccb  ./kintex7/ppips_io_int_interface_l.db`](./kintex7/ppips_io_int_interface_l.db)
  * [`01526db954ab19098931424b8203c98803894b5563b5272fad665f3a75f0bb3b  ./kintex7/ppips_io_int_interface_r.db`](./kintex7/ppips_io_int_interface_r.db)
+ * [`6d2cad87bbee45d55d9758141573ceb6ab8c73b9c24153fb077c442010ee1f07  ./kintex7/ppips_liob33.db`](./kintex7/ppips_liob33.db)
+ * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./kintex7/ppips_liob33_sing.db`](./kintex7/ppips_liob33_sing.db)
  * [`ac23765307613b28b2a294e5ebbea583280bcb84511237000c788c9834730323  ./kintex7/ppips_lioi3.db`](./kintex7/ppips_lioi3.db)
  * [`f87e449ccf9c605acad950269bfe104bc3a45daf79c5b7fe21042169feb7a428  ./kintex7/ppips_lioi3_sing.db`](./kintex7/ppips_lioi3_sing.db)
  * [`1046256199fd3c54a5f3ee7e5ec7fd72863882e01cc8da326e487c763159e2f8  ./kintex7/ppips_lioi3_tbytesrc.db`](./kintex7/ppips_lioi3_tbytesrc.db)
@@ -1074,9 +1080,9 @@
  * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9  ./kintex7/segbits_hclk_r.db`](./kintex7/segbits_hclk_r.db)
  * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0  ./kintex7/segbits_hclk_r.origin_info.db`](./kintex7/segbits_hclk_r.origin_info.db)
  * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520  ./kintex7/segbits_int_l.db`](./kintex7/segbits_int_l.db)
- * [`032cd8747af65ede08cf07e3f0d53c218e5cf1623003f2411dd9fa57e56c2649  ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db)
+ * [`0fe437e3cd8f81f61756e0e5316907774ff5363328ef993ce141571e8b5bcb3b  ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db)
  * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556  ./kintex7/segbits_int_r.db`](./kintex7/segbits_int_r.db)
- * [`d0ba2a1820b865c6bc448646495a582b055a0f7c2d75eb5d6330f4003208b259  ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db)
+ * [`d5a9d6df925fe74e7fe100205107ee7a829d7981ca708c38303fc9f9c36354be  ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db)
  * [`432e956da48016ba647631ff91975eb501f98e3961330bdaa35c686d780300d9  ./kintex7/segbits_liob33.db`](./kintex7/segbits_liob33.db)
  * [`606867ace72307cf773d819f40696862301419fda3d6d748746d2bfc58579731  ./kintex7/segbits_liob33.origin_info.db`](./kintex7/segbits_liob33.origin_info.db)
  * [`d369c1e614ef6ab1a464c0ab01d07456f73e88ca5a0c3c0dc524bb3b4f4364ff  ./kintex7/segbits_lioi3.db`](./kintex7/segbits_lioi3.db)
@@ -1315,7 +1321,7 @@
 
 ### Settings
 
-Created using following [settings/zynq7.sh (sha256: d3953bf67abbbaa760df1dd60a71f2edf66da37e2bf63220a70fada25188d3c9)](https://github.com/SymbiFlow/prjxray/blob/6e6bff0b160e6417da1bd9332f1ebf7ed52bc913/settings/zynq7.sh)
+Created using following [settings/zynq7.sh (sha256: d3953bf67abbbaa760df1dd60a71f2edf66da37e2bf63220a70fada25188d3c9)](https://github.com/SymbiFlow/prjxray/blob/f7f06896ad26bb7c94680dc323d4b871eded1f4e/settings/zynq7.sh)
 ```shell
 # Copyright (C) 2017-2020  The Project X-Ray Authors.
 #
@@ -1451,6 +1457,8 @@
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./zynq7/ppips_int_r.origin_info.db`](./zynq7/ppips_int_r.origin_info.db)
  * [`916e3cea00e0bf8291ae24083696833dc1ff09f06562eccba6f2c73afd267ccb  ./zynq7/ppips_io_int_interface_l.db`](./zynq7/ppips_io_int_interface_l.db)
  * [`01526db954ab19098931424b8203c98803894b5563b5272fad665f3a75f0bb3b  ./zynq7/ppips_io_int_interface_r.db`](./zynq7/ppips_io_int_interface_r.db)
+ * [`bdf786ee147f8491a0eac44d67bf24a85621db451876f5ca81fd02b9769981a2  ./zynq7/ppips_liob33.db`](./zynq7/ppips_liob33.db)
+ * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./zynq7/ppips_liob33_sing.db`](./zynq7/ppips_liob33_sing.db)
  * [`ac23765307613b28b2a294e5ebbea583280bcb84511237000c788c9834730323  ./zynq7/ppips_lioi3.db`](./zynq7/ppips_lioi3.db)
  * [`f87e449ccf9c605acad950269bfe104bc3a45daf79c5b7fe21042169feb7a428  ./zynq7/ppips_lioi3_sing.db`](./zynq7/ppips_lioi3_sing.db)
  * [`1046256199fd3c54a5f3ee7e5ec7fd72863882e01cc8da326e487c763159e2f8  ./zynq7/ppips_lioi3_tbytesrc.db`](./zynq7/ppips_lioi3_tbytesrc.db)
@@ -1460,6 +1468,8 @@
  * [`6dfc78075a25c31e34d54e19fc6bdcb693fca1d55f6e6544c7bd6077c74ee9ed  ./zynq7/ppips_pss2.db`](./zynq7/ppips_pss2.db)
  * [`a37b23b956aaa5a1049bfcd72f38f3cda2e82fbd952da8c33a74e5aa8b715530  ./zynq7/ppips_pss3.db`](./zynq7/ppips_pss3.db)
  * [`f21bf25fc70945747e89a5e712f99f50ab9ff2cafc3e9fa921ae56289aa9cc21  ./zynq7/ppips_pss4.db`](./zynq7/ppips_pss4.db)
+ * [`2c7291f39e9277346b128297d90b46ee618d907686158b0f23a88bab08c7ac85  ./zynq7/ppips_riob33.db`](./zynq7/ppips_riob33.db)
+ * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./zynq7/ppips_riob33_sing.db`](./zynq7/ppips_riob33_sing.db)
  * [`5c818ae170303c8f215cb08e33f6682eb18e4c1b142da8c86e209d80199f6512  ./zynq7/ppips_rioi3.db`](./zynq7/ppips_rioi3.db)
  * [`bb65252c9f425d9b6eee636057f458b5b7548ee47228127f29afe0e7e5878682  ./zynq7/ppips_rioi3_sing.db`](./zynq7/ppips_rioi3_sing.db)
  * [`fe8fe52b167f239f3d28ffc0c1f4dd35de5ad2572526ad79500ac2cf89a5dfb2  ./zynq7/ppips_rioi3_tbytesrc.db`](./zynq7/ppips_rioi3_tbytesrc.db)
@@ -1516,9 +1526,9 @@
  * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9  ./zynq7/segbits_hclk_r.db`](./zynq7/segbits_hclk_r.db)
  * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0  ./zynq7/segbits_hclk_r.origin_info.db`](./zynq7/segbits_hclk_r.origin_info.db)
  * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520  ./zynq7/segbits_int_l.db`](./zynq7/segbits_int_l.db)
- * [`55d9d49fac005b3df70e0bbf6fe869be9c7887918def9d0d1bd109158e4cc0e4  ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db)
+ * [`552c6e93557f2b5c56d36e9f569ba2ff56da8b4193662c57ca240b7ed8f9f367  ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db)
  * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556  ./zynq7/segbits_int_r.db`](./zynq7/segbits_int_r.db)
- * [`8d45bc41d7f4217c9eee35d6f44058d15fd6bda822c0b76ba24f34c679dc7863  ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db)
+ * [`d2925d923bccccf7b494e57e765246d4c9d508c056c435b074455b5ea890b8c3  ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db)
  * [`432e956da48016ba647631ff91975eb501f98e3961330bdaa35c686d780300d9  ./zynq7/segbits_liob33.db`](./zynq7/segbits_liob33.db)
  * [`606867ace72307cf773d819f40696862301419fda3d6d748746d2bfc58579731  ./zynq7/segbits_liob33.origin_info.db`](./zynq7/segbits_liob33.origin_info.db)
  * [`d369c1e614ef6ab1a464c0ab01d07456f73e88ca5a0c3c0dc524bb3b4f4364ff  ./zynq7/segbits_lioi3.db`](./zynq7/segbits_lioi3.db)
diff --git a/artix7/ppips_liob33.db b/artix7/ppips_liob33.db
new file mode 100644
index 0000000..7fbb1ad
--- /dev/null
+++ b/artix7/ppips_liob33.db
@@ -0,0 +1,10 @@
+LIOB33.IOB_DIFFI_IN0.IOB_PADOUT1 always
+LIOB33.IOB_DIFFI_IN1.IOB_PADOUT0 always
+LIOB33.IOB_DIFFO_IN1.IOB_DIFFO_OUT0 always
+LIOB33.IOB_O_IN1.IOB_O_OUT0 always
+LIOB33.IOB_O_OUT0.IOB_O0 hint
+LIOB33.IOB_T_IN1.IOB_T_OUT0 always
+LIOB33.IOB_T_OUT0.IOB_T0 hint
+LIOB33.IOB_PADOUT1.IOB_DIFFO_IN1 hint
+LIOB33.LIOB_MONITOR_N.IOB_PADOUT1 always
+LIOB33.LIOB_MONITOR_P.IOB_PADOUT0 always
diff --git a/artix7/ppips_liob33_sing.db b/artix7/ppips_liob33_sing.db
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/artix7/ppips_liob33_sing.db
diff --git a/artix7/ppips_riob33.db b/artix7/ppips_riob33.db
new file mode 100644
index 0000000..a2f6a3e
--- /dev/null
+++ b/artix7/ppips_riob33.db
@@ -0,0 +1,9 @@
+RIOB33.IOB_DIFFI_IN0.IOB_PADOUT1 always
+RIOB33.IOB_DIFFI_IN1.IOB_PADOUT0 always
+RIOB33.IOB_DIFFO_IN1.IOB_DIFFO_OUT0 always
+RIOB33.IOB_O_IN1.IOB_O_OUT0 always
+RIOB33.IOB_O_OUT0.IOB_O0 hint
+RIOB33.IOB_T_IN1.IOB_T_OUT0 always
+RIOB33.IOB_T_OUT0.IOB_T0 hint
+RIOB33.RIOB_MONITOR_N.IOB_PADOUT1 always
+RIOB33.RIOB_MONITOR_P.IOB_PADOUT0 always
diff --git a/artix7/ppips_riob33_sing.db b/artix7/ppips_riob33_sing.db
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/artix7/ppips_riob33_sing.db
diff --git a/artix7/segbits_int_l.origin_info.db b/artix7/segbits_int_l.origin_info.db
index 6418a8f..083c316 100644
--- a/artix7/segbits_int_l.origin_info.db
+++ b/artix7/segbits_int_l.origin_info.db
@@ -170,7 +170,7 @@
 INT_L.BYP_ALT7.BYP_BOUNCE6 origin:050-pip-seed !22_63 !23_63 !25_63 21_63 24_63
 INT_L.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63
 INT_L.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63
-INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:056-pip-rem !22_63 21_63 23_63 24_63 25_63
+INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63
 INT_L.BYP_ALT7.LOGIC_OUTS_L3 origin:051-pip-imuxlout-bypalts !22_63 20_63 23_63 24_63 25_63
 INT_L.BYP_ALT7.LOGIC_OUTS_L15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63
 INT_L.BYP_ALT7.LOGIC_OUTS_L21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63
@@ -396,7 +396,7 @@
 INT_L.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
 INT_L.FAN_ALT4.LOGIC_OUTS_L4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
 INT_L.FAN_ALT4.LOGIC_OUTS_L8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
-INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:056-pip-rem !22_08 !23_08 !25_08 21_08 24_08
+INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
 INT_L.FAN_ALT4.SR1BEG_S0 origin:050-pip-seed !23_08 19_09 22_08 24_08 25_08
 INT_L.FAN_ALT4.EE2END0 origin:050-pip-seed !22_08 !23_08 !24_08 16_08 25_08
 INT_L.FAN_ALT4.EL1END0 origin:050-pip-seed !22_08 16_08 23_08 24_08 25_08
@@ -1937,7 +1937,7 @@
 INT_L.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
 INT_L.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
 INT_L.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
-INT_L.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
+INT_L.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
 INT_L.EL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_20 14_21
 INT_L.EL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_21 14_21
 INT_L.EL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_21 13_21
@@ -2213,7 +2213,7 @@
 INT_L.NE6BEG0.NW6END0 origin:050-pip-seed 04_05 06_04
 INT_L.NE6BEG0.SE2END0 origin:050-pip-seed 02_05 05_07
 INT_L.NE6BEG0.SE6END0 origin:050-pip-seed 05_07 06_04
-INT_L.NE6BEG0.WW4END0 origin:050-pip-seed 04_05 05_04
+INT_L.NE6BEG0.WW4END0 origin:056-pip-rem 04_05 05_04
 INT_L.NE6BEG1.LOGIC_OUTS_L1 origin:050-pip-seed 02_21 04_22
 INT_L.NE6BEG1.LOGIC_OUTS_L5 origin:050-pip-seed 02_21 07_21
 INT_L.NE6BEG1.LOGIC_OUTS_L9 origin:050-pip-seed 03_20 07_21
@@ -2273,7 +2273,7 @@
 INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
 INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
 INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
-INT_L.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
+INT_L.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
 INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17
 INT_L.NL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_17 14_17
 INT_L.NL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_17 13_17
@@ -2662,7 +2662,7 @@
 INT_L.NW6BEG0.LOGIC_OUTS_L22 origin:050-pip-seed 06_02 07_03
 INT_L.NW6BEG0.LV_L0 origin:056-pip-rem 04_03 06_02
 INT_L.NW6BEG0.SS2END_N0_3 origin:050-pip-seed 02_03 04_00
-INT_L.NW6BEG0.SS6END_N0_3 origin:050-pip-seed 04_00 07_03
+INT_L.NW6BEG0.SS6END_N0_3 origin:056-pip-rem 04_00 07_03
 INT_L.NW6BEG0.SW2END_N0_3 origin:050-pip-seed 03_02 04_00
 INT_L.NW6BEG0.SW6END_N0_3 origin:050-pip-seed 04_00 04_03
 INT_L.NW6BEG0.WW2END_N0_3 origin:050-pip-seed 02_02 02_03
@@ -2729,7 +2729,7 @@
 INT_L.NW6BEG3.NW2END3 origin:050-pip-seed 02_50 03_50
 INT_L.NW6BEG3.NW6END3 origin:050-pip-seed 02_50 07_51
 INT_L.NW6BEG3.SS2END2 origin:050-pip-seed 02_51 04_48
-INT_L.NW6BEG3.SS6END2 origin:050-pip-seed 04_48 07_51
+INT_L.NW6BEG3.SS6END2 origin:056-pip-rem 04_48 07_51
 INT_L.NW6BEG3.SW2END2 origin:050-pip-seed 03_50 04_48
 INT_L.NW6BEG3.SW6END2 origin:050-pip-seed 04_48 04_51
 INT_L.NW6BEG3.WW2END2 origin:050-pip-seed 02_50 02_51
@@ -3282,7 +3282,7 @@
 INT_L.SW6BEG0.LOGIC_OUTS_L22 origin:050-pip-seed 06_12 07_13
 INT_L.SW6BEG0.LV_L0 origin:056-pip-rem 04_14 05_12
 INT_L.SW6BEG0.EE2END0 origin:050-pip-seed 03_12 04_13
-INT_L.SW6BEG0.EE4END0 origin:056-pip-rem 04_13 05_12
+INT_L.SW6BEG0.EE4END0 origin:050-pip-seed 04_13 05_12
 INT_L.SW6BEG0.LH12 origin:056-pip-rem 05_12 07_13
 INT_L.SW6BEG0.NW2END1 origin:050-pip-seed 02_13 05_15
 INT_L.SW6BEG0.NW6END1 origin:050-pip-seed 05_15 06_12
@@ -3323,7 +3323,7 @@
 INT_L.SW6BEG2.LVB_L0 origin:056-pip-rem 04_46 05_44
 INT_L.SW6BEG2.LVB_L12 origin:056-pip-rem 05_44 07_45
 INT_L.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
-INT_L.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
+INT_L.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
 INT_L.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47
 INT_L.SW6BEG2.NW6END3 origin:050-pip-seed 05_47 06_44
 INT_L.SW6BEG2.SE2END2 origin:050-pip-seed 02_45 04_45
@@ -3603,7 +3603,7 @@
 INT_L.WW4BEG2.LVB_L0 origin:056-pip-rem 04_34 05_32
 INT_L.WW4BEG2.LVB_L12 origin:056-pip-rem 05_32 07_33
 INT_L.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
-INT_L.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
+INT_L.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
 INT_L.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
 INT_L.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
 INT_L.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
diff --git a/artix7/segbits_int_r.origin_info.db b/artix7/segbits_int_r.origin_info.db
index 6c0b44c..c4e1cdf 100644
--- a/artix7/segbits_int_r.origin_info.db
+++ b/artix7/segbits_int_r.origin_info.db
@@ -328,8 +328,8 @@
 INT_R.FAN_ALT3.WW2END3 origin:050-pip-seed !22_56 !23_56 !24_56 19_57 25_56
 INT_R.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08
 INT_R.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08
-INT_R.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
-INT_R.FAN_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_08 20_08 23_08 24_08 25_08
+INT_R.FAN_ALT4.FAN_BOUNCE2 origin:056-pip-rem !23_08 20_08 22_08 24_08 25_08
+INT_R.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
 INT_R.FAN_ALT4.LOGIC_OUTS4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
 INT_R.FAN_ALT4.LOGIC_OUTS8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
 INT_R.FAN_ALT4.LOGIC_OUTS18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
@@ -665,7 +665,7 @@
 INT_R.EE4BEG0.SS2END0 origin:050-pip-seed 03_08 05_11
 INT_R.EE4BEG0.SS6END0 origin:050-pip-seed 05_11 06_08
 INT_R.EE4BEG0.SW2END0 origin:050-pip-seed 02_09 05_11
-INT_R.EE4BEG0.SW6END0 origin:056-pip-rem 05_08 05_11
+INT_R.EE4BEG0.SW6END0 origin:050-pip-seed 05_08 05_11
 INT_R.EE4BEG1.LOGIC_OUTS1 origin:050-pip-seed 02_25 07_25
 INT_R.EE4BEG1.LOGIC_OUTS5 origin:050-pip-seed 02_25 04_26
 INT_R.EE4BEG1.LOGIC_OUTS9 origin:050-pip-seed 03_24 04_26
@@ -705,7 +705,7 @@
 INT_R.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
 INT_R.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
 INT_R.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
-INT_R.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
+INT_R.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43
 INT_R.EE4BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_57 07_57
 INT_R.EE4BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_57 04_58
 INT_R.EE4BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_56 04_58
@@ -725,7 +725,7 @@
 INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
 INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
 INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
-INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
+INT_R.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
 INT_R.EL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_20 14_21
 INT_R.EL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_21 14_21
 INT_R.EL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_21 13_21
@@ -2253,7 +2253,7 @@
 INT_R.NE6BEG2.SE2END2 origin:050-pip-seed 02_37 05_39
 INT_R.NE6BEG2.SE6END2 origin:050-pip-seed 05_39 06_36
 INT_R.NE6BEG2.WW2END1 origin:050-pip-seed 03_36 04_37
-INT_R.NE6BEG2.WW4END2 origin:056-pip-rem 04_37 05_36
+INT_R.NE6BEG2.WW4END2 origin:050-pip-seed 04_37 05_36
 INT_R.NE6BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_53 04_54
 INT_R.NE6BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_53 07_53
 INT_R.NE6BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_52 07_53
@@ -2273,7 +2273,7 @@
 INT_R.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
 INT_R.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
 INT_R.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
-INT_R.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
+INT_R.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
 INT_R.NL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_16 14_17
 INT_R.NL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_17 14_17
 INT_R.NL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_17 13_17
@@ -2491,7 +2491,7 @@
 INT_R.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52
 INT_R.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55
 INT_R.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54
-INT_R.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55
+INT_R.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55
 INT_R.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52
 INT_R.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55
 INT_R.NR1BEG0.LOGIC_OUTS0 origin:050-pip-seed 11_07 14_07
@@ -3321,7 +3321,7 @@
 INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44
 INT_R.SW6BEG2.LOGIC_OUTS20 origin:050-pip-seed 06_44 07_45
 INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
-INT_R.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
+INT_R.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
 INT_R.SW6BEG2.LVB0 origin:056-pip-rem 04_46 05_44
 INT_R.SW6BEG2.LVB12 origin:056-pip-rem 05_44 07_45
 INT_R.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47
@@ -3568,7 +3568,7 @@
 INT_R.WW4BEG0.LH12 origin:056-pip-rem 05_00 07_01
 INT_R.WW4BEG0.LV0 origin:056-pip-rem 04_02 05_00
 INT_R.WW4BEG0.NE2END0 origin:050-pip-seed 02_01 05_03
-INT_R.WW4BEG0.NE6END0 origin:056-pip-rem 05_00 05_03
+INT_R.WW4BEG0.NE6END0 origin:050-pip-seed 05_00 05_03
 INT_R.WW4BEG0.NN2END0 origin:050-pip-seed 03_00 05_03
 INT_R.WW4BEG0.NN6END0 origin:050-pip-seed 05_03 06_00
 INT_R.WW4BEG0.NW2END0 origin:050-pip-seed 02_01 03_01
diff --git a/kintex7/ppips_liob33.db b/kintex7/ppips_liob33.db
new file mode 100644
index 0000000..7fbb1ad
--- /dev/null
+++ b/kintex7/ppips_liob33.db
@@ -0,0 +1,10 @@
+LIOB33.IOB_DIFFI_IN0.IOB_PADOUT1 always
+LIOB33.IOB_DIFFI_IN1.IOB_PADOUT0 always
+LIOB33.IOB_DIFFO_IN1.IOB_DIFFO_OUT0 always
+LIOB33.IOB_O_IN1.IOB_O_OUT0 always
+LIOB33.IOB_O_OUT0.IOB_O0 hint
+LIOB33.IOB_T_IN1.IOB_T_OUT0 always
+LIOB33.IOB_T_OUT0.IOB_T0 hint
+LIOB33.IOB_PADOUT1.IOB_DIFFO_IN1 hint
+LIOB33.LIOB_MONITOR_N.IOB_PADOUT1 always
+LIOB33.LIOB_MONITOR_P.IOB_PADOUT0 always
diff --git a/kintex7/ppips_liob33_sing.db b/kintex7/ppips_liob33_sing.db
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/kintex7/ppips_liob33_sing.db
diff --git a/kintex7/segbits_int_l.origin_info.db b/kintex7/segbits_int_l.origin_info.db
index 6d5dc8d..6641242 100644
--- a/kintex7/segbits_int_l.origin_info.db
+++ b/kintex7/segbits_int_l.origin_info.db
@@ -1937,7 +1937,7 @@
 INT_L.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
 INT_L.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
 INT_L.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
-INT_L.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
+INT_L.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
 INT_L.EL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_20 14_21
 INT_L.EL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_21 14_21
 INT_L.EL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_21 13_21
@@ -2491,7 +2491,7 @@
 INT_L.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52
 INT_L.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55
 INT_L.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54
-INT_L.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55
+INT_L.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55
 INT_L.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52
 INT_L.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55
 INT_L.NR1BEG0.LOGIC_OUTS_L0 origin:050-pip-seed 11_07 14_07
@@ -3603,7 +3603,7 @@
 INT_L.WW4BEG2.LVB_L0 origin:056-pip-rem 04_34 05_32
 INT_L.WW4BEG2.LVB_L12 origin:056-pip-rem 05_32 07_33
 INT_L.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
-INT_L.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
+INT_L.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
 INT_L.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
 INT_L.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
 INT_L.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
diff --git a/kintex7/segbits_int_r.origin_info.db b/kintex7/segbits_int_r.origin_info.db
index 24484f6..6d19802 100644
--- a/kintex7/segbits_int_r.origin_info.db
+++ b/kintex7/segbits_int_r.origin_info.db
@@ -170,7 +170,7 @@
 INT_R.BYP_ALT7.BYP_BOUNCE6 origin:050-pip-seed !22_63 !23_63 !25_63 21_63 24_63
 INT_R.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63
 INT_R.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63
-INT_R.BYP_ALT7.FAN_BOUNCE_S3_6 origin:056-pip-rem !22_63 21_63 23_63 24_63 25_63
+INT_R.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63
 INT_R.BYP_ALT7.LOGIC_OUTS3 origin:051-pip-imuxlout-bypalts !22_63 20_63 23_63 24_63 25_63
 INT_R.BYP_ALT7.LOGIC_OUTS15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63
 INT_R.BYP_ALT7.LOGIC_OUTS21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63
@@ -329,7 +329,7 @@
 INT_R.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08
 INT_R.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08
 INT_R.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
-INT_R.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
+INT_R.FAN_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_08 20_08 23_08 24_08 25_08
 INT_R.FAN_ALT4.LOGIC_OUTS4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
 INT_R.FAN_ALT4.LOGIC_OUTS8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
 INT_R.FAN_ALT4.LOGIC_OUTS18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
@@ -685,7 +685,7 @@
 INT_R.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27
 INT_R.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24
 INT_R.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27
-INT_R.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27
+INT_R.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27
 INT_R.EE4BEG2.LOGIC_OUTS2 origin:050-pip-seed 02_41 04_42
 INT_R.EE4BEG2.LOGIC_OUTS6 origin:050-pip-seed 02_41 07_41
 INT_R.EE4BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_40 07_41
@@ -705,7 +705,7 @@
 INT_R.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
 INT_R.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
 INT_R.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
-INT_R.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43
+INT_R.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
 INT_R.EE4BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_57 07_57
 INT_R.EE4BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_57 04_58
 INT_R.EE4BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_56 04_58
@@ -725,7 +725,7 @@
 INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
 INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
 INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
-INT_R.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
+INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
 INT_R.EL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_20 14_21
 INT_R.EL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_21 14_21
 INT_R.EL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_21 13_21
diff --git a/zynq7/ppips_liob33.db b/zynq7/ppips_liob33.db
new file mode 100644
index 0000000..223b08b
--- /dev/null
+++ b/zynq7/ppips_liob33.db
@@ -0,0 +1,8 @@
+LIOB33.IOB_DIFFI_IN0.IOB_PADOUT1 always
+LIOB33.IOB_DIFFI_IN1.IOB_PADOUT0 always
+LIOB33.IOB_DIFFO_IN1.IOB_DIFFO_OUT0 always
+LIOB33.IOB_O_IN1.IOB_O_OUT0 always
+LIOB33.IOB_O_OUT0.IOB_O0 hint
+LIOB33.IOB_T_IN1.IOB_T_OUT0 always
+LIOB33.IOB_T_OUT0.IOB_T0 hint
+LIOB33.IOB_PADOUT1.IOB_DIFFO_IN1 hint
diff --git a/zynq7/ppips_liob33_sing.db b/zynq7/ppips_liob33_sing.db
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/zynq7/ppips_liob33_sing.db
diff --git a/zynq7/ppips_riob33.db b/zynq7/ppips_riob33.db
new file mode 100644
index 0000000..a2f6a3e
--- /dev/null
+++ b/zynq7/ppips_riob33.db
@@ -0,0 +1,9 @@
+RIOB33.IOB_DIFFI_IN0.IOB_PADOUT1 always
+RIOB33.IOB_DIFFI_IN1.IOB_PADOUT0 always
+RIOB33.IOB_DIFFO_IN1.IOB_DIFFO_OUT0 always
+RIOB33.IOB_O_IN1.IOB_O_OUT0 always
+RIOB33.IOB_O_OUT0.IOB_O0 hint
+RIOB33.IOB_T_IN1.IOB_T_OUT0 always
+RIOB33.IOB_T_OUT0.IOB_T0 hint
+RIOB33.RIOB_MONITOR_N.IOB_PADOUT1 always
+RIOB33.RIOB_MONITOR_P.IOB_PADOUT0 always
diff --git a/zynq7/ppips_riob33_sing.db b/zynq7/ppips_riob33_sing.db
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/zynq7/ppips_riob33_sing.db
diff --git a/zynq7/segbits_int_l.origin_info.db b/zynq7/segbits_int_l.origin_info.db
index 56a9b1e..e21820d 100644
--- a/zynq7/segbits_int_l.origin_info.db
+++ b/zynq7/segbits_int_l.origin_info.db
@@ -301,7 +301,7 @@
 INT_L.FAN_ALT0.FAN_BOUNCE6 origin:050-pip-seed !23_00 20_00 22_00 24_00 25_00
 INT_L.FAN_ALT0.LOGIC_OUTS_L0 origin:050-pip-seed !23_00 21_00 22_00 24_00 25_00
 INT_L.FAN_ALT0.LOGIC_OUTS_L12 origin:050-pip-seed !22_00 21_00 23_00 24_00 25_00
-INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:056-pip-rem !22_00 !23_00 !25_00 21_00 24_00
+INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:050-pip-seed !22_00 !23_00 !25_00 21_00 24_00
 INT_L.FAN_ALT0.SR1END_N3_3 origin:050-pip-seed !23_00 19_01 22_00 24_00 25_00
 INT_L.FAN_ALT0.SS2END_N0_3 origin:050-pip-seed !22_00 !23_00 !24_00 17_00 25_00
 INT_L.FAN_ALT0.SW2END_N0_3 origin:050-pip-seed !22_00 !23_00 !25_00 17_00 24_00
@@ -1877,7 +1877,7 @@
 INT_L.EE4BEG0.SS2END0 origin:050-pip-seed 03_08 05_11
 INT_L.EE4BEG0.SS6END0 origin:050-pip-seed 05_11 06_08
 INT_L.EE4BEG0.SW2END0 origin:050-pip-seed 02_09 05_11
-INT_L.EE4BEG0.SW6END0 origin:056-pip-rem 05_08 05_11
+INT_L.EE4BEG0.SW6END0 origin:050-pip-seed 05_08 05_11
 INT_L.EE4BEG1.LOGIC_OUTS_L1 origin:050-pip-seed 02_25 07_25
 INT_L.EE4BEG1.LOGIC_OUTS_L5 origin:050-pip-seed 02_25 04_26
 INT_L.EE4BEG1.LOGIC_OUTS_L9 origin:050-pip-seed 03_24 04_26
@@ -1937,7 +1937,7 @@
 INT_L.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
 INT_L.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
 INT_L.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
-INT_L.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
+INT_L.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
 INT_L.EL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_20 14_21
 INT_L.EL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_21 14_21
 INT_L.EL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_21 13_21
@@ -2471,7 +2471,7 @@
 INT_L.NN6BEG2.NW2END2 origin:050-pip-seed 03_38 04_36
 INT_L.NN6BEG2.NW6END2 origin:050-pip-seed 04_36 07_39
 INT_L.NN6BEG2.SE2END2 origin:050-pip-seed 03_38 05_38
-INT_L.NN6BEG2.SE6END2 origin:050-pip-seed 05_38 07_39
+INT_L.NN6BEG2.SE6END2 origin:056-pip-rem 05_38 07_39
 INT_L.NN6BEG2.WW2END1 origin:050-pip-seed 02_39 04_36
 INT_L.NN6BEG2.WW4END2 origin:050-pip-seed 04_36 04_39
 INT_L.NN6BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 03_54 06_54
@@ -3345,7 +3345,7 @@
 INT_L.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60
 INT_L.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63
 INT_L.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61
-INT_L.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60
+INT_L.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60
 INT_L.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60
 INT_L.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61
 INT_L.SW6BEG3.SE6END3 origin:050-pip-seed 04_61 06_60
@@ -3568,7 +3568,7 @@
 INT_L.WW4BEG0.WW2END_N0_3 origin:050-pip-seed 03_00 03_01
 INT_L.WW4BEG0.LH12 origin:056-pip-rem 05_00 07_01
 INT_L.WW4BEG0.NE2END0 origin:050-pip-seed 02_01 05_03
-INT_L.WW4BEG0.NE6END0 origin:050-pip-seed 05_00 05_03
+INT_L.WW4BEG0.NE6END0 origin:056-pip-rem 05_00 05_03
 INT_L.WW4BEG0.NN2END0 origin:050-pip-seed 03_00 05_03
 INT_L.WW4BEG0.NN6END0 origin:050-pip-seed 05_03 06_00
 INT_L.WW4BEG0.NW2END0 origin:050-pip-seed 02_01 03_01
diff --git a/zynq7/segbits_int_r.origin_info.db b/zynq7/segbits_int_r.origin_info.db
index fec46ed..61eb4dc 100644
--- a/zynq7/segbits_int_r.origin_info.db
+++ b/zynq7/segbits_int_r.origin_info.db
@@ -685,7 +685,7 @@
 INT_R.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27
 INT_R.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24
 INT_R.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27
-INT_R.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27
+INT_R.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27
 INT_R.EE4BEG2.LOGIC_OUTS2 origin:050-pip-seed 02_41 04_42
 INT_R.EE4BEG2.LOGIC_OUTS6 origin:050-pip-seed 02_41 07_41
 INT_R.EE4BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_40 07_41
@@ -725,7 +725,7 @@
 INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
 INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
 INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
-INT_R.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
+INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
 INT_R.EL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_20 14_21
 INT_R.EL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_21 14_21
 INT_R.EL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_21 13_21
@@ -2253,7 +2253,7 @@
 INT_R.NE6BEG2.SE2END2 origin:050-pip-seed 02_37 05_39
 INT_R.NE6BEG2.SE6END2 origin:050-pip-seed 05_39 06_36
 INT_R.NE6BEG2.WW2END1 origin:050-pip-seed 03_36 04_37
-INT_R.NE6BEG2.WW4END2 origin:056-pip-rem 04_37 05_36
+INT_R.NE6BEG2.WW4END2 origin:050-pip-seed 04_37 05_36
 INT_R.NE6BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_53 04_54
 INT_R.NE6BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_53 07_53
 INT_R.NE6BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_52 07_53
@@ -2661,7 +2661,7 @@
 INT_R.NW6BEG0.LOGIC_OUTS18 origin:050-pip-seed 05_01 07_03
 INT_R.NW6BEG0.LOGIC_OUTS22 origin:050-pip-seed 06_02 07_03
 INT_R.NW6BEG0.SS2END_N0_3 origin:050-pip-seed 02_03 04_00
-INT_R.NW6BEG0.SS6END_N0_3 origin:050-pip-seed 04_00 07_03
+INT_R.NW6BEG0.SS6END_N0_3 origin:056-pip-rem 04_00 07_03
 INT_R.NW6BEG0.SW2END_N0_3 origin:050-pip-seed 03_02 04_00
 INT_R.NW6BEG0.SW6END_N0_3 origin:050-pip-seed 04_00 04_03
 INT_R.NW6BEG0.WW2END_N0_3 origin:050-pip-seed 02_02 02_03
@@ -2887,7 +2887,7 @@
 INT_R.SE6BEG3.NE2END3 origin:050-pip-seed 03_58 04_56
 INT_R.SE6BEG3.NE6END3 origin:050-pip-seed 04_56 04_59
 INT_R.SE6BEG3.NN2END3 origin:050-pip-seed 02_59 04_56
-INT_R.SE6BEG3.NN6END3 origin:050-pip-seed 04_56 07_59
+INT_R.SE6BEG3.NN6END3 origin:056-pip-rem 04_56 07_59
 INT_R.SE6BEG3.SE2END3 origin:050-pip-seed 02_58 03_58
 INT_R.SE6BEG3.SE6END3 origin:050-pip-seed 02_58 07_59
 INT_R.SE6BEG3.SS2END3 origin:050-pip-seed 02_59 05_58
@@ -3603,7 +3603,7 @@
 INT_R.WW4BEG2.LVB0 origin:056-pip-rem 04_34 05_32
 INT_R.WW4BEG2.LVB12 origin:056-pip-rem 05_32 07_33
 INT_R.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
-INT_R.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
+INT_R.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
 INT_R.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
 INT_R.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
 INT_R.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
@@ -3623,7 +3623,7 @@
 INT_R.WW4BEG3.LH0 origin:056-pip-rem 04_50 05_48
 INT_R.WW4BEG3.LV18 origin:056-pip-rem 05_48 07_49
 INT_R.WW4BEG3.NE2END3 origin:050-pip-seed 02_49 05_51
-INT_R.WW4BEG3.NE6END3 origin:056-pip-rem 05_48 05_51
+INT_R.WW4BEG3.NE6END3 origin:050-pip-seed 05_48 05_51
 INT_R.WW4BEG3.NN2END3 origin:050-pip-seed 03_48 05_51
 INT_R.WW4BEG3.NN6END3 origin:050-pip-seed 05_51 06_48
 INT_R.WW4BEG3.NW2END3 origin:050-pip-seed 02_49 03_49