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            "RAMB36_X0Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y4": "FIFO18E1",
            "RAMB18_X0Y5": "RAMB18E1",
            "RAMB36_X0Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y6": "FIFO18E1",
            "RAMB18_X0Y7": "RAMB18E1",
            "RAMB36_X0Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y8": "FIFO18E1",
            "RAMB18_X0Y9": "RAMB18E1",
            "RAMB36_X0Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y10": "FIFO18E1",
            "RAMB18_X0Y11": "RAMB18E1",
            "RAMB36_X0Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y12": "FIFO18E1",
            "RAMB18_X0Y13": "RAMB18E1",
            "RAMB36_X0Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y14": "FIFO18E1",
            "RAMB18_X0Y15": "RAMB18E1",
            "RAMB36_X0Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y16": "FIFO18E1",
            "RAMB18_X0Y17": "RAMB18E1",
            "RAMB36_X0Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20000",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 19,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y18": "FIFO18E1",
            "RAMB18_X0Y19": "RAMB18E1",
            "RAMB36_X0Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y20": "FIFO18E1",
            "RAMB18_X0Y21": "RAMB18E1",
            "RAMB36_X0Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y22": "FIFO18E1",
            "RAMB18_X0Y23": "RAMB18E1",
            "RAMB36_X0Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y24": "FIFO18E1",
            "RAMB18_X0Y25": "RAMB18E1",
            "RAMB36_X0Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y26": "FIFO18E1",
            "RAMB18_X0Y27": "RAMB18E1",
            "RAMB36_X0Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y28": "FIFO18E1",
            "RAMB18_X0Y29": "RAMB18E1",
            "RAMB36_X0Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y30": "FIFO18E1",
            "RAMB18_X0Y31": "RAMB18E1",
            "RAMB36_X0Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y32": "FIFO18E1",
            "RAMB18_X0Y33": "RAMB18E1",
            "RAMB36_X0Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y34": "FIFO18E1",
            "RAMB18_X0Y35": "RAMB18E1",
            "RAMB36_X0Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y36": "FIFO18E1",
            "RAMB18_X0Y37": "RAMB18E1",
            "RAMB36_X0Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00000",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400300",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 19,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y38": "FIFO18E1",
            "RAMB18_X0Y39": "RAMB18E1",
            "RAMB36_X0Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y100": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y40": "FIFO18E1",
            "RAMB18_X0Y41": "RAMB18E1",
            "RAMB36_X0Y20": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y105": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y42": "FIFO18E1",
            "RAMB18_X0Y43": "RAMB18E1",
            "RAMB36_X0Y21": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y110": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y44": "FIFO18E1",
            "RAMB18_X0Y45": "RAMB18E1",
            "RAMB36_X0Y22": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y115": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y46": "FIFO18E1",
            "RAMB18_X0Y47": "RAMB18E1",
            "RAMB36_X0Y23": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y120": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y48": "FIFO18E1",
            "RAMB18_X0Y49": "RAMB18E1",
            "RAMB36_X0Y24": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y125": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y50": "FIFO18E1",
            "RAMB18_X0Y51": "RAMB18E1",
            "RAMB36_X0Y25": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y130": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y52": "FIFO18E1",
            "RAMB18_X0Y53": "RAMB18E1",
            "RAMB36_X0Y26": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y135": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y54": "FIFO18E1",
            "RAMB18_X0Y55": "RAMB18E1",
            "RAMB36_X0Y27": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y140": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y56": "FIFO18E1",
            "RAMB18_X0Y57": "RAMB18E1",
            "RAMB36_X0Y28": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y145": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800000",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000300",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 19,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y58": "FIFO18E1",
            "RAMB18_X0Y59": "RAMB18E1",
            "RAMB36_X0Y29": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y150": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y60": "FIFO18E1",
            "RAMB18_X0Y61": "RAMB18E1",
            "RAMB36_X0Y30": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y155": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y62": "FIFO18E1",
            "RAMB18_X0Y63": "RAMB18E1",
            "RAMB36_X0Y31": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y160": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y64": "FIFO18E1",
            "RAMB18_X0Y65": "RAMB18E1",
            "RAMB36_X0Y32": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y165": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y66": "FIFO18E1",
            "RAMB18_X0Y67": "RAMB18E1",
            "RAMB36_X0Y33": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y170": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y68": "FIFO18E1",
            "RAMB18_X0Y69": "RAMB18E1",
            "RAMB36_X0Y34": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y175": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y70": "FIFO18E1",
            "RAMB18_X0Y71": "RAMB18E1",
            "RAMB36_X0Y35": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y180": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y72": "FIFO18E1",
            "RAMB18_X0Y73": "RAMB18E1",
            "RAMB36_X0Y36": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y185": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y74": "FIFO18E1",
            "RAMB18_X0Y75": "RAMB18E1",
            "RAMB36_X0Y37": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y190": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y76": "FIFO18E1",
            "RAMB18_X0Y77": "RAMB18E1",
            "RAMB36_X0Y38": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X6Y195": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820000",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020300",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 19,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "RAMB18_X0Y78": "FIFO18E1",
            "RAMB18_X0Y79": "RAMB18E1",
            "RAMB36_X0Y39": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 77,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y0": "FIFO18E1",
            "RAMB18_X2Y1": "RAMB18E1",
            "RAMB36_X2Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 77,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y2": "FIFO18E1",
            "RAMB18_X2Y3": "RAMB18E1",
            "RAMB36_X2Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 77,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y4": "FIFO18E1",
            "RAMB18_X2Y5": "RAMB18E1",
            "RAMB36_X2Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 77,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y6": "FIFO18E1",
            "RAMB18_X2Y7": "RAMB18E1",
            "RAMB36_X2Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 77,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y8": "FIFO18E1",
            "RAMB18_X2Y9": "RAMB18E1",
            "RAMB36_X2Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 77,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y10": "FIFO18E1",
            "RAMB18_X2Y11": "RAMB18E1",
            "RAMB36_X2Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 77,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y12": "FIFO18E1",
            "RAMB18_X2Y13": "RAMB18E1",
            "RAMB36_X2Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 77,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y14": "FIFO18E1",
            "RAMB18_X2Y15": "RAMB18E1",
            "RAMB36_X2Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 77,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y16": "FIFO18E1",
            "RAMB18_X2Y17": "RAMB18E1",
            "RAMB36_X2Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20100",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 77,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y18": "FIFO18E1",
            "RAMB18_X2Y19": "RAMB18E1",
            "RAMB36_X2Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y20": "FIFO18E1",
            "RAMB18_X2Y21": "RAMB18E1",
            "RAMB36_X2Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y22": "FIFO18E1",
            "RAMB18_X2Y23": "RAMB18E1",
            "RAMB36_X2Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y24": "FIFO18E1",
            "RAMB18_X2Y25": "RAMB18E1",
            "RAMB36_X2Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y26": "FIFO18E1",
            "RAMB18_X2Y27": "RAMB18E1",
            "RAMB36_X2Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y28": "FIFO18E1",
            "RAMB18_X2Y29": "RAMB18E1",
            "RAMB36_X2Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y30": "FIFO18E1",
            "RAMB18_X2Y31": "RAMB18E1",
            "RAMB36_X2Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y32": "FIFO18E1",
            "RAMB18_X2Y33": "RAMB18E1",
            "RAMB36_X2Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y34": "FIFO18E1",
            "RAMB18_X2Y35": "RAMB18E1",
            "RAMB36_X2Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y36": "FIFO18E1",
            "RAMB18_X2Y37": "RAMB18E1",
            "RAMB36_X2Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00100",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 77,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y38": "FIFO18E1",
            "RAMB18_X2Y39": "RAMB18E1",
            "RAMB36_X2Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y125": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y50": "FIFO18E1",
            "RAMB18_X2Y51": "RAMB18E1",
            "RAMB36_X2Y25": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y130": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y52": "FIFO18E1",
            "RAMB18_X2Y53": "RAMB18E1",
            "RAMB36_X2Y26": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y135": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y54": "FIFO18E1",
            "RAMB18_X2Y55": "RAMB18E1",
            "RAMB36_X2Y27": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y140": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y56": "FIFO18E1",
            "RAMB18_X2Y57": "RAMB18E1",
            "RAMB36_X2Y28": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y145": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000F00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 77,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y58": "FIFO18E1",
            "RAMB18_X2Y59": "RAMB18E1",
            "RAMB36_X2Y29": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y150": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y60": "FIFO18E1",
            "RAMB18_X2Y61": "RAMB18E1",
            "RAMB36_X2Y30": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y155": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y62": "FIFO18E1",
            "RAMB18_X2Y63": "RAMB18E1",
            "RAMB36_X2Y31": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y160": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y64": "FIFO18E1",
            "RAMB18_X2Y65": "RAMB18E1",
            "RAMB36_X2Y32": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y165": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y66": "FIFO18E1",
            "RAMB18_X2Y67": "RAMB18E1",
            "RAMB36_X2Y33": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y170": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y68": "FIFO18E1",
            "RAMB18_X2Y69": "RAMB18E1",
            "RAMB36_X2Y34": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y175": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y70": "FIFO18E1",
            "RAMB18_X2Y71": "RAMB18E1",
            "RAMB36_X2Y35": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y180": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y72": "FIFO18E1",
            "RAMB18_X2Y73": "RAMB18E1",
            "RAMB36_X2Y36": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y185": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y74": "FIFO18E1",
            "RAMB18_X2Y75": "RAMB18E1",
            "RAMB36_X2Y37": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y190": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y76": "FIFO18E1",
            "RAMB18_X2Y77": "RAMB18E1",
            "RAMB36_X2Y38": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X30Y195": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820100",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 77,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "RAMB18_X2Y78": "FIFO18E1",
            "RAMB18_X2Y79": "RAMB18E1",
            "RAMB36_X2Y39": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_R_X17Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y0": "FIFO18E1",
            "RAMB18_X1Y1": "RAMB18E1",
            "RAMB36_X1Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y2": "FIFO18E1",
            "RAMB18_X1Y3": "RAMB18E1",
            "RAMB36_X1Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y4": "FIFO18E1",
            "RAMB18_X1Y5": "RAMB18E1",
            "RAMB36_X1Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y6": "FIFO18E1",
            "RAMB18_X1Y7": "RAMB18E1",
            "RAMB36_X1Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y8": "FIFO18E1",
            "RAMB18_X1Y9": "RAMB18E1",
            "RAMB36_X1Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y10": "FIFO18E1",
            "RAMB18_X1Y11": "RAMB18E1",
            "RAMB36_X1Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y12": "FIFO18E1",
            "RAMB18_X1Y13": "RAMB18E1",
            "RAMB36_X1Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y14": "FIFO18E1",
            "RAMB18_X1Y15": "RAMB18E1",
            "RAMB36_X1Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y16": "FIFO18E1",
            "RAMB18_X1Y17": "RAMB18E1",
            "RAMB36_X1Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20080",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00420880",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 48,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y18": "FIFO18E1",
            "RAMB18_X1Y19": "RAMB18E1",
            "RAMB36_X1Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y20": "FIFO18E1",
            "RAMB18_X1Y21": "RAMB18E1",
            "RAMB36_X1Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y22": "FIFO18E1",
            "RAMB18_X1Y23": "RAMB18E1",
            "RAMB36_X1Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y24": "FIFO18E1",
            "RAMB18_X1Y25": "RAMB18E1",
            "RAMB36_X1Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y26": "FIFO18E1",
            "RAMB18_X1Y27": "RAMB18E1",
            "RAMB36_X1Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y28": "FIFO18E1",
            "RAMB18_X1Y29": "RAMB18E1",
            "RAMB36_X1Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y30": "FIFO18E1",
            "RAMB18_X1Y31": "RAMB18E1",
            "RAMB36_X1Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y32": "FIFO18E1",
            "RAMB18_X1Y33": "RAMB18E1",
            "RAMB36_X1Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y34": "FIFO18E1",
            "RAMB18_X1Y35": "RAMB18E1",
            "RAMB36_X1Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y36": "FIFO18E1",
            "RAMB18_X1Y37": "RAMB18E1",
            "RAMB36_X1Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00080",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00400880",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 48,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y38": "FIFO18E1",
            "RAMB18_X1Y39": "RAMB18E1",
            "RAMB36_X1Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y100": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y40": "FIFO18E1",
            "RAMB18_X1Y41": "RAMB18E1",
            "RAMB36_X1Y20": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y105": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y42": "FIFO18E1",
            "RAMB18_X1Y43": "RAMB18E1",
            "RAMB36_X1Y21": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y110": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
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                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y44": "FIFO18E1",
            "RAMB18_X1Y45": "RAMB18E1",
            "RAMB36_X1Y22": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y115": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
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                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y46": "FIFO18E1",
            "RAMB18_X1Y47": "RAMB18E1",
            "RAMB36_X1Y23": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y120": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
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                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y48": "FIFO18E1",
            "RAMB18_X1Y49": "RAMB18E1",
            "RAMB36_X1Y24": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y125": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
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                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y50": "FIFO18E1",
            "RAMB18_X1Y51": "RAMB18E1",
            "RAMB36_X1Y25": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y130": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
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                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y52": "FIFO18E1",
            "RAMB18_X1Y53": "RAMB18E1",
            "RAMB36_X1Y26": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y135": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
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                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 48,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y54": "FIFO18E1",
            "RAMB18_X1Y55": "RAMB18E1",
            "RAMB36_X1Y27": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y140": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
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                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000880",
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                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y56": "FIFO18E1",
            "RAMB18_X1Y57": "RAMB18E1",
            "RAMB36_X1Y28": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y145": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800080",
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                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
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                "words": 10
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y58": "FIFO18E1",
            "RAMB18_X1Y59": "RAMB18E1",
            "RAMB36_X1Y29": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y150": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
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                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
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                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
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        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y60": "FIFO18E1",
            "RAMB18_X1Y61": "RAMB18E1",
            "RAMB36_X1Y30": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y155": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
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                "words": 10
            },
            "CLB_IO_CLK": {
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                "words": 10
            }
        },
        "clock_region": "X0Y3",
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        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y62": "FIFO18E1",
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            "RAMB36_X1Y31": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y160": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
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                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
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                "words": 10
            }
        },
        "clock_region": "X0Y3",
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        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y64": "FIFO18E1",
            "RAMB18_X1Y65": "RAMB18E1",
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        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y165": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
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                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
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                "words": 10
            }
        },
        "clock_region": "X0Y3",
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        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y66": "FIFO18E1",
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            "RAMB36_X1Y33": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y170": {
        "bits": {
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                "baseaddr": "0x00820080",
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                "words": 10
            },
            "CLB_IO_CLK": {
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            }
        },
        "clock_region": "X0Y3",
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        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y68": "FIFO18E1",
            "RAMB18_X1Y69": "RAMB18E1",
            "RAMB36_X1Y34": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y175": {
        "bits": {
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                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
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                "words": 10
            }
        },
        "clock_region": "X0Y3",
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        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y70": "FIFO18E1",
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            "RAMB36_X1Y35": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y180": {
        "bits": {
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                "baseaddr": "0x00820080",
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                "words": 10
            },
            "CLB_IO_CLK": {
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            }
        },
        "clock_region": "X0Y3",
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        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y72": "FIFO18E1",
            "RAMB18_X1Y73": "RAMB18E1",
            "RAMB36_X1Y36": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y185": {
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            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
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                "words": 10
            },
            "CLB_IO_CLK": {
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            }
        },
        "clock_region": "X0Y3",
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        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y74": "FIFO18E1",
            "RAMB18_X1Y75": "RAMB18E1",
            "RAMB36_X1Y37": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
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        "bits": {
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                "baseaddr": "0x00820080",
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                "words": 10
            },
            "CLB_IO_CLK": {
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            }
        },
        "clock_region": "X0Y3",
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        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y76": "FIFO18E1",
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            "RAMB36_X1Y38": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X17Y195": {
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            "BLOCK_RAM": {
                "baseaddr": "0x00820080",
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                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00020880",
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                "words": 10
            }
        },
        "clock_region": "X0Y3",
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        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "RAMB18_X1Y78": "FIFO18E1",
            "RAMB18_X1Y79": "RAMB18E1",
            "RAMB36_X1Y39": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
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                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
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                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y0": "FIFO18E1",
            "RAMB18_X3Y1": "RAMB18E1",
            "RAMB36_X3Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
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                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y2": "FIFO18E1",
            "RAMB18_X3Y3": "RAMB18E1",
            "RAMB36_X3Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
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                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
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                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y4": "FIFO18E1",
            "RAMB18_X3Y5": "RAMB18E1",
            "RAMB36_X3Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
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                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y6": "FIFO18E1",
            "RAMB18_X3Y7": "RAMB18E1",
            "RAMB36_X3Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
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                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y8": "FIFO18E1",
            "RAMB18_X3Y9": "RAMB18E1",
            "RAMB36_X3Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
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                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y10": "FIFO18E1",
            "RAMB18_X3Y11": "RAMB18E1",
            "RAMB36_X3Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y12": "FIFO18E1",
            "RAMB18_X3Y13": "RAMB18E1",
            "RAMB36_X3Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y14": "FIFO18E1",
            "RAMB18_X3Y15": "RAMB18E1",
            "RAMB36_X3Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y16": "FIFO18E1",
            "RAMB18_X3Y17": "RAMB18E1",
            "RAMB36_X3Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C20180",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 97,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y18": "FIFO18E1",
            "RAMB18_X3Y19": "RAMB18E1",
            "RAMB36_X3Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 97,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "RAMB18_X3Y20": "FIFO18E1",
            "RAMB18_X3Y21": "RAMB18E1",
            "RAMB36_X3Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X37Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401280",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B00",
                "frames": 36,
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    },
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        "bits": {
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                "baseaddr": "0x00020800",
                "frames": 36,
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                "words": 2
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        },
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        },
        "type": "CLBLM_L"
    },
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        "type": "CLBLM_L"
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        "type": "CLBLM_L"
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        "type": "CLBLM_L"
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            "CLB_IO_CLK": {
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                "frames": 36,
                "offset": 55,
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            "BUFGCTRL_X0Y5": "BUFGCTRL",
            "BUFGCTRL_X0Y6": "BUFGCTRL",
            "BUFGCTRL_X0Y7": "BUFGCTRL",
            "BUFGCTRL_X0Y8": "BUFGCTRL",
            "BUFGCTRL_X0Y9": "BUFGCTRL",
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y155": {
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        "grid_x": 67,
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        "pin_functions": {},
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y157": {
        "bits": {},
        "grid_x": 67,
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        "pin_functions": {},
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y158": {
        "bits": {},
        "grid_x": 67,
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        "pin_functions": {},
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        "type": "CLK_FEED"
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        "bits": {},
        "grid_x": 67,
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        "pin_functions": {},
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y160": {
        "bits": {},
        "grid_x": 67,
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        "pin_functions": {},
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y161": {
        "bits": {},
        "grid_x": 67,
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        "pin_functions": {},
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y162": {
        "bits": {},
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        "pin_functions": {},
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y163": {
        "bits": {},
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        "pin_functions": {},
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y164": {
        "bits": {},
        "grid_x": 67,
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        "pin_functions": {},
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        "type": "CLK_FEED"
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        "pin_functions": {},
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y166": {
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        "pin_functions": {},
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y167": {
        "bits": {},
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        "type": "CLK_FEED"
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        "pin_functions": {},
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        "type": "CLK_FEED"
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        "type": "CLK_FEED"
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    "CLK_FEED_X67Y172": {
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    "CLK_FEED_X67Y173": {
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        "type": "CLK_FEED"
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            "BUFHCE_X0Y3": "BUFHCE",
            "BUFHCE_X0Y4": "BUFHCE",
            "BUFHCE_X0Y5": "BUFHCE",
            "BUFHCE_X0Y6": "BUFHCE",
            "BUFHCE_X0Y7": "BUFHCE",
            "BUFHCE_X0Y8": "BUFHCE",
            "BUFHCE_X0Y9": "BUFHCE",
            "BUFHCE_X0Y10": "BUFHCE",
            "BUFHCE_X0Y11": "BUFHCE",
            "BUFHCE_X1Y0": "BUFHCE",
            "BUFHCE_X1Y1": "BUFHCE",
            "BUFHCE_X1Y2": "BUFHCE",
            "BUFHCE_X1Y3": "BUFHCE",
            "BUFHCE_X1Y4": "BUFHCE",
            "BUFHCE_X1Y5": "BUFHCE",
            "BUFHCE_X1Y6": "BUFHCE",
            "BUFHCE_X1Y7": "BUFHCE",
            "BUFHCE_X1Y8": "BUFHCE",
            "BUFHCE_X1Y9": "BUFHCE",
            "BUFHCE_X1Y10": "BUFHCE",
            "BUFHCE_X1Y11": "BUFHCE"
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    "CLK_HROW_BOT_R_X67Y78": {
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            "BUFHCE_X0Y13": "BUFHCE",
            "BUFHCE_X0Y14": "BUFHCE",
            "BUFHCE_X0Y15": "BUFHCE",
            "BUFHCE_X0Y16": "BUFHCE",
            "BUFHCE_X0Y17": "BUFHCE",
            "BUFHCE_X0Y18": "BUFHCE",
            "BUFHCE_X0Y19": "BUFHCE",
            "BUFHCE_X0Y20": "BUFHCE",
            "BUFHCE_X0Y21": "BUFHCE",
            "BUFHCE_X0Y22": "BUFHCE",
            "BUFHCE_X0Y23": "BUFHCE",
            "BUFHCE_X1Y12": "BUFHCE",
            "BUFHCE_X1Y13": "BUFHCE",
            "BUFHCE_X1Y14": "BUFHCE",
            "BUFHCE_X1Y15": "BUFHCE",
            "BUFHCE_X1Y16": "BUFHCE",
            "BUFHCE_X1Y17": "BUFHCE",
            "BUFHCE_X1Y18": "BUFHCE",
            "BUFHCE_X1Y19": "BUFHCE",
            "BUFHCE_X1Y20": "BUFHCE",
            "BUFHCE_X1Y21": "BUFHCE",
            "BUFHCE_X1Y22": "BUFHCE",
            "BUFHCE_X1Y23": "BUFHCE"
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    "CLK_HROW_TOP_R_X67Y130": {
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        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "BUFHCE_X0Y25": "BUFHCE",
            "BUFHCE_X0Y26": "BUFHCE",
            "BUFHCE_X0Y27": "BUFHCE",
            "BUFHCE_X0Y28": "BUFHCE",
            "BUFHCE_X0Y29": "BUFHCE",
            "BUFHCE_X0Y30": "BUFHCE",
            "BUFHCE_X0Y31": "BUFHCE",
            "BUFHCE_X0Y32": "BUFHCE",
            "BUFHCE_X0Y33": "BUFHCE",
            "BUFHCE_X0Y34": "BUFHCE",
            "BUFHCE_X0Y35": "BUFHCE",
            "BUFHCE_X1Y24": "BUFHCE",
            "BUFHCE_X1Y25": "BUFHCE",
            "BUFHCE_X1Y26": "BUFHCE",
            "BUFHCE_X1Y27": "BUFHCE",
            "BUFHCE_X1Y28": "BUFHCE",
            "BUFHCE_X1Y29": "BUFHCE",
            "BUFHCE_X1Y30": "BUFHCE",
            "BUFHCE_X1Y31": "BUFHCE",
            "BUFHCE_X1Y32": "BUFHCE",
            "BUFHCE_X1Y33": "BUFHCE",
            "BUFHCE_X1Y34": "BUFHCE",
            "BUFHCE_X1Y35": "BUFHCE"
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        "type": "CLK_HROW_TOP_R"
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    "CLK_HROW_TOP_R_X67Y182": {
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        "clock_region": "X1Y3",
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            "BUFHCE_X0Y37": "BUFHCE",
            "BUFHCE_X0Y38": "BUFHCE",
            "BUFHCE_X0Y39": "BUFHCE",
            "BUFHCE_X0Y40": "BUFHCE",
            "BUFHCE_X0Y41": "BUFHCE",
            "BUFHCE_X0Y42": "BUFHCE",
            "BUFHCE_X0Y43": "BUFHCE",
            "BUFHCE_X0Y44": "BUFHCE",
            "BUFHCE_X0Y45": "BUFHCE",
            "BUFHCE_X0Y46": "BUFHCE",
            "BUFHCE_X0Y47": "BUFHCE",
            "BUFHCE_X1Y36": "BUFHCE",
            "BUFHCE_X1Y37": "BUFHCE",
            "BUFHCE_X1Y38": "BUFHCE",
            "BUFHCE_X1Y39": "BUFHCE",
            "BUFHCE_X1Y40": "BUFHCE",
            "BUFHCE_X1Y41": "BUFHCE",
            "BUFHCE_X1Y42": "BUFHCE",
            "BUFHCE_X1Y43": "BUFHCE",
            "BUFHCE_X1Y44": "BUFHCE",
            "BUFHCE_X1Y45": "BUFHCE",
            "BUFHCE_X1Y46": "BUFHCE",
            "BUFHCE_X1Y47": "BUFHCE"
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        "type": "CLK_HROW_TOP_R"
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    "CLK_MTBF2_X67Y99": {
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        "grid_x": 67,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_MTBF2"
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    "CLK_PMV2_SVT_X67Y86": {
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        "grid_x": 67,
        "grid_y": 122,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_PMV2_SVT"
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    "CLK_PMV2_X67Y95": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 67,
        "grid_y": 113,
        "pin_functions": {},
        "sites": {
            "PMV_X0Y2": "PMV2"
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        "type": "CLK_PMV2"
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    "CLK_PMVIOB_X67Y70": {
        "bits": {},
        "grid_x": 67,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_PMVIOB"
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    "CLK_PMV_X67Y54": {
        "bits": {},
        "grid_x": 67,
        "grid_y": 154,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_PMV"
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    "CLK_TERM_X67Y0": {
        "bits": {},
        "grid_x": 67,
        "grid_y": 208,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_TERM"
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    "CLK_TERM_X67Y208": {
        "bits": {},
        "grid_x": 67,
        "grid_y": 0,
        "pin_functions": {},
        "sites": {},
        "type": "CLK_TERM"
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    "CMT_FIFO_L_X109Y8": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 109,
        "grid_y": 200,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y0": "IN_FIFO",
            "OUT_FIFO_X1Y0": "OUT_FIFO"
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        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X109Y20": {
        "bits": {},
        "clock_region": "X1Y0",
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        "grid_y": 188,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y1": "IN_FIFO",
            "OUT_FIFO_X1Y1": "OUT_FIFO"
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        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X109Y33": {
        "bits": {},
        "clock_region": "X1Y0",
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        "grid_y": 175,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y2": "IN_FIFO",
            "OUT_FIFO_X1Y2": "OUT_FIFO"
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        "type": "CMT_FIFO_L"
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    "CMT_FIFO_L_X109Y45": {
        "bits": {},
        "clock_region": "X1Y0",
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        "grid_y": 163,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y3": "IN_FIFO",
            "OUT_FIFO_X1Y3": "OUT_FIFO"
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        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X109Y60": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 109,
        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y4": "IN_FIFO",
            "OUT_FIFO_X1Y4": "OUT_FIFO"
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        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X109Y72": {
        "bits": {},
        "clock_region": "X1Y1",
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        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y5": "IN_FIFO",
            "OUT_FIFO_X1Y5": "OUT_FIFO"
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        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X109Y85": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 109,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y6": "IN_FIFO",
            "OUT_FIFO_X1Y6": "OUT_FIFO"
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        "type": "CMT_FIFO_L"
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    "CMT_FIFO_L_X109Y97": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 109,
        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X1Y7": "IN_FIFO",
            "OUT_FIFO_X1Y7": "OUT_FIFO"
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        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_R_X7Y8": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 200,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y0": "IN_FIFO",
            "OUT_FIFO_X0Y0": "OUT_FIFO"
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        "type": "CMT_FIFO_R"
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    "CMT_FIFO_R_X7Y20": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 188,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y1": "IN_FIFO",
            "OUT_FIFO_X0Y1": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
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    "CMT_FIFO_R_X7Y33": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 175,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y2": "IN_FIFO",
            "OUT_FIFO_X0Y2": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y45": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 7,
        "grid_y": 163,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y3": "IN_FIFO",
            "OUT_FIFO_X0Y3": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y60": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 7,
        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y4": "IN_FIFO",
            "OUT_FIFO_X0Y4": "OUT_FIFO"
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        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y72": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 7,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y5": "IN_FIFO",
            "OUT_FIFO_X0Y5": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y85": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 7,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y6": "IN_FIFO",
            "OUT_FIFO_X0Y6": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y97": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 7,
        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y7": "IN_FIFO",
            "OUT_FIFO_X0Y7": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y112": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 7,
        "grid_y": 96,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y8": "IN_FIFO",
            "OUT_FIFO_X0Y8": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y124": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 7,
        "grid_y": 84,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y9": "IN_FIFO",
            "OUT_FIFO_X0Y9": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y137": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 7,
        "grid_y": 71,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y10": "IN_FIFO",
            "OUT_FIFO_X0Y10": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y149": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 7,
        "grid_y": 59,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y11": "IN_FIFO",
            "OUT_FIFO_X0Y11": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y164": {
        "bits": {},
        "clock_region": "X0Y3",
        "grid_x": 7,
        "grid_y": 44,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y12": "IN_FIFO",
            "OUT_FIFO_X0Y12": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y176": {
        "bits": {},
        "clock_region": "X0Y3",
        "grid_x": 7,
        "grid_y": 32,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y13": "IN_FIFO",
            "OUT_FIFO_X0Y13": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y189": {
        "bits": {},
        "clock_region": "X0Y3",
        "grid_x": 7,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y14": "IN_FIFO",
            "OUT_FIFO_X0Y14": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_FIFO_R_X7Y201": {
        "bits": {},
        "clock_region": "X0Y3",
        "grid_x": 7,
        "grid_y": 7,
        "pin_functions": {},
        "sites": {
            "IN_FIFO_X0Y15": "IN_FIFO",
            "OUT_FIFO_X0Y15": "OUT_FIFO"
        },
        "type": "CMT_FIFO_R"
    },
    "CMT_PMV_L_X109Y1": {
        "bits": {},
        "grid_x": 109,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X109Y51": {
        "bits": {},
        "grid_x": 109,
        "grid_y": 157,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X109Y53": {
        "bits": {},
        "grid_x": 109,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X109Y103": {
        "bits": {},
        "grid_x": 109,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_X7Y1": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y51": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 157,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y53": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y103": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y105": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y155": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y157": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_PMV_X7Y207": {
        "bits": {},
        "grid_x": 7,
        "grid_y": 1,
        "pin_functions": {},
        "sites": {},
        "type": "CMT_PMV"
    },
    "CMT_TOP_L_LOWER_B_X108Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 199,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X1Y0": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_B_X108Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 108,
        "grid_y": 147,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X1Y1": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_T_X108Y18": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 190,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y0": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y1": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y0": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y1": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_LOWER_T_X108Y70": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 108,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y4": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y5": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y4": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y5": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_UPPER_B_X108Y31": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 177,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y2": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y3": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y2": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y3": "PHASER_OUT_PHY",
            "PHASER_REF_X1Y0": "PHASER_REF",
            "PHY_CONTROL_X1Y0": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_B_X108Y83": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 108,
        "grid_y": 125,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X1Y6": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X1Y7": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X1Y6": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X1Y7": "PHASER_OUT_PHY",
            "PHASER_REF_X1Y1": "PHASER_REF",
            "PHY_CONTROL_X1Y1": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_T_X108Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 164,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X1Y0": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "CMT_TOP_L_UPPER_T_X108Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 108,
        "grid_y": 112,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X1Y1": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "CMT_TOP_R_LOWER_B_X8Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 199,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X0Y0": "MMCME2_ADV"
        },
        "type": "CMT_TOP_R_LOWER_B"
    },
    "CMT_TOP_R_LOWER_B_X8Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 8,
        "grid_y": 147,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X0Y1": "MMCME2_ADV"
        },
        "type": "CMT_TOP_R_LOWER_B"
    },
    "CMT_TOP_R_LOWER_B_X8Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000080",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 8,
        "grid_y": 95,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X0Y2": "MMCME2_ADV"
        },
        "type": "CMT_TOP_R_LOWER_B"
    },
    "CMT_TOP_R_LOWER_B_X8Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 30,
                "offset": 0,
                "words": 101
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 8,
        "grid_y": 43,
        "pin_functions": {},
        "sites": {
            "MMCME2_ADV_X0Y3": "MMCME2_ADV"
        },
        "type": "CMT_TOP_R_LOWER_B"
    },
    "CMT_TOP_R_LOWER_T_X8Y18": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 190,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y0": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y1": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y0": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y1": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_R_LOWER_T"
    },
    "CMT_TOP_R_LOWER_T_X8Y70": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 8,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y4": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y5": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y4": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y5": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_R_LOWER_T"
    },
    "CMT_TOP_R_LOWER_T_X8Y122": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 8,
        "grid_y": 86,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y8": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y9": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y8": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y9": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_R_LOWER_T"
    },
    "CMT_TOP_R_LOWER_T_X8Y174": {
        "bits": {},
        "clock_region": "X0Y3",
        "grid_x": 8,
        "grid_y": 34,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y12": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y13": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y12": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y13": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_R_LOWER_T"
    },
    "CMT_TOP_R_UPPER_B_X8Y31": {
        "bits": {},
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 177,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y2": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y3": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y2": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y3": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y0": "PHASER_REF",
            "PHY_CONTROL_X0Y0": "PHY_CONTROL"
        },
        "type": "CMT_TOP_R_UPPER_B"
    },
    "CMT_TOP_R_UPPER_B_X8Y83": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 8,
        "grid_y": 125,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y6": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y7": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y6": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y7": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y1": "PHASER_REF",
            "PHY_CONTROL_X0Y1": "PHY_CONTROL"
        },
        "type": "CMT_TOP_R_UPPER_B"
    },
    "CMT_TOP_R_UPPER_B_X8Y135": {
        "bits": {},
        "clock_region": "X0Y2",
        "grid_x": 8,
        "grid_y": 73,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y10": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y11": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y10": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y11": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y2": "PHASER_REF",
            "PHY_CONTROL_X0Y2": "PHY_CONTROL"
        },
        "type": "CMT_TOP_R_UPPER_B"
    },
    "CMT_TOP_R_UPPER_B_X8Y187": {
        "bits": {},
        "clock_region": "X0Y3",
        "grid_x": 8,
        "grid_y": 21,
        "pin_functions": {},
        "sites": {
            "PHASER_IN_PHY_X0Y14": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y15": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y14": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y15": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y3": "PHASER_REF",
            "PHY_CONTROL_X0Y3": "PHY_CONTROL"
        },
        "type": "CMT_TOP_R_UPPER_B"
    },
    "CMT_TOP_R_UPPER_T_X8Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 8,
        "grid_y": 164,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X0Y0": "PLLE2_ADV"
        },
        "type": "CMT_TOP_R_UPPER_T"
    },
    "CMT_TOP_R_UPPER_T_X8Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 8,
        "grid_y": 112,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X0Y1": "PLLE2_ADV"
        },
        "type": "CMT_TOP_R_UPPER_T"
    },
    "CMT_TOP_R_UPPER_T_X8Y148": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000080",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 8,
        "grid_y": 60,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X0Y2": "PLLE2_ADV"
        },
        "type": "CMT_TOP_R_UPPER_T"
    },
    "CMT_TOP_R_UPPER_T_X8Y200": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 30,
                "offset": 75,
                "words": 26
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 8,
        "grid_y": 8,
        "pin_functions": {},
        "sites": {
            "PLLE2_ADV_X0Y3": "PLLE2_ADV"
        },
        "type": "CMT_TOP_R_UPPER_T"
    },
    "DSP_L_X14Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y0": "DSP48E1",
            "DSP48_X1Y1": "DSP48E1",
            "TIEOFF_X15Y0": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y2": "DSP48E1",
            "DSP48_X1Y3": "DSP48E1",
            "TIEOFF_X15Y5": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y4": "DSP48E1",
            "DSP48_X1Y5": "DSP48E1",
            "TIEOFF_X15Y10": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y6": "DSP48E1",
            "DSP48_X1Y7": "DSP48E1",
            "TIEOFF_X15Y15": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y8": "DSP48E1",
            "DSP48_X1Y9": "DSP48E1",
            "TIEOFF_X15Y20": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y10": "DSP48E1",
            "DSP48_X1Y11": "DSP48E1",
            "TIEOFF_X15Y25": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y12": "DSP48E1",
            "DSP48_X1Y13": "DSP48E1",
            "TIEOFF_X15Y30": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y14": "DSP48E1",
            "DSP48_X1Y15": "DSP48E1",
            "TIEOFF_X15Y35": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y16": "DSP48E1",
            "DSP48_X1Y17": "DSP48E1",
            "TIEOFF_X15Y40": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420700",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 39,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y18": "DSP48E1",
            "DSP48_X1Y19": "DSP48E1",
            "TIEOFF_X15Y45": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y20": "DSP48E1",
            "DSP48_X1Y21": "DSP48E1",
            "TIEOFF_X15Y50": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y22": "DSP48E1",
            "DSP48_X1Y23": "DSP48E1",
            "TIEOFF_X15Y55": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y24": "DSP48E1",
            "DSP48_X1Y25": "DSP48E1",
            "TIEOFF_X15Y60": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y26": "DSP48E1",
            "DSP48_X1Y27": "DSP48E1",
            "TIEOFF_X15Y65": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y28": "DSP48E1",
            "DSP48_X1Y29": "DSP48E1",
            "TIEOFF_X15Y70": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y30": "DSP48E1",
            "DSP48_X1Y31": "DSP48E1",
            "TIEOFF_X15Y75": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y32": "DSP48E1",
            "DSP48_X1Y33": "DSP48E1",
            "TIEOFF_X15Y80": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y34": "DSP48E1",
            "DSP48_X1Y35": "DSP48E1",
            "TIEOFF_X15Y85": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y36": "DSP48E1",
            "DSP48_X1Y37": "DSP48E1",
            "TIEOFF_X15Y90": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400700",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 39,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y38": "DSP48E1",
            "DSP48_X1Y39": "DSP48E1",
            "TIEOFF_X15Y95": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y40": "DSP48E1",
            "DSP48_X1Y41": "DSP48E1",
            "TIEOFF_X15Y100": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y42": "DSP48E1",
            "DSP48_X1Y43": "DSP48E1",
            "TIEOFF_X15Y105": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y44": "DSP48E1",
            "DSP48_X1Y45": "DSP48E1",
            "TIEOFF_X15Y110": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y46": "DSP48E1",
            "DSP48_X1Y47": "DSP48E1",
            "TIEOFF_X15Y115": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y48": "DSP48E1",
            "DSP48_X1Y49": "DSP48E1",
            "TIEOFF_X15Y120": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y50": "DSP48E1",
            "DSP48_X1Y51": "DSP48E1",
            "TIEOFF_X15Y125": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y52": "DSP48E1",
            "DSP48_X1Y53": "DSP48E1",
            "TIEOFF_X15Y130": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y54": "DSP48E1",
            "DSP48_X1Y55": "DSP48E1",
            "TIEOFF_X15Y135": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y56": "DSP48E1",
            "DSP48_X1Y57": "DSP48E1",
            "TIEOFF_X15Y140": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000700",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 39,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y58": "DSP48E1",
            "DSP48_X1Y59": "DSP48E1",
            "TIEOFF_X15Y145": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y60": "DSP48E1",
            "DSP48_X1Y61": "DSP48E1",
            "TIEOFF_X15Y150": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y62": "DSP48E1",
            "DSP48_X1Y63": "DSP48E1",
            "TIEOFF_X15Y155": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y64": "DSP48E1",
            "DSP48_X1Y65": "DSP48E1",
            "TIEOFF_X15Y160": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y66": "DSP48E1",
            "DSP48_X1Y67": "DSP48E1",
            "TIEOFF_X15Y165": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y68": "DSP48E1",
            "DSP48_X1Y69": "DSP48E1",
            "TIEOFF_X15Y170": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y70": "DSP48E1",
            "DSP48_X1Y71": "DSP48E1",
            "TIEOFF_X15Y175": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y72": "DSP48E1",
            "DSP48_X1Y73": "DSP48E1",
            "TIEOFF_X15Y180": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y74": "DSP48E1",
            "DSP48_X1Y75": "DSP48E1",
            "TIEOFF_X15Y185": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y76": "DSP48E1",
            "DSP48_X1Y77": "DSP48E1",
            "TIEOFF_X15Y190": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X14Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 39,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "DSP48_X1Y78": "DSP48E1",
            "DSP48_X1Y79": "DSP48E1",
            "TIEOFF_X15Y195": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_R_X9Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y0": "DSP48E1",
            "DSP48_X0Y1": "DSP48E1",
            "TIEOFF_X10Y0": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y2": "DSP48E1",
            "DSP48_X0Y3": "DSP48E1",
            "TIEOFF_X10Y5": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y4": "DSP48E1",
            "DSP48_X0Y5": "DSP48E1",
            "TIEOFF_X10Y10": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y6": "DSP48E1",
            "DSP48_X0Y7": "DSP48E1",
            "TIEOFF_X10Y15": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y8": "DSP48E1",
            "DSP48_X0Y9": "DSP48E1",
            "TIEOFF_X10Y20": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y10": "DSP48E1",
            "DSP48_X0Y11": "DSP48E1",
            "TIEOFF_X10Y25": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y12": "DSP48E1",
            "DSP48_X0Y13": "DSP48E1",
            "TIEOFF_X10Y30": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y14": "DSP48E1",
            "DSP48_X0Y15": "DSP48E1",
            "TIEOFF_X10Y35": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y16": "DSP48E1",
            "DSP48_X0Y17": "DSP48E1",
            "TIEOFF_X10Y40": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420480",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 28,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y18": "DSP48E1",
            "DSP48_X0Y19": "DSP48E1",
            "TIEOFF_X10Y45": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y20": "DSP48E1",
            "DSP48_X0Y21": "DSP48E1",
            "TIEOFF_X10Y50": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y22": "DSP48E1",
            "DSP48_X0Y23": "DSP48E1",
            "TIEOFF_X10Y55": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y24": "DSP48E1",
            "DSP48_X0Y25": "DSP48E1",
            "TIEOFF_X10Y60": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y26": "DSP48E1",
            "DSP48_X0Y27": "DSP48E1",
            "TIEOFF_X10Y65": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y28": "DSP48E1",
            "DSP48_X0Y29": "DSP48E1",
            "TIEOFF_X10Y70": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y30": "DSP48E1",
            "DSP48_X0Y31": "DSP48E1",
            "TIEOFF_X10Y75": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y32": "DSP48E1",
            "DSP48_X0Y33": "DSP48E1",
            "TIEOFF_X10Y80": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y34": "DSP48E1",
            "DSP48_X0Y35": "DSP48E1",
            "TIEOFF_X10Y85": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y36": "DSP48E1",
            "DSP48_X0Y37": "DSP48E1",
            "TIEOFF_X10Y90": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400480",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 28,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y38": "DSP48E1",
            "DSP48_X0Y39": "DSP48E1",
            "TIEOFF_X10Y95": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y40": "DSP48E1",
            "DSP48_X0Y41": "DSP48E1",
            "TIEOFF_X10Y100": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y42": "DSP48E1",
            "DSP48_X0Y43": "DSP48E1",
            "TIEOFF_X10Y105": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y44": "DSP48E1",
            "DSP48_X0Y45": "DSP48E1",
            "TIEOFF_X10Y110": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y46": "DSP48E1",
            "DSP48_X0Y47": "DSP48E1",
            "TIEOFF_X10Y115": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y48": "DSP48E1",
            "DSP48_X0Y49": "DSP48E1",
            "TIEOFF_X10Y120": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y50": "DSP48E1",
            "DSP48_X0Y51": "DSP48E1",
            "TIEOFF_X10Y125": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y52": "DSP48E1",
            "DSP48_X0Y53": "DSP48E1",
            "TIEOFF_X10Y130": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y54": "DSP48E1",
            "DSP48_X0Y55": "DSP48E1",
            "TIEOFF_X10Y135": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y56": "DSP48E1",
            "DSP48_X0Y57": "DSP48E1",
            "TIEOFF_X10Y140": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000480",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 28,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y58": "DSP48E1",
            "DSP48_X0Y59": "DSP48E1",
            "TIEOFF_X10Y145": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y60": "DSP48E1",
            "DSP48_X0Y61": "DSP48E1",
            "TIEOFF_X10Y150": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y62": "DSP48E1",
            "DSP48_X0Y63": "DSP48E1",
            "TIEOFF_X10Y155": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y64": "DSP48E1",
            "DSP48_X0Y65": "DSP48E1",
            "TIEOFF_X10Y160": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y66": "DSP48E1",
            "DSP48_X0Y67": "DSP48E1",
            "TIEOFF_X10Y165": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y68": "DSP48E1",
            "DSP48_X0Y69": "DSP48E1",
            "TIEOFF_X10Y170": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y70": "DSP48E1",
            "DSP48_X0Y71": "DSP48E1",
            "TIEOFF_X10Y175": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y72": "DSP48E1",
            "DSP48_X0Y73": "DSP48E1",
            "TIEOFF_X10Y180": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y74": "DSP48E1",
            "DSP48_X0Y75": "DSP48E1",
            "TIEOFF_X10Y185": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y76": "DSP48E1",
            "DSP48_X0Y77": "DSP48E1",
            "TIEOFF_X10Y190": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X9Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020480",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 28,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "DSP48_X0Y78": "DSP48E1",
            "DSP48_X0Y79": "DSP48E1",
            "TIEOFF_X10Y195": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y0": "DSP48E1",
            "DSP48_X2Y1": "DSP48E1",
            "TIEOFF_X36Y0": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y2": "DSP48E1",
            "DSP48_X2Y3": "DSP48E1",
            "TIEOFF_X36Y5": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y4": "DSP48E1",
            "DSP48_X2Y5": "DSP48E1",
            "TIEOFF_X36Y10": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y6": "DSP48E1",
            "DSP48_X2Y7": "DSP48E1",
            "TIEOFF_X36Y15": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y8": "DSP48E1",
            "DSP48_X2Y9": "DSP48E1",
            "TIEOFF_X36Y20": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y10": "DSP48E1",
            "DSP48_X2Y11": "DSP48E1",
            "TIEOFF_X36Y25": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 176,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y12": "DSP48E1",
            "DSP48_X2Y13": "DSP48E1",
            "TIEOFF_X36Y30": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y14": "DSP48E1",
            "DSP48_X2Y15": "DSP48E1",
            "TIEOFF_X36Y35": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 166,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y16": "DSP48E1",
            "DSP48_X2Y17": "DSP48E1",
            "TIEOFF_X36Y40": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 87,
        "grid_y": 161,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y18": "DSP48E1",
            "DSP48_X2Y19": "DSP48E1",
            "TIEOFF_X36Y45": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y20": "DSP48E1",
            "DSP48_X2Y21": "DSP48E1",
            "TIEOFF_X36Y50": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y22": "DSP48E1",
            "DSP48_X2Y23": "DSP48E1",
            "TIEOFF_X36Y55": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 145,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y24": "DSP48E1",
            "DSP48_X2Y25": "DSP48E1",
            "TIEOFF_X36Y60": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y26": "DSP48E1",
            "DSP48_X2Y27": "DSP48E1",
            "TIEOFF_X36Y65": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 135,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y28": "DSP48E1",
            "DSP48_X2Y29": "DSP48E1",
            "TIEOFF_X36Y70": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y30": "DSP48E1",
            "DSP48_X2Y31": "DSP48E1",
            "TIEOFF_X36Y75": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 124,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y32": "DSP48E1",
            "DSP48_X2Y33": "DSP48E1",
            "TIEOFF_X36Y80": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y34": "DSP48E1",
            "DSP48_X2Y35": "DSP48E1",
            "TIEOFF_X36Y85": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 114,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y36": "DSP48E1",
            "DSP48_X2Y37": "DSP48E1",
            "TIEOFF_X36Y90": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401080",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 87,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y38": "DSP48E1",
            "DSP48_X2Y39": "DSP48E1",
            "TIEOFF_X36Y95": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y40": "DSP48E1",
            "DSP48_X2Y41": "DSP48E1",
            "TIEOFF_X36Y100": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y42": "DSP48E1",
            "DSP48_X2Y43": "DSP48E1",
            "TIEOFF_X36Y105": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 93,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y44": "DSP48E1",
            "DSP48_X2Y45": "DSP48E1",
            "TIEOFF_X36Y110": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y46": "DSP48E1",
            "DSP48_X2Y47": "DSP48E1",
            "TIEOFF_X36Y115": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 83,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y48": "DSP48E1",
            "DSP48_X2Y49": "DSP48E1",
            "TIEOFF_X36Y120": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y50": "DSP48E1",
            "DSP48_X2Y51": "DSP48E1",
            "TIEOFF_X36Y125": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 72,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y52": "DSP48E1",
            "DSP48_X2Y53": "DSP48E1",
            "TIEOFF_X36Y130": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y54": "DSP48E1",
            "DSP48_X2Y55": "DSP48E1",
            "TIEOFF_X36Y135": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 62,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y56": "DSP48E1",
            "DSP48_X2Y57": "DSP48E1",
            "TIEOFF_X36Y140": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001080",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y2",
        "grid_x": 87,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y58": "DSP48E1",
            "DSP48_X2Y59": "DSP48E1",
            "TIEOFF_X36Y145": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y60": "DSP48E1",
            "DSP48_X2Y61": "DSP48E1",
            "TIEOFF_X36Y150": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y62": "DSP48E1",
            "DSP48_X2Y63": "DSP48E1",
            "TIEOFF_X36Y155": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y160": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 41,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y64": "DSP48E1",
            "DSP48_X2Y65": "DSP48E1",
            "TIEOFF_X36Y160": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y66": "DSP48E1",
            "DSP48_X2Y67": "DSP48E1",
            "TIEOFF_X36Y165": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 31,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y68": "DSP48E1",
            "DSP48_X2Y69": "DSP48E1",
            "TIEOFF_X36Y170": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 25,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y70": "DSP48E1",
            "DSP48_X2Y71": "DSP48E1",
            "TIEOFF_X36Y175": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y72": "DSP48E1",
            "DSP48_X2Y73": "DSP48E1",
            "TIEOFF_X36Y180": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y74": "DSP48E1",
            "DSP48_X2Y75": "DSP48E1",
            "TIEOFF_X36Y185": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 10,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y76": "DSP48E1",
            "DSP48_X2Y77": "DSP48E1",
            "TIEOFF_X36Y190": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X33Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y3",
        "grid_x": 87,
        "grid_y": 5,
        "pin_functions": {},
        "sites": {
            "DSP48_X2Y78": "DSP48E1",
            "DSP48_X2Y79": "DSP48E1",
            "TIEOFF_X36Y195": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "GTX_CHANNEL_0_X99Y110": {
        "bits": {},
        "clock_region": "X1Y2",
        "grid_x": 99,
        "grid_y": 98,
        "pin_functions": {
            "IPAD_X0Y0": "MGTXRXN0_115",
            "IPAD_X0Y1": "MGTXRXP0_115",
            "OPAD_X0Y0": "MGTXTXN0_115",
            "OPAD_X0Y1": "MGTXTXP0_115"
        },
        "sites": {
            "GTXE2_CHANNEL_X0Y0": "GTXE2_CHANNEL",
            "IPAD_X0Y0": "IPAD",
            "IPAD_X0Y1": "IPAD",
            "OPAD_X0Y0": "OPAD",
            "OPAD_X0Y1": "OPAD"
        },
        "type": "GTX_CHANNEL_0"
    },
    "GTX_CHANNEL_0_X99Y162": {
        "bits": {},
        "clock_region": "X1Y3",
        "grid_x": 99,
        "grid_y": 46,
        "pin_functions": {
            "IPAD_X0Y30": "MGTXRXN0_116",
            "IPAD_X0Y31": "MGTXRXP0_116",
            "OPAD_X0Y8": "MGTXTXN0_116",
            "OPAD_X0Y9": "MGTXTXP0_116"
        },
        "sites": {
            "GTXE2_CHANNEL_X0Y4": "GTXE2_CHANNEL",
            "IPAD_X0Y30": "IPAD",
            "IPAD_X0Y31": "IPAD",
            "OPAD_X0Y8": "OPAD",
            "OPAD_X0Y9": "OPAD"
        },
        "type": "GTX_CHANNEL_0"
    },
    "GTX_CHANNEL_1_X99Y121": {
        "bits": {},
        "clock_region": "X1Y2",
        "grid_x": 99,
        "grid_y": 87,
        "pin_functions": {
            "IPAD_X0Y6": "MGTXRXN1_115",
            "IPAD_X0Y7": "MGTXRXP1_115",
            "OPAD_X0Y2": "MGTXTXN1_115",
            "OPAD_X0Y3": "MGTXTXP1_115"
        },
        "sites": {
            "GTXE2_CHANNEL_X0Y1": "GTXE2_CHANNEL",
            "IPAD_X0Y6": "IPAD",
            "IPAD_X0Y7": "IPAD",
            "OPAD_X0Y2": "OPAD",
            "OPAD_X0Y3": "OPAD"
        },
        "type": "GTX_CHANNEL_1"
    },
    "GTX_CHANNEL_1_X99Y173": {
        "bits": {},
        "clock_region": "X1Y3",
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 4,
        "grid_y": 118,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 4,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y87": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 4,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y89": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 4,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y90": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 83,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y91": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y92": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y93": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 89,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y94": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 91,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y95": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "sites": {
            "TIEOFF_X0Y96": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
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            "TIEOFF_X0Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y98": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y99": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X0Y100": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X0Y101": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y102": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 6,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X0Y103": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 8,
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        },
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            "TIEOFF_X0Y104": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 10,
                "words": 2
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        },
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            "TIEOFF_X0Y105": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 12,
                "words": 2
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        },
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            "TIEOFF_X0Y106": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y107": {
        "bits": {
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                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
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            "TIEOFF_X0Y107": "TIEOFF"
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    },
    "INT_L_X0Y108": {
        "bits": {
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                "baseaddr": "0x00000000",
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                "offset": 16,
                "words": 2
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        },
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            "TIEOFF_X0Y108": "TIEOFF"
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    },
    "INT_L_X0Y109": {
        "bits": {
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                "baseaddr": "0x00000000",
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                "offset": 18,
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        "sites": {
            "TIEOFF_X0Y109": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y110": {
        "bits": {
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        },
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            "TIEOFF_X0Y110": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y111": {
        "bits": {
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                "baseaddr": "0x00000000",
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            "TIEOFF_X0Y111": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
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                "offset": 24,
                "words": 2
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        },
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            "TIEOFF_X0Y112": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X0Y113": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y114": {
        "bits": {
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        },
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            "TIEOFF_X0Y114": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y115": {
        "bits": {
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                "offset": 30,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y115": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y116": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 32,
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X0Y116": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y117": {
        "bits": {
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                "baseaddr": "0x00000000",
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "sites": {
            "TIEOFF_X0Y117": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y118": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "sites": {
            "TIEOFF_X0Y118": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y119": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y120": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y121": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y122": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "grid_y": 80,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y123": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y124": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y125": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 4,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y129": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y130": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 4,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y131": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y132": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 4,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y133": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 4,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y134": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y135": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y136": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y136": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
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            "TIEOFF_X0Y137": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y138": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 28,
                "offset": 79,
                "words": 2
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            "TIEOFF_X0Y139": "TIEOFF"
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    },
    "INT_L_X0Y140": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
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                "words": 2
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            "TIEOFF_X0Y140": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X0Y141": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
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        "type": "INT_L"
    },
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        "bits": {
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            "TIEOFF_X0Y144": "TIEOFF"
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        "bits": {
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        "bits": {
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                "words": 2
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            "TIEOFF_X0Y169": "TIEOFF"
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        "bits": {
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                "words": 2
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        "type": "INT_L"
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        "bits": {
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                "words": 2
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        "type": "INT_L"
    },
    "INT_L_X0Y172": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X0Y172": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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        "bits": {
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            "TIEOFF_X0Y174": "TIEOFF"
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        "bits": {
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        "type": "INT_L"
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            "TIEOFF_X0Y176": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y177": {
        "bits": {
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                "words": 2
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        "type": "INT_L"
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        "bits": {
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        "bits": {
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        "type": "INT_L"
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        "bits": {
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    "INT_L_X0Y181": {
        "bits": {
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                "words": 2
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            "TIEOFF_X0Y181": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X0Y182": {
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            "CLB_IO_CLK": {
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                "words": 2
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        "type": "INT_L"
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        "bits": {
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                "words": 2
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        "sites": {
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        "type": "INT_L"
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        "bits": {
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                "words": 2
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        "sites": {
            "TIEOFF_X0Y184": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y185": {
        "bits": {
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                "words": 2
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        "grid_y": 15,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y185": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y186": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 4,
        "grid_y": 14,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y186": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y187": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y187": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y188": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y188": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y189": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y189": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y190": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y191": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 83,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y191": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y192": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 85,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y192": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y193": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X0Y193": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X0Y194": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 28,
                "offset": 89,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y194": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "offset": 91,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y195": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y196": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "offset": 93,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y196": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y197": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "offset": 95,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y197": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "offset": 97,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y198": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X0Y199": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X0Y199": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00420100",
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        },
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            "TIEOFF_X2Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y1": {
        "bits": {
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                "baseaddr": "0x00420100",
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        },
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            "TIEOFF_X2Y1": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "offset": 4,
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y2": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "words": 2
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        },
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            "TIEOFF_X2Y3": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "offset": 8,
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        },
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            "TIEOFF_X2Y4": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "offset": 10,
                "words": 2
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        },
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            "TIEOFF_X2Y5": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y6": {
        "bits": {
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                "baseaddr": "0x00420100",
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                "offset": 12,
                "words": 2
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        },
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            "TIEOFF_X2Y6": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y7": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 14,
                "words": 2
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        },
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            "TIEOFF_X2Y7": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00420100",
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y8": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00420100",
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                "offset": 18,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y10": {
        "bits": {
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                "baseaddr": "0x00420100",
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                "offset": 20,
                "words": 2
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        },
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            "TIEOFF_X2Y10": "TIEOFF"
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    },
    "INT_L_X2Y11": {
        "bits": {
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                "baseaddr": "0x00420100",
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                "offset": 22,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y11": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00420100",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y12": "TIEOFF"
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    },
    "INT_L_X2Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y13": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y14": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "offset": 30,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y15": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y16": {
        "bits": {
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                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X2Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X2Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 188,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y20": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y22": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y23": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 183,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y24": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y25": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y26": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y27": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y28": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y29": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y30": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y31": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y32": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y33": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y34": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420100",
                "frames": 28,
                "offset": 73,
                "words": 2
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            "TIEOFF_X2Y36": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420100",
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00420100",
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        "bits": {
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                "baseaddr": "0x00420100",
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    "INT_L_X2Y74": {
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            "TIEOFF_X2Y74": "TIEOFF"
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    "INT_L_X2Y75": {
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    "INT_L_X2Y76": {
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        "type": "INT_L"
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                "words": 2
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        "type": "INT_L"
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    "INT_L_X2Y82": {
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    "INT_L_X2Y84": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 11,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y85": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 11,
        "grid_y": 118,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 11,
        "grid_y": 117,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y87": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 79,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y89": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 81,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y90": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 83,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y91": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 85,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y92": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 87,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y93": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 89,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y94": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 91,
                "words": 2
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "TIEOFF_X2Y95": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
        "clock_region": "X0Y1",
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            "TIEOFF_X2Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y97": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X2Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400100",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X2Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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                "offset": 0,
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y100": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y101": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y102": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "sites": {
            "TIEOFF_X2Y102": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 6,
                "words": 2
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X2Y103": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y104": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 8,
                "words": 2
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        },
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            "TIEOFF_X2Y104": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 10,
                "words": 2
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        },
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            "TIEOFF_X2Y105": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y106": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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                "offset": 12,
                "words": 2
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        },
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            "TIEOFF_X2Y106": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y107": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 14,
                "words": 2
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        },
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            "TIEOFF_X2Y107": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y108": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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                "offset": 16,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y108": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y109": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y110": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y110": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y111": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X2Y112": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "grid_y": 90,
        "pin_functions": {},
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            "TIEOFF_X2Y113": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y114": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X2Y114": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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                "offset": 30,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y115": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X2Y116": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y117": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 85,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y118": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y119": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y120": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 82,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y121": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "grid_y": 81,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y122": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 80,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y123": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y124": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y125": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
        "grid_y": 75,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y129": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y130": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y131": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y132": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y133": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 11,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X2Y134": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
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            "TIEOFF_X2Y135": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000100",
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                "offset": 73,
                "words": 2
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            "TIEOFF_X2Y136": "TIEOFF"
        },
        "type": "INT_L"
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    "INT_L_X2Y137": {
        "bits": {
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                "words": 2
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            "TIEOFF_X2Y137": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y138": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X2Y138": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X2Y139": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X2Y140": "TIEOFF"
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        "bits": {
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            "TIEOFF_X2Y166": "TIEOFF"
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            "TIEOFF_X2Y167": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X2Y168": "TIEOFF"
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    "INT_L_X2Y169": {
        "bits": {
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            "TIEOFF_X2Y169": "TIEOFF"
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        "bits": {
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            "TIEOFF_X2Y170": "TIEOFF"
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            "TIEOFF_X2Y171": "TIEOFF"
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    "INT_L_X2Y172": {
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            "TIEOFF_X2Y172": "TIEOFF"
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    "INT_L_X2Y173": {
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            "TIEOFF_X2Y173": "TIEOFF"
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        "bits": {
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            "TIEOFF_X2Y176": "TIEOFF"
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        "type": "INT_L"
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        "type": "INT_L"
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        "bits": {
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    "INT_L_X2Y179": {
        "bits": {
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            "TIEOFF_X2Y179": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X2Y180": "TIEOFF"
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    "INT_L_X2Y181": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X2Y182": {
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        "type": "INT_L"
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    "INT_L_X2Y183": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X2Y184": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X2Y184": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
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            "TIEOFF_X2Y185": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X2Y186": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "offset": 73,
                "words": 2
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        },
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            "TIEOFF_X2Y186": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y187": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "offset": 75,
                "words": 2
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        },
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            "TIEOFF_X2Y187": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y188": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "words": 2
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        },
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            "TIEOFF_X2Y188": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y189": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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                "words": 2
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        },
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            "TIEOFF_X2Y189": "TIEOFF"
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    "INT_L_X2Y190": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X2Y190": "TIEOFF"
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    },
    "INT_L_X2Y191": {
        "bits": {
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020100",
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        "bits": {
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            "TIEOFF_X2Y193": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020100",
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        "bits": {
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        "bits": {
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        "bits": {
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                "words": 2
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            "TIEOFF_X4Y19": "TIEOFF"
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                "words": 2
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            "TIEOFF_X4Y21": "TIEOFF"
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            "TIEOFF_X4Y22": "TIEOFF"
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                "words": 2
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        "type": "INT_L"
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        "pin_functions": {},
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X4Y32": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X4Y33": {
        "bits": {
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X4Y33": "TIEOFF"
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        "type": "INT_L"
    },
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                "baseaddr": "0x00420200",
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                "offset": 69,
                "words": 2
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00400200",
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                "words": 2
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            "TIEOFF_X4Y84": "TIEOFF"
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            "TIEOFF_X4Y85": "TIEOFF"
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            "TIEOFF_X4Y86": "TIEOFF"
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            "TIEOFF_X4Y87": "TIEOFF"
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    "INT_L_X4Y88": {
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            "TIEOFF_X4Y89": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X4Y133": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X4Y135": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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        "bits": {
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    "INT_L_X4Y167": {
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                "baseaddr": "0x00020200",
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        "type": "INT_L"
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    "INT_L_X6Y32": {
        "bits": {
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                "baseaddr": "0x00420300",
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                "offset": 65,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X6Y32": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X6Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
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                "words": 2
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        },
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            "TIEOFF_X6Y33": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
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                "offset": 69,
                "words": 2
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            "TIEOFF_X6Y34": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X6Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
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                "words": 2
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        },
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            "TIEOFF_X6Y35": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00420300",
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                "words": 2
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        },
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            "TIEOFF_X6Y36": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X6Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420300",
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            "TIEOFF_X6Y37": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00420300",
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            "TIEOFF_X6Y38": "TIEOFF"
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        "bits": {
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            "TIEOFF_X6Y39": "TIEOFF"
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            "TIEOFF_X6Y66": "TIEOFF"
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    "INT_L_X6Y67": {
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                "words": 2
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            "TIEOFF_X6Y67": "TIEOFF"
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        "type": "INT_L"
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                "words": 2
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            "TIEOFF_X6Y68": "TIEOFF"
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                "words": 2
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            "TIEOFF_X6Y69": "TIEOFF"
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    "INT_L_X6Y71": {
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    "INT_L_X6Y72": {
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                "words": 2
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            "TIEOFF_X6Y72": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X6Y74": {
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    "INT_L_X6Y75": {
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            "TIEOFF_X6Y76": "TIEOFF"
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        "type": "INT_L"
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        "type": "INT_L"
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        "type": "INT_L"
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        "type": "INT_L"
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                "baseaddr": "0x00400300",
                "frames": 28,
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                "words": 2
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    "INT_L_X6Y131": {
        "bits": {
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            "TIEOFF_X6Y180": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00020300",
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                "words": 2
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            "TIEOFF_X6Y183": "TIEOFF"
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    "INT_L_X8Y30": {
        "bits": {
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 25,
        "grid_y": 21,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y179": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "grid_y": 20,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y180": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y181": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y181": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y182": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
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        "grid_x": 25,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y182": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y183": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y183": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y184": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y184": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 71,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y185": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y186": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y186": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y187": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y187": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y188": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 77,
                "words": 2
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        },
        "clock_region": "X0Y3",
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            "TIEOFF_X8Y188": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y189": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 79,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "sites": {
            "TIEOFF_X8Y189": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 81,
                "words": 2
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        },
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            "TIEOFF_X8Y190": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X8Y191": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 83,
                "words": 2
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        },
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            "TIEOFF_X8Y191": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y192": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 85,
                "words": 2
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        },
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            "TIEOFF_X8Y192": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y193": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 87,
                "words": 2
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        },
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            "TIEOFF_X8Y193": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y194": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 89,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X8Y194": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 91,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X8Y195": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y196": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 93,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y196": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y197": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 95,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X8Y197": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y198": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
        "clock_region": "X0Y3",
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        "sites": {
            "TIEOFF_X8Y198": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X8Y199": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020400",
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                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X8Y199": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 0,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 2,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y1": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X11Y2": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 6,
                "words": 2
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        },
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            "TIEOFF_X11Y3": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y4": {
        "bits": {
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                "baseaddr": "0x00420500",
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                "offset": 8,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y4": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y5": {
        "bits": {
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                "baseaddr": "0x00420500",
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                "offset": 10,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y5": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00420500",
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                "offset": 12,
                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X11Y6": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y7": {
        "bits": {
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                "baseaddr": "0x00420500",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X11Y7": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 16,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y8": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00420500",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X11Y9": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X11Y10": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
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                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y14": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 190,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "grid_y": 189,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 31,
        "grid_y": 188,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y20": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 31,
        "grid_y": 186,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 31,
        "grid_y": 185,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y22": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y23": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y24": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y25": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 31,
        "grid_y": 180,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y26": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y27": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420500",
                "frames": 28,
                "offset": 59,
                "words": 2
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        "bits": {
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        "type": "INT_L"
    },
    "INT_L_X10Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
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        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y78": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y79": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y80": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y81": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y82": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y83": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 69,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y84": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
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                "offset": 71,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y85": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 73,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y86": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
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                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y87": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y88": {
        "bits": {
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                "baseaddr": "0x00400500",
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                "words": 2
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        },
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            "TIEOFF_X11Y88": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
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                "offset": 79,
                "words": 2
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        },
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            "TIEOFF_X11Y89": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
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                "offset": 81,
                "words": 2
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        },
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            "TIEOFF_X11Y90": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
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                "words": 2
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        },
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            "TIEOFF_X11Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y92": {
        "bits": {
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                "baseaddr": "0x00400500",
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                "words": 2
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        },
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            "TIEOFF_X11Y92": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400500",
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                "offset": 87,
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        },
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            "TIEOFF_X11Y93": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y94": {
        "bits": {
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                "offset": 89,
                "words": 2
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        },
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            "TIEOFF_X11Y94": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y95": {
        "bits": {
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                "baseaddr": "0x00400500",
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                "offset": 91,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X11Y95": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y96": {
        "bits": {
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                "baseaddr": "0x00400500",
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                "offset": 93,
                "words": 2
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        },
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            "TIEOFF_X11Y96": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y97": {
        "bits": {
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                "baseaddr": "0x00400500",
                "frames": 28,
                "offset": 95,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X11Y97": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y98": {
        "bits": {
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                "baseaddr": "0x00400500",
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                "offset": 97,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y98": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y99": {
        "bits": {
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                "baseaddr": "0x00400500",
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                "offset": 99,
                "words": 2
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        "type": "INT_L"
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    "INT_L_X10Y100": {
        "bits": {
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                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 0,
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        "type": "INT_L"
    },
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        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X11Y101": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y102": {
        "bits": {
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    "INT_L_X10Y103": {
        "bits": {
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                "offset": 6,
                "words": 2
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        "pin_functions": {},
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        "bits": {
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                "offset": 8,
                "words": 2
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        "bits": {
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                "baseaddr": "0x00000500",
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        },
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        "type": "INT_L"
    },
    "INT_L_X10Y106": {
        "bits": {
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                "baseaddr": "0x00000500",
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                "words": 2
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        "type": "INT_L"
    },
    "INT_L_X10Y107": {
        "bits": {
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                "words": 2
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        "type": "INT_L"
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    "INT_L_X10Y108": {
        "bits": {
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                "words": 2
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            "TIEOFF_X11Y108": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y109": {
        "bits": {
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                "baseaddr": "0x00000500",
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        "pin_functions": {},
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        "type": "INT_L"
    },
    "INT_L_X10Y110": {
        "bits": {
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                "baseaddr": "0x00000500",
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                "offset": 20,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X11Y110": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y111": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y112": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y112": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 31,
        "grid_y": 90,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y113": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y114": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y114": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 30,
                "words": 2
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        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y115": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y116": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 32,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y116": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y117": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y118": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y118": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y119": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y120": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 40,
                "words": 2
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        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y120": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 42,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y121": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y122": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y122": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y123": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y124": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 48,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y124": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y125": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 31,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 31,
        "grid_y": 75,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000500",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X11Y129": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X10Y130": {
        "bits": {
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                "words": 2
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            "TIEOFF_X11Y130": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y131": {
        "bits": {
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            "TIEOFF_X11Y131": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y132": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X11Y132": "TIEOFF"
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    "INT_L_X10Y133": {
        "bits": {
            "CLB_IO_CLK": {
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        "bits": {
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        "bits": {
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            "TIEOFF_X11Y160": "TIEOFF"
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    "INT_L_X10Y162": {
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            "TIEOFF_X11Y162": "TIEOFF"
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        "bits": {
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    "INT_L_X10Y164": {
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            "TIEOFF_X11Y165": "TIEOFF"
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    "INT_L_X10Y166": {
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                "words": 2
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            "TIEOFF_X11Y166": "TIEOFF"
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    "INT_L_X10Y167": {
        "bits": {
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                "words": 2
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            "TIEOFF_X11Y167": "TIEOFF"
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    "INT_L_X10Y168": {
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        "pin_functions": {},
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            "TIEOFF_X11Y168": "TIEOFF"
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    "INT_L_X10Y169": {
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                "words": 2
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            "TIEOFF_X11Y169": "TIEOFF"
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                "words": 2
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                "words": 2
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        "type": "INT_L"
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    "INT_L_X10Y172": {
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            "TIEOFF_X11Y172": "TIEOFF"
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    "INT_L_X10Y173": {
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    "INT_L_X10Y174": {
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        "type": "INT_L"
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    "INT_L_X10Y175": {
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        "type": "INT_L"
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    "INT_L_X10Y176": {
        "bits": {
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        },
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            "TIEOFF_X11Y176": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y177": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
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            "TIEOFF_X11Y177": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y178": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X11Y178": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y179": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 59,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X11Y179": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 61,
                "words": 2
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        },
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            "TIEOFF_X11Y180": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X10Y181": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "offset": 63,
                "words": 2
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        },
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            "TIEOFF_X11Y181": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y182": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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                "words": 2
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        },
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            "TIEOFF_X11Y182": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X10Y183": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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            "TIEOFF_X11Y183": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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            "TIEOFF_X11Y184": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020500",
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            "TIEOFF_X11Y185": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020500",
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            "TIEOFF_X11Y186": "TIEOFF"
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        "bits": {
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            "TIEOFF_X11Y187": "TIEOFF"
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            "TIEOFF_X11Y188": "TIEOFF"
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        "bits": {
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        "bits": {
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        "bits": {
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            "TIEOFF_X11Y196": "TIEOFF"
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            "TIEOFF_X13Y9": "TIEOFF"
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            "TIEOFF_X13Y10": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420600",
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                "words": 2
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        },
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            "TIEOFF_X13Y11": "TIEOFF"
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    "INT_L_X12Y12": {
        "bits": {
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                "baseaddr": "0x00420600",
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                "words": 2
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            "TIEOFF_X13Y12": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y13": {
        "bits": {
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                "baseaddr": "0x00420600",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X13Y13": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00420600",
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        "pin_functions": {},
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            "TIEOFF_X13Y14": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00420600",
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                "offset": 30,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X13Y15": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y16": {
        "bits": {
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                "baseaddr": "0x00420600",
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                "offset": 32,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X13Y16": "TIEOFF"
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    },
    "INT_L_X12Y17": {
        "bits": {
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                "baseaddr": "0x00420600",
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                "offset": 34,
                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X13Y17": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y18": {
        "bits": {
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                "baseaddr": "0x00420600",
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                "offset": 36,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X13Y18": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y19": {
        "bits": {
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                "baseaddr": "0x00420600",
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                "offset": 38,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X13Y19": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "offset": 40,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X13Y20": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y21": {
        "bits": {
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                "baseaddr": "0x00420600",
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                "words": 2
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        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X13Y21": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "offset": 44,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y22": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "offset": 46,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y23": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y24": {
        "bits": {
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                "baseaddr": "0x00420600",
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                "offset": 48,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y24": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y25": {
        "bits": {
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                "baseaddr": "0x00420600",
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                "offset": 51,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y25": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X12Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420600",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "grid_y": 180,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X13Y26": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
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        "bits": {
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                "baseaddr": "0x00420600",
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        "bits": {
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                "baseaddr": "0x00420600",
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                "baseaddr": "0x00420600",
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    "INT_L_X12Y75": {
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    "INT_L_X12Y76": {
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                "words": 2
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                "baseaddr": "0x00400600",
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    "INT_L_X12Y126": {
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            "TIEOFF_X13Y175": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020600",
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                "words": 2
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            "TIEOFF_X13Y176": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020600",
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        "type": "INT_L"
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            "TIEOFF_X13Y178": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020600",
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            "TIEOFF_X13Y180": "TIEOFF"
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        "bits": {
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                "words": 2
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            "TIEOFF_X16Y13": "TIEOFF"
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                "baseaddr": "0x00420700",
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            "TIEOFF_X16Y15": "TIEOFF"
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                "baseaddr": "0x00420700",
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            "TIEOFF_X16Y16": "TIEOFF"
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                "words": 2
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        "bits": {
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                "words": 2
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                "baseaddr": "0x00420700",
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                "baseaddr": "0x00420700",
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    "INT_L_X14Y22": {
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                "baseaddr": "0x00420700",
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        },
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            "TIEOFF_X16Y22": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X14Y23": {
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        "pin_functions": {},
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        "type": "INT_L"
    },
    "INT_L_X14Y24": {
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        },
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        "pin_functions": {},
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        "type": "INT_L"
    },
    "INT_L_X14Y25": {
        "bits": {
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        "bits": {
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                "words": 2
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            "TIEOFF_X16Y174": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00020700",
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                "words": 2
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        "type": "INT_L"
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    "INT_L_X14Y176": {
        "bits": {
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                "baseaddr": "0x00020700",
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                "words": 2
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            "TIEOFF_X16Y176": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020700",
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            "TIEOFF_X16Y177": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X14Y178": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020700",
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            "TIEOFF_X16Y178": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020700",
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            "TIEOFF_X16Y179": "TIEOFF"
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        "bits": {
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                "words": 2
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                "words": 2
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                "words": 2
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                "baseaddr": "0x00420800",
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        "pin_functions": {},
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        "type": "INT_L"
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        "bits": {
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                "words": 2
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            "TIEOFF_X18Y16": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X16Y17": {
        "bits": {
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                "words": 2
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        "type": "INT_L"
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        "bits": {
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                "words": 2
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            "TIEOFF_X18Y18": "TIEOFF"
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    },
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                "baseaddr": "0x00420800",
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                "offset": 38,
                "words": 2
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            "TIEOFF_X18Y19": "TIEOFF"
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        "bits": {
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            "TIEOFF_X18Y20": "TIEOFF"
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    "INT_L_X16Y21": {
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        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
    },
    "INT_L_X16Y22": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X18Y22": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X16Y23": {
        "bits": {
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                "baseaddr": "0x00420800",
                "frames": 28,
                "offset": 46,
                "words": 2
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        "bits": {
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                "baseaddr": "0x00400800",
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                "offset": 46,
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            "TIEOFF_X18Y73": "TIEOFF"
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    },
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                "baseaddr": "0x00400800",
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                "words": 2
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            "TIEOFF_X18Y74": "TIEOFF"
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    "INT_L_X16Y75": {
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                "words": 2
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            "TIEOFF_X18Y75": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X16Y76": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X18Y76": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400800",
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                "words": 2
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            "TIEOFF_X18Y77": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400800",
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            "TIEOFF_X18Y78": "TIEOFF"
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        "bits": {
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    "INT_L_X16Y106": {
        "bits": {
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                "words": 2
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                "words": 2
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        "bits": {
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                "words": 2
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            "TIEOFF_X18Y108": "TIEOFF"
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    "INT_L_X16Y109": {
        "bits": {
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                "words": 2
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        "bits": {
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        "bits": {
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        "bits": {
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                "words": 2
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        "sites": {
            "TIEOFF_X18Y113": "TIEOFF"
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        "bits": {
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        "bits": {
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            "TIEOFF_X18Y115": "TIEOFF"
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    },
    "INT_L_X16Y116": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X16Y117": {
        "bits": {
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    "INT_L_X16Y118": {
        "bits": {
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    },
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        "bits": {
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        "type": "INT_L"
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    "INT_L_X16Y120": {
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        "type": "INT_L"
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    "INT_L_X16Y121": {
        "bits": {
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        "pin_functions": {},
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        "type": "INT_L"
    },
    "INT_L_X16Y122": {
        "bits": {
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        "bits": {
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                "baseaddr": "0x00020800",
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            "TIEOFF_X18Y173": "TIEOFF"
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            "TIEOFF_X18Y174": "TIEOFF"
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            "TIEOFF_X18Y176": "TIEOFF"
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            "TIEOFF_X18Y177": "TIEOFF"
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    "INT_L_X18Y17": {
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    "INT_L_X18Y18": {
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                "words": 2
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            "TIEOFF_X20Y18": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y19": {
        "bits": {
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        },
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        "type": "INT_L"
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    "INT_L_X18Y21": {
        "bits": {
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                "words": 2
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            "TIEOFF_X20Y21": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00420900",
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            "TIEOFF_X20Y22": "TIEOFF"
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    "INT_L_X18Y171": {
        "bits": {
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            "TIEOFF_X20Y171": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020900",
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                "words": 2
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            "TIEOFF_X20Y172": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020900",
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            "TIEOFF_X20Y173": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y174": {
        "bits": {
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            "TIEOFF_X20Y174": "TIEOFF"
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    "INT_L_X18Y175": {
        "bits": {
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                "baseaddr": "0x00020900",
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            "TIEOFF_X20Y175": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020900",
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            "TIEOFF_X20Y176": "TIEOFF"
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    "INT_L_X18Y177": {
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            "TIEOFF_X20Y177": "TIEOFF"
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        "bits": {
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            "TIEOFF_X22Y11": "TIEOFF"
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            "TIEOFF_X22Y12": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X22Y13": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X22Y14": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X20Y15": {
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            "CLB_IO_CLK": {
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            "TIEOFF_X22Y15": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y16": {
        "bits": {
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                "baseaddr": "0x00420A00",
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        },
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            "TIEOFF_X22Y16": "TIEOFF"
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    },
    "INT_L_X20Y17": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X22Y17": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X20Y18": {
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                "words": 2
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        "clock_region": "X0Y0",
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            "TIEOFF_X22Y18": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X20Y20": {
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            "TIEOFF_X22Y22": "TIEOFF"
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    "INT_L_X20Y169": {
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            "TIEOFF_X22Y169": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00020A00",
                "frames": 28,
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            "TIEOFF_X22Y170": "TIEOFF"
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                "baseaddr": "0x00020A00",
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            "TIEOFF_X22Y171": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X22Y172": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X20Y173": {
        "bits": {
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            "TIEOFF_X22Y173": "TIEOFF"
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            "TIEOFF_X22Y174": "TIEOFF"
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            "TIEOFF_X24Y3": "TIEOFF"
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            "TIEOFF_X24Y4": "TIEOFF"
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                "baseaddr": "0x00420B00",
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            "TIEOFF_X24Y5": "TIEOFF"
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                "words": 2
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            "TIEOFF_X24Y6": "TIEOFF"
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                "baseaddr": "0x00420B00",
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                "words": 2
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            "TIEOFF_X24Y7": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00420B00",
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            "TIEOFF_X24Y8": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00420B00",
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                "words": 2
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            "TIEOFF_X24Y9": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B00",
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                "words": 2
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            "TIEOFF_X24Y10": "TIEOFF"
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        "type": "INT_L"
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            "CLB_IO_CLK": {
                "baseaddr": "0x00420B00",
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                "words": 2
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            "TIEOFF_X24Y11": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B00",
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                "offset": 24,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X24Y12": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B00",
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                "offset": 26,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X24Y13": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B00",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X24Y14": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B00",
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                "offset": 30,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y15": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B00",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y16": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B00",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X22Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420B00",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "grid_y": 189,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X24Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
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                "offset": 38,
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            "TIEOFF_X24Y19": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420B00",
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        "bits": {
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                "baseaddr": "0x00420B00",
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                "baseaddr": "0x00420B00",
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                "baseaddr": "0x00420B00",
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            "TIEOFF_X24Y23": "TIEOFF"
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            "TIEOFF_X24Y165": "TIEOFF"
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    "INT_L_X22Y166": {
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            "TIEOFF_X24Y166": "TIEOFF"
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    "INT_L_X22Y167": {
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            "TIEOFF_X24Y167": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X22Y168": {
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            "TIEOFF_X24Y168": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00020B00",
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            "TIEOFF_X24Y170": "TIEOFF"
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            "TIEOFF_X24Y171": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X24Y173": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X26Y8": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X26Y9": "TIEOFF"
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        "type": "INT_L"
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                "words": 2
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                "words": 2
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        "type": "INT_L"
    },
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        "clock_region": "X0Y0",
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            "TIEOFF_X26Y12": "TIEOFF"
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    },
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                "baseaddr": "0x00420C00",
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                "words": 2
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        },
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        "type": "INT_L"
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            "TIEOFF_X26Y14": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y15": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X26Y15": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C00",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y16": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C00",
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                "baseaddr": "0x00420C00",
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            "TIEOFF_X26Y66": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
                "frames": 28,
                "offset": 34,
                "words": 2
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            "TIEOFF_X26Y67": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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            "TIEOFF_X26Y68": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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            "TIEOFF_X26Y69": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400C00",
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            "TIEOFF_X26Y70": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C00",
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            "TIEOFF_X26Y71": "TIEOFF"
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        "bits": {
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        "bits": {
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        "bits": {
            "CLB_IO_CLK": {
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    "INT_L_X24Y102": {
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            "TIEOFF_X26Y103": "TIEOFF"
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    "INT_L_X24Y105": {
        "bits": {
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    "INT_L_X24Y106": {
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        "bits": {
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    "INT_L_X24Y108": {
        "bits": {
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    "INT_L_X24Y109": {
        "bits": {
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        "bits": {
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    "INT_L_X24Y112": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X24Y113": {
        "bits": {
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            "TIEOFF_X26Y113": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X24Y114": {
        "bits": {
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            "TIEOFF_X26Y114": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X24Y115": {
        "bits": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y115": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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        "type": "INT_L"
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    "INT_L_X24Y165": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X26Y165": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y166": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
                "frames": 28,
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X26Y166": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y167": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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                "words": 2
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            "TIEOFF_X26Y167": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y168": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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                "words": 2
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            "TIEOFF_X26Y168": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X24Y169": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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            "TIEOFF_X26Y169": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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            "TIEOFF_X26Y170": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X24Y171": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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            "TIEOFF_X26Y171": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X24Y172": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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            "TIEOFF_X26Y172": "TIEOFF"
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    "INT_L_X24Y173": {
        "bits": {
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            "TIEOFF_X26Y173": "TIEOFF"
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    },
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            "CLB_IO_CLK": {
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            "TIEOFF_X26Y174": "TIEOFF"
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    "INT_L_X24Y175": {
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            "CLB_IO_CLK": {
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            "TIEOFF_X26Y175": "TIEOFF"
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    "INT_L_X24Y176": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X26Y176": "TIEOFF"
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    "INT_L_X24Y177": {
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            "CLB_IO_CLK": {
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            "TIEOFF_X26Y177": "TIEOFF"
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    "INT_L_X24Y178": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X26Y178": "TIEOFF"
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    "INT_L_X24Y181": {
        "bits": {
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            "TIEOFF_X26Y181": "TIEOFF"
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    "INT_L_X24Y182": {
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            "TIEOFF_X26Y182": "TIEOFF"
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            "TIEOFF_X26Y183": "TIEOFF"
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        "bits": {
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            "TIEOFF_X26Y184": "TIEOFF"
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    "INT_L_X24Y185": {
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            "TIEOFF_X26Y185": "TIEOFF"
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    "INT_L_X24Y186": {
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            "TIEOFF_X26Y186": "TIEOFF"
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    "INT_L_X24Y187": {
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    "INT_L_X24Y188": {
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            "TIEOFF_X26Y188": "TIEOFF"
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    "INT_L_X24Y189": {
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    "INT_L_X24Y193": {
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    "INT_L_X24Y194": {
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    "INT_L_X24Y195": {
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            "TIEOFF_X26Y195": "TIEOFF"
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    "INT_L_X24Y196": {
        "bits": {
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            "TIEOFF_X26Y196": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y197": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
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                "offset": 95,
                "words": 2
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            "TIEOFF_X26Y197": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y198": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
                "frames": 28,
                "offset": 97,
                "words": 2
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        "sites": {
            "TIEOFF_X26Y198": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y199": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020C00",
                "frames": 28,
                "offset": 99,
                "words": 2
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        "sites": {
            "TIEOFF_X26Y199": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D00",
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                "offset": 0,
                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X28Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D00",
                "frames": 28,
                "offset": 2,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X28Y1": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D00",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X28Y2": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D00",
                "frames": 28,
                "offset": 6,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y3": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D00",
                "frames": 28,
                "offset": 8,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X28Y4": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D00",
                "frames": 28,
                "offset": 10,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y5": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D00",
                "frames": 28,
                "offset": 12,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 201,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y6": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D00",
                "frames": 28,
                "offset": 14,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 70,
        "grid_y": 200,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y7": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D00",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 199,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y8": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D00",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 70,
        "grid_y": 198,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y9": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D00",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y10": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D00",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 70,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D00",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 70,
        "grid_y": 195,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D00",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 70,
        "grid_y": 194,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X28Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420D00",
                "frames": 28,
                "offset": 28,
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                "baseaddr": "0x00400D00",
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    "INT_L_X26Y108": {
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    "INT_L_X26Y109": {
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        "bits": {
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        "sites": {
            "TIEOFF_X28Y112": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020D00",
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                "baseaddr": "0x00020D00",
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            "TIEOFF_X28Y164": "TIEOFF"
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            "TIEOFF_X28Y165": "TIEOFF"
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            "TIEOFF_X28Y166": "TIEOFF"
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            "TIEOFF_X28Y167": "TIEOFF"
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    "INT_L_X26Y198": {
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    "INT_L_X28Y8": {
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        "type": "INT_L"
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                "baseaddr": "0x00420E00",
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        "type": "INT_L"
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                "words": 2
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
                "frames": 28,
                "offset": 24,
                "words": 2
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            "TIEOFF_X30Y12": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420E00",
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E00",
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                "baseaddr": "0x00420E00",
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        "bits": {
            "CLB_IO_CLK": {
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        "pin_functions": {},
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            "TIEOFF_X30Y60": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y61": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y62": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X30Y62": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 26,
                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y63": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y64": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
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        "pin_functions": {},
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            "TIEOFF_X30Y64": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y65": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X30Y66": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y67": "TIEOFF"
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    },
    "INT_L_X28Y68": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y68": "TIEOFF"
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    "INT_L_X28Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y69": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y70": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y71": "TIEOFF"
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    "INT_L_X28Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y72": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y73": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y74": "TIEOFF"
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    },
    "INT_L_X28Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y75": "TIEOFF"
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    "INT_L_X28Y76": {
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y76": "TIEOFF"
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    "INT_L_X28Y77": {
        "bits": {
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y77": "TIEOFF"
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    "INT_L_X28Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y78": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y79": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y80": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y81": "TIEOFF"
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    "INT_L_X28Y82": {
        "bits": {
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y82": "TIEOFF"
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        "bits": {
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            "TIEOFF_X30Y83": "TIEOFF"
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        "bits": {
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                "words": 2
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            "TIEOFF_X30Y84": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y85": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400E00",
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        "pin_functions": {},
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            "TIEOFF_X30Y86": "TIEOFF"
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    "INT_L_X28Y87": {
        "bits": {
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y87": "TIEOFF"
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    "INT_L_X28Y88": {
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y88": "TIEOFF"
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    "INT_L_X28Y89": {
        "bits": {
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                "baseaddr": "0x00400E00",
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                "words": 2
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            "TIEOFF_X30Y89": "TIEOFF"
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    "INT_L_X28Y90": {
        "bits": {
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y90": "TIEOFF"
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    },
    "INT_L_X28Y91": {
        "bits": {
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                "baseaddr": "0x00400E00",
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            "TIEOFF_X30Y91": "TIEOFF"
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    },
    "INT_L_X28Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
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        "pin_functions": {},
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            "TIEOFF_X30Y92": "TIEOFF"
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    },
    "INT_L_X28Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 87,
                "words": 2
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X30Y93": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 89,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X30Y94": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 91,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X30Y95": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X30Y96": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X30Y97": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X30Y98": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E00",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 51,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y125": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y126": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y126": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y127": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 59,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y129": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y130": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y131": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y132": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y132": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 67,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y133": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y134": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 74,
        "grid_y": 68,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y134": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00000E00",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X30Y135": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y136": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "words": 2
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            "TIEOFF_X30Y136": "TIEOFF"
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    "INT_L_X28Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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                "words": 2
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            "TIEOFF_X30Y137": "TIEOFF"
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    },
    "INT_L_X28Y138": {
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            "CLB_IO_CLK": {
                "baseaddr": "0x00000E00",
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        },
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            "TIEOFF_X30Y138": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00000E00",
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        },
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            "TIEOFF_X30Y139": "TIEOFF"
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    "INT_L_X28Y140": {
        "bits": {
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                "baseaddr": "0x00000E00",
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            "TIEOFF_X30Y140": "TIEOFF"
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        "bits": {
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    "INT_L_X28Y167": {
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        "pin_functions": {},
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            "TIEOFF_X30Y168": "TIEOFF"
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    "INT_L_X28Y169": {
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            "TIEOFF_X30Y169": "TIEOFF"
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    "INT_L_X28Y170": {
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            "TIEOFF_X30Y170": "TIEOFF"
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    "INT_L_X28Y172": {
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    "INT_L_X28Y173": {
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    "INT_L_X28Y178": {
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    "INT_L_X28Y179": {
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    "INT_L_X28Y180": {
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    "INT_L_X28Y181": {
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    "INT_L_X28Y182": {
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    "INT_L_X28Y183": {
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    "INT_L_X28Y184": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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        "sites": {
            "TIEOFF_X30Y184": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
                "frames": 28,
                "offset": 71,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X30Y185": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y186": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
                "frames": 28,
                "offset": 73,
                "words": 2
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            "TIEOFF_X30Y186": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y187": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
                "frames": 28,
                "offset": 75,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X30Y187": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y188": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
                "frames": 28,
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        "pin_functions": {},
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            "TIEOFF_X30Y188": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y189": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
                "frames": 28,
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            "TIEOFF_X30Y189": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y190": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y190": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y191": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y191": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y192": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y192": "TIEOFF"
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    "INT_L_X28Y193": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y193": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y194": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y194": "TIEOFF"
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    "INT_L_X28Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y195": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y196": "TIEOFF"
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    "INT_L_X28Y197": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y197": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y198": "TIEOFF"
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    "INT_L_X28Y199": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E00",
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            "TIEOFF_X30Y199": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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                "baseaddr": "0x00420F00",
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            "TIEOFF_X32Y1": "TIEOFF"
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            "TIEOFF_X32Y2": "TIEOFF"
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            "TIEOFF_X32Y4": "TIEOFF"
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            "TIEOFF_X32Y6": "TIEOFF"
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            "TIEOFF_X32Y13": "TIEOFF"
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            "TIEOFF_X32Y14": "TIEOFF"
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        "bits": {
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            "TIEOFF_X32Y15": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00420F00",
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        "pin_functions": {},
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            "TIEOFF_X32Y16": "TIEOFF"
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    },
    "INT_L_X30Y17": {
        "bits": {
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                "baseaddr": "0x00420F00",
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                "offset": 34,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X32Y17": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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                "offset": 36,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X32Y18": "TIEOFF"
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    },
    "INT_L_X30Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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                "offset": 38,
                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X32Y19": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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                "offset": 40,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X32Y20": "TIEOFF"
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    },
    "INT_L_X30Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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                "offset": 42,
                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X32Y21": "TIEOFF"
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    },
    "INT_L_X30Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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                "offset": 44,
                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X32Y22": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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                "offset": 46,
                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X32Y23": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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                "offset": 48,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X32Y24": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X30Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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                "offset": 51,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X32Y25": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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                "offset": 53,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X32Y26": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X32Y27": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 57,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X32Y28": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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                "offset": 59,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y29": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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                "offset": 61,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y30": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y31": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
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                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X32Y32": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F00",
                "frames": 28,
                "offset": 67,
                "words": 2
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        "bits": {
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                "baseaddr": "0x00420F00",
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        "sites": {
            "TIEOFF_X32Y181": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y182": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X32Y182": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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            "TIEOFF_X32Y183": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X30Y184": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F00",
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            "TIEOFF_X32Y184": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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            "TIEOFF_X32Y185": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X30Y186": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X32Y186": "TIEOFF"
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        "bits": {
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            "TIEOFF_X32Y187": "TIEOFF"
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        "bits": {
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            "TIEOFF_X32Y188": "TIEOFF"
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        "bits": {
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        "bits": {
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                "baseaddr": "0x00421000",
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                "words": 2
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            "TIEOFF_X34Y16": "TIEOFF"
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    "INT_L_X32Y17": {
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                "words": 2
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            "TIEOFF_X34Y17": "TIEOFF"
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                "words": 2
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            "TIEOFF_X34Y18": "TIEOFF"
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                "words": 2
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            "TIEOFF_X34Y19": "TIEOFF"
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    "INT_L_X32Y20": {
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    "INT_L_X32Y21": {
        "bits": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X34Y21": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y22": {
        "bits": {
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                "words": 2
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            "TIEOFF_X34Y22": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y23": {
        "bits": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X34Y23": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y24": {
        "bits": {
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                "baseaddr": "0x00421000",
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                "offset": 48,
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    "INT_L_X32Y25": {
        "bits": {
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                "baseaddr": "0x00421000",
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            "TIEOFF_X34Y25": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y26": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X34Y26": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y27": {
        "bits": {
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                "offset": 55,
                "words": 2
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        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y27": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y28": {
        "bits": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X34Y28": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421000",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y29": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y30": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X34Y30": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421000",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X34Y31": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421000",
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                "offset": 65,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X34Y32": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421000",
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                "words": 2
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        },
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            "TIEOFF_X34Y33": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y34": {
        "bits": {
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                "baseaddr": "0x00421000",
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        },
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            "TIEOFF_X34Y34": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00421000",
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            "TIEOFF_X34Y35": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00421000",
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            "TIEOFF_X34Y36": "TIEOFF"
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        "bits": {
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            "TIEOFF_X34Y63": "TIEOFF"
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            "TIEOFF_X34Y64": "TIEOFF"
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            "TIEOFF_X34Y65": "TIEOFF"
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    "INT_L_X32Y66": {
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                "words": 2
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        },
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            "TIEOFF_X34Y66": "TIEOFF"
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    "INT_L_X32Y67": {
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            "TIEOFF_X34Y67": "TIEOFF"
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    "INT_L_X32Y68": {
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            "TIEOFF_X34Y68": "TIEOFF"
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    "INT_L_X32Y69": {
        "bits": {
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        },
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            "TIEOFF_X34Y69": "TIEOFF"
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                "baseaddr": "0x00401000",
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            "TIEOFF_X34Y70": "TIEOFF"
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    "INT_L_X32Y71": {
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                "baseaddr": "0x00401000",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X34Y71": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y72": {
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                "baseaddr": "0x00401000",
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X34Y72": "TIEOFF"
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    "INT_L_X32Y73": {
        "bits": {
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                "words": 2
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X34Y73": "TIEOFF"
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    "INT_L_X32Y74": {
        "bits": {
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                "baseaddr": "0x00401000",
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                "words": 2
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X34Y74": "TIEOFF"
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    "INT_L_X32Y75": {
        "bits": {
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                "baseaddr": "0x00401000",
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y75": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y76": {
        "bits": {
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                "baseaddr": "0x00401000",
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X34Y76": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y77": {
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                "baseaddr": "0x00401000",
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X34Y77": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y78": {
        "bits": {
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        "pin_functions": {},
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            "TIEOFF_X34Y78": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y79": {
        "bits": {
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                "baseaddr": "0x00401000",
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X34Y79": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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        "sites": {
            "TIEOFF_X34Y80": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y81": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "words": 2
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            "TIEOFF_X34Y82": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "offset": 67,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y83": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401000",
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                "words": 2
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        },
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            "TIEOFF_X34Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y85": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X34Y85": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y86": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X34Y86": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y87": {
        "bits": {
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            "TIEOFF_X34Y87": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y88": {
        "bits": {
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            "TIEOFF_X34Y88": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X34Y89": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X34Y90": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401000",
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            "TIEOFF_X34Y91": "TIEOFF"
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        "bits": {
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            "TIEOFF_X34Y93": "TIEOFF"
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            "TIEOFF_X34Y94": "TIEOFF"
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            "TIEOFF_X34Y95": "TIEOFF"
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        "bits": {
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        "bits": {
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        "bits": {
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    "INT_L_X32Y113": {
        "bits": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X34Y113": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y114": {
        "bits": {
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            "TIEOFF_X34Y114": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y115": {
        "bits": {
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                "words": 2
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            "TIEOFF_X34Y115": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y116": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X34Y116": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y117": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X34Y117": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y118": {
        "bits": {
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                "words": 2
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            "TIEOFF_X34Y118": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y119": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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            "TIEOFF_X34Y119": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y120": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 40,
                "words": 2
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            "TIEOFF_X34Y120": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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                "words": 2
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y121": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X32Y122": {
        "bits": {
            "CLB_IO_CLK": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y122": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y123": {
        "bits": {
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        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y123": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y124": {
        "bits": {
            "CLB_IO_CLK": {
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        "pin_functions": {},
        "sites": {
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        "type": "INT_L"
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    "INT_L_X32Y125": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y125": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y126": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y126": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y127": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y127": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y128": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
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                "offset": 57,
                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y128": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y129": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
        "grid_x": 84,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y129": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y130": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001000",
                "frames": 28,
                "offset": 61,
                "words": 2
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        "type": "INT_L"
    },
    "INT_L_X32Y131": {
        "bits": {
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                "baseaddr": "0x00001000",
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            "TIEOFF_X34Y131": "TIEOFF"
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    },
    "INT_L_X32Y132": {
        "bits": {
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            "TIEOFF_X34Y132": "TIEOFF"
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        "bits": {
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            "TIEOFF_X34Y133": "TIEOFF"
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    },
    "INT_L_X32Y134": {
        "bits": {
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        "bits": {
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    "INT_L_X32Y165": {
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            "TIEOFF_X34Y165": "TIEOFF"
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    "INT_L_X32Y166": {
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            "TIEOFF_X34Y166": "TIEOFF"
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    "INT_L_X32Y167": {
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            "TIEOFF_X34Y167": "TIEOFF"
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    "INT_L_X32Y168": {
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            "TIEOFF_X34Y168": "TIEOFF"
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    "INT_L_X32Y177": {
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    "INT_L_X32Y179": {
        "bits": {
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                "words": 2
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        "sites": {
            "TIEOFF_X34Y179": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y180": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X34Y180": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y181": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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                "offset": 63,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X34Y181": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y182": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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                "offset": 65,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X34Y182": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X32Y183": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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        },
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        "sites": {
            "TIEOFF_X34Y183": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X32Y184": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021000",
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                "words": 2
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        },
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            "TIEOFF_X34Y184": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00021000",
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            "TIEOFF_X34Y185": "TIEOFF"
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    },
    "INT_L_X32Y186": {
        "bits": {
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            "TIEOFF_X34Y186": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00021000",
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            "TIEOFF_X34Y187": "TIEOFF"
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    },
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        "bits": {
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            "TIEOFF_X34Y188": "TIEOFF"
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        "bits": {
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            "TIEOFF_X34Y189": "TIEOFF"
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        "bits": {
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            "TIEOFF_X37Y5": "TIEOFF"
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                "baseaddr": "0x00421100",
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            "TIEOFF_X37Y12": "TIEOFF"
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                "baseaddr": "0x00421100",
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            "TIEOFF_X37Y13": "TIEOFF"
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                "baseaddr": "0x00421100",
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        },
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            "TIEOFF_X37Y14": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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                "offset": 30,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X37Y15": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X37Y16": "TIEOFF"
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    },
    "INT_L_X34Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X37Y17": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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                "words": 2
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        },
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            "TIEOFF_X37Y18": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00421100",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X37Y19": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00421100",
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X37Y20": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00421100",
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X37Y21": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X34Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y22": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y23": {
        "bits": {
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                "baseaddr": "0x00421100",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X37Y23": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X37Y24": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y25": {
        "bits": {
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                "baseaddr": "0x00421100",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y25": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X34Y26": {
        "bits": {
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                "baseaddr": "0x00421100",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y26": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y27": {
        "bits": {
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                "baseaddr": "0x00421100",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y27": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X34Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421100",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X37Y28": "TIEOFF"
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        "type": "INT_L"
    },
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    },
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        "bits": {
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                "baseaddr": "0x00401100",
                "frames": 28,
                "offset": 59,
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        "type": "INT_L"
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    "INT_L_X34Y128": {
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        "bits": {
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                "baseaddr": "0x00021100",
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                "offset": 57,
                "words": 2
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            "TIEOFF_X37Y178": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00021100",
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        "type": "INT_L"
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    "INT_L_X34Y181": {
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        "type": "INT_L"
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                "offset": 55,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X39Y77": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X36Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X39Y78": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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                "words": 2
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        },
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            "TIEOFF_X39Y79": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00401200",
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            "TIEOFF_X39Y80": "TIEOFF"
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    },
    "INT_L_X36Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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                "words": 2
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            "TIEOFF_X39Y81": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X36Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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            "TIEOFF_X39Y82": "TIEOFF"
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            "TIEOFF_X39Y83": "TIEOFF"
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            "TIEOFF_X39Y86": "TIEOFF"
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        "bits": {
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        "bits": {
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    "INT_L_X36Y118": {
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    "INT_L_X36Y119": {
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    "INT_L_X36Y121": {
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        "type": "INT_L"
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    "INT_L_X36Y124": {
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    "INT_L_X36Y125": {
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        "type": "INT_L"
    },
    "INT_L_X36Y126": {
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        "bits": {
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                "baseaddr": "0x00001200",
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021200",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
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        "type": "INT_L"
    },
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        "bits": {
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                "baseaddr": "0x00021200",
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            "TIEOFF_X39Y178": "TIEOFF"
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        "type": "INT_L"
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            "CLB_IO_CLK": {
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            "TIEOFF_X39Y179": "TIEOFF"
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        "bits": {
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        "type": "INT_L"
    },
    "INT_L_X38Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y26": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
                "offset": 55,
                "words": 2
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        },
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            "TIEOFF_X41Y27": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X38Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X41Y28": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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                "words": 2
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            "TIEOFF_X41Y29": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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            "TIEOFF_X41Y30": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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            "TIEOFF_X41Y31": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421300",
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            "TIEOFF_X41Y32": "TIEOFF"
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    "INT_L_X38Y59": {
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            "TIEOFF_X41Y59": "TIEOFF"
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                "words": 2
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            "TIEOFF_X41Y65": "TIEOFF"
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        "bits": {
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        "pin_functions": {},
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            "TIEOFF_X41Y66": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X38Y67": {
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                "baseaddr": "0x00401300",
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        "pin_functions": {},
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            "TIEOFF_X41Y67": "TIEOFF"
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    "INT_L_X38Y68": {
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            "TIEOFF_X41Y68": "TIEOFF"
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        "bits": {
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                "words": 2
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            "TIEOFF_X41Y69": "TIEOFF"
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        "type": "INT_L"
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        "pin_functions": {},
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            "TIEOFF_X41Y71": "TIEOFF"
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    "INT_L_X38Y72": {
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X41Y72": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X38Y73": {
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X41Y73": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y74": {
        "bits": {
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X41Y74": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X38Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 51,
                "words": 2
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            "TIEOFF_X41Y75": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401300",
                "frames": 28,
                "offset": 53,
                "words": 2
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        },
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            "TIEOFF_X41Y76": "TIEOFF"
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        "type": "INT_L"
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                "baseaddr": "0x00401300",
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            "TIEOFF_X41Y77": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401300",
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            "TIEOFF_X41Y78": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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            "TIEOFF_X41Y79": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X41Y80": "TIEOFF"
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        "bits": {
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            "TIEOFF_X41Y81": "TIEOFF"
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    "INT_L_X40Y24": {
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        "pin_functions": {},
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            "TIEOFF_X43Y24": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X43Y25": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y26": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
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            "TIEOFF_X43Y27": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y28": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00421400",
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            "TIEOFF_X43Y29": "TIEOFF"
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        "bits": {
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    "INT_L_X40Y72": {
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        "pin_functions": {},
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    "INT_L_X40Y73": {
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        "pin_functions": {},
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            "TIEOFF_X43Y73": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X40Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 104,
        "grid_y": 131,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y74": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 104,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y75": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 104,
        "grid_y": 128,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y76": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 104,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y77": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 126,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y78": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y79": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y80": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y81": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y82": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 67,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y83": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y84": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 71,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y85": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 73,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X43Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 75,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y87": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 77,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 79,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y89": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 81,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y90": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 83,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y91": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 85,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y92": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 87,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y93": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y94": {
        "bits": {
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                "baseaddr": "0x00401400",
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                "offset": 89,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "grid_y": 110,
        "pin_functions": {},
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            "TIEOFF_X43Y94": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
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                "offset": 91,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y95": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y97": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X40Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y98": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X40Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401400",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X43Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y0": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 2,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y1": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 4,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y2": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 6,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y3": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 8,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y4": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 10,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y5": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 12,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 201,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y6": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 14,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 200,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y7": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 199,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y8": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 18,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 198,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y9": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y10": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 196,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y11": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 195,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y12": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "grid_y": 194,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y13": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 193,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y14": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y15": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 191,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y16": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 190,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y17": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 189,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y18": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 188,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y19": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 187,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y20": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 186,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y21": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 111,
        "grid_y": 185,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y22": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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            "TIEOFF_X45Y23": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
                "frames": 28,
                "offset": 48,
                "words": 2
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        },
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            "TIEOFF_X45Y24": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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        },
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            "TIEOFF_X45Y25": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00421500",
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        },
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            "TIEOFF_X45Y26": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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            "TIEOFF_X45Y27": "TIEOFF"
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    "INT_L_X42Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421500",
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            "TIEOFF_X45Y28": "TIEOFF"
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                "baseaddr": "0x00421500",
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    "INT_L_X42Y72": {
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        "pin_functions": {},
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        "type": "INT_L"
    },
    "INT_L_X42Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 132,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y73": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y74": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 129,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y75": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 128,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y76": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y77": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y78": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 59,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y79": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y80": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y81": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X45Y82": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 67,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X45Y83": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X45Y84": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 71,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X45Y85": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 73,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X45Y86": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 75,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X45Y87": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 77,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 79,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "sites": {
            "TIEOFF_X45Y89": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 81,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X45Y90": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 83,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X45Y91": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y92": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 85,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X45Y92": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 87,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X45Y93": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y94": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
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                "offset": 89,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X45Y94": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 91,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X45Y95": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y96": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X42Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 95,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y97": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y98": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y98": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X42Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X45Y99": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_R_X1Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 0,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 5,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y0": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 2,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y1": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 4,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y2": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 6,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y3": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 8,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y4": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 10,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 5,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y5": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 12,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 5,
        "grid_y": 201,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y6": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 14,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 5,
        "grid_y": 200,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y7": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 16,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 5,
        "grid_y": 199,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y8": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 18,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 5,
        "grid_y": 198,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y9": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 20,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 5,
        "grid_y": 197,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y10": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 22,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 5,
        "grid_y": 196,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y11": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 24,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 5,
        "grid_y": 195,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y12": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 5,
        "grid_y": 194,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y13": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 28,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 5,
        "grid_y": 193,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y14": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 5,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y15": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 5,
        "grid_y": 191,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y16": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 5,
        "grid_y": 190,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y17": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 5,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y18": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 38,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 5,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y19": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 40,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 5,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y20": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 42,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 5,
        "grid_y": 186,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y21": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420080",
                "frames": 28,
                "offset": 44,
                "words": 2
            }
        },
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                "baseaddr": "0x00420080",
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    "INT_R_X1Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
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                "offset": 44,
                "words": 2
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        },
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            "TIEOFF_X1Y72": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X1Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X1Y73": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y74": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X1Y75": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400080",
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                "words": 2
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        },
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            "TIEOFF_X1Y76": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y77": {
        "bits": {
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                "baseaddr": "0x00400080",
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        },
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            "TIEOFF_X1Y77": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y78": {
        "bits": {
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        },
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            "TIEOFF_X1Y78": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y79": {
        "bits": {
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                "baseaddr": "0x00400080",
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        },
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            "TIEOFF_X1Y79": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y80": {
        "bits": {
            "CLB_IO_CLK": {
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        },
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            "TIEOFF_X1Y80": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y81": {
        "bits": {
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                "baseaddr": "0x00400080",
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        },
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            "TIEOFF_X1Y81": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y82": {
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        },
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        "type": "INT_R"
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    "INT_R_X1Y83": {
        "bits": {
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        },
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    "INT_R_X1Y84": {
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        },
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    "INT_R_X1Y85": {
        "bits": {
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        },
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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    "INT_R_X1Y88": {
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        "type": "INT_R"
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    "INT_R_X1Y89": {
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        },
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        "type": "INT_R"
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        "bits": {
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        "type": "INT_R"
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    "INT_R_X1Y91": {
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        },
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        "type": "INT_R"
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    "INT_R_X1Y92": {
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        "type": "INT_R"
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    "INT_R_X1Y93": {
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        "type": "INT_R"
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    "INT_R_X1Y95": {
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    "INT_R_X1Y97": {
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        "type": "INT_R"
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    "INT_R_X1Y98": {
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        "type": "INT_R"
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    "INT_R_X1Y99": {
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        "type": "INT_R"
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    "INT_R_X1Y100": {
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        "type": "INT_R"
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    "INT_R_X1Y101": {
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        "type": "INT_R"
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    "INT_R_X1Y102": {
        "bits": {
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    "INT_R_X1Y103": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X1Y104": {
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        "type": "INT_R"
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    "INT_R_X1Y105": {
        "bits": {
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        },
        "clock_region": "X0Y2",
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        "type": "INT_R"
    },
    "INT_R_X1Y106": {
        "bits": {
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        },
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            "TIEOFF_X1Y106": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y107": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X1Y107": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y108": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X1Y108": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y109": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X1Y109": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y110": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
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            "TIEOFF_X1Y110": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y111": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X1Y111": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y112": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X1Y112": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y113": {
        "bits": {
            "CLB_IO_CLK": {
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        },
        "clock_region": "X0Y2",
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        "sites": {
            "TIEOFF_X1Y113": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y114": {
        "bits": {
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        },
        "clock_region": "X0Y2",
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        "sites": {
            "TIEOFF_X1Y114": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y115": {
        "bits": {
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        },
        "clock_region": "X0Y2",
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        "sites": {
            "TIEOFF_X1Y115": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y116": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "sites": {
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        "type": "INT_R"
    },
    "INT_R_X1Y117": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y117": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y118": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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        "type": "INT_R"
    },
    "INT_R_X1Y119": {
        "bits": {
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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            "TIEOFF_X1Y119": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y120": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X1Y120": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000080",
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                "words": 2
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        },
        "clock_region": "X0Y2",
        "grid_x": 5,
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            "TIEOFF_X1Y171": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X1Y172": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020080",
                "frames": 28,
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                "words": 2
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            "TIEOFF_X1Y172": "TIEOFF"
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    "INT_R_X1Y173": {
        "bits": {
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            "TIEOFF_X1Y173": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y174": {
        "bits": {
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                "baseaddr": "0x00020080",
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        },
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            "TIEOFF_X1Y174": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y175": {
        "bits": {
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                "baseaddr": "0x00020080",
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            "TIEOFF_X1Y175": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X1Y176": {
        "bits": {
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        },
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            "TIEOFF_X1Y176": "TIEOFF"
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    "INT_R_X1Y177": {
        "bits": {
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            "TIEOFF_X1Y177": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X3Y7": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X3Y7": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y8": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X3Y8": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y9": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X3Y9": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y10": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
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        "type": "INT_R"
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                "words": 2
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X3Y12": {
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X3Y12": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "sites": {
            "TIEOFF_X3Y13": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y14": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X3Y14": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y15": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X3Y15": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y16": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y16": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y17": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y17": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y18": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y18": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y19": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y19": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y20": {
        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y20": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00420180",
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X3Y23": {
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    "INT_R_X3Y25": {
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    "INT_R_X3Y67": {
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        "type": "INT_R"
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            "TIEOFF_X3Y70": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400180",
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                "words": 2
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        },
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            "TIEOFF_X3Y71": "TIEOFF"
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    "INT_R_X3Y72": {
        "bits": {
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                "baseaddr": "0x00400180",
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            "TIEOFF_X3Y72": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y73": {
        "bits": {
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        },
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            "TIEOFF_X3Y73": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y74": {
        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X3Y74": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y75": {
        "bits": {
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            "TIEOFF_X3Y75": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y76": {
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            "TIEOFF_X3Y76": "TIEOFF"
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    "INT_R_X3Y77": {
        "bits": {
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            "TIEOFF_X3Y77": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00400180",
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        },
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        "type": "INT_R"
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    "INT_R_X3Y102": {
        "bits": {
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        "type": "INT_R"
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        "bits": {
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        "type": "INT_R"
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    "INT_R_X3Y104": {
        "bits": {
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    "INT_R_X3Y105": {
        "bits": {
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                "words": 2
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        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X3Y106": {
        "bits": {
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        },
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        "type": "INT_R"
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    "INT_R_X3Y107": {
        "bits": {
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                "words": 2
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        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X3Y108": {
        "bits": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X3Y109": {
        "bits": {
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        },
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        "type": "INT_R"
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    "INT_R_X3Y110": {
        "bits": {
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X3Y110": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y111": {
        "bits": {
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                "words": 2
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        },
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        "type": "INT_R"
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    "INT_R_X3Y112": {
        "bits": {
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        "sites": {
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        "type": "INT_R"
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    "INT_R_X3Y113": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "sites": {
            "TIEOFF_X3Y113": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y114": {
        "bits": {
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        "clock_region": "X0Y2",
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        "sites": {
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        "type": "INT_R"
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    "INT_R_X3Y115": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "sites": {
            "TIEOFF_X3Y115": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y116": {
        "bits": {
            "CLB_IO_CLK": {
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y116": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y117": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
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        "type": "INT_R"
    },
    "INT_R_X3Y118": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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            "TIEOFF_X3Y118": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y119": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X3Y119": "TIEOFF"
        },
        "type": "INT_R"
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        "bits": {
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        "bits": {
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        "type": "INT_R"
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    "INT_R_X3Y124": {
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    "INT_R_X3Y154": {
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    "INT_R_X3Y155": {
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                "words": 2
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    "INT_R_X3Y160": {
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                "words": 2
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    "INT_R_X3Y161": {
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    "INT_R_X3Y162": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X3Y165": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X3Y166": {
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            "TIEOFF_X3Y166": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y167": {
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        "clock_region": "X0Y3",
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        "type": "INT_R"
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    "INT_R_X3Y168": {
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X3Y169": {
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            "TIEOFF_X3Y169": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X3Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
                "frames": 28,
                "offset": 40,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X3Y170": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y171": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "words": 2
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        },
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            "TIEOFF_X3Y171": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y172": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "words": 2
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        },
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            "TIEOFF_X3Y172": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y173": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y173": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y174": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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                "words": 2
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        },
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            "TIEOFF_X3Y174": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X3Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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            "TIEOFF_X3Y175": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y176": "TIEOFF"
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    "INT_R_X3Y177": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020180",
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        },
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            "TIEOFF_X3Y177": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00020180",
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        "bits": {
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        "bits": {
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            "TIEOFF_X3Y180": "TIEOFF"
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            "TIEOFF_X3Y181": "TIEOFF"
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        "bits": {
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        "type": "INT_R"
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            "TIEOFF_X3Y186": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y187": {
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            "TIEOFF_X3Y187": "TIEOFF"
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    "INT_R_X3Y188": {
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            "TIEOFF_X3Y188": "TIEOFF"
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    "INT_R_X3Y189": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X3Y191": {
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    "INT_R_X3Y195": {
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    "INT_R_X3Y196": {
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            "TIEOFF_X3Y196": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y197": {
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            "TIEOFF_X3Y197": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X3Y198": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X3Y199": {
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            "TIEOFF_X3Y199": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y0": {
        "bits": {
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X5Y0": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X5Y1": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y2": {
        "bits": {
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                "baseaddr": "0x00420280",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X5Y2": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y3": {
        "bits": {
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                "baseaddr": "0x00420280",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y3": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
                "frames": 28,
                "offset": 8,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y4": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
                "frames": 28,
                "offset": 10,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y5": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y6": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
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                "offset": 12,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y6": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
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                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "grid_y": 200,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y7": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
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                "offset": 16,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y8": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y9": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y10": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y11": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y12": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
                "frames": 28,
                "offset": 26,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y13": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y14": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y15": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y16": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
                "frames": 28,
                "offset": 34,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y17": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y18": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
                "frames": 28,
                "offset": 36,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 16,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X5Y18": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
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                "offset": 38,
                "words": 2
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        },
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            "TIEOFF_X5Y19": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
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                "offset": 40,
                "words": 2
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        },
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            "TIEOFF_X5Y20": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
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                "words": 2
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        },
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            "TIEOFF_X5Y21": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420280",
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        },
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            "TIEOFF_X5Y22": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y23": {
        "bits": {
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                "baseaddr": "0x00420280",
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        },
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            "TIEOFF_X5Y23": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y24": {
        "bits": {
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                "baseaddr": "0x00420280",
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        },
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            "TIEOFF_X5Y24": "TIEOFF"
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    "INT_R_X5Y25": {
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            "TIEOFF_X5Y25": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X5Y53": {
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        "type": "INT_R"
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    "INT_R_X5Y54": {
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    "INT_R_X5Y57": {
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    "INT_R_X5Y58": {
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    "INT_R_X5Y59": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X5Y64": {
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        "clock_region": "X0Y1",
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        "type": "INT_R"
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    "INT_R_X5Y66": {
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X5Y67": {
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        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X5Y68": {
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        },
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00400280",
                "frames": 28,
                "offset": 38,
                "words": 2
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        },
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        "type": "INT_R"
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        "bits": {
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            "TIEOFF_X5Y70": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y72": {
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            "TIEOFF_X5Y72": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y103": {
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        "type": "INT_R"
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    "INT_R_X5Y106": {
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    "INT_R_X5Y108": {
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        "type": "INT_R"
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    "INT_R_X5Y109": {
        "bits": {
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        "type": "INT_R"
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        "bits": {
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        "type": "INT_R"
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    "INT_R_X5Y113": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y2",
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        "sites": {
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        "type": "INT_R"
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    "INT_R_X5Y114": {
        "bits": {
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        "clock_region": "X0Y2",
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        "type": "INT_R"
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    "INT_R_X5Y115": {
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        "type": "INT_R"
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    "INT_R_X5Y116": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X5Y117": {
        "bits": {
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        },
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        "sites": {
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        "type": "INT_R"
    },
    "INT_R_X5Y118": {
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        "pin_functions": {},
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            "TIEOFF_X5Y167": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y168": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
                "frames": 28,
                "offset": 36,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X5Y168": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y169": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
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                "words": 2
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        },
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            "TIEOFF_X5Y169": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X5Y170": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
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                "words": 2
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        },
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            "TIEOFF_X5Y170": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y171": {
        "bits": {
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                "baseaddr": "0x00020280",
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                "words": 2
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        },
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            "TIEOFF_X5Y171": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X5Y172": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020280",
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        },
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            "TIEOFF_X5Y172": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y173": {
        "bits": {
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                "baseaddr": "0x00020280",
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        },
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            "TIEOFF_X5Y173": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y174": {
        "bits": {
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            "TIEOFF_X5Y174": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y175": {
        "bits": {
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        },
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            "TIEOFF_X5Y175": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y176": {
        "bits": {
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                "baseaddr": "0x00020280",
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            "TIEOFF_X5Y176": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00020280",
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            "TIEOFF_X5Y177": "TIEOFF"
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        "bits": {
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            "TIEOFF_X5Y181": "TIEOFF"
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    "INT_R_X5Y182": {
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        },
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        "type": "INT_R"
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    "INT_R_X5Y186": {
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            "TIEOFF_X5Y186": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y187": {
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        "type": "INT_R"
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    "INT_R_X5Y188": {
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        "type": "INT_R"
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    "INT_R_X5Y189": {
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        "type": "INT_R"
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    "INT_R_X5Y190": {
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    "INT_R_X5Y192": {
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            "TIEOFF_X5Y192": "TIEOFF"
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    "INT_R_X5Y193": {
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            "TIEOFF_X5Y193": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y194": {
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        "type": "INT_R"
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    "INT_R_X5Y195": {
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        "type": "INT_R"
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    "INT_R_X5Y196": {
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        },
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            "TIEOFF_X5Y196": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y197": {
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            "TIEOFF_X5Y197": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y198": {
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                "words": 2
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        },
        "clock_region": "X0Y3",
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            "TIEOFF_X5Y198": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X5Y199": {
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                "words": 2
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        },
        "clock_region": "X0Y3",
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            "TIEOFF_X5Y199": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X7Y0": {
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                "baseaddr": "0x00420380",
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X7Y0": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X7Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420380",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X7Y1": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X7Y2": {
        "bits": {
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                "baseaddr": "0x00420380",
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                "offset": 4,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X7Y2": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X7Y3": {
        "bits": {
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                "baseaddr": "0x00420380",
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                "offset": 6,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X7Y3": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X7Y4": {
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                "baseaddr": "0x00420380",
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                "offset": 8,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X7Y4": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X7Y5": {
        "bits": {
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                "baseaddr": "0x00420380",
                "frames": 28,
                "offset": 10,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X7Y5": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X7Y6": {
        "bits": {
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                "baseaddr": "0x00420380",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "grid_y": 201,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X7Y6": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X7Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420380",
                "frames": 28,
                "offset": 14,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "grid_y": 200,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X7Y7": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X7Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420380",
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                "offset": 16,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "grid_y": 199,
        "pin_functions": {},
        "sites": {
            "TIEOFF_X7Y8": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X7Y9": {
        "bits": {
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                "baseaddr": "0x00420380",
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                "offset": 18,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X7Y9": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X7Y10": {
        "bits": {
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                "baseaddr": "0x00420380",
                "frames": 28,
                "offset": 20,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X7Y10": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X7Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420380",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X7Y11": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X7Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420380",
                "frames": 28,
                "offset": 24,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 22,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X7Y12": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X7Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420380",
                "frames": 28,
                "offset": 26,
                "words": 2
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        },
        "clock_region": "X0Y0",
        "grid_x": 22,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X7Y13": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X7Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420380",
                "frames": 28,
                "offset": 28,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X7Y14": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X7Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420380",
                "frames": 28,
                "offset": 30,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 22,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X7Y15": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X7Y16": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420380",
                "frames": 28,
                "offset": 32,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 22,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X7Y16": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X7Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420380",
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    "INT_R_X9Y109": {
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        "type": "INT_R"
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X11Y13": {
        "bits": {
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y13": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00420580",
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                "words": 2
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    "INT_R_X11Y17": {
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            "TIEOFF_X12Y63": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400580",
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            "TIEOFF_X12Y65": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
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        "type": "INT_R"
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        "bits": {
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        "type": "INT_R"
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                "baseaddr": "0x00400580",
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            "TIEOFF_X12Y68": "TIEOFF"
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    "INT_R_X11Y98": {
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    "INT_R_X11Y99": {
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            "TIEOFF_X12Y99": "TIEOFF"
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    "INT_R_X11Y100": {
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        "type": "INT_R"
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    "INT_R_X11Y102": {
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        "type": "INT_R"
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    "INT_R_X11Y103": {
        "bits": {
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        "clock_region": "X0Y2",
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    "INT_R_X11Y105": {
        "bits": {
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    "INT_R_X11Y106": {
        "bits": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X11Y108": {
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        "type": "INT_R"
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    "INT_R_X11Y109": {
        "bits": {
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    "INT_R_X11Y110": {
        "bits": {
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    "INT_R_X11Y111": {
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        "type": "INT_R"
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    "INT_R_X11Y112": {
        "bits": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X12Y112": "TIEOFF"
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            "TIEOFF_X12Y162": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020580",
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        },
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            "TIEOFF_X12Y163": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y164": {
        "bits": {
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                "baseaddr": "0x00020580",
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        "type": "INT_R"
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    "INT_R_X11Y165": {
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            "TIEOFF_X12Y165": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y166": {
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                "baseaddr": "0x00020580",
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            "TIEOFF_X12Y166": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y167": {
        "bits": {
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                "baseaddr": "0x00020580",
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            "TIEOFF_X12Y167": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00020580",
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            "TIEOFF_X12Y168": "TIEOFF"
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    "INT_R_X11Y194": {
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    "INT_R_X11Y195": {
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        "type": "INT_R"
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            "TIEOFF_X12Y196": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y197": {
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        "type": "INT_R"
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    "INT_R_X11Y198": {
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                "words": 2
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        },
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            "TIEOFF_X12Y198": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X11Y199": {
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                "words": 2
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        },
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            "TIEOFF_X12Y199": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y0": {
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                "baseaddr": "0x00420680",
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                "words": 2
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        "clock_region": "X0Y0",
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            "TIEOFF_X14Y0": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y1": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X14Y1": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y2": {
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                "baseaddr": "0x00420680",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X14Y2": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y3": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X14Y3": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y4": {
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                "baseaddr": "0x00420680",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "type": "INT_R"
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    "INT_R_X13Y5": {
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                "baseaddr": "0x00420680",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X14Y5": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X14Y6": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y7": {
        "bits": {
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                "baseaddr": "0x00420680",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X14Y7": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y8": {
        "bits": {
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                "baseaddr": "0x00420680",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X14Y8": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y9": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y9": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y10": {
        "bits": {
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                "baseaddr": "0x00420680",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y10": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420680",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X14Y11": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y12": {
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        "type": "INT_R"
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                "baseaddr": "0x00420680",
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                "baseaddr": "0x00400680",
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    "INT_R_X13Y106": {
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    "INT_R_X13Y108": {
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    "INT_R_X13Y109": {
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    "INT_R_X13Y111": {
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            "TIEOFF_X14Y160": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y161": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020680",
                "frames": 28,
                "offset": 22,
                "words": 2
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        },
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            "TIEOFF_X14Y161": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X13Y162": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020680",
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                "words": 2
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        },
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            "TIEOFF_X14Y162": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y163": {
        "bits": {
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                "baseaddr": "0x00020680",
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        },
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        "pin_functions": {},
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            "TIEOFF_X14Y163": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y164": {
        "bits": {
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                "baseaddr": "0x00020680",
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        },
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            "TIEOFF_X14Y164": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020680",
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        },
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            "TIEOFF_X14Y165": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y166": {
        "bits": {
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                "baseaddr": "0x00020680",
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        },
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            "TIEOFF_X14Y166": "TIEOFF"
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    "INT_R_X13Y167": {
        "bits": {
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            "TIEOFF_X14Y167": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00020680",
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            "TIEOFF_X14Y168": "TIEOFF"
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    "INT_R_X13Y169": {
        "bits": {
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                "baseaddr": "0x00020680",
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    "INT_R_X13Y181": {
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    "INT_R_X13Y186": {
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    "INT_R_X13Y187": {
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    "INT_R_X13Y188": {
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    "INT_R_X13Y189": {
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    "INT_R_X13Y193": {
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    "INT_R_X13Y194": {
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        "type": "INT_R"
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    "INT_R_X13Y195": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X13Y196": {
        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X14Y196": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y197": {
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                "words": 2
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        },
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            "TIEOFF_X14Y197": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y198": {
        "bits": {
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                "words": 2
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        },
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        "sites": {
            "TIEOFF_X14Y198": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X13Y199": {
        "bits": {
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                "baseaddr": "0x00020680",
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                "words": 2
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        },
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            "TIEOFF_X14Y199": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y0": {
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                "baseaddr": "0x00420780",
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        "clock_region": "X0Y0",
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            "TIEOFF_X17Y0": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y1": {
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                "baseaddr": "0x00420780",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X17Y1": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y2": {
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                "baseaddr": "0x00420780",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y2": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y3": {
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                "baseaddr": "0x00420780",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y3": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y4": {
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                "baseaddr": "0x00420780",
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                "words": 2
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        },
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            "TIEOFF_X17Y4": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y5": {
        "bits": {
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                "baseaddr": "0x00420780",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y5": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00420780",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y6": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y7": {
        "bits": {
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                "baseaddr": "0x00420780",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y8": {
        "bits": {
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                "baseaddr": "0x00420780",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y8": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X15Y9": {
        "bits": {
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                "baseaddr": "0x00420780",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X17Y9": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420780",
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        "type": "INT_R"
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                "baseaddr": "0x00400780",
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    "INT_R_X15Y109": {
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                "words": 2
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        "type": "INT_R"
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        "sites": {
            "TIEOFF_X21Y6": "TIEOFF"
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        "type": "INT_R"
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        "pin_functions": {},
        "sites": {
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        "type": "INT_R"
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            "TIEOFF_X23Y6": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00420A80",
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        "type": "INT_R"
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                "baseaddr": "0x00420A80",
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        "type": "INT_R"
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                "baseaddr": "0x00420A80",
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            "TIEOFF_X23Y9": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X21Y151": {
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    "INT_R_X21Y152": {
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    "INT_R_X21Y153": {
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    "INT_R_X21Y154": {
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    "INT_R_X21Y155": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X21Y189": {
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    "INT_R_X21Y195": {
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        "type": "INT_R"
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    "INT_R_X21Y197": {
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        "type": "INT_R"
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    "INT_R_X21Y198": {
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    "INT_R_X21Y199": {
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        "type": "INT_R"
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    "INT_R_X23Y2": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X23Y4": {
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        "type": "INT_R"
    },
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            "CLB_IO_CLK": {
                "baseaddr": "0x00420B80",
                "frames": 28,
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        "type": "INT_R"
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        "type": "INT_R"
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                "baseaddr": "0x00020B80",
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    "INT_R_X23Y195": {
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    "INT_R_X23Y196": {
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    "INT_R_X23Y199": {
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        "type": "INT_R"
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            "TIEOFF_X27Y2": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420C80",
                "frames": 28,
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            "TIEOFF_X27Y3": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00420C80",
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            "TIEOFF_X27Y4": "TIEOFF"
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        "type": "INT_R"
    },
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            "TIEOFF_X27Y5": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X27Y6": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X27Y7": "TIEOFF"
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        "pin_functions": {},
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            "TIEOFF_X27Y51": "TIEOFF"
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    "INT_R_X25Y99": {
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        "pin_functions": {},
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            "TIEOFF_X27Y100": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y101": {
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                "baseaddr": "0x00020C80",
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    "INT_R_X25Y195": {
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    "INT_R_X25Y199": {
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        "pin_functions": {},
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00420D80",
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                "offset": 99,
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            "TIEOFF_X29Y49": "TIEOFF"
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    "INT_R_X27Y52": {
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        "type": "INT_R"
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    "INT_R_X27Y98": {
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            "TIEOFF_X29Y196": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X27Y197": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D80",
                "frames": 28,
                "offset": 95,
                "words": 2
            }
        },
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        "grid_x": 71,
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X29Y197": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X27Y198": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D80",
                "frames": 28,
                "offset": 97,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X29Y198": "TIEOFF"
        },
        "type": "INT_R"
    },
    "INT_R_X27Y199": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020D80",
                "frames": 28,
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                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X29Y199": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E80",
                "frames": 28,
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        "pin_functions": {},
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            "TIEOFF_X31Y0": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E80",
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        },
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        "pin_functions": {},
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            "TIEOFF_X31Y1": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y2": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E80",
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        },
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        "pin_functions": {},
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            "TIEOFF_X31Y2": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E80",
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            "TIEOFF_X31Y3": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y4": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E80",
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            "TIEOFF_X31Y4": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y5": {
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                "baseaddr": "0x00420E80",
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            "TIEOFF_X31Y5": "TIEOFF"
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        "type": "INT_R"
    },
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            "CLB_IO_CLK": {
                "baseaddr": "0x00420E80",
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            "TIEOFF_X31Y6": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y7": {
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                "baseaddr": "0x00420E80",
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            "TIEOFF_X31Y7": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y8": {
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                "baseaddr": "0x00420E80",
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            "TIEOFF_X31Y8": "TIEOFF"
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        "type": "INT_R"
    },
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            "TIEOFF_X31Y9": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00420E80",
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            "TIEOFF_X31Y10": "TIEOFF"
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        "type": "INT_R"
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    },
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                "baseaddr": "0x00420E80",
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            "TIEOFF_X31Y12": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00420E80",
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            "TIEOFF_X31Y13": "TIEOFF"
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        "type": "INT_R"
    },
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                "baseaddr": "0x00420E80",
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            "TIEOFF_X31Y14": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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            "TIEOFF_X31Y15": "TIEOFF"
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        "type": "INT_R"
    },
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    "INT_R_X29Y17": {
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        "type": "INT_R"
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            "TIEOFF_X31Y22": "TIEOFF"
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    "INT_R_X29Y29": {
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        "type": "INT_R"
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    "INT_R_X29Y30": {
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        "type": "INT_R"
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    "INT_R_X29Y31": {
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        "clock_region": "X1Y0",
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            "TIEOFF_X31Y31": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y32": {
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                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X31Y32": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y33": {
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                "baseaddr": "0x00420E80",
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                "words": 2
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X29Y34": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X29Y35": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X29Y36": {
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                "words": 2
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            "TIEOFF_X31Y36": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y37": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X29Y39": {
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                "baseaddr": "0x00420E80",
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X29Y40": {
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X29Y41": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X29Y42": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X31Y42": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y43": {
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X29Y44": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X29Y45": {
        "bits": {
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                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X31Y45": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y46": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E80",
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                "words": 2
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            "TIEOFF_X31Y46": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E80",
                "frames": 28,
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        "type": "INT_R"
    },
    "INT_R_X29Y48": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E80",
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            "TIEOFF_X31Y48": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420E80",
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            "TIEOFF_X31Y49": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y50": {
        "bits": {
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                "baseaddr": "0x00400E80",
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        "type": "INT_R"
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    "INT_R_X29Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400E80",
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        "type": "INT_R"
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    "INT_R_X29Y52": {
        "bits": {
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                "baseaddr": "0x00400E80",
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    "INT_R_X29Y54": {
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            "TIEOFF_X31Y54": "TIEOFF"
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    "INT_R_X29Y55": {
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    "INT_R_X29Y57": {
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    "INT_R_X29Y75": {
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    "INT_R_X29Y78": {
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    "INT_R_X29Y79": {
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    "INT_R_X29Y80": {
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    "INT_R_X29Y82": {
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    "INT_R_X29Y83": {
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    "INT_R_X29Y84": {
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    "INT_R_X29Y85": {
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        "type": "INT_R"
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X29Y87": {
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        "type": "INT_R"
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    "INT_R_X29Y88": {
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        "type": "INT_R"
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    "INT_R_X29Y89": {
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                "words": 2
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            "TIEOFF_X31Y89": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y90": {
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            "TIEOFF_X31Y90": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y91": {
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        "clock_region": "X1Y1",
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    "INT_R_X29Y92": {
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X29Y93": {
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X31Y93": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X29Y94": {
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X31Y94": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X29Y95": {
        "bits": {
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020E80",
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            "TIEOFF_X31Y170": "TIEOFF"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X29Y173": {
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            "TIEOFF_X31Y173": "TIEOFF"
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    "INT_R_X29Y174": {
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            "TIEOFF_X31Y174": "TIEOFF"
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    "INT_R_X29Y175": {
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    "INT_R_X31Y7": {
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        "type": "INT_R"
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    "INT_R_X31Y8": {
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        "type": "INT_R"
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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                "words": 2
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        "type": "INT_R"
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                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X33Y11": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y12": {
        "bits": {
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                "baseaddr": "0x00420F80",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X33Y12": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y13": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X33Y13": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y14": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X33Y14": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y15": {
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                "baseaddr": "0x00420F80",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X33Y15": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y16": {
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                "baseaddr": "0x00420F80",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y16": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y17": {
        "bits": {
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                "baseaddr": "0x00420F80",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y17": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y18": {
        "bits": {
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                "baseaddr": "0x00420F80",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X33Y18": "TIEOFF"
        },
        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420F80",
                "frames": 28,
                "offset": 38,
                "words": 2
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            "TIEOFF_X33Y19": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00420F80",
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            "TIEOFF_X33Y20": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00420F80",
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            "TIEOFF_X33Y21": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y22": {
        "bits": {
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                "baseaddr": "0x00420F80",
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            "TIEOFF_X33Y22": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00420F80",
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            "TIEOFF_X33Y23": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y24": {
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                "baseaddr": "0x00420F80",
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    "INT_R_X31Y54": {
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    "INT_R_X31Y58": {
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    "INT_R_X31Y59": {
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        "type": "INT_R"
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    "INT_R_X31Y62": {
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    "INT_R_X31Y63": {
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X33Y63": "TIEOFF"
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    "INT_R_X31Y64": {
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    "INT_R_X31Y65": {
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X31Y66": {
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        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X33Y66": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y67": {
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y67": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00400F80",
                "frames": 28,
                "offset": 36,
                "words": 2
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            "TIEOFF_X33Y68": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
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            "TIEOFF_X33Y69": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00400F80",
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        "type": "INT_R"
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    "INT_R_X31Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400F80",
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            "TIEOFF_X33Y71": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y72": {
        "bits": {
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                "baseaddr": "0x00400F80",
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            "TIEOFF_X33Y72": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y73": {
        "bits": {
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                "baseaddr": "0x00400F80",
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        "type": "INT_R"
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    "INT_R_X31Y74": {
        "bits": {
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                "baseaddr": "0x00400F80",
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    "INT_R_X31Y75": {
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                "baseaddr": "0x00400F80",
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    "INT_R_X31Y77": {
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    "INT_R_X31Y82": {
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    "INT_R_X31Y87": {
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        "type": "INT_R"
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        "clock_region": "X1Y2",
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            "TIEOFF_X33Y100": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y101": {
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X33Y101": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y102": {
        "bits": {
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X33Y102": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y103": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "type": "INT_R"
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    "INT_R_X31Y104": {
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        "clock_region": "X1Y2",
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        "type": "INT_R"
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    "INT_R_X31Y105": {
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                "words": 2
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        "clock_region": "X1Y2",
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            "TIEOFF_X33Y105": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y106": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X33Y106": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y107": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X33Y107": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y108": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X33Y108": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y109": {
        "bits": {
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                "baseaddr": "0x00000F80",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X33Y109": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y110": {
        "bits": {
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                "baseaddr": "0x00000F80",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X31Y111": {
        "bits": {
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                "baseaddr": "0x00000F80",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X33Y111": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y112": {
        "bits": {
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                "baseaddr": "0x00000F80",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
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            "TIEOFF_X33Y112": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y113": {
        "bits": {
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                "baseaddr": "0x00000F80",
                "frames": 28,
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y113": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y114": {
        "bits": {
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y114": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y115": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y115": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y116": {
        "bits": {
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                "baseaddr": "0x00000F80",
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                "words": 2
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        },
        "clock_region": "X1Y2",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X33Y116": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y117": {
        "bits": {
            "CLB_IO_CLK": {
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        "sites": {
            "TIEOFF_X33Y166": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X31Y167": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020F80",
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                "offset": 34,
                "words": 2
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            "TIEOFF_X33Y167": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y168": {
        "bits": {
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            "TIEOFF_X33Y168": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y169": {
        "bits": {
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                "baseaddr": "0x00020F80",
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            "TIEOFF_X33Y169": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X31Y170": {
        "bits": {
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                "baseaddr": "0x00020F80",
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        "type": "INT_R"
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    "INT_R_X31Y171": {
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            "TIEOFF_X33Y171": "TIEOFF"
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    "INT_R_X31Y172": {
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                "baseaddr": "0x00421080",
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            "TIEOFF_X35Y1": "TIEOFF"
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        "type": "INT_R"
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                "words": 2
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            "TIEOFF_X35Y2": "TIEOFF"
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        "type": "INT_R"
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            "TIEOFF_X35Y3": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y4": {
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                "words": 2
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        "type": "INT_R"
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    "INT_R_X33Y5": {
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                "baseaddr": "0x00421080",
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                "words": 2
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        "pin_functions": {},
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        "type": "INT_R"
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X35Y6": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y7": {
        "bits": {
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                "baseaddr": "0x00421080",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X35Y7": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y8": {
        "bits": {
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                "baseaddr": "0x00421080",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X35Y8": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y9": {
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                "baseaddr": "0x00421080",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X35Y9": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y10": {
        "bits": {
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                "baseaddr": "0x00421080",
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                "offset": 20,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y10": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00421080",
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                "offset": 22,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y11": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y12": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y12": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421080",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y13": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y14": {
        "bits": {
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                "baseaddr": "0x00421080",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y14": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y15": {
        "bits": {
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                "baseaddr": "0x00421080",
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X35Y15": "TIEOFF"
        },
        "type": "INT_R"
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                "baseaddr": "0x00401080",
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        "type": "INT_R"
    },
    "INT_R_X33Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00021080",
                "frames": 28,
                "offset": 30,
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        },
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            "TIEOFF_X35Y165": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X33Y166": {
        "bits": {
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                "baseaddr": "0x00021080",
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        "type": "INT_R"
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    "INT_R_X33Y167": {
        "bits": {
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                "baseaddr": "0x00021080",
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            "TIEOFF_X35Y167": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X33Y168": {
        "bits": {
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        "type": "INT_R"
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    "INT_R_X33Y169": {
        "bits": {
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            "TIEOFF_X35Y169": "TIEOFF"
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    "INT_R_X33Y170": {
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                "words": 2
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        "type": "INT_R"
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        "type": "INT_R"
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                "words": 2
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            "TIEOFF_X38Y63": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401180",
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            "TIEOFF_X38Y64": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401180",
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            "TIEOFF_X38Y65": "TIEOFF"
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                "baseaddr": "0x00401180",
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            "TIEOFF_X38Y66": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00401180",
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            "TIEOFF_X38Y67": "TIEOFF"
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                "baseaddr": "0x00401180",
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            "TIEOFF_X38Y68": "TIEOFF"
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            "TIEOFF_X38Y69": "TIEOFF"
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            "TIEOFF_X38Y98": "TIEOFF"
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    "INT_R_X35Y102": {
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            "TIEOFF_X38Y102": "TIEOFF"
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    "INT_R_X35Y103": {
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    "INT_R_X35Y104": {
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    "INT_R_X35Y105": {
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    "INT_R_X35Y106": {
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    "INT_R_X35Y107": {
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        "type": "INT_R"
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    "INT_R_X35Y108": {
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        "clock_region": "X1Y2",
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            "TIEOFF_X38Y108": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X35Y109": {
        "bits": {
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    "INT_R_X35Y110": {
        "bits": {
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        },
        "clock_region": "X1Y2",
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    "INT_R_X35Y111": {
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        "type": "INT_R"
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    "INT_R_X35Y112": {
        "bits": {
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        },
        "clock_region": "X1Y2",
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            "TIEOFF_X38Y112": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X35Y113": {
        "bits": {
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        "type": "INT_R"
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                "baseaddr": "0x00421280",
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                "words": 2
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            "TIEOFF_X40Y12": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421280",
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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        "clock_region": "X1Y1",
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    "INT_R_X37Y54": {
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        "clock_region": "X1Y1",
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        "clock_region": "X1Y1",
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        "clock_region": "X1Y1",
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        "type": "INT_R"
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        },
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        "type": "INT_R"
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        },
        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X37Y61": {
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        "bits": {
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        "sites": {
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        "type": "INT_R"
    },
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                "baseaddr": "0x00001280",
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            "TIEOFF_X42Y9": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421380",
                "frames": 28,
                "offset": 20,
                "words": 2
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            "TIEOFF_X42Y10": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00421380",
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        "type": "INT_R"
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                "baseaddr": "0x00421380",
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            "TIEOFF_X42Y12": "TIEOFF"
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        "type": "INT_R"
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                "baseaddr": "0x00421380",
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            "TIEOFF_X42Y13": "TIEOFF"
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        "bits": {
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            "TIEOFF_X42Y14": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y52": {
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    "INT_R_X39Y53": {
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    "INT_R_X39Y54": {
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        "clock_region": "X1Y1",
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        "clock_region": "X1Y1",
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        "type": "INT_R"
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        "clock_region": "X1Y1",
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        },
        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X39Y58": {
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y58": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
                "frames": 28,
                "offset": 18,
                "words": 2
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        },
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        "pin_functions": {},
        "sites": {
            "TIEOFF_X42Y59": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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                "offset": 20,
                "words": 2
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        },
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        "pin_functions": {},
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            "TIEOFF_X42Y60": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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                "offset": 22,
                "words": 2
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        },
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            "TIEOFF_X42Y61": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X39Y62": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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                "offset": 24,
                "words": 2
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        },
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            "TIEOFF_X42Y62": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
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        },
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            "TIEOFF_X42Y63": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X39Y64": {
        "bits": {
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                "baseaddr": "0x00401380",
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        },
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            "TIEOFF_X42Y64": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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                "baseaddr": "0x00401380",
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        },
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            "TIEOFF_X42Y65": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
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        "type": "INT_R"
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        "bits": {
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        },
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            "TIEOFF_X42Y67": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
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        },
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        },
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    "INT_R_X39Y72": {
        "bits": {
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        },
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    "INT_R_X39Y75": {
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        "type": "INT_R"
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X39Y91": {
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        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X39Y92": {
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        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X39Y93": {
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        },
        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X39Y94": {
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        "clock_region": "X1Y1",
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    "INT_R_X39Y95": {
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        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X39Y96": {
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        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X39Y97": {
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                "words": 2
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        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X39Y98": {
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        },
        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X39Y99": {
        "bits": {
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                "baseaddr": "0x00401380",
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                "offset": 99,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "type": "INT_R"
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    "INT_R_X41Y0": {
        "bits": {
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                "baseaddr": "0x00421480",
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X41Y1": {
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X44Y1": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y2": {
        "bits": {
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                "baseaddr": "0x00421480",
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X44Y2": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y3": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X44Y3": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X41Y4": {
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                "baseaddr": "0x00421480",
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X41Y5": {
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        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X41Y6": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_R"
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    "INT_R_X41Y7": {
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X44Y7": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X41Y8": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00421480",
                "frames": 28,
                "offset": 16,
                "words": 2
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                "baseaddr": "0x00421480",
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        "type": "INT_R"
    },
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        "bits": {
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                "baseaddr": "0x00401480",
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                "words": 2
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X43Y7": {
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                    "type": "LIOB33"
                },
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 105,
        "pin_functions": {
            "IOB_X0Y99": "IO_0_14"
        },
        "sites": {
            "IOB_X0Y99": "IOB33"
        },
        "type": "LIOB33_SING"
    },
    "LIOB33_SING_X0Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y0"
                    },
                    "start_offset": 2,
                    "type": "LIOB33"
                },
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 103,
        "pin_functions": {
            "IOB_X0Y100": "IO_25_15"
        },
        "sites": {
            "IOB_X0Y100": "IOB33"
        },
        "type": "LIOB33_SING"
    },
    "LIOB33_SING_X0Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "LIOB33"
                },
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 53,
        "pin_functions": {
            "IOB_X0Y149": "IO_0_15"
        },
        "sites": {
            "IOB_X0Y149": "IOB33"
        },
        "type": "LIOB33_SING"
    },
    "LIOB33_SING_X0Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y0"
                    },
                    "start_offset": 2,
                    "type": "LIOB33"
                },
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 51,
        "pin_functions": {
            "IOB_X0Y150": "IO_25_16"
        },
        "sites": {
            "IOB_X0Y150": "IOB33"
        },
        "type": "LIOB33_SING"
    },
    "LIOB33_SING_X0Y199": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "LIOB33"
                },
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 1,
        "pin_functions": {
            "IOB_X0Y199": "IO_0_16"
        },
        "sites": {
            "IOB_X0Y199": "IOB33"
        },
        "type": "LIOB33_SING"
    },
    "LIOB33_X0Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 206,
        "pin_functions": {
            "IOB_X0Y1": "IO_L24N_T3_13",
            "IOB_X0Y2": "IO_L24P_T3_13"
        },
        "sites": {
            "IOB_X0Y1": "IOB33S",
            "IOB_X0Y2": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 204,
        "pin_functions": {
            "IOB_X0Y3": "IO_L23N_T3_13",
            "IOB_X0Y4": "IO_L23P_T3_13"
        },
        "sites": {
            "IOB_X0Y3": "IOB33S",
            "IOB_X0Y4": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 202,
        "pin_functions": {
            "IOB_X0Y5": "IO_L22N_T3_13",
            "IOB_X0Y6": "IO_L22P_T3_13"
        },
        "sites": {
            "IOB_X0Y5": "IOB33S",
            "IOB_X0Y6": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 200,
        "pin_functions": {
            "IOB_X0Y7": "IO_L21N_T3_DQS_13",
            "IOB_X0Y8": "IO_L21P_T3_DQS_13"
        },
        "sites": {
            "IOB_X0Y7": "IOB33S",
            "IOB_X0Y8": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 198,
        "pin_functions": {
            "IOB_X0Y9": "IO_L20N_T3_13",
            "IOB_X0Y10": "IO_L20P_T3_13"
        },
        "sites": {
            "IOB_X0Y9": "IOB33S",
            "IOB_X0Y10": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 196,
        "pin_functions": {
            "IOB_X0Y11": "IO_L19N_T3_VREF_13",
            "IOB_X0Y12": "IO_L19P_T3_13"
        },
        "sites": {
            "IOB_X0Y11": "IOB33S",
            "IOB_X0Y12": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 194,
        "pin_functions": {
            "IOB_X0Y13": "IO_L18N_T2_13",
            "IOB_X0Y14": "IO_L18P_T2_13"
        },
        "sites": {
            "IOB_X0Y13": "IOB33S",
            "IOB_X0Y14": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 192,
        "pin_functions": {
            "IOB_X0Y15": "IO_L17N_T2_13",
            "IOB_X0Y16": "IO_L17P_T2_13"
        },
        "sites": {
            "IOB_X0Y15": "IOB33S",
            "IOB_X0Y16": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 190,
        "pin_functions": {
            "IOB_X0Y17": "IO_L16N_T2_13",
            "IOB_X0Y18": "IO_L16P_T2_13"
        },
        "sites": {
            "IOB_X0Y17": "IOB33S",
            "IOB_X0Y18": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 188,
        "pin_functions": {
            "IOB_X0Y19": "IO_L15N_T2_DQS_13",
            "IOB_X0Y20": "IO_L15P_T2_DQS_13"
        },
        "sites": {
            "IOB_X0Y19": "IOB33S",
            "IOB_X0Y20": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 186,
        "pin_functions": {
            "IOB_X0Y21": "IO_L14N_T2_SRCC_13",
            "IOB_X0Y22": "IO_L14P_T2_SRCC_13"
        },
        "sites": {
            "IOB_X0Y21": "IOB33S",
            "IOB_X0Y22": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 184,
        "pin_functions": {
            "IOB_X0Y23": "IO_L13N_T2_MRCC_13",
            "IOB_X0Y24": "IO_L13P_T2_MRCC_13"
        },
        "sites": {
            "IOB_X0Y23": "IOB33S",
            "IOB_X0Y24": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 181,
        "pin_functions": {
            "IOB_X0Y25": "IO_L12N_T1_MRCC_13",
            "IOB_X0Y26": "IO_L12P_T1_MRCC_13"
        },
        "sites": {
            "IOB_X0Y25": "IOB33S",
            "IOB_X0Y26": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 179,
        "pin_functions": {
            "IOB_X0Y27": "IO_L11N_T1_SRCC_13",
            "IOB_X0Y28": "IO_L11P_T1_SRCC_13"
        },
        "sites": {
            "IOB_X0Y27": "IOB33S",
            "IOB_X0Y28": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 177,
        "pin_functions": {
            "IOB_X0Y29": "IO_L10N_T1_13",
            "IOB_X0Y30": "IO_L10P_T1_13"
        },
        "sites": {
            "IOB_X0Y29": "IOB33S",
            "IOB_X0Y30": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 175,
        "pin_functions": {
            "IOB_X0Y31": "IO_L9N_T1_DQS_13",
            "IOB_X0Y32": "IO_L9P_T1_DQS_13"
        },
        "sites": {
            "IOB_X0Y31": "IOB33S",
            "IOB_X0Y32": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 173,
        "pin_functions": {
            "IOB_X0Y33": "IO_L8N_T1_13",
            "IOB_X0Y34": "IO_L8P_T1_13"
        },
        "sites": {
            "IOB_X0Y33": "IOB33S",
            "IOB_X0Y34": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 171,
        "pin_functions": {
            "IOB_X0Y35": "IO_L7N_T1_13",
            "IOB_X0Y36": "IO_L7P_T1_13"
        },
        "sites": {
            "IOB_X0Y35": "IOB33S",
            "IOB_X0Y36": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 169,
        "pin_functions": {
            "IOB_X0Y37": "IO_L6N_T0_VREF_13",
            "IOB_X0Y38": "IO_L6P_T0_13"
        },
        "sites": {
            "IOB_X0Y37": "IOB33S",
            "IOB_X0Y38": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 167,
        "pin_functions": {
            "IOB_X0Y39": "IO_L5N_T0_13",
            "IOB_X0Y40": "IO_L5P_T0_13"
        },
        "sites": {
            "IOB_X0Y39": "IOB33S",
            "IOB_X0Y40": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 165,
        "pin_functions": {
            "IOB_X0Y41": "IO_L4N_T0_13",
            "IOB_X0Y42": "IO_L4P_T0_13"
        },
        "sites": {
            "IOB_X0Y41": "IOB33S",
            "IOB_X0Y42": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 163,
        "pin_functions": {
            "IOB_X0Y43": "IO_L3N_T0_DQS_13",
            "IOB_X0Y44": "IO_L3P_T0_DQS_13"
        },
        "sites": {
            "IOB_X0Y43": "IOB33S",
            "IOB_X0Y44": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 161,
        "pin_functions": {
            "IOB_X0Y45": "IO_L2N_T0_13",
            "IOB_X0Y46": "IO_L2P_T0_13"
        },
        "sites": {
            "IOB_X0Y45": "IOB33S",
            "IOB_X0Y46": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 0,
        "grid_y": 159,
        "pin_functions": {
            "IOB_X0Y47": "IO_L1N_T0_13",
            "IOB_X0Y48": "IO_L1P_T0_13"
        },
        "sites": {
            "IOB_X0Y47": "IOB33S",
            "IOB_X0Y48": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 154,
        "pin_functions": {
            "IOB_X0Y51": "IO_L24N_T3_A00_D16_14",
            "IOB_X0Y52": "IO_L24P_T3_A01_D17_14"
        },
        "sites": {
            "IOB_X0Y51": "IOB33S",
            "IOB_X0Y52": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 152,
        "pin_functions": {
            "IOB_X0Y53": "IO_L23N_T3_A02_D18_14",
            "IOB_X0Y54": "IO_L23P_T3_A03_D19_14"
        },
        "sites": {
            "IOB_X0Y53": "IOB33S",
            "IOB_X0Y54": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 150,
        "pin_functions": {
            "IOB_X0Y55": "IO_L22N_T3_A04_D20_14",
            "IOB_X0Y56": "IO_L22P_T3_A05_D21_14"
        },
        "sites": {
            "IOB_X0Y55": "IOB33S",
            "IOB_X0Y56": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 148,
        "pin_functions": {
            "IOB_X0Y57": "IO_L21N_T3_DQS_A06_D22_14",
            "IOB_X0Y58": "IO_L21P_T3_DQS_14"
        },
        "sites": {
            "IOB_X0Y57": "IOB33S",
            "IOB_X0Y58": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 146,
        "pin_functions": {
            "IOB_X0Y59": "IO_L20N_T3_A07_D23_14",
            "IOB_X0Y60": "IO_L20P_T3_A08_D24_14"
        },
        "sites": {
            "IOB_X0Y59": "IOB33S",
            "IOB_X0Y60": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 144,
        "pin_functions": {
            "IOB_X0Y61": "IO_L19N_T3_A09_D25_VREF_14",
            "IOB_X0Y62": "IO_L19P_T3_A10_D26_14"
        },
        "sites": {
            "IOB_X0Y61": "IOB33S",
            "IOB_X0Y62": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 142,
        "pin_functions": {
            "IOB_X0Y63": "IO_L18N_T2_A11_D27_14",
            "IOB_X0Y64": "IO_L18P_T2_A12_D28_14"
        },
        "sites": {
            "IOB_X0Y63": "IOB33S",
            "IOB_X0Y64": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 140,
        "pin_functions": {
            "IOB_X0Y65": "IO_L17N_T2_A13_D29_14",
            "IOB_X0Y66": "IO_L17P_T2_A14_D30_14"
        },
        "sites": {
            "IOB_X0Y65": "IOB33S",
            "IOB_X0Y66": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 138,
        "pin_functions": {
            "IOB_X0Y67": "IO_L16N_T2_A15_D31_14",
            "IOB_X0Y68": "IO_L16P_T2_CSI_B_14"
        },
        "sites": {
            "IOB_X0Y67": "IOB33S",
            "IOB_X0Y68": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 136,
        "pin_functions": {
            "IOB_X0Y69": "IO_L15N_T2_DQS_DOUT_CSO_B_14",
            "IOB_X0Y70": "IO_L15P_T2_DQS_RDWR_B_14"
        },
        "sites": {
            "IOB_X0Y69": "IOB33S",
            "IOB_X0Y70": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 134,
        "pin_functions": {
            "IOB_X0Y71": "IO_L14N_T2_SRCC_14",
            "IOB_X0Y72": "IO_L14P_T2_SRCC_14"
        },
        "sites": {
            "IOB_X0Y71": "IOB33S",
            "IOB_X0Y72": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 132,
        "pin_functions": {
            "IOB_X0Y73": "IO_L13N_T2_MRCC_14",
            "IOB_X0Y74": "IO_L13P_T2_MRCC_14"
        },
        "sites": {
            "IOB_X0Y73": "IOB33S",
            "IOB_X0Y74": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 129,
        "pin_functions": {
            "IOB_X0Y75": "IO_L12N_T1_MRCC_14",
            "IOB_X0Y76": "IO_L12P_T1_MRCC_14"
        },
        "sites": {
            "IOB_X0Y75": "IOB33S",
            "IOB_X0Y76": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 127,
        "pin_functions": {
            "IOB_X0Y77": "IO_L11N_T1_SRCC_14",
            "IOB_X0Y78": "IO_L11P_T1_SRCC_14"
        },
        "sites": {
            "IOB_X0Y77": "IOB33S",
            "IOB_X0Y78": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 125,
        "pin_functions": {
            "IOB_X0Y79": "IO_L10N_T1_D15_14",
            "IOB_X0Y80": "IO_L10P_T1_D14_14"
        },
        "sites": {
            "IOB_X0Y79": "IOB33S",
            "IOB_X0Y80": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 123,
        "pin_functions": {
            "IOB_X0Y81": "IO_L9N_T1_DQS_D13_14",
            "IOB_X0Y82": "IO_L9P_T1_DQS_14"
        },
        "sites": {
            "IOB_X0Y81": "IOB33S",
            "IOB_X0Y82": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 121,
        "pin_functions": {
            "IOB_X0Y83": "IO_L8N_T1_D12_14",
            "IOB_X0Y84": "IO_L8P_T1_D11_14"
        },
        "sites": {
            "IOB_X0Y83": "IOB33S",
            "IOB_X0Y84": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 119,
        "pin_functions": {
            "IOB_X0Y85": "IO_L7N_T1_D10_14",
            "IOB_X0Y86": "IO_L7P_T1_D09_14"
        },
        "sites": {
            "IOB_X0Y85": "IOB33S",
            "IOB_X0Y86": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 117,
        "pin_functions": {
            "IOB_X0Y87": "IO_L6N_T0_D08_VREF_14",
            "IOB_X0Y88": "IO_L6P_T0_FCS_B_14"
        },
        "sites": {
            "IOB_X0Y87": "IOB33S",
            "IOB_X0Y88": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 115,
        "pin_functions": {
            "IOB_X0Y89": "IO_L5N_T0_D07_14",
            "IOB_X0Y90": "IO_L5P_T0_D06_14"
        },
        "sites": {
            "IOB_X0Y89": "IOB33S",
            "IOB_X0Y90": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 113,
        "pin_functions": {
            "IOB_X0Y91": "IO_L4N_T0_D05_14",
            "IOB_X0Y92": "IO_L4P_T0_D04_14"
        },
        "sites": {
            "IOB_X0Y91": "IOB33S",
            "IOB_X0Y92": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 111,
        "pin_functions": {
            "IOB_X0Y93": "IO_L3N_T0_DQS_EMCCLK_14",
            "IOB_X0Y94": "IO_L3P_T0_DQS_PUDC_B_14"
        },
        "sites": {
            "IOB_X0Y93": "IOB33S",
            "IOB_X0Y94": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 109,
        "pin_functions": {
            "IOB_X0Y95": "IO_L2N_T0_D03_14",
            "IOB_X0Y96": "IO_L2P_T0_D02_14"
        },
        "sites": {
            "IOB_X0Y95": "IOB33S",
            "IOB_X0Y96": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 0,
        "grid_y": 107,
        "pin_functions": {
            "IOB_X0Y97": "IO_L1N_T0_D01_DIN_14",
            "IOB_X0Y98": "IO_L1P_T0_D00_MOSI_14"
        },
        "sites": {
            "IOB_X0Y97": "IOB33S",
            "IOB_X0Y98": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 102,
        "pin_functions": {
            "IOB_X0Y101": "IO_L24N_T3_RS0_15",
            "IOB_X0Y102": "IO_L24P_T3_RS1_15"
        },
        "sites": {
            "IOB_X0Y101": "IOB33S",
            "IOB_X0Y102": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 100,
        "pin_functions": {
            "IOB_X0Y103": "IO_L23N_T3_FWE_B_15",
            "IOB_X0Y104": "IO_L23P_T3_FOE_B_15"
        },
        "sites": {
            "IOB_X0Y103": "IOB33S",
            "IOB_X0Y104": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 98,
        "pin_functions": {
            "IOB_X0Y105": "IO_L22N_T3_A16_15",
            "IOB_X0Y106": "IO_L22P_T3_A17_15"
        },
        "sites": {
            "IOB_X0Y105": "IOB33S",
            "IOB_X0Y106": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 96,
        "pin_functions": {
            "IOB_X0Y107": "IO_L21N_T3_DQS_A18_15",
            "IOB_X0Y108": "IO_L21P_T3_DQS_15"
        },
        "sites": {
            "IOB_X0Y107": "IOB33S",
            "IOB_X0Y108": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 94,
        "pin_functions": {
            "IOB_X0Y109": "IO_L20N_T3_A19_15",
            "IOB_X0Y110": "IO_L20P_T3_A20_15"
        },
        "sites": {
            "IOB_X0Y109": "IOB33S",
            "IOB_X0Y110": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 92,
        "pin_functions": {
            "IOB_X0Y111": "IO_L19N_T3_A21_VREF_15",
            "IOB_X0Y112": "IO_L19P_T3_A22_15"
        },
        "sites": {
            "IOB_X0Y111": "IOB33S",
            "IOB_X0Y112": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 90,
        "pin_functions": {
            "IOB_X0Y113": "IO_L18N_T2_A23_15",
            "IOB_X0Y114": "IO_L18P_T2_A24_15"
        },
        "sites": {
            "IOB_X0Y113": "IOB33S",
            "IOB_X0Y114": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 88,
        "pin_functions": {
            "IOB_X0Y115": "IO_L17N_T2_A25_15",
            "IOB_X0Y116": "IO_L17P_T2_A26_15"
        },
        "sites": {
            "IOB_X0Y115": "IOB33S",
            "IOB_X0Y116": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 86,
        "pin_functions": {
            "IOB_X0Y117": "IO_L16N_T2_A27_15",
            "IOB_X0Y118": "IO_L16P_T2_A28_15"
        },
        "sites": {
            "IOB_X0Y117": "IOB33S",
            "IOB_X0Y118": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 84,
        "pin_functions": {
            "IOB_X0Y119": "IO_L15N_T2_DQS_ADV_B_15",
            "IOB_X0Y120": "IO_L15P_T2_DQS_15"
        },
        "sites": {
            "IOB_X0Y119": "IOB33S",
            "IOB_X0Y120": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 82,
        "pin_functions": {
            "IOB_X0Y121": "IO_L14N_T2_SRCC_15",
            "IOB_X0Y122": "IO_L14P_T2_SRCC_15"
        },
        "sites": {
            "IOB_X0Y121": "IOB33S",
            "IOB_X0Y122": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 80,
        "pin_functions": {
            "IOB_X0Y123": "IO_L13N_T2_MRCC_15",
            "IOB_X0Y124": "IO_L13P_T2_MRCC_15"
        },
        "sites": {
            "IOB_X0Y123": "IOB33S",
            "IOB_X0Y124": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 77,
        "pin_functions": {
            "IOB_X0Y125": "IO_L12N_T1_MRCC_AD5N_15",
            "IOB_X0Y126": "IO_L12P_T1_MRCC_AD5P_15"
        },
        "sites": {
            "IOB_X0Y125": "IOB33S",
            "IOB_X0Y126": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 75,
        "pin_functions": {
            "IOB_X0Y127": "IO_L11N_T1_SRCC_AD12N_15",
            "IOB_X0Y128": "IO_L11P_T1_SRCC_AD12P_15"
        },
        "sites": {
            "IOB_X0Y127": "IOB33S",
            "IOB_X0Y128": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 73,
        "pin_functions": {
            "IOB_X0Y129": "IO_L10N_T1_AD4N_15",
            "IOB_X0Y130": "IO_L10P_T1_AD4P_15"
        },
        "sites": {
            "IOB_X0Y129": "IOB33S",
            "IOB_X0Y130": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 71,
        "pin_functions": {
            "IOB_X0Y131": "IO_L9N_T1_DQS_AD11N_15",
            "IOB_X0Y132": "IO_L9P_T1_DQS_AD11P_15"
        },
        "sites": {
            "IOB_X0Y131": "IOB33S",
            "IOB_X0Y132": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 69,
        "pin_functions": {
            "IOB_X0Y133": "IO_L8N_T1_AD3N_15",
            "IOB_X0Y134": "IO_L8P_T1_AD3P_15"
        },
        "sites": {
            "IOB_X0Y133": "IOB33S",
            "IOB_X0Y134": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 67,
        "pin_functions": {
            "IOB_X0Y135": "IO_L7N_T1_AD10N_15",
            "IOB_X0Y136": "IO_L7P_T1_AD10P_15"
        },
        "sites": {
            "IOB_X0Y135": "IOB33S",
            "IOB_X0Y136": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 65,
        "pin_functions": {
            "IOB_X0Y137": "IO_L6N_T0_VREF_15",
            "IOB_X0Y138": "IO_L6P_T0_15"
        },
        "sites": {
            "IOB_X0Y137": "IOB33S",
            "IOB_X0Y138": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 63,
        "pin_functions": {
            "IOB_X0Y139": "IO_L5N_T0_AD2N_15",
            "IOB_X0Y140": "IO_L5P_T0_AD2P_15"
        },
        "sites": {
            "IOB_X0Y139": "IOB33S",
            "IOB_X0Y140": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 61,
        "pin_functions": {
            "IOB_X0Y141": "IO_L4N_T0_AD9N_15",
            "IOB_X0Y142": "IO_L4P_T0_AD9P_15"
        },
        "sites": {
            "IOB_X0Y141": "IOB33S",
            "IOB_X0Y142": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 59,
        "pin_functions": {
            "IOB_X0Y143": "IO_L3N_T0_DQS_AD1N_15",
            "IOB_X0Y144": "IO_L3P_T0_DQS_AD1P_15"
        },
        "sites": {
            "IOB_X0Y143": "IOB33S",
            "IOB_X0Y144": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 57,
        "pin_functions": {
            "IOB_X0Y145": "IO_L2N_T0_AD8N_15",
            "IOB_X0Y146": "IO_L2P_T0_AD8P_15"
        },
        "sites": {
            "IOB_X0Y145": "IOB33S",
            "IOB_X0Y146": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 0,
        "grid_y": 55,
        "pin_functions": {
            "IOB_X0Y147": "IO_L1N_T0_AD0N_15",
            "IOB_X0Y148": "IO_L1P_T0_AD0P_15"
        },
        "sites": {
            "IOB_X0Y147": "IOB33S",
            "IOB_X0Y148": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y151": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 50,
        "pin_functions": {
            "IOB_X0Y151": "IO_L24N_T3_16",
            "IOB_X0Y152": "IO_L24P_T3_16"
        },
        "sites": {
            "IOB_X0Y151": "IOB33S",
            "IOB_X0Y152": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y153": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 48,
        "pin_functions": {
            "IOB_X0Y153": "IO_L23N_T3_16",
            "IOB_X0Y154": "IO_L23P_T3_16"
        },
        "sites": {
            "IOB_X0Y153": "IOB33S",
            "IOB_X0Y154": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 46,
        "pin_functions": {
            "IOB_X0Y155": "IO_L22N_T3_16",
            "IOB_X0Y156": "IO_L22P_T3_16"
        },
        "sites": {
            "IOB_X0Y155": "IOB33S",
            "IOB_X0Y156": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y157": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 44,
        "pin_functions": {
            "IOB_X0Y157": "IO_L21N_T3_DQS_16",
            "IOB_X0Y158": "IO_L21P_T3_DQS_16"
        },
        "sites": {
            "IOB_X0Y157": "IOB33S",
            "IOB_X0Y158": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y159": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 42,
        "pin_functions": {
            "IOB_X0Y159": "IO_L20N_T3_16",
            "IOB_X0Y160": "IO_L20P_T3_16"
        },
        "sites": {
            "IOB_X0Y159": "IOB33S",
            "IOB_X0Y160": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y161": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 40,
        "pin_functions": {
            "IOB_X0Y161": "IO_L19N_T3_VREF_16",
            "IOB_X0Y162": "IO_L19P_T3_16"
        },
        "sites": {
            "IOB_X0Y161": "IOB33S",
            "IOB_X0Y162": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y163": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 38,
        "pin_functions": {
            "IOB_X0Y163": "IO_L18N_T2_16",
            "IOB_X0Y164": "IO_L18P_T2_16"
        },
        "sites": {
            "IOB_X0Y163": "IOB33S",
            "IOB_X0Y164": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 36,
        "pin_functions": {
            "IOB_X0Y165": "IO_L17N_T2_16",
            "IOB_X0Y166": "IO_L17P_T2_16"
        },
        "sites": {
            "IOB_X0Y165": "IOB33S",
            "IOB_X0Y166": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y167": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 34,
        "pin_functions": {
            "IOB_X0Y167": "IO_L16N_T2_16",
            "IOB_X0Y168": "IO_L16P_T2_16"
        },
        "sites": {
            "IOB_X0Y167": "IOB33S",
            "IOB_X0Y168": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y169": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 32,
        "pin_functions": {
            "IOB_X0Y169": "IO_L15N_T2_DQS_16",
            "IOB_X0Y170": "IO_L15P_T2_DQS_16"
        },
        "sites": {
            "IOB_X0Y169": "IOB33S",
            "IOB_X0Y170": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y171": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 30,
        "pin_functions": {
            "IOB_X0Y171": "IO_L14N_T2_SRCC_16",
            "IOB_X0Y172": "IO_L14P_T2_SRCC_16"
        },
        "sites": {
            "IOB_X0Y171": "IOB33S",
            "IOB_X0Y172": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y173": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 28,
        "pin_functions": {
            "IOB_X0Y173": "IO_L13N_T2_MRCC_16",
            "IOB_X0Y174": "IO_L13P_T2_MRCC_16"
        },
        "sites": {
            "IOB_X0Y173": "IOB33S",
            "IOB_X0Y174": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y175": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 25,
        "pin_functions": {
            "IOB_X0Y175": "IO_L12N_T1_MRCC_16",
            "IOB_X0Y176": "IO_L12P_T1_MRCC_16"
        },
        "sites": {
            "IOB_X0Y175": "IOB33S",
            "IOB_X0Y176": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y177": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 23,
        "pin_functions": {
            "IOB_X0Y177": "IO_L11N_T1_SRCC_16",
            "IOB_X0Y178": "IO_L11P_T1_SRCC_16"
        },
        "sites": {
            "IOB_X0Y177": "IOB33S",
            "IOB_X0Y178": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y179": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 21,
        "pin_functions": {
            "IOB_X0Y179": "IO_L10N_T1_16",
            "IOB_X0Y180": "IO_L10P_T1_16"
        },
        "sites": {
            "IOB_X0Y179": "IOB33S",
            "IOB_X0Y180": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y181": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 19,
        "pin_functions": {
            "IOB_X0Y181": "IO_L9N_T1_DQS_16",
            "IOB_X0Y182": "IO_L9P_T1_DQS_16"
        },
        "sites": {
            "IOB_X0Y181": "IOB33S",
            "IOB_X0Y182": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y183": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 17,
        "pin_functions": {
            "IOB_X0Y183": "IO_L8N_T1_16",
            "IOB_X0Y184": "IO_L8P_T1_16"
        },
        "sites": {
            "IOB_X0Y183": "IOB33S",
            "IOB_X0Y184": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y185": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 15,
        "pin_functions": {
            "IOB_X0Y185": "IO_L7N_T1_16",
            "IOB_X0Y186": "IO_L7P_T1_16"
        },
        "sites": {
            "IOB_X0Y185": "IOB33S",
            "IOB_X0Y186": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y187": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 13,
        "pin_functions": {
            "IOB_X0Y187": "IO_L6N_T0_VREF_16",
            "IOB_X0Y188": "IO_L6P_T0_16"
        },
        "sites": {
            "IOB_X0Y187": "IOB33S",
            "IOB_X0Y188": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y189": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 11,
        "pin_functions": {
            "IOB_X0Y189": "IO_L5N_T0_16",
            "IOB_X0Y190": "IO_L5P_T0_16"
        },
        "sites": {
            "IOB_X0Y189": "IOB33S",
            "IOB_X0Y190": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y191": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 9,
        "pin_functions": {
            "IOB_X0Y191": "IO_L4N_T0_16",
            "IOB_X0Y192": "IO_L4P_T0_16"
        },
        "sites": {
            "IOB_X0Y191": "IOB33S",
            "IOB_X0Y192": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y193": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 7,
        "pin_functions": {
            "IOB_X0Y193": "IO_L3N_T0_DQS_16",
            "IOB_X0Y194": "IO_L3P_T0_DQS_16"
        },
        "sites": {
            "IOB_X0Y193": "IOB33S",
            "IOB_X0Y194": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y195": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 5,
        "pin_functions": {
            "IOB_X0Y195": "IO_L2N_T0_16",
            "IOB_X0Y196": "IO_L2P_T0_16"
        },
        "sites": {
            "IOB_X0Y195": "IOB33S",
            "IOB_X0Y196": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOB33_X0Y197": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 0,
        "grid_y": 3,
        "pin_functions": {
            "IOB_X0Y197": "IO_L1N_T0_16",
            "IOB_X0Y198": "IO_L1P_T0_16"
        },
        "sites": {
            "IOB_X0Y197": "IOB33S",
            "IOB_X0Y198": "IOB33M"
        },
        "type": "LIOB33"
    },
    "LIOI3_SING_X0Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y0": "IDELAYE2",
            "ILOGIC_X0Y0": "ILOGICE3",
            "OLOGIC_X0Y0": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00420000",
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                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y49": "IDELAYE2",
            "ILOGIC_X0Y49": "ILOGICE3",
            "OLOGIC_X0Y49": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
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                    "type": "LIOI3"
                },
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                "offset": 0,
                "words": 2
            }
        },
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        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y50": "IDELAYE2",
            "ILOGIC_X0Y50": "ILOGICE3",
            "OLOGIC_X0Y50": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
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                },
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                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y99": "IDELAYE2",
            "ILOGIC_X0Y99": "ILOGICE3",
            "OLOGIC_X0Y99": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y100": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "LIOI3"
                },
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                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 103,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y100": "IDELAYE2",
            "ILOGIC_X0Y100": "ILOGICE3",
            "OLOGIC_X0Y100": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y149": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "LIOI3"
                },
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                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 53,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y149": "IDELAYE2",
            "ILOGIC_X0Y149": "ILOGICE3",
            "OLOGIC_X0Y149": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y150": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "LIOI3"
                },
                "baseaddr": "0x00020000",
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                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 51,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y150": "IDELAYE2",
            "ILOGIC_X0Y150": "ILOGICE3",
            "OLOGIC_X0Y150": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_SING_X0Y199": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "LIOI3"
                },
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                "words": 2
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 1,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y199": "IDELAYE2",
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            "OLOGIC_X0Y199": "OLOGICE3"
        },
        "type": "LIOI3_SING"
    },
    "LIOI3_TBYTESRC_X0Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 200,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y7": "IDELAYE2",
            "IDELAY_X0Y8": "IDELAYE2",
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            "OLOGIC_X0Y7": "OLOGICE3",
            "OLOGIC_X0Y8": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
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                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 188,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y19": "IDELAYE2",
            "IDELAY_X0Y20": "IDELAYE2",
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            "ILOGIC_X0Y20": "ILOGICE3",
            "OLOGIC_X0Y19": "OLOGICE3",
            "OLOGIC_X0Y20": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 175,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y31": "IDELAYE2",
            "IDELAY_X0Y32": "IDELAYE2",
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            "ILOGIC_X0Y32": "ILOGICE3",
            "OLOGIC_X0Y31": "OLOGICE3",
            "OLOGIC_X0Y32": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 163,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y43": "IDELAYE2",
            "IDELAY_X0Y44": "IDELAYE2",
            "ILOGIC_X0Y43": "ILOGICE3",
            "ILOGIC_X0Y44": "ILOGICE3",
            "OLOGIC_X0Y43": "OLOGICE3",
            "OLOGIC_X0Y44": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 148,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y57": "IDELAYE2",
            "IDELAY_X0Y58": "IDELAYE2",
            "ILOGIC_X0Y57": "ILOGICE3",
            "ILOGIC_X0Y58": "ILOGICE3",
            "OLOGIC_X0Y57": "OLOGICE3",
            "OLOGIC_X0Y58": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y69": "IDELAYE2",
            "IDELAY_X0Y70": "IDELAYE2",
            "ILOGIC_X0Y69": "ILOGICE3",
            "ILOGIC_X0Y70": "ILOGICE3",
            "OLOGIC_X0Y69": "OLOGICE3",
            "OLOGIC_X0Y70": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y81": "IDELAYE2",
            "IDELAY_X0Y82": "IDELAYE2",
            "ILOGIC_X0Y81": "ILOGICE3",
            "ILOGIC_X0Y82": "ILOGICE3",
            "OLOGIC_X0Y81": "OLOGICE3",
            "OLOGIC_X0Y82": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y93": "IDELAYE2",
            "IDELAY_X0Y94": "IDELAYE2",
            "ILOGIC_X0Y93": "ILOGICE3",
            "ILOGIC_X0Y94": "ILOGICE3",
            "OLOGIC_X0Y93": "OLOGICE3",
            "OLOGIC_X0Y94": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y107": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 96,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y107": "IDELAYE2",
            "IDELAY_X0Y108": "IDELAYE2",
            "ILOGIC_X0Y107": "ILOGICE3",
            "ILOGIC_X0Y108": "ILOGICE3",
            "OLOGIC_X0Y107": "OLOGICE3",
            "OLOGIC_X0Y108": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y119": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 84,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y119": "IDELAYE2",
            "IDELAY_X0Y120": "IDELAYE2",
            "ILOGIC_X0Y119": "ILOGICE3",
            "ILOGIC_X0Y120": "ILOGICE3",
            "OLOGIC_X0Y119": "OLOGICE3",
            "OLOGIC_X0Y120": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y131": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 71,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y131": "IDELAYE2",
            "IDELAY_X0Y132": "IDELAYE2",
            "ILOGIC_X0Y131": "ILOGICE3",
            "ILOGIC_X0Y132": "ILOGICE3",
            "OLOGIC_X0Y131": "OLOGICE3",
            "OLOGIC_X0Y132": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y143": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 59,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y143": "IDELAYE2",
            "IDELAY_X0Y144": "IDELAYE2",
            "ILOGIC_X0Y143": "ILOGICE3",
            "ILOGIC_X0Y144": "ILOGICE3",
            "OLOGIC_X0Y143": "OLOGICE3",
            "OLOGIC_X0Y144": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y157": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 44,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y157": "IDELAYE2",
            "IDELAY_X0Y158": "IDELAYE2",
            "ILOGIC_X0Y157": "ILOGICE3",
            "ILOGIC_X0Y158": "ILOGICE3",
            "OLOGIC_X0Y157": "OLOGICE3",
            "OLOGIC_X0Y158": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y169": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 32,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y169": "IDELAYE2",
            "IDELAY_X0Y170": "IDELAYE2",
            "ILOGIC_X0Y169": "ILOGICE3",
            "ILOGIC_X0Y170": "ILOGICE3",
            "OLOGIC_X0Y169": "OLOGICE3",
            "OLOGIC_X0Y170": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y181": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 19,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y181": "IDELAYE2",
            "IDELAY_X0Y182": "IDELAYE2",
            "ILOGIC_X0Y181": "ILOGICE3",
            "ILOGIC_X0Y182": "ILOGICE3",
            "OLOGIC_X0Y181": "OLOGICE3",
            "OLOGIC_X0Y182": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTESRC_X0Y193": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 7,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y193": "IDELAYE2",
            "IDELAY_X0Y194": "IDELAYE2",
            "ILOGIC_X0Y193": "ILOGICE3",
            "ILOGIC_X0Y194": "ILOGICE3",
            "OLOGIC_X0Y193": "OLOGICE3",
            "OLOGIC_X0Y194": "OLOGICE3"
        },
        "type": "LIOI3_TBYTESRC"
    },
    "LIOI3_TBYTETERM_X0Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 194,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y13": "IDELAYE2",
            "IDELAY_X0Y14": "IDELAYE2",
            "ILOGIC_X0Y13": "ILOGICE3",
            "ILOGIC_X0Y14": "ILOGICE3",
            "OLOGIC_X0Y13": "OLOGICE3",
            "OLOGIC_X0Y14": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 1,
        "grid_y": 169,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y37": "IDELAYE2",
            "IDELAY_X0Y38": "IDELAYE2",
            "ILOGIC_X0Y37": "ILOGICE3",
            "ILOGIC_X0Y38": "ILOGICE3",
            "OLOGIC_X0Y37": "OLOGICE3",
            "OLOGIC_X0Y38": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 142,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y63": "IDELAYE2",
            "IDELAY_X0Y64": "IDELAYE2",
            "ILOGIC_X0Y63": "ILOGICE3",
            "ILOGIC_X0Y64": "ILOGICE3",
            "OLOGIC_X0Y63": "OLOGICE3",
            "OLOGIC_X0Y64": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 117,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y87": "IDELAYE2",
            "IDELAY_X0Y88": "IDELAYE2",
            "ILOGIC_X0Y87": "ILOGICE3",
            "ILOGIC_X0Y88": "ILOGICE3",
            "OLOGIC_X0Y87": "OLOGICE3",
            "OLOGIC_X0Y88": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y113": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 90,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y113": "IDELAYE2",
            "IDELAY_X0Y114": "IDELAYE2",
            "ILOGIC_X0Y113": "ILOGICE3",
            "ILOGIC_X0Y114": "ILOGICE3",
            "OLOGIC_X0Y113": "OLOGICE3",
            "OLOGIC_X0Y114": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y137": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 65,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y137": "IDELAYE2",
            "IDELAY_X0Y138": "IDELAYE2",
            "ILOGIC_X0Y137": "ILOGICE3",
            "ILOGIC_X0Y138": "ILOGICE3",
            "OLOGIC_X0Y137": "OLOGICE3",
            "OLOGIC_X0Y138": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y163": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 38,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y163": "IDELAYE2",
            "IDELAY_X0Y164": "IDELAYE2",
            "ILOGIC_X0Y163": "ILOGICE3",
            "ILOGIC_X0Y164": "ILOGICE3",
            "OLOGIC_X0Y163": "OLOGICE3",
            "OLOGIC_X0Y164": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_TBYTETERM_X0Y187": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
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        "pin_functions": {},
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            "IDELAY_X0Y187": "IDELAYE2",
            "IDELAY_X0Y188": "IDELAYE2",
            "ILOGIC_X0Y187": "ILOGICE3",
            "ILOGIC_X0Y188": "ILOGICE3",
            "OLOGIC_X0Y187": "OLOGICE3",
            "OLOGIC_X0Y188": "OLOGICE3"
        },
        "type": "LIOI3_TBYTETERM"
    },
    "LIOI3_X0Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
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        "pin_functions": {},
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            "ILOGIC_X0Y2": "ILOGICE3",
            "OLOGIC_X0Y1": "OLOGICE3",
            "OLOGIC_X0Y2": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
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                "words": 4
            }
        },
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        "pin_functions": {},
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            "IDELAY_X0Y3": "IDELAYE2",
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            "ILOGIC_X0Y4": "ILOGICE3",
            "OLOGIC_X0Y3": "OLOGICE3",
            "OLOGIC_X0Y4": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y5": "IDELAYE2",
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            "OLOGIC_X0Y5": "OLOGICE3",
            "OLOGIC_X0Y6": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y9": "IDELAYE2",
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            "ILOGIC_X0Y10": "ILOGICE3",
            "OLOGIC_X0Y9": "OLOGICE3",
            "OLOGIC_X0Y10": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "IDELAY_X0Y11": "IDELAYE2",
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            "OLOGIC_X0Y11": "OLOGICE3",
            "OLOGIC_X0Y12": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "IDELAY_X0Y15": "IDELAYE2",
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            "ILOGIC_X0Y16": "ILOGICE3",
            "OLOGIC_X0Y15": "OLOGICE3",
            "OLOGIC_X0Y16": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
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                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y17": "IDELAYE2",
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            "ILOGIC_X0Y18": "ILOGICE3",
            "OLOGIC_X0Y17": "OLOGICE3",
            "OLOGIC_X0Y18": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "IDELAY_X0Y21": "IDELAYE2",
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            "ILOGIC_X0Y22": "ILOGICE3",
            "OLOGIC_X0Y21": "OLOGICE3",
            "OLOGIC_X0Y22": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
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                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y23": "IDELAYE2",
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            "ILOGIC_X0Y24": "ILOGICE3",
            "OLOGIC_X0Y23": "OLOGICE3",
            "OLOGIC_X0Y24": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "IDELAY_X0Y25": "IDELAYE2",
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            "OLOGIC_X0Y25": "OLOGICE3",
            "OLOGIC_X0Y26": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y27": "IDELAYE2",
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            "ILOGIC_X0Y28": "ILOGICE3",
            "OLOGIC_X0Y27": "OLOGICE3",
            "OLOGIC_X0Y28": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y29": "IDELAYE2",
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            "ILOGIC_X0Y30": "ILOGICE3",
            "OLOGIC_X0Y29": "OLOGICE3",
            "OLOGIC_X0Y30": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y33": "IDELAYE2",
            "IDELAY_X0Y34": "IDELAYE2",
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            "ILOGIC_X0Y34": "ILOGICE3",
            "OLOGIC_X0Y33": "OLOGICE3",
            "OLOGIC_X0Y34": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y35": "IDELAYE2",
            "IDELAY_X0Y36": "IDELAYE2",
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            "ILOGIC_X0Y36": "ILOGICE3",
            "OLOGIC_X0Y35": "OLOGICE3",
            "OLOGIC_X0Y36": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y39": "IDELAYE2",
            "IDELAY_X0Y40": "IDELAYE2",
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            "ILOGIC_X0Y40": "ILOGICE3",
            "OLOGIC_X0Y39": "OLOGICE3",
            "OLOGIC_X0Y40": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y41": "IDELAYE2",
            "IDELAY_X0Y42": "IDELAYE2",
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            "ILOGIC_X0Y42": "ILOGICE3",
            "OLOGIC_X0Y41": "OLOGICE3",
            "OLOGIC_X0Y42": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y45": "IDELAYE2",
            "IDELAY_X0Y46": "IDELAYE2",
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            "ILOGIC_X0Y46": "ILOGICE3",
            "OLOGIC_X0Y45": "OLOGICE3",
            "OLOGIC_X0Y46": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00420000",
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                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y47": "IDELAYE2",
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            "ILOGIC_X0Y48": "ILOGICE3",
            "OLOGIC_X0Y47": "OLOGICE3",
            "OLOGIC_X0Y48": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "IDELAY_X0Y51": "IDELAYE2",
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            "ILOGIC_X0Y52": "ILOGICE3",
            "OLOGIC_X0Y51": "OLOGICE3",
            "OLOGIC_X0Y52": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y53": "IDELAYE2",
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            "ILOGIC_X0Y54": "ILOGICE3",
            "OLOGIC_X0Y53": "OLOGICE3",
            "OLOGIC_X0Y54": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 150,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y55": "IDELAYE2",
            "IDELAY_X0Y56": "IDELAYE2",
            "ILOGIC_X0Y55": "ILOGICE3",
            "ILOGIC_X0Y56": "ILOGICE3",
            "OLOGIC_X0Y55": "OLOGICE3",
            "OLOGIC_X0Y56": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y59": "IDELAYE2",
            "IDELAY_X0Y60": "IDELAYE2",
            "ILOGIC_X0Y59": "ILOGICE3",
            "ILOGIC_X0Y60": "ILOGICE3",
            "OLOGIC_X0Y59": "OLOGICE3",
            "OLOGIC_X0Y60": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y61": "IDELAYE2",
            "IDELAY_X0Y62": "IDELAYE2",
            "ILOGIC_X0Y61": "ILOGICE3",
            "ILOGIC_X0Y62": "ILOGICE3",
            "OLOGIC_X0Y61": "OLOGICE3",
            "OLOGIC_X0Y62": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 140,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y65": "IDELAYE2",
            "IDELAY_X0Y66": "IDELAYE2",
            "ILOGIC_X0Y65": "ILOGICE3",
            "ILOGIC_X0Y66": "ILOGICE3",
            "OLOGIC_X0Y65": "OLOGICE3",
            "OLOGIC_X0Y66": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 138,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y67": "IDELAYE2",
            "IDELAY_X0Y68": "IDELAYE2",
            "ILOGIC_X0Y67": "ILOGICE3",
            "ILOGIC_X0Y68": "ILOGICE3",
            "OLOGIC_X0Y67": "OLOGICE3",
            "OLOGIC_X0Y68": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y71": "IDELAYE2",
            "IDELAY_X0Y72": "IDELAYE2",
            "ILOGIC_X0Y71": "ILOGICE3",
            "ILOGIC_X0Y72": "ILOGICE3",
            "OLOGIC_X0Y71": "OLOGICE3",
            "OLOGIC_X0Y72": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y73": "IDELAYE2",
            "IDELAY_X0Y74": "IDELAYE2",
            "ILOGIC_X0Y73": "ILOGICE3",
            "ILOGIC_X0Y74": "ILOGICE3",
            "OLOGIC_X0Y73": "OLOGICE3",
            "OLOGIC_X0Y74": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 51,
                "words": 4
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        },
        "clock_region": "X0Y1",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y75": "IDELAYE2",
            "IDELAY_X0Y76": "IDELAYE2",
            "ILOGIC_X0Y75": "ILOGICE3",
            "ILOGIC_X0Y76": "ILOGICE3",
            "OLOGIC_X0Y75": "OLOGICE3",
            "OLOGIC_X0Y76": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
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        "pin_functions": {},
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            "IDELAY_X0Y77": "IDELAYE2",
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            "ILOGIC_X0Y78": "ILOGICE3",
            "OLOGIC_X0Y77": "OLOGICE3",
            "OLOGIC_X0Y78": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y79": "IDELAYE2",
            "IDELAY_X0Y80": "IDELAYE2",
            "ILOGIC_X0Y79": "ILOGICE3",
            "ILOGIC_X0Y80": "ILOGICE3",
            "OLOGIC_X0Y79": "OLOGICE3",
            "OLOGIC_X0Y80": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
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        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y83": "IDELAYE2",
            "IDELAY_X0Y84": "IDELAYE2",
            "ILOGIC_X0Y83": "ILOGICE3",
            "ILOGIC_X0Y84": "ILOGICE3",
            "OLOGIC_X0Y83": "OLOGICE3",
            "OLOGIC_X0Y84": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 119,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y85": "IDELAYE2",
            "IDELAY_X0Y86": "IDELAYE2",
            "ILOGIC_X0Y85": "ILOGICE3",
            "ILOGIC_X0Y86": "ILOGICE3",
            "OLOGIC_X0Y85": "OLOGICE3",
            "OLOGIC_X0Y86": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 115,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y89": "IDELAYE2",
            "IDELAY_X0Y90": "IDELAYE2",
            "ILOGIC_X0Y89": "ILOGICE3",
            "ILOGIC_X0Y90": "ILOGICE3",
            "OLOGIC_X0Y89": "OLOGICE3",
            "OLOGIC_X0Y90": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 113,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y91": "IDELAYE2",
            "IDELAY_X0Y92": "IDELAYE2",
            "ILOGIC_X0Y91": "ILOGICE3",
            "ILOGIC_X0Y92": "ILOGICE3",
            "OLOGIC_X0Y91": "OLOGICE3",
            "OLOGIC_X0Y92": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 109,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y95": "IDELAYE2",
            "IDELAY_X0Y96": "IDELAYE2",
            "ILOGIC_X0Y95": "ILOGICE3",
            "ILOGIC_X0Y96": "ILOGICE3",
            "OLOGIC_X0Y95": "OLOGICE3",
            "OLOGIC_X0Y96": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 1,
        "grid_y": 107,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y97": "IDELAYE2",
            "IDELAY_X0Y98": "IDELAYE2",
            "ILOGIC_X0Y97": "ILOGICE3",
            "ILOGIC_X0Y98": "ILOGICE3",
            "OLOGIC_X0Y97": "OLOGICE3",
            "OLOGIC_X0Y98": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y101": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 102,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y101": "IDELAYE2",
            "IDELAY_X0Y102": "IDELAYE2",
            "ILOGIC_X0Y101": "ILOGICE3",
            "ILOGIC_X0Y102": "ILOGICE3",
            "OLOGIC_X0Y101": "OLOGICE3",
            "OLOGIC_X0Y102": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y103": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 100,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y103": "IDELAYE2",
            "IDELAY_X0Y104": "IDELAYE2",
            "ILOGIC_X0Y103": "ILOGICE3",
            "ILOGIC_X0Y104": "ILOGICE3",
            "OLOGIC_X0Y103": "OLOGICE3",
            "OLOGIC_X0Y104": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y105": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 98,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y105": "IDELAYE2",
            "IDELAY_X0Y106": "IDELAYE2",
            "ILOGIC_X0Y105": "ILOGICE3",
            "ILOGIC_X0Y106": "ILOGICE3",
            "OLOGIC_X0Y105": "OLOGICE3",
            "OLOGIC_X0Y106": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y109": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 94,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y109": "IDELAYE2",
            "IDELAY_X0Y110": "IDELAYE2",
            "ILOGIC_X0Y109": "ILOGICE3",
            "ILOGIC_X0Y110": "ILOGICE3",
            "OLOGIC_X0Y109": "OLOGICE3",
            "OLOGIC_X0Y110": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y111": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 92,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y111": "IDELAYE2",
            "IDELAY_X0Y112": "IDELAYE2",
            "ILOGIC_X0Y111": "ILOGICE3",
            "ILOGIC_X0Y112": "ILOGICE3",
            "OLOGIC_X0Y111": "OLOGICE3",
            "OLOGIC_X0Y112": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y115": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 88,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y115": "IDELAYE2",
            "IDELAY_X0Y116": "IDELAYE2",
            "ILOGIC_X0Y115": "ILOGICE3",
            "ILOGIC_X0Y116": "ILOGICE3",
            "OLOGIC_X0Y115": "OLOGICE3",
            "OLOGIC_X0Y116": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y117": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 86,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y117": "IDELAYE2",
            "IDELAY_X0Y118": "IDELAYE2",
            "ILOGIC_X0Y117": "ILOGICE3",
            "ILOGIC_X0Y118": "ILOGICE3",
            "OLOGIC_X0Y117": "OLOGICE3",
            "OLOGIC_X0Y118": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y121": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 82,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y121": "IDELAYE2",
            "IDELAY_X0Y122": "IDELAYE2",
            "ILOGIC_X0Y121": "ILOGICE3",
            "ILOGIC_X0Y122": "ILOGICE3",
            "OLOGIC_X0Y121": "OLOGICE3",
            "OLOGIC_X0Y122": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y123": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 80,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y123": "IDELAYE2",
            "IDELAY_X0Y124": "IDELAYE2",
            "ILOGIC_X0Y123": "ILOGICE3",
            "ILOGIC_X0Y124": "ILOGICE3",
            "OLOGIC_X0Y123": "OLOGICE3",
            "OLOGIC_X0Y124": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y125": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 77,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y125": "IDELAYE2",
            "IDELAY_X0Y126": "IDELAYE2",
            "ILOGIC_X0Y125": "ILOGICE3",
            "ILOGIC_X0Y126": "ILOGICE3",
            "OLOGIC_X0Y125": "OLOGICE3",
            "OLOGIC_X0Y126": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y127": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 75,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y127": "IDELAYE2",
            "IDELAY_X0Y128": "IDELAYE2",
            "ILOGIC_X0Y127": "ILOGICE3",
            "ILOGIC_X0Y128": "ILOGICE3",
            "OLOGIC_X0Y127": "OLOGICE3",
            "OLOGIC_X0Y128": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y129": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 73,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y129": "IDELAYE2",
            "IDELAY_X0Y130": "IDELAYE2",
            "ILOGIC_X0Y129": "ILOGICE3",
            "ILOGIC_X0Y130": "ILOGICE3",
            "OLOGIC_X0Y129": "OLOGICE3",
            "OLOGIC_X0Y130": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y133": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 69,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y133": "IDELAYE2",
            "IDELAY_X0Y134": "IDELAYE2",
            "ILOGIC_X0Y133": "ILOGICE3",
            "ILOGIC_X0Y134": "ILOGICE3",
            "OLOGIC_X0Y133": "OLOGICE3",
            "OLOGIC_X0Y134": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y135": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 67,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y135": "IDELAYE2",
            "IDELAY_X0Y136": "IDELAYE2",
            "ILOGIC_X0Y135": "ILOGICE3",
            "ILOGIC_X0Y136": "ILOGICE3",
            "OLOGIC_X0Y135": "OLOGICE3",
            "OLOGIC_X0Y136": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y139": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 63,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y139": "IDELAYE2",
            "IDELAY_X0Y140": "IDELAYE2",
            "ILOGIC_X0Y139": "ILOGICE3",
            "ILOGIC_X0Y140": "ILOGICE3",
            "OLOGIC_X0Y139": "OLOGICE3",
            "OLOGIC_X0Y140": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y141": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 61,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y141": "IDELAYE2",
            "IDELAY_X0Y142": "IDELAYE2",
            "ILOGIC_X0Y141": "ILOGICE3",
            "ILOGIC_X0Y142": "ILOGICE3",
            "OLOGIC_X0Y141": "OLOGICE3",
            "OLOGIC_X0Y142": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y145": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 57,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y145": "IDELAYE2",
            "IDELAY_X0Y146": "IDELAYE2",
            "ILOGIC_X0Y145": "ILOGICE3",
            "ILOGIC_X0Y146": "ILOGICE3",
            "OLOGIC_X0Y145": "OLOGICE3",
            "OLOGIC_X0Y146": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y147": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000000",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X0Y2",
        "grid_x": 1,
        "grid_y": 55,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y147": "IDELAYE2",
            "IDELAY_X0Y148": "IDELAYE2",
            "ILOGIC_X0Y147": "ILOGICE3",
            "ILOGIC_X0Y148": "ILOGICE3",
            "OLOGIC_X0Y147": "OLOGICE3",
            "OLOGIC_X0Y148": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y151": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 50,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y151": "IDELAYE2",
            "IDELAY_X0Y152": "IDELAYE2",
            "ILOGIC_X0Y151": "ILOGICE3",
            "ILOGIC_X0Y152": "ILOGICE3",
            "OLOGIC_X0Y151": "OLOGICE3",
            "OLOGIC_X0Y152": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y153": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 48,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y153": "IDELAYE2",
            "IDELAY_X0Y154": "IDELAYE2",
            "ILOGIC_X0Y153": "ILOGICE3",
            "ILOGIC_X0Y154": "ILOGICE3",
            "OLOGIC_X0Y153": "OLOGICE3",
            "OLOGIC_X0Y154": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y155": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 46,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y155": "IDELAYE2",
            "IDELAY_X0Y156": "IDELAYE2",
            "ILOGIC_X0Y155": "ILOGICE3",
            "ILOGIC_X0Y156": "ILOGICE3",
            "OLOGIC_X0Y155": "OLOGICE3",
            "OLOGIC_X0Y156": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y159": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 42,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y159": "IDELAYE2",
            "IDELAY_X0Y160": "IDELAYE2",
            "ILOGIC_X0Y159": "ILOGICE3",
            "ILOGIC_X0Y160": "ILOGICE3",
            "OLOGIC_X0Y159": "OLOGICE3",
            "OLOGIC_X0Y160": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y161": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 40,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y161": "IDELAYE2",
            "IDELAY_X0Y162": "IDELAYE2",
            "ILOGIC_X0Y161": "ILOGICE3",
            "ILOGIC_X0Y162": "ILOGICE3",
            "OLOGIC_X0Y161": "OLOGICE3",
            "OLOGIC_X0Y162": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y165": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 36,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y165": "IDELAYE2",
            "IDELAY_X0Y166": "IDELAYE2",
            "ILOGIC_X0Y165": "ILOGICE3",
            "ILOGIC_X0Y166": "ILOGICE3",
            "OLOGIC_X0Y165": "OLOGICE3",
            "OLOGIC_X0Y166": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y167": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 34,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y167": "IDELAYE2",
            "IDELAY_X0Y168": "IDELAYE2",
            "ILOGIC_X0Y167": "ILOGICE3",
            "ILOGIC_X0Y168": "ILOGICE3",
            "OLOGIC_X0Y167": "OLOGICE3",
            "OLOGIC_X0Y168": "OLOGICE3"
        },
        "type": "LIOI3"
    },
    "LIOI3_X0Y171": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00020000",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X0Y3",
        "grid_x": 1,
        "grid_y": 30,
        "pin_functions": {},
        "sites": {
            "IDELAY_X0Y171": "IDELAYE2",
            "IDELAY_X0Y172": "IDELAYE2",
            "ILOGIC_X0Y171": "ILOGICE3",
            "ILOGIC_X0Y172": "ILOGICE3",
            "OLOGIC_X0Y171": "OLOGICE3",
            "OLOGIC_X0Y172": "OLOGICE3"
        },
        "type": "LIOI3"
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            "IOB_X1Y2": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y3": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 204,
        "pin_functions": {
            "IOB_X1Y3": "IO_L23N_T3_33",
            "IOB_X1Y4": "IO_L23P_T3_33"
        },
        "sites": {
            "IOB_X1Y3": "IOB18S",
            "IOB_X1Y4": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y5": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 202,
        "pin_functions": {
            "IOB_X1Y5": "IO_L22N_T3_33",
            "IOB_X1Y6": "IO_L22P_T3_33"
        },
        "sites": {
            "IOB_X1Y5": "IOB18S",
            "IOB_X1Y6": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y7": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 200,
        "pin_functions": {
            "IOB_X1Y7": "IO_L21N_T3_DQS_33",
            "IOB_X1Y8": "IO_L21P_T3_DQS_33"
        },
        "sites": {
            "IOB_X1Y7": "IOB18S",
            "IOB_X1Y8": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y9": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 198,
        "pin_functions": {
            "IOB_X1Y9": "IO_L20N_T3_33",
            "IOB_X1Y10": "IO_L20P_T3_33"
        },
        "sites": {
            "IOB_X1Y9": "IOB18S",
            "IOB_X1Y10": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y11": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 196,
        "pin_functions": {
            "IOB_X1Y11": "IO_L19N_T3_VREF_33",
            "IOB_X1Y12": "IO_L19P_T3_33"
        },
        "sites": {
            "IOB_X1Y11": "IOB18S",
            "IOB_X1Y12": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y13": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 194,
        "pin_functions": {
            "IOB_X1Y13": "IO_L18N_T2_33",
            "IOB_X1Y14": "IO_L18P_T2_33"
        },
        "sites": {
            "IOB_X1Y13": "IOB18S",
            "IOB_X1Y14": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y15": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 192,
        "pin_functions": {
            "IOB_X1Y15": "IO_L17N_T2_33",
            "IOB_X1Y16": "IO_L17P_T2_33"
        },
        "sites": {
            "IOB_X1Y15": "IOB18S",
            "IOB_X1Y16": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y17": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 190,
        "pin_functions": {
            "IOB_X1Y17": "IO_L16N_T2_33",
            "IOB_X1Y18": "IO_L16P_T2_33"
        },
        "sites": {
            "IOB_X1Y17": "IOB18S",
            "IOB_X1Y18": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y19": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 188,
        "pin_functions": {
            "IOB_X1Y19": "IO_L15N_T2_DQS_33",
            "IOB_X1Y20": "IO_L15P_T2_DQS_33"
        },
        "sites": {
            "IOB_X1Y19": "IOB18S",
            "IOB_X1Y20": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y21": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 186,
        "pin_functions": {
            "IOB_X1Y21": "IO_L14N_T2_SRCC_33",
            "IOB_X1Y22": "IO_L14P_T2_SRCC_33"
        },
        "sites": {
            "IOB_X1Y21": "IOB18S",
            "IOB_X1Y22": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y23": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 184,
        "pin_functions": {
            "IOB_X1Y23": "IO_L13N_T2_MRCC_33",
            "IOB_X1Y24": "IO_L13P_T2_MRCC_33"
        },
        "sites": {
            "IOB_X1Y23": "IOB18S",
            "IOB_X1Y24": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y25": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 181,
        "pin_functions": {
            "IOB_X1Y25": "IO_L12N_T1_MRCC_33",
            "IOB_X1Y26": "IO_L12P_T1_MRCC_33"
        },
        "sites": {
            "IOB_X1Y25": "IOB18S",
            "IOB_X1Y26": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y27": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 179,
        "pin_functions": {
            "IOB_X1Y27": "IO_L11N_T1_SRCC_33",
            "IOB_X1Y28": "IO_L11P_T1_SRCC_33"
        },
        "sites": {
            "IOB_X1Y27": "IOB18S",
            "IOB_X1Y28": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y29": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 177,
        "pin_functions": {
            "IOB_X1Y29": "IO_L10N_T1_33",
            "IOB_X1Y30": "IO_L10P_T1_33"
        },
        "sites": {
            "IOB_X1Y29": "IOB18S",
            "IOB_X1Y30": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y31": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 175,
        "pin_functions": {
            "IOB_X1Y31": "IO_L9N_T1_DQS_33",
            "IOB_X1Y32": "IO_L9P_T1_DQS_33"
        },
        "sites": {
            "IOB_X1Y31": "IOB18S",
            "IOB_X1Y32": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y33": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 173,
        "pin_functions": {
            "IOB_X1Y33": "IO_L8N_T1_33",
            "IOB_X1Y34": "IO_L8P_T1_33"
        },
        "sites": {
            "IOB_X1Y33": "IOB18S",
            "IOB_X1Y34": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y35": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 171,
        "pin_functions": {
            "IOB_X1Y35": "IO_L7N_T1_33",
            "IOB_X1Y36": "IO_L7P_T1_33"
        },
        "sites": {
            "IOB_X1Y35": "IOB18S",
            "IOB_X1Y36": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y37": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 169,
        "pin_functions": {
            "IOB_X1Y37": "IO_L6N_T0_VREF_33",
            "IOB_X1Y38": "IO_L6P_T0_33"
        },
        "sites": {
            "IOB_X1Y37": "IOB18S",
            "IOB_X1Y38": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y39": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 167,
        "pin_functions": {
            "IOB_X1Y39": "IO_L5N_T0_33",
            "IOB_X1Y40": "IO_L5P_T0_33"
        },
        "sites": {
            "IOB_X1Y39": "IOB18S",
            "IOB_X1Y40": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y41": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 165,
        "pin_functions": {
            "IOB_X1Y41": "IO_L4N_T0_33",
            "IOB_X1Y42": "IO_L4P_T0_33"
        },
        "sites": {
            "IOB_X1Y41": "IOB18S",
            "IOB_X1Y42": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y43": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 163,
        "pin_functions": {
            "IOB_X1Y43": "IO_L3N_T0_DQS_33",
            "IOB_X1Y44": "IO_L3P_T0_DQS_33"
        },
        "sites": {
            "IOB_X1Y43": "IOB18S",
            "IOB_X1Y44": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y45": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 161,
        "pin_functions": {
            "IOB_X1Y45": "IO_L2N_T0_33",
            "IOB_X1Y46": "IO_L2P_T0_33"
        },
        "sites": {
            "IOB_X1Y45": "IOB18S",
            "IOB_X1Y46": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y47": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 116,
        "grid_y": 159,
        "pin_functions": {
            "IOB_X1Y47": "IO_L1N_T0_33",
            "IOB_X1Y48": "IO_L1P_T0_33"
        },
        "sites": {
            "IOB_X1Y47": "IOB18S",
            "IOB_X1Y48": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y51": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 154,
        "pin_functions": {
            "IOB_X1Y51": "IO_L24N_T3_34",
            "IOB_X1Y52": "IO_L24P_T3_34"
        },
        "sites": {
            "IOB_X1Y51": "IOB18S",
            "IOB_X1Y52": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y53": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 152,
        "pin_functions": {
            "IOB_X1Y53": "IO_L23N_T3_34",
            "IOB_X1Y54": "IO_L23P_T3_34"
        },
        "sites": {
            "IOB_X1Y53": "IOB18S",
            "IOB_X1Y54": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y55": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 150,
        "pin_functions": {
            "IOB_X1Y55": "IO_L22N_T3_34",
            "IOB_X1Y56": "IO_L22P_T3_34"
        },
        "sites": {
            "IOB_X1Y55": "IOB18S",
            "IOB_X1Y56": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y57": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 148,
        "pin_functions": {
            "IOB_X1Y57": "IO_L21N_T3_DQS_34",
            "IOB_X1Y58": "IO_L21P_T3_DQS_34"
        },
        "sites": {
            "IOB_X1Y57": "IOB18S",
            "IOB_X1Y58": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y59": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 146,
        "pin_functions": {
            "IOB_X1Y59": "IO_L20N_T3_34",
            "IOB_X1Y60": "IO_L20P_T3_34"
        },
        "sites": {
            "IOB_X1Y59": "IOB18S",
            "IOB_X1Y60": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y61": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 144,
        "pin_functions": {
            "IOB_X1Y61": "IO_L19N_T3_VREF_34",
            "IOB_X1Y62": "IO_L19P_T3_34"
        },
        "sites": {
            "IOB_X1Y61": "IOB18S",
            "IOB_X1Y62": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y63": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 142,
        "pin_functions": {
            "IOB_X1Y63": "IO_L18N_T2_34",
            "IOB_X1Y64": "IO_L18P_T2_34"
        },
        "sites": {
            "IOB_X1Y63": "IOB18S",
            "IOB_X1Y64": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y65": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 140,
        "pin_functions": {
            "IOB_X1Y65": "IO_L17N_T2_34",
            "IOB_X1Y66": "IO_L17P_T2_34"
        },
        "sites": {
            "IOB_X1Y65": "IOB18S",
            "IOB_X1Y66": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y67": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 138,
        "pin_functions": {
            "IOB_X1Y67": "IO_L16N_T2_34",
            "IOB_X1Y68": "IO_L16P_T2_34"
        },
        "sites": {
            "IOB_X1Y67": "IOB18S",
            "IOB_X1Y68": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y69": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 136,
        "pin_functions": {
            "IOB_X1Y69": "IO_L15N_T2_DQS_34",
            "IOB_X1Y70": "IO_L15P_T2_DQS_34"
        },
        "sites": {
            "IOB_X1Y69": "IOB18S",
            "IOB_X1Y70": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y71": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 134,
        "pin_functions": {
            "IOB_X1Y71": "IO_L14N_T2_SRCC_34",
            "IOB_X1Y72": "IO_L14P_T2_SRCC_34"
        },
        "sites": {
            "IOB_X1Y71": "IOB18S",
            "IOB_X1Y72": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y73": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 132,
        "pin_functions": {
            "IOB_X1Y73": "IO_L13N_T2_MRCC_34",
            "IOB_X1Y74": "IO_L13P_T2_MRCC_34"
        },
        "sites": {
            "IOB_X1Y73": "IOB18S",
            "IOB_X1Y74": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y75": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 129,
        "pin_functions": {
            "IOB_X1Y75": "IO_L12N_T1_MRCC_34",
            "IOB_X1Y76": "IO_L12P_T1_MRCC_34"
        },
        "sites": {
            "IOB_X1Y75": "IOB18S",
            "IOB_X1Y76": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y77": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 127,
        "pin_functions": {
            "IOB_X1Y77": "IO_L11N_T1_SRCC_34",
            "IOB_X1Y78": "IO_L11P_T1_SRCC_34"
        },
        "sites": {
            "IOB_X1Y77": "IOB18S",
            "IOB_X1Y78": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y79": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 125,
        "pin_functions": {
            "IOB_X1Y79": "IO_L10N_T1_34",
            "IOB_X1Y80": "IO_L10P_T1_34"
        },
        "sites": {
            "IOB_X1Y79": "IOB18S",
            "IOB_X1Y80": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y81": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 123,
        "pin_functions": {
            "IOB_X1Y81": "IO_L9N_T1_DQS_34",
            "IOB_X1Y82": "IO_L9P_T1_DQS_34"
        },
        "sites": {
            "IOB_X1Y81": "IOB18S",
            "IOB_X1Y82": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y83": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 121,
        "pin_functions": {
            "IOB_X1Y83": "IO_L8N_T1_34",
            "IOB_X1Y84": "IO_L8P_T1_34"
        },
        "sites": {
            "IOB_X1Y83": "IOB18S",
            "IOB_X1Y84": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y85": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 119,
        "pin_functions": {
            "IOB_X1Y85": "IO_L7N_T1_34",
            "IOB_X1Y86": "IO_L7P_T1_34"
        },
        "sites": {
            "IOB_X1Y85": "IOB18S",
            "IOB_X1Y86": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y87": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 117,
        "pin_functions": {
            "IOB_X1Y87": "IO_L6N_T0_VREF_34",
            "IOB_X1Y88": "IO_L6P_T0_34"
        },
        "sites": {
            "IOB_X1Y87": "IOB18S",
            "IOB_X1Y88": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y89": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 115,
        "pin_functions": {
            "IOB_X1Y89": "IO_L5N_T0_34",
            "IOB_X1Y90": "IO_L5P_T0_34"
        },
        "sites": {
            "IOB_X1Y89": "IOB18S",
            "IOB_X1Y90": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y91": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 113,
        "pin_functions": {
            "IOB_X1Y91": "IO_L4N_T0_34",
            "IOB_X1Y92": "IO_L4P_T0_34"
        },
        "sites": {
            "IOB_X1Y91": "IOB18S",
            "IOB_X1Y92": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y93": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 111,
        "pin_functions": {
            "IOB_X1Y93": "IO_L3N_T0_DQS_34",
            "IOB_X1Y94": "IO_L3P_T0_DQS_34"
        },
        "sites": {
            "IOB_X1Y93": "IOB18S",
            "IOB_X1Y94": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y95": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 109,
        "pin_functions": {
            "IOB_X1Y95": "IO_L2N_T0_34",
            "IOB_X1Y96": "IO_L2P_T0_34"
        },
        "sites": {
            "IOB_X1Y95": "IOB18S",
            "IOB_X1Y96": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOB18_X43Y97": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 116,
        "grid_y": 107,
        "pin_functions": {
            "IOB_X1Y97": "IO_L1N_T0_34",
            "IOB_X1Y98": "IO_L1P_T0_34"
        },
        "sites": {
            "IOB_X1Y97": "IOB18S",
            "IOB_X1Y98": "IOB18M"
        },
        "type": "RIOB18"
    },
    "RIOI_SING_X43Y0": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 207,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y0": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y0": "ILOGICE2",
            "ODELAY_X1Y0": "ODELAYE2",
            "OLOGIC_X1Y0": "OLOGICE2"
        },
        "type": "RIOI_SING"
    },
    "RIOI_SING_X43Y49": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 157,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y49": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y49": "ILOGICE2",
            "ODELAY_X1Y49": "ODELAYE2",
            "OLOGIC_X1Y49": "OLOGICE2"
        },
        "type": "RIOI_SING"
    },
    "RIOI_SING_X43Y50": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 155,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y50": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y50": "ILOGICE2",
            "ODELAY_X1Y50": "ODELAYE2",
            "OLOGIC_X1Y50": "OLOGICE2"
        },
        "type": "RIOI_SING"
    },
    "RIOI_SING_X43Y99": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 105,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y99": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y99": "ILOGICE2",
            "ODELAY_X1Y99": "ODELAYE2",
            "OLOGIC_X1Y99": "OLOGICE2"
        },
        "type": "RIOI_SING"
    },
    "RIOI_TBYTESRC_X43Y7": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 200,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y7": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y8": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y7": "ILOGICE2",
            "ILOGIC_X1Y8": "ILOGICE2",
            "ODELAY_X1Y7": "ODELAYE2",
            "ODELAY_X1Y8": "ODELAYE2",
            "OLOGIC_X1Y7": "OLOGICE2",
            "OLOGIC_X1Y8": "OLOGICE2"
        },
        "type": "RIOI_TBYTESRC"
    },
    "RIOI_TBYTESRC_X43Y19": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 188,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y19": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y20": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y19": "ILOGICE2",
            "ILOGIC_X1Y20": "ILOGICE2",
            "ODELAY_X1Y19": "ODELAYE2",
            "ODELAY_X1Y20": "ODELAYE2",
            "OLOGIC_X1Y19": "OLOGICE2",
            "OLOGIC_X1Y20": "OLOGICE2"
        },
        "type": "RIOI_TBYTESRC"
    },
    "RIOI_TBYTESRC_X43Y31": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 175,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y31": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y32": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y31": "ILOGICE2",
            "ILOGIC_X1Y32": "ILOGICE2",
            "ODELAY_X1Y31": "ODELAYE2",
            "ODELAY_X1Y32": "ODELAYE2",
            "OLOGIC_X1Y31": "OLOGICE2",
            "OLOGIC_X1Y32": "OLOGICE2"
        },
        "type": "RIOI_TBYTESRC"
    },
    "RIOI_TBYTESRC_X43Y43": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 163,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y43": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y44": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y43": "ILOGICE2",
            "ILOGIC_X1Y44": "ILOGICE2",
            "ODELAY_X1Y43": "ODELAYE2",
            "ODELAY_X1Y44": "ODELAYE2",
            "OLOGIC_X1Y43": "OLOGICE2",
            "OLOGIC_X1Y44": "OLOGICE2"
        },
        "type": "RIOI_TBYTESRC"
    },
    "RIOI_TBYTESRC_X43Y57": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 148,
        "pin_functions": {},
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            "IDELAY_X1Y57": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y58": "IDELAYE2_FINEDELAY",
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            "ILOGIC_X1Y58": "ILOGICE2",
            "ODELAY_X1Y57": "ODELAYE2",
            "ODELAY_X1Y58": "ODELAYE2",
            "OLOGIC_X1Y57": "OLOGICE2",
            "OLOGIC_X1Y58": "OLOGICE2"
        },
        "type": "RIOI_TBYTESRC"
    },
    "RIOI_TBYTESRC_X43Y69": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 136,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y69": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y70": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y69": "ILOGICE2",
            "ILOGIC_X1Y70": "ILOGICE2",
            "ODELAY_X1Y69": "ODELAYE2",
            "ODELAY_X1Y70": "ODELAYE2",
            "OLOGIC_X1Y69": "OLOGICE2",
            "OLOGIC_X1Y70": "OLOGICE2"
        },
        "type": "RIOI_TBYTESRC"
    },
    "RIOI_TBYTESRC_X43Y81": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 123,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y81": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y82": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y81": "ILOGICE2",
            "ILOGIC_X1Y82": "ILOGICE2",
            "ODELAY_X1Y81": "ODELAYE2",
            "ODELAY_X1Y82": "ODELAYE2",
            "OLOGIC_X1Y81": "OLOGICE2",
            "OLOGIC_X1Y82": "OLOGICE2"
        },
        "type": "RIOI_TBYTESRC"
    },
    "RIOI_TBYTESRC_X43Y93": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 111,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y93": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y94": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y93": "ILOGICE2",
            "ILOGIC_X1Y94": "ILOGICE2",
            "ODELAY_X1Y93": "ODELAYE2",
            "ODELAY_X1Y94": "ODELAYE2",
            "OLOGIC_X1Y93": "OLOGICE2",
            "OLOGIC_X1Y94": "OLOGICE2"
        },
        "type": "RIOI_TBYTESRC"
    },
    "RIOI_TBYTETERM_X43Y13": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 194,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y13": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y14": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y13": "ILOGICE2",
            "ILOGIC_X1Y14": "ILOGICE2",
            "ODELAY_X1Y13": "ODELAYE2",
            "ODELAY_X1Y14": "ODELAYE2",
            "OLOGIC_X1Y13": "OLOGICE2",
            "OLOGIC_X1Y14": "OLOGICE2"
        },
        "type": "RIOI_TBYTETERM"
    },
    "RIOI_TBYTETERM_X43Y37": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 169,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y37": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y38": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y37": "ILOGICE2",
            "ILOGIC_X1Y38": "ILOGICE2",
            "ODELAY_X1Y37": "ODELAYE2",
            "ODELAY_X1Y38": "ODELAYE2",
            "OLOGIC_X1Y37": "OLOGICE2",
            "OLOGIC_X1Y38": "OLOGICE2"
        },
        "type": "RIOI_TBYTETERM"
    },
    "RIOI_TBYTETERM_X43Y63": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 142,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y63": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y64": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y63": "ILOGICE2",
            "ILOGIC_X1Y64": "ILOGICE2",
            "ODELAY_X1Y63": "ODELAYE2",
            "ODELAY_X1Y64": "ODELAYE2",
            "OLOGIC_X1Y63": "OLOGICE2",
            "OLOGIC_X1Y64": "OLOGICE2"
        },
        "type": "RIOI_TBYTETERM"
    },
    "RIOI_TBYTETERM_X43Y87": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 115,
        "grid_y": 117,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y87": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y88": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y87": "ILOGICE2",
            "ILOGIC_X1Y88": "ILOGICE2",
            "ODELAY_X1Y87": "ODELAYE2",
            "ODELAY_X1Y88": "ODELAYE2",
            "OLOGIC_X1Y87": "OLOGICE2",
            "OLOGIC_X1Y88": "OLOGICE2"
        },
        "type": "RIOI_TBYTETERM"
    },
    "RIOI_X43Y1": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 206,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y1": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y2": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y1": "ILOGICE2",
            "ILOGIC_X1Y2": "ILOGICE2",
            "ODELAY_X1Y1": "ODELAYE2",
            "ODELAY_X1Y2": "ODELAYE2",
            "OLOGIC_X1Y1": "OLOGICE2",
            "OLOGIC_X1Y2": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y3": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 204,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y3": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y4": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y3": "ILOGICE2",
            "ILOGIC_X1Y4": "ILOGICE2",
            "ODELAY_X1Y3": "ODELAYE2",
            "ODELAY_X1Y4": "ODELAYE2",
            "OLOGIC_X1Y3": "OLOGICE2",
            "OLOGIC_X1Y4": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y5": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 202,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y5": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y6": "IDELAYE2_FINEDELAY",
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            "ILOGIC_X1Y6": "ILOGICE2",
            "ODELAY_X1Y5": "ODELAYE2",
            "ODELAY_X1Y6": "ODELAYE2",
            "OLOGIC_X1Y5": "OLOGICE2",
            "OLOGIC_X1Y6": "OLOGICE2"
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        "type": "RIOI"
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    "RIOI_X43Y9": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 198,
        "pin_functions": {},
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            "IDELAY_X1Y9": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y10": "IDELAYE2_FINEDELAY",
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            "ILOGIC_X1Y10": "ILOGICE2",
            "ODELAY_X1Y9": "ODELAYE2",
            "ODELAY_X1Y10": "ODELAYE2",
            "OLOGIC_X1Y9": "OLOGICE2",
            "OLOGIC_X1Y10": "OLOGICE2"
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        "type": "RIOI"
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        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 196,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y11": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y12": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y11": "ILOGICE2",
            "ILOGIC_X1Y12": "ILOGICE2",
            "ODELAY_X1Y11": "ODELAYE2",
            "ODELAY_X1Y12": "ODELAYE2",
            "OLOGIC_X1Y11": "OLOGICE2",
            "OLOGIC_X1Y12": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y15": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 192,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y15": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y16": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y15": "ILOGICE2",
            "ILOGIC_X1Y16": "ILOGICE2",
            "ODELAY_X1Y15": "ODELAYE2",
            "ODELAY_X1Y16": "ODELAYE2",
            "OLOGIC_X1Y15": "OLOGICE2",
            "OLOGIC_X1Y16": "OLOGICE2"
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        "type": "RIOI"
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    "RIOI_X43Y17": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 190,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y17": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y18": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y17": "ILOGICE2",
            "ILOGIC_X1Y18": "ILOGICE2",
            "ODELAY_X1Y17": "ODELAYE2",
            "ODELAY_X1Y18": "ODELAYE2",
            "OLOGIC_X1Y17": "OLOGICE2",
            "OLOGIC_X1Y18": "OLOGICE2"
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        "type": "RIOI"
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    "RIOI_X43Y21": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 186,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y21": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y22": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y21": "ILOGICE2",
            "ILOGIC_X1Y22": "ILOGICE2",
            "ODELAY_X1Y21": "ODELAYE2",
            "ODELAY_X1Y22": "ODELAYE2",
            "OLOGIC_X1Y21": "OLOGICE2",
            "OLOGIC_X1Y22": "OLOGICE2"
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        "type": "RIOI"
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    "RIOI_X43Y23": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 184,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y23": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y24": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y23": "ILOGICE2",
            "ILOGIC_X1Y24": "ILOGICE2",
            "ODELAY_X1Y23": "ODELAYE2",
            "ODELAY_X1Y24": "ODELAYE2",
            "OLOGIC_X1Y23": "OLOGICE2",
            "OLOGIC_X1Y24": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y25": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 181,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y25": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y26": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y25": "ILOGICE2",
            "ILOGIC_X1Y26": "ILOGICE2",
            "ODELAY_X1Y25": "ODELAYE2",
            "ODELAY_X1Y26": "ODELAYE2",
            "OLOGIC_X1Y25": "OLOGICE2",
            "OLOGIC_X1Y26": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y27": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 179,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y27": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y28": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y27": "ILOGICE2",
            "ILOGIC_X1Y28": "ILOGICE2",
            "ODELAY_X1Y27": "ODELAYE2",
            "ODELAY_X1Y28": "ODELAYE2",
            "OLOGIC_X1Y27": "OLOGICE2",
            "OLOGIC_X1Y28": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y29": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 177,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y29": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y30": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y29": "ILOGICE2",
            "ILOGIC_X1Y30": "ILOGICE2",
            "ODELAY_X1Y29": "ODELAYE2",
            "ODELAY_X1Y30": "ODELAYE2",
            "OLOGIC_X1Y29": "OLOGICE2",
            "OLOGIC_X1Y30": "OLOGICE2"
        },
        "type": "RIOI"
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    "RIOI_X43Y33": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 173,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y33": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y34": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y33": "ILOGICE2",
            "ILOGIC_X1Y34": "ILOGICE2",
            "ODELAY_X1Y33": "ODELAYE2",
            "ODELAY_X1Y34": "ODELAYE2",
            "OLOGIC_X1Y33": "OLOGICE2",
            "OLOGIC_X1Y34": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y35": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 171,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y35": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y36": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y35": "ILOGICE2",
            "ILOGIC_X1Y36": "ILOGICE2",
            "ODELAY_X1Y35": "ODELAYE2",
            "ODELAY_X1Y36": "ODELAYE2",
            "OLOGIC_X1Y35": "OLOGICE2",
            "OLOGIC_X1Y36": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y39": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 167,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y39": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y40": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y39": "ILOGICE2",
            "ILOGIC_X1Y40": "ILOGICE2",
            "ODELAY_X1Y39": "ODELAYE2",
            "ODELAY_X1Y40": "ODELAYE2",
            "OLOGIC_X1Y39": "OLOGICE2",
            "OLOGIC_X1Y40": "OLOGICE2"
        },
        "type": "RIOI"
    },
    "RIOI_X43Y41": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 115,
        "grid_y": 165,
        "pin_functions": {},
        "sites": {
            "IDELAY_X1Y41": "IDELAYE2_FINEDELAY",
            "IDELAY_X1Y42": "IDELAYE2_FINEDELAY",
            "ILOGIC_X1Y41": "ILOGICE2",
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