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                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 40,
        "grid_y": 25,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X0Y30": "FIFO18E1",
            "RAMB18_X0Y31": "RAMB18E1",
            "RAMB36_X0Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 40,
        "grid_y": 20,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X0Y32": "FIFO18E1",
            "RAMB18_X0Y33": "RAMB18E1",
            "RAMB36_X0Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 40,
        "grid_y": 15,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X0Y34": "FIFO18E1",
            "RAMB18_X0Y35": "RAMB18E1",
            "RAMB36_X0Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 40,
        "grid_y": 10,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X0Y36": "FIFO18E1",
            "RAMB18_X0Y37": "RAMB18E1",
            "RAMB36_X0Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X4Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800100",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00000B00",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X0Y1",
        "grid_x": 40,
        "grid_y": 5,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X0Y38": "FIFO18E1",
            "RAMB18_X0Y39": "RAMB18E1",
            "RAMB36_X0Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 103,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y0": "FIFO18E1",
            "RAMB18_X1Y1": "RAMB18E1",
            "RAMB36_X1Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 98,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y2": "FIFO18E1",
            "RAMB18_X1Y3": "RAMB18E1",
            "RAMB36_X1Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 93,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y4": "FIFO18E1",
            "RAMB18_X1Y5": "RAMB18E1",
            "RAMB36_X1Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 88,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y6": "FIFO18E1",
            "RAMB18_X1Y7": "RAMB18E1",
            "RAMB36_X1Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 83,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y8": "FIFO18E1",
            "RAMB18_X1Y9": "RAMB18E1",
            "RAMB36_X1Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 77,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y10": "FIFO18E1",
            "RAMB18_X1Y11": "RAMB18E1",
            "RAMB36_X1Y5": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y30": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 72,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y12": "FIFO18E1",
            "RAMB18_X1Y13": "RAMB18E1",
            "RAMB36_X1Y6": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y35": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 67,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y14": "FIFO18E1",
            "RAMB18_X1Y15": "RAMB18E1",
            "RAMB36_X1Y7": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y40": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 62,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y16": "FIFO18E1",
            "RAMB18_X1Y17": "RAMB18E1",
            "RAMB36_X1Y8": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y45": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00180",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401500",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 89,
        "grid_y": 57,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y18": "FIFO18E1",
            "RAMB18_X1Y19": "RAMB18E1",
            "RAMB36_X1Y9": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y50": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 51,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y20": "FIFO18E1",
            "RAMB18_X1Y21": "RAMB18E1",
            "RAMB36_X1Y10": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y55": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 46,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y22": "FIFO18E1",
            "RAMB18_X1Y23": "RAMB18E1",
            "RAMB36_X1Y11": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y60": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 41,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y24": "FIFO18E1",
            "RAMB18_X1Y25": "RAMB18E1",
            "RAMB36_X1Y12": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y65": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 36,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y26": "FIFO18E1",
            "RAMB18_X1Y27": "RAMB18E1",
            "RAMB36_X1Y13": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y70": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 31,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y28": "FIFO18E1",
            "RAMB18_X1Y29": "RAMB18E1",
            "RAMB36_X1Y14": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y75": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 51,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 25,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y30": "FIFO18E1",
            "RAMB18_X1Y31": "RAMB18E1",
            "RAMB36_X1Y15": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y80": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 61,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 20,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y32": "FIFO18E1",
            "RAMB18_X1Y33": "RAMB18E1",
            "RAMB36_X1Y16": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y85": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 71,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 15,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y34": "FIFO18E1",
            "RAMB18_X1Y35": "RAMB18E1",
            "RAMB36_X1Y17": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y90": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 81,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 10,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y36": "FIFO18E1",
            "RAMB18_X1Y37": "RAMB18E1",
            "RAMB36_X1Y18": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_L_X18Y95": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00800180",
                "frames": 128,
                "offset": 91,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00001500",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 89,
        "grid_y": 5,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X1Y38": "FIFO18E1",
            "RAMB18_X1Y39": "RAMB18E1",
            "RAMB36_X1Y19": "RAMBFIFO36E1"
        },
        "type": "BRAM_L"
    },
    "BRAM_R_X25Y0": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 0,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 103,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X2Y0": "FIFO18E1",
            "RAMB18_X2Y1": "RAMB18E1",
            "RAMB36_X2Y0": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y5": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 10,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 98,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X2Y2": "FIFO18E1",
            "RAMB18_X2Y3": "RAMB18E1",
            "RAMB36_X2Y1": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y10": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 20,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 93,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X2Y4": "FIFO18E1",
            "RAMB18_X2Y5": "RAMB18E1",
            "RAMB36_X2Y2": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y15": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 30,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 88,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X2Y6": "FIFO18E1",
            "RAMB18_X2Y7": "RAMB18E1",
            "RAMB36_X2Y3": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y20": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
                "offset": 40,
                "words": 10
            },
            "CLB_IO_CLK": {
                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 108,
        "grid_y": 83,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "RAMB18_X2Y8": "FIFO18E1",
            "RAMB18_X2Y9": "RAMB18E1",
            "RAMB36_X2Y4": "RAMBFIFO36E1"
        },
        "type": "BRAM_R"
    },
    "BRAM_R_X25Y25": {
        "bits": {
            "BLOCK_RAM": {
                "baseaddr": "0x00C00200",
                "frames": 128,
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            "BUFHCE_X0Y11": "BUFHCE",
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            "BUFHCE_X1Y16": "BUFHCE",
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    "CMT_FIFO_L_X120Y60": {
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            "OUT_FIFO_X0Y4": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X120Y72": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 120,
        "grid_y": 32,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IN_FIFO_X0Y5": "IN_FIFO",
            "OUT_FIFO_X0Y5": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X120Y85": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 120,
        "grid_y": 19,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IN_FIFO_X0Y6": "IN_FIFO",
            "OUT_FIFO_X0Y6": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_FIFO_L_X120Y97": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 120,
        "grid_y": 7,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IN_FIFO_X0Y7": "IN_FIFO",
            "OUT_FIFO_X0Y7": "OUT_FIFO"
        },
        "type": "CMT_FIFO_L"
    },
    "CMT_PMV_L_X120Y1": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 103,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X120Y51": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 53,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X120Y53": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 51,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_PMV_L_X120Y103": {
        "bits": {},
        "grid_x": 120,
        "grid_y": 1,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {},
        "type": "CMT_PMV_L"
    },
    "CMT_TOP_L_LOWER_B_X119Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
                "frames": 30,
                "offset": 0,
                "words": 49
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 119,
        "grid_y": 95,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "MMCME2_ADV_X0Y0": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_B_X119Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
                "frames": 30,
                "offset": 0,
                "words": 49
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 119,
        "grid_y": 43,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "MMCME2_ADV_X0Y1": "MMCME2_ADV"
        },
        "type": "CMT_TOP_L_LOWER_B"
    },
    "CMT_TOP_L_LOWER_T_X119Y18": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 119,
        "grid_y": 86,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "PHASER_IN_PHY_X0Y0": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y1": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y0": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y1": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_LOWER_T_X119Y70": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 119,
        "grid_y": 34,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "PHASER_IN_PHY_X0Y4": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y5": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y4": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y5": "PHASER_OUT_PHY"
        },
        "type": "CMT_TOP_L_LOWER_T"
    },
    "CMT_TOP_L_UPPER_B_X119Y31": {
        "bits": {},
        "clock_region": "X1Y0",
        "grid_x": 119,
        "grid_y": 73,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "PHASER_IN_PHY_X0Y2": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y3": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y2": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y3": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y0": "PHASER_REF",
            "PHY_CONTROL_X0Y0": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_B_X119Y83": {
        "bits": {},
        "clock_region": "X1Y1",
        "grid_x": 119,
        "grid_y": 21,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "PHASER_IN_PHY_X0Y6": "PHASER_IN_PHY",
            "PHASER_IN_PHY_X0Y7": "PHASER_IN_PHY",
            "PHASER_OUT_PHY_X0Y6": "PHASER_OUT_PHY",
            "PHASER_OUT_PHY_X0Y7": "PHASER_OUT_PHY",
            "PHASER_REF_X0Y1": "PHASER_REF",
            "PHY_CONTROL_X0Y1": "PHY_CONTROL"
        },
        "type": "CMT_TOP_L_UPPER_B"
    },
    "CMT_TOP_L_UPPER_T_X119Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B00",
                "frames": 30,
                "offset": 74,
                "words": 27
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 119,
        "grid_y": 60,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "PLLE2_ADV_X0Y0": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "CMT_TOP_L_UPPER_T_X119Y96": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B00",
                "frames": 30,
                "offset": 74,
                "words": 27
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 119,
        "grid_y": 8,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "PLLE2_ADV_X0Y1": "PLLE2_ADV"
        },
        "type": "CMT_TOP_L_UPPER_T"
    },
    "DSP_L_X22Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 103,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y0": "DSP48E1",
            "DSP48_X1Y1": "DSP48E1",
            "TIEOFF_X23Y0": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 98,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y2": "DSP48E1",
            "DSP48_X1Y3": "DSP48E1",
            "TIEOFF_X23Y5": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 93,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y4": "DSP48E1",
            "DSP48_X1Y5": "DSP48E1",
            "TIEOFF_X23Y10": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 88,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y6": "DSP48E1",
            "DSP48_X1Y7": "DSP48E1",
            "TIEOFF_X23Y15": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 83,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y8": "DSP48E1",
            "DSP48_X1Y9": "DSP48E1",
            "TIEOFF_X23Y20": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 77,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y10": "DSP48E1",
            "DSP48_X1Y11": "DSP48E1",
            "TIEOFF_X23Y25": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 72,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y12": "DSP48E1",
            "DSP48_X1Y13": "DSP48E1",
            "TIEOFF_X23Y30": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 67,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y14": "DSP48E1",
            "DSP48_X1Y15": "DSP48E1",
            "TIEOFF_X23Y35": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y40": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 62,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y16": "DSP48E1",
            "DSP48_X1Y17": "DSP48E1",
            "TIEOFF_X23Y40": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401700",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 99,
        "grid_y": 57,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y18": "DSP48E1",
            "DSP48_X1Y19": "DSP48E1",
            "TIEOFF_X23Y45": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 99,
        "grid_y": 51,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y20": "DSP48E1",
            "DSP48_X1Y21": "DSP48E1",
            "TIEOFF_X23Y50": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 99,
        "grid_y": 46,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y22": "DSP48E1",
            "DSP48_X1Y23": "DSP48E1",
            "TIEOFF_X23Y55": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y60": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 99,
        "grid_y": 41,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y24": "DSP48E1",
            "DSP48_X1Y25": "DSP48E1",
            "TIEOFF_X23Y60": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 99,
        "grid_y": 36,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y26": "DSP48E1",
            "DSP48_X1Y27": "DSP48E1",
            "TIEOFF_X23Y65": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 99,
        "grid_y": 31,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y28": "DSP48E1",
            "DSP48_X1Y29": "DSP48E1",
            "TIEOFF_X23Y70": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 99,
        "grid_y": 25,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y30": "DSP48E1",
            "DSP48_X1Y31": "DSP48E1",
            "TIEOFF_X23Y75": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 61,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 99,
        "grid_y": 20,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y32": "DSP48E1",
            "DSP48_X1Y33": "DSP48E1",
            "TIEOFF_X23Y80": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 71,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 99,
        "grid_y": 15,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y34": "DSP48E1",
            "DSP48_X1Y35": "DSP48E1",
            "TIEOFF_X23Y85": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y90": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 81,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 99,
        "grid_y": 10,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y36": "DSP48E1",
            "DSP48_X1Y37": "DSP48E1",
            "TIEOFF_X23Y90": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_L_X22Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001700",
                "frames": 28,
                "offset": 91,
                "words": 10
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 99,
        "grid_y": 5,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X1Y38": "DSP48E1",
            "DSP48_X1Y39": "DSP48E1",
            "TIEOFF_X23Y95": "TIEOFF"
        },
        "type": "DSP_L"
    },
    "DSP_R_X7Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
                "frames": 28,
                "offset": 0,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 103,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X0Y0": "DSP48E1",
            "DSP48_X0Y1": "DSP48E1",
            "TIEOFF_X8Y0": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X7Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
                "frames": 28,
                "offset": 10,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 98,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X0Y2": "DSP48E1",
            "DSP48_X0Y3": "DSP48E1",
            "TIEOFF_X8Y5": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X7Y10": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
                "frames": 28,
                "offset": 20,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 93,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X0Y4": "DSP48E1",
            "DSP48_X0Y5": "DSP48E1",
            "TIEOFF_X8Y10": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X7Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
                "frames": 28,
                "offset": 30,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 88,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X0Y6": "DSP48E1",
            "DSP48_X0Y7": "DSP48E1",
            "TIEOFF_X8Y15": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X7Y20": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
                "frames": 28,
                "offset": 40,
                "words": 10
            }
        },
        "clock_region": "X0Y0",
        "grid_x": 49,
        "grid_y": 83,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "DSP48_X0Y8": "DSP48E1",
            "DSP48_X0Y9": "DSP48E1",
            "TIEOFF_X8Y20": "TIEOFF"
        },
        "type": "DSP_R"
    },
    "DSP_R_X7Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400C80",
                "frames": 28,
                "offset": 51,
                "words": 10
            }
        },
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            "TIEOFF_X0Y88": "TIEOFF"
        },
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00000900",
                "frames": 28,
                "offset": 79,
                "words": 2
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            "TIEOFF_X0Y89": "TIEOFF"
        },
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    },
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        "bits": {
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                "words": 2
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            "TIEOFF_X0Y90": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00000900",
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            "TIEOFF_X0Y91": "TIEOFF"
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        "bits": {
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            "CLB_IO_CLK": {
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            "TIEOFF_X0Y93": "TIEOFF"
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            "TIEOFF_X0Y94": "TIEOFF"
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            "TIEOFF_X0Y95": "TIEOFF"
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            "TIEOFF_X0Y97": "TIEOFF"
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            "TIEOFF_X2Y7": "TIEOFF"
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        "bits": {
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            "TIEOFF_X2Y19": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y20": {
        "bits": {
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                "words": 2
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        "type": "INT_L"
    },
    "INT_L_X2Y21": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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            "TIEOFF_X2Y21": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y22": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "offset": 44,
                "words": 2
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            "TIEOFF_X2Y22": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "offset": 46,
                "words": 2
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            "TIEOFF_X2Y23": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y24": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "offset": 48,
                "words": 2
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            "TIEOFF_X2Y24": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "offset": 51,
                "words": 2
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            "TIEOFF_X2Y25": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y26": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00400A00",
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                "offset": 53,
                "words": 2
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            "TIEOFF_X2Y26": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y27": {
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            "CLB_IO_CLK": {
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                "offset": 55,
                "words": 2
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            "TIEOFF_X2Y27": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y28": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 57,
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            "TIEOFF_X2Y28": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y29": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 59,
                "words": 2
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            "TIEOFF_X2Y29": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y30": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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            "TIEOFF_X2Y30": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y31": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 63,
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            "TIEOFF_X2Y31": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y32": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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            "TIEOFF_X2Y32": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y33": {
        "bits": {
            "CLB_IO_CLK": {
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                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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            "TIEOFF_X2Y33": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X2Y34": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 69,
                "words": 2
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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        "sites": {
            "TIEOFF_X2Y34": "TIEOFF"
        },
        "type": "INT_L"
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            "TIEOFF_X11Y98": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001100",
                "frames": 28,
                "offset": 99,
                "words": 2
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        },
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            "TIEOFF_X11Y99": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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                "words": 2
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            "TIEOFF_X13Y0": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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                "words": 2
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        },
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            "TIEOFF_X13Y1": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
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        },
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            "TIEOFF_X13Y2": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
                "frames": 28,
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                "words": 2
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        },
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            "TIEOFF_X13Y3": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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        },
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            "TIEOFF_X13Y4": "TIEOFF"
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    },
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        "bits": {
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            "TIEOFF_X13Y5": "TIEOFF"
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        "bits": {
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            "TIEOFF_X13Y6": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00401200",
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        },
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            "TIEOFF_X13Y7": "TIEOFF"
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            "TIEOFF_X13Y8": "TIEOFF"
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        "bits": {
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            "TIEOFF_X13Y9": "TIEOFF"
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        "bits": {
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            "TIEOFF_X13Y12": "TIEOFF"
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        "bits": {
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            "TIEOFF_X13Y13": "TIEOFF"
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        "bits": {
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        "bits": {
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                "offset": 59,
                "words": 2
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        "bits": {
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                "offset": 61,
                "words": 2
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        },
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    "INT_L_X12Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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                "offset": 63,
                "words": 2
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        },
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            "TIEOFF_X13Y31": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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                "offset": 65,
                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X13Y32": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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                "offset": 67,
                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X13Y33": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401200",
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                "offset": 69,
                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X13Y34": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y35": {
        "bits": {
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                "baseaddr": "0x00401200",
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                "offset": 71,
                "words": 2
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        "clock_region": "X0Y0",
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            "TIEOFF_X13Y35": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y36": {
        "bits": {
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                "baseaddr": "0x00401200",
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                "offset": 73,
                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X13Y36": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y37": {
        "bits": {
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                "baseaddr": "0x00401200",
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                "offset": 75,
                "words": 2
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        },
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            "TIEOFF_X13Y37": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y38": {
        "bits": {
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                "offset": 77,
                "words": 2
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        "clock_region": "X0Y0",
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            "TIEOFF_X13Y38": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y39": {
        "bits": {
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                "baseaddr": "0x00401200",
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                "offset": 79,
                "words": 2
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            "TIEOFF_X13Y39": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y40": {
        "bits": {
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                "baseaddr": "0x00401200",
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                "offset": 81,
                "words": 2
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        },
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            "TIEOFF_X13Y40": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y41": {
        "bits": {
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                "offset": 83,
                "words": 2
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        },
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            "TIEOFF_X13Y41": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X12Y42": {
        "bits": {
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                "baseaddr": "0x00401200",
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                "words": 2
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        },
        "clock_region": "X0Y0",
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            "TIEOFF_X13Y42": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y43": {
        "bits": {
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                "offset": 87,
                "words": 2
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        },
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        "sites": {
            "TIEOFF_X13Y43": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X12Y44": {
        "bits": {
            "CLB_IO_CLK": {
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                "frames": 28,
                "offset": 89,
                "words": 2
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        },
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        "pin_functions": {},
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        "sites": {
            "TIEOFF_X13Y44": "TIEOFF"
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        "type": "INT_L"
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        },
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        "type": "INT_L"
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    "INT_L_X16Y30": {
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        "pin_functions": {},
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        "sites": {
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    "INT_L_X16Y77": {
        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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        "bits": {
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        "type": "INT_L"
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            "TIEOFF_X19Y14": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y15": {
        "bits": {
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                "offset": 30,
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            "TIEOFF_X19Y15": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X19Y16": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y17": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X18Y18": {
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    "INT_L_X18Y19": {
        "bits": {
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            "TIEOFF_X19Y19": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y20": {
        "bits": {
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        "type": "INT_L"
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    "INT_L_X18Y21": {
        "bits": {
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                "words": 2
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            "TIEOFF_X19Y21": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "words": 2
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        "pin_functions": {},
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            "TIEOFF_X19Y22": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X18Y23": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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    "INT_L_X22Y56": {
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            "TIEOFF_X24Y56": "TIEOFF"
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                "baseaddr": "0x00001700",
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            "CLB_IO_CLK": {
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    "INT_L_X22Y89": {
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            "TIEOFF_X24Y89": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X24Y90": "TIEOFF"
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            "TIEOFF_X24Y93": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X24Y94": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X24Y95": "TIEOFF"
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        "type": "INT_L"
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            "TIEOFF_X24Y96": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X22Y97": {
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                "words": 2
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            "TIEOFF_X24Y97": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X22Y98": {
        "bits": {
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                "offset": 97,
                "words": 2
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        "clock_region": "X1Y1",
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            "TIEOFF_X24Y98": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X22Y99": {
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                "offset": 99,
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            "TIEOFF_X24Y99": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "baseaddr": "0x00401800",
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            "TIEOFF_X26Y0": "TIEOFF"
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        "type": "INT_L"
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                "offset": 2,
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        },
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        "pin_functions": {},
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        "sites": {
            "TIEOFF_X26Y1": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X24Y2": {
        "bits": {
            "CLB_IO_CLK": {
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                "frames": 28,
                "offset": 4,
                "words": 2
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        },
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    "INT_L_X24Y95": {
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
                "frames": 28,
                "offset": 93,
                "words": 2
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            "TIEOFF_X26Y96": "TIEOFF"
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        "bits": {
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                "offset": 95,
                "words": 2
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            "TIEOFF_X26Y97": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
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                "offset": 97,
                "words": 2
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            "TIEOFF_X26Y98": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001800",
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                "words": 2
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            "TIEOFF_X26Y99": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X28Y0": "TIEOFF"
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        "bits": {
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            "TIEOFF_X28Y1": "TIEOFF"
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        "bits": {
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            "TIEOFF_X28Y2": "TIEOFF"
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        "bits": {
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        "bits": {
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            "TIEOFF_X28Y26": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "offset": 55,
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        "clock_region": "X1Y0",
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            "TIEOFF_X28Y27": "TIEOFF"
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        "type": "INT_L"
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        "bits": {
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                "offset": 57,
                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X28Y28": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X26Y29": {
        "bits": {
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                "offset": 59,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y29": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X26Y30": {
        "bits": {
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                "offset": 61,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y30": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X26Y31": {
        "bits": {
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y31": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X26Y32": {
        "bits": {
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                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y32": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X26Y33": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 67,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y33": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 69,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y34": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X26Y35": {
        "bits": {
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                "baseaddr": "0x00401900",
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                "offset": 71,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y35": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X26Y36": {
        "bits": {
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                "offset": 73,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y36": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X26Y37": {
        "bits": {
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                "offset": 75,
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y37": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X26Y38": {
        "bits": {
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                "offset": 77,
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y38": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X26Y39": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 79,
                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X28Y39": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X26Y40": {
        "bits": {
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                "offset": 81,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X28Y40": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 83,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "sites": {
            "TIEOFF_X28Y41": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y42": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 85,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "sites": {
            "TIEOFF_X28Y42": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 87,
                "words": 2
            }
        },
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            "TIEOFF_X28Y43": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y44": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 89,
                "words": 2
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        },
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            "TIEOFF_X28Y44": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 91,
                "words": 2
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        },
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            "TIEOFF_X28Y45": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y46": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
                "frames": 28,
                "offset": 93,
                "words": 2
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        },
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            "TIEOFF_X28Y46": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "words": 2
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        },
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            "TIEOFF_X28Y47": "TIEOFF"
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    },
    "INT_L_X26Y48": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 97,
                "words": 2
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        },
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            "TIEOFF_X28Y48": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401900",
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                "offset": 99,
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        },
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            "TIEOFF_X28Y49": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "offset": 0,
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        },
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            "TIEOFF_X28Y50": "TIEOFF"
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    },
    "INT_L_X26Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "words": 2
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        },
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            "TIEOFF_X28Y51": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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        },
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            "TIEOFF_X28Y52": "TIEOFF"
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    },
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        "bits": {
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                "baseaddr": "0x00001900",
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        },
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            "TIEOFF_X28Y53": "TIEOFF"
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    },
    "INT_L_X26Y54": {
        "bits": {
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                "baseaddr": "0x00001900",
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        },
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            "TIEOFF_X28Y54": "TIEOFF"
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    },
    "INT_L_X26Y55": {
        "bits": {
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                "baseaddr": "0x00001900",
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                "offset": 10,
                "words": 2
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        },
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            "TIEOFF_X28Y55": "TIEOFF"
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    },
    "INT_L_X26Y56": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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        },
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            "TIEOFF_X28Y56": "TIEOFF"
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    },
    "INT_L_X26Y57": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 14,
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        },
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            "TIEOFF_X28Y57": "TIEOFF"
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    },
    "INT_L_X26Y58": {
        "bits": {
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                "offset": 16,
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        },
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            "TIEOFF_X28Y58": "TIEOFF"
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    },
    "INT_L_X26Y59": {
        "bits": {
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        },
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            "TIEOFF_X28Y59": "TIEOFF"
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    },
    "INT_L_X26Y60": {
        "bits": {
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                "offset": 20,
                "words": 2
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        },
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            "TIEOFF_X28Y60": "TIEOFF"
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    },
    "INT_L_X26Y61": {
        "bits": {
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                "offset": 22,
                "words": 2
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        },
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            "TIEOFF_X28Y61": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y62": {
        "bits": {
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                "offset": 24,
                "words": 2
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        },
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            "TIEOFF_X28Y62": "TIEOFF"
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    },
    "INT_L_X26Y63": {
        "bits": {
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                "offset": 26,
                "words": 2
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        },
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            "TIEOFF_X28Y63": "TIEOFF"
        },
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    },
    "INT_L_X26Y64": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "words": 2
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        },
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            "TIEOFF_X28Y64": "TIEOFF"
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    },
    "INT_L_X26Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "offset": 30,
                "words": 2
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            "TIEOFF_X28Y65": "TIEOFF"
        },
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    },
    "INT_L_X26Y66": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "offset": 32,
                "words": 2
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        },
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            "TIEOFF_X28Y66": "TIEOFF"
        },
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    },
    "INT_L_X26Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "offset": 34,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X28Y67": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y68": {
        "bits": {
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                "baseaddr": "0x00001900",
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                "offset": 36,
                "words": 2
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        },
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            "TIEOFF_X28Y68": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "offset": 38,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X28Y69": "TIEOFF"
        },
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    },
    "INT_L_X26Y70": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "offset": 40,
                "words": 2
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        },
        "clock_region": "X1Y1",
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            "TIEOFF_X28Y70": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X26Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "offset": 42,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X28Y71": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y72": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 44,
                "words": 2
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X28Y72": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 46,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "TIEOFF_X28Y73": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y74": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 48,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 27,
        "pin_functions": {},
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        "sites": {
            "TIEOFF_X28Y74": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 51,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 25,
        "pin_functions": {},
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        "sites": {
            "TIEOFF_X28Y75": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y76": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 53,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 24,
        "pin_functions": {},
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        "sites": {
            "TIEOFF_X28Y76": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 55,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
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        "grid_y": 23,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "TIEOFF_X28Y77": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y78": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 57,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 22,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "TIEOFF_X28Y78": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 59,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 21,
        "pin_functions": {},
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        "sites": {
            "TIEOFF_X28Y79": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y80": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 61,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 20,
        "pin_functions": {},
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        "sites": {
            "TIEOFF_X28Y80": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 63,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 19,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "TIEOFF_X28Y81": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y82": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 65,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 18,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "TIEOFF_X28Y82": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 17,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "TIEOFF_X28Y83": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y84": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 16,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "TIEOFF_X28Y84": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 71,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 15,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "TIEOFF_X28Y85": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y86": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 73,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 14,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "TIEOFF_X28Y86": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 75,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 13,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "TIEOFF_X28Y87": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X26Y88": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 77,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 111,
        "grid_y": 12,
        "pin_functions": {},
        "prohibited_sites": [],
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            "TIEOFF_X28Y88": "TIEOFF"
        },
        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
                "frames": 28,
                "offset": 79,
                "words": 2
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        },
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            "TIEOFF_X28Y89": "TIEOFF"
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        "type": "INT_L"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "words": 2
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            "TIEOFF_X28Y90": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "offset": 83,
                "words": 2
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        },
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            "TIEOFF_X28Y91": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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                "words": 2
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        },
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            "TIEOFF_X28Y92": "TIEOFF"
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    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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        },
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            "TIEOFF_X28Y93": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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        },
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            "TIEOFF_X28Y94": "TIEOFF"
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        "bits": {
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            "TIEOFF_X28Y95": "TIEOFF"
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        "bits": {
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001900",
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            "TIEOFF_X28Y97": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
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            "TIEOFF_X28Y98": "TIEOFF"
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        "bits": {
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                "baseaddr": "0x00001900",
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            "TIEOFF_X28Y99": "TIEOFF"
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        "bits": {
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        "bits": {
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                "words": 2
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    },
    "INT_L_X28Y20": {
        "bits": {
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                "offset": 40,
                "words": 2
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            "TIEOFF_X30Y20": "TIEOFF"
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    "INT_L_X28Y21": {
        "bits": {
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                "offset": 42,
                "words": 2
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            "TIEOFF_X30Y21": "TIEOFF"
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
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                "offset": 44,
                "words": 2
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            "TIEOFF_X30Y22": "TIEOFF"
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    "INT_L_X28Y23": {
        "bits": {
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                "offset": 46,
                "words": 2
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            "TIEOFF_X30Y23": "TIEOFF"
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    "INT_L_X28Y24": {
        "bits": {
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                "baseaddr": "0x00401A00",
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                "offset": 48,
                "words": 2
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    "INT_L_X28Y25": {
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                "offset": 51,
                "words": 2
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            "TIEOFF_X30Y25": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y26": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 53,
                "words": 2
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            "TIEOFF_X30Y26": "TIEOFF"
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    "INT_L_X28Y27": {
        "bits": {
            "CLB_IO_CLK": {
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                "offset": 55,
                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X30Y27": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y28": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
                "frames": 28,
                "offset": 57,
                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X30Y28": "TIEOFF"
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        "type": "INT_L"
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    "INT_L_X28Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
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                "offset": 59,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "type": "INT_L"
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    "INT_L_X28Y30": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
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                "offset": 61,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X30Y30": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
                "frames": 28,
                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "sites": {
            "TIEOFF_X30Y31": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y0",
        "grid_x": 115,
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        "pin_functions": {},
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        "sites": {
            "TIEOFF_X30Y32": "TIEOFF"
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        "type": "INT_L"
    },
    "INT_L_X28Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
                "frames": 28,
                "offset": 67,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "sites": {
            "TIEOFF_X30Y33": "TIEOFF"
        },
        "type": "INT_L"
    },
    "INT_L_X28Y34": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401A00",
                "frames": 28,
                "offset": 69,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 115,
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        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "TIEOFF_X30Y34": "TIEOFF"
        },
        "type": "INT_L"
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        "bits": {
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        "bits": {
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        "type": "INT_R"
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            "TIEOFF_X16Y13": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
        "clock_region": "X0Y0",
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        "pin_functions": {},
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        "sites": {
            "TIEOFF_X16Y14": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X15Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401380",
                "frames": 28,
                "offset": 30,
                "words": 2
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        "type": "INT_R"
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            "TIEOFF_X20Y97": "TIEOFF"
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    "INT_R_X21Y34": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X21Y40": {
        "bits": {
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        "bits": {
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                "baseaddr": "0x00001680",
                "frames": 28,
                "offset": 75,
                "words": 2
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            "TIEOFF_X22Y87": "TIEOFF"
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            "TIEOFF_X22Y88": "TIEOFF"
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            "TIEOFF_X22Y91": "TIEOFF"
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    "INT_R_X23Y18": {
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    "INT_R_X23Y19": {
        "bits": {
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                "offset": 38,
                "words": 2
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X23Y20": {
        "bits": {
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                "offset": 40,
                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X25Y20": "TIEOFF"
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    "INT_R_X23Y21": {
        "bits": {
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                "offset": 42,
                "words": 2
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        "clock_region": "X1Y0",
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            "TIEOFF_X25Y21": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y22": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X25Y22": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y23": {
        "bits": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X23Y24": {
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                "words": 2
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X23Y25": {
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X23Y26": {
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X23Y27": {
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                "offset": 55,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X23Y28": {
        "bits": {
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                "offset": 57,
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X25Y28": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y29": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X25Y29": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y30": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X25Y30": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y31": {
        "bits": {
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                "offset": 63,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "sites": {
            "TIEOFF_X25Y31": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X23Y32": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401780",
                "frames": 28,
                "offset": 65,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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        "sites": {
            "TIEOFF_X25Y32": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y33": {
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        "type": "INT_R"
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        "bits": {
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    "INT_R_X23Y65": {
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        "clock_region": "X1Y1",
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    "INT_R_X23Y72": {
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    "INT_R_X23Y73": {
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    "INT_R_X23Y74": {
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            "TIEOFF_X25Y74": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y75": {
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        "type": "INT_R"
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        "type": "INT_R"
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        },
        "clock_region": "X1Y1",
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        "pin_functions": {},
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            "TIEOFF_X25Y78": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X23Y79": {
        "bits": {
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                "baseaddr": "0x00001780",
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                "offset": 59,
                "words": 2
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            "TIEOFF_X25Y79": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
                "frames": 28,
                "offset": 61,
                "words": 2
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        },
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            "TIEOFF_X25Y80": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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            "TIEOFF_X25Y81": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001780",
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                "words": 2
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            "TIEOFF_X25Y82": "TIEOFF"
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        "type": "INT_R"
    },
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        "bits": {
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        },
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            "TIEOFF_X25Y83": "TIEOFF"
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        "type": "INT_R"
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        "bits": {
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        },
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            "TIEOFF_X25Y84": "TIEOFF"
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            "TIEOFF_X25Y85": "TIEOFF"
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        "bits": {
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            "TIEOFF_X25Y86": "TIEOFF"
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        },
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            "TIEOFF_X25Y87": "TIEOFF"
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        },
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        "bits": {
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        "clock_region": "X1Y0",
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        "bits": {
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                "words": 2
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        },
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            "TIEOFF_X27Y12": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y13": {
        "bits": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X25Y14": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X25Y15": {
        "bits": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X25Y17": {
        "bits": {
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        "clock_region": "X1Y0",
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            "TIEOFF_X27Y17": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y18": {
        "bits": {
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        "clock_region": "X1Y0",
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    "INT_R_X25Y19": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X27Y19": "TIEOFF"
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        "type": "INT_R"
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    "INT_R_X25Y20": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X25Y21": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X25Y22": {
        "bits": {
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X27Y22": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y23": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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            "TIEOFF_X27Y23": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y24": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X27Y24": "TIEOFF"
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        "type": "INT_R"
    },
    "INT_R_X25Y25": {
        "bits": {
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                "baseaddr": "0x00401880",
                "frames": 28,
                "offset": 51,
                "words": 2
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        },
        "clock_region": "X1Y0",
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        "grid_y": 77,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "TIEOFF_X27Y25": "TIEOFF"
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    "INT_R_X25Y72": {
        "bits": {
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        "type": "INT_R"
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        "type": "INT_R"
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    "INT_R_X27Y16": {
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        "clock_region": "X1Y0",
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        "type": "INT_R"
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    "INT_R_X27Y17": {
        "bits": {
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                "words": 2
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        },
        "clock_region": "X1Y0",
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        "pin_functions": {},
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            "TIEOFF_X29Y17": "TIEOFF"
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    "INT_R_X27Y18": {
        "bits": {
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        },
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    "PCIE_NULL_X30Y50": {
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    "PCIE_NULL_X30Y55": {
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y56": {
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y57": {
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y58": {
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y59": {
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y60": {
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y61": {
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y62": {
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y63": {
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y64": {
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y65": {
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    "PCIE_NULL_X30Y66": {
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    "PCIE_NULL_X30Y67": {
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    "PCIE_NULL_X30Y68": {
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    "PCIE_NULL_X30Y69": {
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y70": {
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y71": {
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y72": {
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y73": {
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y74": {
        "bits": {},
        "grid_x": 30,
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y75": {
        "bits": {},
        "grid_x": 30,
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y76": {
        "bits": {},
        "grid_x": 30,
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y77": {
        "bits": {},
        "grid_x": 30,
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y79": {
        "bits": {},
        "grid_x": 30,
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y80": {
        "bits": {},
        "grid_x": 30,
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y81": {
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        "grid_x": 30,
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y82": {
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        "grid_x": 30,
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y83": {
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y84": {
        "bits": {},
        "grid_x": 30,
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y85": {
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y86": {
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y87": {
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y88": {
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y89": {
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        "grid_x": 30,
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y90": {
        "bits": {},
        "grid_x": 30,
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y91": {
        "bits": {},
        "grid_x": 30,
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y92": {
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y93": {
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y94": {
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y95": {
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y96": {
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y97": {
        "bits": {},
        "grid_x": 30,
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y98": {
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        "grid_x": 30,
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        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y99": {
        "bits": {},
        "grid_x": 30,
        "grid_y": 5,
        "pin_functions": {},
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        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y100": {
        "bits": {},
        "grid_x": 30,
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        "pin_functions": {},
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        "sites": {},
        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y101": {
        "bits": {},
        "grid_x": 30,
        "grid_y": 3,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {},
        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y102": {
        "bits": {},
        "grid_x": 30,
        "grid_y": 2,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {},
        "type": "PCIE_NULL"
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    "PCIE_NULL_X30Y103": {
        "bits": {},
        "grid_x": 30,
        "grid_y": 1,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {},
        "type": "PCIE_NULL"
    },
    "PSS0_X13Y11": {
        "bits": {},
        "grid_x": 13,
        "grid_y": 93,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {},
        "type": "PSS0"
    },
    "PSS1_X13Y32": {
        "bits": {},
        "grid_x": 13,
        "grid_y": 72,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {},
        "type": "PSS1"
    },
    "PSS2_X13Y53": {
        "bits": {},
        "clock_region": "X0Y1",
        "grid_x": 13,
        "grid_y": 51,
        "pin_functions": {
            "IOPAD_X1Y1": "PS_DDR_WE_B_502",
            "IOPAD_X1Y2": "PS_DDR_VRN_502",
            "IOPAD_X1Y3": "PS_DDR_VRP_502",
            "IOPAD_X1Y4": "PS_DDR_A0_502",
            "IOPAD_X1Y5": "PS_DDR_A1_502",
            "IOPAD_X1Y6": "PS_DDR_A2_502",
            "IOPAD_X1Y7": "PS_DDR_A3_502",
            "IOPAD_X1Y8": "PS_DDR_A4_502",
            "IOPAD_X1Y9": "PS_DDR_A5_502",
            "IOPAD_X1Y10": "PS_DDR_A6_502",
            "IOPAD_X1Y11": "PS_DDR_A7_502",
            "IOPAD_X1Y12": "PS_DDR_A8_502",
            "IOPAD_X1Y13": "PS_DDR_A9_502",
            "IOPAD_X1Y14": "PS_DDR_A10_502",
            "IOPAD_X1Y15": "PS_DDR_A11_502",
            "IOPAD_X1Y16": "PS_DDR_A12_502",
            "IOPAD_X1Y17": "PS_DDR_A14_502",
            "IOPAD_X1Y18": "PS_DDR_A13_502",
            "IOPAD_X1Y19": "PS_DDR_BA0_502",
            "IOPAD_X1Y20": "PS_DDR_BA1_502",
            "IOPAD_X1Y21": "PS_DDR_BA2_502",
            "IOPAD_X1Y22": "PS_DDR_CAS_B_502",
            "IOPAD_X1Y23": "PS_DDR_CKE_502",
            "IOPAD_X1Y24": "PS_DDR_CKN_502",
            "IOPAD_X1Y25": "PS_DDR_CKP_502",
            "IOPAD_X1Y26": "PS_CLK_500",
            "IOPAD_X1Y27": "PS_DDR_CS_B_502",
            "IOPAD_X1Y28": "PS_DDR_DM0_502",
            "IOPAD_X1Y29": "PS_DDR_DM1_502",
            "IOPAD_X1Y30": "PS_DDR_DM2_502",
            "IOPAD_X1Y31": "PS_DDR_DM3_502",
            "IOPAD_X1Y32": "PS_DDR_DQ0_502",
            "IOPAD_X1Y33": "PS_DDR_DQ1_502",
            "IOPAD_X1Y34": "PS_DDR_DQ2_502",
            "IOPAD_X1Y35": "PS_DDR_DQ3_502",
            "IOPAD_X1Y36": "PS_DDR_DQ4_502",
            "IOPAD_X1Y37": "PS_DDR_DQ5_502",
            "IOPAD_X1Y38": "PS_DDR_DQ6_502",
            "IOPAD_X1Y39": "PS_DDR_DQ7_502",
            "IOPAD_X1Y40": "PS_DDR_DQ8_502",
            "IOPAD_X1Y41": "PS_DDR_DQ9_502",
            "IOPAD_X1Y42": "PS_DDR_DQ10_502",
            "IOPAD_X1Y43": "PS_DDR_DQ11_502",
            "IOPAD_X1Y44": "PS_DDR_DQ12_502",
            "IOPAD_X1Y45": "PS_DDR_DQ13_502",
            "IOPAD_X1Y46": "PS_DDR_DQ14_502",
            "IOPAD_X1Y47": "PS_DDR_DQ15_502",
            "IOPAD_X1Y48": "PS_DDR_DQ16_502",
            "IOPAD_X1Y49": "PS_DDR_DQ17_502",
            "IOPAD_X1Y50": "PS_DDR_DQ18_502",
            "IOPAD_X1Y51": "PS_DDR_DQ19_502",
            "IOPAD_X1Y52": "PS_DDR_DQ20_502",
            "IOPAD_X1Y53": "PS_DDR_DQ21_502",
            "IOPAD_X1Y54": "PS_DDR_DQ22_502",
            "IOPAD_X1Y55": "PS_DDR_DQ23_502",
            "IOPAD_X1Y56": "PS_DDR_DQ24_502",
            "IOPAD_X1Y57": "PS_DDR_DQ25_502",
            "IOPAD_X1Y58": "PS_DDR_DQ26_502",
            "IOPAD_X1Y59": "PS_DDR_DQ27_502",
            "IOPAD_X1Y60": "PS_DDR_DQ28_502",
            "IOPAD_X1Y61": "PS_DDR_DQ29_502",
            "IOPAD_X1Y62": "PS_DDR_DQ30_502",
            "IOPAD_X1Y63": "PS_DDR_DQ31_502",
            "IOPAD_X1Y64": "PS_DDR_DQS_N0_502",
            "IOPAD_X1Y65": "PS_DDR_DQS_N1_502",
            "IOPAD_X1Y66": "PS_DDR_DQS_N2_502",
            "IOPAD_X1Y67": "PS_DDR_DQS_N3_502",
            "IOPAD_X1Y68": "PS_DDR_DQS_P0_502",
            "IOPAD_X1Y69": "PS_DDR_DQS_P1_502",
            "IOPAD_X1Y70": "PS_DDR_DQS_P2_502",
            "IOPAD_X1Y71": "PS_DDR_DQS_P3_502",
            "IOPAD_X1Y72": "PS_DDR_DRST_B_502",
            "IOPAD_X1Y77": "PS_MIO0_500",
            "IOPAD_X1Y78": "PS_MIO1_500",
            "IOPAD_X1Y79": "PS_MIO2_500",
            "IOPAD_X1Y80": "PS_MIO3_500",
            "IOPAD_X1Y81": "PS_MIO4_500",
            "IOPAD_X1Y82": "PS_MIO5_500",
            "IOPAD_X1Y83": "PS_MIO6_500",
            "IOPAD_X1Y84": "PS_MIO7_500",
            "IOPAD_X1Y85": "PS_MIO8_500",
            "IOPAD_X1Y86": "PS_MIO9_500",
            "IOPAD_X1Y87": "PS_MIO10_500",
            "IOPAD_X1Y88": "PS_MIO11_500",
            "IOPAD_X1Y89": "PS_MIO12_500",
            "IOPAD_X1Y90": "PS_MIO13_500",
            "IOPAD_X1Y91": "PS_MIO14_500",
            "IOPAD_X1Y92": "PS_MIO15_500",
            "IOPAD_X1Y93": "PS_MIO16_501",
            "IOPAD_X1Y94": "PS_MIO17_501",
            "IOPAD_X1Y95": "PS_MIO18_501",
            "IOPAD_X1Y96": "PS_MIO19_501",
            "IOPAD_X1Y97": "PS_MIO20_501",
            "IOPAD_X1Y98": "PS_MIO21_501",
            "IOPAD_X1Y99": "PS_MIO22_501",
            "IOPAD_X1Y100": "PS_MIO23_501",
            "IOPAD_X1Y101": "PS_MIO24_501",
            "IOPAD_X1Y102": "PS_MIO25_501",
            "IOPAD_X1Y103": "PS_MIO26_501",
            "IOPAD_X1Y104": "PS_MIO27_501",
            "IOPAD_X1Y105": "PS_MIO28_501",
            "IOPAD_X1Y106": "PS_MIO29_501",
            "IOPAD_X1Y107": "PS_MIO30_501",
            "IOPAD_X1Y108": "PS_MIO31_501",
            "IOPAD_X1Y109": "PS_MIO32_501",
            "IOPAD_X1Y110": "PS_MIO33_501",
            "IOPAD_X1Y111": "PS_MIO34_501",
            "IOPAD_X1Y112": "PS_MIO35_501",
            "IOPAD_X1Y113": "PS_MIO36_501",
            "IOPAD_X1Y114": "PS_MIO37_501",
            "IOPAD_X1Y115": "PS_MIO38_501",
            "IOPAD_X1Y116": "PS_MIO39_501",
            "IOPAD_X1Y117": "PS_MIO40_501",
            "IOPAD_X1Y118": "PS_MIO41_501",
            "IOPAD_X1Y119": "PS_MIO42_501",
            "IOPAD_X1Y120": "PS_MIO43_501",
            "IOPAD_X1Y121": "PS_MIO44_501",
            "IOPAD_X1Y122": "PS_MIO45_501",
            "IOPAD_X1Y123": "PS_MIO46_501",
            "IOPAD_X1Y124": "PS_MIO47_501",
            "IOPAD_X1Y125": "PS_MIO48_501",
            "IOPAD_X1Y126": "PS_MIO49_501",
            "IOPAD_X1Y127": "PS_MIO50_501",
            "IOPAD_X1Y128": "PS_MIO51_501",
            "IOPAD_X1Y129": "PS_MIO52_501",
            "IOPAD_X1Y130": "PS_MIO53_501",
            "IOPAD_X1Y131": "PS_DDR_ODT_502",
            "IOPAD_X1Y132": "PS_POR_B_500",
            "IOPAD_X1Y133": "PS_DDR_RAS_B_502",
            "IOPAD_X1Y134": "PS_SRST_B_501"
        },
        "prohibited_sites": [],
        "sites": {
            "IOPAD_X1Y1": "IOPAD",
            "IOPAD_X1Y2": "IOPAD",
            "IOPAD_X1Y3": "IOPAD",
            "IOPAD_X1Y4": "IOPAD",
            "IOPAD_X1Y5": "IOPAD",
            "IOPAD_X1Y6": "IOPAD",
            "IOPAD_X1Y7": "IOPAD",
            "IOPAD_X1Y8": "IOPAD",
            "IOPAD_X1Y9": "IOPAD",
            "IOPAD_X1Y10": "IOPAD",
            "IOPAD_X1Y11": "IOPAD",
            "IOPAD_X1Y12": "IOPAD",
            "IOPAD_X1Y13": "IOPAD",
            "IOPAD_X1Y14": "IOPAD",
            "IOPAD_X1Y15": "IOPAD",
            "IOPAD_X1Y16": "IOPAD",
            "IOPAD_X1Y17": "IOPAD",
            "IOPAD_X1Y18": "IOPAD",
            "IOPAD_X1Y19": "IOPAD",
            "IOPAD_X1Y20": "IOPAD",
            "IOPAD_X1Y21": "IOPAD",
            "IOPAD_X1Y22": "IOPAD",
            "IOPAD_X1Y23": "IOPAD",
            "IOPAD_X1Y24": "IOPAD",
            "IOPAD_X1Y25": "IOPAD",
            "IOPAD_X1Y26": "IOPAD",
            "IOPAD_X1Y27": "IOPAD",
            "IOPAD_X1Y28": "IOPAD",
            "IOPAD_X1Y29": "IOPAD",
            "IOPAD_X1Y30": "IOPAD",
            "IOPAD_X1Y31": "IOPAD",
            "IOPAD_X1Y32": "IOPAD",
            "IOPAD_X1Y33": "IOPAD",
            "IOPAD_X1Y34": "IOPAD",
            "IOPAD_X1Y35": "IOPAD",
            "IOPAD_X1Y36": "IOPAD",
            "IOPAD_X1Y37": "IOPAD",
            "IOPAD_X1Y38": "IOPAD",
            "IOPAD_X1Y39": "IOPAD",
            "IOPAD_X1Y40": "IOPAD",
            "IOPAD_X1Y41": "IOPAD",
            "IOPAD_X1Y42": "IOPAD",
            "IOPAD_X1Y43": "IOPAD",
            "IOPAD_X1Y44": "IOPAD",
            "IOPAD_X1Y45": "IOPAD",
            "IOPAD_X1Y46": "IOPAD",
            "IOPAD_X1Y47": "IOPAD",
            "IOPAD_X1Y48": "IOPAD",
            "IOPAD_X1Y49": "IOPAD",
            "IOPAD_X1Y50": "IOPAD",
            "IOPAD_X1Y51": "IOPAD",
            "IOPAD_X1Y52": "IOPAD",
            "IOPAD_X1Y53": "IOPAD",
            "IOPAD_X1Y54": "IOPAD",
            "IOPAD_X1Y55": "IOPAD",
            "IOPAD_X1Y56": "IOPAD",
            "IOPAD_X1Y57": "IOPAD",
            "IOPAD_X1Y58": "IOPAD",
            "IOPAD_X1Y59": "IOPAD",
            "IOPAD_X1Y60": "IOPAD",
            "IOPAD_X1Y61": "IOPAD",
            "IOPAD_X1Y62": "IOPAD",
            "IOPAD_X1Y63": "IOPAD",
            "IOPAD_X1Y64": "IOPAD",
            "IOPAD_X1Y65": "IOPAD",
            "IOPAD_X1Y66": "IOPAD",
            "IOPAD_X1Y67": "IOPAD",
            "IOPAD_X1Y68": "IOPAD",
            "IOPAD_X1Y69": "IOPAD",
            "IOPAD_X1Y70": "IOPAD",
            "IOPAD_X1Y71": "IOPAD",
            "IOPAD_X1Y72": "IOPAD",
            "IOPAD_X1Y77": "IOPAD",
            "IOPAD_X1Y78": "IOPAD",
            "IOPAD_X1Y79": "IOPAD",
            "IOPAD_X1Y80": "IOPAD",
            "IOPAD_X1Y81": "IOPAD",
            "IOPAD_X1Y82": "IOPAD",
            "IOPAD_X1Y83": "IOPAD",
            "IOPAD_X1Y84": "IOPAD",
            "IOPAD_X1Y85": "IOPAD",
            "IOPAD_X1Y86": "IOPAD",
            "IOPAD_X1Y87": "IOPAD",
            "IOPAD_X1Y88": "IOPAD",
            "IOPAD_X1Y89": "IOPAD",
            "IOPAD_X1Y90": "IOPAD",
            "IOPAD_X1Y91": "IOPAD",
            "IOPAD_X1Y92": "IOPAD",
            "IOPAD_X1Y93": "IOPAD",
            "IOPAD_X1Y94": "IOPAD",
            "IOPAD_X1Y95": "IOPAD",
            "IOPAD_X1Y96": "IOPAD",
            "IOPAD_X1Y97": "IOPAD",
            "IOPAD_X1Y98": "IOPAD",
            "IOPAD_X1Y99": "IOPAD",
            "IOPAD_X1Y100": "IOPAD",
            "IOPAD_X1Y101": "IOPAD",
            "IOPAD_X1Y102": "IOPAD",
            "IOPAD_X1Y103": "IOPAD",
            "IOPAD_X1Y104": "IOPAD",
            "IOPAD_X1Y105": "IOPAD",
            "IOPAD_X1Y106": "IOPAD",
            "IOPAD_X1Y107": "IOPAD",
            "IOPAD_X1Y108": "IOPAD",
            "IOPAD_X1Y109": "IOPAD",
            "IOPAD_X1Y110": "IOPAD",
            "IOPAD_X1Y111": "IOPAD",
            "IOPAD_X1Y112": "IOPAD",
            "IOPAD_X1Y113": "IOPAD",
            "IOPAD_X1Y114": "IOPAD",
            "IOPAD_X1Y115": "IOPAD",
            "IOPAD_X1Y116": "IOPAD",
            "IOPAD_X1Y117": "IOPAD",
            "IOPAD_X1Y118": "IOPAD",
            "IOPAD_X1Y119": "IOPAD",
            "IOPAD_X1Y120": "IOPAD",
            "IOPAD_X1Y121": "IOPAD",
            "IOPAD_X1Y122": "IOPAD",
            "IOPAD_X1Y123": "IOPAD",
            "IOPAD_X1Y124": "IOPAD",
            "IOPAD_X1Y125": "IOPAD",
            "IOPAD_X1Y126": "IOPAD",
            "IOPAD_X1Y127": "IOPAD",
            "IOPAD_X1Y128": "IOPAD",
            "IOPAD_X1Y129": "IOPAD",
            "IOPAD_X1Y130": "IOPAD",
            "IOPAD_X1Y131": "IOPAD",
            "IOPAD_X1Y132": "IOPAD",
            "IOPAD_X1Y133": "IOPAD",
            "IOPAD_X1Y134": "IOPAD",
            "PS7_X0Y0": "PS7"
        },
        "type": "PSS2"
    },
    "PSS3_X13Y73": {
        "bits": {},
        "grid_x": 13,
        "grid_y": 31,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {},
        "type": "PSS3"
    },
    "PSS4_X13Y94": {
        "bits": {},
        "grid_x": 13,
        "grid_y": 10,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {},
        "type": "PSS4"
    },
    "RIOB33_SING_X31Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y0"
                    },
                    "start_offset": 2,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 103,
        "pin_functions": {
            "IOB_X0Y0": "IO_25_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y0": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X31Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 53,
        "pin_functions": {
            "IOB_X0Y49": "IO_0_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y49": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X31Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y0"
                    },
                    "start_offset": 2,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 51,
        "pin_functions": {
            "IOB_X0Y50": "IO_25_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y50": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_SING_X31Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {
                        "IOB33_Y0": "IOB33_Y1"
                    },
                    "start_offset": 0,
                    "type": "RIOB33"
                },
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 1,
        "pin_functions": {
            "IOB_X0Y99": "IO_0_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y99": "IOB33"
        },
        "type": "RIOB33_SING"
    },
    "RIOB33_X31Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 102,
        "pin_functions": {
            "IOB_X0Y1": "IO_L24N_T3_34",
            "IOB_X0Y2": "IO_L24P_T3_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y1": "IOB33S",
            "IOB_X0Y2": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 100,
        "pin_functions": {
            "IOB_X0Y3": "IO_L23N_T3_34",
            "IOB_X0Y4": "IO_L23P_T3_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y3": "IOB33S",
            "IOB_X0Y4": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 98,
        "pin_functions": {
            "IOB_X0Y5": "IO_L22N_T3_34",
            "IOB_X0Y6": "IO_L22P_T3_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y5": "IOB33S",
            "IOB_X0Y6": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 96,
        "pin_functions": {
            "IOB_X0Y7": "IO_L21N_T3_DQS_34",
            "IOB_X0Y8": "IO_L21P_T3_DQS_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y7": "IOB33S",
            "IOB_X0Y8": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 94,
        "pin_functions": {
            "IOB_X0Y9": "IO_L20N_T3_34",
            "IOB_X0Y10": "IO_L20P_T3_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y9": "IOB33S",
            "IOB_X0Y10": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 92,
        "pin_functions": {
            "IOB_X0Y11": "IO_L19N_T3_VREF_34",
            "IOB_X0Y12": "IO_L19P_T3_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y11": "IOB33S",
            "IOB_X0Y12": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 90,
        "pin_functions": {
            "IOB_X0Y13": "IO_L18N_T2_34",
            "IOB_X0Y14": "IO_L18P_T2_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y13": "IOB33S",
            "IOB_X0Y14": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 88,
        "pin_functions": {
            "IOB_X0Y15": "IO_L17N_T2_34",
            "IOB_X0Y16": "IO_L17P_T2_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y15": "IOB33S",
            "IOB_X0Y16": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 86,
        "pin_functions": {
            "IOB_X0Y17": "IO_L16N_T2_34",
            "IOB_X0Y18": "IO_L16P_T2_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y17": "IOB33S",
            "IOB_X0Y18": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 84,
        "pin_functions": {
            "IOB_X0Y19": "IO_L15N_T2_DQS_34",
            "IOB_X0Y20": "IO_L15P_T2_DQS_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y19": "IOB33S",
            "IOB_X0Y20": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 82,
        "pin_functions": {
            "IOB_X0Y21": "IO_L14N_T2_SRCC_34",
            "IOB_X0Y22": "IO_L14P_T2_SRCC_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y21": "IOB33S",
            "IOB_X0Y22": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y23": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 80,
        "pin_functions": {
            "IOB_X0Y23": "IO_L13N_T2_MRCC_34",
            "IOB_X0Y24": "IO_L13P_T2_MRCC_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y23": "IOB33S",
            "IOB_X0Y24": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y25": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 77,
        "pin_functions": {
            "IOB_X0Y25": "IO_L12N_T1_MRCC_34",
            "IOB_X0Y26": "IO_L12P_T1_MRCC_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y25": "IOB33S",
            "IOB_X0Y26": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y27": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 75,
        "pin_functions": {
            "IOB_X0Y27": "IO_L11N_T1_SRCC_34",
            "IOB_X0Y28": "IO_L11P_T1_SRCC_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y27": "IOB33S",
            "IOB_X0Y28": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y29": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 73,
        "pin_functions": {
            "IOB_X0Y29": "IO_L10N_T1_34",
            "IOB_X0Y30": "IO_L10P_T1_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y29": "IOB33S",
            "IOB_X0Y30": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 71,
        "pin_functions": {
            "IOB_X0Y31": "IO_L9N_T1_DQS_34",
            "IOB_X0Y32": "IO_L9P_T1_DQS_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y31": "IOB33S",
            "IOB_X0Y32": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y33": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 69,
        "pin_functions": {
            "IOB_X0Y33": "IO_L8N_T1_34",
            "IOB_X0Y34": "IO_L8P_T1_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y33": "IOB33S",
            "IOB_X0Y34": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y35": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 67,
        "pin_functions": {
            "IOB_X0Y35": "IO_L7N_T1_34",
            "IOB_X0Y36": "IO_L7P_T1_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y35": "IOB33S",
            "IOB_X0Y36": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 65,
        "pin_functions": {
            "IOB_X0Y37": "IO_L6N_T0_VREF_34",
            "IOB_X0Y38": "IO_L6P_T0_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y37": "IOB33S",
            "IOB_X0Y38": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y39": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 63,
        "pin_functions": {
            "IOB_X0Y39": "IO_L5N_T0_34",
            "IOB_X0Y40": "IO_L5P_T0_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y39": "IOB33S",
            "IOB_X0Y40": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y41": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 61,
        "pin_functions": {
            "IOB_X0Y41": "IO_L4N_T0_34",
            "IOB_X0Y42": "IO_L4P_T0_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y41": "IOB33S",
            "IOB_X0Y42": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 59,
        "pin_functions": {
            "IOB_X0Y43": "IO_L3N_T0_DQS_34",
            "IOB_X0Y44": "IO_L3P_T0_DQS_PUDC_B_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y43": "IOB33S",
            "IOB_X0Y44": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y45": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 57,
        "pin_functions": {
            "IOB_X0Y45": "IO_L2N_T0_34",
            "IOB_X0Y46": "IO_L2P_T0_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y45": "IOB33S",
            "IOB_X0Y46": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y47": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 127,
        "grid_y": 55,
        "pin_functions": {
            "IOB_X0Y47": "IO_L1N_T0_34",
            "IOB_X0Y48": "IO_L1P_T0_34"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y47": "IOB33S",
            "IOB_X0Y48": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y51": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 50,
        "pin_functions": {
            "IOB_X0Y51": "IO_L24N_T3_AD15N_35",
            "IOB_X0Y52": "IO_L24P_T3_AD15P_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y51": "IOB33S",
            "IOB_X0Y52": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y53": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 48,
        "pin_functions": {
            "IOB_X0Y53": "IO_L23N_T3_35",
            "IOB_X0Y54": "IO_L23P_T3_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y53": "IOB33S",
            "IOB_X0Y54": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y55": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 46,
        "pin_functions": {
            "IOB_X0Y55": "IO_L22N_T3_AD7N_35",
            "IOB_X0Y56": "IO_L22P_T3_AD7P_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y55": "IOB33S",
            "IOB_X0Y56": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 44,
        "pin_functions": {
            "IOB_X0Y57": "IO_L21N_T3_DQS_AD14N_35",
            "IOB_X0Y58": "IO_L21P_T3_DQS_AD14P_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y57": "IOB33S",
            "IOB_X0Y58": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y59": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 42,
        "pin_functions": {
            "IOB_X0Y59": "IO_L20N_T3_AD6N_35",
            "IOB_X0Y60": "IO_L20P_T3_AD6P_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y59": "IOB33S",
            "IOB_X0Y60": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y61": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 40,
        "pin_functions": {
            "IOB_X0Y61": "IO_L19N_T3_VREF_35",
            "IOB_X0Y62": "IO_L19P_T3_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y61": "IOB33S",
            "IOB_X0Y62": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 38,
        "pin_functions": {
            "IOB_X0Y63": "IO_L18N_T2_AD13N_35",
            "IOB_X0Y64": "IO_L18P_T2_AD13P_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y63": "IOB33S",
            "IOB_X0Y64": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y65": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 36,
        "pin_functions": {
            "IOB_X0Y65": "IO_L17N_T2_AD5N_35",
            "IOB_X0Y66": "IO_L17P_T2_AD5P_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y65": "IOB33S",
            "IOB_X0Y66": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y67": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 34,
        "pin_functions": {
            "IOB_X0Y67": "IO_L16N_T2_35",
            "IOB_X0Y68": "IO_L16P_T2_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y67": "IOB33S",
            "IOB_X0Y68": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 32,
        "pin_functions": {
            "IOB_X0Y69": "IO_L15N_T2_DQS_AD12N_35",
            "IOB_X0Y70": "IO_L15P_T2_DQS_AD12P_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y69": "IOB33S",
            "IOB_X0Y70": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y71": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 30,
        "pin_functions": {
            "IOB_X0Y71": "IO_L14N_T2_AD4N_SRCC_35",
            "IOB_X0Y72": "IO_L14P_T2_AD4P_SRCC_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y71": "IOB33S",
            "IOB_X0Y72": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y73": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 46,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 28,
        "pin_functions": {
            "IOB_X0Y73": "IO_L13N_T2_MRCC_35",
            "IOB_X0Y74": "IO_L13P_T2_MRCC_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y73": "IOB33S",
            "IOB_X0Y74": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y75": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 51,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 25,
        "pin_functions": {
            "IOB_X0Y75": "IO_L12N_T1_MRCC_35",
            "IOB_X0Y76": "IO_L12P_T1_MRCC_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y75": "IOB33S",
            "IOB_X0Y76": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y77": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 55,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 23,
        "pin_functions": {
            "IOB_X0Y77": "IO_L11N_T1_SRCC_35",
            "IOB_X0Y78": "IO_L11P_T1_SRCC_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y77": "IOB33S",
            "IOB_X0Y78": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y79": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 59,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 21,
        "pin_functions": {
            "IOB_X0Y79": "IO_L10N_T1_AD11N_35",
            "IOB_X0Y80": "IO_L10P_T1_AD11P_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y79": "IOB33S",
            "IOB_X0Y80": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 19,
        "pin_functions": {
            "IOB_X0Y81": "IO_L9N_T1_DQS_AD3N_35",
            "IOB_X0Y82": "IO_L9P_T1_DQS_AD3P_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y81": "IOB33S",
            "IOB_X0Y82": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y83": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 67,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 17,
        "pin_functions": {
            "IOB_X0Y83": "IO_L8N_T1_AD10N_35",
            "IOB_X0Y84": "IO_L8P_T1_AD10P_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y83": "IOB33S",
            "IOB_X0Y84": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y85": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 71,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 15,
        "pin_functions": {
            "IOB_X0Y85": "IO_L7N_T1_AD2N_35",
            "IOB_X0Y86": "IO_L7P_T1_AD2P_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y85": "IOB33S",
            "IOB_X0Y86": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 13,
        "pin_functions": {
            "IOB_X0Y87": "IO_L6N_T0_VREF_35",
            "IOB_X0Y88": "IO_L6P_T0_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y87": "IOB33S",
            "IOB_X0Y88": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y89": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 79,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 11,
        "pin_functions": {
            "IOB_X0Y89": "IO_L5N_T0_AD9N_35",
            "IOB_X0Y90": "IO_L5P_T0_AD9P_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y89": "IOB33S",
            "IOB_X0Y90": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y91": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 83,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 9,
        "pin_functions": {
            "IOB_X0Y91": "IO_L4N_T0_35",
            "IOB_X0Y92": "IO_L4P_T0_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y91": "IOB33S",
            "IOB_X0Y92": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 7,
        "pin_functions": {
            "IOB_X0Y93": "IO_L3N_T0_DQS_AD1N_35",
            "IOB_X0Y94": "IO_L3P_T0_DQS_AD1P_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y93": "IOB33S",
            "IOB_X0Y94": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y95": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 91,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 5,
        "pin_functions": {
            "IOB_X0Y95": "IO_L2N_T0_AD8N_35",
            "IOB_X0Y96": "IO_L2P_T0_AD8P_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y95": "IOB33S",
            "IOB_X0Y96": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOB33_X31Y97": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 95,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 127,
        "grid_y": 3,
        "pin_functions": {
            "IOB_X0Y97": "IO_L1N_T0_AD0N_35",
            "IOB_X0Y98": "IO_L1P_T0_AD0P_35"
        },
        "prohibited_sites": [],
        "sites": {
            "IOB_X0Y97": "IOB33S",
            "IOB_X0Y98": "IOB33M"
        },
        "type": "RIOB33"
    },
    "RIOI3_SING_X31Y0": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 103,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y0": "IDELAYE2",
            "ILOGIC_X0Y0": "ILOGICE3",
            "OLOGIC_X0Y0": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X31Y49": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 53,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y49": "IDELAYE2",
            "ILOGIC_X0Y49": "ILOGICE3",
            "OLOGIC_X0Y49": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X31Y50": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 2,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 0,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 126,
        "grid_y": 51,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y50": "IDELAYE2",
            "ILOGIC_X0Y50": "ILOGICE3",
            "OLOGIC_X0Y50": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_SING_X31Y99": {
        "bits": {
            "CLB_IO_CLK": {
                "alias": {
                    "sites": {},
                    "start_offset": 0,
                    "type": "RIOI3"
                },
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 99,
                "words": 2
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 126,
        "grid_y": 1,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y99": "IDELAYE2",
            "ILOGIC_X0Y99": "ILOGICE3",
            "OLOGIC_X0Y99": "OLOGICE3"
        },
        "type": "RIOI3_SING"
    },
    "RIOI3_TBYTESRC_X31Y7": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 96,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y7": "IDELAYE2",
            "IDELAY_X0Y8": "IDELAYE2",
            "ILOGIC_X0Y7": "ILOGICE3",
            "ILOGIC_X0Y8": "ILOGICE3",
            "OLOGIC_X0Y7": "OLOGICE3",
            "OLOGIC_X0Y8": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X31Y19": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 84,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y19": "IDELAYE2",
            "IDELAY_X0Y20": "IDELAYE2",
            "ILOGIC_X0Y19": "ILOGICE3",
            "ILOGIC_X0Y20": "ILOGICE3",
            "OLOGIC_X0Y19": "OLOGICE3",
            "OLOGIC_X0Y20": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X31Y31": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 71,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y31": "IDELAYE2",
            "IDELAY_X0Y32": "IDELAYE2",
            "ILOGIC_X0Y31": "ILOGICE3",
            "ILOGIC_X0Y32": "ILOGICE3",
            "OLOGIC_X0Y31": "OLOGICE3",
            "OLOGIC_X0Y32": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X31Y43": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 59,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y43": "IDELAYE2",
            "IDELAY_X0Y44": "IDELAYE2",
            "ILOGIC_X0Y43": "ILOGICE3",
            "ILOGIC_X0Y44": "ILOGICE3",
            "OLOGIC_X0Y43": "OLOGICE3",
            "OLOGIC_X0Y44": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X31Y57": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 14,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 126,
        "grid_y": 44,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y57": "IDELAYE2",
            "IDELAY_X0Y58": "IDELAYE2",
            "ILOGIC_X0Y57": "ILOGICE3",
            "ILOGIC_X0Y58": "ILOGICE3",
            "OLOGIC_X0Y57": "OLOGICE3",
            "OLOGIC_X0Y58": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X31Y69": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 38,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 126,
        "grid_y": 32,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y69": "IDELAYE2",
            "IDELAY_X0Y70": "IDELAYE2",
            "ILOGIC_X0Y69": "ILOGICE3",
            "ILOGIC_X0Y70": "ILOGICE3",
            "OLOGIC_X0Y69": "OLOGICE3",
            "OLOGIC_X0Y70": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X31Y81": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 63,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 126,
        "grid_y": 19,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y81": "IDELAYE2",
            "IDELAY_X0Y82": "IDELAYE2",
            "ILOGIC_X0Y81": "ILOGICE3",
            "ILOGIC_X0Y82": "ILOGICE3",
            "OLOGIC_X0Y81": "OLOGICE3",
            "OLOGIC_X0Y82": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTESRC_X31Y93": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 87,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 126,
        "grid_y": 7,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y93": "IDELAYE2",
            "IDELAY_X0Y94": "IDELAYE2",
            "ILOGIC_X0Y93": "ILOGICE3",
            "ILOGIC_X0Y94": "ILOGICE3",
            "OLOGIC_X0Y93": "OLOGICE3",
            "OLOGIC_X0Y94": "OLOGICE3"
        },
        "type": "RIOI3_TBYTESRC"
    },
    "RIOI3_TBYTETERM_X31Y13": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 90,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y13": "IDELAYE2",
            "IDELAY_X0Y14": "IDELAYE2",
            "ILOGIC_X0Y13": "ILOGICE3",
            "ILOGIC_X0Y14": "ILOGICE3",
            "OLOGIC_X0Y13": "OLOGICE3",
            "OLOGIC_X0Y14": "OLOGICE3"
        },
        "type": "RIOI3_TBYTETERM"
    },
    "RIOI3_TBYTETERM_X31Y37": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 65,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y37": "IDELAYE2",
            "IDELAY_X0Y38": "IDELAYE2",
            "ILOGIC_X0Y37": "ILOGICE3",
            "ILOGIC_X0Y38": "ILOGICE3",
            "OLOGIC_X0Y37": "OLOGICE3",
            "OLOGIC_X0Y38": "OLOGICE3"
        },
        "type": "RIOI3_TBYTETERM"
    },
    "RIOI3_TBYTETERM_X31Y63": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 26,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 126,
        "grid_y": 38,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y63": "IDELAYE2",
            "IDELAY_X0Y64": "IDELAYE2",
            "ILOGIC_X0Y63": "ILOGICE3",
            "ILOGIC_X0Y64": "ILOGICE3",
            "OLOGIC_X0Y63": "OLOGICE3",
            "OLOGIC_X0Y64": "OLOGICE3"
        },
        "type": "RIOI3_TBYTETERM"
    },
    "RIOI3_TBYTETERM_X31Y87": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00001B80",
                "frames": 42,
                "offset": 75,
                "words": 4
            }
        },
        "clock_region": "X1Y1",
        "grid_x": 126,
        "grid_y": 13,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y87": "IDELAYE2",
            "IDELAY_X0Y88": "IDELAYE2",
            "ILOGIC_X0Y87": "ILOGICE3",
            "ILOGIC_X0Y88": "ILOGICE3",
            "OLOGIC_X0Y87": "OLOGICE3",
            "OLOGIC_X0Y88": "OLOGICE3"
        },
        "type": "RIOI3_TBYTETERM"
    },
    "RIOI3_X31Y1": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 2,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 102,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y1": "IDELAYE2",
            "IDELAY_X0Y2": "IDELAYE2",
            "ILOGIC_X0Y1": "ILOGICE3",
            "ILOGIC_X0Y2": "ILOGICE3",
            "OLOGIC_X0Y1": "OLOGICE3",
            "OLOGIC_X0Y2": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X31Y3": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 6,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 100,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y3": "IDELAYE2",
            "IDELAY_X0Y4": "IDELAYE2",
            "ILOGIC_X0Y3": "ILOGICE3",
            "ILOGIC_X0Y4": "ILOGICE3",
            "OLOGIC_X0Y3": "OLOGICE3",
            "OLOGIC_X0Y4": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X31Y5": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 10,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 98,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y5": "IDELAYE2",
            "IDELAY_X0Y6": "IDELAYE2",
            "ILOGIC_X0Y5": "ILOGICE3",
            "ILOGIC_X0Y6": "ILOGICE3",
            "OLOGIC_X0Y5": "OLOGICE3",
            "OLOGIC_X0Y6": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X31Y9": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 18,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 94,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y9": "IDELAYE2",
            "IDELAY_X0Y10": "IDELAYE2",
            "ILOGIC_X0Y9": "ILOGICE3",
            "ILOGIC_X0Y10": "ILOGICE3",
            "OLOGIC_X0Y9": "OLOGICE3",
            "OLOGIC_X0Y10": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X31Y11": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 22,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 92,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y11": "IDELAYE2",
            "IDELAY_X0Y12": "IDELAYE2",
            "ILOGIC_X0Y11": "ILOGICE3",
            "ILOGIC_X0Y12": "ILOGICE3",
            "OLOGIC_X0Y11": "OLOGICE3",
            "OLOGIC_X0Y12": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X31Y15": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 30,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 88,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y15": "IDELAYE2",
            "IDELAY_X0Y16": "IDELAYE2",
            "ILOGIC_X0Y15": "ILOGICE3",
            "ILOGIC_X0Y16": "ILOGICE3",
            "OLOGIC_X0Y15": "OLOGICE3",
            "OLOGIC_X0Y16": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X31Y17": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 34,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 86,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y17": "IDELAYE2",
            "IDELAY_X0Y18": "IDELAYE2",
            "ILOGIC_X0Y17": "ILOGICE3",
            "ILOGIC_X0Y18": "ILOGICE3",
            "OLOGIC_X0Y17": "OLOGICE3",
            "OLOGIC_X0Y18": "OLOGICE3"
        },
        "type": "RIOI3"
    },
    "RIOI3_X31Y21": {
        "bits": {
            "CLB_IO_CLK": {
                "baseaddr": "0x00401B80",
                "frames": 42,
                "offset": 42,
                "words": 4
            }
        },
        "clock_region": "X1Y0",
        "grid_x": 126,
        "grid_y": 82,
        "pin_functions": {},
        "prohibited_sites": [],
        "sites": {
            "IDELAY_X0Y21": "IDELAYE2",
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