# Loosely based on
# segprint -zd test_data/clb_ff/design.bits

# FF as LDCE
CLBLM_L_X10Y102.SLICE_X12Y102.AFF.DMUX.AX 1
CLBLM_L_X10Y102.SLICE_X12Y102.AFF.ZINI 1
CLBLM_L_X10Y102.SLICE_X12Y102.AFF.ZRST 1
CLBLM_L_X10Y102.SLICE_X12Y102.CEUSEDMUX 1
CLBLM_L_X10Y102.SLICE_X12Y102.SRUSEDMUX 1
# CLBLM_L_X10Y102.SLICE_X12Y102.FFSYNC 0
# CLBLM_L_X10Y102.SLICE_X12Y102.LATCH 0

# Note: a number of pseudo pips here
# Omitted
INT_L_X10Y102.CENTER_INTER_L.BYP_ALT0 EE2END0
INT_L_X10Y102.CENTER_INTER_L.BYP_ALT1 EL1END1
INT_L_X10Y102.CENTER_INTER_L.CLK_L1 GCLK_L_B11_WEST
INT_L_X10Y102.CENTER_INTER_L.CTRL_L1 ER1END2
INT_L_X10Y102.CENTER_INTER_L.FAN_ALT7 BYP_BOUNCE0
INT_L_X10Y102.CENTER_INTER_L.WW2BEG0 LOGIC_OUTS_L4

HCLK_L_X31Y130.HCLK_L.ENABLE_BUFFER HCLK_CK_BUFHCLK8
HCLK_L_X31Y130.HCLK_L.HCLK_LEAF_CLK_B_BOTL5 HCLK_CK_BUFHCLK8