Sign in
foss-fpga-tools
/
prjxray
/
95eb4f812b2f29ce74885abf8ecc69c72517d62f
/
.
/
minitests
/
litex
/
uart_ddr
/
arty
/
src.yosys
tree: ddacd9cdeb1ddc5eeaae4e2e7a31b393ba1e8fb2
mem.init
⇨
../generated/mem.init
mem_1.init
⇨
../generated/mem_1.init
Makefile
synth.ys
top.tcl