)]}'
{
  "id": "bf52ef90bfda3ac9aecf382d463930a52b95b01c",
  "repo": "prjxray",
  "revision": "dbef93f8f225580f92a03ff90c0e944c537e5133",
  "path": "minitests/litex/min_ddr/arty/verilog/top.v"
}