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foss-fpga-tools / prjxray / ec29f1ecc82708473bcf62210ba0468b5b89bc13 / . / minitests / litex / uart_ddr / arty / src.yosys
tree: ddacd9cdeb1ddc5eeaae4e2e7a31b393ba1e8fb2 [path history] [tgz]
  1. mem.init ⇨ ../generated/mem.init
  2. mem_1.init ⇨ ../generated/mem_1.init
  3. Makefile
  4. synth.ys
  5. top.tcl