diff --git a/.github/kokoro/continuous-db-spartan7.cfg b/.github/kokoro/continuous-db-spartan7.cfg
index 48475b3..ebb7e3c 100644
--- a/.github/kokoro/continuous-db-spartan7.cfg
+++ b/.github/kokoro/continuous-db-spartan7.cfg
@@ -1,6 +1,6 @@
 # Format: //devtools/kokoro/config/proto/build.proto
 
-build_file: "symbiflow-prjxray-continuous-db-spartan7/.github/kokoro/nothing.sh"
+build_file: "symbiflow-prjxray-continuous-db-spartan7/.github/kokoro/db-full.sh"
 
 timeout_mins: 4320
 
diff --git a/.github/kokoro/presubmit-db-spartan7.cfg b/.github/kokoro/presubmit-db-spartan7.cfg
index 4264781..39caf3a 100644
--- a/.github/kokoro/presubmit-db-spartan7.cfg
+++ b/.github/kokoro/presubmit-db-spartan7.cfg
@@ -1,6 +1,6 @@
 # Format: //devtools/kokoro/config/proto/build.proto
 
-build_file: "symbiflow-prjxray-presubmit-db-spartan7/.github/kokoro/nothing.sh"
+build_file: "symbiflow-prjxray-presubmit-db-spartan7/.github/kokoro/db-full.sh"
 
 timeout_mins: 4320
 
diff --git a/Makefile b/Makefile
index f436df8..53c3878 100644
--- a/Makefile
+++ b/Makefile
@@ -132,7 +132,7 @@
 # Targets related to Project X-Ray databases
 # ------------------------
 
-DATABASES=artix7 kintex7 zynq7
+DATABASES=artix7 kintex7 zynq7 spartan7
 
 define database
 
@@ -186,8 +186,9 @@
 ARTIX_PARTS=artix7_50t artix7_200t
 ZYNQ_PARTS=zynq7010
 KINTEX_PARTS=
+SPARTAN_PARTS=
 
-XRAY_PARTS=${ARTIX_PARTS} ${ZYNQ_PARTS} ${KINTEX_PARTS}
+XRAY_PARTS=${ARTIX_PARTS} ${ZYNQ_PARTS} ${KINTEX_PARTS} ${SPARTAN_PARTS}
 
 define multiple-parts
 
@@ -240,6 +241,15 @@
 db-extras-kintex7-harness:
 	@true
 
+db-extras-spartan7-parts:
+	@true
+
+db-extras-spartan7-roi:
+	@true
+
+db-extras-spartan7-harness:
+	@true
+
 db-extras-zynq7-parts: $(addprefix db-part-only-,$(ZYNQ_PARTS))
 
 db-extras-zynq7-roi: $(addprefix db-roi-only-,$(ZYNQ_PARTS))
@@ -265,4 +275,4 @@
 	$(MAKE) -C fuzzers clean
 	rm -rf build
 
-.PHONY: clean
+.PHONY: clean
\ No newline at end of file
diff --git a/fuzzers/074-dump_all/ignored_wires/spartan7/xc7s50fgga484-1_ignored_wires.txt b/fuzzers/074-dump_all/ignored_wires/spartan7/xc7s50fgga484-1_ignored_wires.txt
new file mode 100644
index 0000000..aea72e6
--- /dev/null
+++ b/fuzzers/074-dump_all/ignored_wires/spartan7/xc7s50fgga484-1_ignored_wires.txt
@@ -0,0 +1,110 @@
+CMT_TOP_L_LOWER_T_X106Y18/CMT_PHASER_DOWN_DQS_TO_PHASER_A
+CMT_TOP_L_LOWER_T_X106Y70/CMT_PHASER_DOWN_DQS_TO_PHASER_A
+CMT_TOP_L_UPPER_B_X106Y31/CMT_PHASER_UP_DQS_TO_PHASER_D
+CMT_TOP_L_UPPER_B_X106Y83/CMT_PHASER_UP_DQS_TO_PHASER_D
+CMT_TOP_R_LOWER_T_X8Y122/CMT_PHASER_DOWN_DQS_TO_PHASER_A
+CMT_TOP_R_LOWER_T_X8Y18/CMT_PHASER_DOWN_DQS_TO_PHASER_A
+CMT_TOP_R_LOWER_T_X8Y70/CMT_PHASER_DOWN_DQS_TO_PHASER_A
+CMT_TOP_R_UPPER_B_X8Y135/CMT_PHASER_UP_DQS_TO_PHASER_D
+CMT_TOP_R_UPPER_B_X8Y31/CMT_PHASER_UP_DQS_TO_PHASER_D
+CMT_TOP_R_UPPER_B_X8Y83/CMT_PHASER_UP_DQS_TO_PHASER_D
+LIOI3_TBYTESRC_X0Y107/LIOI_I2GCLK_BOT1
+LIOI3_TBYTESRC_X0Y107/LIOI_I2GCLK_TOP1
+LIOI3_TBYTESRC_X0Y119/LIOI_I2GCLK_BOT1
+LIOI3_TBYTESRC_X0Y119/LIOI_I2GCLK_TOP1
+LIOI3_TBYTESRC_X0Y131/LIOI_I2GCLK_BOT1
+LIOI3_TBYTESRC_X0Y131/LIOI_I2GCLK_TOP1
+LIOI3_TBYTESRC_X0Y143/LIOI_I2GCLK_BOT1
+LIOI3_TBYTESRC_X0Y143/LIOI_I2GCLK_TOP1
+LIOI3_TBYTESRC_X0Y19/LIOI_I2GCLK_BOT1
+LIOI3_TBYTESRC_X0Y19/LIOI_I2GCLK_TOP1
+LIOI3_TBYTESRC_X0Y31/LIOI_I2GCLK_BOT1
+LIOI3_TBYTESRC_X0Y31/LIOI_I2GCLK_TOP1
+LIOI3_TBYTESRC_X0Y43/LIOI_I2GCLK_BOT1
+LIOI3_TBYTESRC_X0Y43/LIOI_I2GCLK_TOP1
+LIOI3_TBYTESRC_X0Y57/LIOI_I2GCLK_BOT1
+LIOI3_TBYTESRC_X0Y57/LIOI_I2GCLK_TOP1
+LIOI3_TBYTESRC_X0Y69/LIOI_I2GCLK_BOT1
+LIOI3_TBYTESRC_X0Y69/LIOI_I2GCLK_TOP1
+LIOI3_TBYTESRC_X0Y7/LIOI_I2GCLK_BOT1
+LIOI3_TBYTESRC_X0Y7/LIOI_I2GCLK_TOP1
+LIOI3_TBYTESRC_X0Y81/LIOI_I2GCLK_BOT1
+LIOI3_TBYTESRC_X0Y81/LIOI_I2GCLK_TOP1
+LIOI3_TBYTESRC_X0Y93/LIOI_I2GCLK_BOT1
+LIOI3_TBYTESRC_X0Y93/LIOI_I2GCLK_TOP1
+LIOI3_TBYTETERM_X0Y113/LIOI_I2GCLK_BOT1
+LIOI3_TBYTETERM_X0Y113/LIOI_I2GCLK_TOP1
+LIOI3_TBYTETERM_X0Y137/LIOI_I2GCLK_BOT1
+LIOI3_TBYTETERM_X0Y137/LIOI_I2GCLK_TOP1
+LIOI3_TBYTETERM_X0Y13/LIOI_I2GCLK_BOT1
+LIOI3_TBYTETERM_X0Y13/LIOI_I2GCLK_TOP1
+LIOI3_TBYTETERM_X0Y37/LIOI_I2GCLK_BOT1
+LIOI3_TBYTETERM_X0Y37/LIOI_I2GCLK_TOP1
+LIOI3_TBYTETERM_X0Y63/LIOI_I2GCLK_BOT1
+LIOI3_TBYTETERM_X0Y63/LIOI_I2GCLK_TOP1
+LIOI3_TBYTETERM_X0Y87/LIOI_I2GCLK_BOT1
+LIOI3_TBYTETERM_X0Y87/LIOI_I2GCLK_TOP1
+LIOI3_X0Y105/LIOI_I2GCLK_TOP1
+LIOI3_X0Y109/LIOI_I2GCLK_BOT1
+LIOI3_X0Y117/LIOI_I2GCLK_TOP1
+LIOI3_X0Y121/LIOI_I2GCLK_BOT1
+LIOI3_X0Y129/LIOI_I2GCLK_TOP1
+LIOI3_X0Y133/LIOI_I2GCLK_BOT1
+LIOI3_X0Y141/LIOI_I2GCLK_TOP1
+LIOI3_X0Y145/LIOI_I2GCLK_BOT1
+LIOI3_X0Y17/LIOI_I2GCLK_TOP1
+LIOI3_X0Y21/LIOI_I2GCLK_BOT1
+LIOI3_X0Y29/LIOI_I2GCLK_TOP1
+LIOI3_X0Y33/LIOI_I2GCLK_BOT1
+LIOI3_X0Y41/LIOI_I2GCLK_TOP1
+LIOI3_X0Y45/LIOI_I2GCLK_BOT1
+LIOI3_X0Y55/LIOI_I2GCLK_TOP1
+LIOI3_X0Y59/LIOI_I2GCLK_BOT1
+LIOI3_X0Y5/LIOI_I2GCLK_TOP1
+LIOI3_X0Y67/LIOI_I2GCLK_TOP1
+LIOI3_X0Y71/LIOI_I2GCLK_BOT1
+LIOI3_X0Y79/LIOI_I2GCLK_TOP1
+LIOI3_X0Y83/LIOI_I2GCLK_BOT1
+LIOI3_X0Y91/LIOI_I2GCLK_TOP1
+LIOI3_X0Y95/LIOI_I2GCLK_BOT1
+LIOI3_X0Y9/LIOI_I2GCLK_BOT1
+RIOI3_TBYTESRC_X43Y19/RIOI_I2GCLK_BOT1
+RIOI3_TBYTESRC_X43Y19/RIOI_I2GCLK_TOP1
+RIOI3_TBYTESRC_X43Y31/RIOI_I2GCLK_BOT1
+RIOI3_TBYTESRC_X43Y31/RIOI_I2GCLK_TOP1
+RIOI3_TBYTESRC_X43Y43/RIOI_I2GCLK_BOT1
+RIOI3_TBYTESRC_X43Y43/RIOI_I2GCLK_TOP1
+RIOI3_TBYTESRC_X43Y57/RIOI_I2GCLK_BOT1
+RIOI3_TBYTESRC_X43Y57/RIOI_I2GCLK_TOP1
+RIOI3_TBYTESRC_X43Y69/RIOI_I2GCLK_BOT1
+RIOI3_TBYTESRC_X43Y69/RIOI_I2GCLK_TOP1
+RIOI3_TBYTESRC_X43Y7/RIOI_I2GCLK_BOT1
+RIOI3_TBYTESRC_X43Y7/RIOI_I2GCLK_TOP1
+RIOI3_TBYTESRC_X43Y81/RIOI_I2GCLK_BOT1
+RIOI3_TBYTESRC_X43Y81/RIOI_I2GCLK_TOP1
+RIOI3_TBYTESRC_X43Y93/RIOI_I2GCLK_BOT1
+RIOI3_TBYTESRC_X43Y93/RIOI_I2GCLK_TOP1
+RIOI3_TBYTETERM_X43Y13/RIOI_I2GCLK_BOT1
+RIOI3_TBYTETERM_X43Y13/RIOI_I2GCLK_TOP1
+RIOI3_TBYTETERM_X43Y37/RIOI_I2GCLK_BOT1
+RIOI3_TBYTETERM_X43Y37/RIOI_I2GCLK_TOP1
+RIOI3_TBYTETERM_X43Y63/RIOI_I2GCLK_BOT1
+RIOI3_TBYTETERM_X43Y63/RIOI_I2GCLK_TOP1
+RIOI3_TBYTETERM_X43Y87/RIOI_I2GCLK_BOT1
+RIOI3_TBYTETERM_X43Y87/RIOI_I2GCLK_TOP1
+RIOI3_X43Y17/RIOI_I2GCLK_TOP1
+RIOI3_X43Y21/RIOI_I2GCLK_BOT1
+RIOI3_X43Y29/RIOI_I2GCLK_TOP1
+RIOI3_X43Y33/RIOI_I2GCLK_BOT1
+RIOI3_X43Y41/RIOI_I2GCLK_TOP1
+RIOI3_X43Y45/RIOI_I2GCLK_BOT1
+RIOI3_X43Y55/RIOI_I2GCLK_TOP1
+RIOI3_X43Y59/RIOI_I2GCLK_BOT1
+RIOI3_X43Y5/RIOI_I2GCLK_TOP1
+RIOI3_X43Y67/RIOI_I2GCLK_TOP1
+RIOI3_X43Y71/RIOI_I2GCLK_BOT1
+RIOI3_X43Y79/RIOI_I2GCLK_TOP1
+RIOI3_X43Y83/RIOI_I2GCLK_BOT1
+RIOI3_X43Y91/RIOI_I2GCLK_TOP1
+RIOI3_X43Y95/RIOI_I2GCLK_BOT1
+RIOI3_X43Y9/RIOI_I2GCLK_BOT1
diff --git a/settings/spartan7.sh b/settings/spartan7.sh
new file mode 100644
index 0000000..16d2325
--- /dev/null
+++ b/settings/spartan7.sh
@@ -0,0 +1,51 @@
+#!/bin/bash
+# Copyright (C) 2017-2021  The Project X-Ray Authors.
+#
+# Use of this source code is governed by a ISC-style
+# license that can be found in the LICENSE file or at
+# https://opensource.org/licenses/ISC
+#
+# SPDX-License-Identifier: ISC
+export XRAY_DATABASE="spartan7"
+export XRAY_PART="xc7s50fgga484-1"
+export XRAY_ROI_FRAMES="0x00000000:0xffffffff"
+
+# All CLB's in part, all BRAM's in part, all DSP's in part.
+# tcl queries IOB => don't bother adding
+export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X65Y99 SLICE_X0Y100:SLICE_X57Y149 RAMB18_X0Y0:RAMB18_X1Y59 RAMB36_X0Y0:RAMB36_X1Y29 RAMB18_X2Y0:RAMB18_X2Y39 RAMB36_X2Y0:RAMB36_X2Y19 DSP48_X0Y0:DSP48_X1Y59"
+
+export XRAY_EXCLUDE_ROI_TILEGRID=""
+
+# This is used by fuzzers/005-tilegrid/generate_full.py
+# (special handling for frame addresses of certain IOIs -- see the script for details).
+# This needs to be changed for any new device!
+# If you have a FASM mismatch or unknown bits in IOIs, CHECK THIS FIRST.
+export XRAY_IOI3_TILES="LIOI3_X0Y9 RIOI3_X43Y9"
+
+# These settings must remain in sync
+export XRAY_ROI="SLICE_X0Y100:SLICE_X35Y149 RAMB18_X0Y40:RAMB18_X0Y59 RAMB36_X0Y20:RAMB36_X0Y29 DSP48_X0Y40:DSP48_X0Y59 IOB_X0Y100:IOB_X0Y149"
+# Most of CMT X0Y2.
+export XRAY_ROI_GRID_X1="10"
+export XRAY_ROI_GRID_X2="58"
+# Include VBRK / VTERM
+export XRAY_ROI_GRID_Y1="0"
+export XRAY_ROI_GRID_Y2="51"
+
+# clock pin
+export XRAY_PIN_00="F14"
+# data pins
+export XRAY_PIN_01="F13"
+export XRAY_PIN_02="F12"
+export XRAY_PIN_03="F11"
+export XRAY_PIN_04="G11"
+export XRAY_PIN_05="G10"
+export XRAY_PIN_06="G13"
+
+source $(dirname ${BASH_SOURCE[0]})/../utils/environment.sh
+
+eval $(python3 ${XRAY_UTILS_DIR}/create_environment.py)
+ENV_RET=$?
+if [[ $ENV_RET != 0 ]] ; then
+	return $ENV_RET
+fi
+eval $env
diff --git a/settings/spartan7/devices.yaml b/settings/spartan7/devices.yaml
new file mode 100644
index 0000000..b610feb
--- /dev/null
+++ b/settings/spartan7/devices.yaml
@@ -0,0 +1,4 @@
+# device to fabric mapping
+"xc7s50":
+  fabric: "xc7s50"
+  
\ No newline at end of file
diff --git a/utils/update_parts.py b/utils/update_parts.py
index e143b50..407eee1 100755
--- a/utils/update_parts.py
+++ b/utils/update_parts.py
@@ -30,7 +30,7 @@
     parser.add_argument(
         'family',
         help="Name of the device family.",
-        choices=['artix7', 'kintex7', 'zynq7'])
+        choices=['artix7', 'kintex7', 'zynq7', 'spartan7'])
     util.db_root_arg(parser)
 
     args = parser.parse_args()
diff --git a/utils/update_resources.py b/utils/update_resources.py
index 3b2209d..d5d3b26 100755
--- a/utils/update_resources.py
+++ b/utils/update_resources.py
@@ -30,7 +30,7 @@
     parser.add_argument(
         'family',
         help="Name of the device family.",
-        choices=['artix7', 'kintex7', 'zynq7'])
+        choices=['artix7', 'kintex7', 'zynq7', 'spartan7'])
     util.db_root_arg(parser)
 
     args = parser.parse_args()