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foss-fpga-tools
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prjxray
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f2d21573c7f6bdfa98e86fae5a2f5ef52e23b51c
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.
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minitests
/
srl
/
README.md
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# Minitests for SRLs
This
is
a minitest
for
various SRL configurations
.
Uses
Yosys
to generate EDIF which
is
then
P
&
R
'd by Vivado. The makefile also invokes bit2fasm and segprint