NOR gate
========

This is an NOR gate

.. symbolator:: nor.sim.v

.. verilog-diagram:: nor.sim.v
   :type: netlistsvg
   :module: NOR

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.. no-license:: nor.sim.v
   :language: verilog
   :caption: nor.sim.v

The gate model generated by V2X

.. literalinclude:: nor.model.xml
   :language: xml
   :caption: nor.model.xml

The gate pb_type generated by V2X

.. literalinclude:: nor.pb_type.xml
   :language: xml
   :caption: nor.pb_type.xml