)]}'
{
  "commit": "134ecf2fa9d1fcf2e22dc633259e8bdcd060625c",
  "tree": "14c7e206454e406e3ec1f54fad4e4fe97a160cf0",
  "parents": [
    "df565743f1c2259718a21ef494e80e1270f97bd4",
    "84f2898f71f40c45697ba4caae53443d49cdb439"
  ],
  "author": {
    "name": "Tim Ansell",
    "email": "me@mith.ro",
    "time": "Mon Apr 20 08:51:41 2020 -0700"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Mon Apr 20 08:51:41 2020 -0700"
  },
  "message": "Merge pull request #58 from daniellimws/verilog-diagram-old\n\nPin verilog-diagram to an older version to stop build from failing",
  "tree_diff": []
}