)]}'
{
  "commit": "9a41bbd86e4cb7b1c90cb31e6e47e5fb6445bbea",
  "tree": "e9d0a2cf682088b7af6c9fcdc7ce6465d9436c18",
  "parents": [
    "df65ac3fa51b6b8199e6bea8e1e77d9e91438f11"
  ],
  "author": {
    "name": "Maciej Kurc",
    "email": "mkurc@antmicro.com",
    "time": "Fri Jul 31 14:50:45 2020 +0200"
  },
  "committer": {
    "name": "Maciej Kurc",
    "email": "mkurc@antmicro.com",
    "time": "Mon Sep 28 17:00:15 2020 +0200"
  },
  "message": "Added the posibility to express cells that are clock buffers/muxes in the way VPR requires to do that.\n\nSigned-off-by: Maciej Kurc \u003cmkurc@antmicro.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "bcb40ae14d72260746e782c5245c6863af929fad",
      "old_mode": 33261,
      "old_path": "v2x/vlog_to_model.py",
      "new_id": "ee4240ac54d85fa4cf5d0719030d7ba1c19281d6",
      "new_mode": 33261,
      "new_path": "v2x/vlog_to_model.py"
    }
  ]
}