| # `carry` - `cblock` tests |
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| This directory contains test for the `v2x_to_model.py` and `v2x_to_pb_type` tools. |
| Those tests should check the following features: |
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| ## Blackbox detection |
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| - [ ] model of the leaf pb\_type is generated |
| - [ ] leaf pb\_type xml is generated |
| - [ ] all dependency models and pb\_types are included in the output files |
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| ## Combinational connections |
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| - [ ] automatic inference of combinational connections between input and output ports |
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| ## Carry chain inference |
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| - [ ] carry chains inference - carry chains defined on wires with `carry` attribute should be propagated to pb\_type xml file |
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| ## Timing |
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| - [ ] all the timing defined in Verilog should be propagated to result pb\_type file |