tree: 35c7ab3a7bef1f5f111e0e7742af652d3ee4c22e [path history] [tgz]
  1. b_dram.pb_type.xml
  2. CMakeLists.txt
  3. d_dram.pb_type.xml
  4. d_dram128.pb_type.xml
  5. dpram32.pb_type.xml
  6. dpram64.pb_type.xml
  7. dpram64_for_ram128x1d.pb_type.xml
  8. ntemplate.N_dram.model.xml
  9. ntemplate.N_dram.pb_type.xml
  10. ntemplate.N_dram128.pb_type.xml
  11. README.md
  12. spram32.pb_type.xml
xilinx/common/primitives/slicem/Ndram/README.md

Distributed RAM possible modes

RAMPrimitivePlanned?LUTsYosysShould work?Pack tested?Function tested?Description
32 x 1SRAM32X1SYes1YesYesYesSingle-Port 32 x 1-bit RAM
32 x 1SRAM32X1S_1No1NoNo (need mode)NoSingle-Port 32 x 1-bit RAM (inverted clock)
32 x 1DRAM32X1DYes2YesYesYesDual-Port 32 x 1-bit RAM
32 x 2SRAM32X2SYes1YesYesYesSingle-Port 32 x 2-bit RAM
32 x 2QRAM32MYes4Not yet^YesNoQuad-Port 32 x 2-bit RAM
32 x 6SDPRAM32MYes4Not yet^YesNoSimple Dual-Port 32 x 6-bit RAM
64 x 1SRAM64X1SYes1YesYesYesSingle-Port 64 x 1-bit RAM
64 x 1SRAM64X1S_1No1NoNo (need mode)NoSingle-Port 32 x 1-bit RAM (inverted clock)
64 x 1DRAM64X1DYes2YesYesYesDual-Port 64 x 1-bit RAM
64 x 1QRAM64MYes4Not yet^YesNoQuad-Port 64 x 1-bit RAM
64 x 3SDPRAM64MYes4Not yet^YesNoSimple Dual-Port 64 x 3-bit RAM
128 x 1SRAM128X1SYes2YesYesYesSingle-Port 128 x 1-bit RAM
128 x 1DRAM128X1DYes4YesYesDual-Port 128 x 1-bit RAM
256 x 1SRAM256X1SYes4YesYesYesSingle-Port 256 x 1-bit RAM

^ - Need to model shorted inputs with CONNMAP