tree: eb041856cdceb2f109ff826ab208fb664dbc3eeb [path history] [tgz]
  1. add_pack_patterns.py
  2. animate_router_pop.py
  3. annotate_vpr_log.py
  4. CMakeLists.txt
  5. output_timing.tcl
  6. prjxray_arch_import.py
  7. prjxray_assign_tile_pin_direction.py
  8. prjxray_constant_site_pins.py
  9. prjxray_create_edges.py
  10. prjxray_create_equiv_tiles.py
  11. prjxray_create_pinmap_csv.py
  12. prjxray_create_synth_tiles.py
  13. prjxray_db_cache.py
  14. prjxray_define_segments.py
  15. prjxray_edge_library.py
  16. prjxray_find_inode.py
  17. prjxray_form_channels.py
  18. prjxray_generate_dummy_site.py
  19. prjxray_get_fabric.py
  20. prjxray_import_tile_capacity.py
  21. prjxray_lookup_inode.py
  22. prjxray_make_ps7_models.py
  23. prjxray_pcf_to_xdc.py
  24. prjxray_physical_tile_import.py
  25. prjxray_print_net_map.py
  26. prjxray_routing_import.py
  27. prjxray_tile_import.py
  28. README.md
  29. timing_summary.py
  30. timing_utils.tcl
  31. vivado_create_runme.py
  32. vivado_create_sim.py
xilinx/common/utils/README.md

SymbiFlow Architecture Definitions Import Functions

This directory contains python scripts used to import the prjxray architectures to F4PGA architecture definition repository.

The purpose of these scripts are the following:

  • Create a correct XML representation of the XC7 series FPGAs.
  • Create a database containing correct routing information (e.g. channels, pin assignments, etc.).

This document gives an overview of the dependencies among these scripts and their functionalities.

Tile import

Tiles are the top level FPGA blocks that can be instantiated:

  • CLB (Configurable Logic Block)
  • IOB (Input Output Blcok)
  • BRAM (Block RAM)
  • DSP (Digital Signal Processor)
  • INT (Interconnect Blocks)

They are represented by three different XML definitions:

  • model.xml
  • pb_type.xml
  • tile.xml

prjxray_tile_import.py generates the pb_type and model definitions. It takes the name of the top level tile as an argument. This script needs to be called for each different tile that has to be generated.

prjxray_tile_type_import.py generates the tile definition. It is located in a different script as it relies on the pb_type definitions. In fact, each tile can be associated to other tiles which are defined equivalent. In this case, the tile.xml definition must include the pin mapping between the two equivalent tiles. The pin mapping is created with the information included in the pb_type.xml of both the tiles, hence the tile.xml generation can be performed only when all the pb_type.xml definitions have been produced. pb_type.xml are parsed to extract the pin connections of the equivalent tiles that are used to generate the pin mapping when producing tile.xml definitions.